machinecheck.rst 1.3 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. ===============================================================
  3. Configurable sysfs parameters for the x86-64 machine check code
  4. ===============================================================
  5. Machine checks report internal hardware error conditions detected
  6. by the CPU. Uncorrected errors typically cause a machine check
  7. (often with panic), corrected ones cause a machine check log entry.
  8. Machine checks are organized in banks (normally associated with
  9. a hardware subsystem) and subevents in a bank. The exact meaning
  10. of the banks and subevent is CPU specific.
  11. mcelog knows how to decode them.
  12. When you see the "Machine check errors logged" message in the system
  13. log then mcelog should run to collect and decode machine check entries
  14. from /dev/mcelog. Normally mcelog should be run regularly from a cronjob.
  15. Each CPU has a directory in /sys/devices/system/machinecheck/machinecheckN
  16. (N = CPU number).
  17. The directory contains some configurable entries. See
  18. Documentation/ABI/testing/sysfs-mce for more details.
  19. TBD document entries for AMD threshold interrupt configuration
  20. For more details about the x86 machine check architecture
  21. see the Intel and AMD architecture manuals from their developer websites.
  22. For more details about the architecture
  23. see http://one.firstfloor.org/~andi/mce.pdf