boot-options.rst 9.5 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. ===========================
  3. AMD64 Specific Boot Options
  4. ===========================
  5. There are many others (usually documented in driver documentation), but
  6. only the AMD64 specific ones are listed here.
  7. Machine check
  8. =============
  9. Please see Documentation/x86/x86_64/machinecheck.rst for sysfs runtime tunables.
  10. mce=off
  11. Disable machine check
  12. mce=no_cmci
  13. Disable CMCI(Corrected Machine Check Interrupt) that
  14. Intel processor supports. Usually this disablement is
  15. not recommended, but it might be handy if your hardware
  16. is misbehaving.
  17. Note that you'll get more problems without CMCI than with
  18. due to the shared banks, i.e. you might get duplicated
  19. error logs.
  20. mce=dont_log_ce
  21. Don't make logs for corrected errors. All events reported
  22. as corrected are silently cleared by OS.
  23. This option will be useful if you have no interest in any
  24. of corrected errors.
  25. mce=ignore_ce
  26. Disable features for corrected errors, e.g. polling timer
  27. and CMCI. All events reported as corrected are not cleared
  28. by OS and remained in its error banks.
  29. Usually this disablement is not recommended, however if
  30. there is an agent checking/clearing corrected errors
  31. (e.g. BIOS or hardware monitoring applications), conflicting
  32. with OS's error handling, and you cannot deactivate the agent,
  33. then this option will be a help.
  34. mce=no_lmce
  35. Do not opt-in to Local MCE delivery. Use legacy method
  36. to broadcast MCEs.
  37. mce=bootlog
  38. Enable logging of machine checks left over from booting.
  39. Disabled by default on AMD Fam10h and older because some BIOS
  40. leave bogus ones.
  41. If your BIOS doesn't do that it's a good idea to enable though
  42. to make sure you log even machine check events that result
  43. in a reboot. On Intel systems it is enabled by default.
  44. mce=nobootlog
  45. Disable boot machine check logging.
  46. mce=monarchtimeout (number)
  47. monarchtimeout:
  48. Sets the time in us to wait for other CPUs on machine checks. 0
  49. to disable.
  50. mce=bios_cmci_threshold
  51. Don't overwrite the bios-set CMCI threshold. This boot option
  52. prevents Linux from overwriting the CMCI threshold set by the
  53. bios. Without this option, Linux always sets the CMCI
  54. threshold to 1. Enabling this may make memory predictive failure
  55. analysis less effective if the bios sets thresholds for memory
  56. errors since we will not see details for all errors.
  57. mce=recovery
  58. Force-enable recoverable machine check code paths
  59. nomce (for compatibility with i386)
  60. same as mce=off
  61. Everything else is in sysfs now.
  62. APICs
  63. =====
  64. apic
  65. Use IO-APIC. Default
  66. noapic
  67. Don't use the IO-APIC.
  68. disableapic
  69. Don't use the local APIC
  70. nolapic
  71. Don't use the local APIC (alias for i386 compatibility)
  72. pirq=...
  73. See Documentation/x86/i386/IO-APIC.rst
  74. noapictimer
  75. Don't set up the APIC timer
  76. no_timer_check
  77. Don't check the IO-APIC timer. This can work around
  78. problems with incorrect timer initialization on some boards.
  79. apicpmtimer
  80. Do APIC timer calibration using the pmtimer. Implies
  81. apicmaintimer. Useful when your PIT timer is totally broken.
  82. Timing
  83. ======
  84. notsc
  85. Deprecated, use tsc=unstable instead.
  86. nohpet
  87. Don't use the HPET timer.
  88. Idle loop
  89. =========
  90. idle=poll
  91. Don't do power saving in the idle loop using HLT, but poll for rescheduling
  92. event. This will make the CPUs eat a lot more power, but may be useful
  93. to get slightly better performance in multiprocessor benchmarks. It also
  94. makes some profiling using performance counters more accurate.
  95. Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
  96. CPUs) this option has no performance advantage over the normal idle loop.
  97. It may also interact badly with hyperthreading.
  98. Rebooting
  99. =========
  100. reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] | p[ci] [, [w]arm | [c]old]
  101. bios
  102. Use the CPU reboot vector for warm reset
  103. warm
  104. Don't set the cold reboot flag
  105. cold
  106. Set the cold reboot flag
  107. triple
  108. Force a triple fault (init)
  109. kbd
  110. Use the keyboard controller. cold reset (default)
  111. acpi
  112. Use the ACPI RESET_REG in the FADT. If ACPI is not configured or
  113. the ACPI reset does not work, the reboot path attempts the reset
  114. using the keyboard controller.
  115. efi
  116. Use efi reset_system runtime service. If EFI is not configured or
  117. the EFI reset does not work, the reboot path attempts the reset using
  118. the keyboard controller.
  119. pci
  120. Use a write to the PCI config space register 0xcf9 to trigger reboot.
  121. Using warm reset will be much faster especially on big memory
  122. systems because the BIOS will not go through the memory check.
  123. Disadvantage is that not all hardware will be completely reinitialized
  124. on reboot so there may be boot problems on some systems.
  125. reboot=force
  126. Don't stop other CPUs on reboot. This can make reboot more reliable
  127. in some cases.
  128. reboot=default
  129. There are some built-in platform specific "quirks" - you may see:
  130. "reboot: <name> series board detected. Selecting <type> for reboots."
  131. In the case where you think the quirk is in error (e.g. you have
  132. newer BIOS, or newer board) using this option will ignore the built-in
  133. quirk table, and use the generic default reboot actions.
  134. NUMA
  135. ====
  136. numa=off
  137. Only set up a single NUMA node spanning all memory.
  138. numa=noacpi
  139. Don't parse the SRAT table for NUMA setup
  140. numa=nohmat
  141. Don't parse the HMAT table for NUMA setup, or soft-reserved memory
  142. partitioning.
  143. numa=fake=<size>[MG]
  144. If given as a memory unit, fills all system RAM with nodes of
  145. size interleaved over physical nodes.
  146. numa=fake=<N>
  147. If given as an integer, fills all system RAM with N fake nodes
  148. interleaved over physical nodes.
  149. numa=fake=<N>U
  150. If given as an integer followed by 'U', it will divide each
  151. physical node into N emulated nodes.
  152. ACPI
  153. ====
  154. acpi=off
  155. Don't enable ACPI
  156. acpi=ht
  157. Use ACPI boot table parsing, but don't enable ACPI interpreter
  158. acpi=force
  159. Force ACPI on (currently not needed)
  160. acpi=strict
  161. Disable out of spec ACPI workarounds.
  162. acpi_sci={edge,level,high,low}
  163. Set up ACPI SCI interrupt.
  164. acpi=noirq
  165. Don't route interrupts
  166. acpi=nocmcff
  167. Disable firmware first mode for corrected errors. This
  168. disables parsing the HEST CMC error source to check if
  169. firmware has set the FF flag. This may result in
  170. duplicate corrected error reports.
  171. PCI
  172. ===
  173. pci=off
  174. Don't use PCI
  175. pci=conf1
  176. Use conf1 access.
  177. pci=conf2
  178. Use conf2 access.
  179. pci=rom
  180. Assign ROMs.
  181. pci=assign-busses
  182. Assign busses
  183. pci=irqmask=MASK
  184. Set PCI interrupt mask to MASK
  185. pci=lastbus=NUMBER
  186. Scan up to NUMBER busses, no matter what the mptable says.
  187. pci=noacpi
  188. Don't use ACPI to set up PCI interrupt routing.
  189. IOMMU (input/output memory management unit)
  190. ===========================================
  191. Multiple x86-64 PCI-DMA mapping implementations exist, for example:
  192. 1. <kernel/dma/direct.c>: use no hardware/software IOMMU at all
  193. (e.g. because you have < 3 GB memory).
  194. Kernel boot message: "PCI-DMA: Disabling IOMMU"
  195. 2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
  196. Kernel boot message: "PCI-DMA: using GART IOMMU"
  197. 3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
  198. e.g. if there is no hardware IOMMU in the system and it is need because
  199. you have >3GB memory or told the kernel to us it (iommu=soft))
  200. Kernel boot message: "PCI-DMA: Using software bounce buffering
  201. for IO (SWIOTLB)"
  202. ::
  203. iommu=[<size>][,noagp][,off][,force][,noforce]
  204. [,memaper[=<order>]][,merge][,fullflush][,nomerge]
  205. [,noaperture]
  206. General iommu options:
  207. off
  208. Don't initialize and use any kind of IOMMU.
  209. noforce
  210. Don't force hardware IOMMU usage when it is not needed. (default).
  211. force
  212. Force the use of the hardware IOMMU even when it is
  213. not actually needed (e.g. because < 3 GB memory).
  214. soft
  215. Use software bounce buffering (SWIOTLB) (default for
  216. Intel machines). This can be used to prevent the usage
  217. of an available hardware IOMMU.
  218. iommu options only relevant to the AMD GART hardware IOMMU:
  219. <size>
  220. Set the size of the remapping area in bytes.
  221. allowed
  222. Overwrite iommu off workarounds for specific chipsets.
  223. fullflush
  224. Flush IOMMU on each allocation (default).
  225. nofullflush
  226. Don't use IOMMU fullflush.
  227. memaper[=<order>]
  228. Allocate an own aperture over RAM with size 32MB<<order.
  229. (default: order=1, i.e. 64MB)
  230. merge
  231. Do scatter-gather (SG) merging. Implies "force" (experimental).
  232. nomerge
  233. Don't do scatter-gather (SG) merging.
  234. noaperture
  235. Ask the IOMMU not to touch the aperture for AGP.
  236. noagp
  237. Don't initialize the AGP driver and use full aperture.
  238. panic
  239. Always panic when IOMMU overflows.
  240. iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
  241. implementation:
  242. swiotlb=<slots>[,force,noforce]
  243. <slots>
  244. Prereserve that many 2K slots for the software IO bounce buffering.
  245. force
  246. Force all IO through the software TLB.
  247. noforce
  248. Do not initialize the software TLB.
  249. Miscellaneous
  250. =============
  251. nogbpages
  252. Do not use GB pages for kernel direct mappings.
  253. gbpages
  254. Use GB pages for kernel direct mappings.
  255. AMD SEV (Secure Encrypted Virtualization)
  256. =========================================
  257. Options relating to AMD SEV, specified via the following format:
  258. ::
  259. sev=option1[,option2]
  260. The available options are:
  261. debug
  262. Enable debug messages.