ppc-pv.rst 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222
  1. .. SPDX-License-Identifier: GPL-2.0
  2. =================================
  3. The PPC KVM paravirtual interface
  4. =================================
  5. The basic execution principle by which KVM on PowerPC works is to run all kernel
  6. space code in PR=1 which is user space. This way we trap all privileged
  7. instructions and can emulate them accordingly.
  8. Unfortunately that is also the downfall. There are quite some privileged
  9. instructions that needlessly return us to the hypervisor even though they
  10. could be handled differently.
  11. This is what the PPC PV interface helps with. It takes privileged instructions
  12. and transforms them into unprivileged ones with some help from the hypervisor.
  13. This cuts down virtualization costs by about 50% on some of my benchmarks.
  14. The code for that interface can be found in arch/powerpc/kernel/kvm*
  15. Querying for existence
  16. ======================
  17. To find out if we're running on KVM or not, we leverage the device tree. When
  18. Linux is running on KVM, a node /hypervisor exists. That node contains a
  19. compatible property with the value "linux,kvm".
  20. Once you determined you're running under a PV capable KVM, you can now use
  21. hypercalls as described below.
  22. KVM hypercalls
  23. ==============
  24. Inside the device tree's /hypervisor node there's a property called
  25. 'hypercall-instructions'. This property contains at most 4 opcodes that make
  26. up the hypercall. To call a hypercall, just call these instructions.
  27. The parameters are as follows:
  28. ======== ================ ================
  29. Register IN OUT
  30. ======== ================ ================
  31. r0 - volatile
  32. r3 1st parameter Return code
  33. r4 2nd parameter 1st output value
  34. r5 3rd parameter 2nd output value
  35. r6 4th parameter 3rd output value
  36. r7 5th parameter 4th output value
  37. r8 6th parameter 5th output value
  38. r9 7th parameter 6th output value
  39. r10 8th parameter 7th output value
  40. r11 hypercall number 8th output value
  41. r12 - volatile
  42. ======== ================ ================
  43. Hypercall definitions are shared in generic code, so the same hypercall numbers
  44. apply for x86 and powerpc alike with the exception that each KVM hypercall
  45. also needs to be ORed with the KVM vendor code which is (42 << 16).
  46. Return codes can be as follows:
  47. ==== =========================
  48. Code Meaning
  49. ==== =========================
  50. 0 Success
  51. 12 Hypercall not implemented
  52. <0 Error
  53. ==== =========================
  54. The magic page
  55. ==============
  56. To enable communication between the hypervisor and guest there is a new shared
  57. page that contains parts of supervisor visible register state. The guest can
  58. map this shared page using the KVM hypercall KVM_HC_PPC_MAP_MAGIC_PAGE.
  59. With this hypercall issued the guest always gets the magic page mapped at the
  60. desired location. The first parameter indicates the effective address when the
  61. MMU is enabled. The second parameter indicates the address in real mode, if
  62. applicable to the target. For now, we always map the page to -4096. This way we
  63. can access it using absolute load and store functions. The following
  64. instruction reads the first field of the magic page::
  65. ld rX, -4096(0)
  66. The interface is designed to be extensible should there be need later to add
  67. additional registers to the magic page. If you add fields to the magic page,
  68. also define a new hypercall feature to indicate that the host can give you more
  69. registers. Only if the host supports the additional features, make use of them.
  70. The magic page layout is described by struct kvm_vcpu_arch_shared
  71. in arch/powerpc/include/asm/kvm_para.h.
  72. Magic page features
  73. ===================
  74. When mapping the magic page using the KVM hypercall KVM_HC_PPC_MAP_MAGIC_PAGE,
  75. a second return value is passed to the guest. This second return value contains
  76. a bitmap of available features inside the magic page.
  77. The following enhancements to the magic page are currently available:
  78. ============================ =======================================
  79. KVM_MAGIC_FEAT_SR Maps SR registers r/w in the magic page
  80. KVM_MAGIC_FEAT_MAS0_TO_SPRG7 Maps MASn, ESR, PIR and high SPRGs
  81. ============================ =======================================
  82. For enhanced features in the magic page, please check for the existence of the
  83. feature before using them!
  84. Magic page flags
  85. ================
  86. In addition to features that indicate whether a host is capable of a particular
  87. feature we also have a channel for a guest to tell the guest whether it's capable
  88. of something. This is what we call "flags".
  89. Flags are passed to the host in the low 12 bits of the Effective Address.
  90. The following flags are currently available for a guest to expose:
  91. MAGIC_PAGE_FLAG_NOT_MAPPED_NX Guest handles NX bits correctly wrt magic page
  92. MSR bits
  93. ========
  94. The MSR contains bits that require hypervisor intervention and bits that do
  95. not require direct hypervisor intervention because they only get interpreted
  96. when entering the guest or don't have any impact on the hypervisor's behavior.
  97. The following bits are safe to be set inside the guest:
  98. - MSR_EE
  99. - MSR_RI
  100. If any other bit changes in the MSR, please still use mtmsr(d).
  101. Patched instructions
  102. ====================
  103. The "ld" and "std" instructions are transformed to "lwz" and "stw" instructions
  104. respectively on 32 bit systems with an added offset of 4 to accommodate for big
  105. endianness.
  106. The following is a list of mapping the Linux kernel performs when running as
  107. guest. Implementing any of those mappings is optional, as the instruction traps
  108. also act on the shared page. So calling privileged instructions still works as
  109. before.
  110. ======================= ================================
  111. From To
  112. ======================= ================================
  113. mfmsr rX ld rX, magic_page->msr
  114. mfsprg rX, 0 ld rX, magic_page->sprg0
  115. mfsprg rX, 1 ld rX, magic_page->sprg1
  116. mfsprg rX, 2 ld rX, magic_page->sprg2
  117. mfsprg rX, 3 ld rX, magic_page->sprg3
  118. mfsrr0 rX ld rX, magic_page->srr0
  119. mfsrr1 rX ld rX, magic_page->srr1
  120. mfdar rX ld rX, magic_page->dar
  121. mfdsisr rX lwz rX, magic_page->dsisr
  122. mtmsr rX std rX, magic_page->msr
  123. mtsprg 0, rX std rX, magic_page->sprg0
  124. mtsprg 1, rX std rX, magic_page->sprg1
  125. mtsprg 2, rX std rX, magic_page->sprg2
  126. mtsprg 3, rX std rX, magic_page->sprg3
  127. mtsrr0 rX std rX, magic_page->srr0
  128. mtsrr1 rX std rX, magic_page->srr1
  129. mtdar rX std rX, magic_page->dar
  130. mtdsisr rX stw rX, magic_page->dsisr
  131. tlbsync nop
  132. mtmsrd rX, 0 b <special mtmsr section>
  133. mtmsr rX b <special mtmsr section>
  134. mtmsrd rX, 1 b <special mtmsrd section>
  135. [Book3S only]
  136. mtsrin rX, rY b <special mtsrin section>
  137. [BookE only]
  138. wrteei [0|1] b <special wrteei section>
  139. ======================= ================================
  140. Some instructions require more logic to determine what's going on than a load
  141. or store instruction can deliver. To enable patching of those, we keep some
  142. RAM around where we can live translate instructions to. What happens is the
  143. following:
  144. 1) copy emulation code to memory
  145. 2) patch that code to fit the emulated instruction
  146. 3) patch that code to return to the original pc + 4
  147. 4) patch the original instruction to branch to the new code
  148. That way we can inject an arbitrary amount of code as replacement for a single
  149. instruction. This allows us to check for pending interrupts when setting EE=1
  150. for example.
  151. Hypercall ABIs in KVM on PowerPC
  152. =================================
  153. 1) KVM hypercalls (ePAPR)
  154. These are ePAPR compliant hypercall implementation (mentioned above). Even
  155. generic hypercalls are implemented here, like the ePAPR idle hcall. These are
  156. available on all targets.
  157. 2) PAPR hypercalls
  158. PAPR hypercalls are needed to run server PowerPC PAPR guests (-M pseries in QEMU).
  159. These are the same hypercalls that pHyp, the POWER hypervisor implements. Some of
  160. them are handled in the kernel, some are handled in user space. This is only
  161. available on book3s_64.
  162. 3) OSI hypercalls
  163. Mac-on-Linux is another user of KVM on PowerPC, which has its own hypercall (long
  164. before KVM). This is supported to maintain compatibility. All these hypercalls get
  165. forwarded to user space. This is only useful on book3s_32, but can be used with
  166. book3s_64 as well.