slave-interface.rst 8.0 KB

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  1. =====================================
  2. Linux I2C slave interface description
  3. =====================================
  4. by Wolfram Sang <[email protected]> in 2014-15
  5. Linux can also be an I2C slave if the I2C controller in use has slave
  6. functionality. For that to work, one needs slave support in the bus driver plus
  7. a hardware independent software backend providing the actual functionality. An
  8. example for the latter is the slave-eeprom driver, which acts as a dual memory
  9. driver. While another I2C master on the bus can access it like a regular
  10. EEPROM, the Linux I2C slave can access the content via sysfs and handle data as
  11. needed. The backend driver and the I2C bus driver communicate via events. Here
  12. is a small graph visualizing the data flow and the means by which data is
  13. transported. The dotted line marks only one example. The backend could also
  14. use a character device, be in-kernel only, or something completely different::
  15. e.g. sysfs I2C slave events I/O registers
  16. +-----------+ v +---------+ v +--------+ v +------------+
  17. | Userspace +........+ Backend +-----------+ Driver +-----+ Controller |
  18. +-----------+ +---------+ +--------+ +------------+
  19. | |
  20. ----------------------------------------------------------------+-- I2C
  21. --------------------------------------------------------------+---- Bus
  22. Note: Technically, there is also the I2C core between the backend and the
  23. driver. However, at this time of writing, the layer is transparent.
  24. User manual
  25. ===========
  26. I2C slave backends behave like standard I2C clients. So, you can instantiate
  27. them as described in the document instantiating-devices.rst. The only
  28. difference is that i2c slave backends have their own address space. So, you
  29. have to add 0x1000 to the address you would originally request. An example for
  30. instantiating the slave-eeprom driver from userspace at the 7 bit address 0x64
  31. on bus 1::
  32. # echo slave-24c02 0x1064 > /sys/bus/i2c/devices/i2c-1/new_device
  33. Each backend should come with separate documentation to describe its specific
  34. behaviour and setup.
  35. Developer manual
  36. ================
  37. First, the events which are used by the bus driver and the backend will be
  38. described in detail. After that, some implementation hints for extending bus
  39. drivers and writing backends will be given.
  40. I2C slave events
  41. ----------------
  42. The bus driver sends an event to the backend using the following function::
  43. ret = i2c_slave_event(client, event, &val)
  44. 'client' describes the I2C slave device. 'event' is one of the special event
  45. types described hereafter. 'val' holds an u8 value for the data byte to be
  46. read/written and is thus bidirectional. The pointer to val must always be
  47. provided even if val is not used for an event, i.e. don't use NULL here. 'ret'
  48. is the return value from the backend. Mandatory events must be provided by the
  49. bus drivers and must be checked for by backend drivers.
  50. Event types:
  51. * I2C_SLAVE_WRITE_REQUESTED (mandatory)
  52. 'val': unused
  53. 'ret': 0 if the backend is ready, otherwise some errno
  54. Another I2C master wants to write data to us. This event should be sent once
  55. our own address and the write bit was detected. The data did not arrive yet, so
  56. there is nothing to process or return. After returning, the bus driver must
  57. always ack the address phase. If 'ret' is zero, backend initialization or
  58. wakeup is done and further data may be received. If 'ret' is an errno, the bus
  59. driver should nack all incoming bytes until the next stop condition to enforce
  60. a retry of the transmission.
  61. * I2C_SLAVE_READ_REQUESTED (mandatory)
  62. 'val': backend returns first byte to be sent
  63. 'ret': always 0
  64. Another I2C master wants to read data from us. This event should be sent once
  65. our own address and the read bit was detected. After returning, the bus driver
  66. should transmit the first byte.
  67. * I2C_SLAVE_WRITE_RECEIVED (mandatory)
  68. 'val': bus driver delivers received byte
  69. 'ret': 0 if the byte should be acked, some errno if the byte should be nacked
  70. Another I2C master has sent a byte to us which needs to be set in 'val'. If 'ret'
  71. is zero, the bus driver should ack this byte. If 'ret' is an errno, then the byte
  72. should be nacked.
  73. * I2C_SLAVE_READ_PROCESSED (mandatory)
  74. 'val': backend returns next byte to be sent
  75. 'ret': always 0
  76. The bus driver requests the next byte to be sent to another I2C master in
  77. 'val'. Important: This does not mean that the previous byte has been acked, it
  78. only means that the previous byte is shifted out to the bus! To ensure seamless
  79. transmission, most hardware requests the next byte when the previous one is
  80. still shifted out. If the master sends NACK and stops reading after the byte
  81. currently shifted out, this byte requested here is never used. It very likely
  82. needs to be sent again on the next I2C_SLAVE_READ_REQUEST, depending a bit on
  83. your backend, though.
  84. * I2C_SLAVE_STOP (mandatory)
  85. 'val': unused
  86. 'ret': always 0
  87. A stop condition was received. This can happen anytime and the backend should
  88. reset its state machine for I2C transfers to be able to receive new requests.
  89. Software backends
  90. -----------------
  91. If you want to write a software backend:
  92. * use a standard i2c_driver and its matching mechanisms
  93. * write the slave_callback which handles the above slave events
  94. (best using a state machine)
  95. * register this callback via i2c_slave_register()
  96. Check the i2c-slave-eeprom driver as an example.
  97. Bus driver support
  98. ------------------
  99. If you want to add slave support to the bus driver:
  100. * implement calls to register/unregister the slave and add those to the
  101. struct i2c_algorithm. When registering, you probably need to set the I2C
  102. slave address and enable slave specific interrupts. If you use runtime pm, you
  103. should use pm_runtime_get_sync() because your device usually needs to be
  104. powered on always to be able to detect its slave address. When unregistering,
  105. do the inverse of the above.
  106. * Catch the slave interrupts and send appropriate i2c_slave_events to the backend.
  107. Note that most hardware supports being master _and_ slave on the same bus. So,
  108. if you extend a bus driver, please make sure that the driver supports that as
  109. well. In almost all cases, slave support does not need to disable the master
  110. functionality.
  111. Check the i2c-rcar driver as an example.
  112. About ACK/NACK
  113. --------------
  114. It is good behaviour to always ACK the address phase, so the master knows if a
  115. device is basically present or if it mysteriously disappeared. Using NACK to
  116. state being busy is troublesome. SMBus demands to always ACK the address phase,
  117. while the I2C specification is more loose on that. Most I2C controllers also
  118. automatically ACK when detecting their slave addresses, so there is no option
  119. to NACK them. For those reasons, this API does not support NACK in the address
  120. phase.
  121. Currently, there is no slave event to report if the master did ACK or NACK a
  122. byte when it reads from us. We could make this an optional event if the need
  123. arises. However, cases should be extremely rare because the master is expected
  124. to send STOP after that and we have an event for that. Also, keep in mind not
  125. all I2C controllers have the possibility to report that event.
  126. About buffers
  127. -------------
  128. During development of this API, the question of using buffers instead of just
  129. bytes came up. Such an extension might be possible, usefulness is unclear at
  130. this time of writing. Some points to keep in mind when using buffers:
  131. * Buffers should be opt-in and backend drivers will always have to support
  132. byte-based transactions as the ultimate fallback anyhow because this is how
  133. the majority of HW works.
  134. * For backends simulating hardware registers, buffers are largely not helpful
  135. because after each byte written an action should be immediately triggered.
  136. For reads, the data kept in the buffer might get stale if the backend just
  137. updated a register because of internal processing.
  138. * A master can send STOP at any time. For partially transferred buffers, this
  139. means additional code to handle this exception. Such code tends to be
  140. error-prone.