intel-ish-hid.rst 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487
  1. =================================
  2. Intel Integrated Sensor Hub (ISH)
  3. =================================
  4. A sensor hub enables the ability to offload sensor polling and algorithm
  5. processing to a dedicated low power co-processor. This allows the core
  6. processor to go into low power modes more often, resulting in increased
  7. battery life.
  8. There are many vendors providing external sensor hubs conforming to HID
  9. Sensor usage tables. These may be found in tablets, 2-in-1 convertible laptops
  10. and embedded products. Linux has had this support since Linux 3.9.
  11. Intel® introduced integrated sensor hubs as a part of the SoC starting from
  12. Cherry Trail and now supported on multiple generations of CPU packages. There
  13. are many commercial devices already shipped with Integrated Sensor Hubs (ISH).
  14. These ISH also comply to HID sensor specification, but the difference is the
  15. transport protocol used for communication. The current external sensor hubs
  16. mainly use HID over I2C or USB. But ISH doesn't use either I2C or USB.
  17. 1. Overview
  18. ===========
  19. Using a analogy with a usbhid implementation, the ISH follows a similar model
  20. for a very high speed communication::
  21. ----------------- ----------------------
  22. | USB HID | --> | ISH HID |
  23. ----------------- ----------------------
  24. ----------------- ----------------------
  25. | USB protocol | --> | ISH Transport |
  26. ----------------- ----------------------
  27. ----------------- ----------------------
  28. | EHCI/XHCI | --> | ISH IPC |
  29. ----------------- ----------------------
  30. PCI PCI
  31. ----------------- ----------------------
  32. |Host controller| --> | ISH processor |
  33. ----------------- ----------------------
  34. USB Link
  35. ----------------- ----------------------
  36. | USB End points| --> | ISH Clients |
  37. ----------------- ----------------------
  38. Like USB protocol provides a method for device enumeration, link management
  39. and user data encapsulation, the ISH also provides similar services. But it is
  40. very light weight tailored to manage and communicate with ISH client
  41. applications implemented in the firmware.
  42. The ISH allows multiple sensor management applications executing in the
  43. firmware. Like USB endpoints the messaging can be to/from a client. As part of
  44. enumeration process, these clients are identified. These clients can be simple
  45. HID sensor applications, sensor calibration applications or sensor firmware
  46. update applications.
  47. The implementation model is similar, like USB bus, ISH transport is also
  48. implemented as a bus. Each client application executing in the ISH processor
  49. is registered as a device on this bus. The driver, which binds each device
  50. (ISH HID driver) identifies the device type and registers with the HID core.
  51. 2. ISH Implementation: Block Diagram
  52. ====================================
  53. ::
  54. ---------------------------
  55. | User Space Applications |
  56. ---------------------------
  57. ----------------IIO ABI----------------
  58. --------------------------
  59. | IIO Sensor Drivers |
  60. --------------------------
  61. --------------------------
  62. | IIO core |
  63. --------------------------
  64. --------------------------
  65. | HID Sensor Hub MFD |
  66. --------------------------
  67. --------------------------
  68. | HID Core |
  69. --------------------------
  70. --------------------------
  71. | HID over ISH Client |
  72. --------------------------
  73. --------------------------
  74. | ISH Transport (ISHTP) |
  75. --------------------------
  76. --------------------------
  77. | IPC Drivers |
  78. --------------------------
  79. OS
  80. ---------------- PCI -----------------
  81. Hardware + Firmware
  82. ----------------------------
  83. | ISH Hardware/Firmware(FW) |
  84. ----------------------------
  85. 3. High level processing in above blocks
  86. ========================================
  87. 3.1 Hardware Interface
  88. ----------------------
  89. The ISH is exposed as "Non-VGA unclassified PCI device" to the host. The PCI
  90. product and vendor IDs are changed from different generations of processors. So
  91. the source code which enumerates drivers needs to update from generation to
  92. generation.
  93. 3.2 Inter Processor Communication (IPC) driver
  94. ----------------------------------------------
  95. Location: drivers/hid/intel-ish-hid/ipc
  96. The IPC message uses memory mapped I/O. The registers are defined in
  97. hw-ish-regs.h.
  98. 3.2.1 IPC/FW message types
  99. ^^^^^^^^^^^^^^^^^^^^^^^^^^
  100. There are two types of messages, one for management of link and another for
  101. messages to and from transport layers.
  102. TX and RX of Transport messages
  103. ...............................
  104. A set of memory mapped register offers support of multi-byte messages TX and
  105. RX (e.g. IPC_REG_ISH2HOST_MSG, IPC_REG_HOST2ISH_MSG). The IPC layer maintains
  106. internal queues to sequence messages and send them in order to the firmware.
  107. Optionally the caller can register handler to get notification of completion.
  108. A doorbell mechanism is used in messaging to trigger processing in host and
  109. client firmware side. When ISH interrupt handler is called, the ISH2HOST
  110. doorbell register is used by host drivers to determine that the interrupt
  111. is for ISH.
  112. Each side has 32 32-bit message registers and a 32-bit doorbell. Doorbell
  113. register has the following format::
  114. Bits 0..6: fragment length (7 bits are used)
  115. Bits 10..13: encapsulated protocol
  116. Bits 16..19: management command (for IPC management protocol)
  117. Bit 31: doorbell trigger (signal H/W interrupt to the other side)
  118. Other bits are reserved, should be 0.
  119. 3.2.2 Transport layer interface
  120. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  121. To abstract HW level IPC communication, a set of callbacks is registered.
  122. The transport layer uses them to send and receive messages.
  123. Refer to struct ishtp_hw_ops for callbacks.
  124. 3.3 ISH Transport layer
  125. -----------------------
  126. Location: drivers/hid/intel-ish-hid/ishtp/
  127. 3.3.1 A Generic Transport Layer
  128. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  129. The transport layer is a bi-directional protocol, which defines:
  130. - Set of commands to start, stop, connect, disconnect and flow control
  131. (see ishtp/hbm.h for details)
  132. - A flow control mechanism to avoid buffer overflows
  133. This protocol resembles bus messages described in the following document:
  134. http://www.intel.com/content/dam/www/public/us/en/documents/technical-\
  135. specifications/dcmi-hi-1-0-spec.pdf "Chapter 7: Bus Message Layer"
  136. 3.3.2 Connection and Flow Control Mechanism
  137. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  138. Each FW client and a protocol is identified by a UUID. In order to communicate
  139. to a FW client, a connection must be established using connect request and
  140. response bus messages. If successful, a pair (host_client_id and fw_client_id)
  141. will identify the connection.
  142. Once connection is established, peers send each other flow control bus messages
  143. independently. Every peer may send a message only if it has received a
  144. flow-control credit before. Once it has sent a message, it may not send another one
  145. before receiving the next flow control credit.
  146. Either side can send disconnect request bus message to end communication. Also
  147. the link will be dropped if major FW reset occurs.
  148. 3.3.3 Peer to Peer data transfer
  149. ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  150. Peer to Peer data transfer can happen with or without using DMA. Depending on
  151. the sensor bandwidth requirement DMA can be enabled by using module parameter
  152. ishtp_use_dma under intel_ishtp.
  153. Each side (host and FW) manages its DMA transfer memory independently. When an
  154. ISHTP client from either host or FW side wants to send something, it decides
  155. whether to send over IPC or over DMA; for each transfer the decision is
  156. independent. The sending side sends DMA_XFER message when the message is in
  157. the respective host buffer (TX when host client sends, RX when FW client
  158. sends). The recipient of DMA message responds with DMA_XFER_ACK, indicating
  159. the sender that the memory region for that message may be reused.
  160. DMA initialization is started with host sending DMA_ALLOC_NOTIFY bus message
  161. (that includes RX buffer) and FW responds with DMA_ALLOC_NOTIFY_ACK.
  162. Additionally to DMA address communication, this sequence checks capabilities:
  163. if thw host doesn't support DMA, then it won't send DMA allocation, so FW can't
  164. send DMA; if FW doesn't support DMA then it won't respond with
  165. DMA_ALLOC_NOTIFY_ACK, in which case host will not use DMA transfers.
  166. Here ISH acts as busmaster DMA controller. Hence when host sends DMA_XFER,
  167. it's request to do host->ISH DMA transfer; when FW sends DMA_XFER, it means
  168. that it already did DMA and the message resides at host. Thus, DMA_XFER
  169. and DMA_XFER_ACK act as ownership indicators.
  170. At initial state all outgoing memory belongs to the sender (TX to host, RX to
  171. FW), DMA_XFER transfers ownership on the region that contains ISHTP message to
  172. the receiving side, DMA_XFER_ACK returns ownership to the sender. A sender
  173. need not wait for previous DMA_XFER to be ack'ed, and may send another message
  174. as long as remaining continuous memory in its ownership is enough.
  175. In principle, multiple DMA_XFER and DMA_XFER_ACK messages may be sent at once
  176. (up to IPC MTU), thus allowing for interrupt throttling.
  177. Currently, ISH FW decides to send over DMA if ISHTP message is more than 3 IPC
  178. fragments and via IPC otherwise.
  179. 3.3.4 Ring Buffers
  180. ^^^^^^^^^^^^^^^^^^
  181. When a client initiates a connection, a ring of RX and TX buffers is allocated.
  182. The size of ring can be specified by the client. HID client sets 16 and 32 for
  183. TX and RX buffers respectively. On send request from client, the data to be
  184. sent is copied to one of the send ring buffer and scheduled to be sent using
  185. bus message protocol. These buffers are required because the FW may have not
  186. have processed the last message and may not have enough flow control credits
  187. to send. Same thing holds true on receive side and flow control is required.
  188. 3.3.5 Host Enumeration
  189. ^^^^^^^^^^^^^^^^^^^^^^
  190. The host enumeration bus command allows discovery of clients present in the FW.
  191. There can be multiple sensor clients and clients for calibration function.
  192. To ease implementation and allow independent drivers to handle each client,
  193. this transport layer takes advantage of Linux Bus driver model. Each
  194. client is registered as device on the transport bus (ishtp bus).
  195. Enumeration sequence of messages:
  196. - Host sends HOST_START_REQ_CMD, indicating that host ISHTP layer is up.
  197. - FW responds with HOST_START_RES_CMD
  198. - Host sends HOST_ENUM_REQ_CMD (enumerate FW clients)
  199. - FW responds with HOST_ENUM_RES_CMD that includes bitmap of available FW
  200. client IDs
  201. - For each FW ID found in that bitmap host sends
  202. HOST_CLIENT_PROPERTIES_REQ_CMD
  203. - FW responds with HOST_CLIENT_PROPERTIES_RES_CMD. Properties include UUID,
  204. max ISHTP message size, etc.
  205. - Once host received properties for that last discovered client, it considers
  206. ISHTP device fully functional (and allocates DMA buffers)
  207. 3.4 HID over ISH Client
  208. -----------------------
  209. Location: drivers/hid/intel-ish-hid
  210. The ISHTP client driver is responsible for:
  211. - enumerate HID devices under FW ISH client
  212. - Get Report descriptor
  213. - Register with HID core as a LL driver
  214. - Process Get/Set feature request
  215. - Get input reports
  216. 3.5 HID Sensor Hub MFD and IIO sensor drivers
  217. ---------------------------------------------
  218. The functionality in these drivers is the same as an external sensor hub.
  219. Refer to
  220. Documentation/hid/hid-sensor.rst for HID sensor
  221. Documentation/ABI/testing/sysfs-bus-iio for IIO ABIs to user space.
  222. 3.6 End to End HID transport Sequence Diagram
  223. ---------------------------------------------
  224. ::
  225. HID-ISH-CLN ISHTP IPC HW
  226. | | | |
  227. | | |-----WAKE UP------------------>|
  228. | | | |
  229. | | |-----HOST READY--------------->|
  230. | | | |
  231. | | |<----MNG_RESET_NOTIFY_ACK----- |
  232. | | | |
  233. | |<----ISHTP_START------ | |
  234. | | | |
  235. | |<-----------------HOST_START_RES_CMD-------------------|
  236. | | | |
  237. | |------------------QUERY_SUBSCRIBER-------------------->|
  238. | | | |
  239. | |------------------HOST_ENUM_REQ_CMD------------------->|
  240. | | | |
  241. | |<-----------------HOST_ENUM_RES_CMD--------------------|
  242. | | | |
  243. | |------------------HOST_CLIENT_PROPERTIES_REQ_CMD------>|
  244. | | | |
  245. | |<-----------------HOST_CLIENT_PROPERTIES_RES_CMD-------|
  246. | Create new device on in ishtp bus | |
  247. | | | |
  248. | |------------------HOST_CLIENT_PROPERTIES_REQ_CMD------>|
  249. | | | |
  250. | |<-----------------HOST_CLIENT_PROPERTIES_RES_CMD-------|
  251. | Create new device on in ishtp bus | |
  252. | | | |
  253. | |--Repeat HOST_CLIENT_PROPERTIES_REQ_CMD-till last one--|
  254. | | | |
  255. probed()
  256. |----ishtp_cl_connect--->|----------------- CLIENT_CONNECT_REQ_CMD-------------->|
  257. | | | |
  258. | |<----------------CLIENT_CONNECT_RES_CMD----------------|
  259. | | | |
  260. |register event callback | | |
  261. | | | |
  262. |ishtp_cl_send(
  263. HOSTIF_DM_ENUM_DEVICES) |----------fill ishtp_msg_hdr struct write to HW----- >|
  264. | | | |
  265. | | |<-----IRQ(IPC_PROTOCOL_ISHTP---|
  266. | | | |
  267. |<--ENUM_DEVICE RSP------| | |
  268. | | | |
  269. for each enumerated device
  270. |ishtp_cl_send(
  271. HOSTIF_GET_HID_DESCRIPTOR|----------fill ishtp_msg_hdr struct write to HW----- >|
  272. | | | |
  273. ...Response
  274. | | | |
  275. for each enumerated device
  276. |ishtp_cl_send(
  277. HOSTIF_GET_REPORT_DESCRIPTOR|--------------fill ishtp_msg_hdr struct write to HW-- >|
  278. | | | |
  279. | | | |
  280. hid_allocate_device
  281. | | | |
  282. hid_add_device | | |
  283. | | | |
  284. 3.7 ISH Debugging
  285. -----------------
  286. To debug ISH, event tracing mechanism is used. To enable debug logs::
  287. echo 1 > /sys/kernel/debug/tracing/events/intel_ish/enable
  288. cat /sys/kernel/debug/tracing/trace
  289. 3.8 ISH IIO sysfs Example on Lenovo thinkpad Yoga 260
  290. -----------------------------------------------------
  291. ::
  292. root@otcpl-ThinkPad-Yoga-260:~# tree -l /sys/bus/iio/devices/
  293. /sys/bus/iio/devices/
  294. ├── iio:device0 -> ../../../devices/0044:8086:22D8.0001/HID-SENSOR-200073.9.auto/iio:device0
  295. │   ├── buffer
  296. │   │   ├── enable
  297. │   │   ├── length
  298. │   │   └── watermark
  299. ...
  300. │   ├── in_accel_hysteresis
  301. │   ├── in_accel_offset
  302. │   ├── in_accel_sampling_frequency
  303. │   ├── in_accel_scale
  304. │   ├── in_accel_x_raw
  305. │   ├── in_accel_y_raw
  306. │   ├── in_accel_z_raw
  307. │   ├── name
  308. │   ├── scan_elements
  309. │   │   ├── in_accel_x_en
  310. │   │   ├── in_accel_x_index
  311. │   │   ├── in_accel_x_type
  312. │   │   ├── in_accel_y_en
  313. │   │   ├── in_accel_y_index
  314. │   │   ├── in_accel_y_type
  315. │   │   ├── in_accel_z_en
  316. │   │   ├── in_accel_z_index
  317. │   │   └── in_accel_z_type
  318. ...
  319. │   │   ├── devices
  320. │   │   │   │   ├── buffer
  321. │   │   │   │   │   ├── enable
  322. │   │   │   │   │   ├── length
  323. │   │   │   │   │   └── watermark
  324. │   │   │   │   ├── dev
  325. │   │   │   │   ├── in_intensity_both_raw
  326. │   │   │   │   ├── in_intensity_hysteresis
  327. │   │   │   │   ├── in_intensity_offset
  328. │   │   │   │   ├── in_intensity_sampling_frequency
  329. │   │   │   │   ├── in_intensity_scale
  330. │   │   │   │   ├── name
  331. │   │   │   │   ├── scan_elements
  332. │   │   │   │   │   ├── in_intensity_both_en
  333. │   │   │   │   │   ├── in_intensity_both_index
  334. │   │   │   │   │   └── in_intensity_both_type
  335. │   │   │   │   ├── trigger
  336. │   │   │   │   │   └── current_trigger
  337. ...
  338. │   │   │   │   ├── buffer
  339. │   │   │   │   │   ├── enable
  340. │   │   │   │   │   ├── length
  341. │   │   │   │   │   └── watermark
  342. │   │   │   │   ├── dev
  343. │   │   │   │   ├── in_magn_hysteresis
  344. │   │   │   │   ├── in_magn_offset
  345. │   │   │   │   ├── in_magn_sampling_frequency
  346. │   │   │   │   ├── in_magn_scale
  347. │   │   │   │   ├── in_magn_x_raw
  348. │   │   │   │   ├── in_magn_y_raw
  349. │   │   │   │   ├── in_magn_z_raw
  350. │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_raw
  351. │   │   │   │   ├── in_rot_hysteresis
  352. │   │   │   │   ├── in_rot_offset
  353. │   │   │   │   ├── in_rot_sampling_frequency
  354. │   │   │   │   ├── in_rot_scale
  355. │   │   │   │   ├── name
  356. ...
  357. │   │   │   │   ├── scan_elements
  358. │   │   │   │   │   ├── in_magn_x_en
  359. │   │   │   │   │   ├── in_magn_x_index
  360. │   │   │   │   │   ├── in_magn_x_type
  361. │   │   │   │   │   ├── in_magn_y_en
  362. │   │   │   │   │   ├── in_magn_y_index
  363. │   │   │   │   │   ├── in_magn_y_type
  364. │   │   │   │   │   ├── in_magn_z_en
  365. │   │   │   │   │   ├── in_magn_z_index
  366. │   │   │   │   │   ├── in_magn_z_type
  367. │   │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_en
  368. │   │   │   │   │   ├── in_rot_from_north_magnetic_tilt_comp_index
  369. │   │   │   │   │   └── in_rot_from_north_magnetic_tilt_comp_type
  370. │   │   │   │   ├── trigger
  371. │   │   │   │   │   └── current_trigger
  372. ...
  373. │   │   │   │   ├── buffer
  374. │   │   │   │   │   ├── enable
  375. │   │   │   │   │   ├── length
  376. │   │   │   │   │   └── watermark
  377. │   │   │   │   ├── dev
  378. │   │   │   │   ├── in_anglvel_hysteresis
  379. │   │   │   │   ├── in_anglvel_offset
  380. │   │   │   │   ├── in_anglvel_sampling_frequency
  381. │   │   │   │   ├── in_anglvel_scale
  382. │   │   │   │   ├── in_anglvel_x_raw
  383. │   │   │   │   ├── in_anglvel_y_raw
  384. │   │   │   │   ├── in_anglvel_z_raw
  385. │   │   │   │   ├── name
  386. │   │   │   │   ├── scan_elements
  387. │   │   │   │   │   ├── in_anglvel_x_en
  388. │   │   │   │   │   ├── in_anglvel_x_index
  389. │   │   │   │   │   ├── in_anglvel_x_type
  390. │   │   │   │   │   ├── in_anglvel_y_en
  391. │   │   │   │   │   ├── in_anglvel_y_index
  392. │   │   │   │   │   ├── in_anglvel_y_type
  393. │   │   │   │   │   ├── in_anglvel_z_en
  394. │   │   │   │   │   ├── in_anglvel_z_index
  395. │   │   │   │   │   └── in_anglvel_z_type
  396. │   │   │   │   ├── trigger
  397. │   │   │   │   │   └── current_trigger
  398. ...
  399. │   │   │   │   ├── buffer
  400. │   │   │   │   │   ├── enable
  401. │   │   │   │   │   ├── length
  402. │   │   │   │   │   └── watermark
  403. │   │   │   │   ├── dev
  404. │   │   │   │   ├── in_anglvel_hysteresis
  405. │   │   │   │   ├── in_anglvel_offset
  406. │   │   │   │   ├── in_anglvel_sampling_frequency
  407. │   │   │   │   ├── in_anglvel_scale
  408. │   │   │   │   ├── in_anglvel_x_raw
  409. │   │   │   │   ├── in_anglvel_y_raw
  410. │   │   │   │   ├── in_anglvel_z_raw
  411. │   │   │   │   ├── name
  412. │   │   │   │   ├── scan_elements
  413. │   │   │   │   │   ├── in_anglvel_x_en
  414. │   │   │   │   │   ├── in_anglvel_x_index
  415. │   │   │   │   │   ├── in_anglvel_x_type
  416. │   │   │   │   │   ├── in_anglvel_y_en
  417. │   │   │   │   │   ├── in_anglvel_y_index
  418. │   │   │   │   │   ├── in_anglvel_y_type
  419. │   │   │   │   │   ├── in_anglvel_z_en
  420. │   │   │   │   │   ├── in_anglvel_z_index
  421. │   │   │   │   │   └── in_anglvel_z_type
  422. │   │   │   │   ├── trigger
  423. │   │   │   │   │   └── current_trigger
  424. ...