i915_scheduler.rst 7.0 KB

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  1. =========================================
  2. I915 GuC Submission/DRM Scheduler Section
  3. =========================================
  4. Upstream plan
  5. =============
  6. For upstream the overall plan for landing GuC submission and integrating the
  7. i915 with the DRM scheduler is:
  8. * Merge basic GuC submission
  9. * Basic submission support for all gen11+ platforms
  10. * Not enabled by default on any current platforms but can be enabled via
  11. modparam enable_guc
  12. * Lots of rework will need to be done to integrate with DRM scheduler so
  13. no need to nit pick everything in the code, it just should be
  14. functional, no major coding style / layering errors, and not regress
  15. execlists
  16. * Update IGTs / selftests as needed to work with GuC submission
  17. * Enable CI on supported platforms for a baseline
  18. * Rework / get CI heathly for GuC submission in place as needed
  19. * Merge new parallel submission uAPI
  20. * Bonding uAPI completely incompatible with GuC submission, plus it has
  21. severe design issues in general, which is why we want to retire it no
  22. matter what
  23. * New uAPI adds I915_CONTEXT_ENGINES_EXT_PARALLEL context setup step
  24. which configures a slot with N contexts
  25. * After I915_CONTEXT_ENGINES_EXT_PARALLEL a user can submit N batches to
  26. a slot in a single execbuf IOCTL and the batches run on the GPU in
  27. paralllel
  28. * Initially only for GuC submission but execlists can be supported if
  29. needed
  30. * Convert the i915 to use the DRM scheduler
  31. * GuC submission backend fully integrated with DRM scheduler
  32. * All request queues removed from backend (e.g. all backpressure
  33. handled in DRM scheduler)
  34. * Resets / cancels hook in DRM scheduler
  35. * Watchdog hooks into DRM scheduler
  36. * Lots of complexity of the GuC backend can be pulled out once
  37. integrated with DRM scheduler (e.g. state machine gets
  38. simplier, locking gets simplier, etc...)
  39. * Execlists backend will minimum required to hook in the DRM scheduler
  40. * Legacy interface
  41. * Features like timeslicing / preemption / virtual engines would
  42. be difficult to integrate with the DRM scheduler and these
  43. features are not required for GuC submission as the GuC does
  44. these things for us
  45. * ROI low on fully integrating into DRM scheduler
  46. * Fully integrating would add lots of complexity to DRM
  47. scheduler
  48. * Port i915 priority inheritance / boosting feature in DRM scheduler
  49. * Used for i915 page flip, may be useful to other DRM drivers as
  50. well
  51. * Will be an optional feature in the DRM scheduler
  52. * Remove in-order completion assumptions from DRM scheduler
  53. * Even when using the DRM scheduler the backends will handle
  54. preemption, timeslicing, etc... so it is possible for jobs to
  55. finish out of order
  56. * Pull out i915 priority levels and use DRM priority levels
  57. * Optimize DRM scheduler as needed
  58. TODOs for GuC submission upstream
  59. =================================
  60. * Need an update to GuC firmware / i915 to enable error state capture
  61. * Open source tool to decode GuC logs
  62. * Public GuC spec
  63. New uAPI for basic GuC submission
  64. =================================
  65. No major changes are required to the uAPI for basic GuC submission. The only
  66. change is a new scheduler attribute: I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP.
  67. This attribute indicates the 2k i915 user priority levels are statically mapped
  68. into 3 levels as follows:
  69. * -1k to -1 Low priority
  70. * 0 Medium priority
  71. * 1 to 1k High priority
  72. This is needed because the GuC only has 4 priority bands. The highest priority
  73. band is reserved with the kernel. This aligns with the DRM scheduler priority
  74. levels too.
  75. Spec references:
  76. ----------------
  77. * https://www.khronos.org/registry/EGL/extensions/IMG/EGL_IMG_context_priority.txt
  78. * https://www.khronos.org/registry/vulkan/specs/1.2-extensions/html/chap5.html#devsandqueues-priority
  79. * https://spec.oneapi.com/level-zero/latest/core/api.html#ze-command-queue-priority-t
  80. New parallel submission uAPI
  81. ============================
  82. The existing bonding uAPI is completely broken with GuC submission because
  83. whether a submission is a single context submit or parallel submit isn't known
  84. until execbuf time activated via the I915_SUBMIT_FENCE. To submit multiple
  85. contexts in parallel with the GuC the context must be explicitly registered with
  86. N contexts and all N contexts must be submitted in a single command to the GuC.
  87. The GuC interfaces do not support dynamically changing between N contexts as the
  88. bonding uAPI does. Hence the need for a new parallel submission interface. Also
  89. the legacy bonding uAPI is quite confusing and not intuitive at all. Furthermore
  90. I915_SUBMIT_FENCE is by design a future fence, so not really something we should
  91. continue to support.
  92. The new parallel submission uAPI consists of 3 parts:
  93. * Export engines logical mapping
  94. * A 'set_parallel' extension to configure contexts for parallel
  95. submission
  96. * Extend execbuf2 IOCTL to support submitting N BBs in a single IOCTL
  97. Export engines logical mapping
  98. ------------------------------
  99. Certain use cases require BBs to be placed on engine instances in logical order
  100. (e.g. split-frame on gen11+). The logical mapping of engine instances can change
  101. based on fusing. Rather than making UMDs be aware of fusing, simply expose the
  102. logical mapping with the existing query engine info IOCTL. Also the GuC
  103. submission interface currently only supports submitting multiple contexts to
  104. engines in logical order which is a new requirement compared to execlists.
  105. Lastly, all current platforms have at most 2 engine instances and the logical
  106. order is the same as uAPI order. This will change on platforms with more than 2
  107. engine instances.
  108. A single bit will be added to drm_i915_engine_info.flags indicating that the
  109. logical instance has been returned and a new field,
  110. drm_i915_engine_info.logical_instance, returns the logical instance.
  111. A 'set_parallel' extension to configure contexts for parallel submission
  112. ------------------------------------------------------------------------
  113. The 'set_parallel' extension configures a slot for parallel submission of N BBs.
  114. It is a setup step that must be called before using any of the contexts. See
  115. I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE or I915_CONTEXT_ENGINES_EXT_BOND for
  116. similar existing examples. Once a slot is configured for parallel submission the
  117. execbuf2 IOCTL can be called submitting N BBs in a single IOCTL. Initially only
  118. supports GuC submission. Execlists supports can be added later if needed.
  119. Add I915_CONTEXT_ENGINES_EXT_PARALLEL_SUBMIT and
  120. drm_i915_context_engines_parallel_submit to the uAPI to implement this
  121. extension.
  122. .. kernel-doc:: include/uapi/drm/i915_drm.h
  123. :functions: i915_context_engines_parallel_submit
  124. Extend execbuf2 IOCTL to support submitting N BBs in a single IOCTL
  125. -------------------------------------------------------------------
  126. Contexts that have been configured with the 'set_parallel' extension can only
  127. submit N BBs in a single execbuf2 IOCTL. The BBs are either the last N objects
  128. in the drm_i915_gem_exec_object2 list or the first N if I915_EXEC_BATCH_FIRST is
  129. set. The number of BBs is implicit based on the slot submitted and how it has
  130. been configured by 'set_parallel' or other extensions. No uAPI changes are
  131. required to the execbuf2 IOCTL.