ti-emif.rst 1.8 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. ===============================
  3. TI EMIF SDRAM Controller Driver
  4. ===============================
  5. Author
  6. ======
  7. Aneesh V <[email protected]>
  8. Location
  9. ========
  10. driver/memory/emif.c
  11. Supported SoCs:
  12. ===============
  13. TI OMAP44xx
  14. TI OMAP54xx
  15. Menuconfig option:
  16. ==================
  17. Device Drivers
  18. Memory devices
  19. Texas Instruments EMIF driver
  20. Description
  21. ===========
  22. This driver is for the EMIF module available in Texas Instruments
  23. SoCs. EMIF is an SDRAM controller that, based on its revision,
  24. supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
  25. This driver takes care of only LPDDR2 memories presently. The
  26. functions of the driver includes re-configuring AC timing
  27. parameters and other settings during frequency, voltage and
  28. temperature changes
  29. Platform Data (see include/linux/platform_data/emif_plat.h)
  30. ===========================================================
  31. DDR device details and other board dependent and SoC dependent
  32. information can be passed through platform data (struct emif_platform_data)
  33. - DDR device details: 'struct ddr_device_info'
  34. - Device AC timings: 'struct lpddr2_timings' and 'struct lpddr2_min_tck'
  35. - Custom configurations: customizable policy options through
  36. 'struct emif_custom_configs'
  37. - IP revision
  38. - PHY type
  39. Interface to the external world
  40. ===============================
  41. EMIF driver registers notifiers for voltage and frequency changes
  42. affecting EMIF and takes appropriate actions when these are invoked.
  43. - freq_pre_notify_handling()
  44. - freq_post_notify_handling()
  45. - volt_notify_handling()
  46. Debugfs
  47. =======
  48. The driver creates two debugfs entries per device.
  49. - regcache_dump : dump of register values calculated and saved for all
  50. frequencies used so far.
  51. - mr4 : last polled value of MR4 register in the LPDDR2 device. MR4
  52. indicates the current temperature level of the device.