cx88-devel.rst 3.1 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. The cx88 driver
  3. ===============
  4. Author: Gerd Hoffmann
  5. Documentation missing at the cx88 datasheet
  6. -------------------------------------------
  7. MO_OUTPUT_FORMAT (0x310164)
  8. .. code-block:: none
  9. Previous default from DScaler: 0x1c1f0008
  10. Digit 8: 31-28
  11. 28: PREVREMOD = 1
  12. Digit 7: 27-24 (0xc = 12 = b1100 )
  13. 27: COMBALT = 1
  14. 26: PAL_INV_PHASE
  15. (DScaler apparently set this to 1, resulted in sucky picture)
  16. Digits 6,5: 23-16
  17. 25-16: COMB_RANGE = 0x1f [default] (9 bits -> max 512)
  18. Digit 4: 15-12
  19. 15: DISIFX = 0
  20. 14: INVCBF = 0
  21. 13: DISADAPT = 0
  22. 12: NARROWADAPT = 0
  23. Digit 3: 11-8
  24. 11: FORCE2H
  25. 10: FORCEREMD
  26. 9: NCHROMAEN
  27. 8: NREMODEN
  28. Digit 2: 7-4
  29. 7-6: YCORE
  30. 5-4: CCORE
  31. Digit 1: 3-0
  32. 3: RANGE = 1
  33. 2: HACTEXT
  34. 1: HSFMT
  35. 0x47 is the sync byte for MPEG-2 transport stream packets.
  36. Datasheet incorrectly states to use 47 decimal. 188 is the length.
  37. All DVB compliant frontends output packets with this start code.
  38. Hauppauge WinTV cx88 IR information
  39. -----------------------------------
  40. The controls for the mux are GPIO [0,1] for source, and GPIO 2 for muting.
  41. ====== ======== =================================================
  42. GPIO0 GPIO1
  43. ====== ======== =================================================
  44. 0 0 TV Audio
  45. 1 0 FM radio
  46. 0 1 Line-In
  47. 1 1 Mono tuner bypass or CD passthru (tuner specific)
  48. ====== ======== =================================================
  49. GPIO 16(I believe) is tied to the IR port (if present).
  50. From the data sheet:
  51. - Register 24'h20004 PCI Interrupt Status
  52. - bit [18] IR_SMP_INT Set when 32 input samples have been collected over
  53. - gpio[16] pin into GP_SAMPLE register.
  54. What's missing from the data sheet:
  55. - Setup 4KHz sampling rate (roughly 2x oversampled; good enough for our RC5
  56. compat remote)
  57. - set register 0x35C050 to 0xa80a80
  58. - enable sampling
  59. - set register 0x35C054 to 0x5
  60. - enable the IRQ bit 18 in the interrupt mask register (and
  61. provide for a handler)
  62. GP_SAMPLE register is at 0x35C058
  63. Bits are then right shifted into the GP_SAMPLE register at the specified
  64. rate; you get an interrupt when a full DWORD is received.
  65. You need to recover the actual RC5 bits out of the (oversampled) IR sensor
  66. bits. (Hint: look for the 0/1and 1/0 crossings of the RC5 bi-phase data) An
  67. actual raw RC5 code will span 2-3 DWORDS, depending on the actual alignment.
  68. I'm pretty sure when no IR signal is present the receiver is always in a
  69. marking state(1); but stray light, etc can cause intermittent noise values
  70. as well. Remember, this is a free running sample of the IR receiver state
  71. over time, so don't assume any sample starts at any particular place.
  72. Additional info
  73. ~~~~~~~~~~~~~~~
  74. This data sheet (google search) seems to have a lovely description of the
  75. RC5 basics:
  76. http://www.atmel.com/dyn/resources/prod_documents/doc2817.pdf
  77. This document has more data:
  78. http://www.nenya.be/beor/electronics/rc5.htm
  79. This document has a how to decode a bi-phase data stream:
  80. http://www.ee.washington.edu/circuit_archive/text/ir_decode.txt
  81. This document has still more info:
  82. http://www.xs4all.nl/~sbp/knowledge/ir/rc5.htm