bootloader-interface.rst 3.7 KB

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  1. ==========================================================
  2. Interface between kernel and boot loaders on Exynos boards
  3. ==========================================================
  4. Author: Krzysztof Kozlowski
  5. Date : 6 June 2015
  6. The document tries to describe currently used interface between Linux kernel
  7. and boot loaders on Samsung Exynos based boards. This is not a definition
  8. of interface but rather a description of existing state, a reference
  9. for information purpose only.
  10. In the document "boot loader" means any of following: U-boot, proprietary
  11. SBOOT or any other firmware for ARMv7 and ARMv8 initializing the board before
  12. executing kernel.
  13. 1. Non-Secure mode
  14. Address: sysram_ns_base_addr
  15. ============= ============================================ ==================
  16. Offset Value Purpose
  17. ============= ============================================ ==================
  18. 0x08 exynos_cpu_resume_ns, mcpm_entry_point System suspend
  19. 0x0c 0x00000bad (Magic cookie) System suspend
  20. 0x1c exynos4_secondary_startup Secondary CPU boot
  21. 0x1c + 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot
  22. 0x20 0xfcba0d10 (Magic cookie) AFTR
  23. 0x24 exynos_cpu_resume_ns AFTR
  24. 0x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR
  25. 0x28 0x0 or last value during resume (Exynos542x) System suspend
  26. ============= ============================================ ==================
  27. 2. Secure mode
  28. Address: sysram_base_addr
  29. ============= ============================================ ==================
  30. Offset Value Purpose
  31. ============= ============================================ ==================
  32. 0x00 exynos4_secondary_startup Secondary CPU boot
  33. 0x04 exynos4_secondary_startup (Exynos542x) Secondary CPU boot
  34. 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot
  35. 0x20 exynos_cpu_resume (Exynos4210 r1.0) AFTR
  36. 0x24 0xfcba0d10 (Magic cookie, Exynos4210 r1.0) AFTR
  37. ============= ============================================ ==================
  38. Address: pmu_base_addr
  39. ============= ============================================ ==================
  40. Offset Value Purpose
  41. ============= ============================================ ==================
  42. 0x0800 exynos_cpu_resume AFTR, suspend
  43. 0x0800 mcpm_entry_point (Exynos542x with MCPM) AFTR, suspend
  44. 0x0804 0xfcba0d10 (Magic cookie) AFTR
  45. 0x0804 0x00000bad (Magic cookie) System suspend
  46. 0x0814 exynos4_secondary_startup (Exynos4210 r1.1) Secondary CPU boot
  47. 0x0818 0xfcba0d10 (Magic cookie, Exynos4210 r1.1) AFTR
  48. 0x081C exynos_cpu_resume (Exynos4210 r1.1) AFTR
  49. ============= ============================================ ==================
  50. 3. Other (regardless of secure/non-secure mode)
  51. Address: pmu_base_addr
  52. ============= =============================== ===============================
  53. Offset Value Purpose
  54. ============= =============================== ===============================
  55. 0x0908 Non-zero Secondary CPU boot up indicator
  56. on Exynos3250 and Exynos542x
  57. ============= =============================== ===============================
  58. 4. Glossary
  59. AFTR - ARM Off Top Running, a low power mode, Cortex cores and many other
  60. modules are power gated, except the TOP modules
  61. MCPM - Multi-Cluster Power Management