/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. */ #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_CLIFFS_H #define __DT_BINDINGS_INTERCONNECT_QCOM_CLIFFS_H #define MASTER_GPU_TCU 0 #define MASTER_SYS_TCU 1 #define MASTER_APPSS_PROC 2 #define MASTER_LLCC 3 #define MASTER_QDSS_BAM 4 #define MASTER_QSPI_0 5 #define MASTER_QUP_0 6 #define MASTER_QUP_1 7 #define MASTER_A1NOC_SNOC 8 #define MASTER_A2NOC_SNOC 9 #define MASTER_APSS_NOC 10 #define MASTER_CAMNOC_HF 11 #define MASTER_CAMNOC_ICP 12 #define MASTER_CAMNOC_SF 13 #define MASTER_CNOC_SNOC 14 #define MASTER_GEM_NOC_CNOC 15 #define MASTER_GEM_NOC_PCIE_SNOC 16 #define MASTER_GFX3D 17 #define MASTER_LPASS_GEM_NOC 18 #define MASTER_LPASS_LPINOC 19 #define MASTER_LPIAON_NOC 20 #define MASTER_MDP 21 #define MASTER_MSS_PROC 22 #define MASTER_MNOC_HF_MEM_NOC 23 #define MASTER_MNOC_SF_MEM_NOC 24 #define MASTER_COMPUTE_NOC 25 #define MASTER_ANOC_PCIE_GEM_NOC 26 #define MASTER_SNOC_SF_MEM_NOC 27 #define MASTER_VIDEO 28 #define MASTER_VIDEO_CV_PROC 29 #define MASTER_VIDEO_PROC 30 #define MASTER_VIDEO_V_PROC 31 #define MASTER_CNOC_CFG 32 #define MASTER_CNOC_MNOC_HF_CFG 33 #define MASTER_PCIE_ANOC_CFG 34 #define MASTER_CNOC_MNOC_SF_CFG 35 #define MASTER_QUP_CORE_0 36 #define MASTER_QUP_CORE_1 37 #define MASTER_CRYPTO 38 #define MASTER_IPA 39 #define MASTER_LPASS_PROC 40 #define MASTER_CDSP_PROC 41 #define MASTER_WLAN_Q6 42 #define MASTER_GIC 43 #define MASTER_PCIE_0 44 #define MASTER_QDSS_ETR 45 #define MASTER_QDSS_ETR_1 46 #define MASTER_SDCC_2 47 #define MASTER_UFS_MEM 48 #define MASTER_USB3_0 49 #define SLAVE_EBI1 512 #define SLAVE_AHB2PHY_SOUTH 513 #define SLAVE_AHB2PHY_NORTH 514 #define SLAVE_AOSS 515 #define SLAVE_CAMERA_CFG 516 #define SLAVE_CLK_CTL 517 #define SLAVE_RBCPR_CX_CFG 518 #define SLAVE_RBCPR_MMCX_CFG 519 #define SLAVE_RBCPR_MXC_CFG 520 #define SLAVE_CPR_NSPCX 521 #define SLAVE_CRYPTO_0_CFG 522 #define SLAVE_CX_RDPM 523 #define SLAVE_DISPLAY_CFG 524 #define SLAVE_GFX3D_CFG 525 #define SLAVE_I3C_IBI0_CFG 526 #define SLAVE_I3C_IBI1_CFG 527 #define SLAVE_IMEM_CFG 528 #define SLAVE_IPA_CFG 529 #define SLAVE_IPC_ROUTER_CFG 530 #define SLAVE_CNOC_MSS 531 #define SLAVE_MX_2_RDPM 532 #define SLAVE_MX_RDPM 533 #define SLAVE_PCIE_0_CFG 534 #define SLAVE_PCIE_RSCC 535 #define SLAVE_PDM 536 #define SLAVE_PRNG 537 #define SLAVE_QDSS_CFG 538 #define SLAVE_QSPI_0 539 #define SLAVE_QUP_0 540 #define SLAVE_QUP_1 541 #define SLAVE_SDCC_2 542 #define SLAVE_TCSR 543 #define SLAVE_TLMM 544 #define SLAVE_TME_CFG 545 #define SLAVE_UFS_MEM_CFG 546 #define SLAVE_USB3_0 547 #define SLAVE_VENUS_CFG 548 #define SLAVE_VSENSE_CTRL_CFG 549 #define SLAVE_WLAN 550 #define SLAVE_A1NOC_SNOC 551 #define SLAVE_A2NOC_SNOC 552 #define SLAVE_GEM_NOC_CNOC 553 #define SLAVE_SNOC_GEM_NOC_SF 554 #define SLAVE_LLCC 555 #define SLAVE_LPASS_GEM_NOC 556 #define SLAVE_LPIAON_NOC_LPASS_AG_NOC 557 #define SLAVE_LPICX_NOC_LPIAON_NOC 558 #define SLAVE_MNOC_HF_MEM_NOC 559 #define SLAVE_MNOC_SF_MEM_NOC 560 #define SLAVE_CDSP_MEM_NOC 561 #define SLAVE_MEM_NOC_PCIE_SNOC 562 #define SLAVE_ANOC_PCIE_GEM_NOC 563 #define SLAVE_APPSS 564 #define SLAVE_CNOC_CFG 565 #define SLAVE_DDRSS_CFG 566 #define SLAVE_CNOC_MNOC_HF_CFG 567 #define SLAVE_CNOC_MNOC_SF_CFG 568 #define SLAVE_NSP_QTB_CFG 569 #define SLAVE_PCIE_ANOC_CFG 570 #define SLAVE_WLAN_Q6_THROTTLE_CFG 571 #define SLAVE_QUP_CORE_0 572 #define SLAVE_QUP_CORE_1 573 #define SLAVE_IMEM 574 #define SLAVE_SERVICE_CNOC_CFG 575 #define SLAVE_SERVICE_CNOC 576 #define SLAVE_SERVICE_MNOC_HF 577 #define SLAVE_SERVICE_MNOC_SF 578 #define SLAVE_SERVICE_PCIE_ANOC 579 #define SLAVE_PCIE_0 580 #define SLAVE_QDSS_STM 581 #define SLAVE_TCU 582 #define MASTER_LLCC_DISP 1000 #define MASTER_MDP_DISP 1001 #define MASTER_MNOC_HF_MEM_NOC_DISP 1002 #define MASTER_ANOC_PCIE_GEM_NOC_DISP 1003 #define SLAVE_EBI1_DISP 1512 #define SLAVE_LLCC_DISP 1513 #define SLAVE_MNOC_HF_MEM_NOC_DISP 1514 #define MASTER_LLCC_CAM_IFE_0 2000 #define MASTER_CAMNOC_HF_CAM_IFE_0 2001 #define MASTER_CAMNOC_ICP_CAM_IFE_0 2002 #define MASTER_CAMNOC_SF_CAM_IFE_0 2003 #define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_0 2004 #define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_0 2005 #define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_0 2006 #define SLAVE_EBI1_CAM_IFE_0 2512 #define SLAVE_LLCC_CAM_IFE_0 2513 #define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_0 2514 #define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_0 2515 #define MASTER_LLCC_CAM_IFE_1 3000 #define MASTER_CAMNOC_HF_CAM_IFE_1 3001 #define MASTER_CAMNOC_ICP_CAM_IFE_1 3002 #define MASTER_CAMNOC_SF_CAM_IFE_1 3003 #define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_1 3004 #define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_1 3005 #define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_1 3006 #define SLAVE_EBI1_CAM_IFE_1 3512 #define SLAVE_LLCC_CAM_IFE_1 3513 #define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_1 3514 #define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_1 3515 #define MASTER_LLCC_CAM_IFE_2 4000 #define MASTER_CAMNOC_HF_CAM_IFE_2 4001 #define MASTER_CAMNOC_ICP_CAM_IFE_2 4002 #define MASTER_CAMNOC_SF_CAM_IFE_2 4003 #define MASTER_MNOC_HF_MEM_NOC_CAM_IFE_2 4004 #define MASTER_MNOC_SF_MEM_NOC_CAM_IFE_2 4005 #define MASTER_ANOC_PCIE_GEM_NOC_CAM_IFE_2 4006 #define SLAVE_EBI1_CAM_IFE_2 4512 #define SLAVE_LLCC_CAM_IFE_2 4513 #define SLAVE_MNOC_HF_MEM_NOC_CAM_IFE_2 4514 #define SLAVE_MNOC_SF_MEM_NOC_CAM_IFE_2 4515 #define MASTER_IPA_CORE_PCIE_CRM_HW_0 5000 #define MASTER_LLCC_PCIE_CRM_HW_0 5001 #define MASTER_ANOC_PCIE_GEM_NOC_PCIE_CRM_HW_0 5002 #define MASTER_PCIE_0_PCIE_CRM_HW_0 5003 #define SLAVE_EBI1_PCIE_CRM_HW_0 5512 #define SLAVE_IPA_CORE_PCIE_CRM_HW_0 5513 #define SLAVE_LLCC_PCIE_CRM_HW_0 5514 #define SLAVE_ANOC_PCIE_GEM_NOC_PCIE_CRM_HW_0 5515 #endif