main.c 135 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <linux/version.h>
  46. #include <trace/hooks/remoteproc.h>
  47. #ifdef CONFIG_SLATE_MODULE_ENABLED
  48. #include <linux/soc/qcom/slatecom_interface.h>
  49. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  50. #include <uapi/linux/slatecom_interface.h>
  51. #endif
  52. #include "main.h"
  53. #include "qmi.h"
  54. #include "debug.h"
  55. #include "power.h"
  56. #include "genl.h"
  57. #define MAX_PROP_SIZE 32
  58. #define NUM_LOG_PAGES 10
  59. #define NUM_LOG_LONG_PAGES 4
  60. #define ICNSS_MAGIC 0x5abc5abc
  61. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  62. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  63. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  64. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  65. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  66. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  67. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  68. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  69. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  70. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  71. #define ICNSS_MAX_PROBE_CNT 2
  72. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  73. #define PROBE_TIMEOUT 15000
  74. #define SMP2P_SOC_WAKE_TIMEOUT 500
  75. #ifdef CONFIG_ICNSS2_DEBUG
  76. static unsigned long qmi_timeout = 3000;
  77. module_param(qmi_timeout, ulong, 0600);
  78. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  79. #else
  80. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  81. #endif
  82. #define ICNSS_RECOVERY_TIMEOUT 60000
  83. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  84. #define ICNSS_CAL_TIMEOUT 40000
  85. static struct icnss_priv *penv;
  86. static struct work_struct wpss_loader;
  87. static struct work_struct wpss_ssr_work;
  88. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  89. #define ICNSS_EVENT_PENDING 2989
  90. #define ICNSS_EVENT_SYNC BIT(0)
  91. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  92. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  93. ICNSS_EVENT_SYNC)
  94. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  95. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  96. #define SMP2P_GET_MAX_RETRY 4
  97. #define SMP2P_GET_RETRY_DELAY_MS 500
  98. #define RAMDUMP_NUM_DEVICES 256
  99. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  100. #define WLAN_EN_TEMP_THRESHOLD 5000
  101. #define WLAN_EN_DELAY 500
  102. static DEFINE_IDA(rd_minor_id);
  103. enum icnss_pdr_cause_index {
  104. ICNSS_FW_CRASH,
  105. ICNSS_ROOT_PD_CRASH,
  106. ICNSS_ROOT_PD_SHUTDOWN,
  107. ICNSS_HOST_ERROR,
  108. };
  109. static const char * const icnss_pdr_cause[] = {
  110. [ICNSS_FW_CRASH] = "FW crash",
  111. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  112. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  113. [ICNSS_HOST_ERROR] = "Host error",
  114. };
  115. static void icnss_set_plat_priv(struct icnss_priv *priv)
  116. {
  117. penv = priv;
  118. }
  119. static struct icnss_priv *icnss_get_plat_priv(void)
  120. {
  121. return penv;
  122. }
  123. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  124. {
  125. if (priv && priv->rproc) {
  126. rproc_shutdown(priv->rproc);
  127. rproc_put(priv->rproc);
  128. priv->rproc = NULL;
  129. }
  130. }
  131. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  132. struct kobj_attribute *attr,
  133. const char *buf, size_t count)
  134. {
  135. struct icnss_priv *priv = icnss_get_plat_priv();
  136. if (!priv)
  137. return count;
  138. icnss_pr_dbg("Received shutdown indication");
  139. atomic_set(&priv->is_shutdown, true);
  140. if ((priv->wpss_supported || priv->rproc_fw_download) &&
  141. priv->device_id == ADRASTEA_DEVICE_ID)
  142. icnss_wpss_unload(priv);
  143. return count;
  144. }
  145. static struct kobj_attribute icnss_sysfs_attribute =
  146. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  147. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  148. {
  149. if (atomic_inc_return(&priv->pm_count) != 1)
  150. return;
  151. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  152. atomic_read(&priv->pm_count));
  153. pm_stay_awake(&priv->pdev->dev);
  154. priv->stats.pm_stay_awake++;
  155. }
  156. static void icnss_pm_relax(struct icnss_priv *priv)
  157. {
  158. int r = atomic_dec_return(&priv->pm_count);
  159. WARN_ON(r < 0);
  160. if (r != 0)
  161. return;
  162. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  163. atomic_read(&priv->pm_count));
  164. pm_relax(&priv->pdev->dev);
  165. priv->stats.pm_relax++;
  166. }
  167. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  168. {
  169. switch (type) {
  170. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  171. return "SERVER_ARRIVE";
  172. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  173. return "SERVER_EXIT";
  174. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  175. return "FW_READY";
  176. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  177. return "REGISTER_DRIVER";
  178. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  179. return "UNREGISTER_DRIVER";
  180. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  181. return "PD_SERVICE_DOWN";
  182. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  183. return "FW_EARLY_CRASH_IND";
  184. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  185. return "IDLE_SHUTDOWN";
  186. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  187. return "IDLE_RESTART";
  188. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  189. return "FW_INIT_DONE";
  190. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  191. return "QDSS_TRACE_REQ_MEM";
  192. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  193. return "QDSS_TRACE_SAVE";
  194. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  195. return "QDSS_TRACE_FREE";
  196. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  197. return "M3_DUMP_UPLOAD";
  198. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  199. return "IMS_WFC_CALL_IND";
  200. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  201. return "WLFW_TWC_CFG_IND";
  202. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  203. return "QDSS_TRACE_REQ_DATA";
  204. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  205. return "SUBSYS_RESTART_LEVEL";
  206. case ICNSS_DRIVER_EVENT_MAX:
  207. return "EVENT_MAX";
  208. }
  209. return "UNKNOWN";
  210. };
  211. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  212. {
  213. switch (type) {
  214. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  215. return "SOC_WAKE_REQUEST";
  216. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  217. return "SOC_WAKE_RELEASE";
  218. case ICNSS_SOC_WAKE_EVENT_MAX:
  219. return "SOC_EVENT_MAX";
  220. }
  221. return "UNKNOWN";
  222. };
  223. int icnss_driver_event_post(struct icnss_priv *priv,
  224. enum icnss_driver_event_type type,
  225. u32 flags, void *data)
  226. {
  227. struct icnss_driver_event *event;
  228. unsigned long irq_flags;
  229. int gfp = GFP_KERNEL;
  230. int ret = 0;
  231. if (!priv)
  232. return -ENODEV;
  233. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  234. icnss_driver_event_to_str(type), type, current->comm,
  235. flags, priv->state);
  236. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  237. icnss_pr_err("Invalid Event type: %d, can't post", type);
  238. return -EINVAL;
  239. }
  240. if (in_interrupt() || !preemptible() || rcu_preempt_depth())
  241. gfp = GFP_ATOMIC;
  242. event = kzalloc(sizeof(*event), gfp);
  243. if (event == NULL)
  244. return -ENOMEM;
  245. icnss_pm_stay_awake(priv);
  246. event->type = type;
  247. event->data = data;
  248. init_completion(&event->complete);
  249. event->ret = ICNSS_EVENT_PENDING;
  250. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  251. spin_lock_irqsave(&priv->event_lock, irq_flags);
  252. list_add_tail(&event->list, &priv->event_list);
  253. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  254. priv->stats.events[type].posted++;
  255. queue_work(priv->event_wq, &priv->event_work);
  256. if (!(flags & ICNSS_EVENT_SYNC))
  257. goto out;
  258. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  259. wait_for_completion(&event->complete);
  260. else
  261. ret = wait_for_completion_interruptible(&event->complete);
  262. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  263. icnss_driver_event_to_str(type), type, priv->state, ret,
  264. event->ret);
  265. spin_lock_irqsave(&priv->event_lock, irq_flags);
  266. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  267. event->sync = false;
  268. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  269. ret = -EINTR;
  270. goto out;
  271. }
  272. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  273. ret = event->ret;
  274. kfree(event);
  275. out:
  276. icnss_pm_relax(priv);
  277. return ret;
  278. }
  279. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  280. enum icnss_soc_wake_event_type type,
  281. u32 flags, void *data)
  282. {
  283. struct icnss_soc_wake_event *event;
  284. unsigned long irq_flags;
  285. int gfp = GFP_KERNEL;
  286. int ret = 0;
  287. if (!priv)
  288. return -ENODEV;
  289. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  290. icnss_soc_wake_event_to_str(type),
  291. type, current->comm, flags, priv->state);
  292. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  293. icnss_pr_err("Invalid Event type: %d, can't post", type);
  294. return -EINVAL;
  295. }
  296. if (in_interrupt() || irqs_disabled())
  297. gfp = GFP_ATOMIC;
  298. event = kzalloc(sizeof(*event), gfp);
  299. if (!event)
  300. return -ENOMEM;
  301. icnss_pm_stay_awake(priv);
  302. event->type = type;
  303. event->data = data;
  304. init_completion(&event->complete);
  305. event->ret = ICNSS_EVENT_PENDING;
  306. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  307. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  308. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  309. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  310. priv->stats.soc_wake_events[type].posted++;
  311. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  312. if (!(flags & ICNSS_EVENT_SYNC))
  313. goto out;
  314. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  315. wait_for_completion(&event->complete);
  316. else
  317. ret = wait_for_completion_interruptible(&event->complete);
  318. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  319. icnss_soc_wake_event_to_str(type),
  320. type, priv->state, ret, event->ret);
  321. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  322. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  323. event->sync = false;
  324. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  325. ret = -EINTR;
  326. goto out;
  327. }
  328. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  329. ret = event->ret;
  330. kfree(event);
  331. out:
  332. icnss_pm_relax(priv);
  333. return ret;
  334. }
  335. bool icnss_is_fw_ready(void)
  336. {
  337. if (!penv)
  338. return false;
  339. else
  340. return test_bit(ICNSS_FW_READY, &penv->state);
  341. }
  342. EXPORT_SYMBOL(icnss_is_fw_ready);
  343. #if IS_ENABLED(CONFIG_INTERCONNECT)
  344. /**
  345. * icnss_register_bus_scale() - Setup interconnect voting data
  346. * @plat_priv: Platform data structure
  347. *
  348. * For different interconnect path configured in device tree setup voting data
  349. * for list of bandwidth requirements.
  350. *
  351. * Result: 0 for success. -EINVAL if not configured
  352. */
  353. static int icnss_register_bus_scale(struct icnss_priv *plat_priv)
  354. {
  355. int ret = -EINVAL;
  356. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  357. struct icnss_bus_bw_info *bus_bw_info, *tmp;
  358. struct device *dev = &plat_priv->pdev->dev;
  359. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  360. ret = of_property_read_u32(dev->of_node,
  361. "qcom,icc-path-count",
  362. &plat_priv->icc.path_count);
  363. if (ret) {
  364. icnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  365. return 0;
  366. }
  367. ret = of_property_read_u32(plat_priv->pdev->dev.of_node,
  368. "qcom,bus-bw-cfg-count",
  369. &plat_priv->icc.bus_bw_cfg_count);
  370. if (ret) {
  371. icnss_pr_err("Failed to get Bus BW Config table size\n");
  372. goto cleanup;
  373. }
  374. cfg_arr_size = plat_priv->icc.path_count *
  375. plat_priv->icc.bus_bw_cfg_count * ICNSS_ICC_VOTE_MAX;
  376. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  377. if (!cfg_arr) {
  378. icnss_pr_err("Failed to alloc cfg table mem\n");
  379. ret = -ENOMEM;
  380. goto cleanup;
  381. }
  382. ret = of_property_read_u32_array(plat_priv->pdev->dev.of_node,
  383. "qcom,bus-bw-cfg", cfg_arr,
  384. cfg_arr_size);
  385. if (ret) {
  386. icnss_pr_err("Invalid Bus BW Config Table\n");
  387. goto cleanup;
  388. }
  389. icnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  390. plat_priv->icc.path_count,
  391. plat_priv->icc.bus_bw_cfg_count);
  392. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  393. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  394. GFP_KERNEL);
  395. if (!bus_bw_info) {
  396. ret = -ENOMEM;
  397. goto out;
  398. }
  399. ret = of_property_read_string_index(dev->of_node,
  400. "interconnect-names", idx,
  401. &bus_bw_info->icc_name);
  402. if (ret)
  403. goto out;
  404. bus_bw_info->icc_path =
  405. of_icc_get(&plat_priv->pdev->dev,
  406. bus_bw_info->icc_name);
  407. if (IS_ERR(bus_bw_info->icc_path)) {
  408. ret = PTR_ERR(bus_bw_info->icc_path);
  409. if (ret != -EPROBE_DEFER) {
  410. icnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  411. bus_bw_info->icc_name, ret);
  412. goto out;
  413. }
  414. }
  415. bus_bw_info->cfg_table =
  416. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  417. sizeof(*bus_bw_info->cfg_table),
  418. GFP_KERNEL);
  419. if (!bus_bw_info->cfg_table) {
  420. ret = -ENOMEM;
  421. goto out;
  422. }
  423. icnss_pr_dbg("ICC Vote CFG for path: %s\n",
  424. bus_bw_info->icc_name);
  425. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  426. ICNSS_ICC_VOTE_MAX);
  427. i < plat_priv->icc.bus_bw_cfg_count;
  428. i++, j += 2) {
  429. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  430. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  431. icnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  432. i, bus_bw_info->cfg_table[i].avg_bw,
  433. bus_bw_info->cfg_table[i].peak_bw);
  434. }
  435. list_add_tail(&bus_bw_info->list,
  436. &plat_priv->icc.list_head);
  437. }
  438. kfree(cfg_arr);
  439. return 0;
  440. out:
  441. list_for_each_entry_safe(bus_bw_info, tmp,
  442. &plat_priv->icc.list_head, list) {
  443. list_del(&bus_bw_info->list);
  444. }
  445. cleanup:
  446. kfree(cfg_arr);
  447. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  448. return ret;
  449. }
  450. static void icnss_unregister_bus_scale(struct icnss_priv *plat_priv)
  451. {
  452. struct icnss_bus_bw_info *bus_bw_info, *tmp;
  453. list_for_each_entry_safe(bus_bw_info, tmp,
  454. &plat_priv->icc.list_head, list) {
  455. list_del(&bus_bw_info->list);
  456. if (bus_bw_info->icc_path)
  457. icc_put(bus_bw_info->icc_path);
  458. }
  459. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  460. }
  461. /**
  462. * icnss_setup_bus_bandwidth() - Setup interconnect vote for given bandwidth
  463. * @plat_priv: Platform private data struct
  464. * @bw: bandwidth
  465. * @save: toggle flag to save bandwidth to current_bw_vote
  466. *
  467. * Setup bandwidth votes for configured interconnect paths
  468. *
  469. * Return: 0 for success
  470. */
  471. static int icnss_setup_bus_bandwidth(struct icnss_priv *plat_priv,
  472. u32 bw, bool save)
  473. {
  474. int ret = 0;
  475. struct icnss_bus_bw_info *bus_bw_info;
  476. if (!plat_priv->icc.path_count)
  477. return -EOPNOTSUPP;
  478. if (bw >= plat_priv->icc.bus_bw_cfg_count) {
  479. icnss_pr_err("Invalid bus bandwidth Type: %d", bw);
  480. return -EINVAL;
  481. }
  482. list_for_each_entry(bus_bw_info, &plat_priv->icc.list_head, list) {
  483. ret = icc_set_bw(bus_bw_info->icc_path,
  484. bus_bw_info->cfg_table[bw].avg_bw,
  485. bus_bw_info->cfg_table[bw].peak_bw);
  486. if (ret) {
  487. icnss_pr_err("Could not set BW Cfg: %d, err = %d ICC Path: %s Val: %d %d\n",
  488. bw, ret, bus_bw_info->icc_name,
  489. bus_bw_info->cfg_table[bw].avg_bw,
  490. bus_bw_info->cfg_table[bw].peak_bw);
  491. break;
  492. }
  493. }
  494. if (ret == 0 && save)
  495. plat_priv->icc.current_bw_vote = bw;
  496. return ret;
  497. }
  498. int icnss_request_bus_bandwidth(struct device *dev, int bandwidth)
  499. {
  500. struct icnss_priv *plat_priv = dev_get_drvdata(dev);
  501. if (!plat_priv)
  502. return -ENODEV;
  503. if (bandwidth < 0)
  504. return -EINVAL;
  505. return icnss_setup_bus_bandwidth(plat_priv, (u32)bandwidth, true);
  506. }
  507. #else
  508. static int icnss_register_bus_scale(struct icnss_priv *plat_priv)
  509. {
  510. return 0;
  511. }
  512. static void icnss_unregister_bus_scale(struct icnss_priv *plat_priv) {}
  513. static int icnss_setup_bus_bandwidth(struct icnss_priv *plat_priv,
  514. u32 bw, bool save)
  515. {
  516. return 0;
  517. }
  518. int icnss_request_bus_bandwidth(struct device *dev, int bandwidth)
  519. {
  520. return 0;
  521. }
  522. #endif /* CONFIG_INTERCONNECT */
  523. EXPORT_SYMBOL(icnss_request_bus_bandwidth);
  524. void icnss_block_shutdown(bool status)
  525. {
  526. if (!penv)
  527. return;
  528. if (status) {
  529. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  530. reinit_completion(&penv->unblock_shutdown);
  531. } else {
  532. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  533. complete(&penv->unblock_shutdown);
  534. }
  535. }
  536. EXPORT_SYMBOL(icnss_block_shutdown);
  537. bool icnss_is_fw_down(void)
  538. {
  539. struct icnss_priv *priv = icnss_get_plat_priv();
  540. if (!priv)
  541. return false;
  542. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  543. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  544. test_bit(ICNSS_REJUVENATE, &priv->state);
  545. }
  546. EXPORT_SYMBOL(icnss_is_fw_down);
  547. unsigned long icnss_get_device_config(void)
  548. {
  549. struct icnss_priv *priv = icnss_get_plat_priv();
  550. if (!priv)
  551. return 0;
  552. return priv->device_config;
  553. }
  554. EXPORT_SYMBOL(icnss_get_device_config);
  555. bool icnss_is_rejuvenate(void)
  556. {
  557. if (!penv)
  558. return false;
  559. else
  560. return test_bit(ICNSS_REJUVENATE, &penv->state);
  561. }
  562. EXPORT_SYMBOL(icnss_is_rejuvenate);
  563. bool icnss_is_pdr(void)
  564. {
  565. if (!penv)
  566. return false;
  567. else
  568. return test_bit(ICNSS_PDR, &penv->state);
  569. }
  570. EXPORT_SYMBOL(icnss_is_pdr);
  571. static bool icnss_is_smp2p_valid(struct icnss_priv *priv,
  572. enum smp2p_out_entry smp2p_entry)
  573. {
  574. if (priv->device_id == WCN6750_DEVICE_ID ||
  575. priv->device_id == WCN6450_DEVICE_ID ||
  576. priv->wpss_supported)
  577. return IS_ERR_OR_NULL(priv->smp2p_info[smp2p_entry].smem_state);
  578. else
  579. return 0;
  580. }
  581. static int icnss_send_smp2p(struct icnss_priv *priv,
  582. enum icnss_smp2p_msg_id msg_id,
  583. enum smp2p_out_entry smp2p_entry)
  584. {
  585. unsigned int value = 0;
  586. int ret;
  587. if (!priv || icnss_is_smp2p_valid(priv, smp2p_entry))
  588. return -EINVAL;
  589. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  590. if (msg_id == ICNSS_RESET_MSG) {
  591. priv->smp2p_info[smp2p_entry].seq = 0;
  592. ret = qcom_smem_state_update_bits(
  593. priv->smp2p_info[smp2p_entry].smem_state,
  594. ICNSS_SMEM_VALUE_MASK,
  595. 0);
  596. if (ret)
  597. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  598. ret, icnss_smp2p_str[smp2p_entry]);
  599. return ret;
  600. }
  601. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  602. !test_bit(ICNSS_FW_READY, &priv->state)) {
  603. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  604. priv->state);
  605. return -EINVAL;
  606. }
  607. value |= priv->smp2p_info[smp2p_entry].seq++;
  608. value <<= ICNSS_SMEM_SEQ_NO_POS;
  609. value |= msg_id;
  610. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  611. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  612. reinit_completion(&penv->smp2p_soc_wake_wait);
  613. ret = qcom_smem_state_update_bits(
  614. priv->smp2p_info[smp2p_entry].smem_state,
  615. ICNSS_SMEM_VALUE_MASK,
  616. value);
  617. if (ret) {
  618. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  619. icnss_smp2p_str[smp2p_entry]);
  620. } else {
  621. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  622. msg_id == ICNSS_SOC_WAKE_REL) {
  623. if (!wait_for_completion_timeout(
  624. &priv->smp2p_soc_wake_wait,
  625. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  626. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  627. icnss_smp2p_str[smp2p_entry]);
  628. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  629. ICNSS_ASSERT(0);
  630. }
  631. }
  632. }
  633. return ret;
  634. }
  635. bool icnss_is_low_power(void)
  636. {
  637. if (!penv)
  638. return false;
  639. else
  640. return test_bit(ICNSS_LOW_POWER, &penv->state);
  641. }
  642. EXPORT_SYMBOL(icnss_is_low_power);
  643. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  644. {
  645. struct icnss_priv *priv = ctx;
  646. if (priv)
  647. priv->force_err_fatal = true;
  648. icnss_pr_err("Received force error fatal request from FW\n");
  649. return IRQ_HANDLED;
  650. }
  651. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  652. {
  653. struct icnss_priv *priv = ctx;
  654. struct icnss_uevent_fw_down_data fw_down_data = {0};
  655. icnss_pr_err("Received early crash indication from FW\n");
  656. if (priv) {
  657. if (priv->wpss_self_recovery_enabled)
  658. mod_timer(&priv->wpss_ssr_timer,
  659. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  660. set_bit(ICNSS_FW_DOWN, &priv->state);
  661. icnss_ignore_fw_timeout(true);
  662. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  663. clear_bit(ICNSS_FW_READY, &priv->state);
  664. fw_down_data.crashed = true;
  665. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  666. &fw_down_data);
  667. }
  668. }
  669. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  670. 0, NULL);
  671. return IRQ_HANDLED;
  672. }
  673. static void register_fw_error_notifications(struct device *dev)
  674. {
  675. struct icnss_priv *priv = dev_get_drvdata(dev);
  676. struct device_node *dev_node;
  677. int irq = 0, ret = 0;
  678. if (!priv)
  679. return;
  680. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  681. if (!dev_node) {
  682. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  683. return;
  684. }
  685. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  686. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  687. ret = irq = of_irq_get_byname(dev_node,
  688. "qcom,smp2p-force-fatal-error");
  689. if (ret < 0) {
  690. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  691. irq);
  692. return;
  693. }
  694. }
  695. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  696. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  697. "wlanfw-err", priv);
  698. if (ret < 0) {
  699. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  700. irq, ret);
  701. return;
  702. }
  703. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  704. priv->fw_error_fatal_irq = irq;
  705. }
  706. static void register_early_crash_notifications(struct device *dev)
  707. {
  708. struct icnss_priv *priv = dev_get_drvdata(dev);
  709. struct device_node *dev_node;
  710. int irq = 0, ret = 0;
  711. if (!priv)
  712. return;
  713. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  714. if (!dev_node) {
  715. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  716. return;
  717. }
  718. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  719. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  720. ret = irq = of_irq_get_byname(dev_node,
  721. "qcom,smp2p-early-crash-ind");
  722. if (ret < 0) {
  723. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  724. irq);
  725. return;
  726. }
  727. }
  728. ret = devm_request_threaded_irq(dev, irq, NULL,
  729. fw_crash_indication_handler,
  730. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  731. "wlanfw-early-crash-ind", priv);
  732. if (ret < 0) {
  733. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  734. irq, ret);
  735. return;
  736. }
  737. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  738. priv->fw_early_crash_irq = irq;
  739. }
  740. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  741. {
  742. struct thermal_zone_device *thermal_dev;
  743. const char *tsens;
  744. int ret;
  745. ret = of_property_read_string(priv->pdev->dev.of_node,
  746. "tsens",
  747. &tsens);
  748. if (ret)
  749. return ret;
  750. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  751. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  752. if (IS_ERR_OR_NULL(thermal_dev)) {
  753. icnss_pr_err("Fail to get thermal zone. ret: %d",
  754. PTR_ERR(thermal_dev));
  755. return PTR_ERR(thermal_dev);
  756. }
  757. ret = thermal_zone_get_temp(thermal_dev, temp);
  758. if (ret)
  759. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  760. return ret;
  761. }
  762. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  763. {
  764. struct icnss_priv *priv = ctx;
  765. if (priv)
  766. complete(&priv->smp2p_soc_wake_wait);
  767. return IRQ_HANDLED;
  768. }
  769. static void register_soc_wake_notif(struct device *dev)
  770. {
  771. struct icnss_priv *priv = dev_get_drvdata(dev);
  772. struct device_node *dev_node;
  773. int irq = 0, ret = 0;
  774. if (!priv)
  775. return;
  776. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  777. if (!dev_node) {
  778. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  779. return;
  780. }
  781. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  782. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  783. ret = irq = of_irq_get_byname(dev_node,
  784. "qcom,smp2p-soc-wake-ack");
  785. if (ret < 0) {
  786. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  787. irq);
  788. return;
  789. }
  790. }
  791. ret = devm_request_threaded_irq(dev, irq, NULL,
  792. fw_soc_wake_ack_handler,
  793. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  794. IRQF_TRIGGER_FALLING,
  795. "wlanfw-soc-wake-ack", priv);
  796. if (ret < 0) {
  797. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  798. irq, ret);
  799. return;
  800. }
  801. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  802. priv->fw_soc_wake_ack_irq = irq;
  803. }
  804. int icnss_call_driver_uevent(struct icnss_priv *priv,
  805. enum icnss_uevent uevent, void *data)
  806. {
  807. struct icnss_uevent_data uevent_data;
  808. if (!priv->ops || !priv->ops->uevent)
  809. return 0;
  810. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  811. priv->state, uevent);
  812. uevent_data.uevent = uevent;
  813. uevent_data.data = data;
  814. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  815. }
  816. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  817. {
  818. int i;
  819. int ret = 0;
  820. ret = icnss_qmi_get_dms_mac(priv);
  821. if (ret == 0 && priv->dms.mac_valid)
  822. goto qmi_send;
  823. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  824. * Thus assert on failure to get MAC from DMS even after retries
  825. */
  826. if (priv->use_nv_mac) {
  827. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  828. if (priv->dms.mac_valid)
  829. break;
  830. ret = icnss_qmi_get_dms_mac(priv);
  831. if (ret != -EAGAIN)
  832. break;
  833. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  834. }
  835. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  836. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  837. ICNSS_ASSERT(0);
  838. return -EINVAL;
  839. }
  840. }
  841. qmi_send:
  842. if (priv->dms.mac_valid)
  843. ret =
  844. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  845. ARRAY_SIZE(priv->dms.mac));
  846. return ret;
  847. }
  848. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  849. enum smp2p_out_entry smp2p_entry)
  850. {
  851. int retry = 0;
  852. int error;
  853. if (priv->smp2p_info[smp2p_entry].smem_state)
  854. return;
  855. retry:
  856. priv->smp2p_info[smp2p_entry].smem_state =
  857. qcom_smem_state_get(&priv->pdev->dev,
  858. icnss_smp2p_str[smp2p_entry],
  859. &priv->smp2p_info[smp2p_entry].smem_bit);
  860. if (icnss_is_smp2p_valid(priv, smp2p_entry)) {
  861. if (retry++ < SMP2P_GET_MAX_RETRY) {
  862. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  863. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  864. error, icnss_smp2p_str[smp2p_entry]);
  865. msleep(SMP2P_GET_RETRY_DELAY_MS);
  866. goto retry;
  867. }
  868. ICNSS_ASSERT(0);
  869. return;
  870. }
  871. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  872. }
  873. static inline
  874. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  875. {
  876. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  877. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  878. } else {
  879. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  880. }
  881. }
  882. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  883. {
  884. switch (val) {
  885. case WLAN_RF_SLATE:
  886. return WLFW_WLAN_RF_SLATE_V01;
  887. case WLAN_RF_APACHE:
  888. return WLFW_WLAN_RF_APACHE_V01;
  889. default:
  890. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  891. }
  892. }
  893. #ifdef CONFIG_SLATE_MODULE_ENABLED
  894. static void icnss_send_wlan_boot_init(void)
  895. {
  896. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  897. icnss_pr_info("sent wlan boot init command\n");
  898. }
  899. static void icnss_send_wlan_boot_complete(void)
  900. {
  901. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  902. icnss_pr_info("sent wlan boot complete command\n");
  903. }
  904. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  905. {
  906. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  907. reinit_completion(&priv->slate_boot_complete);
  908. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  909. priv->state);
  910. wait_for_completion(&priv->slate_boot_complete);
  911. }
  912. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  913. return -EINVAL;
  914. icnss_send_wlan_boot_init();
  915. return 0;
  916. }
  917. #else
  918. static void icnss_send_wlan_boot_complete(void)
  919. {
  920. }
  921. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  922. {
  923. return 0;
  924. }
  925. #endif
  926. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  927. void *data)
  928. {
  929. int ret = 0;
  930. int temp = 0;
  931. bool ignore_assert = false;
  932. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  933. if (!priv)
  934. return -ENODEV;
  935. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  936. clear_bit(ICNSS_FW_DOWN, &priv->state);
  937. clear_bit(ICNSS_FW_READY, &priv->state);
  938. if (priv->is_slate_rfa) {
  939. ret = icnss_wait_for_slate_complete(priv);
  940. if (ret == -EINVAL) {
  941. icnss_pr_err("Slate complete failed\n");
  942. return ret;
  943. }
  944. }
  945. icnss_ignore_fw_timeout(false);
  946. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  947. icnss_pr_err("QMI Server already in Connected State\n");
  948. ICNSS_ASSERT(0);
  949. }
  950. ret = icnss_connect_to_fw_server(priv, data);
  951. if (ret)
  952. goto fail;
  953. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  954. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  955. ret = icnss_hw_power_on(priv);
  956. if (ret)
  957. goto fail;
  958. }
  959. ret = wlfw_ind_register_send_sync_msg(priv);
  960. if (ret < 0) {
  961. if (ret == -EALREADY) {
  962. ret = 0;
  963. goto qmi_registered;
  964. }
  965. ignore_assert = true;
  966. goto fail;
  967. }
  968. if (priv->is_rf_subtype_valid) {
  969. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  970. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  971. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  972. if (ret < 0)
  973. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  974. ret);
  975. } else {
  976. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  977. priv->rf_subtype);
  978. }
  979. }
  980. if (priv->device_id == WCN6750_DEVICE_ID ||
  981. priv->device_id == WCN6450_DEVICE_ID) {
  982. if (!icnss_get_temperature(priv, &temp)) {
  983. icnss_pr_dbg("Temperature: %d\n", temp);
  984. if (temp < WLAN_EN_TEMP_THRESHOLD)
  985. icnss_set_wlan_en_delay(priv);
  986. }
  987. ret = wlfw_host_cap_send_sync(priv);
  988. if (ret < 0)
  989. goto fail;
  990. }
  991. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  992. if (!priv->msa_va) {
  993. icnss_pr_err("Invalid MSA address\n");
  994. ret = -EINVAL;
  995. goto fail;
  996. }
  997. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  998. if (ret < 0) {
  999. ignore_assert = true;
  1000. goto fail;
  1001. }
  1002. ret = wlfw_msa_ready_send_sync_msg(priv);
  1003. if (ret < 0) {
  1004. ignore_assert = true;
  1005. goto fail;
  1006. }
  1007. }
  1008. if (priv->device_id == WCN6450_DEVICE_ID)
  1009. icnss_hw_power_off(priv);
  1010. ret = wlfw_cap_send_sync_msg(priv);
  1011. if (ret < 0) {
  1012. ignore_assert = true;
  1013. goto fail;
  1014. }
  1015. if (priv->device_id == ADRASTEA_DEVICE_ID && priv->is_chain1_supported) {
  1016. ret = icnss_power_on_chain1_reg(priv);
  1017. if (ret) {
  1018. ignore_assert = true;
  1019. goto fail;
  1020. }
  1021. }
  1022. if (priv->device_id == WCN6750_DEVICE_ID ||
  1023. priv->device_id == WCN6450_DEVICE_ID) {
  1024. ret = icnss_hw_power_on(priv);
  1025. if (ret)
  1026. goto fail;
  1027. ret = wlfw_device_info_send_msg(priv);
  1028. if (ret < 0) {
  1029. ignore_assert = true;
  1030. goto device_info_failure;
  1031. }
  1032. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  1033. priv->mem_base_pa,
  1034. priv->mem_base_size);
  1035. if (!priv->mem_base_va) {
  1036. icnss_pr_err("Ioremap failed for bar address\n");
  1037. goto device_info_failure;
  1038. }
  1039. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  1040. &priv->mem_base_pa,
  1041. priv->mem_base_va);
  1042. if (priv->mhi_state_info_pa)
  1043. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  1044. priv->mhi_state_info_pa,
  1045. PAGE_SIZE);
  1046. if (!priv->mhi_state_info_va)
  1047. icnss_pr_err("Ioremap failed for MHI info address\n");
  1048. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  1049. &priv->mhi_state_info_pa,
  1050. priv->mhi_state_info_va);
  1051. }
  1052. if (priv->bdf_download_support) {
  1053. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  1054. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  1055. priv->ctrl_params.bdf_type);
  1056. if (ret < 0)
  1057. goto device_info_failure;
  1058. }
  1059. if (priv->device_id == WCN6450_DEVICE_ID) {
  1060. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1061. if (ret < 0)
  1062. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  1063. ret);
  1064. }
  1065. if (priv->device_id == WCN6750_DEVICE_ID ||
  1066. priv->device_id == WCN6450_DEVICE_ID) {
  1067. if (!priv->fw_soc_wake_ack_irq)
  1068. register_soc_wake_notif(&priv->pdev->dev);
  1069. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  1070. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1071. }
  1072. if (priv->wpss_supported)
  1073. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  1074. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  1075. if (priv->bdf_download_support) {
  1076. ret = wlfw_cal_report_req(priv);
  1077. if (ret < 0)
  1078. goto device_info_failure;
  1079. }
  1080. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  1081. dynamic_feature_mask);
  1082. }
  1083. if (!priv->fw_error_fatal_irq)
  1084. register_fw_error_notifications(&priv->pdev->dev);
  1085. if (!priv->fw_early_crash_irq)
  1086. register_early_crash_notifications(&priv->pdev->dev);
  1087. if (priv->psf_supported)
  1088. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  1089. return ret;
  1090. device_info_failure:
  1091. icnss_hw_power_off(priv);
  1092. fail:
  1093. ICNSS_ASSERT(ignore_assert);
  1094. qmi_registered:
  1095. return ret;
  1096. }
  1097. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  1098. {
  1099. if (!priv)
  1100. return -ENODEV;
  1101. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  1102. icnss_clear_server(priv);
  1103. if (priv->psf_supported)
  1104. priv->last_updated_voltage = 0;
  1105. return 0;
  1106. }
  1107. static int icnss_call_driver_probe(struct icnss_priv *priv)
  1108. {
  1109. int ret = 0;
  1110. int probe_cnt = 0;
  1111. if (!priv->ops || !priv->ops->probe)
  1112. return 0;
  1113. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1114. return -EINVAL;
  1115. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  1116. icnss_hw_power_on(priv);
  1117. icnss_block_shutdown(true);
  1118. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1119. ret = priv->ops->probe(&priv->pdev->dev);
  1120. probe_cnt++;
  1121. if (ret != -EPROBE_DEFER)
  1122. break;
  1123. }
  1124. if (ret < 0) {
  1125. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1126. ret, priv->state, probe_cnt);
  1127. icnss_block_shutdown(false);
  1128. goto out;
  1129. }
  1130. icnss_block_shutdown(false);
  1131. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1132. return 0;
  1133. out:
  1134. icnss_hw_power_off(priv);
  1135. return ret;
  1136. }
  1137. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  1138. {
  1139. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1140. goto out;
  1141. if (!priv->ops || !priv->ops->shutdown)
  1142. goto out;
  1143. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  1144. goto out;
  1145. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  1146. priv->ops->shutdown(&priv->pdev->dev);
  1147. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  1148. out:
  1149. return 0;
  1150. }
  1151. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  1152. {
  1153. int ret = 0;
  1154. icnss_pm_relax(priv);
  1155. icnss_call_driver_shutdown(priv);
  1156. clear_bit(ICNSS_PDR, &priv->state);
  1157. clear_bit(ICNSS_REJUVENATE, &priv->state);
  1158. clear_bit(ICNSS_PD_RESTART, &priv->state);
  1159. clear_bit(ICNSS_LOW_POWER, &priv->state);
  1160. priv->early_crash_ind = false;
  1161. priv->is_ssr = false;
  1162. if (!priv->ops || !priv->ops->reinit)
  1163. goto out;
  1164. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1165. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1166. priv->state);
  1167. goto out;
  1168. }
  1169. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1170. goto call_probe;
  1171. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  1172. icnss_hw_power_on(priv);
  1173. icnss_block_shutdown(true);
  1174. ret = priv->ops->reinit(&priv->pdev->dev);
  1175. if (ret < 0) {
  1176. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  1177. ret, priv->state);
  1178. if (!priv->allow_recursive_recovery)
  1179. ICNSS_ASSERT(false);
  1180. icnss_block_shutdown(false);
  1181. goto out_power_off;
  1182. }
  1183. icnss_block_shutdown(false);
  1184. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  1185. return 0;
  1186. call_probe:
  1187. return icnss_call_driver_probe(priv);
  1188. out_power_off:
  1189. icnss_hw_power_off(priv);
  1190. out:
  1191. return ret;
  1192. }
  1193. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  1194. {
  1195. int ret = 0;
  1196. if (!priv)
  1197. return -ENODEV;
  1198. del_timer(&priv->recovery_timer);
  1199. set_bit(ICNSS_FW_READY, &priv->state);
  1200. clear_bit(ICNSS_MODE_ON, &priv->state);
  1201. atomic_set(&priv->soc_wake_ref_count, 0);
  1202. if (priv->device_id == WCN6750_DEVICE_ID ||
  1203. priv->device_id == WCN6450_DEVICE_ID)
  1204. icnss_free_qdss_mem(priv);
  1205. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  1206. icnss_hw_power_off(priv);
  1207. if (!priv->pdev) {
  1208. icnss_pr_err("Device is not ready\n");
  1209. ret = -ENODEV;
  1210. goto out;
  1211. }
  1212. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1213. icnss_send_wlan_boot_complete();
  1214. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1215. ret = icnss_pd_restart_complete(priv);
  1216. } else {
  1217. if (priv->wpss_supported)
  1218. icnss_setup_dms_mac(priv);
  1219. ret = icnss_call_driver_probe(priv);
  1220. }
  1221. icnss_vreg_unvote(priv);
  1222. out:
  1223. return ret;
  1224. }
  1225. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1226. {
  1227. int ret = 0;
  1228. if (!priv)
  1229. return -ENODEV;
  1230. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1231. if (priv->device_id == WCN6750_DEVICE_ID) {
  1232. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1233. if (ret < 0)
  1234. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1235. ret);
  1236. }
  1237. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1238. mod_timer(&priv->recovery_timer,
  1239. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1240. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1241. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1242. } else {
  1243. icnss_driver_event_fw_ready_ind(priv, NULL);
  1244. }
  1245. return ret;
  1246. }
  1247. static int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1248. {
  1249. struct platform_device *pdev = priv->pdev;
  1250. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1251. int i, j;
  1252. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1253. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1254. qdss_mem[i].va =
  1255. dma_alloc_coherent(&pdev->dev,
  1256. qdss_mem[i].size,
  1257. &qdss_mem[i].pa,
  1258. GFP_KERNEL);
  1259. if (!qdss_mem[i].va) {
  1260. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1261. qdss_mem[i].size,
  1262. qdss_mem[i].type, i);
  1263. break;
  1264. }
  1265. }
  1266. }
  1267. /* Best-effort allocation for QDSS trace */
  1268. if (i < priv->qdss_mem_seg_len) {
  1269. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1270. qdss_mem[j].type = 0;
  1271. qdss_mem[j].size = 0;
  1272. }
  1273. priv->qdss_mem_seg_len = i;
  1274. }
  1275. return 0;
  1276. }
  1277. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1278. {
  1279. struct platform_device *pdev = priv->pdev;
  1280. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1281. int i;
  1282. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1283. if (qdss_mem[i].va && qdss_mem[i].size) {
  1284. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1285. &qdss_mem[i].pa, qdss_mem[i].size,
  1286. qdss_mem[i].type);
  1287. dma_free_coherent(&pdev->dev,
  1288. qdss_mem[i].size, qdss_mem[i].va,
  1289. qdss_mem[i].pa);
  1290. qdss_mem[i].va = NULL;
  1291. qdss_mem[i].pa = 0;
  1292. qdss_mem[i].size = 0;
  1293. qdss_mem[i].type = 0;
  1294. }
  1295. }
  1296. priv->qdss_mem_seg_len = 0;
  1297. }
  1298. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1299. {
  1300. int ret = 0;
  1301. ret = icnss_alloc_qdss_mem(priv);
  1302. if (ret < 0)
  1303. return ret;
  1304. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1305. }
  1306. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1307. u64 pa, u32 size, int *seg_id)
  1308. {
  1309. int i = 0;
  1310. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1311. u64 offset = 0;
  1312. void *va = NULL;
  1313. u64 local_pa;
  1314. u32 local_size;
  1315. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1316. local_pa = (u64)qdss_mem[i].pa;
  1317. local_size = (u32)qdss_mem[i].size;
  1318. if (pa == local_pa && size <= local_size) {
  1319. va = qdss_mem[i].va;
  1320. break;
  1321. }
  1322. if (pa > local_pa &&
  1323. pa < local_pa + local_size &&
  1324. pa + size <= local_pa + local_size) {
  1325. offset = pa - local_pa;
  1326. va = qdss_mem[i].va + offset;
  1327. break;
  1328. }
  1329. }
  1330. *seg_id = i;
  1331. return va;
  1332. }
  1333. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1334. void *data)
  1335. {
  1336. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1337. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1338. int ret = 0;
  1339. int i;
  1340. void *va = NULL;
  1341. u64 pa;
  1342. u32 size;
  1343. int seg_id = 0;
  1344. if (!priv->qdss_mem_seg_len) {
  1345. icnss_pr_err("Memory for QDSS trace is not available\n");
  1346. return -ENOMEM;
  1347. }
  1348. if (event_data->mem_seg_len == 0) {
  1349. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1350. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1351. ICNSS_GENL_MSG_TYPE_QDSS,
  1352. event_data->file_name,
  1353. qdss_mem[i].size);
  1354. if (ret < 0) {
  1355. icnss_pr_err("Fail to save QDSS data: %d\n",
  1356. ret);
  1357. break;
  1358. }
  1359. }
  1360. } else {
  1361. for (i = 0; i < event_data->mem_seg_len; i++) {
  1362. pa = event_data->mem_seg[i].addr;
  1363. size = event_data->mem_seg[i].size;
  1364. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1365. size, &seg_id);
  1366. if (!va) {
  1367. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1368. &pa);
  1369. ret = -EINVAL;
  1370. break;
  1371. }
  1372. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1373. event_data->file_name, size);
  1374. if (ret < 0) {
  1375. icnss_pr_err("Fail to save QDSS data: %d\n",
  1376. ret);
  1377. break;
  1378. }
  1379. }
  1380. }
  1381. kfree(data);
  1382. return ret;
  1383. }
  1384. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1385. {
  1386. int dec, c = atomic_read(v);
  1387. do {
  1388. dec = c - 1;
  1389. if (unlikely(dec < 1))
  1390. break;
  1391. } while (!atomic_try_cmpxchg(v, &c, dec));
  1392. return dec;
  1393. }
  1394. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1395. void *data)
  1396. {
  1397. int ret = 0;
  1398. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1399. if (!priv)
  1400. return -ENODEV;
  1401. if (!data)
  1402. return -EINVAL;
  1403. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1404. event_data->total_size);
  1405. kfree(data);
  1406. return ret;
  1407. }
  1408. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1409. {
  1410. int ret = 0;
  1411. if (!priv)
  1412. return -ENODEV;
  1413. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1414. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1415. atomic_read(&priv->soc_wake_ref_count));
  1416. return 0;
  1417. }
  1418. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1419. ICNSS_SMP2P_OUT_SOC_WAKE);
  1420. if (!ret)
  1421. atomic_inc(&priv->soc_wake_ref_count);
  1422. return ret;
  1423. }
  1424. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1425. {
  1426. int ret = 0;
  1427. if (!priv)
  1428. return -ENODEV;
  1429. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1430. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1431. priv->soc_wake_ref_count);
  1432. return 0;
  1433. }
  1434. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1435. ICNSS_SMP2P_OUT_SOC_WAKE);
  1436. return ret;
  1437. }
  1438. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1439. void *data)
  1440. {
  1441. int ret = 0;
  1442. int probe_cnt = 0;
  1443. if (priv->ops)
  1444. return -EEXIST;
  1445. priv->ops = data;
  1446. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1447. set_bit(ICNSS_FW_READY, &priv->state);
  1448. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1449. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1450. priv->state);
  1451. return -ENODEV;
  1452. }
  1453. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1454. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1455. priv->state);
  1456. goto out;
  1457. }
  1458. ret = icnss_hw_power_on(priv);
  1459. if (ret)
  1460. goto out;
  1461. icnss_block_shutdown(true);
  1462. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1463. ret = priv->ops->probe(&priv->pdev->dev);
  1464. probe_cnt++;
  1465. if (ret != -EPROBE_DEFER)
  1466. break;
  1467. }
  1468. if (ret) {
  1469. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1470. ret, priv->state, probe_cnt);
  1471. icnss_block_shutdown(false);
  1472. goto power_off;
  1473. }
  1474. icnss_block_shutdown(false);
  1475. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1476. return 0;
  1477. power_off:
  1478. icnss_hw_power_off(priv);
  1479. out:
  1480. return ret;
  1481. }
  1482. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1483. void *data)
  1484. {
  1485. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1486. priv->ops = NULL;
  1487. goto out;
  1488. }
  1489. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1490. icnss_block_shutdown(true);
  1491. if (priv->ops)
  1492. priv->ops->remove(&priv->pdev->dev);
  1493. icnss_block_shutdown(false);
  1494. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1495. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1496. priv->ops = NULL;
  1497. icnss_hw_power_off(priv);
  1498. out:
  1499. return 0;
  1500. }
  1501. static int icnss_fw_crashed(struct icnss_priv *priv,
  1502. struct icnss_event_pd_service_down_data *event_data)
  1503. {
  1504. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1505. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1506. set_bit(ICNSS_PD_RESTART, &priv->state);
  1507. icnss_pm_stay_awake(priv);
  1508. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state) &&
  1509. test_bit(ICNSS_FW_READY, &priv->state)) {
  1510. clear_bit(ICNSS_FW_READY, &priv->state);
  1511. fw_down_data.crashed = true;
  1512. icnss_call_driver_uevent(priv,
  1513. ICNSS_UEVENT_FW_DOWN,
  1514. &fw_down_data);
  1515. }
  1516. if (event_data && event_data->fw_rejuvenate)
  1517. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1518. return 0;
  1519. }
  1520. static int icnss_update_hang_event_data(struct icnss_priv *priv,
  1521. struct icnss_uevent_hang_data *hang_data)
  1522. {
  1523. if (!priv->hang_event_data_va)
  1524. return -EINVAL;
  1525. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1526. priv->hang_event_data_len,
  1527. GFP_ATOMIC);
  1528. if (!priv->hang_event_data)
  1529. return -ENOMEM;
  1530. // Update the hang event params
  1531. hang_data->hang_event_data = priv->hang_event_data;
  1532. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1533. return 0;
  1534. }
  1535. static int icnss_send_hang_event_data(struct icnss_priv *priv)
  1536. {
  1537. struct icnss_uevent_hang_data hang_data = {0};
  1538. int ret = 0xFF;
  1539. if (priv->early_crash_ind) {
  1540. ret = icnss_update_hang_event_data(priv, &hang_data);
  1541. if (ret)
  1542. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1543. }
  1544. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1545. &hang_data);
  1546. if (!ret) {
  1547. kfree(priv->hang_event_data);
  1548. priv->hang_event_data = NULL;
  1549. }
  1550. return 0;
  1551. }
  1552. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1553. void *data)
  1554. {
  1555. struct icnss_event_pd_service_down_data *event_data = data;
  1556. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1557. icnss_ignore_fw_timeout(false);
  1558. goto out;
  1559. }
  1560. if (priv->force_err_fatal)
  1561. ICNSS_ASSERT(0);
  1562. if (priv->device_id == WCN6750_DEVICE_ID ||
  1563. priv->device_id == WCN6450_DEVICE_ID) {
  1564. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1565. ICNSS_SMP2P_OUT_SOC_WAKE);
  1566. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1567. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1568. }
  1569. if (priv->wpss_supported)
  1570. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1571. ICNSS_SMP2P_OUT_POWER_SAVE);
  1572. icnss_send_hang_event_data(priv);
  1573. if (priv->early_crash_ind) {
  1574. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1575. event_data->crashed, priv->state);
  1576. goto out;
  1577. }
  1578. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1579. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1580. event_data->crashed, priv->state);
  1581. if (!priv->allow_recursive_recovery)
  1582. ICNSS_ASSERT(0);
  1583. goto out;
  1584. }
  1585. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1586. icnss_fw_crashed(priv, event_data);
  1587. out:
  1588. kfree(data);
  1589. return 0;
  1590. }
  1591. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1592. void *data)
  1593. {
  1594. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1595. icnss_ignore_fw_timeout(false);
  1596. goto out;
  1597. }
  1598. priv->early_crash_ind = true;
  1599. icnss_fw_crashed(priv, NULL);
  1600. out:
  1601. kfree(data);
  1602. return 0;
  1603. }
  1604. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1605. void *data)
  1606. {
  1607. int ret = 0;
  1608. if (!priv->ops || !priv->ops->idle_shutdown)
  1609. return 0;
  1610. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1611. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1612. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1613. ret = -EBUSY;
  1614. } else {
  1615. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1616. priv->state);
  1617. icnss_block_shutdown(true);
  1618. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1619. icnss_block_shutdown(false);
  1620. }
  1621. return ret;
  1622. }
  1623. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1624. void *data)
  1625. {
  1626. int ret = 0;
  1627. if (!priv->ops || !priv->ops->idle_restart)
  1628. return 0;
  1629. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1630. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1631. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1632. ret = -EBUSY;
  1633. } else {
  1634. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1635. priv->state);
  1636. icnss_block_shutdown(true);
  1637. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1638. icnss_block_shutdown(false);
  1639. }
  1640. return ret;
  1641. }
  1642. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1643. {
  1644. icnss_free_qdss_mem(priv);
  1645. return 0;
  1646. }
  1647. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1648. void *data)
  1649. {
  1650. struct icnss_m3_upload_segments_req_data *event_data = data;
  1651. struct qcom_dump_segment segment;
  1652. int i, status = 0, ret = 0;
  1653. struct list_head head;
  1654. if (!dump_enabled()) {
  1655. icnss_pr_info("Dump collection is not enabled\n");
  1656. return ret;
  1657. }
  1658. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1659. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1660. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1661. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1662. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1663. return ret;
  1664. INIT_LIST_HEAD(&head);
  1665. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1666. memset(&segment, 0, sizeof(segment));
  1667. segment.va = devm_ioremap(&priv->pdev->dev,
  1668. event_data->m3_segment[i].addr,
  1669. event_data->m3_segment[i].size);
  1670. if (!segment.va) {
  1671. icnss_pr_err("Failed to ioremap M3 Dump region");
  1672. ret = -ENOMEM;
  1673. goto send_resp;
  1674. }
  1675. segment.size = event_data->m3_segment[i].size;
  1676. list_add(&segment.node, &head);
  1677. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1678. event_data->m3_segment[i].name);
  1679. switch (event_data->m3_segment[i].type) {
  1680. case QMI_M3_SEGMENT_PHYAREG_V01:
  1681. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1682. break;
  1683. case QMI_M3_SEGMENT_PHYDBG_V01:
  1684. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1685. break;
  1686. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1687. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1688. break;
  1689. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1690. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1691. break;
  1692. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1693. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1694. break;
  1695. default:
  1696. icnss_pr_err("Invalid Segment type: %d",
  1697. event_data->m3_segment[i].type);
  1698. }
  1699. if (ret) {
  1700. status = ret;
  1701. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1702. event_data->m3_segment[i].name, ret);
  1703. }
  1704. list_del(&segment.node);
  1705. }
  1706. send_resp:
  1707. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1708. status);
  1709. return ret;
  1710. }
  1711. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1712. {
  1713. int ret = 0;
  1714. struct icnss_subsys_restart_level_data *event_data = data;
  1715. if (!data)
  1716. return -EINVAL;
  1717. if (!priv) {
  1718. ret = -ENODEV;
  1719. goto out;
  1720. }
  1721. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1722. out:
  1723. kfree(data);
  1724. return ret;
  1725. }
  1726. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1727. {
  1728. int ret;
  1729. struct icnss_priv *priv = icnss_get_plat_priv();
  1730. rproc_shutdown(priv->rproc);
  1731. ret = rproc_boot(priv->rproc);
  1732. if (ret) {
  1733. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1734. rproc_put(priv->rproc);
  1735. }
  1736. }
  1737. static void icnss_driver_event_work(struct work_struct *work)
  1738. {
  1739. struct icnss_priv *priv =
  1740. container_of(work, struct icnss_priv, event_work);
  1741. struct icnss_driver_event *event;
  1742. unsigned long flags;
  1743. int ret;
  1744. icnss_pm_stay_awake(priv);
  1745. spin_lock_irqsave(&priv->event_lock, flags);
  1746. while (!list_empty(&priv->event_list)) {
  1747. event = list_first_entry(&priv->event_list,
  1748. struct icnss_driver_event, list);
  1749. list_del(&event->list);
  1750. spin_unlock_irqrestore(&priv->event_lock, flags);
  1751. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1752. icnss_driver_event_to_str(event->type),
  1753. event->sync ? "-sync" : "", event->type,
  1754. priv->state);
  1755. switch (event->type) {
  1756. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1757. ret = icnss_driver_event_server_arrive(priv,
  1758. event->data);
  1759. break;
  1760. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1761. ret = icnss_driver_event_server_exit(priv);
  1762. break;
  1763. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1764. ret = icnss_driver_event_fw_ready_ind(priv,
  1765. event->data);
  1766. break;
  1767. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1768. ret = icnss_driver_event_register_driver(priv,
  1769. event->data);
  1770. break;
  1771. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1772. ret = icnss_driver_event_unregister_driver(priv,
  1773. event->data);
  1774. break;
  1775. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1776. ret = icnss_driver_event_pd_service_down(priv,
  1777. event->data);
  1778. break;
  1779. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1780. ret = icnss_driver_event_early_crash_ind(priv,
  1781. event->data);
  1782. break;
  1783. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1784. ret = icnss_driver_event_idle_shutdown(priv,
  1785. event->data);
  1786. break;
  1787. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1788. ret = icnss_driver_event_idle_restart(priv,
  1789. event->data);
  1790. break;
  1791. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1792. ret = icnss_driver_event_fw_init_done(priv,
  1793. event->data);
  1794. break;
  1795. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1796. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1797. break;
  1798. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1799. ret = icnss_qdss_trace_save_hdlr(priv,
  1800. event->data);
  1801. break;
  1802. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1803. ret = icnss_qdss_trace_free_hdlr(priv);
  1804. break;
  1805. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1806. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1807. break;
  1808. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1809. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1810. event->data);
  1811. break;
  1812. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1813. ret = icnss_subsys_restart_level(priv, event->data);
  1814. break;
  1815. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1816. ret = icnss_process_wfc_call_ind_event(priv,
  1817. event->data);
  1818. break;
  1819. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1820. ret = icnss_process_twt_cfg_ind_event(priv,
  1821. event->data);
  1822. break;
  1823. default:
  1824. icnss_pr_err("Invalid Event type: %d", event->type);
  1825. kfree(event);
  1826. continue;
  1827. }
  1828. priv->stats.events[event->type].processed++;
  1829. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1830. icnss_driver_event_to_str(event->type),
  1831. event->sync ? "-sync" : "", event->type, ret,
  1832. priv->state);
  1833. spin_lock_irqsave(&priv->event_lock, flags);
  1834. if (event->sync) {
  1835. event->ret = ret;
  1836. complete(&event->complete);
  1837. continue;
  1838. }
  1839. spin_unlock_irqrestore(&priv->event_lock, flags);
  1840. kfree(event);
  1841. spin_lock_irqsave(&priv->event_lock, flags);
  1842. }
  1843. spin_unlock_irqrestore(&priv->event_lock, flags);
  1844. icnss_pm_relax(priv);
  1845. }
  1846. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1847. {
  1848. struct icnss_priv *priv =
  1849. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1850. struct icnss_soc_wake_event *event;
  1851. unsigned long flags;
  1852. int ret;
  1853. icnss_pm_stay_awake(priv);
  1854. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1855. while (!list_empty(&priv->soc_wake_msg_list)) {
  1856. event = list_first_entry(&priv->soc_wake_msg_list,
  1857. struct icnss_soc_wake_event, list);
  1858. list_del(&event->list);
  1859. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1860. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1861. icnss_soc_wake_event_to_str(event->type),
  1862. event->sync ? "-sync" : "", event->type,
  1863. priv->state);
  1864. switch (event->type) {
  1865. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1866. ret = icnss_event_soc_wake_request(priv,
  1867. event->data);
  1868. break;
  1869. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1870. ret = icnss_event_soc_wake_release(priv,
  1871. event->data);
  1872. break;
  1873. default:
  1874. icnss_pr_err("Invalid Event type: %d", event->type);
  1875. kfree(event);
  1876. continue;
  1877. }
  1878. priv->stats.soc_wake_events[event->type].processed++;
  1879. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1880. icnss_soc_wake_event_to_str(event->type),
  1881. event->sync ? "-sync" : "", event->type, ret,
  1882. priv->state);
  1883. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1884. if (event->sync) {
  1885. event->ret = ret;
  1886. complete(&event->complete);
  1887. continue;
  1888. }
  1889. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1890. kfree(event);
  1891. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1892. }
  1893. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1894. icnss_pm_relax(priv);
  1895. }
  1896. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1897. {
  1898. int ret = 0;
  1899. struct qcom_dump_segment segment;
  1900. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1901. struct list_head head;
  1902. if (!dump_enabled()) {
  1903. icnss_pr_info("Dump collection is not enabled\n");
  1904. return ret;
  1905. }
  1906. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1907. return ret;
  1908. INIT_LIST_HEAD(&head);
  1909. memset(&segment, 0, sizeof(segment));
  1910. segment.va = priv->msa_va;
  1911. segment.size = priv->msa_mem_size;
  1912. list_add(&segment.node, &head);
  1913. if (!msa0_dump_dev->dev) {
  1914. icnss_pr_err("Created Dump Device not found\n");
  1915. return 0;
  1916. }
  1917. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1918. if (ret) {
  1919. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1920. return ret;
  1921. }
  1922. list_del(&segment.node);
  1923. return ret;
  1924. }
  1925. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1926. void *data)
  1927. {
  1928. struct qcom_ssr_notify_data *notif = data;
  1929. int ret = 0;
  1930. if (!notif->crashed) {
  1931. if (atomic_read(&priv->is_shutdown)) {
  1932. atomic_set(&priv->is_shutdown, false);
  1933. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1934. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1935. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1936. clear_bit(ICNSS_FW_READY, &priv->state);
  1937. icnss_driver_event_post(priv,
  1938. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1939. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1940. NULL);
  1941. }
  1942. }
  1943. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1944. if (!wait_for_completion_timeout(
  1945. &priv->unblock_shutdown,
  1946. msecs_to_jiffies(PROBE_TIMEOUT)))
  1947. icnss_pr_err("modem block shutdown timeout\n");
  1948. }
  1949. ret = wlfw_send_modem_shutdown_msg(priv);
  1950. if (ret < 0)
  1951. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1952. ret);
  1953. }
  1954. }
  1955. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1956. {
  1957. switch (code) {
  1958. case QCOM_SSR_BEFORE_POWERUP:
  1959. return "BEFORE_POWERUP";
  1960. case QCOM_SSR_AFTER_POWERUP:
  1961. return "AFTER_POWERUP";
  1962. case QCOM_SSR_BEFORE_SHUTDOWN:
  1963. return "BEFORE_SHUTDOWN";
  1964. case QCOM_SSR_AFTER_SHUTDOWN:
  1965. return "AFTER_SHUTDOWN";
  1966. default:
  1967. return "UNKNOWN";
  1968. }
  1969. };
  1970. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1971. unsigned long code,
  1972. void *data)
  1973. {
  1974. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1975. wpss_early_ssr_nb);
  1976. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1977. icnss_qcom_ssr_notify_state_to_str(code), code);
  1978. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1979. set_bit(ICNSS_FW_DOWN, &priv->state);
  1980. icnss_ignore_fw_timeout(true);
  1981. }
  1982. return NOTIFY_DONE;
  1983. }
  1984. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1985. unsigned long code,
  1986. void *data)
  1987. {
  1988. struct icnss_event_pd_service_down_data *event_data;
  1989. struct qcom_ssr_notify_data *notif = data;
  1990. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1991. wpss_ssr_nb);
  1992. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1993. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1994. icnss_qcom_ssr_notify_state_to_str(code), code);
  1995. switch (code) {
  1996. case QCOM_SSR_BEFORE_SHUTDOWN:
  1997. priv->notif_crashed = notif->crashed;
  1998. break;
  1999. case QCOM_SSR_AFTER_SHUTDOWN:
  2000. /* Collect ramdump only when there was a crash. */
  2001. if (priv->notif_crashed) {
  2002. icnss_pr_info("Collecting msa0 segment dump\n");
  2003. icnss_msa0_ramdump(priv);
  2004. priv->notif_crashed = false;
  2005. }
  2006. goto out;
  2007. default:
  2008. goto out;
  2009. }
  2010. if (priv->wpss_self_recovery_enabled)
  2011. del_timer(&priv->wpss_ssr_timer);
  2012. priv->is_ssr = true;
  2013. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  2014. priv->state, notif->crashed);
  2015. if (priv->device_id == ADRASTEA_DEVICE_ID)
  2016. icnss_update_state_send_modem_shutdown(priv, data);
  2017. set_bit(ICNSS_FW_DOWN, &priv->state);
  2018. icnss_ignore_fw_timeout(true);
  2019. if (notif->crashed)
  2020. priv->stats.recovery.root_pd_crash++;
  2021. else
  2022. priv->stats.recovery.root_pd_shutdown++;
  2023. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2024. if (event_data == NULL)
  2025. return notifier_from_errno(-ENOMEM);
  2026. event_data->crashed = notif->crashed;
  2027. fw_down_data.crashed = !!notif->crashed;
  2028. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2029. clear_bit(ICNSS_FW_READY, &priv->state);
  2030. fw_down_data.crashed = !!notif->crashed;
  2031. icnss_call_driver_uevent(priv,
  2032. ICNSS_UEVENT_FW_DOWN,
  2033. &fw_down_data);
  2034. }
  2035. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2036. ICNSS_EVENT_SYNC, event_data);
  2037. if (notif->crashed)
  2038. mod_timer(&priv->recovery_timer,
  2039. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2040. out:
  2041. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  2042. return NOTIFY_OK;
  2043. }
  2044. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  2045. unsigned long code,
  2046. void *data)
  2047. {
  2048. struct icnss_event_pd_service_down_data *event_data;
  2049. struct qcom_ssr_notify_data *notif = data;
  2050. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  2051. modem_ssr_nb);
  2052. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2053. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  2054. icnss_qcom_ssr_notify_state_to_str(code), code);
  2055. switch (code) {
  2056. case QCOM_SSR_BEFORE_SHUTDOWN:
  2057. if (priv->is_slate_rfa)
  2058. complete(&priv->slate_boot_complete);
  2059. if (!notif->crashed &&
  2060. priv->low_power_support) { /* Hibernate */
  2061. if (test_bit(ICNSS_MODE_ON, &priv->state))
  2062. icnss_driver_event_post(
  2063. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2064. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2065. set_bit(ICNSS_LOW_POWER, &priv->state);
  2066. }
  2067. break;
  2068. case QCOM_SSR_AFTER_SHUTDOWN:
  2069. /* Collect ramdump only when there was a crash. */
  2070. if (notif->crashed) {
  2071. icnss_pr_info("Collecting msa0 segment dump\n");
  2072. icnss_msa0_ramdump(priv);
  2073. }
  2074. goto out;
  2075. default:
  2076. goto out;
  2077. }
  2078. priv->is_ssr = true;
  2079. if (notif->crashed) {
  2080. priv->stats.recovery.root_pd_crash++;
  2081. priv->root_pd_shutdown = false;
  2082. } else {
  2083. priv->stats.recovery.root_pd_shutdown++;
  2084. priv->root_pd_shutdown = true;
  2085. }
  2086. icnss_update_state_send_modem_shutdown(priv, data);
  2087. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2088. set_bit(ICNSS_FW_DOWN, &priv->state);
  2089. icnss_ignore_fw_timeout(true);
  2090. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2091. clear_bit(ICNSS_FW_READY, &priv->state);
  2092. fw_down_data.crashed = !!notif->crashed;
  2093. icnss_call_driver_uevent(priv,
  2094. ICNSS_UEVENT_FW_DOWN,
  2095. &fw_down_data);
  2096. }
  2097. goto out;
  2098. }
  2099. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  2100. priv->state, notif->crashed);
  2101. set_bit(ICNSS_FW_DOWN, &priv->state);
  2102. icnss_ignore_fw_timeout(true);
  2103. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2104. if (event_data == NULL)
  2105. return notifier_from_errno(-ENOMEM);
  2106. event_data->crashed = notif->crashed;
  2107. fw_down_data.crashed = !!notif->crashed;
  2108. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2109. clear_bit(ICNSS_FW_READY, &priv->state);
  2110. fw_down_data.crashed = !!notif->crashed;
  2111. icnss_call_driver_uevent(priv,
  2112. ICNSS_UEVENT_FW_DOWN,
  2113. &fw_down_data);
  2114. }
  2115. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2116. ICNSS_EVENT_SYNC, event_data);
  2117. if (notif->crashed)
  2118. mod_timer(&priv->recovery_timer,
  2119. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2120. out:
  2121. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  2122. return NOTIFY_OK;
  2123. }
  2124. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  2125. {
  2126. int ret = 0;
  2127. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  2128. priv->wpss_early_notify_handler =
  2129. qcom_register_early_ssr_notifier("wpss",
  2130. &priv->wpss_early_ssr_nb);
  2131. if (IS_ERR_OR_NULL(priv->wpss_early_notify_handler)) {
  2132. ret = PTR_ERR(priv->wpss_early_notify_handler);
  2133. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  2134. }
  2135. return ret;
  2136. }
  2137. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  2138. {
  2139. int ret = 0;
  2140. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  2141. /*
  2142. * Assign priority of icnss wpss notifier callback over IPA
  2143. * modem notifier callback which is 0
  2144. */
  2145. priv->wpss_ssr_nb.priority = 1;
  2146. priv->wpss_notify_handler =
  2147. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  2148. if (IS_ERR_OR_NULL(priv->wpss_notify_handler)) {
  2149. ret = PTR_ERR(priv->wpss_notify_handler);
  2150. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  2151. }
  2152. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2153. return ret;
  2154. }
  2155. #ifdef CONFIG_SLATE_MODULE_ENABLED
  2156. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  2157. unsigned long event, void *data)
  2158. {
  2159. icnss_pr_info("Received slate event 0x%x\n", event);
  2160. if (event == SLATE_STATUS) {
  2161. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  2162. seb_nb);
  2163. enum boot_status status = *(enum boot_status *)data;
  2164. if (status == SLATE_READY) {
  2165. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  2166. priv->state);
  2167. set_bit(ICNSS_SLATE_READY, &priv->state);
  2168. set_bit(ICNSS_SLATE_UP, &priv->state);
  2169. complete(&priv->slate_boot_complete);
  2170. }
  2171. }
  2172. return NOTIFY_OK;
  2173. }
  2174. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2175. {
  2176. int ret = 0;
  2177. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  2178. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  2179. &priv->seb_nb);
  2180. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  2181. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  2182. icnss_pr_err("SLATE event register notifier failed: %d\n",
  2183. ret);
  2184. }
  2185. return ret;
  2186. }
  2187. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2188. {
  2189. int ret = 0;
  2190. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  2191. if (ret < 0)
  2192. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  2193. return ret;
  2194. }
  2195. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  2196. unsigned long code,
  2197. void *data)
  2198. {
  2199. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  2200. slate_ssr_nb);
  2201. int ret = 0;
  2202. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  2203. if (code == QCOM_SSR_AFTER_POWERUP &&
  2204. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  2205. set_bit(ICNSS_SLATE_UP, &priv->state);
  2206. complete(&priv->slate_boot_complete);
  2207. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  2208. priv->state);
  2209. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  2210. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  2211. clear_bit(ICNSS_SLATE_UP, &priv->state);
  2212. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2213. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  2214. priv->state);
  2215. goto skip_pdr;
  2216. }
  2217. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  2218. ret = icnss_trigger_recovery(&priv->pdev->dev);
  2219. if (ret < 0) {
  2220. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  2221. ret, priv->state);
  2222. goto skip_pdr;
  2223. }
  2224. }
  2225. skip_pdr:
  2226. return NOTIFY_OK;
  2227. }
  2228. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2229. {
  2230. int ret = 0;
  2231. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  2232. priv->slate_notify_handler =
  2233. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2234. if (IS_ERR_OR_NULL(priv->slate_notify_handler)) {
  2235. ret = PTR_ERR(priv->slate_notify_handler);
  2236. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2237. }
  2238. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2239. return ret;
  2240. }
  2241. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2242. {
  2243. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2244. return 0;
  2245. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2246. &priv->slate_ssr_nb);
  2247. priv->slate_notify_handler = NULL;
  2248. return 0;
  2249. }
  2250. #else
  2251. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2252. {
  2253. return 0;
  2254. }
  2255. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2256. {
  2257. return 0;
  2258. }
  2259. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2260. {
  2261. return 0;
  2262. }
  2263. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2264. {
  2265. return 0;
  2266. }
  2267. #endif
  2268. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2269. {
  2270. int ret = 0;
  2271. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2272. /*
  2273. * Assign priority of icnss modem notifier callback over IPA
  2274. * modem notifier callback which is 0
  2275. */
  2276. priv->modem_ssr_nb.priority = 1;
  2277. priv->modem_notify_handler =
  2278. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2279. if (IS_ERR_OR_NULL(priv->modem_notify_handler)) {
  2280. ret = PTR_ERR(priv->modem_notify_handler);
  2281. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2282. }
  2283. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2284. return ret;
  2285. }
  2286. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2287. {
  2288. if (IS_ERR_OR_NULL(priv->wpss_early_notify_handler))
  2289. return;
  2290. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2291. &priv->wpss_early_ssr_nb);
  2292. priv->wpss_early_notify_handler = NULL;
  2293. }
  2294. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2295. {
  2296. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2297. return 0;
  2298. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2299. &priv->wpss_ssr_nb);
  2300. priv->wpss_notify_handler = NULL;
  2301. return 0;
  2302. }
  2303. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2304. {
  2305. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2306. return 0;
  2307. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2308. &priv->modem_ssr_nb);
  2309. priv->modem_notify_handler = NULL;
  2310. return 0;
  2311. }
  2312. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2313. {
  2314. struct icnss_priv *priv = priv_cb;
  2315. struct icnss_event_pd_service_down_data *event_data;
  2316. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2317. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2318. if (!priv)
  2319. return;
  2320. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2321. state, priv->state);
  2322. switch (state) {
  2323. case SERVREG_SERVICE_STATE_DOWN:
  2324. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2325. if (!event_data)
  2326. return;
  2327. event_data->crashed = true;
  2328. if (!priv->is_ssr) {
  2329. set_bit(ICNSS_PDR, &penv->state);
  2330. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2331. cause = ICNSS_HOST_ERROR;
  2332. priv->stats.recovery.pdr_host_error++;
  2333. } else {
  2334. cause = ICNSS_FW_CRASH;
  2335. priv->stats.recovery.pdr_fw_crash++;
  2336. }
  2337. } else if (priv->root_pd_shutdown) {
  2338. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2339. event_data->crashed = false;
  2340. }
  2341. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2342. priv->state, icnss_pdr_cause[cause]);
  2343. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2344. set_bit(ICNSS_FW_DOWN, &priv->state);
  2345. icnss_ignore_fw_timeout(true);
  2346. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2347. clear_bit(ICNSS_FW_READY, &priv->state);
  2348. fw_down_data.crashed = event_data->crashed;
  2349. icnss_call_driver_uevent(priv,
  2350. ICNSS_UEVENT_FW_DOWN,
  2351. &fw_down_data);
  2352. }
  2353. }
  2354. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2355. if (event_data->crashed)
  2356. mod_timer(&priv->recovery_timer,
  2357. jiffies +
  2358. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2359. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2360. ICNSS_EVENT_SYNC, event_data);
  2361. break;
  2362. case SERVREG_SERVICE_STATE_UP:
  2363. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2364. break;
  2365. default:
  2366. break;
  2367. }
  2368. return;
  2369. }
  2370. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2371. {
  2372. struct pdr_handle *handle = NULL;
  2373. struct pdr_service *service = NULL;
  2374. int err = 0;
  2375. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2376. if (IS_ERR_OR_NULL(handle)) {
  2377. err = PTR_ERR(handle);
  2378. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2379. goto out;
  2380. }
  2381. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2382. if (IS_ERR_OR_NULL(service)) {
  2383. err = PTR_ERR(service);
  2384. icnss_pr_err("Failed to add lookup, err %d", err);
  2385. goto out;
  2386. }
  2387. priv->pdr_handle = handle;
  2388. priv->pdr_service = service;
  2389. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2390. icnss_pr_info("PDR registration happened");
  2391. out:
  2392. return err;
  2393. }
  2394. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2395. {
  2396. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2397. return;
  2398. pdr_handle_release(priv->pdr_handle);
  2399. }
  2400. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2401. {
  2402. int ret = 0;
  2403. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  2404. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2405. #else
  2406. priv->icnss_ramdump_class = class_create(ICNSS_RAMDUMP_NAME);
  2407. #endif
  2408. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2409. ret = PTR_ERR(priv->icnss_ramdump_class);
  2410. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2411. return ret;
  2412. }
  2413. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2414. ICNSS_RAMDUMP_NAME);
  2415. if (ret < 0) {
  2416. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2417. goto fail_alloc_major;
  2418. }
  2419. return 0;
  2420. fail_alloc_major:
  2421. class_destroy(priv->icnss_ramdump_class);
  2422. return ret;
  2423. }
  2424. static void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2425. {
  2426. int ret = 0;
  2427. struct icnss_ramdump_info *ramdump_info;
  2428. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2429. if (!ramdump_info)
  2430. return ERR_PTR(-ENOMEM);
  2431. if (!dev_name) {
  2432. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2433. return NULL;
  2434. }
  2435. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2436. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2437. if (ramdump_info->minor < 0) {
  2438. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2439. ramdump_info->minor);
  2440. ret = -ENODEV;
  2441. goto fail_out_of_minors;
  2442. }
  2443. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2444. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2445. ramdump_info->minor),
  2446. ramdump_info, ramdump_info->name);
  2447. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2448. ret = PTR_ERR(ramdump_info->dev);
  2449. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2450. ramdump_info->name, ret);
  2451. goto fail_device_create;
  2452. }
  2453. return (void *)ramdump_info;
  2454. fail_device_create:
  2455. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2456. fail_out_of_minors:
  2457. kfree(ramdump_info);
  2458. return ERR_PTR(ret);
  2459. }
  2460. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2461. {
  2462. int ret = 0;
  2463. if (!priv || !priv->pdev) {
  2464. icnss_pr_err("Platform priv or pdev is NULL\n");
  2465. return -EINVAL;
  2466. }
  2467. ret = icnss_ramdump_devnode_init(priv);
  2468. if (ret)
  2469. return ret;
  2470. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2471. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2472. icnss_pr_err("Failed to create msa0 dump device!");
  2473. return -ENOMEM;
  2474. }
  2475. if (priv->device_id == WCN6750_DEVICE_ID ||
  2476. priv->device_id == WCN6450_DEVICE_ID) {
  2477. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2478. ICNSS_M3_SEGMENT(
  2479. ICNSS_M3_SEGMENT_PHYAREG));
  2480. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2481. !priv->m3_dump_phyareg->dev) {
  2482. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2483. return -ENOMEM;
  2484. }
  2485. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2486. ICNSS_M3_SEGMENT(
  2487. ICNSS_M3_SEGMENT_PHYA));
  2488. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2489. !priv->m3_dump_phydbg->dev) {
  2490. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2491. return -ENOMEM;
  2492. }
  2493. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2494. ICNSS_M3_SEGMENT(
  2495. ICNSS_M3_SEGMENT_WMACREG));
  2496. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2497. !priv->m3_dump_wmac0reg->dev) {
  2498. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2499. return -ENOMEM;
  2500. }
  2501. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2502. ICNSS_M3_SEGMENT(
  2503. ICNSS_M3_SEGMENT_WCSSDBG));
  2504. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2505. !priv->m3_dump_wcssdbg->dev) {
  2506. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2507. return -ENOMEM;
  2508. }
  2509. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2510. ICNSS_M3_SEGMENT(
  2511. ICNSS_M3_SEGMENT_PHYAM3));
  2512. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2513. !priv->m3_dump_phyapdmem->dev) {
  2514. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2515. return -ENOMEM;
  2516. }
  2517. }
  2518. return 0;
  2519. }
  2520. static int icnss_enable_recovery(struct icnss_priv *priv)
  2521. {
  2522. int ret;
  2523. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2524. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2525. return 0;
  2526. }
  2527. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2528. icnss_pr_dbg("SSR disabled through module parameter\n");
  2529. goto enable_pdr;
  2530. }
  2531. ret = icnss_register_ramdump_devices(priv);
  2532. if (ret)
  2533. return ret;
  2534. if (priv->wpss_supported) {
  2535. icnss_wpss_early_ssr_register_notifier(priv);
  2536. icnss_wpss_ssr_register_notifier(priv);
  2537. return 0;
  2538. }
  2539. if (!(priv->rproc_fw_download))
  2540. icnss_modem_ssr_register_notifier(priv);
  2541. if (priv->is_slate_rfa) {
  2542. icnss_slate_ssr_register_notifier(priv);
  2543. icnss_register_slate_event_notifier(priv);
  2544. }
  2545. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2546. icnss_pr_dbg("PDR disabled through module parameter\n");
  2547. return 0;
  2548. }
  2549. enable_pdr:
  2550. ret = icnss_pd_restart_enable(priv);
  2551. if (ret)
  2552. return ret;
  2553. return 0;
  2554. }
  2555. static int icnss_dev_id_match(struct icnss_priv *priv,
  2556. struct device_info *dev_info)
  2557. {
  2558. while (dev_info->device_id) {
  2559. if (priv->device_id == dev_info->device_id)
  2560. return 1;
  2561. dev_info++;
  2562. }
  2563. return 0;
  2564. }
  2565. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2566. unsigned long *thermal_state)
  2567. {
  2568. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2569. *thermal_state = icnss_tcdev->max_thermal_state;
  2570. return 0;
  2571. }
  2572. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2573. unsigned long *thermal_state)
  2574. {
  2575. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2576. *thermal_state = icnss_tcdev->curr_thermal_state;
  2577. return 0;
  2578. }
  2579. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2580. unsigned long thermal_state)
  2581. {
  2582. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2583. struct device *dev = &penv->pdev->dev;
  2584. int ret = 0;
  2585. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2586. return 0;
  2587. if (thermal_state > icnss_tcdev->max_thermal_state)
  2588. return -EINVAL;
  2589. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2590. thermal_state, icnss_tcdev->tcdev_id);
  2591. mutex_lock(&penv->tcdev_lock);
  2592. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2593. icnss_tcdev->tcdev_id);
  2594. if (!ret)
  2595. icnss_tcdev->curr_thermal_state = thermal_state;
  2596. mutex_unlock(&penv->tcdev_lock);
  2597. if (ret) {
  2598. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2599. ret, icnss_tcdev->tcdev_id);
  2600. return ret;
  2601. }
  2602. return 0;
  2603. }
  2604. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2605. .get_max_state = icnss_tcdev_get_max_state,
  2606. .get_cur_state = icnss_tcdev_get_cur_state,
  2607. .set_cur_state = icnss_tcdev_set_cur_state,
  2608. };
  2609. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2610. int tcdev_id)
  2611. {
  2612. struct icnss_priv *priv = dev_get_drvdata(dev);
  2613. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2614. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2615. struct device_node *dev_node;
  2616. int ret = 0;
  2617. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2618. if (!icnss_tcdev)
  2619. return -ENOMEM;
  2620. icnss_tcdev->tcdev_id = tcdev_id;
  2621. icnss_tcdev->max_thermal_state = max_state;
  2622. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2623. "qcom,icnss_cdev%d", tcdev_id);
  2624. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2625. if (!dev_node) {
  2626. icnss_pr_err("Failed to get cooling device node\n");
  2627. return -EINVAL;
  2628. }
  2629. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2630. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2631. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2632. dev_node,
  2633. cdev_node_name, icnss_tcdev,
  2634. &icnss_cooling_ops);
  2635. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2636. ret = PTR_ERR(icnss_tcdev->tcdev);
  2637. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2638. ret, icnss_tcdev->tcdev_id);
  2639. } else {
  2640. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2641. icnss_tcdev->tcdev_id);
  2642. list_add(&icnss_tcdev->tcdev_list,
  2643. &priv->icnss_tcdev_list);
  2644. }
  2645. } else {
  2646. icnss_pr_dbg("Cooling device registration not supported");
  2647. ret = -EOPNOTSUPP;
  2648. }
  2649. return ret;
  2650. }
  2651. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2652. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2653. {
  2654. struct icnss_priv *priv = dev_get_drvdata(dev);
  2655. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2656. while (!list_empty(&priv->icnss_tcdev_list)) {
  2657. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2658. struct icnss_thermal_cdev,
  2659. tcdev_list);
  2660. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2661. list_del(&icnss_tcdev->tcdev_list);
  2662. kfree(icnss_tcdev);
  2663. }
  2664. }
  2665. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2666. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2667. unsigned long *thermal_state,
  2668. int tcdev_id)
  2669. {
  2670. struct icnss_priv *priv = dev_get_drvdata(dev);
  2671. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2672. mutex_lock(&priv->tcdev_lock);
  2673. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2674. if (icnss_tcdev->tcdev_id != tcdev_id)
  2675. continue;
  2676. *thermal_state = icnss_tcdev->curr_thermal_state;
  2677. mutex_unlock(&priv->tcdev_lock);
  2678. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2679. icnss_tcdev->curr_thermal_state, tcdev_id);
  2680. return 0;
  2681. }
  2682. mutex_unlock(&priv->tcdev_lock);
  2683. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2684. return -EINVAL;
  2685. }
  2686. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2687. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2688. int cmd_len, void *cb_ctx,
  2689. int (*cb)(void *ctx, void *event, int event_len))
  2690. {
  2691. struct icnss_priv *priv = icnss_get_plat_priv();
  2692. int ret;
  2693. if (!priv)
  2694. return -ENODEV;
  2695. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2696. return -EINVAL;
  2697. priv->get_info_cb = cb;
  2698. priv->get_info_cb_ctx = cb_ctx;
  2699. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2700. if (ret) {
  2701. priv->get_info_cb = NULL;
  2702. priv->get_info_cb_ctx = NULL;
  2703. }
  2704. return ret;
  2705. }
  2706. EXPORT_SYMBOL(icnss_qmi_send);
  2707. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2708. struct module *owner, const char *mod_name)
  2709. {
  2710. int ret = 0;
  2711. struct icnss_priv *priv = icnss_get_plat_priv();
  2712. if (!priv || !priv->pdev) {
  2713. icnss_pr_vdbg("icnss2 is not ready for register driver\n");
  2714. ret = -EAGAIN;
  2715. goto out;
  2716. }
  2717. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2718. if (priv->ops) {
  2719. icnss_pr_err("Driver already registered\n");
  2720. ret = -EEXIST;
  2721. goto out;
  2722. }
  2723. if (!ops->dev_info) {
  2724. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2725. return -EINVAL;
  2726. }
  2727. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2728. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2729. ops->dev_info->name);
  2730. return -ENODEV;
  2731. }
  2732. if (!ops->probe || !ops->remove) {
  2733. ret = -EINVAL;
  2734. goto out;
  2735. }
  2736. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2737. 0, ops);
  2738. if (ret == -EINTR)
  2739. ret = 0;
  2740. out:
  2741. return ret;
  2742. }
  2743. EXPORT_SYMBOL(__icnss_register_driver);
  2744. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2745. {
  2746. int ret;
  2747. struct icnss_priv *priv = icnss_get_plat_priv();
  2748. if (!priv || !priv->pdev) {
  2749. ret = -ENODEV;
  2750. goto out;
  2751. }
  2752. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2753. if (!priv->ops) {
  2754. icnss_pr_err("Driver not registered\n");
  2755. ret = -ENOENT;
  2756. goto out;
  2757. }
  2758. ret = icnss_driver_event_post(priv,
  2759. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2760. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2761. out:
  2762. return ret;
  2763. }
  2764. EXPORT_SYMBOL(icnss_unregister_driver);
  2765. static struct icnss_msi_config msi_config_wcn6750 = {
  2766. .total_vectors = 28,
  2767. .total_users = 2,
  2768. .users = (struct icnss_msi_user[]) {
  2769. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2770. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2771. },
  2772. };
  2773. static struct icnss_msi_config msi_config_wcn6450 = {
  2774. .total_vectors = 14,
  2775. .total_users = 2,
  2776. .users = (struct icnss_msi_user[]) {
  2777. { .name = "CE", .num_vectors = 12, .base_vector = 0 },
  2778. { .name = "DP", .num_vectors = 2, .base_vector = 12 },
  2779. },
  2780. };
  2781. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2782. {
  2783. if (priv->device_id == WCN6750_DEVICE_ID)
  2784. priv->msi_config = &msi_config_wcn6750;
  2785. else
  2786. priv->msi_config = &msi_config_wcn6450;
  2787. return 0;
  2788. }
  2789. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2790. int *num_vectors, u32 *user_base_data,
  2791. u32 *base_vector)
  2792. {
  2793. struct icnss_priv *priv = dev_get_drvdata(dev);
  2794. struct icnss_msi_config *msi_config;
  2795. int idx;
  2796. if (!priv)
  2797. return -ENODEV;
  2798. msi_config = priv->msi_config;
  2799. if (!msi_config) {
  2800. icnss_pr_err("MSI is not supported.\n");
  2801. return -EINVAL;
  2802. }
  2803. for (idx = 0; idx < msi_config->total_users; idx++) {
  2804. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2805. *num_vectors = msi_config->users[idx].num_vectors;
  2806. *user_base_data = msi_config->users[idx].base_vector
  2807. + priv->msi_base_data;
  2808. *base_vector = msi_config->users[idx].base_vector;
  2809. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2810. user_name, *num_vectors, *user_base_data,
  2811. *base_vector);
  2812. return 0;
  2813. }
  2814. }
  2815. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2816. return -EINVAL;
  2817. }
  2818. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2819. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2820. {
  2821. struct icnss_priv *priv = dev_get_drvdata(dev);
  2822. int irq_num;
  2823. irq_num = priv->srng_irqs[vector];
  2824. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2825. irq_num, vector);
  2826. return irq_num;
  2827. }
  2828. EXPORT_SYMBOL(icnss_get_msi_irq);
  2829. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2830. u32 *msi_addr_high)
  2831. {
  2832. struct icnss_priv *priv = dev_get_drvdata(dev);
  2833. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2834. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2835. }
  2836. EXPORT_SYMBOL(icnss_get_msi_address);
  2837. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2838. irqreturn_t (*handler)(int, void *),
  2839. unsigned long flags, const char *name, void *ctx)
  2840. {
  2841. int ret = 0;
  2842. unsigned int irq;
  2843. struct ce_irq_list *irq_entry;
  2844. struct icnss_priv *priv = dev_get_drvdata(dev);
  2845. if (!priv || !priv->pdev) {
  2846. ret = -ENODEV;
  2847. goto out;
  2848. }
  2849. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2850. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2851. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2852. ret = -EINVAL;
  2853. goto out;
  2854. }
  2855. irq = priv->ce_irqs[ce_id];
  2856. irq_entry = &priv->ce_irq_list[ce_id];
  2857. if (irq_entry->handler || irq_entry->irq) {
  2858. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2859. irq, ce_id);
  2860. ret = -EEXIST;
  2861. goto out;
  2862. }
  2863. ret = request_irq(irq, handler, flags, name, ctx);
  2864. if (ret) {
  2865. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2866. irq, ce_id, ret);
  2867. goto out;
  2868. }
  2869. irq_entry->irq = irq;
  2870. irq_entry->handler = handler;
  2871. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2872. penv->stats.ce_irqs[ce_id].request++;
  2873. out:
  2874. return ret;
  2875. }
  2876. EXPORT_SYMBOL(icnss_ce_request_irq);
  2877. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2878. {
  2879. int ret = 0;
  2880. unsigned int irq;
  2881. struct ce_irq_list *irq_entry;
  2882. if (!penv || !penv->pdev || !dev) {
  2883. ret = -ENODEV;
  2884. goto out;
  2885. }
  2886. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2887. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2888. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2889. ret = -EINVAL;
  2890. goto out;
  2891. }
  2892. irq = penv->ce_irqs[ce_id];
  2893. irq_entry = &penv->ce_irq_list[ce_id];
  2894. if (!irq_entry->handler || !irq_entry->irq) {
  2895. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2896. ret = -EEXIST;
  2897. goto out;
  2898. }
  2899. free_irq(irq, ctx);
  2900. irq_entry->irq = 0;
  2901. irq_entry->handler = NULL;
  2902. penv->stats.ce_irqs[ce_id].free++;
  2903. out:
  2904. return ret;
  2905. }
  2906. EXPORT_SYMBOL(icnss_ce_free_irq);
  2907. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2908. {
  2909. unsigned int irq;
  2910. if (!penv || !penv->pdev || !dev) {
  2911. icnss_pr_err("Platform driver not initialized\n");
  2912. return;
  2913. }
  2914. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2915. penv->state);
  2916. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2917. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2918. return;
  2919. }
  2920. penv->stats.ce_irqs[ce_id].enable++;
  2921. irq = penv->ce_irqs[ce_id];
  2922. enable_irq(irq);
  2923. }
  2924. EXPORT_SYMBOL(icnss_enable_irq);
  2925. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2926. {
  2927. unsigned int irq;
  2928. if (!penv || !penv->pdev || !dev) {
  2929. icnss_pr_err("Platform driver not initialized\n");
  2930. return;
  2931. }
  2932. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2933. penv->state);
  2934. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2935. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2936. ce_id);
  2937. return;
  2938. }
  2939. irq = penv->ce_irqs[ce_id];
  2940. disable_irq(irq);
  2941. penv->stats.ce_irqs[ce_id].disable++;
  2942. }
  2943. EXPORT_SYMBOL(icnss_disable_irq);
  2944. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2945. {
  2946. char *fw_build_timestamp = NULL;
  2947. struct icnss_priv *priv = dev_get_drvdata(dev);
  2948. if (!priv) {
  2949. icnss_pr_err("Platform driver not initialized\n");
  2950. return -EINVAL;
  2951. }
  2952. info->v_addr = priv->mem_base_va;
  2953. info->p_addr = priv->mem_base_pa;
  2954. info->chip_id = priv->chip_info.chip_id;
  2955. info->chip_family = priv->chip_info.chip_family;
  2956. info->board_id = priv->board_id;
  2957. info->soc_id = priv->soc_id;
  2958. info->fw_version = priv->fw_version_info.fw_version;
  2959. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2960. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2961. strlcpy(info->fw_build_timestamp,
  2962. priv->fw_version_info.fw_build_timestamp,
  2963. WLFW_MAX_TIMESTAMP_LEN + 1);
  2964. strlcpy(info->fw_build_id, priv->fw_build_id,
  2965. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2966. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2967. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2968. info->phy_qam_cap = priv->phy_qam_cap;
  2969. memcpy(&info->dev_mem_info, &priv->dev_mem_info,
  2970. sizeof(info->dev_mem_info));
  2971. return 0;
  2972. }
  2973. EXPORT_SYMBOL(icnss_get_soc_info);
  2974. int icnss_get_mhi_state(struct device *dev)
  2975. {
  2976. struct icnss_priv *priv = dev_get_drvdata(dev);
  2977. if (!priv) {
  2978. icnss_pr_err("Platform driver not initialized\n");
  2979. return -EINVAL;
  2980. }
  2981. if (!priv->mhi_state_info_va)
  2982. return -ENOMEM;
  2983. return ioread32(priv->mhi_state_info_va);
  2984. }
  2985. EXPORT_SYMBOL(icnss_get_mhi_state);
  2986. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2987. {
  2988. int ret;
  2989. struct icnss_priv *priv;
  2990. if (!dev)
  2991. return -ENODEV;
  2992. priv = dev_get_drvdata(dev);
  2993. if (!priv) {
  2994. icnss_pr_err("Platform driver not initialized\n");
  2995. return -EINVAL;
  2996. }
  2997. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2998. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2999. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  3000. priv->state);
  3001. return -EINVAL;
  3002. }
  3003. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  3004. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  3005. if (ret)
  3006. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  3007. ret, fw_log_mode);
  3008. return ret;
  3009. }
  3010. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  3011. int icnss_force_wake_request(struct device *dev)
  3012. {
  3013. struct icnss_priv *priv;
  3014. if (!dev)
  3015. return -ENODEV;
  3016. priv = dev_get_drvdata(dev);
  3017. if (!priv) {
  3018. icnss_pr_err("Platform driver not initialized\n");
  3019. return -EINVAL;
  3020. }
  3021. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  3022. !test_bit(ICNSS_FW_READY, &priv->state)) {
  3023. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  3024. priv->state);
  3025. return -EINVAL;
  3026. }
  3027. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  3028. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  3029. atomic_read(&priv->soc_wake_ref_count));
  3030. return 0;
  3031. }
  3032. icnss_pr_soc_wake("Calling SOC Wake request");
  3033. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  3034. 0, NULL);
  3035. return 0;
  3036. }
  3037. EXPORT_SYMBOL(icnss_force_wake_request);
  3038. int icnss_force_wake_release(struct device *dev)
  3039. {
  3040. struct icnss_priv *priv;
  3041. if (!dev)
  3042. return -ENODEV;
  3043. priv = dev_get_drvdata(dev);
  3044. if (!priv) {
  3045. icnss_pr_err("Platform driver not initialized\n");
  3046. return -EINVAL;
  3047. }
  3048. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  3049. !test_bit(ICNSS_FW_READY, &priv->state)) {
  3050. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  3051. priv->state);
  3052. return -EINVAL;
  3053. }
  3054. icnss_pr_soc_wake("Calling SOC Wake response");
  3055. if (atomic_read(&priv->soc_wake_ref_count) &&
  3056. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  3057. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  3058. atomic_read(&priv->soc_wake_ref_count));
  3059. return 0;
  3060. }
  3061. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  3062. 0, NULL);
  3063. return 0;
  3064. }
  3065. EXPORT_SYMBOL(icnss_force_wake_release);
  3066. int icnss_is_device_awake(struct device *dev)
  3067. {
  3068. struct icnss_priv *priv = dev_get_drvdata(dev);
  3069. if (!priv) {
  3070. icnss_pr_err("Platform driver not initialized\n");
  3071. return -EINVAL;
  3072. }
  3073. return atomic_read(&priv->soc_wake_ref_count);
  3074. }
  3075. EXPORT_SYMBOL(icnss_is_device_awake);
  3076. int icnss_is_pci_ep_awake(struct device *dev)
  3077. {
  3078. struct icnss_priv *priv = dev_get_drvdata(dev);
  3079. if (!priv) {
  3080. icnss_pr_err("Platform driver not initialized\n");
  3081. return -EINVAL;
  3082. }
  3083. if (!priv->mhi_state_info_va)
  3084. return -ENOMEM;
  3085. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  3086. }
  3087. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  3088. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  3089. uint32_t mem_type, uint32_t data_len,
  3090. uint8_t *output)
  3091. {
  3092. int ret = 0;
  3093. struct icnss_priv *priv = dev_get_drvdata(dev);
  3094. if (priv->magic != ICNSS_MAGIC) {
  3095. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  3096. dev, priv, priv->magic);
  3097. return -EINVAL;
  3098. }
  3099. if (!output || data_len == 0
  3100. || data_len > WLFW_MAX_DATA_SIZE) {
  3101. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  3102. output, data_len);
  3103. ret = -EINVAL;
  3104. goto out;
  3105. }
  3106. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  3107. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  3108. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  3109. priv->state);
  3110. ret = -EINVAL;
  3111. goto out;
  3112. }
  3113. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  3114. data_len, output);
  3115. out:
  3116. return ret;
  3117. }
  3118. EXPORT_SYMBOL(icnss_athdiag_read);
  3119. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  3120. uint32_t mem_type, uint32_t data_len,
  3121. uint8_t *input)
  3122. {
  3123. int ret = 0;
  3124. struct icnss_priv *priv = dev_get_drvdata(dev);
  3125. if (priv->magic != ICNSS_MAGIC) {
  3126. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  3127. dev, priv, priv->magic);
  3128. return -EINVAL;
  3129. }
  3130. if (!input || data_len == 0
  3131. || data_len > WLFW_MAX_DATA_SIZE) {
  3132. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  3133. input, data_len);
  3134. ret = -EINVAL;
  3135. goto out;
  3136. }
  3137. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  3138. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  3139. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  3140. priv->state);
  3141. ret = -EINVAL;
  3142. goto out;
  3143. }
  3144. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  3145. data_len, input);
  3146. out:
  3147. return ret;
  3148. }
  3149. EXPORT_SYMBOL(icnss_athdiag_write);
  3150. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  3151. enum icnss_driver_mode mode,
  3152. const char *host_version)
  3153. {
  3154. struct icnss_priv *priv = dev_get_drvdata(dev);
  3155. int temp = 0, ret = 0;
  3156. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  3157. !test_bit(ICNSS_FW_READY, &priv->state)) {
  3158. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  3159. priv->state);
  3160. return -EINVAL;
  3161. }
  3162. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  3163. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  3164. priv->state);
  3165. return -EINVAL;
  3166. }
  3167. if (priv->wpss_supported &&
  3168. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  3169. icnss_setup_dms_mac(priv);
  3170. if (priv->device_id == WCN6750_DEVICE_ID) {
  3171. if (!icnss_get_temperature(priv, &temp)) {
  3172. icnss_pr_dbg("Temperature: %d\n", temp);
  3173. if (temp < WLAN_EN_TEMP_THRESHOLD)
  3174. icnss_set_wlan_en_delay(priv);
  3175. }
  3176. }
  3177. if (priv->device_id == WCN6450_DEVICE_ID)
  3178. icnss_hw_power_off(priv);
  3179. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  3180. if (priv->device_id == WCN6450_DEVICE_ID)
  3181. icnss_hw_power_on(priv);
  3182. return ret;
  3183. }
  3184. EXPORT_SYMBOL(icnss_wlan_enable);
  3185. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  3186. {
  3187. struct icnss_priv *priv = dev_get_drvdata(dev);
  3188. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  3189. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  3190. priv->state);
  3191. return 0;
  3192. }
  3193. return icnss_send_wlan_disable_to_fw(priv);
  3194. }
  3195. EXPORT_SYMBOL(icnss_wlan_disable);
  3196. bool icnss_is_qmi_disable(struct device *dev)
  3197. {
  3198. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  3199. }
  3200. EXPORT_SYMBOL(icnss_is_qmi_disable);
  3201. int icnss_get_ce_id(struct device *dev, int irq)
  3202. {
  3203. int i;
  3204. if (!penv || !penv->pdev || !dev)
  3205. return -ENODEV;
  3206. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3207. if (penv->ce_irqs[i] == irq)
  3208. return i;
  3209. }
  3210. icnss_pr_err("No matching CE id for irq %d\n", irq);
  3211. return -EINVAL;
  3212. }
  3213. EXPORT_SYMBOL(icnss_get_ce_id);
  3214. int icnss_get_irq(struct device *dev, int ce_id)
  3215. {
  3216. int irq;
  3217. if (!penv || !penv->pdev || !dev)
  3218. return -ENODEV;
  3219. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  3220. return -EINVAL;
  3221. irq = penv->ce_irqs[ce_id];
  3222. return irq;
  3223. }
  3224. EXPORT_SYMBOL(icnss_get_irq);
  3225. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  3226. {
  3227. struct icnss_priv *priv = dev_get_drvdata(dev);
  3228. if (!priv) {
  3229. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  3230. return NULL;
  3231. }
  3232. return priv->iommu_domain;
  3233. }
  3234. EXPORT_SYMBOL(icnss_smmu_get_domain);
  3235. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3236. static int icnss_iommu_map(struct iommu_domain *domain,
  3237. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3238. {
  3239. return iommu_map(domain, iova, paddr, size, prot);
  3240. }
  3241. #else
  3242. static int icnss_iommu_map(struct iommu_domain *domain,
  3243. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3244. {
  3245. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  3246. }
  3247. #endif
  3248. int icnss_smmu_map(struct device *dev,
  3249. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  3250. {
  3251. struct icnss_priv *priv = dev_get_drvdata(dev);
  3252. int flag = IOMMU_READ | IOMMU_WRITE;
  3253. bool dma_coherent = false;
  3254. unsigned long iova;
  3255. int prop_len = 0;
  3256. size_t len;
  3257. int ret = 0;
  3258. if (!priv) {
  3259. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3260. dev, priv);
  3261. return -EINVAL;
  3262. }
  3263. if (!iova_addr) {
  3264. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3265. &paddr, size);
  3266. return -EINVAL;
  3267. }
  3268. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3269. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3270. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3271. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3272. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3273. iova,
  3274. &priv->smmu_iova_ipa_start,
  3275. priv->smmu_iova_ipa_len);
  3276. return -ENOMEM;
  3277. }
  3278. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3279. icnss_pr_dbg("dma-coherent is %s\n",
  3280. dma_coherent ? "enabled" : "disabled");
  3281. if (dma_coherent)
  3282. flag |= IOMMU_CACHE;
  3283. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3284. ret = icnss_iommu_map(priv->iommu_domain, iova,
  3285. rounddown(paddr, PAGE_SIZE), len,
  3286. flag);
  3287. if (ret) {
  3288. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3289. return ret;
  3290. }
  3291. priv->smmu_iova_ipa_current = iova + len;
  3292. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3293. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3294. return 0;
  3295. }
  3296. EXPORT_SYMBOL(icnss_smmu_map);
  3297. int icnss_smmu_unmap(struct device *dev,
  3298. uint32_t iova_addr, size_t size)
  3299. {
  3300. struct icnss_priv *priv = dev_get_drvdata(dev);
  3301. unsigned long iova;
  3302. size_t len, unmapped_len;
  3303. if (!priv) {
  3304. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3305. dev, priv);
  3306. return -EINVAL;
  3307. }
  3308. if (!iova_addr) {
  3309. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3310. size);
  3311. return -EINVAL;
  3312. }
  3313. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3314. PAGE_SIZE);
  3315. iova = rounddown(iova_addr, PAGE_SIZE);
  3316. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3317. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3318. iova,
  3319. &priv->smmu_iova_ipa_start,
  3320. priv->smmu_iova_ipa_len);
  3321. return -ENOMEM;
  3322. }
  3323. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3324. iova, len);
  3325. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3326. if (unmapped_len != len) {
  3327. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3328. return -EINVAL;
  3329. }
  3330. priv->smmu_iova_ipa_current = iova;
  3331. return 0;
  3332. }
  3333. EXPORT_SYMBOL(icnss_smmu_unmap);
  3334. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3335. {
  3336. return socinfo_get_serial_number();
  3337. }
  3338. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3339. int icnss_trigger_recovery(struct device *dev)
  3340. {
  3341. int ret = 0;
  3342. struct icnss_priv *priv = dev_get_drvdata(dev);
  3343. if (priv->magic != ICNSS_MAGIC) {
  3344. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3345. ret = -EINVAL;
  3346. goto out;
  3347. }
  3348. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3349. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3350. priv->state);
  3351. ret = -EPERM;
  3352. goto out;
  3353. }
  3354. if (priv->wpss_supported) {
  3355. icnss_pr_vdbg("Initiate Root PD restart");
  3356. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3357. ICNSS_SMP2P_OUT_POWER_SAVE);
  3358. if (!ret)
  3359. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3360. return ret;
  3361. }
  3362. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3363. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3364. priv->state);
  3365. ret = -EOPNOTSUPP;
  3366. goto out;
  3367. }
  3368. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3369. priv->state);
  3370. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3371. if (!ret)
  3372. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3373. out:
  3374. return ret;
  3375. }
  3376. EXPORT_SYMBOL(icnss_trigger_recovery);
  3377. int icnss_idle_shutdown(struct device *dev)
  3378. {
  3379. struct icnss_priv *priv = dev_get_drvdata(dev);
  3380. if (!priv) {
  3381. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3382. return -EINVAL;
  3383. }
  3384. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3385. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3386. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3387. return -EBUSY;
  3388. }
  3389. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3390. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3391. }
  3392. EXPORT_SYMBOL(icnss_idle_shutdown);
  3393. int icnss_idle_restart(struct device *dev)
  3394. {
  3395. struct icnss_priv *priv = dev_get_drvdata(dev);
  3396. if (!priv) {
  3397. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3398. return -EINVAL;
  3399. }
  3400. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3401. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3402. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3403. return -EBUSY;
  3404. }
  3405. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3406. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3407. }
  3408. EXPORT_SYMBOL(icnss_idle_restart);
  3409. int icnss_exit_power_save(struct device *dev)
  3410. {
  3411. struct icnss_priv *priv = dev_get_drvdata(dev);
  3412. icnss_pr_vdbg("Calling Exit Power Save\n");
  3413. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3414. !test_bit(ICNSS_MODE_ON, &priv->state))
  3415. return 0;
  3416. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3417. ICNSS_SMP2P_OUT_POWER_SAVE);
  3418. }
  3419. EXPORT_SYMBOL(icnss_exit_power_save);
  3420. int icnss_prevent_l1(struct device *dev)
  3421. {
  3422. struct icnss_priv *priv = dev_get_drvdata(dev);
  3423. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3424. !test_bit(ICNSS_MODE_ON, &priv->state))
  3425. return 0;
  3426. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3427. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3428. }
  3429. EXPORT_SYMBOL(icnss_prevent_l1);
  3430. void icnss_allow_l1(struct device *dev)
  3431. {
  3432. struct icnss_priv *priv = dev_get_drvdata(dev);
  3433. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3434. !test_bit(ICNSS_MODE_ON, &priv->state))
  3435. return;
  3436. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3437. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3438. }
  3439. EXPORT_SYMBOL(icnss_allow_l1);
  3440. void icnss_allow_recursive_recovery(struct device *dev)
  3441. {
  3442. struct icnss_priv *priv = dev_get_drvdata(dev);
  3443. priv->allow_recursive_recovery = true;
  3444. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3445. }
  3446. void icnss_disallow_recursive_recovery(struct device *dev)
  3447. {
  3448. struct icnss_priv *priv = dev_get_drvdata(dev);
  3449. priv->allow_recursive_recovery = false;
  3450. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3451. }
  3452. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3453. {
  3454. struct kobject *icnss_kobject;
  3455. int ret = 0;
  3456. atomic_set(&priv->is_shutdown, false);
  3457. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3458. if (!icnss_kobject) {
  3459. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3460. return -EINVAL;
  3461. }
  3462. priv->icnss_kobject = icnss_kobject;
  3463. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3464. if (ret) {
  3465. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3466. return ret;
  3467. }
  3468. return ret;
  3469. }
  3470. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3471. {
  3472. struct kobject *icnss_kobject;
  3473. icnss_kobject = priv->icnss_kobject;
  3474. if (icnss_kobject)
  3475. kobject_put(icnss_kobject);
  3476. }
  3477. static ssize_t qdss_tr_start_store(struct device *dev,
  3478. struct device_attribute *attr,
  3479. const char *buf, size_t count)
  3480. {
  3481. struct icnss_priv *priv = dev_get_drvdata(dev);
  3482. wlfw_qdss_trace_start(priv);
  3483. icnss_pr_dbg("Received QDSS start command\n");
  3484. return count;
  3485. }
  3486. static ssize_t qdss_tr_stop_store(struct device *dev,
  3487. struct device_attribute *attr,
  3488. const char *user_buf, size_t count)
  3489. {
  3490. struct icnss_priv *priv = dev_get_drvdata(dev);
  3491. u32 option = 0;
  3492. if (sscanf(user_buf, "%du", &option) != 1)
  3493. return -EINVAL;
  3494. wlfw_qdss_trace_stop(priv, option);
  3495. icnss_pr_dbg("Received QDSS stop command\n");
  3496. return count;
  3497. }
  3498. static ssize_t qdss_conf_download_store(struct device *dev,
  3499. struct device_attribute *attr,
  3500. const char *buf, size_t count)
  3501. {
  3502. struct icnss_priv *priv = dev_get_drvdata(dev);
  3503. icnss_wlfw_qdss_dnld_send_sync(priv);
  3504. icnss_pr_dbg("Received QDSS download config command\n");
  3505. return count;
  3506. }
  3507. static ssize_t hw_trc_override_store(struct device *dev,
  3508. struct device_attribute *attr,
  3509. const char *buf, size_t count)
  3510. {
  3511. struct icnss_priv *priv = dev_get_drvdata(dev);
  3512. int tmp = 0;
  3513. if (sscanf(buf, "%du", &tmp) != 1)
  3514. return -EINVAL;
  3515. priv->hw_trc_override = tmp;
  3516. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3517. return count;
  3518. }
  3519. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3520. {
  3521. struct icnss_priv *priv = icnss_get_plat_priv();
  3522. phandle rproc_phandle;
  3523. int ret;
  3524. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3525. &rproc_phandle)) {
  3526. icnss_pr_err("error reading rproc phandle\n");
  3527. return;
  3528. }
  3529. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3530. if (IS_ERR_OR_NULL(priv->rproc)) {
  3531. icnss_pr_err("rproc not found");
  3532. return;
  3533. }
  3534. ret = rproc_boot(priv->rproc);
  3535. if (ret) {
  3536. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3537. rproc_put(priv->rproc);
  3538. }
  3539. }
  3540. static ssize_t wpss_boot_store(struct device *dev,
  3541. struct device_attribute *attr,
  3542. const char *buf, size_t count)
  3543. {
  3544. struct icnss_priv *priv = dev_get_drvdata(dev);
  3545. int wpss_rproc = 0;
  3546. if (!priv->wpss_supported && !priv->rproc_fw_download)
  3547. return count;
  3548. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3549. icnss_pr_err("Failed to read wpss rproc info");
  3550. return -EINVAL;
  3551. }
  3552. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3553. if (wpss_rproc == 1)
  3554. schedule_work(&wpss_loader);
  3555. else if (wpss_rproc == 0)
  3556. icnss_wpss_unload(priv);
  3557. return count;
  3558. }
  3559. static ssize_t wlan_en_delay_store(struct device *dev,
  3560. struct device_attribute *attr,
  3561. const char *buf, size_t count)
  3562. {
  3563. struct icnss_priv *priv = dev_get_drvdata(dev);
  3564. uint32_t wlan_en_delay = 0;
  3565. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3566. return count;
  3567. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3568. icnss_pr_err("Failed to read wlan_en_delay");
  3569. return -EINVAL;
  3570. }
  3571. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3572. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3573. return count;
  3574. }
  3575. static DEVICE_ATTR_WO(qdss_tr_start);
  3576. static DEVICE_ATTR_WO(qdss_tr_stop);
  3577. static DEVICE_ATTR_WO(qdss_conf_download);
  3578. static DEVICE_ATTR_WO(hw_trc_override);
  3579. static DEVICE_ATTR_WO(wpss_boot);
  3580. static DEVICE_ATTR_WO(wlan_en_delay);
  3581. static struct attribute *icnss_attrs[] = {
  3582. &dev_attr_qdss_tr_start.attr,
  3583. &dev_attr_qdss_tr_stop.attr,
  3584. &dev_attr_qdss_conf_download.attr,
  3585. &dev_attr_hw_trc_override.attr,
  3586. &dev_attr_wpss_boot.attr,
  3587. &dev_attr_wlan_en_delay.attr,
  3588. NULL,
  3589. };
  3590. static struct attribute_group icnss_attr_group = {
  3591. .attrs = icnss_attrs,
  3592. };
  3593. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3594. {
  3595. struct device *dev = &priv->pdev->dev;
  3596. int ret;
  3597. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3598. if (ret) {
  3599. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3600. ret);
  3601. goto out;
  3602. }
  3603. return 0;
  3604. out:
  3605. return ret;
  3606. }
  3607. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3608. {
  3609. sysfs_remove_link(kernel_kobj, "icnss");
  3610. }
  3611. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3612. union icnss_device_group_devres {
  3613. const struct attribute_group *group;
  3614. };
  3615. static void devm_icnss_group_remove(struct device *dev, void *res)
  3616. {
  3617. union icnss_device_group_devres *devres = res;
  3618. const struct attribute_group *group = devres->group;
  3619. icnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3620. sysfs_remove_group(&dev->kobj, group);
  3621. }
  3622. static int devm_icnss_group_match(struct device *dev, void *res, void *data)
  3623. {
  3624. return ((union icnss_device_group_devres *)res) == data;
  3625. }
  3626. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3627. {
  3628. WARN_ON(devres_release(&priv->pdev->dev,
  3629. devm_icnss_group_remove, devm_icnss_group_match,
  3630. (void *)&icnss_attr_group));
  3631. }
  3632. #else
  3633. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3634. {
  3635. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3636. }
  3637. #endif
  3638. static int icnss_sysfs_create(struct icnss_priv *priv)
  3639. {
  3640. int ret = 0;
  3641. ret = devm_device_add_group(&priv->pdev->dev,
  3642. &icnss_attr_group);
  3643. if (ret) {
  3644. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3645. ret);
  3646. goto out;
  3647. }
  3648. icnss_create_sysfs_link(priv);
  3649. ret = icnss_create_shutdown_sysfs(priv);
  3650. if (ret)
  3651. goto remove_icnss_group;
  3652. return 0;
  3653. remove_icnss_group:
  3654. icnss_devm_device_remove_group(priv);
  3655. out:
  3656. return ret;
  3657. }
  3658. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3659. {
  3660. icnss_destroy_shutdown_sysfs(priv);
  3661. icnss_remove_sysfs_link(priv);
  3662. icnss_devm_device_remove_group(priv);
  3663. }
  3664. static int icnss_resource_parse(struct icnss_priv *priv)
  3665. {
  3666. int ret = 0, i = 0, irq = 0;
  3667. struct platform_device *pdev = priv->pdev;
  3668. struct device *dev = &pdev->dev;
  3669. struct resource *res;
  3670. u32 int_prop;
  3671. ret = icnss_get_vreg(priv);
  3672. if (ret) {
  3673. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3674. goto out;
  3675. }
  3676. ret = icnss_get_clk(priv);
  3677. if (ret) {
  3678. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3679. goto put_vreg;
  3680. }
  3681. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3682. ret = icnss_get_psf_info(priv);
  3683. if (ret < 0)
  3684. goto out;
  3685. priv->psf_supported = true;
  3686. }
  3687. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3688. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3689. "membase");
  3690. if (!res) {
  3691. icnss_pr_err("Memory base not found in DT\n");
  3692. ret = -EINVAL;
  3693. goto put_clk;
  3694. }
  3695. priv->mem_base_pa = res->start;
  3696. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3697. resource_size(res));
  3698. if (!priv->mem_base_va) {
  3699. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3700. &priv->mem_base_pa);
  3701. ret = -EINVAL;
  3702. goto put_clk;
  3703. }
  3704. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3705. &priv->mem_base_pa,
  3706. priv->mem_base_va);
  3707. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3708. irq = platform_get_irq(pdev, i);
  3709. if (irq < 0) {
  3710. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3711. ret = -ENODEV;
  3712. goto put_clk;
  3713. } else {
  3714. priv->ce_irqs[i] = irq;
  3715. }
  3716. }
  3717. if (of_property_read_bool(pdev->dev.of_node,
  3718. "qcom,is_low_power")) {
  3719. priv->low_power_support = true;
  3720. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3721. }
  3722. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3723. &priv->rf_subtype) == 0) {
  3724. priv->is_rf_subtype_valid = true;
  3725. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3726. }
  3727. if (of_property_read_bool(pdev->dev.of_node,
  3728. "qcom,is_slate_rfa")) {
  3729. priv->is_slate_rfa = true;
  3730. icnss_pr_err("SLATE rfa is enabled\n");
  3731. }
  3732. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3733. priv->device_id == WCN6450_DEVICE_ID) {
  3734. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3735. "msi_addr");
  3736. if (!res) {
  3737. icnss_pr_err("MSI address not found in DT\n");
  3738. ret = -EINVAL;
  3739. goto put_clk;
  3740. }
  3741. priv->msi_addr_pa = res->start;
  3742. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3743. PAGE_SIZE,
  3744. DMA_FROM_DEVICE, 0);
  3745. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3746. icnss_pr_err("MSI: failed to map msi address\n");
  3747. priv->msi_addr_iova = 0;
  3748. ret = -ENOMEM;
  3749. goto put_clk;
  3750. }
  3751. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3752. &priv->msi_addr_pa,
  3753. priv->msi_addr_iova);
  3754. ret = of_property_read_u32_index(dev->of_node,
  3755. "interrupts",
  3756. 1,
  3757. &int_prop);
  3758. if (ret) {
  3759. icnss_pr_dbg("Read interrupt prop failed");
  3760. goto put_clk;
  3761. }
  3762. priv->msi_base_data = int_prop + 32;
  3763. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3764. priv->msi_base_data, int_prop);
  3765. icnss_get_msi_assignment(priv);
  3766. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3767. irq = platform_get_irq(priv->pdev, i);
  3768. if (irq < 0) {
  3769. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3770. ret = -ENODEV;
  3771. goto put_clk;
  3772. } else {
  3773. priv->srng_irqs[i] = irq;
  3774. }
  3775. }
  3776. }
  3777. return 0;
  3778. put_clk:
  3779. icnss_put_clk(priv);
  3780. put_vreg:
  3781. icnss_put_vreg(priv);
  3782. out:
  3783. return ret;
  3784. }
  3785. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3786. {
  3787. int ret = 0;
  3788. struct platform_device *pdev = priv->pdev;
  3789. struct device *dev = &pdev->dev;
  3790. struct device_node *np = NULL;
  3791. u64 prop_size = 0;
  3792. const __be32 *addrp = NULL;
  3793. np = of_parse_phandle(dev->of_node,
  3794. "qcom,wlan-msa-fixed-region", 0);
  3795. if (np) {
  3796. addrp = of_get_address(np, 0, &prop_size, NULL);
  3797. if (!addrp) {
  3798. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3799. ret = -EINVAL;
  3800. of_node_put(np);
  3801. goto out;
  3802. }
  3803. priv->msa_pa = of_translate_address(np, addrp);
  3804. if (priv->msa_pa == OF_BAD_ADDR) {
  3805. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3806. ret = -EINVAL;
  3807. of_node_put(np);
  3808. goto out;
  3809. }
  3810. of_node_put(np);
  3811. priv->msa_va = memremap(priv->msa_pa,
  3812. (unsigned long)prop_size, MEMREMAP_WT);
  3813. if (!priv->msa_va) {
  3814. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3815. &priv->msa_pa);
  3816. ret = -EINVAL;
  3817. goto out;
  3818. }
  3819. priv->msa_mem_size = prop_size;
  3820. } else {
  3821. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3822. &priv->msa_mem_size);
  3823. if (ret || priv->msa_mem_size == 0) {
  3824. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3825. priv->msa_mem_size, ret);
  3826. goto out;
  3827. }
  3828. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3829. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3830. if (!priv->msa_va) {
  3831. icnss_pr_err("DMA alloc failed for MSA\n");
  3832. ret = -ENOMEM;
  3833. goto out;
  3834. }
  3835. }
  3836. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3837. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3838. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3839. "qcom,fw-prefix");
  3840. return 0;
  3841. out:
  3842. return ret;
  3843. }
  3844. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3845. struct device *dev, unsigned long iova,
  3846. int flags, void *handler_token)
  3847. {
  3848. struct icnss_priv *priv = handler_token;
  3849. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3850. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3851. if (!priv) {
  3852. icnss_pr_err("priv is NULL\n");
  3853. return -ENODEV;
  3854. }
  3855. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3856. fw_down_data.crashed = true;
  3857. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3858. &fw_down_data);
  3859. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3860. &fw_down_data);
  3861. }
  3862. icnss_trigger_recovery(&priv->pdev->dev);
  3863. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3864. return -ENOSYS;
  3865. }
  3866. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3867. {
  3868. int ret = 0;
  3869. struct platform_device *pdev = priv->pdev;
  3870. struct device *dev = &pdev->dev;
  3871. const char *iommu_dma_type;
  3872. struct resource *res;
  3873. u32 addr_win[2];
  3874. ret = of_property_read_u32_array(dev->of_node,
  3875. "qcom,iommu-dma-addr-pool",
  3876. addr_win,
  3877. ARRAY_SIZE(addr_win));
  3878. if (ret) {
  3879. icnss_pr_err("SMMU IOVA base not found\n");
  3880. } else {
  3881. priv->smmu_iova_start = addr_win[0];
  3882. priv->smmu_iova_len = addr_win[1];
  3883. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3884. &priv->smmu_iova_start,
  3885. priv->smmu_iova_len);
  3886. priv->iommu_domain =
  3887. iommu_get_domain_for_dev(&pdev->dev);
  3888. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3889. &iommu_dma_type);
  3890. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3891. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3892. priv->smmu_s1_enable = true;
  3893. if (priv->device_id == WCN6750_DEVICE_ID ||
  3894. priv->device_id == WCN6450_DEVICE_ID)
  3895. iommu_set_fault_handler(priv->iommu_domain,
  3896. icnss_smmu_fault_handler,
  3897. priv);
  3898. }
  3899. res = platform_get_resource_byname(pdev,
  3900. IORESOURCE_MEM,
  3901. "smmu_iova_ipa");
  3902. if (!res) {
  3903. icnss_pr_err("SMMU IOVA IPA not found\n");
  3904. } else {
  3905. priv->smmu_iova_ipa_start = res->start;
  3906. priv->smmu_iova_ipa_current = res->start;
  3907. priv->smmu_iova_ipa_len = resource_size(res);
  3908. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3909. &priv->smmu_iova_ipa_start,
  3910. priv->smmu_iova_ipa_len);
  3911. }
  3912. }
  3913. return 0;
  3914. }
  3915. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3916. {
  3917. if (!priv)
  3918. return -ENODEV;
  3919. if (!priv->smmu_iova_len)
  3920. return -EINVAL;
  3921. *addr = priv->smmu_iova_start;
  3922. *size = priv->smmu_iova_len;
  3923. return 0;
  3924. }
  3925. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3926. {
  3927. if (!priv)
  3928. return -ENODEV;
  3929. if (!priv->smmu_iova_ipa_len)
  3930. return -EINVAL;
  3931. *addr = priv->smmu_iova_ipa_start;
  3932. *size = priv->smmu_iova_ipa_len;
  3933. return 0;
  3934. }
  3935. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3936. char *name)
  3937. {
  3938. if (!priv)
  3939. return;
  3940. if (!priv->use_prefix_path) {
  3941. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3942. return;
  3943. }
  3944. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3945. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3946. ADRASTEA_PATH_PREFIX "%s", name);
  3947. else if (priv->device_id == WCN6750_DEVICE_ID)
  3948. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3949. QCA6750_PATH_PREFIX "%s", name);
  3950. else if (priv->device_id == WCN6450_DEVICE_ID)
  3951. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3952. WCN6450_PATH_PREFIX "%s", name);
  3953. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3954. }
  3955. static const struct platform_device_id icnss_platform_id_table[] = {
  3956. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3957. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3958. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3959. { },
  3960. };
  3961. static const struct of_device_id icnss_dt_match[] = {
  3962. {
  3963. .compatible = "qcom,wcn6750",
  3964. .data = (void *)&icnss_platform_id_table[0]},
  3965. {
  3966. .compatible = "qcom,icnss",
  3967. .data = (void *)&icnss_platform_id_table[1]},
  3968. {
  3969. .compatible = "qcom,wcn6450",
  3970. .data = (void *)&icnss_platform_id_table[2]},
  3971. { },
  3972. };
  3973. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3974. static void icnss_init_control_params(struct icnss_priv *priv)
  3975. {
  3976. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3977. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3978. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3979. if (priv->device_id == WCN6750_DEVICE_ID ||
  3980. priv->device_id == WCN6450_DEVICE_ID ||
  3981. of_property_read_bool(priv->pdev->dev.of_node,
  3982. "wpss-support-enable"))
  3983. priv->wpss_supported = true;
  3984. if (of_property_read_bool(priv->pdev->dev.of_node,
  3985. "bdf-download-support"))
  3986. priv->bdf_download_support = true;
  3987. if (of_property_read_bool(priv->pdev->dev.of_node,
  3988. "rproc-fw-download"))
  3989. priv->rproc_fw_download = true;
  3990. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3991. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3992. }
  3993. static void icnss_read_device_configs(struct icnss_priv *priv)
  3994. {
  3995. if (of_property_read_bool(priv->pdev->dev.of_node,
  3996. "wlan-ipa-disabled")) {
  3997. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3998. }
  3999. if (of_property_read_bool(priv->pdev->dev.of_node,
  4000. "qcom,wpss-self-recovery"))
  4001. priv->wpss_self_recovery_enabled = true;
  4002. }
  4003. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  4004. {
  4005. pm_runtime_get_sync(&priv->pdev->dev);
  4006. pm_runtime_forbid(&priv->pdev->dev);
  4007. pm_runtime_set_active(&priv->pdev->dev);
  4008. pm_runtime_enable(&priv->pdev->dev);
  4009. }
  4010. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  4011. {
  4012. pm_runtime_disable(&priv->pdev->dev);
  4013. pm_runtime_allow(&priv->pdev->dev);
  4014. pm_runtime_put_sync(&priv->pdev->dev);
  4015. }
  4016. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  4017. {
  4018. return of_property_read_bool(priv->pdev->dev.of_node,
  4019. "use-nv-mac");
  4020. }
  4021. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  4022. {
  4023. struct icnss_subsys_restart_level_data *restart_level_data;
  4024. icnss_pr_info("rproc name: %s(%zu) recovery disable: %d",
  4025. rproc->name, strlen(rproc->name),
  4026. rproc->recovery_disabled);
  4027. if (strnstr(rproc->name, "wpss", strlen(rproc->name))) {
  4028. restart_level_data = kzalloc(sizeof(*restart_level_data),
  4029. GFP_ATOMIC);
  4030. if (!restart_level_data)
  4031. return;
  4032. if (rproc->recovery_disabled)
  4033. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  4034. else
  4035. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  4036. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  4037. 0, restart_level_data);
  4038. }
  4039. }
  4040. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  4041. static void icnss_initialize_mem_pool(unsigned long device_id)
  4042. {
  4043. cnss_initialize_prealloc_pool(device_id);
  4044. }
  4045. static void icnss_deinitialize_mem_pool(void)
  4046. {
  4047. cnss_deinitialize_prealloc_pool();
  4048. }
  4049. #else
  4050. static void icnss_initialize_mem_pool(unsigned long device_id)
  4051. {
  4052. }
  4053. static void icnss_deinitialize_mem_pool(void)
  4054. {
  4055. }
  4056. #endif
  4057. static void register_rproc_restart_level_notifier(void)
  4058. {
  4059. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  4060. }
  4061. static void unregister_rproc_restart_level_notifier(void)
  4062. {
  4063. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  4064. }
  4065. static int icnss_probe(struct platform_device *pdev)
  4066. {
  4067. int ret = 0;
  4068. struct device *dev = &pdev->dev;
  4069. struct icnss_priv *priv;
  4070. const struct of_device_id *of_id;
  4071. const struct platform_device_id *device_id;
  4072. if (dev_get_drvdata(dev)) {
  4073. icnss_pr_err("Driver is already initialized\n");
  4074. return -EEXIST;
  4075. }
  4076. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  4077. if (!of_id || !of_id->data) {
  4078. icnss_pr_err("Failed to find of match device!\n");
  4079. ret = -ENODEV;
  4080. goto out_reset_drvdata;
  4081. }
  4082. device_id = of_id->data;
  4083. icnss_pr_dbg("Platform driver probe\n");
  4084. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  4085. if (!priv)
  4086. return -ENOMEM;
  4087. priv->magic = ICNSS_MAGIC;
  4088. dev_set_drvdata(dev, priv);
  4089. priv->pdev = pdev;
  4090. priv->device_id = device_id->driver_data;
  4091. priv->is_chain1_supported = true;
  4092. INIT_LIST_HEAD(&priv->vreg_list);
  4093. INIT_LIST_HEAD(&priv->clk_list);
  4094. icnss_allow_recursive_recovery(dev);
  4095. icnss_initialize_mem_pool(priv->device_id);
  4096. icnss_init_control_params(priv);
  4097. icnss_read_device_configs(priv);
  4098. ret = icnss_resource_parse(priv);
  4099. if (ret)
  4100. goto out_reset_drvdata;
  4101. ret = icnss_msa_dt_parse(priv);
  4102. if (ret)
  4103. goto out_free_resources;
  4104. ret = icnss_register_bus_scale(priv);
  4105. if (ret)
  4106. goto out_free_resources;
  4107. ret = icnss_smmu_dt_parse(priv);
  4108. if (ret)
  4109. goto unreg_bus_scale;
  4110. spin_lock_init(&priv->event_lock);
  4111. spin_lock_init(&priv->on_off_lock);
  4112. spin_lock_init(&priv->soc_wake_msg_lock);
  4113. mutex_init(&priv->dev_lock);
  4114. mutex_init(&priv->tcdev_lock);
  4115. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  4116. if (!priv->event_wq) {
  4117. icnss_pr_err("Workqueue creation failed\n");
  4118. ret = -EFAULT;
  4119. goto smmu_cleanup;
  4120. }
  4121. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  4122. INIT_LIST_HEAD(&priv->event_list);
  4123. if (priv->is_slate_rfa)
  4124. init_completion(&priv->slate_boot_complete);
  4125. ret = icnss_register_fw_service(priv);
  4126. if (ret < 0) {
  4127. icnss_pr_err("fw service registration failed: %d\n", ret);
  4128. goto out_destroy_wq;
  4129. }
  4130. icnss_power_misc_params_init(priv);
  4131. icnss_enable_recovery(priv);
  4132. icnss_debugfs_create(priv);
  4133. icnss_sysfs_create(priv);
  4134. ret = device_init_wakeup(&priv->pdev->dev, true);
  4135. if (ret)
  4136. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  4137. ret);
  4138. icnss_set_plat_priv(priv);
  4139. init_completion(&priv->unblock_shutdown);
  4140. if (priv->device_id == WCN6750_DEVICE_ID ||
  4141. priv->device_id == WCN6450_DEVICE_ID) {
  4142. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  4143. WQ_UNBOUND|WQ_HIGHPRI, 1);
  4144. if (!priv->soc_wake_wq) {
  4145. icnss_pr_err("Soc wake Workqueue creation failed\n");
  4146. ret = -EFAULT;
  4147. goto out_unregister_fw_service;
  4148. }
  4149. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  4150. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  4151. ret = icnss_genl_init();
  4152. if (ret < 0)
  4153. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  4154. init_completion(&priv->smp2p_soc_wake_wait);
  4155. icnss_runtime_pm_init(priv);
  4156. icnss_aop_interface_init(priv);
  4157. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  4158. priv->bdf_download_support = true;
  4159. register_rproc_restart_level_notifier();
  4160. }
  4161. if (priv->wpss_supported) {
  4162. ret = icnss_dms_init(priv);
  4163. if (ret)
  4164. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  4165. priv->use_nv_mac = icnss_use_nv_mac(priv);
  4166. icnss_pr_dbg("NV MAC feature is %s\n",
  4167. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  4168. }
  4169. if (priv->wpss_supported || priv->rproc_fw_download)
  4170. INIT_WORK(&wpss_loader, icnss_wpss_load);
  4171. timer_setup(&priv->recovery_timer,
  4172. icnss_recovery_timeout_hdlr, 0);
  4173. if (priv->wpss_self_recovery_enabled) {
  4174. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  4175. timer_setup(&priv->wpss_ssr_timer,
  4176. icnss_wpss_ssr_timeout_hdlr, 0);
  4177. }
  4178. icnss_register_ims_service(priv);
  4179. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  4180. icnss_pr_info("Platform driver probed successfully\n");
  4181. return 0;
  4182. out_unregister_fw_service:
  4183. icnss_unregister_fw_service(priv);
  4184. out_destroy_wq:
  4185. destroy_workqueue(priv->event_wq);
  4186. smmu_cleanup:
  4187. priv->iommu_domain = NULL;
  4188. unreg_bus_scale:
  4189. icnss_unregister_bus_scale(priv);
  4190. out_free_resources:
  4191. icnss_put_resources(priv);
  4192. out_reset_drvdata:
  4193. icnss_deinitialize_mem_pool();
  4194. dev_set_drvdata(dev, NULL);
  4195. return ret;
  4196. }
  4197. static void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  4198. {
  4199. if (IS_ERR_OR_NULL(ramdump_info))
  4200. return;
  4201. device_unregister(ramdump_info->dev);
  4202. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  4203. kfree(ramdump_info);
  4204. }
  4205. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  4206. {
  4207. if (priv->batt_psy)
  4208. power_supply_put(penv->batt_psy);
  4209. if (priv->psf_supported) {
  4210. flush_workqueue(priv->soc_update_wq);
  4211. destroy_workqueue(priv->soc_update_wq);
  4212. power_supply_unreg_notifier(&priv->psf_nb);
  4213. }
  4214. }
  4215. static int icnss_remove(struct platform_device *pdev)
  4216. {
  4217. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  4218. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  4219. del_timer(&priv->recovery_timer);
  4220. if (priv->wpss_self_recovery_enabled)
  4221. del_timer(&priv->wpss_ssr_timer);
  4222. device_init_wakeup(&priv->pdev->dev, false);
  4223. icnss_unregister_ims_service(priv);
  4224. icnss_debugfs_destroy(priv);
  4225. icnss_unregister_power_supply_notifier(penv);
  4226. icnss_sysfs_destroy(priv);
  4227. complete_all(&priv->unblock_shutdown);
  4228. if (priv->is_slate_rfa) {
  4229. complete(&priv->slate_boot_complete);
  4230. icnss_slate_ssr_unregister_notifier(priv);
  4231. icnss_unregister_slate_event_notifier(priv);
  4232. }
  4233. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  4234. if (priv->wpss_supported) {
  4235. icnss_dms_deinit(priv);
  4236. icnss_wpss_early_ssr_unregister_notifier(priv);
  4237. icnss_wpss_ssr_unregister_notifier(priv);
  4238. } else {
  4239. icnss_modem_ssr_unregister_notifier(priv);
  4240. icnss_pdr_unregister_notifier(priv);
  4241. }
  4242. if (priv->device_id == WCN6750_DEVICE_ID ||
  4243. priv->device_id == WCN6450_DEVICE_ID) {
  4244. icnss_genl_exit();
  4245. icnss_runtime_pm_deinit(priv);
  4246. unregister_rproc_restart_level_notifier();
  4247. complete_all(&priv->smp2p_soc_wake_wait);
  4248. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  4249. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  4250. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  4251. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  4252. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  4253. if (priv->soc_wake_wq)
  4254. destroy_workqueue(priv->soc_wake_wq);
  4255. icnss_aop_interface_deinit(priv);
  4256. }
  4257. class_destroy(priv->icnss_ramdump_class);
  4258. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  4259. icnss_unregister_fw_service(priv);
  4260. if (priv->event_wq)
  4261. destroy_workqueue(priv->event_wq);
  4262. priv->iommu_domain = NULL;
  4263. icnss_hw_power_off(priv);
  4264. icnss_put_resources(priv);
  4265. icnss_deinitialize_mem_pool();
  4266. dev_set_drvdata(&pdev->dev, NULL);
  4267. return 0;
  4268. }
  4269. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  4270. {
  4271. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  4272. /* This is to handle if slate is not up and modem SSR is triggered */
  4273. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  4274. return;
  4275. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  4276. ICNSS_ASSERT(0);
  4277. }
  4278. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  4279. {
  4280. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  4281. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  4282. priv->state);
  4283. schedule_work(&wpss_ssr_work);
  4284. }
  4285. #ifdef CONFIG_PM_SLEEP
  4286. static int icnss_pm_suspend(struct device *dev)
  4287. {
  4288. struct icnss_priv *priv = dev_get_drvdata(dev);
  4289. int ret = 0;
  4290. if (priv->magic != ICNSS_MAGIC) {
  4291. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  4292. dev, priv, priv->magic);
  4293. return -EINVAL;
  4294. }
  4295. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  4296. if (!priv->ops || !priv->ops->pm_suspend ||
  4297. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE) ||
  4298. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4299. return 0;
  4300. ret = priv->ops->pm_suspend(dev);
  4301. if (ret == 0) {
  4302. if (priv->device_id == WCN6750_DEVICE_ID ||
  4303. priv->device_id == WCN6450_DEVICE_ID) {
  4304. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4305. !test_bit(ICNSS_MODE_ON, &priv->state))
  4306. return 0;
  4307. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4308. ICNSS_SMP2P_OUT_POWER_SAVE);
  4309. }
  4310. priv->stats.pm_suspend++;
  4311. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4312. } else {
  4313. priv->stats.pm_suspend_err++;
  4314. }
  4315. return ret;
  4316. }
  4317. static int icnss_pm_resume(struct device *dev)
  4318. {
  4319. struct icnss_priv *priv = dev_get_drvdata(dev);
  4320. int ret = 0;
  4321. if (priv->magic != ICNSS_MAGIC) {
  4322. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4323. dev, priv, priv->magic);
  4324. return -EINVAL;
  4325. }
  4326. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4327. if (!priv->ops || !priv->ops->pm_resume ||
  4328. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE) ||
  4329. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4330. goto out;
  4331. ret = priv->ops->pm_resume(dev);
  4332. out:
  4333. if (ret == 0) {
  4334. priv->stats.pm_resume++;
  4335. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4336. } else {
  4337. priv->stats.pm_resume_err++;
  4338. }
  4339. return ret;
  4340. }
  4341. static int icnss_pm_suspend_noirq(struct device *dev)
  4342. {
  4343. struct icnss_priv *priv = dev_get_drvdata(dev);
  4344. int ret = 0;
  4345. if (priv->magic != ICNSS_MAGIC) {
  4346. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4347. dev, priv, priv->magic);
  4348. return -EINVAL;
  4349. }
  4350. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4351. if (!priv->ops || !priv->ops->suspend_noirq ||
  4352. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4353. goto out;
  4354. ret = priv->ops->suspend_noirq(dev);
  4355. out:
  4356. if (ret == 0) {
  4357. priv->stats.pm_suspend_noirq++;
  4358. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4359. } else {
  4360. priv->stats.pm_suspend_noirq_err++;
  4361. }
  4362. return ret;
  4363. }
  4364. static int icnss_pm_resume_noirq(struct device *dev)
  4365. {
  4366. struct icnss_priv *priv = dev_get_drvdata(dev);
  4367. int ret = 0;
  4368. if (priv->magic != ICNSS_MAGIC) {
  4369. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4370. dev, priv, priv->magic);
  4371. return -EINVAL;
  4372. }
  4373. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4374. if (!priv->ops || !priv->ops->resume_noirq ||
  4375. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4376. goto out;
  4377. ret = priv->ops->resume_noirq(dev);
  4378. out:
  4379. if (ret == 0) {
  4380. priv->stats.pm_resume_noirq++;
  4381. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4382. } else {
  4383. priv->stats.pm_resume_noirq_err++;
  4384. }
  4385. return ret;
  4386. }
  4387. static int icnss_pm_runtime_suspend(struct device *dev)
  4388. {
  4389. struct icnss_priv *priv = dev_get_drvdata(dev);
  4390. int ret = 0;
  4391. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4392. icnss_pr_err("Ignore runtime suspend:\n");
  4393. goto out;
  4394. }
  4395. if (priv->magic != ICNSS_MAGIC) {
  4396. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4397. dev, priv, priv->magic);
  4398. return -EINVAL;
  4399. }
  4400. if (!priv->ops || !priv->ops->runtime_suspend ||
  4401. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE))
  4402. goto out;
  4403. icnss_pr_vdbg("Runtime suspend\n");
  4404. ret = priv->ops->runtime_suspend(dev);
  4405. if (!ret) {
  4406. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4407. !test_bit(ICNSS_MODE_ON, &priv->state))
  4408. return 0;
  4409. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4410. ICNSS_SMP2P_OUT_POWER_SAVE);
  4411. }
  4412. out:
  4413. return ret;
  4414. }
  4415. static int icnss_pm_runtime_resume(struct device *dev)
  4416. {
  4417. struct icnss_priv *priv = dev_get_drvdata(dev);
  4418. int ret = 0;
  4419. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4420. icnss_pr_err("Ignore runtime resume\n");
  4421. goto out;
  4422. }
  4423. if (priv->magic != ICNSS_MAGIC) {
  4424. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4425. dev, priv, priv->magic);
  4426. return -EINVAL;
  4427. }
  4428. if (!priv->ops || !priv->ops->runtime_resume ||
  4429. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE))
  4430. goto out;
  4431. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4432. ret = priv->ops->runtime_resume(dev);
  4433. out:
  4434. return ret;
  4435. }
  4436. static int icnss_pm_runtime_idle(struct device *dev)
  4437. {
  4438. struct icnss_priv *priv = dev_get_drvdata(dev);
  4439. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4440. icnss_pr_err("Ignore runtime idle\n");
  4441. goto out;
  4442. }
  4443. icnss_pr_vdbg("Runtime idle\n");
  4444. pm_request_autosuspend(dev);
  4445. out:
  4446. return -EBUSY;
  4447. }
  4448. #endif
  4449. static const struct dev_pm_ops icnss_pm_ops = {
  4450. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4451. icnss_pm_resume)
  4452. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4453. icnss_pm_resume_noirq)
  4454. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4455. icnss_pm_runtime_idle)
  4456. };
  4457. static struct platform_driver icnss_driver = {
  4458. .probe = icnss_probe,
  4459. .remove = icnss_remove,
  4460. .driver = {
  4461. .name = "icnss2",
  4462. .pm = &icnss_pm_ops,
  4463. .of_match_table = icnss_dt_match,
  4464. },
  4465. };
  4466. /**
  4467. * icnss_has_valid_dt_node() - Check if valid device tree node present
  4468. *
  4469. * Valid device tree node means a node with "compatible" property from the
  4470. * device match table and "status" property is not disabled.
  4471. *
  4472. * Return: true if valid device tree node found, false if not found
  4473. */
  4474. static bool icnss_has_valid_dt_node(void)
  4475. {
  4476. struct device_node *dn = NULL;
  4477. for_each_matching_node(dn, icnss_dt_match) {
  4478. if (of_device_is_available(dn))
  4479. return true;
  4480. }
  4481. icnss_pr_info("No valid icnss2 dtsi entry\n");
  4482. return false;
  4483. }
  4484. static int __init icnss_initialize(void)
  4485. {
  4486. if (!icnss_has_valid_dt_node())
  4487. return -ENODEV;
  4488. icnss_debug_init();
  4489. return platform_driver_register(&icnss_driver);
  4490. }
  4491. static void __exit icnss_exit(void)
  4492. {
  4493. platform_driver_unregister(&icnss_driver);
  4494. icnss_debug_deinit();
  4495. }
  4496. module_init(icnss_initialize);
  4497. module_exit(icnss_exit);
  4498. MODULE_LICENSE("GPL v2");
  4499. MODULE_DESCRIPTION("iWCN CORE platform driver");