91a8910061
git-subtree-dir: qcom/opensource/audio-kernel git-subtree-mainline:99ab089c55git-subtree-split:0ee387dfadChange-Id: repo: https://git.codelinaro.org/clo/la/platform/vendor/qcom/opensource/audio-kernel-ar tag: AUDIO.LA.9.0.r1-07400-lanai.0
53 wiersze
1.7 KiB
C
53 wiersze
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#define CONFIG_SND_SOC_MSM_QDSP6V2_INTF 1
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#define CONFIG_SND_SOC_PINEAPPLE 1
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#define CONFIG_SND_SOC_VOLCANO 1
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#define CONFIG_SND_EVENT 1
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#define CONFIG_AUDIO_PKT_ION 1
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#define CONFIG_MSM_QDSP6_NOTIFIER 1
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#define CONFIG_MSM_QDSP6_SSR 1
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#define CONFIG_MSM_QDSP6_PDR 1
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#define CONFIG_MSM_ADSP_LOADER 1
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#define CONFIG_SPF_CORE 1
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#define CONFIG_MSM_QDSP6_GPR_RPMSG 1
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#define CONFIG_AUDIO_PRM 1
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#define CONFIG_AUDIO_PKT 1
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#define CONFIG_DIGITAL_CDC_RSC_MGR 1
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#define CONFIG_PINCTRL_LPI 1
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#define CONFIG_SOUNDWIRE 1
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#define CONFIG_SOUNDWIRE_MSTR_CTRL 1
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#define CONFIG_SWRM_VER_2P0 1
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#define CONFIG_BOLERO_VER_2P6 1
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#define CONFIG_WCD9XXX_CODEC_CORE_V2 1
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#define CONFIG_MSM_CDC_PINCTRL 1
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#define CONFIG_SND_SOC_WSA884X 1
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#define CONFIG_SND_SOC_WSA883X 1
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#define CONFIG_SND_SOC_LPASS_CDC 1
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#define CONFIG_SND_SOC_WCD_IRQ 1
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#define CONFIG_LPASS_CDC_WSA2_MACRO 1
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#define CONFIG_LPASS_CDC_WSA_MACRO 1
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#define CONFIG_LPASS_CDC_VA_MACRO 1
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#define CONFIG_LPASS_CDC_TX_MACRO 1
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#define CONFIG_LPASS_CDC_RX_MACRO 1
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#define CONFIG_SND_SOC_WCD9XXX_V2 1
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#define CONFIG_SND_SOC_WCD937X 1
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#define CONFIG_SND_SOC_WCD937X_SLAVE 1
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#define CONFIG_SND_SOC_WCD938X 1
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#define CONFIG_SND_SOC_WCD938X_SLAVE 1
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#define CONFIG_SND_SOC_WCD939X 1
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#define CONFIG_SND_SOC_WCD939X_SLAVE 1
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#define CONFIG_SND_SOC_WCD9378 1
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#define CONFIG_SND_SOC_WCD9378_SLAVE 1
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#define CONFIG_SND_SOC_WCD_MBHC 1
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#define CONFIG_SND_SOC_WCD_MBHC_ADC 1
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#define CONFIG_SND_SWR_HAPTICS 1
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#define CONFIG_SND_SOC_MSM_STUB 1
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#define CONFIG_SND_SOC_MSM_HDMI_CODEC_RX 1
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#define CONFIG_MSM_EXT_DISPLAY 1
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#define CONFIG_SND_SOC_SWR_DMIC 1
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