kona.c 188 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361636263636364636563666367636863696370637163726373637463756376637763786379638063816382638363846385638663876388638963906391639263936394639563966397639863996400640164026403640464056406640764086409641064116412641364146415641664176418641964206421642264236424642564266427642864296430643164326433643464356436643764386439644064416442644364446445644664476448644964506451645264536454645564566457645864596460646164626463646464656466646764686469647064716472647364746475647664776478647964806481648264836484648564866487648864896490649164926493649464956496649764986499650065016502650365046505650665076508650965106511651265136514651565166517651865196520652165226523652465256526652765286529653065316532653365346535653665376538653965406541654265436544654565466547654865496550655165526553655465556556655765586559656065616562656365646565656665676568656965706571657265736574657565766577657865796580658165826583658465856586658765886589659065916592659365946595659665976598659966006601660266036604660566066607660866096610661166126613661466156616661766186619662066216622662366246625662666276628662966306631663266336634663566366637663866396640664166426643664466456646664766486649665066516652665366546655665666576658665966606661666266636664666566666667666866696670667166726673667466756676667766786679668066816682668366846685668666876688668966906691669266936694669566966697669866996700670167026703670467056706670767086709671067116712671367146715671667176718671967206721672267236724672567266727672867296730673167326733673467356736673767386739674067416742674367446745674667476748674967506751675267536754675567566757675867596760676167626763676467656766676767686769677067716772677367746775677667776778
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/soc/qcom/fsa4480-i2c.h>
  16. #include <sound/core.h>
  17. #include <sound/soc.h>
  18. #include <sound/soc-dapm.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/info.h>
  22. #include <soc/snd_event.h>
  23. #include <dsp/audio_notifier.h>
  24. #include <soc/swr-common.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include "asoc/msm-cdc-pinctrl.h"
  30. #include "asoc/wcd-mbhc-v2.h"
  31. #include "codecs/wcd938x/wcd938x-mbhc.h"
  32. #include "codecs/wsa881x.h"
  33. #include "codecs/wcd938x/wcd938x.h"
  34. #include "codecs/bolero/bolero-cdc.h"
  35. #include <dt-bindings/sound/audio-codec-port-types.h>
  36. #include "codecs/bolero/wsa-macro.h"
  37. #include "kona-port-config.h"
  38. #define DRV_NAME "kona-asoc-snd"
  39. #define __CHIPSET__ "KONA "
  40. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  41. #define SAMPLING_RATE_8KHZ 8000
  42. #define SAMPLING_RATE_11P025KHZ 11025
  43. #define SAMPLING_RATE_16KHZ 16000
  44. #define SAMPLING_RATE_22P05KHZ 22050
  45. #define SAMPLING_RATE_32KHZ 32000
  46. #define SAMPLING_RATE_44P1KHZ 44100
  47. #define SAMPLING_RATE_48KHZ 48000
  48. #define SAMPLING_RATE_88P2KHZ 88200
  49. #define SAMPLING_RATE_96KHZ 96000
  50. #define SAMPLING_RATE_176P4KHZ 176400
  51. #define SAMPLING_RATE_192KHZ 192000
  52. #define SAMPLING_RATE_352P8KHZ 352800
  53. #define SAMPLING_RATE_384KHZ 384000
  54. #define WCD9XXX_MBHC_DEF_RLOADS 5
  55. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  56. #define CODEC_EXT_CLK_RATE 9600000
  57. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  58. #define DEV_NAME_STR_LEN 32
  59. #define WCD_MBHC_HS_V_MAX 1600
  60. #define TDM_CHANNEL_MAX 8
  61. #define DEV_NAME_STR_LEN 32
  62. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define WSA8810_NAME_1 "wsa881x.20170211"
  65. #define WSA8810_NAME_2 "wsa881x.20170212"
  66. #define WCN_CDC_SLIM_RX_CH_MAX 2
  67. #define WCN_CDC_SLIM_TX_CH_MAX 2
  68. #define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
  69. enum {
  70. TDM_0 = 0,
  71. TDM_1,
  72. TDM_2,
  73. TDM_3,
  74. TDM_4,
  75. TDM_5,
  76. TDM_6,
  77. TDM_7,
  78. TDM_PORT_MAX,
  79. };
  80. enum {
  81. TDM_PRI = 0,
  82. TDM_SEC,
  83. TDM_TERT,
  84. TDM_INTERFACE_MAX,
  85. };
  86. enum {
  87. PRIM_AUX_PCM = 0,
  88. SEC_AUX_PCM,
  89. TERT_AUX_PCM,
  90. AUX_PCM_MAX,
  91. };
  92. enum {
  93. PRIM_MI2S = 0,
  94. SEC_MI2S,
  95. TERT_MI2S,
  96. MI2S_MAX,
  97. };
  98. enum {
  99. WSA_CDC_DMA_RX_0 = 0,
  100. WSA_CDC_DMA_RX_1,
  101. RX_CDC_DMA_RX_0,
  102. RX_CDC_DMA_RX_1,
  103. RX_CDC_DMA_RX_2,
  104. RX_CDC_DMA_RX_3,
  105. RX_CDC_DMA_RX_5,
  106. CDC_DMA_RX_MAX,
  107. };
  108. enum {
  109. WSA_CDC_DMA_TX_0 = 0,
  110. WSA_CDC_DMA_TX_1,
  111. WSA_CDC_DMA_TX_2,
  112. TX_CDC_DMA_TX_0,
  113. TX_CDC_DMA_TX_3,
  114. TX_CDC_DMA_TX_4,
  115. VA_CDC_DMA_TX_0,
  116. VA_CDC_DMA_TX_1,
  117. VA_CDC_DMA_TX_2,
  118. CDC_DMA_TX_MAX,
  119. };
  120. enum {
  121. SLIM_RX_7 = 0,
  122. SLIM_RX_MAX,
  123. };
  124. enum {
  125. SLIM_TX_7 = 0,
  126. SLIM_TX_8,
  127. SLIM_TX_MAX,
  128. };
  129. enum {
  130. AFE_LOOPBACK_TX_IDX = 0,
  131. AFE_LOOPBACK_TX_IDX_MAX,
  132. };
  133. struct msm_asoc_mach_data {
  134. struct snd_info_entry *codec_root;
  135. int usbc_en2_gpio; /* used by gpio driver API */
  136. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  137. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  138. struct device_node *dmic45_gpio_p; /* used by pinctrl API */
  139. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  140. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  141. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  142. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  143. bool is_afe_config_done;
  144. struct device_node *fsa_handle;
  145. };
  146. struct tdm_port {
  147. u32 mode;
  148. u32 channel;
  149. };
  150. enum {
  151. EXT_DISP_RX_IDX_DP = 0,
  152. EXT_DISP_RX_IDX_MAX,
  153. };
  154. struct msm_wsa881x_dev_info {
  155. struct device_node *of_node;
  156. u32 index;
  157. };
  158. struct aux_codec_dev_info {
  159. struct device_node *of_node;
  160. u32 index;
  161. };
  162. struct dev_config {
  163. u32 sample_rate;
  164. u32 bit_format;
  165. u32 channels;
  166. };
  167. /* Default configuration of slimbus channels */
  168. static struct dev_config slim_rx_cfg[] = {
  169. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  170. };
  171. static struct dev_config slim_tx_cfg[] = {
  172. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  173. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  174. };
  175. /* Default configuration of external display BE */
  176. static struct dev_config ext_disp_rx_cfg[] = {
  177. [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  178. };
  179. static struct dev_config usb_rx_cfg = {
  180. .sample_rate = SAMPLING_RATE_48KHZ,
  181. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  182. .channels = 2,
  183. };
  184. static struct dev_config usb_tx_cfg = {
  185. .sample_rate = SAMPLING_RATE_48KHZ,
  186. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  187. .channels = 1,
  188. };
  189. static struct dev_config proxy_rx_cfg = {
  190. .sample_rate = SAMPLING_RATE_48KHZ,
  191. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  192. .channels = 2,
  193. };
  194. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  195. {
  196. AFE_API_VERSION_I2S_CONFIG,
  197. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  198. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  199. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  200. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  201. 0,
  202. },
  203. {
  204. AFE_API_VERSION_I2S_CONFIG,
  205. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  206. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  207. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  208. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  209. 0,
  210. },
  211. {
  212. AFE_API_VERSION_I2S_CONFIG,
  213. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  214. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  215. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  216. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  217. 0,
  218. },
  219. };
  220. struct mi2s_conf {
  221. struct mutex lock;
  222. u32 ref_cnt;
  223. u32 msm_is_mi2s_master;
  224. };
  225. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  226. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  227. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  228. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  229. };
  230. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  231. /* Default configuration of TDM channels */
  232. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  233. { /* PRI TDM */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  242. },
  243. { /* SEC TDM */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  252. },
  253. { /* TERT TDM */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  262. },
  263. };
  264. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  265. { /* PRI TDM */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  274. },
  275. { /* SEC TDM */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  284. },
  285. { /* TERT TDM */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  294. },
  295. };
  296. /* Default configuration of AUX PCM channels */
  297. static struct dev_config aux_pcm_rx_cfg[] = {
  298. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  299. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  300. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  301. };
  302. static struct dev_config aux_pcm_tx_cfg[] = {
  303. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  304. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  305. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  306. };
  307. /* Default configuration of MI2S channels */
  308. static struct dev_config mi2s_rx_cfg[] = {
  309. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  310. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  311. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  312. };
  313. static struct dev_config mi2s_tx_cfg[] = {
  314. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  315. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  316. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  317. };
  318. /* Default configuration of Codec DMA Interface RX */
  319. static struct dev_config cdc_dma_rx_cfg[] = {
  320. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  321. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  322. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  323. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  324. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  325. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  326. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  327. };
  328. /* Default configuration of Codec DMA Interface TX */
  329. static struct dev_config cdc_dma_tx_cfg[] = {
  330. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  331. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  332. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  333. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  334. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  335. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  336. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  337. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  338. [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  339. };
  340. static struct dev_config afe_loopback_tx_cfg[] = {
  341. [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  342. };
  343. static int msm_vi_feed_tx_ch = 2;
  344. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  345. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  346. "S32_LE"};
  347. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  348. "Six", "Seven", "Eight"};
  349. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  350. "KHZ_16", "KHZ_22P05",
  351. "KHZ_32", "KHZ_44P1", "KHZ_48",
  352. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  353. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  354. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  355. "Five", "Six", "Seven",
  356. "Eight"};
  357. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  358. "KHZ_48", "KHZ_176P4",
  359. "KHZ_352P8"};
  360. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  361. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  362. "Five", "Six", "Seven", "Eight"};
  363. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  364. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  365. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  366. "KHZ_48", "KHZ_96", "KHZ_192"};
  367. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  368. "Five", "Six", "Seven",
  369. "Eight"};
  370. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  371. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  372. "Five", "Six", "Seven",
  373. "Eight"};
  374. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  375. "KHZ_16", "KHZ_22P05",
  376. "KHZ_32", "KHZ_44P1", "KHZ_48",
  377. "KHZ_88P2", "KHZ_96",
  378. "KHZ_176P4", "KHZ_192",
  379. "KHZ_352P8", "KHZ_384"};
  380. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  381. "S24_3LE"};
  382. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  383. "KHZ_192", "KHZ_32", "KHZ_44P1",
  384. "KHZ_88P2", "KHZ_176P4"};
  385. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  386. "KHZ_44P1", "KHZ_48",
  387. "KHZ_88P2", "KHZ_96"};
  388. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  389. "KHZ_44P1", "KHZ_48",
  390. "KHZ_88P2", "KHZ_96"};
  391. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  392. "KHZ_44P1", "KHZ_48",
  393. "KHZ_88P2", "KHZ_96"};
  394. static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
  395. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  396. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  397. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  398. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  399. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  400. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  401. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  402. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  403. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  404. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  405. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  406. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  407. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  408. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  409. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  410. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  411. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  412. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  413. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  414. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  415. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  416. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  417. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  418. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  419. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  420. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  421. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  422. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  424. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  425. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  426. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  427. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  428. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  429. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  430. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  431. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  432. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  433. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  434. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  435. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  436. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  437. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  438. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  439. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  440. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  441. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  442. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  443. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  444. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  445. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  446. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  447. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  448. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  449. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  450. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  451. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  452. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  453. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  454. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  455. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  456. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  457. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  459. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  461. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  463. cdc_dma_sample_rate_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  465. cdc_dma_sample_rate_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  467. cdc_dma_sample_rate_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  469. cdc_dma_sample_rate_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  471. cdc_dma_sample_rate_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  473. cdc_dma_sample_rate_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  475. cdc_dma_sample_rate_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  477. cdc_dma_sample_rate_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  479. cdc_dma_sample_rate_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  481. cdc_dma_sample_rate_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  483. cdc_dma_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  485. cdc_dma_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  487. cdc_dma_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  489. cdc_dma_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  491. cdc_dma_sample_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
  493. cdc_dma_sample_rate_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  497. ext_disp_sample_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
  502. static bool is_initial_boot;
  503. static bool codec_reg_done;
  504. static struct snd_soc_aux_dev *msm_aux_dev;
  505. static struct snd_soc_codec_conf *msm_codec_conf;
  506. static struct snd_soc_card snd_soc_card_kona_msm;
  507. static int dmic_0_1_gpio_cnt;
  508. static int dmic_2_3_gpio_cnt;
  509. static int dmic_4_5_gpio_cnt;
  510. static void *def_wcd_mbhc_cal(void);
  511. /*
  512. * Need to report LINEIN
  513. * if R/L channel impedance is larger than 5K ohm
  514. */
  515. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  516. .read_fw_bin = false,
  517. .calibration = NULL,
  518. .detect_extn_cable = true,
  519. .mono_stero_detection = false,
  520. .swap_gnd_mic = NULL,
  521. .hs_ext_micbias = true,
  522. .key_code[0] = KEY_MEDIA,
  523. .key_code[1] = KEY_VOICECOMMAND,
  524. .key_code[2] = KEY_VOLUMEUP,
  525. .key_code[3] = KEY_VOLUMEDOWN,
  526. .key_code[4] = 0,
  527. .key_code[5] = 0,
  528. .key_code[6] = 0,
  529. .key_code[7] = 0,
  530. .linein_th = 5000,
  531. .moisture_en = true,
  532. .mbhc_micbias = MIC_BIAS_2,
  533. .anc_micbias = MIC_BIAS_2,
  534. .enable_anc_mic_detect = false,
  535. };
  536. static inline int param_is_mask(int p)
  537. {
  538. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  539. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  540. }
  541. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  542. int n)
  543. {
  544. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  545. }
  546. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  547. unsigned int bit)
  548. {
  549. if (bit >= SNDRV_MASK_MAX)
  550. return;
  551. if (param_is_mask(n)) {
  552. struct snd_mask *m = param_to_mask(p, n);
  553. m->bits[0] = 0;
  554. m->bits[1] = 0;
  555. m->bits[bit >> 5] |= (1 << (bit & 31));
  556. }
  557. }
  558. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  559. struct snd_ctl_elem_value *ucontrol)
  560. {
  561. int sample_rate_val = 0;
  562. switch (usb_rx_cfg.sample_rate) {
  563. case SAMPLING_RATE_384KHZ:
  564. sample_rate_val = 12;
  565. break;
  566. case SAMPLING_RATE_352P8KHZ:
  567. sample_rate_val = 11;
  568. break;
  569. case SAMPLING_RATE_192KHZ:
  570. sample_rate_val = 10;
  571. break;
  572. case SAMPLING_RATE_176P4KHZ:
  573. sample_rate_val = 9;
  574. break;
  575. case SAMPLING_RATE_96KHZ:
  576. sample_rate_val = 8;
  577. break;
  578. case SAMPLING_RATE_88P2KHZ:
  579. sample_rate_val = 7;
  580. break;
  581. case SAMPLING_RATE_48KHZ:
  582. sample_rate_val = 6;
  583. break;
  584. case SAMPLING_RATE_44P1KHZ:
  585. sample_rate_val = 5;
  586. break;
  587. case SAMPLING_RATE_32KHZ:
  588. sample_rate_val = 4;
  589. break;
  590. case SAMPLING_RATE_22P05KHZ:
  591. sample_rate_val = 3;
  592. break;
  593. case SAMPLING_RATE_16KHZ:
  594. sample_rate_val = 2;
  595. break;
  596. case SAMPLING_RATE_11P025KHZ:
  597. sample_rate_val = 1;
  598. break;
  599. case SAMPLING_RATE_8KHZ:
  600. default:
  601. sample_rate_val = 0;
  602. break;
  603. }
  604. ucontrol->value.integer.value[0] = sample_rate_val;
  605. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  606. usb_rx_cfg.sample_rate);
  607. return 0;
  608. }
  609. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  610. struct snd_ctl_elem_value *ucontrol)
  611. {
  612. switch (ucontrol->value.integer.value[0]) {
  613. case 12:
  614. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  615. break;
  616. case 11:
  617. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  618. break;
  619. case 10:
  620. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  621. break;
  622. case 9:
  623. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  624. break;
  625. case 8:
  626. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  627. break;
  628. case 7:
  629. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  630. break;
  631. case 6:
  632. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  633. break;
  634. case 5:
  635. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  636. break;
  637. case 4:
  638. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  639. break;
  640. case 3:
  641. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  642. break;
  643. case 2:
  644. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  645. break;
  646. case 1:
  647. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  648. break;
  649. case 0:
  650. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  651. break;
  652. default:
  653. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  654. break;
  655. }
  656. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  657. __func__, ucontrol->value.integer.value[0],
  658. usb_rx_cfg.sample_rate);
  659. return 0;
  660. }
  661. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  662. struct snd_ctl_elem_value *ucontrol)
  663. {
  664. int sample_rate_val = 0;
  665. switch (usb_tx_cfg.sample_rate) {
  666. case SAMPLING_RATE_384KHZ:
  667. sample_rate_val = 12;
  668. break;
  669. case SAMPLING_RATE_352P8KHZ:
  670. sample_rate_val = 11;
  671. break;
  672. case SAMPLING_RATE_192KHZ:
  673. sample_rate_val = 10;
  674. break;
  675. case SAMPLING_RATE_176P4KHZ:
  676. sample_rate_val = 9;
  677. break;
  678. case SAMPLING_RATE_96KHZ:
  679. sample_rate_val = 8;
  680. break;
  681. case SAMPLING_RATE_88P2KHZ:
  682. sample_rate_val = 7;
  683. break;
  684. case SAMPLING_RATE_48KHZ:
  685. sample_rate_val = 6;
  686. break;
  687. case SAMPLING_RATE_44P1KHZ:
  688. sample_rate_val = 5;
  689. break;
  690. case SAMPLING_RATE_32KHZ:
  691. sample_rate_val = 4;
  692. break;
  693. case SAMPLING_RATE_22P05KHZ:
  694. sample_rate_val = 3;
  695. break;
  696. case SAMPLING_RATE_16KHZ:
  697. sample_rate_val = 2;
  698. break;
  699. case SAMPLING_RATE_11P025KHZ:
  700. sample_rate_val = 1;
  701. break;
  702. case SAMPLING_RATE_8KHZ:
  703. sample_rate_val = 0;
  704. break;
  705. default:
  706. sample_rate_val = 6;
  707. break;
  708. }
  709. ucontrol->value.integer.value[0] = sample_rate_val;
  710. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  711. usb_tx_cfg.sample_rate);
  712. return 0;
  713. }
  714. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  715. struct snd_ctl_elem_value *ucontrol)
  716. {
  717. switch (ucontrol->value.integer.value[0]) {
  718. case 12:
  719. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  720. break;
  721. case 11:
  722. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  723. break;
  724. case 10:
  725. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  726. break;
  727. case 9:
  728. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  729. break;
  730. case 8:
  731. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  732. break;
  733. case 7:
  734. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  735. break;
  736. case 6:
  737. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  738. break;
  739. case 5:
  740. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  741. break;
  742. case 4:
  743. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  744. break;
  745. case 3:
  746. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  747. break;
  748. case 2:
  749. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  750. break;
  751. case 1:
  752. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  753. break;
  754. case 0:
  755. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  756. break;
  757. default:
  758. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  759. break;
  760. }
  761. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  762. __func__, ucontrol->value.integer.value[0],
  763. usb_tx_cfg.sample_rate);
  764. return 0;
  765. }
  766. static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
  767. struct snd_ctl_elem_value *ucontrol)
  768. {
  769. pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
  770. afe_loopback_tx_cfg[0].channels);
  771. ucontrol->value.enumerated.item[0] =
  772. afe_loopback_tx_cfg[0].channels - 1;
  773. return 0;
  774. }
  775. static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
  776. struct snd_ctl_elem_value *ucontrol)
  777. {
  778. afe_loopback_tx_cfg[0].channels =
  779. ucontrol->value.enumerated.item[0] + 1;
  780. pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
  781. afe_loopback_tx_cfg[0].channels);
  782. return 1;
  783. }
  784. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  785. struct snd_ctl_elem_value *ucontrol)
  786. {
  787. switch (usb_rx_cfg.bit_format) {
  788. case SNDRV_PCM_FORMAT_S32_LE:
  789. ucontrol->value.integer.value[0] = 3;
  790. break;
  791. case SNDRV_PCM_FORMAT_S24_3LE:
  792. ucontrol->value.integer.value[0] = 2;
  793. break;
  794. case SNDRV_PCM_FORMAT_S24_LE:
  795. ucontrol->value.integer.value[0] = 1;
  796. break;
  797. case SNDRV_PCM_FORMAT_S16_LE:
  798. default:
  799. ucontrol->value.integer.value[0] = 0;
  800. break;
  801. }
  802. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  803. __func__, usb_rx_cfg.bit_format,
  804. ucontrol->value.integer.value[0]);
  805. return 0;
  806. }
  807. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  808. struct snd_ctl_elem_value *ucontrol)
  809. {
  810. int rc = 0;
  811. switch (ucontrol->value.integer.value[0]) {
  812. case 3:
  813. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  814. break;
  815. case 2:
  816. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  817. break;
  818. case 1:
  819. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  820. break;
  821. case 0:
  822. default:
  823. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  824. break;
  825. }
  826. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  827. __func__, usb_rx_cfg.bit_format,
  828. ucontrol->value.integer.value[0]);
  829. return rc;
  830. }
  831. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  832. struct snd_ctl_elem_value *ucontrol)
  833. {
  834. switch (usb_tx_cfg.bit_format) {
  835. case SNDRV_PCM_FORMAT_S32_LE:
  836. ucontrol->value.integer.value[0] = 3;
  837. break;
  838. case SNDRV_PCM_FORMAT_S24_3LE:
  839. ucontrol->value.integer.value[0] = 2;
  840. break;
  841. case SNDRV_PCM_FORMAT_S24_LE:
  842. ucontrol->value.integer.value[0] = 1;
  843. break;
  844. case SNDRV_PCM_FORMAT_S16_LE:
  845. default:
  846. ucontrol->value.integer.value[0] = 0;
  847. break;
  848. }
  849. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  850. __func__, usb_tx_cfg.bit_format,
  851. ucontrol->value.integer.value[0]);
  852. return 0;
  853. }
  854. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  855. struct snd_ctl_elem_value *ucontrol)
  856. {
  857. int rc = 0;
  858. switch (ucontrol->value.integer.value[0]) {
  859. case 3:
  860. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  861. break;
  862. case 2:
  863. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  864. break;
  865. case 1:
  866. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  867. break;
  868. case 0:
  869. default:
  870. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  871. break;
  872. }
  873. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  874. __func__, usb_tx_cfg.bit_format,
  875. ucontrol->value.integer.value[0]);
  876. return rc;
  877. }
  878. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  879. struct snd_ctl_elem_value *ucontrol)
  880. {
  881. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  882. usb_rx_cfg.channels);
  883. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  884. return 0;
  885. }
  886. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  887. struct snd_ctl_elem_value *ucontrol)
  888. {
  889. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  890. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  891. return 1;
  892. }
  893. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  894. struct snd_ctl_elem_value *ucontrol)
  895. {
  896. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  897. usb_tx_cfg.channels);
  898. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  899. return 0;
  900. }
  901. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  902. struct snd_ctl_elem_value *ucontrol)
  903. {
  904. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  905. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  906. return 1;
  907. }
  908. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  909. struct snd_ctl_elem_value *ucontrol)
  910. {
  911. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  912. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  913. ucontrol->value.integer.value[0]);
  914. return 0;
  915. }
  916. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  917. struct snd_ctl_elem_value *ucontrol)
  918. {
  919. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  920. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  921. return 1;
  922. }
  923. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  924. {
  925. int idx = 0;
  926. if (strnstr(kcontrol->id.name, "Display Port RX",
  927. sizeof("Display Port RX"))) {
  928. idx = EXT_DISP_RX_IDX_DP;
  929. } else {
  930. pr_err("%s: unsupported BE: %s\n",
  931. __func__, kcontrol->id.name);
  932. idx = -EINVAL;
  933. }
  934. return idx;
  935. }
  936. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  937. struct snd_ctl_elem_value *ucontrol)
  938. {
  939. int idx = ext_disp_get_port_idx(kcontrol);
  940. if (idx < 0)
  941. return idx;
  942. switch (ext_disp_rx_cfg[idx].bit_format) {
  943. case SNDRV_PCM_FORMAT_S24_3LE:
  944. ucontrol->value.integer.value[0] = 2;
  945. break;
  946. case SNDRV_PCM_FORMAT_S24_LE:
  947. ucontrol->value.integer.value[0] = 1;
  948. break;
  949. case SNDRV_PCM_FORMAT_S16_LE:
  950. default:
  951. ucontrol->value.integer.value[0] = 0;
  952. break;
  953. }
  954. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  955. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  956. ucontrol->value.integer.value[0]);
  957. return 0;
  958. }
  959. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  960. struct snd_ctl_elem_value *ucontrol)
  961. {
  962. int idx = ext_disp_get_port_idx(kcontrol);
  963. if (idx < 0)
  964. return idx;
  965. switch (ucontrol->value.integer.value[0]) {
  966. case 2:
  967. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  968. break;
  969. case 1:
  970. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  971. break;
  972. case 0:
  973. default:
  974. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  975. break;
  976. }
  977. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  978. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  979. ucontrol->value.integer.value[0]);
  980. return 0;
  981. }
  982. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  983. struct snd_ctl_elem_value *ucontrol)
  984. {
  985. int idx = ext_disp_get_port_idx(kcontrol);
  986. if (idx < 0)
  987. return idx;
  988. ucontrol->value.integer.value[0] =
  989. ext_disp_rx_cfg[idx].channels - 2;
  990. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  991. idx, ext_disp_rx_cfg[idx].channels);
  992. return 0;
  993. }
  994. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  995. struct snd_ctl_elem_value *ucontrol)
  996. {
  997. int idx = ext_disp_get_port_idx(kcontrol);
  998. if (idx < 0)
  999. return idx;
  1000. ext_disp_rx_cfg[idx].channels =
  1001. ucontrol->value.integer.value[0] + 2;
  1002. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1003. idx, ext_disp_rx_cfg[idx].channels);
  1004. return 1;
  1005. }
  1006. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1007. struct snd_ctl_elem_value *ucontrol)
  1008. {
  1009. int sample_rate_val;
  1010. int idx = ext_disp_get_port_idx(kcontrol);
  1011. if (idx < 0)
  1012. return idx;
  1013. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1014. case SAMPLING_RATE_176P4KHZ:
  1015. sample_rate_val = 6;
  1016. break;
  1017. case SAMPLING_RATE_88P2KHZ:
  1018. sample_rate_val = 5;
  1019. break;
  1020. case SAMPLING_RATE_44P1KHZ:
  1021. sample_rate_val = 4;
  1022. break;
  1023. case SAMPLING_RATE_32KHZ:
  1024. sample_rate_val = 3;
  1025. break;
  1026. case SAMPLING_RATE_192KHZ:
  1027. sample_rate_val = 2;
  1028. break;
  1029. case SAMPLING_RATE_96KHZ:
  1030. sample_rate_val = 1;
  1031. break;
  1032. case SAMPLING_RATE_48KHZ:
  1033. default:
  1034. sample_rate_val = 0;
  1035. break;
  1036. }
  1037. ucontrol->value.integer.value[0] = sample_rate_val;
  1038. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1039. idx, ext_disp_rx_cfg[idx].sample_rate);
  1040. return 0;
  1041. }
  1042. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1043. struct snd_ctl_elem_value *ucontrol)
  1044. {
  1045. int idx = ext_disp_get_port_idx(kcontrol);
  1046. if (idx < 0)
  1047. return idx;
  1048. switch (ucontrol->value.integer.value[0]) {
  1049. case 6:
  1050. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1051. break;
  1052. case 5:
  1053. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1054. break;
  1055. case 4:
  1056. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1057. break;
  1058. case 3:
  1059. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1060. break;
  1061. case 2:
  1062. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1063. break;
  1064. case 1:
  1065. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1066. break;
  1067. case 0:
  1068. default:
  1069. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1070. break;
  1071. }
  1072. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1073. __func__, ucontrol->value.integer.value[0], idx,
  1074. ext_disp_rx_cfg[idx].sample_rate);
  1075. return 0;
  1076. }
  1077. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1078. struct snd_ctl_elem_value *ucontrol)
  1079. {
  1080. pr_debug("%s: proxy_rx channels = %d\n",
  1081. __func__, proxy_rx_cfg.channels);
  1082. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1083. return 0;
  1084. }
  1085. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1086. struct snd_ctl_elem_value *ucontrol)
  1087. {
  1088. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1089. pr_debug("%s: proxy_rx channels = %d\n",
  1090. __func__, proxy_rx_cfg.channels);
  1091. return 1;
  1092. }
  1093. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  1094. struct tdm_port *port)
  1095. {
  1096. if (port) {
  1097. if (strnstr(kcontrol->id.name, "PRI",
  1098. sizeof(kcontrol->id.name))) {
  1099. port->mode = TDM_PRI;
  1100. } else if (strnstr(kcontrol->id.name, "SEC",
  1101. sizeof(kcontrol->id.name))) {
  1102. port->mode = TDM_SEC;
  1103. } else if (strnstr(kcontrol->id.name, "TERT",
  1104. sizeof(kcontrol->id.name))) {
  1105. port->mode = TDM_TERT;
  1106. } else {
  1107. pr_err("%s: unsupported mode in: %s\n",
  1108. __func__, kcontrol->id.name);
  1109. return -EINVAL;
  1110. }
  1111. if (strnstr(kcontrol->id.name, "RX_0",
  1112. sizeof(kcontrol->id.name)) ||
  1113. strnstr(kcontrol->id.name, "TX_0",
  1114. sizeof(kcontrol->id.name))) {
  1115. port->channel = TDM_0;
  1116. } else if (strnstr(kcontrol->id.name, "RX_1",
  1117. sizeof(kcontrol->id.name)) ||
  1118. strnstr(kcontrol->id.name, "TX_1",
  1119. sizeof(kcontrol->id.name))) {
  1120. port->channel = TDM_1;
  1121. } else if (strnstr(kcontrol->id.name, "RX_2",
  1122. sizeof(kcontrol->id.name)) ||
  1123. strnstr(kcontrol->id.name, "TX_2",
  1124. sizeof(kcontrol->id.name))) {
  1125. port->channel = TDM_2;
  1126. } else if (strnstr(kcontrol->id.name, "RX_3",
  1127. sizeof(kcontrol->id.name)) ||
  1128. strnstr(kcontrol->id.name, "TX_3",
  1129. sizeof(kcontrol->id.name))) {
  1130. port->channel = TDM_3;
  1131. } else if (strnstr(kcontrol->id.name, "RX_4",
  1132. sizeof(kcontrol->id.name)) ||
  1133. strnstr(kcontrol->id.name, "TX_4",
  1134. sizeof(kcontrol->id.name))) {
  1135. port->channel = TDM_4;
  1136. } else if (strnstr(kcontrol->id.name, "RX_5",
  1137. sizeof(kcontrol->id.name)) ||
  1138. strnstr(kcontrol->id.name, "TX_5",
  1139. sizeof(kcontrol->id.name))) {
  1140. port->channel = TDM_5;
  1141. } else if (strnstr(kcontrol->id.name, "RX_6",
  1142. sizeof(kcontrol->id.name)) ||
  1143. strnstr(kcontrol->id.name, "TX_6",
  1144. sizeof(kcontrol->id.name))) {
  1145. port->channel = TDM_6;
  1146. } else if (strnstr(kcontrol->id.name, "RX_7",
  1147. sizeof(kcontrol->id.name)) ||
  1148. strnstr(kcontrol->id.name, "TX_7",
  1149. sizeof(kcontrol->id.name))) {
  1150. port->channel = TDM_7;
  1151. } else {
  1152. pr_err("%s: unsupported channel in: %s\n",
  1153. __func__, kcontrol->id.name);
  1154. return -EINVAL;
  1155. }
  1156. } else {
  1157. return -EINVAL;
  1158. }
  1159. return 0;
  1160. }
  1161. static int tdm_get_sample_rate(int value)
  1162. {
  1163. int sample_rate = 0;
  1164. switch (value) {
  1165. case 0:
  1166. sample_rate = SAMPLING_RATE_8KHZ;
  1167. break;
  1168. case 1:
  1169. sample_rate = SAMPLING_RATE_16KHZ;
  1170. break;
  1171. case 2:
  1172. sample_rate = SAMPLING_RATE_32KHZ;
  1173. break;
  1174. case 3:
  1175. sample_rate = SAMPLING_RATE_48KHZ;
  1176. break;
  1177. case 4:
  1178. sample_rate = SAMPLING_RATE_176P4KHZ;
  1179. break;
  1180. case 5:
  1181. sample_rate = SAMPLING_RATE_352P8KHZ;
  1182. break;
  1183. default:
  1184. sample_rate = SAMPLING_RATE_48KHZ;
  1185. break;
  1186. }
  1187. return sample_rate;
  1188. }
  1189. static int tdm_get_sample_rate_val(int sample_rate)
  1190. {
  1191. int sample_rate_val = 0;
  1192. switch (sample_rate) {
  1193. case SAMPLING_RATE_8KHZ:
  1194. sample_rate_val = 0;
  1195. break;
  1196. case SAMPLING_RATE_16KHZ:
  1197. sample_rate_val = 1;
  1198. break;
  1199. case SAMPLING_RATE_32KHZ:
  1200. sample_rate_val = 2;
  1201. break;
  1202. case SAMPLING_RATE_48KHZ:
  1203. sample_rate_val = 3;
  1204. break;
  1205. case SAMPLING_RATE_176P4KHZ:
  1206. sample_rate_val = 4;
  1207. break;
  1208. case SAMPLING_RATE_352P8KHZ:
  1209. sample_rate_val = 5;
  1210. break;
  1211. default:
  1212. sample_rate_val = 3;
  1213. break;
  1214. }
  1215. return sample_rate_val;
  1216. }
  1217. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1218. struct snd_ctl_elem_value *ucontrol)
  1219. {
  1220. struct tdm_port port;
  1221. int ret = tdm_get_port_idx(kcontrol, &port);
  1222. if (ret) {
  1223. pr_err("%s: unsupported control: %s\n",
  1224. __func__, kcontrol->id.name);
  1225. } else {
  1226. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1227. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  1228. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1229. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1230. ucontrol->value.enumerated.item[0]);
  1231. }
  1232. return ret;
  1233. }
  1234. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1235. struct snd_ctl_elem_value *ucontrol)
  1236. {
  1237. struct tdm_port port;
  1238. int ret = tdm_get_port_idx(kcontrol, &port);
  1239. if (ret) {
  1240. pr_err("%s: unsupported control: %s\n",
  1241. __func__, kcontrol->id.name);
  1242. } else {
  1243. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  1244. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1245. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1246. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1247. ucontrol->value.enumerated.item[0]);
  1248. }
  1249. return ret;
  1250. }
  1251. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1252. struct snd_ctl_elem_value *ucontrol)
  1253. {
  1254. struct tdm_port port;
  1255. int ret = tdm_get_port_idx(kcontrol, &port);
  1256. if (ret) {
  1257. pr_err("%s: unsupported control: %s\n",
  1258. __func__, kcontrol->id.name);
  1259. } else {
  1260. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1261. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1262. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1263. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1264. ucontrol->value.enumerated.item[0]);
  1265. }
  1266. return ret;
  1267. }
  1268. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1269. struct snd_ctl_elem_value *ucontrol)
  1270. {
  1271. struct tdm_port port;
  1272. int ret = tdm_get_port_idx(kcontrol, &port);
  1273. if (ret) {
  1274. pr_err("%s: unsupported control: %s\n",
  1275. __func__, kcontrol->id.name);
  1276. } else {
  1277. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1278. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1279. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1280. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1281. ucontrol->value.enumerated.item[0]);
  1282. }
  1283. return ret;
  1284. }
  1285. static int tdm_get_format(int value)
  1286. {
  1287. int format = 0;
  1288. switch (value) {
  1289. case 0:
  1290. format = SNDRV_PCM_FORMAT_S16_LE;
  1291. break;
  1292. case 1:
  1293. format = SNDRV_PCM_FORMAT_S24_LE;
  1294. break;
  1295. case 2:
  1296. format = SNDRV_PCM_FORMAT_S32_LE;
  1297. break;
  1298. default:
  1299. format = SNDRV_PCM_FORMAT_S16_LE;
  1300. break;
  1301. }
  1302. return format;
  1303. }
  1304. static int tdm_get_format_val(int format)
  1305. {
  1306. int value = 0;
  1307. switch (format) {
  1308. case SNDRV_PCM_FORMAT_S16_LE:
  1309. value = 0;
  1310. break;
  1311. case SNDRV_PCM_FORMAT_S24_LE:
  1312. value = 1;
  1313. break;
  1314. case SNDRV_PCM_FORMAT_S32_LE:
  1315. value = 2;
  1316. break;
  1317. default:
  1318. value = 0;
  1319. break;
  1320. }
  1321. return value;
  1322. }
  1323. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1324. struct snd_ctl_elem_value *ucontrol)
  1325. {
  1326. struct tdm_port port;
  1327. int ret = tdm_get_port_idx(kcontrol, &port);
  1328. if (ret) {
  1329. pr_err("%s: unsupported control: %s\n",
  1330. __func__, kcontrol->id.name);
  1331. } else {
  1332. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1333. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1334. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1335. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1336. ucontrol->value.enumerated.item[0]);
  1337. }
  1338. return ret;
  1339. }
  1340. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1341. struct snd_ctl_elem_value *ucontrol)
  1342. {
  1343. struct tdm_port port;
  1344. int ret = tdm_get_port_idx(kcontrol, &port);
  1345. if (ret) {
  1346. pr_err("%s: unsupported control: %s\n",
  1347. __func__, kcontrol->id.name);
  1348. } else {
  1349. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1350. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1351. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1352. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1353. ucontrol->value.enumerated.item[0]);
  1354. }
  1355. return ret;
  1356. }
  1357. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1358. struct snd_ctl_elem_value *ucontrol)
  1359. {
  1360. struct tdm_port port;
  1361. int ret = tdm_get_port_idx(kcontrol, &port);
  1362. if (ret) {
  1363. pr_err("%s: unsupported control: %s\n",
  1364. __func__, kcontrol->id.name);
  1365. } else {
  1366. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1367. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1368. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1369. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1370. ucontrol->value.enumerated.item[0]);
  1371. }
  1372. return ret;
  1373. }
  1374. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1375. struct snd_ctl_elem_value *ucontrol)
  1376. {
  1377. struct tdm_port port;
  1378. int ret = tdm_get_port_idx(kcontrol, &port);
  1379. if (ret) {
  1380. pr_err("%s: unsupported control: %s\n",
  1381. __func__, kcontrol->id.name);
  1382. } else {
  1383. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1384. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1385. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1386. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1387. ucontrol->value.enumerated.item[0]);
  1388. }
  1389. return ret;
  1390. }
  1391. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1392. struct snd_ctl_elem_value *ucontrol)
  1393. {
  1394. struct tdm_port port;
  1395. int ret = tdm_get_port_idx(kcontrol, &port);
  1396. if (ret) {
  1397. pr_err("%s: unsupported control: %s\n",
  1398. __func__, kcontrol->id.name);
  1399. } else {
  1400. ucontrol->value.enumerated.item[0] =
  1401. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1402. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1403. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1404. ucontrol->value.enumerated.item[0]);
  1405. }
  1406. return ret;
  1407. }
  1408. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1409. struct snd_ctl_elem_value *ucontrol)
  1410. {
  1411. struct tdm_port port;
  1412. int ret = tdm_get_port_idx(kcontrol, &port);
  1413. if (ret) {
  1414. pr_err("%s: unsupported control: %s\n",
  1415. __func__, kcontrol->id.name);
  1416. } else {
  1417. tdm_rx_cfg[port.mode][port.channel].channels =
  1418. ucontrol->value.enumerated.item[0] + 1;
  1419. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1420. tdm_rx_cfg[port.mode][port.channel].channels,
  1421. ucontrol->value.enumerated.item[0] + 1);
  1422. }
  1423. return ret;
  1424. }
  1425. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1426. struct snd_ctl_elem_value *ucontrol)
  1427. {
  1428. struct tdm_port port;
  1429. int ret = tdm_get_port_idx(kcontrol, &port);
  1430. if (ret) {
  1431. pr_err("%s: unsupported control: %s\n",
  1432. __func__, kcontrol->id.name);
  1433. } else {
  1434. ucontrol->value.enumerated.item[0] =
  1435. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1436. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1437. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1438. ucontrol->value.enumerated.item[0]);
  1439. }
  1440. return ret;
  1441. }
  1442. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1443. struct snd_ctl_elem_value *ucontrol)
  1444. {
  1445. struct tdm_port port;
  1446. int ret = tdm_get_port_idx(kcontrol, &port);
  1447. if (ret) {
  1448. pr_err("%s: unsupported control: %s\n",
  1449. __func__, kcontrol->id.name);
  1450. } else {
  1451. tdm_tx_cfg[port.mode][port.channel].channels =
  1452. ucontrol->value.enumerated.item[0] + 1;
  1453. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1454. tdm_tx_cfg[port.mode][port.channel].channels,
  1455. ucontrol->value.enumerated.item[0] + 1);
  1456. }
  1457. return ret;
  1458. }
  1459. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1460. {
  1461. int idx = 0;
  1462. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1463. sizeof("PRIM_AUX_PCM"))) {
  1464. idx = PRIM_AUX_PCM;
  1465. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1466. sizeof("SEC_AUX_PCM"))) {
  1467. idx = SEC_AUX_PCM;
  1468. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1469. sizeof("TERT_AUX_PCM"))) {
  1470. idx = TERT_AUX_PCM;
  1471. } else {
  1472. pr_err("%s: unsupported port: %s\n",
  1473. __func__, kcontrol->id.name);
  1474. idx = -EINVAL;
  1475. }
  1476. return idx;
  1477. }
  1478. static int aux_pcm_get_sample_rate(int value)
  1479. {
  1480. int sample_rate = 0;
  1481. switch (value) {
  1482. case 1:
  1483. sample_rate = SAMPLING_RATE_16KHZ;
  1484. break;
  1485. case 0:
  1486. default:
  1487. sample_rate = SAMPLING_RATE_8KHZ;
  1488. break;
  1489. }
  1490. return sample_rate;
  1491. }
  1492. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1493. {
  1494. int sample_rate_val = 0;
  1495. switch (sample_rate) {
  1496. case SAMPLING_RATE_16KHZ:
  1497. sample_rate_val = 1;
  1498. break;
  1499. case SAMPLING_RATE_8KHZ:
  1500. default:
  1501. sample_rate_val = 0;
  1502. break;
  1503. }
  1504. return sample_rate_val;
  1505. }
  1506. static int mi2s_auxpcm_get_format(int value)
  1507. {
  1508. int format = 0;
  1509. switch (value) {
  1510. case 0:
  1511. format = SNDRV_PCM_FORMAT_S16_LE;
  1512. break;
  1513. case 1:
  1514. format = SNDRV_PCM_FORMAT_S24_LE;
  1515. break;
  1516. case 2:
  1517. format = SNDRV_PCM_FORMAT_S24_3LE;
  1518. break;
  1519. case 3:
  1520. format = SNDRV_PCM_FORMAT_S32_LE;
  1521. break;
  1522. default:
  1523. format = SNDRV_PCM_FORMAT_S16_LE;
  1524. break;
  1525. }
  1526. return format;
  1527. }
  1528. static int mi2s_auxpcm_get_format_value(int format)
  1529. {
  1530. int value = 0;
  1531. switch (format) {
  1532. case SNDRV_PCM_FORMAT_S16_LE:
  1533. value = 0;
  1534. break;
  1535. case SNDRV_PCM_FORMAT_S24_LE:
  1536. value = 1;
  1537. break;
  1538. case SNDRV_PCM_FORMAT_S24_3LE:
  1539. value = 2;
  1540. break;
  1541. case SNDRV_PCM_FORMAT_S32_LE:
  1542. value = 3;
  1543. break;
  1544. default:
  1545. value = 0;
  1546. break;
  1547. }
  1548. return value;
  1549. }
  1550. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1551. struct snd_ctl_elem_value *ucontrol)
  1552. {
  1553. int idx = aux_pcm_get_port_idx(kcontrol);
  1554. if (idx < 0)
  1555. return idx;
  1556. ucontrol->value.enumerated.item[0] =
  1557. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1558. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1559. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1560. ucontrol->value.enumerated.item[0]);
  1561. return 0;
  1562. }
  1563. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1564. struct snd_ctl_elem_value *ucontrol)
  1565. {
  1566. int idx = aux_pcm_get_port_idx(kcontrol);
  1567. if (idx < 0)
  1568. return idx;
  1569. aux_pcm_rx_cfg[idx].sample_rate =
  1570. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1571. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1572. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1573. ucontrol->value.enumerated.item[0]);
  1574. return 0;
  1575. }
  1576. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1577. struct snd_ctl_elem_value *ucontrol)
  1578. {
  1579. int idx = aux_pcm_get_port_idx(kcontrol);
  1580. if (idx < 0)
  1581. return idx;
  1582. ucontrol->value.enumerated.item[0] =
  1583. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1584. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1585. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1586. ucontrol->value.enumerated.item[0]);
  1587. return 0;
  1588. }
  1589. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1590. struct snd_ctl_elem_value *ucontrol)
  1591. {
  1592. int idx = aux_pcm_get_port_idx(kcontrol);
  1593. if (idx < 0)
  1594. return idx;
  1595. aux_pcm_tx_cfg[idx].sample_rate =
  1596. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1597. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1598. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1599. ucontrol->value.enumerated.item[0]);
  1600. return 0;
  1601. }
  1602. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1603. struct snd_ctl_elem_value *ucontrol)
  1604. {
  1605. int idx = aux_pcm_get_port_idx(kcontrol);
  1606. if (idx < 0)
  1607. return idx;
  1608. ucontrol->value.enumerated.item[0] =
  1609. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1610. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1611. idx, aux_pcm_rx_cfg[idx].bit_format,
  1612. ucontrol->value.enumerated.item[0]);
  1613. return 0;
  1614. }
  1615. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1616. struct snd_ctl_elem_value *ucontrol)
  1617. {
  1618. int idx = aux_pcm_get_port_idx(kcontrol);
  1619. if (idx < 0)
  1620. return idx;
  1621. aux_pcm_rx_cfg[idx].bit_format =
  1622. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1623. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1624. idx, aux_pcm_rx_cfg[idx].bit_format,
  1625. ucontrol->value.enumerated.item[0]);
  1626. return 0;
  1627. }
  1628. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1629. struct snd_ctl_elem_value *ucontrol)
  1630. {
  1631. int idx = aux_pcm_get_port_idx(kcontrol);
  1632. if (idx < 0)
  1633. return idx;
  1634. ucontrol->value.enumerated.item[0] =
  1635. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1636. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1637. idx, aux_pcm_tx_cfg[idx].bit_format,
  1638. ucontrol->value.enumerated.item[0]);
  1639. return 0;
  1640. }
  1641. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1642. struct snd_ctl_elem_value *ucontrol)
  1643. {
  1644. int idx = aux_pcm_get_port_idx(kcontrol);
  1645. if (idx < 0)
  1646. return idx;
  1647. aux_pcm_tx_cfg[idx].bit_format =
  1648. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1649. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1650. idx, aux_pcm_tx_cfg[idx].bit_format,
  1651. ucontrol->value.enumerated.item[0]);
  1652. return 0;
  1653. }
  1654. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1655. {
  1656. int idx = 0;
  1657. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1658. sizeof("PRIM_MI2S_RX"))) {
  1659. idx = PRIM_MI2S;
  1660. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1661. sizeof("SEC_MI2S_RX"))) {
  1662. idx = SEC_MI2S;
  1663. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1664. sizeof("TERT_MI2S_RX"))) {
  1665. idx = TERT_MI2S;
  1666. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1667. sizeof("PRIM_MI2S_TX"))) {
  1668. idx = PRIM_MI2S;
  1669. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1670. sizeof("SEC_MI2S_TX"))) {
  1671. idx = SEC_MI2S;
  1672. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1673. sizeof("TERT_MI2S_TX"))) {
  1674. idx = TERT_MI2S;
  1675. } else {
  1676. pr_err("%s: unsupported channel: %s\n",
  1677. __func__, kcontrol->id.name);
  1678. idx = -EINVAL;
  1679. }
  1680. return idx;
  1681. }
  1682. static int mi2s_get_sample_rate(int value)
  1683. {
  1684. int sample_rate = 0;
  1685. switch (value) {
  1686. case 0:
  1687. sample_rate = SAMPLING_RATE_8KHZ;
  1688. break;
  1689. case 1:
  1690. sample_rate = SAMPLING_RATE_11P025KHZ;
  1691. break;
  1692. case 2:
  1693. sample_rate = SAMPLING_RATE_16KHZ;
  1694. break;
  1695. case 3:
  1696. sample_rate = SAMPLING_RATE_22P05KHZ;
  1697. break;
  1698. case 4:
  1699. sample_rate = SAMPLING_RATE_32KHZ;
  1700. break;
  1701. case 5:
  1702. sample_rate = SAMPLING_RATE_44P1KHZ;
  1703. break;
  1704. case 6:
  1705. sample_rate = SAMPLING_RATE_48KHZ;
  1706. break;
  1707. case 7:
  1708. sample_rate = SAMPLING_RATE_96KHZ;
  1709. break;
  1710. case 8:
  1711. sample_rate = SAMPLING_RATE_192KHZ;
  1712. break;
  1713. default:
  1714. sample_rate = SAMPLING_RATE_48KHZ;
  1715. break;
  1716. }
  1717. return sample_rate;
  1718. }
  1719. static int mi2s_get_sample_rate_val(int sample_rate)
  1720. {
  1721. int sample_rate_val = 0;
  1722. switch (sample_rate) {
  1723. case SAMPLING_RATE_8KHZ:
  1724. sample_rate_val = 0;
  1725. break;
  1726. case SAMPLING_RATE_11P025KHZ:
  1727. sample_rate_val = 1;
  1728. break;
  1729. case SAMPLING_RATE_16KHZ:
  1730. sample_rate_val = 2;
  1731. break;
  1732. case SAMPLING_RATE_22P05KHZ:
  1733. sample_rate_val = 3;
  1734. break;
  1735. case SAMPLING_RATE_32KHZ:
  1736. sample_rate_val = 4;
  1737. break;
  1738. case SAMPLING_RATE_44P1KHZ:
  1739. sample_rate_val = 5;
  1740. break;
  1741. case SAMPLING_RATE_48KHZ:
  1742. sample_rate_val = 6;
  1743. break;
  1744. case SAMPLING_RATE_96KHZ:
  1745. sample_rate_val = 7;
  1746. break;
  1747. case SAMPLING_RATE_192KHZ:
  1748. sample_rate_val = 8;
  1749. break;
  1750. default:
  1751. sample_rate_val = 6;
  1752. break;
  1753. }
  1754. return sample_rate_val;
  1755. }
  1756. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1757. struct snd_ctl_elem_value *ucontrol)
  1758. {
  1759. int idx = mi2s_get_port_idx(kcontrol);
  1760. if (idx < 0)
  1761. return idx;
  1762. ucontrol->value.enumerated.item[0] =
  1763. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1764. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1765. idx, mi2s_rx_cfg[idx].sample_rate,
  1766. ucontrol->value.enumerated.item[0]);
  1767. return 0;
  1768. }
  1769. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1770. struct snd_ctl_elem_value *ucontrol)
  1771. {
  1772. int idx = mi2s_get_port_idx(kcontrol);
  1773. if (idx < 0)
  1774. return idx;
  1775. mi2s_rx_cfg[idx].sample_rate =
  1776. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1777. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1778. idx, mi2s_rx_cfg[idx].sample_rate,
  1779. ucontrol->value.enumerated.item[0]);
  1780. return 0;
  1781. }
  1782. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1783. struct snd_ctl_elem_value *ucontrol)
  1784. {
  1785. int idx = mi2s_get_port_idx(kcontrol);
  1786. if (idx < 0)
  1787. return idx;
  1788. ucontrol->value.enumerated.item[0] =
  1789. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1790. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1791. idx, mi2s_tx_cfg[idx].sample_rate,
  1792. ucontrol->value.enumerated.item[0]);
  1793. return 0;
  1794. }
  1795. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1796. struct snd_ctl_elem_value *ucontrol)
  1797. {
  1798. int idx = mi2s_get_port_idx(kcontrol);
  1799. if (idx < 0)
  1800. return idx;
  1801. mi2s_tx_cfg[idx].sample_rate =
  1802. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1803. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1804. idx, mi2s_tx_cfg[idx].sample_rate,
  1805. ucontrol->value.enumerated.item[0]);
  1806. return 0;
  1807. }
  1808. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1809. struct snd_ctl_elem_value *ucontrol)
  1810. {
  1811. int idx = mi2s_get_port_idx(kcontrol);
  1812. if (idx < 0)
  1813. return idx;
  1814. ucontrol->value.enumerated.item[0] =
  1815. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1816. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1817. idx, mi2s_rx_cfg[idx].bit_format,
  1818. ucontrol->value.enumerated.item[0]);
  1819. return 0;
  1820. }
  1821. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1822. struct snd_ctl_elem_value *ucontrol)
  1823. {
  1824. int idx = mi2s_get_port_idx(kcontrol);
  1825. if (idx < 0)
  1826. return idx;
  1827. mi2s_rx_cfg[idx].bit_format =
  1828. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1829. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1830. idx, mi2s_rx_cfg[idx].bit_format,
  1831. ucontrol->value.enumerated.item[0]);
  1832. return 0;
  1833. }
  1834. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1835. struct snd_ctl_elem_value *ucontrol)
  1836. {
  1837. int idx = mi2s_get_port_idx(kcontrol);
  1838. if (idx < 0)
  1839. return idx;
  1840. ucontrol->value.enumerated.item[0] =
  1841. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1842. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1843. idx, mi2s_tx_cfg[idx].bit_format,
  1844. ucontrol->value.enumerated.item[0]);
  1845. return 0;
  1846. }
  1847. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1848. struct snd_ctl_elem_value *ucontrol)
  1849. {
  1850. int idx = mi2s_get_port_idx(kcontrol);
  1851. if (idx < 0)
  1852. return idx;
  1853. mi2s_tx_cfg[idx].bit_format =
  1854. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1855. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1856. idx, mi2s_tx_cfg[idx].bit_format,
  1857. ucontrol->value.enumerated.item[0]);
  1858. return 0;
  1859. }
  1860. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1861. struct snd_ctl_elem_value *ucontrol)
  1862. {
  1863. int idx = mi2s_get_port_idx(kcontrol);
  1864. if (idx < 0)
  1865. return idx;
  1866. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1867. idx, mi2s_rx_cfg[idx].channels);
  1868. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1869. return 0;
  1870. }
  1871. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1872. struct snd_ctl_elem_value *ucontrol)
  1873. {
  1874. int idx = mi2s_get_port_idx(kcontrol);
  1875. if (idx < 0)
  1876. return idx;
  1877. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1878. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1879. idx, mi2s_rx_cfg[idx].channels);
  1880. return 1;
  1881. }
  1882. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1883. struct snd_ctl_elem_value *ucontrol)
  1884. {
  1885. int idx = mi2s_get_port_idx(kcontrol);
  1886. if (idx < 0)
  1887. return idx;
  1888. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1889. idx, mi2s_tx_cfg[idx].channels);
  1890. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1891. return 0;
  1892. }
  1893. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1894. struct snd_ctl_elem_value *ucontrol)
  1895. {
  1896. int idx = mi2s_get_port_idx(kcontrol);
  1897. if (idx < 0)
  1898. return idx;
  1899. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1900. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1901. idx, mi2s_tx_cfg[idx].channels);
  1902. return 1;
  1903. }
  1904. static int msm_get_port_id(int be_id)
  1905. {
  1906. int afe_port_id = 0;
  1907. switch (be_id) {
  1908. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1909. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1910. break;
  1911. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1912. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1913. break;
  1914. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1915. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1916. break;
  1917. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1918. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1919. break;
  1920. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1921. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1922. break;
  1923. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1924. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1925. break;
  1926. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  1927. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
  1928. break;
  1929. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  1930. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
  1931. break;
  1932. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  1933. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
  1934. break;
  1935. default:
  1936. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1937. afe_port_id = -EINVAL;
  1938. }
  1939. return afe_port_id;
  1940. }
  1941. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1942. {
  1943. u32 bit_per_sample = 0;
  1944. switch (bit_format) {
  1945. case SNDRV_PCM_FORMAT_S32_LE:
  1946. case SNDRV_PCM_FORMAT_S24_3LE:
  1947. case SNDRV_PCM_FORMAT_S24_LE:
  1948. bit_per_sample = 32;
  1949. break;
  1950. case SNDRV_PCM_FORMAT_S16_LE:
  1951. default:
  1952. bit_per_sample = 16;
  1953. break;
  1954. }
  1955. return bit_per_sample;
  1956. }
  1957. static void update_mi2s_clk_val(int dai_id, int stream)
  1958. {
  1959. u32 bit_per_sample = 0;
  1960. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1961. bit_per_sample =
  1962. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1963. mi2s_clk[dai_id].clk_freq_in_hz =
  1964. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1965. } else {
  1966. bit_per_sample =
  1967. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1968. mi2s_clk[dai_id].clk_freq_in_hz =
  1969. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1970. }
  1971. }
  1972. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1973. {
  1974. int ret = 0;
  1975. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1976. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1977. int port_id = 0;
  1978. int index = cpu_dai->id;
  1979. port_id = msm_get_port_id(rtd->dai_link->id);
  1980. if (port_id < 0) {
  1981. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1982. ret = port_id;
  1983. goto err;
  1984. }
  1985. if (enable) {
  1986. update_mi2s_clk_val(index, substream->stream);
  1987. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1988. mi2s_clk[index].clk_freq_in_hz);
  1989. }
  1990. mi2s_clk[index].enable = enable;
  1991. ret = afe_set_lpass_clock_v2(port_id,
  1992. &mi2s_clk[index]);
  1993. if (ret < 0) {
  1994. dev_err(rtd->card->dev,
  1995. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1996. __func__, port_id, ret);
  1997. goto err;
  1998. }
  1999. err:
  2000. return ret;
  2001. }
  2002. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  2003. {
  2004. int idx = 0;
  2005. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  2006. sizeof("WSA_CDC_DMA_RX_0")))
  2007. idx = WSA_CDC_DMA_RX_0;
  2008. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  2009. sizeof("WSA_CDC_DMA_RX_0")))
  2010. idx = WSA_CDC_DMA_RX_1;
  2011. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  2012. sizeof("RX_CDC_DMA_RX_0")))
  2013. idx = RX_CDC_DMA_RX_0;
  2014. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  2015. sizeof("RX_CDC_DMA_RX_1")))
  2016. idx = RX_CDC_DMA_RX_1;
  2017. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  2018. sizeof("RX_CDC_DMA_RX_2")))
  2019. idx = RX_CDC_DMA_RX_2;
  2020. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  2021. sizeof("RX_CDC_DMA_RX_3")))
  2022. idx = RX_CDC_DMA_RX_3;
  2023. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  2024. sizeof("RX_CDC_DMA_RX_5")))
  2025. idx = RX_CDC_DMA_RX_5;
  2026. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  2027. sizeof("WSA_CDC_DMA_TX_0")))
  2028. idx = WSA_CDC_DMA_TX_0;
  2029. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  2030. sizeof("WSA_CDC_DMA_TX_1")))
  2031. idx = WSA_CDC_DMA_TX_1;
  2032. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  2033. sizeof("WSA_CDC_DMA_TX_2")))
  2034. idx = WSA_CDC_DMA_TX_2;
  2035. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  2036. sizeof("TX_CDC_DMA_TX_0")))
  2037. idx = TX_CDC_DMA_TX_0;
  2038. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  2039. sizeof("TX_CDC_DMA_TX_3")))
  2040. idx = TX_CDC_DMA_TX_3;
  2041. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  2042. sizeof("TX_CDC_DMA_TX_4")))
  2043. idx = TX_CDC_DMA_TX_4;
  2044. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  2045. sizeof("VA_CDC_DMA_TX_0")))
  2046. idx = VA_CDC_DMA_TX_0;
  2047. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  2048. sizeof("VA_CDC_DMA_TX_1")))
  2049. idx = VA_CDC_DMA_TX_1;
  2050. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
  2051. sizeof("VA_CDC_DMA_TX_2")))
  2052. idx = VA_CDC_DMA_TX_2;
  2053. else {
  2054. pr_err("%s: unsupported channel: %s\n",
  2055. __func__, kcontrol->id.name);
  2056. return -EINVAL;
  2057. }
  2058. return idx;
  2059. }
  2060. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  2061. struct snd_ctl_elem_value *ucontrol)
  2062. {
  2063. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2064. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2065. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2066. return ch_num;
  2067. }
  2068. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  2069. cdc_dma_rx_cfg[ch_num].channels - 1);
  2070. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  2071. return 0;
  2072. }
  2073. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  2074. struct snd_ctl_elem_value *ucontrol)
  2075. {
  2076. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2077. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2078. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2079. return ch_num;
  2080. }
  2081. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2082. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  2083. cdc_dma_rx_cfg[ch_num].channels);
  2084. return 1;
  2085. }
  2086. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  2087. struct snd_ctl_elem_value *ucontrol)
  2088. {
  2089. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2090. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2091. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2092. return ch_num;
  2093. }
  2094. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  2095. case SNDRV_PCM_FORMAT_S32_LE:
  2096. ucontrol->value.integer.value[0] = 3;
  2097. break;
  2098. case SNDRV_PCM_FORMAT_S24_3LE:
  2099. ucontrol->value.integer.value[0] = 2;
  2100. break;
  2101. case SNDRV_PCM_FORMAT_S24_LE:
  2102. ucontrol->value.integer.value[0] = 1;
  2103. break;
  2104. case SNDRV_PCM_FORMAT_S16_LE:
  2105. default:
  2106. ucontrol->value.integer.value[0] = 0;
  2107. break;
  2108. }
  2109. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  2110. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  2111. ucontrol->value.integer.value[0]);
  2112. return 0;
  2113. }
  2114. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  2115. struct snd_ctl_elem_value *ucontrol)
  2116. {
  2117. int rc = 0;
  2118. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2119. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2120. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2121. return ch_num;
  2122. }
  2123. switch (ucontrol->value.integer.value[0]) {
  2124. case 3:
  2125. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2126. break;
  2127. case 2:
  2128. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2129. break;
  2130. case 1:
  2131. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2132. break;
  2133. case 0:
  2134. default:
  2135. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2136. break;
  2137. }
  2138. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  2139. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  2140. ucontrol->value.integer.value[0]);
  2141. return rc;
  2142. }
  2143. static int cdc_dma_get_sample_rate_val(int sample_rate)
  2144. {
  2145. int sample_rate_val = 0;
  2146. switch (sample_rate) {
  2147. case SAMPLING_RATE_8KHZ:
  2148. sample_rate_val = 0;
  2149. break;
  2150. case SAMPLING_RATE_11P025KHZ:
  2151. sample_rate_val = 1;
  2152. break;
  2153. case SAMPLING_RATE_16KHZ:
  2154. sample_rate_val = 2;
  2155. break;
  2156. case SAMPLING_RATE_22P05KHZ:
  2157. sample_rate_val = 3;
  2158. break;
  2159. case SAMPLING_RATE_32KHZ:
  2160. sample_rate_val = 4;
  2161. break;
  2162. case SAMPLING_RATE_44P1KHZ:
  2163. sample_rate_val = 5;
  2164. break;
  2165. case SAMPLING_RATE_48KHZ:
  2166. sample_rate_val = 6;
  2167. break;
  2168. case SAMPLING_RATE_88P2KHZ:
  2169. sample_rate_val = 7;
  2170. break;
  2171. case SAMPLING_RATE_96KHZ:
  2172. sample_rate_val = 8;
  2173. break;
  2174. case SAMPLING_RATE_176P4KHZ:
  2175. sample_rate_val = 9;
  2176. break;
  2177. case SAMPLING_RATE_192KHZ:
  2178. sample_rate_val = 10;
  2179. break;
  2180. case SAMPLING_RATE_352P8KHZ:
  2181. sample_rate_val = 11;
  2182. break;
  2183. case SAMPLING_RATE_384KHZ:
  2184. sample_rate_val = 12;
  2185. break;
  2186. default:
  2187. sample_rate_val = 6;
  2188. break;
  2189. }
  2190. return sample_rate_val;
  2191. }
  2192. static int cdc_dma_get_sample_rate(int value)
  2193. {
  2194. int sample_rate = 0;
  2195. switch (value) {
  2196. case 0:
  2197. sample_rate = SAMPLING_RATE_8KHZ;
  2198. break;
  2199. case 1:
  2200. sample_rate = SAMPLING_RATE_11P025KHZ;
  2201. break;
  2202. case 2:
  2203. sample_rate = SAMPLING_RATE_16KHZ;
  2204. break;
  2205. case 3:
  2206. sample_rate = SAMPLING_RATE_22P05KHZ;
  2207. break;
  2208. case 4:
  2209. sample_rate = SAMPLING_RATE_32KHZ;
  2210. break;
  2211. case 5:
  2212. sample_rate = SAMPLING_RATE_44P1KHZ;
  2213. break;
  2214. case 6:
  2215. sample_rate = SAMPLING_RATE_48KHZ;
  2216. break;
  2217. case 7:
  2218. sample_rate = SAMPLING_RATE_88P2KHZ;
  2219. break;
  2220. case 8:
  2221. sample_rate = SAMPLING_RATE_96KHZ;
  2222. break;
  2223. case 9:
  2224. sample_rate = SAMPLING_RATE_176P4KHZ;
  2225. break;
  2226. case 10:
  2227. sample_rate = SAMPLING_RATE_192KHZ;
  2228. break;
  2229. case 11:
  2230. sample_rate = SAMPLING_RATE_352P8KHZ;
  2231. break;
  2232. case 12:
  2233. sample_rate = SAMPLING_RATE_384KHZ;
  2234. break;
  2235. default:
  2236. sample_rate = SAMPLING_RATE_48KHZ;
  2237. break;
  2238. }
  2239. return sample_rate;
  2240. }
  2241. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2242. struct snd_ctl_elem_value *ucontrol)
  2243. {
  2244. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2245. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2246. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2247. return ch_num;
  2248. }
  2249. ucontrol->value.enumerated.item[0] =
  2250. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  2251. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  2252. cdc_dma_rx_cfg[ch_num].sample_rate);
  2253. return 0;
  2254. }
  2255. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2256. struct snd_ctl_elem_value *ucontrol)
  2257. {
  2258. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2259. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2260. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2261. return ch_num;
  2262. }
  2263. cdc_dma_rx_cfg[ch_num].sample_rate =
  2264. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2265. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  2266. __func__, ucontrol->value.enumerated.item[0],
  2267. cdc_dma_rx_cfg[ch_num].sample_rate);
  2268. return 0;
  2269. }
  2270. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  2271. struct snd_ctl_elem_value *ucontrol)
  2272. {
  2273. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2274. if (ch_num < 0) {
  2275. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2276. return ch_num;
  2277. }
  2278. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2279. cdc_dma_tx_cfg[ch_num].channels);
  2280. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  2281. return 0;
  2282. }
  2283. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  2284. struct snd_ctl_elem_value *ucontrol)
  2285. {
  2286. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2287. if (ch_num < 0) {
  2288. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2289. return ch_num;
  2290. }
  2291. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2292. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2293. cdc_dma_tx_cfg[ch_num].channels);
  2294. return 1;
  2295. }
  2296. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2297. struct snd_ctl_elem_value *ucontrol)
  2298. {
  2299. int sample_rate_val;
  2300. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2301. if (ch_num < 0) {
  2302. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2303. return ch_num;
  2304. }
  2305. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2306. case SAMPLING_RATE_384KHZ:
  2307. sample_rate_val = 12;
  2308. break;
  2309. case SAMPLING_RATE_352P8KHZ:
  2310. sample_rate_val = 11;
  2311. break;
  2312. case SAMPLING_RATE_192KHZ:
  2313. sample_rate_val = 10;
  2314. break;
  2315. case SAMPLING_RATE_176P4KHZ:
  2316. sample_rate_val = 9;
  2317. break;
  2318. case SAMPLING_RATE_96KHZ:
  2319. sample_rate_val = 8;
  2320. break;
  2321. case SAMPLING_RATE_88P2KHZ:
  2322. sample_rate_val = 7;
  2323. break;
  2324. case SAMPLING_RATE_48KHZ:
  2325. sample_rate_val = 6;
  2326. break;
  2327. case SAMPLING_RATE_44P1KHZ:
  2328. sample_rate_val = 5;
  2329. break;
  2330. case SAMPLING_RATE_32KHZ:
  2331. sample_rate_val = 4;
  2332. break;
  2333. case SAMPLING_RATE_22P05KHZ:
  2334. sample_rate_val = 3;
  2335. break;
  2336. case SAMPLING_RATE_16KHZ:
  2337. sample_rate_val = 2;
  2338. break;
  2339. case SAMPLING_RATE_11P025KHZ:
  2340. sample_rate_val = 1;
  2341. break;
  2342. case SAMPLING_RATE_8KHZ:
  2343. sample_rate_val = 0;
  2344. break;
  2345. default:
  2346. sample_rate_val = 6;
  2347. break;
  2348. }
  2349. ucontrol->value.integer.value[0] = sample_rate_val;
  2350. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2351. cdc_dma_tx_cfg[ch_num].sample_rate);
  2352. return 0;
  2353. }
  2354. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2355. struct snd_ctl_elem_value *ucontrol)
  2356. {
  2357. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2358. if (ch_num < 0) {
  2359. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2360. return ch_num;
  2361. }
  2362. switch (ucontrol->value.integer.value[0]) {
  2363. case 12:
  2364. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2365. break;
  2366. case 11:
  2367. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2368. break;
  2369. case 10:
  2370. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2371. break;
  2372. case 9:
  2373. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2374. break;
  2375. case 8:
  2376. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2377. break;
  2378. case 7:
  2379. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2380. break;
  2381. case 6:
  2382. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2383. break;
  2384. case 5:
  2385. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2386. break;
  2387. case 4:
  2388. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2389. break;
  2390. case 3:
  2391. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2392. break;
  2393. case 2:
  2394. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2395. break;
  2396. case 1:
  2397. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2398. break;
  2399. case 0:
  2400. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2401. break;
  2402. default:
  2403. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2404. break;
  2405. }
  2406. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2407. __func__, ucontrol->value.integer.value[0],
  2408. cdc_dma_tx_cfg[ch_num].sample_rate);
  2409. return 0;
  2410. }
  2411. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2412. struct snd_ctl_elem_value *ucontrol)
  2413. {
  2414. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2415. if (ch_num < 0) {
  2416. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2417. return ch_num;
  2418. }
  2419. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2420. case SNDRV_PCM_FORMAT_S32_LE:
  2421. ucontrol->value.integer.value[0] = 3;
  2422. break;
  2423. case SNDRV_PCM_FORMAT_S24_3LE:
  2424. ucontrol->value.integer.value[0] = 2;
  2425. break;
  2426. case SNDRV_PCM_FORMAT_S24_LE:
  2427. ucontrol->value.integer.value[0] = 1;
  2428. break;
  2429. case SNDRV_PCM_FORMAT_S16_LE:
  2430. default:
  2431. ucontrol->value.integer.value[0] = 0;
  2432. break;
  2433. }
  2434. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2435. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2436. ucontrol->value.integer.value[0]);
  2437. return 0;
  2438. }
  2439. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2440. struct snd_ctl_elem_value *ucontrol)
  2441. {
  2442. int rc = 0;
  2443. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2444. if (ch_num < 0) {
  2445. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2446. return ch_num;
  2447. }
  2448. switch (ucontrol->value.integer.value[0]) {
  2449. case 3:
  2450. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2451. break;
  2452. case 2:
  2453. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2454. break;
  2455. case 1:
  2456. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2457. break;
  2458. case 0:
  2459. default:
  2460. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2461. break;
  2462. }
  2463. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2464. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2465. ucontrol->value.integer.value[0]);
  2466. return rc;
  2467. }
  2468. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2469. {
  2470. int idx = 0;
  2471. switch (be_id) {
  2472. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2473. idx = WSA_CDC_DMA_RX_0;
  2474. break;
  2475. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2476. idx = WSA_CDC_DMA_TX_0;
  2477. break;
  2478. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2479. idx = WSA_CDC_DMA_RX_1;
  2480. break;
  2481. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2482. idx = WSA_CDC_DMA_TX_1;
  2483. break;
  2484. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2485. idx = WSA_CDC_DMA_TX_2;
  2486. break;
  2487. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2488. idx = RX_CDC_DMA_RX_0;
  2489. break;
  2490. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2491. idx = RX_CDC_DMA_RX_1;
  2492. break;
  2493. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2494. idx = RX_CDC_DMA_RX_2;
  2495. break;
  2496. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2497. idx = RX_CDC_DMA_RX_3;
  2498. break;
  2499. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2500. idx = RX_CDC_DMA_RX_5;
  2501. break;
  2502. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2503. idx = TX_CDC_DMA_TX_0;
  2504. break;
  2505. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2506. idx = TX_CDC_DMA_TX_3;
  2507. break;
  2508. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2509. idx = TX_CDC_DMA_TX_4;
  2510. break;
  2511. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2512. idx = VA_CDC_DMA_TX_0;
  2513. break;
  2514. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2515. idx = VA_CDC_DMA_TX_1;
  2516. break;
  2517. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2518. idx = VA_CDC_DMA_TX_2;
  2519. break;
  2520. default:
  2521. idx = RX_CDC_DMA_RX_0;
  2522. break;
  2523. }
  2524. return idx;
  2525. }
  2526. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  2527. struct snd_ctl_elem_value *ucontrol)
  2528. {
  2529. /*
  2530. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  2531. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  2532. * value.
  2533. */
  2534. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2535. case SAMPLING_RATE_96KHZ:
  2536. ucontrol->value.integer.value[0] = 5;
  2537. break;
  2538. case SAMPLING_RATE_88P2KHZ:
  2539. ucontrol->value.integer.value[0] = 4;
  2540. break;
  2541. case SAMPLING_RATE_48KHZ:
  2542. ucontrol->value.integer.value[0] = 3;
  2543. break;
  2544. case SAMPLING_RATE_44P1KHZ:
  2545. ucontrol->value.integer.value[0] = 2;
  2546. break;
  2547. case SAMPLING_RATE_16KHZ:
  2548. ucontrol->value.integer.value[0] = 1;
  2549. break;
  2550. case SAMPLING_RATE_8KHZ:
  2551. default:
  2552. ucontrol->value.integer.value[0] = 0;
  2553. break;
  2554. }
  2555. pr_debug("%s: sample rate = %d\n", __func__,
  2556. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2557. return 0;
  2558. }
  2559. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  2560. struct snd_ctl_elem_value *ucontrol)
  2561. {
  2562. switch (ucontrol->value.integer.value[0]) {
  2563. case 1:
  2564. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2565. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2566. break;
  2567. case 2:
  2568. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2569. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2570. break;
  2571. case 3:
  2572. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2573. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2574. break;
  2575. case 4:
  2576. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2577. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2578. break;
  2579. case 5:
  2580. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2581. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2582. break;
  2583. case 0:
  2584. default:
  2585. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2586. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2587. break;
  2588. }
  2589. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  2590. __func__,
  2591. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2592. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2593. ucontrol->value.enumerated.item[0]);
  2594. return 0;
  2595. }
  2596. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  2597. struct snd_ctl_elem_value *ucontrol)
  2598. {
  2599. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2600. case SAMPLING_RATE_96KHZ:
  2601. ucontrol->value.integer.value[0] = 5;
  2602. break;
  2603. case SAMPLING_RATE_88P2KHZ:
  2604. ucontrol->value.integer.value[0] = 4;
  2605. break;
  2606. case SAMPLING_RATE_48KHZ:
  2607. ucontrol->value.integer.value[0] = 3;
  2608. break;
  2609. case SAMPLING_RATE_44P1KHZ:
  2610. ucontrol->value.integer.value[0] = 2;
  2611. break;
  2612. case SAMPLING_RATE_16KHZ:
  2613. ucontrol->value.integer.value[0] = 1;
  2614. break;
  2615. case SAMPLING_RATE_8KHZ:
  2616. default:
  2617. ucontrol->value.integer.value[0] = 0;
  2618. break;
  2619. }
  2620. pr_debug("%s: sample rate rx = %d\n", __func__,
  2621. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2622. return 0;
  2623. }
  2624. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  2625. struct snd_ctl_elem_value *ucontrol)
  2626. {
  2627. switch (ucontrol->value.integer.value[0]) {
  2628. case 1:
  2629. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2630. break;
  2631. case 2:
  2632. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2633. break;
  2634. case 3:
  2635. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2636. break;
  2637. case 4:
  2638. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2639. break;
  2640. case 5:
  2641. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2642. break;
  2643. case 0:
  2644. default:
  2645. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2646. break;
  2647. }
  2648. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  2649. __func__,
  2650. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2651. ucontrol->value.enumerated.item[0]);
  2652. return 0;
  2653. }
  2654. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  2655. struct snd_ctl_elem_value *ucontrol)
  2656. {
  2657. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  2658. case SAMPLING_RATE_96KHZ:
  2659. ucontrol->value.integer.value[0] = 5;
  2660. break;
  2661. case SAMPLING_RATE_88P2KHZ:
  2662. ucontrol->value.integer.value[0] = 4;
  2663. break;
  2664. case SAMPLING_RATE_48KHZ:
  2665. ucontrol->value.integer.value[0] = 3;
  2666. break;
  2667. case SAMPLING_RATE_44P1KHZ:
  2668. ucontrol->value.integer.value[0] = 2;
  2669. break;
  2670. case SAMPLING_RATE_16KHZ:
  2671. ucontrol->value.integer.value[0] = 1;
  2672. break;
  2673. case SAMPLING_RATE_8KHZ:
  2674. default:
  2675. ucontrol->value.integer.value[0] = 0;
  2676. break;
  2677. }
  2678. pr_debug("%s: sample rate tx = %d\n", __func__,
  2679. slim_tx_cfg[SLIM_TX_7].sample_rate);
  2680. return 0;
  2681. }
  2682. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  2683. struct snd_ctl_elem_value *ucontrol)
  2684. {
  2685. switch (ucontrol->value.integer.value[0]) {
  2686. case 1:
  2687. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2688. break;
  2689. case 2:
  2690. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2691. break;
  2692. case 3:
  2693. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2694. break;
  2695. case 4:
  2696. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2697. break;
  2698. case 5:
  2699. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2700. break;
  2701. case 0:
  2702. default:
  2703. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2704. break;
  2705. }
  2706. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  2707. __func__,
  2708. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2709. ucontrol->value.enumerated.item[0]);
  2710. return 0;
  2711. }
  2712. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2713. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2714. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2715. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2716. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2717. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2718. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2719. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2720. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2721. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2722. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2723. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2724. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2725. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2726. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2727. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2728. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2729. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2730. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2731. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2732. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2733. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2734. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2735. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2736. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2737. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2738. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2739. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2740. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2741. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2742. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2743. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
  2744. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2745. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2746. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2747. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2748. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2749. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2750. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2751. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2752. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2753. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2754. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2755. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2756. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2757. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2758. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2759. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2760. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2761. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2762. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2763. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2764. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2765. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2766. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2767. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2768. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2769. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2770. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2771. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2772. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2773. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
  2774. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2775. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2776. wsa_cdc_dma_rx_0_sample_rate,
  2777. cdc_dma_rx_sample_rate_get,
  2778. cdc_dma_rx_sample_rate_put),
  2779. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2780. wsa_cdc_dma_rx_1_sample_rate,
  2781. cdc_dma_rx_sample_rate_get,
  2782. cdc_dma_rx_sample_rate_put),
  2783. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2784. rx_cdc_dma_rx_0_sample_rate,
  2785. cdc_dma_rx_sample_rate_get,
  2786. cdc_dma_rx_sample_rate_put),
  2787. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2788. rx_cdc_dma_rx_1_sample_rate,
  2789. cdc_dma_rx_sample_rate_get,
  2790. cdc_dma_rx_sample_rate_put),
  2791. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2792. rx_cdc_dma_rx_2_sample_rate,
  2793. cdc_dma_rx_sample_rate_get,
  2794. cdc_dma_rx_sample_rate_put),
  2795. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2796. rx_cdc_dma_rx_3_sample_rate,
  2797. cdc_dma_rx_sample_rate_get,
  2798. cdc_dma_rx_sample_rate_put),
  2799. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2800. rx_cdc_dma_rx_5_sample_rate,
  2801. cdc_dma_rx_sample_rate_get,
  2802. cdc_dma_rx_sample_rate_put),
  2803. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2804. wsa_cdc_dma_tx_0_sample_rate,
  2805. cdc_dma_tx_sample_rate_get,
  2806. cdc_dma_tx_sample_rate_put),
  2807. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2808. wsa_cdc_dma_tx_1_sample_rate,
  2809. cdc_dma_tx_sample_rate_get,
  2810. cdc_dma_tx_sample_rate_put),
  2811. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2812. wsa_cdc_dma_tx_2_sample_rate,
  2813. cdc_dma_tx_sample_rate_get,
  2814. cdc_dma_tx_sample_rate_put),
  2815. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2816. tx_cdc_dma_tx_0_sample_rate,
  2817. cdc_dma_tx_sample_rate_get,
  2818. cdc_dma_tx_sample_rate_put),
  2819. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2820. tx_cdc_dma_tx_3_sample_rate,
  2821. cdc_dma_tx_sample_rate_get,
  2822. cdc_dma_tx_sample_rate_put),
  2823. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2824. tx_cdc_dma_tx_4_sample_rate,
  2825. cdc_dma_tx_sample_rate_get,
  2826. cdc_dma_tx_sample_rate_put),
  2827. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2828. va_cdc_dma_tx_0_sample_rate,
  2829. cdc_dma_tx_sample_rate_get,
  2830. cdc_dma_tx_sample_rate_put),
  2831. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2832. va_cdc_dma_tx_1_sample_rate,
  2833. cdc_dma_tx_sample_rate_get,
  2834. cdc_dma_tx_sample_rate_put),
  2835. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
  2836. va_cdc_dma_tx_2_sample_rate,
  2837. cdc_dma_tx_sample_rate_get,
  2838. cdc_dma_tx_sample_rate_put),
  2839. };
  2840. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2841. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2842. usb_audio_rx_sample_rate_get,
  2843. usb_audio_rx_sample_rate_put),
  2844. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2845. usb_audio_tx_sample_rate_get,
  2846. usb_audio_tx_sample_rate_put),
  2847. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2848. tdm_rx_sample_rate_get,
  2849. tdm_rx_sample_rate_put),
  2850. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2851. tdm_rx_sample_rate_get,
  2852. tdm_rx_sample_rate_put),
  2853. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2854. tdm_rx_sample_rate_get,
  2855. tdm_rx_sample_rate_put),
  2856. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2857. tdm_tx_sample_rate_get,
  2858. tdm_tx_sample_rate_put),
  2859. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2860. tdm_tx_sample_rate_get,
  2861. tdm_tx_sample_rate_put),
  2862. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2863. tdm_tx_sample_rate_get,
  2864. tdm_tx_sample_rate_put),
  2865. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2866. aux_pcm_rx_sample_rate_get,
  2867. aux_pcm_rx_sample_rate_put),
  2868. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2869. aux_pcm_rx_sample_rate_get,
  2870. aux_pcm_rx_sample_rate_put),
  2871. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2872. aux_pcm_rx_sample_rate_get,
  2873. aux_pcm_rx_sample_rate_put),
  2874. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2875. aux_pcm_tx_sample_rate_get,
  2876. aux_pcm_tx_sample_rate_put),
  2877. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2878. aux_pcm_tx_sample_rate_get,
  2879. aux_pcm_tx_sample_rate_put),
  2880. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2881. aux_pcm_tx_sample_rate_get,
  2882. aux_pcm_tx_sample_rate_put),
  2883. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2884. mi2s_rx_sample_rate_get,
  2885. mi2s_rx_sample_rate_put),
  2886. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2887. mi2s_rx_sample_rate_get,
  2888. mi2s_rx_sample_rate_put),
  2889. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2890. mi2s_rx_sample_rate_get,
  2891. mi2s_rx_sample_rate_put),
  2892. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2893. mi2s_tx_sample_rate_get,
  2894. mi2s_tx_sample_rate_put),
  2895. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2896. mi2s_tx_sample_rate_get,
  2897. mi2s_tx_sample_rate_put),
  2898. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2899. mi2s_tx_sample_rate_get,
  2900. mi2s_tx_sample_rate_put),
  2901. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2902. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2903. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2904. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2905. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2906. tdm_rx_format_get,
  2907. tdm_rx_format_put),
  2908. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2909. tdm_rx_format_get,
  2910. tdm_rx_format_put),
  2911. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2912. tdm_rx_format_get,
  2913. tdm_rx_format_put),
  2914. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2915. tdm_tx_format_get,
  2916. tdm_tx_format_put),
  2917. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2918. tdm_tx_format_get,
  2919. tdm_tx_format_put),
  2920. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2921. tdm_tx_format_get,
  2922. tdm_tx_format_put),
  2923. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2924. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2925. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2926. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2927. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2928. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2929. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2930. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2931. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2932. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2933. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2934. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2935. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2936. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2937. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2938. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2939. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2940. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2941. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2942. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2943. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2944. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2945. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2946. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2947. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2948. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2949. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2950. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2951. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2952. proxy_rx_ch_get, proxy_rx_ch_put),
  2953. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2954. tdm_rx_ch_get,
  2955. tdm_rx_ch_put),
  2956. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2957. tdm_rx_ch_get,
  2958. tdm_rx_ch_put),
  2959. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2960. tdm_rx_ch_get,
  2961. tdm_rx_ch_put),
  2962. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2963. tdm_tx_ch_get,
  2964. tdm_tx_ch_put),
  2965. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2966. tdm_tx_ch_get,
  2967. tdm_tx_ch_put),
  2968. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2969. tdm_tx_ch_get,
  2970. tdm_tx_ch_put),
  2971. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2972. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2973. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2974. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2975. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2976. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2977. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2978. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2979. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2980. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2981. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2982. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2983. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  2984. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  2985. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  2986. ext_disp_rx_format_get, ext_disp_rx_format_put),
  2987. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  2988. ext_disp_rx_sample_rate_get,
  2989. ext_disp_rx_sample_rate_put),
  2990. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  2991. msm_bt_sample_rate_get,
  2992. msm_bt_sample_rate_put),
  2993. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  2994. msm_bt_sample_rate_rx_get,
  2995. msm_bt_sample_rate_rx_put),
  2996. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  2997. msm_bt_sample_rate_tx_get,
  2998. msm_bt_sample_rate_tx_put),
  2999. SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
  3000. afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
  3001. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3002. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3003. };
  3004. static const struct snd_kcontrol_new msm_snd_controls[] = {
  3005. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3006. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3007. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3008. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3009. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3010. aux_pcm_rx_sample_rate_get,
  3011. aux_pcm_rx_sample_rate_put),
  3012. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3013. aux_pcm_tx_sample_rate_get,
  3014. aux_pcm_tx_sample_rate_put),
  3015. };
  3016. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3017. {
  3018. int idx;
  3019. switch (be_id) {
  3020. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3021. idx = EXT_DISP_RX_IDX_DP;
  3022. break;
  3023. default:
  3024. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3025. idx = -EINVAL;
  3026. break;
  3027. }
  3028. return idx;
  3029. }
  3030. static int kona_send_island_va_config(int32_t be_id)
  3031. {
  3032. int rc = 0;
  3033. int port_id = 0xFFFF;
  3034. port_id = msm_get_port_id(be_id);
  3035. if (port_id < 0) {
  3036. pr_err("%s: Invalid island interface, be_id: %d\n",
  3037. __func__, be_id);
  3038. rc = -EINVAL;
  3039. } else {
  3040. /*
  3041. * send island mode config
  3042. * This should be the first configuration
  3043. */
  3044. rc = afe_send_port_island_mode(port_id);
  3045. if (rc)
  3046. pr_err("%s: afe send island mode failed %d\n",
  3047. __func__, rc);
  3048. }
  3049. return rc;
  3050. }
  3051. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3052. struct snd_pcm_hw_params *params)
  3053. {
  3054. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3055. struct snd_interval *rate = hw_param_interval(params,
  3056. SNDRV_PCM_HW_PARAM_RATE);
  3057. struct snd_interval *channels = hw_param_interval(params,
  3058. SNDRV_PCM_HW_PARAM_CHANNELS);
  3059. int idx = 0, rc = 0;
  3060. pr_debug("%s: format = %d, rate = %d\n",
  3061. __func__, params_format(params), params_rate(params));
  3062. switch (dai_link->id) {
  3063. case MSM_BACKEND_DAI_USB_RX:
  3064. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3065. usb_rx_cfg.bit_format);
  3066. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3067. channels->min = channels->max = usb_rx_cfg.channels;
  3068. break;
  3069. case MSM_BACKEND_DAI_USB_TX:
  3070. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3071. usb_tx_cfg.bit_format);
  3072. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3073. channels->min = channels->max = usb_tx_cfg.channels;
  3074. break;
  3075. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3076. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3077. if (idx < 0) {
  3078. pr_err("%s: Incorrect ext disp idx %d\n",
  3079. __func__, idx);
  3080. rc = idx;
  3081. goto done;
  3082. }
  3083. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3084. ext_disp_rx_cfg[idx].bit_format);
  3085. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3086. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3087. break;
  3088. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3089. channels->min = channels->max = proxy_rx_cfg.channels;
  3090. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3091. break;
  3092. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3093. channels->min = channels->max =
  3094. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3095. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3096. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3097. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3098. break;
  3099. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3100. channels->min = channels->max =
  3101. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3102. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3103. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3104. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3105. break;
  3106. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3107. channels->min = channels->max =
  3108. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3109. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3110. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3111. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3112. break;
  3113. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3114. channels->min = channels->max =
  3115. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3116. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3117. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3118. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3119. break;
  3120. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3121. channels->min = channels->max =
  3122. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3123. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3124. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3125. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3126. break;
  3127. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3128. channels->min = channels->max =
  3129. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3130. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3131. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3132. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3133. break;
  3134. case MSM_BACKEND_DAI_AUXPCM_RX:
  3135. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3136. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3137. rate->min = rate->max =
  3138. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3139. channels->min = channels->max =
  3140. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3141. break;
  3142. case MSM_BACKEND_DAI_AUXPCM_TX:
  3143. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3144. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3145. rate->min = rate->max =
  3146. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3147. channels->min = channels->max =
  3148. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3149. break;
  3150. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3151. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3152. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3153. rate->min = rate->max =
  3154. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3155. channels->min = channels->max =
  3156. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3157. break;
  3158. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3159. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3160. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3161. rate->min = rate->max =
  3162. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3163. channels->min = channels->max =
  3164. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3165. break;
  3166. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3167. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3168. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3169. rate->min = rate->max =
  3170. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3171. channels->min = channels->max =
  3172. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3173. break;
  3174. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3175. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3176. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3177. rate->min = rate->max =
  3178. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3179. channels->min = channels->max =
  3180. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3181. break;
  3182. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3183. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3184. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3185. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3186. channels->min = channels->max =
  3187. mi2s_rx_cfg[PRIM_MI2S].channels;
  3188. break;
  3189. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3190. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3191. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3192. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3193. channels->min = channels->max =
  3194. mi2s_tx_cfg[PRIM_MI2S].channels;
  3195. break;
  3196. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3197. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3198. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3199. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3200. channels->min = channels->max =
  3201. mi2s_rx_cfg[SEC_MI2S].channels;
  3202. break;
  3203. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3204. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3205. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3206. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3207. channels->min = channels->max =
  3208. mi2s_tx_cfg[SEC_MI2S].channels;
  3209. break;
  3210. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3211. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3212. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3213. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3214. channels->min = channels->max =
  3215. mi2s_rx_cfg[TERT_MI2S].channels;
  3216. break;
  3217. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3218. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3219. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3220. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3221. channels->min = channels->max =
  3222. mi2s_tx_cfg[TERT_MI2S].channels;
  3223. break;
  3224. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3225. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3226. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3227. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3228. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3229. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3230. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3231. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3232. cdc_dma_rx_cfg[idx].bit_format);
  3233. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3234. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3235. break;
  3236. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3237. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3238. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3239. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3240. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3241. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3242. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3243. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3244. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3245. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3246. cdc_dma_tx_cfg[idx].bit_format);
  3247. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3248. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3249. break;
  3250. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3251. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3252. SNDRV_PCM_FORMAT_S32_LE);
  3253. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3254. channels->min = channels->max = msm_vi_feed_tx_ch;
  3255. break;
  3256. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3257. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3258. slim_rx_cfg[SLIM_RX_7].bit_format);
  3259. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3260. channels->min = channels->max =
  3261. slim_rx_cfg[SLIM_RX_7].channels;
  3262. break;
  3263. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3264. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3265. channels->min = channels->max =
  3266. slim_tx_cfg[SLIM_TX_7].channels;
  3267. break;
  3268. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3269. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3270. channels->min = channels->max =
  3271. slim_tx_cfg[SLIM_TX_8].channels;
  3272. break;
  3273. case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
  3274. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3275. afe_loopback_tx_cfg[idx].bit_format);
  3276. rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
  3277. channels->min = channels->max =
  3278. afe_loopback_tx_cfg[idx].channels;
  3279. break;
  3280. default:
  3281. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3282. break;
  3283. }
  3284. done:
  3285. return rc;
  3286. }
  3287. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
  3288. {
  3289. struct snd_soc_card *card = component->card;
  3290. struct msm_asoc_mach_data *pdata =
  3291. snd_soc_card_get_drvdata(card);
  3292. if (!pdata->fsa_handle)
  3293. return false;
  3294. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  3295. }
  3296. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  3297. {
  3298. int value = 0;
  3299. bool ret = false;
  3300. struct snd_soc_card *card;
  3301. struct msm_asoc_mach_data *pdata;
  3302. if (!component) {
  3303. pr_err("%s component is NULL\n", __func__);
  3304. return false;
  3305. }
  3306. card = component->card;
  3307. pdata = snd_soc_card_get_drvdata(card);
  3308. if (!pdata)
  3309. return false;
  3310. if (wcd_mbhc_cfg.enable_usbc_analog)
  3311. return msm_usbc_swap_gnd_mic(component, active);
  3312. /* if usbc is not defined, swap using us_euro_gpio_p */
  3313. if (pdata->us_euro_gpio_p) {
  3314. value = msm_cdc_pinctrl_get_state(
  3315. pdata->us_euro_gpio_p);
  3316. if (value)
  3317. msm_cdc_pinctrl_select_sleep_state(
  3318. pdata->us_euro_gpio_p);
  3319. else
  3320. msm_cdc_pinctrl_select_active_state(
  3321. pdata->us_euro_gpio_p);
  3322. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  3323. __func__, value, !value);
  3324. ret = true;
  3325. }
  3326. return ret;
  3327. }
  3328. static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  3329. struct snd_pcm_hw_params *params)
  3330. {
  3331. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3332. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3333. int ret = 0;
  3334. int slot_width = 32;
  3335. int channels, slots;
  3336. unsigned int slot_mask, rate, clk_freq;
  3337. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  3338. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  3339. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  3340. switch (cpu_dai->id) {
  3341. case AFE_PORT_ID_PRIMARY_TDM_RX:
  3342. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3343. break;
  3344. case AFE_PORT_ID_SECONDARY_TDM_RX:
  3345. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3346. break;
  3347. case AFE_PORT_ID_TERTIARY_TDM_RX:
  3348. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3349. break;
  3350. case AFE_PORT_ID_PRIMARY_TDM_TX:
  3351. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3352. break;
  3353. case AFE_PORT_ID_SECONDARY_TDM_TX:
  3354. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3355. break;
  3356. case AFE_PORT_ID_TERTIARY_TDM_TX:
  3357. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3358. break;
  3359. default:
  3360. pr_err("%s: dai id 0x%x not supported\n",
  3361. __func__, cpu_dai->id);
  3362. return -EINVAL;
  3363. }
  3364. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3365. /*2 slot config - bits 0 and 1 set for the first two slots */
  3366. slot_mask = 0x0000FFFF >> (16 - slots);
  3367. channels = slots;
  3368. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  3369. __func__, slot_width, slots);
  3370. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  3371. slots, slot_width);
  3372. if (ret < 0) {
  3373. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  3374. __func__, ret);
  3375. goto end;
  3376. }
  3377. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3378. 0, NULL, channels, slot_offset);
  3379. if (ret < 0) {
  3380. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  3381. __func__, ret);
  3382. goto end;
  3383. }
  3384. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  3385. /*2 slot config - bits 0 and 1 set for the first two slots */
  3386. slot_mask = 0x0000FFFF >> (16 - slots);
  3387. channels = slots;
  3388. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  3389. __func__, slot_width, slots);
  3390. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  3391. slots, slot_width);
  3392. if (ret < 0) {
  3393. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  3394. __func__, ret);
  3395. goto end;
  3396. }
  3397. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3398. channels, slot_offset, 0, NULL);
  3399. if (ret < 0) {
  3400. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  3401. __func__, ret);
  3402. goto end;
  3403. }
  3404. } else {
  3405. ret = -EINVAL;
  3406. pr_err("%s: invalid use case, err:%d\n",
  3407. __func__, ret);
  3408. goto end;
  3409. }
  3410. rate = params_rate(params);
  3411. clk_freq = rate * slot_width * slots;
  3412. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  3413. if (ret < 0)
  3414. pr_err("%s: failed to set tdm clk, err:%d\n",
  3415. __func__, ret);
  3416. end:
  3417. return ret;
  3418. }
  3419. static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
  3420. {
  3421. int ret = 0;
  3422. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3423. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3424. switch (dai_link->id) {
  3425. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3426. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3427. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3428. ret = kona_send_island_va_config(dai_link->id);
  3429. if (ret)
  3430. pr_err("%s: send island va cfg failed, err: %d\n",
  3431. __func__, ret);
  3432. break;
  3433. }
  3434. return ret;
  3435. }
  3436. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  3437. struct snd_pcm_hw_params *params)
  3438. {
  3439. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3440. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3441. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3442. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3443. int ret = 0;
  3444. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  3445. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3446. u32 user_set_tx_ch = 0;
  3447. u32 user_set_rx_ch = 0;
  3448. u32 ch_id;
  3449. ret = snd_soc_dai_get_channel_map(codec_dai,
  3450. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  3451. &rx_ch_cdc_dma);
  3452. if (ret < 0) {
  3453. pr_err("%s: failed to get codec chan map, err:%d\n",
  3454. __func__, ret);
  3455. goto err;
  3456. }
  3457. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3458. switch (dai_link->id) {
  3459. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3460. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3461. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3462. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3463. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3464. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3465. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  3466. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3467. {
  3468. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3469. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  3470. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  3471. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  3472. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3473. user_set_rx_ch, &rx_ch_cdc_dma);
  3474. if (ret < 0) {
  3475. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3476. __func__, ret);
  3477. goto err;
  3478. }
  3479. }
  3480. break;
  3481. }
  3482. } else {
  3483. switch (dai_link->id) {
  3484. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3485. {
  3486. user_set_tx_ch = msm_vi_feed_tx_ch;
  3487. }
  3488. break;
  3489. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3490. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3491. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3492. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3493. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3494. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3495. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3496. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3497. {
  3498. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3499. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  3500. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  3501. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  3502. }
  3503. break;
  3504. }
  3505. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  3506. &tx_ch_cdc_dma, 0, 0);
  3507. if (ret < 0) {
  3508. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3509. __func__, ret);
  3510. goto err;
  3511. }
  3512. }
  3513. err:
  3514. return ret;
  3515. }
  3516. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  3517. {
  3518. cpumask_t mask;
  3519. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  3520. pm_qos_remove_request(&substream->latency_pm_qos_req);
  3521. cpumask_clear(&mask);
  3522. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  3523. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  3524. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  3525. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  3526. pm_qos_add_request(&substream->latency_pm_qos_req,
  3527. PM_QOS_CPU_DMA_LATENCY,
  3528. MSM_LL_QOS_VALUE);
  3529. return 0;
  3530. }
  3531. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  3532. {
  3533. int ret = 0;
  3534. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3535. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3536. int index = cpu_dai->id;
  3537. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  3538. dev_dbg(rtd->card->dev,
  3539. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  3540. __func__, substream->name, substream->stream,
  3541. cpu_dai->name, cpu_dai->id);
  3542. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3543. ret = -EINVAL;
  3544. dev_err(rtd->card->dev,
  3545. "%s: CPU DAI id (%d) out of range\n",
  3546. __func__, cpu_dai->id);
  3547. goto err;
  3548. }
  3549. /*
  3550. * Mutex protection in case the same MI2S
  3551. * interface using for both TX and RX so
  3552. * that the same clock won't be enable twice.
  3553. */
  3554. mutex_lock(&mi2s_intf_conf[index].lock);
  3555. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  3556. /* Check if msm needs to provide the clock to the interface */
  3557. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  3558. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  3559. fmt = SND_SOC_DAIFMT_CBM_CFM;
  3560. }
  3561. ret = msm_mi2s_set_sclk(substream, true);
  3562. if (ret < 0) {
  3563. dev_err(rtd->card->dev,
  3564. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  3565. __func__, ret);
  3566. goto clean_up;
  3567. }
  3568. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  3569. if (ret < 0) {
  3570. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  3571. __func__, index, ret);
  3572. goto clk_off;
  3573. }
  3574. }
  3575. clk_off:
  3576. if (ret < 0)
  3577. msm_mi2s_set_sclk(substream, false);
  3578. clean_up:
  3579. if (ret < 0)
  3580. mi2s_intf_conf[index].ref_cnt--;
  3581. mutex_unlock(&mi2s_intf_conf[index].lock);
  3582. err:
  3583. return ret;
  3584. }
  3585. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  3586. {
  3587. int ret = 0;
  3588. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3589. int index = rtd->cpu_dai->id;
  3590. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  3591. substream->name, substream->stream);
  3592. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3593. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  3594. return;
  3595. }
  3596. mutex_lock(&mi2s_intf_conf[index].lock);
  3597. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  3598. ret = msm_mi2s_set_sclk(substream, false);
  3599. if (ret < 0)
  3600. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  3601. __func__, index, ret);
  3602. }
  3603. mutex_unlock(&mi2s_intf_conf[index].lock);
  3604. }
  3605. static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
  3606. struct snd_pcm_hw_params *params)
  3607. {
  3608. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3609. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3610. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3611. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3612. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
  3613. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3614. int ret = 0;
  3615. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3616. codec_dai->name, codec_dai->id);
  3617. ret = snd_soc_dai_get_channel_map(codec_dai,
  3618. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3619. if (ret) {
  3620. dev_err(rtd->dev,
  3621. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3622. __func__, ret);
  3623. goto err;
  3624. }
  3625. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3626. __func__, tx_ch_cnt, dai_link->id);
  3627. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3628. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3629. if (ret)
  3630. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3631. __func__, ret);
  3632. err:
  3633. return ret;
  3634. }
  3635. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  3636. struct snd_pcm_hw_params *params)
  3637. {
  3638. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3639. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3640. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3641. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3642. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  3643. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3644. int ret = 0;
  3645. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3646. codec_dai->name, codec_dai->id);
  3647. ret = snd_soc_dai_get_channel_map(codec_dai,
  3648. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3649. if (ret) {
  3650. dev_err(rtd->dev,
  3651. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3652. __func__, ret);
  3653. goto err;
  3654. }
  3655. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3656. __func__, tx_ch_cnt, dai_link->id);
  3657. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3658. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3659. if (ret)
  3660. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3661. __func__, ret);
  3662. err:
  3663. return ret;
  3664. }
  3665. static struct snd_soc_ops kona_tdm_be_ops = {
  3666. .hw_params = kona_tdm_snd_hw_params,
  3667. };
  3668. static struct snd_soc_ops msm_mi2s_be_ops = {
  3669. .startup = msm_mi2s_snd_startup,
  3670. .shutdown = msm_mi2s_snd_shutdown,
  3671. };
  3672. static struct snd_soc_ops msm_fe_qos_ops = {
  3673. .prepare = msm_fe_qos_prepare,
  3674. };
  3675. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  3676. .startup = msm_snd_cdc_dma_startup,
  3677. .hw_params = msm_snd_cdc_dma_hw_params,
  3678. };
  3679. static struct snd_soc_ops msm_wcn_ops = {
  3680. .hw_params = msm_wcn_hw_params,
  3681. };
  3682. static struct snd_soc_ops msm_wcn_ops_lito = {
  3683. .hw_params = msm_wcn_hw_params_lito,
  3684. };
  3685. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3686. struct snd_kcontrol *kcontrol, int event)
  3687. {
  3688. struct msm_asoc_mach_data *pdata = NULL;
  3689. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  3690. int ret = 0;
  3691. u32 dmic_idx;
  3692. int *dmic_gpio_cnt;
  3693. struct device_node *dmic_gpio;
  3694. char *wname;
  3695. wname = strpbrk(w->name, "012345");
  3696. if (!wname) {
  3697. dev_err(component->dev, "%s: widget not found\n", __func__);
  3698. return -EINVAL;
  3699. }
  3700. ret = kstrtouint(wname, 10, &dmic_idx);
  3701. if (ret < 0) {
  3702. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3703. __func__);
  3704. return -EINVAL;
  3705. }
  3706. pdata = snd_soc_card_get_drvdata(component->card);
  3707. switch (dmic_idx) {
  3708. case 0:
  3709. case 1:
  3710. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3711. dmic_gpio = pdata->dmic01_gpio_p;
  3712. break;
  3713. case 2:
  3714. case 3:
  3715. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3716. dmic_gpio = pdata->dmic23_gpio_p;
  3717. break;
  3718. case 4:
  3719. case 5:
  3720. dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
  3721. dmic_gpio = pdata->dmic45_gpio_p;
  3722. break;
  3723. default:
  3724. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3725. __func__);
  3726. return -EINVAL;
  3727. }
  3728. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3729. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3730. switch (event) {
  3731. case SND_SOC_DAPM_PRE_PMU:
  3732. (*dmic_gpio_cnt)++;
  3733. if (*dmic_gpio_cnt == 1) {
  3734. ret = msm_cdc_pinctrl_select_active_state(
  3735. dmic_gpio);
  3736. if (ret < 0) {
  3737. pr_err("%s: gpio set cannot be activated %sd",
  3738. __func__, "dmic_gpio");
  3739. return ret;
  3740. }
  3741. }
  3742. break;
  3743. case SND_SOC_DAPM_POST_PMD:
  3744. (*dmic_gpio_cnt)--;
  3745. if (*dmic_gpio_cnt == 0) {
  3746. ret = msm_cdc_pinctrl_select_sleep_state(
  3747. dmic_gpio);
  3748. if (ret < 0) {
  3749. pr_err("%s: gpio set cannot be de-activated %sd",
  3750. __func__, "dmic_gpio");
  3751. return ret;
  3752. }
  3753. }
  3754. break;
  3755. default:
  3756. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3757. return -EINVAL;
  3758. }
  3759. return 0;
  3760. }
  3761. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3762. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3763. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3764. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3765. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3766. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3767. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3768. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3769. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3770. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3771. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3772. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3773. };
  3774. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  3775. {
  3776. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3777. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
  3778. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3779. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3780. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3781. }
  3782. static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
  3783. {
  3784. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3785. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
  3786. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3787. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3788. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3789. }
  3790. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3791. {
  3792. int ret = -EINVAL;
  3793. struct snd_soc_component *component;
  3794. struct snd_soc_dapm_context *dapm;
  3795. struct snd_card *card;
  3796. struct snd_info_entry *entry;
  3797. struct snd_soc_component *aux_comp;
  3798. struct msm_asoc_mach_data *pdata =
  3799. snd_soc_card_get_drvdata(rtd->card);
  3800. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3801. if (!component) {
  3802. pr_err("%s: could not find component for bolero_codec\n",
  3803. __func__);
  3804. return ret;
  3805. }
  3806. dapm = snd_soc_component_get_dapm(component);
  3807. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3808. ARRAY_SIZE(msm_int_snd_controls));
  3809. if (ret < 0) {
  3810. pr_err("%s: add_component_controls failed: %d\n",
  3811. __func__, ret);
  3812. return ret;
  3813. }
  3814. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3815. ARRAY_SIZE(msm_common_snd_controls));
  3816. if (ret < 0) {
  3817. pr_err("%s: add common snd controls failed: %d\n",
  3818. __func__, ret);
  3819. return ret;
  3820. }
  3821. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3822. ARRAY_SIZE(msm_int_dapm_widgets));
  3823. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3824. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3825. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3826. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3827. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3828. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3829. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3830. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3831. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  3832. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3833. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3834. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3835. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3836. snd_soc_dapm_sync(dapm);
  3837. /*
  3838. * Send speaker configuration only for WSA8810.
  3839. * Default configuration is for WSA8815.
  3840. */
  3841. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  3842. __func__, rtd->card->num_aux_devs);
  3843. if (rtd->card->num_aux_devs &&
  3844. !list_empty(&rtd->card->component_dev_list)) {
  3845. aux_comp = list_first_entry(
  3846. &rtd->card->component_dev_list,
  3847. struct snd_soc_component,
  3848. card_aux_list);
  3849. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  3850. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  3851. wsa_macro_set_spkr_mode(component,
  3852. WSA_MACRO_SPKR_MODE_1);
  3853. wsa_macro_set_spkr_gain_offset(component,
  3854. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  3855. }
  3856. bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
  3857. sm_port_map);
  3858. }
  3859. card = rtd->card->snd_card;
  3860. if (!pdata->codec_root) {
  3861. entry = snd_info_create_subdir(card->module, "codecs",
  3862. card->proc_root);
  3863. if (!entry) {
  3864. pr_debug("%s: Cannot create codecs module entry\n",
  3865. __func__);
  3866. ret = 0;
  3867. goto err;
  3868. }
  3869. pdata->codec_root = entry;
  3870. }
  3871. bolero_info_create_codec_entry(pdata->codec_root, component);
  3872. bolero_register_wake_irq(component, false);
  3873. codec_reg_done = true;
  3874. return 0;
  3875. err:
  3876. return ret;
  3877. }
  3878. static void *def_wcd_mbhc_cal(void)
  3879. {
  3880. void *wcd_mbhc_cal;
  3881. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  3882. u16 *btn_high;
  3883. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  3884. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  3885. if (!wcd_mbhc_cal)
  3886. return NULL;
  3887. WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
  3888. WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
  3889. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  3890. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  3891. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  3892. btn_high[0] = 75;
  3893. btn_high[1] = 150;
  3894. btn_high[2] = 237;
  3895. btn_high[3] = 500;
  3896. btn_high[4] = 500;
  3897. btn_high[5] = 500;
  3898. btn_high[6] = 500;
  3899. btn_high[7] = 500;
  3900. return wcd_mbhc_cal;
  3901. }
  3902. /* Digital audio interface glue - connects codec <---> CPU */
  3903. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3904. /* FrontEnd DAI Links */
  3905. {/* hw:x,0 */
  3906. .name = MSM_DAILINK_NAME(Media1),
  3907. .stream_name = "MultiMedia1",
  3908. .cpu_dai_name = "MultiMedia1",
  3909. .platform_name = "msm-pcm-dsp.0",
  3910. .dynamic = 1,
  3911. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3912. .dpcm_playback = 1,
  3913. .dpcm_capture = 1,
  3914. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3915. SND_SOC_DPCM_TRIGGER_POST},
  3916. .codec_dai_name = "snd-soc-dummy-dai",
  3917. .codec_name = "snd-soc-dummy",
  3918. .ignore_suspend = 1,
  3919. /* this dainlink has playback support */
  3920. .ignore_pmdown_time = 1,
  3921. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3922. },
  3923. {/* hw:x,1 */
  3924. .name = MSM_DAILINK_NAME(Media2),
  3925. .stream_name = "MultiMedia2",
  3926. .cpu_dai_name = "MultiMedia2",
  3927. .platform_name = "msm-pcm-dsp.0",
  3928. .dynamic = 1,
  3929. .dpcm_playback = 1,
  3930. .dpcm_capture = 1,
  3931. .codec_dai_name = "snd-soc-dummy-dai",
  3932. .codec_name = "snd-soc-dummy",
  3933. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3934. SND_SOC_DPCM_TRIGGER_POST},
  3935. .ignore_suspend = 1,
  3936. /* this dainlink has playback support */
  3937. .ignore_pmdown_time = 1,
  3938. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3939. },
  3940. {/* hw:x,2 */
  3941. .name = "VoiceMMode1",
  3942. .stream_name = "VoiceMMode1",
  3943. .cpu_dai_name = "VoiceMMode1",
  3944. .platform_name = "msm-pcm-voice",
  3945. .dynamic = 1,
  3946. .dpcm_playback = 1,
  3947. .dpcm_capture = 1,
  3948. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3949. SND_SOC_DPCM_TRIGGER_POST},
  3950. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3951. .ignore_suspend = 1,
  3952. .ignore_pmdown_time = 1,
  3953. .codec_dai_name = "snd-soc-dummy-dai",
  3954. .codec_name = "snd-soc-dummy",
  3955. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3956. },
  3957. {/* hw:x,3 */
  3958. .name = "MSM VoIP",
  3959. .stream_name = "VoIP",
  3960. .cpu_dai_name = "VoIP",
  3961. .platform_name = "msm-voip-dsp",
  3962. .dynamic = 1,
  3963. .dpcm_playback = 1,
  3964. .dpcm_capture = 1,
  3965. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3966. SND_SOC_DPCM_TRIGGER_POST},
  3967. .codec_dai_name = "snd-soc-dummy-dai",
  3968. .codec_name = "snd-soc-dummy",
  3969. .ignore_suspend = 1,
  3970. /* this dainlink has playback support */
  3971. .ignore_pmdown_time = 1,
  3972. .id = MSM_FRONTEND_DAI_VOIP,
  3973. },
  3974. {/* hw:x,4 */
  3975. .name = MSM_DAILINK_NAME(ULL),
  3976. .stream_name = "MultiMedia3",
  3977. .cpu_dai_name = "MultiMedia3",
  3978. .platform_name = "msm-pcm-dsp.2",
  3979. .dynamic = 1,
  3980. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3981. .dpcm_playback = 1,
  3982. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3983. SND_SOC_DPCM_TRIGGER_POST},
  3984. .codec_dai_name = "snd-soc-dummy-dai",
  3985. .codec_name = "snd-soc-dummy",
  3986. .ignore_suspend = 1,
  3987. /* this dainlink has playback support */
  3988. .ignore_pmdown_time = 1,
  3989. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3990. },
  3991. {/* hw:x,5 */
  3992. .name = "MSM AFE-PCM RX",
  3993. .stream_name = "AFE-PROXY RX",
  3994. .cpu_dai_name = "msm-dai-q6-dev.241",
  3995. .codec_name = "msm-stub-codec.1",
  3996. .codec_dai_name = "msm-stub-rx",
  3997. .platform_name = "msm-pcm-afe",
  3998. .dpcm_playback = 1,
  3999. .ignore_suspend = 1,
  4000. /* this dainlink has playback support */
  4001. .ignore_pmdown_time = 1,
  4002. },
  4003. {/* hw:x,6 */
  4004. .name = "MSM AFE-PCM TX",
  4005. .stream_name = "AFE-PROXY TX",
  4006. .cpu_dai_name = "msm-dai-q6-dev.240",
  4007. .codec_name = "msm-stub-codec.1",
  4008. .codec_dai_name = "msm-stub-tx",
  4009. .platform_name = "msm-pcm-afe",
  4010. .dpcm_capture = 1,
  4011. .ignore_suspend = 1,
  4012. },
  4013. {/* hw:x,7 */
  4014. .name = MSM_DAILINK_NAME(Compress1),
  4015. .stream_name = "Compress1",
  4016. .cpu_dai_name = "MultiMedia4",
  4017. .platform_name = "msm-compress-dsp",
  4018. .dynamic = 1,
  4019. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  4020. .dpcm_playback = 1,
  4021. .dpcm_capture = 1,
  4022. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4023. SND_SOC_DPCM_TRIGGER_POST},
  4024. .codec_dai_name = "snd-soc-dummy-dai",
  4025. .codec_name = "snd-soc-dummy",
  4026. .ignore_suspend = 1,
  4027. .ignore_pmdown_time = 1,
  4028. /* this dainlink has playback support */
  4029. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  4030. },
  4031. /* Hostless PCM purpose */
  4032. {/* hw:x,8 */
  4033. .name = "AUXPCM Hostless",
  4034. .stream_name = "AUXPCM Hostless",
  4035. .cpu_dai_name = "AUXPCM_HOSTLESS",
  4036. .platform_name = "msm-pcm-hostless",
  4037. .dynamic = 1,
  4038. .dpcm_playback = 1,
  4039. .dpcm_capture = 1,
  4040. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4041. SND_SOC_DPCM_TRIGGER_POST},
  4042. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4043. .ignore_suspend = 1,
  4044. /* this dainlink has playback support */
  4045. .ignore_pmdown_time = 1,
  4046. .codec_dai_name = "snd-soc-dummy-dai",
  4047. .codec_name = "snd-soc-dummy",
  4048. },
  4049. {/* hw:x,9 */
  4050. .name = MSM_DAILINK_NAME(LowLatency),
  4051. .stream_name = "MultiMedia5",
  4052. .cpu_dai_name = "MultiMedia5",
  4053. .platform_name = "msm-pcm-dsp.1",
  4054. .dynamic = 1,
  4055. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4056. .dpcm_playback = 1,
  4057. .dpcm_capture = 1,
  4058. .codec_dai_name = "snd-soc-dummy-dai",
  4059. .codec_name = "snd-soc-dummy",
  4060. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4061. SND_SOC_DPCM_TRIGGER_POST},
  4062. .ignore_suspend = 1,
  4063. /* this dainlink has playback support */
  4064. .ignore_pmdown_time = 1,
  4065. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  4066. .ops = &msm_fe_qos_ops,
  4067. },
  4068. {/* hw:x,10 */
  4069. .name = "Listen 1 Audio Service",
  4070. .stream_name = "Listen 1 Audio Service",
  4071. .cpu_dai_name = "LSM1",
  4072. .platform_name = "msm-lsm-client",
  4073. .dynamic = 1,
  4074. .dpcm_capture = 1,
  4075. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4076. SND_SOC_DPCM_TRIGGER_POST },
  4077. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4078. .ignore_suspend = 1,
  4079. .codec_dai_name = "snd-soc-dummy-dai",
  4080. .codec_name = "snd-soc-dummy",
  4081. .id = MSM_FRONTEND_DAI_LSM1,
  4082. },
  4083. /* Multiple Tunnel instances */
  4084. {/* hw:x,11 */
  4085. .name = MSM_DAILINK_NAME(Compress2),
  4086. .stream_name = "Compress2",
  4087. .cpu_dai_name = "MultiMedia7",
  4088. .platform_name = "msm-compress-dsp",
  4089. .dynamic = 1,
  4090. .dpcm_playback = 1,
  4091. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4092. SND_SOC_DPCM_TRIGGER_POST},
  4093. .codec_dai_name = "snd-soc-dummy-dai",
  4094. .codec_name = "snd-soc-dummy",
  4095. .ignore_suspend = 1,
  4096. .ignore_pmdown_time = 1,
  4097. /* this dainlink has playback support */
  4098. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  4099. },
  4100. {/* hw:x,12 */
  4101. .name = MSM_DAILINK_NAME(MultiMedia10),
  4102. .stream_name = "MultiMedia10",
  4103. .cpu_dai_name = "MultiMedia10",
  4104. .platform_name = "msm-pcm-dsp.1",
  4105. .dynamic = 1,
  4106. .dpcm_playback = 1,
  4107. .dpcm_capture = 1,
  4108. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4109. SND_SOC_DPCM_TRIGGER_POST},
  4110. .codec_dai_name = "snd-soc-dummy-dai",
  4111. .codec_name = "snd-soc-dummy",
  4112. .ignore_suspend = 1,
  4113. .ignore_pmdown_time = 1,
  4114. /* this dainlink has playback support */
  4115. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  4116. },
  4117. {/* hw:x,13 */
  4118. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  4119. .stream_name = "MM_NOIRQ",
  4120. .cpu_dai_name = "MultiMedia8",
  4121. .platform_name = "msm-pcm-dsp-noirq",
  4122. .dynamic = 1,
  4123. .dpcm_playback = 1,
  4124. .dpcm_capture = 1,
  4125. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4126. SND_SOC_DPCM_TRIGGER_POST},
  4127. .codec_dai_name = "snd-soc-dummy-dai",
  4128. .codec_name = "snd-soc-dummy",
  4129. .ignore_suspend = 1,
  4130. .ignore_pmdown_time = 1,
  4131. /* this dainlink has playback support */
  4132. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  4133. .ops = &msm_fe_qos_ops,
  4134. },
  4135. /* HDMI Hostless */
  4136. {/* hw:x,14 */
  4137. .name = "HDMI_RX_HOSTLESS",
  4138. .stream_name = "HDMI_RX_HOSTLESS",
  4139. .cpu_dai_name = "HDMI_HOSTLESS",
  4140. .platform_name = "msm-pcm-hostless",
  4141. .dynamic = 1,
  4142. .dpcm_playback = 1,
  4143. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4144. SND_SOC_DPCM_TRIGGER_POST},
  4145. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4146. .ignore_suspend = 1,
  4147. .ignore_pmdown_time = 1,
  4148. .codec_dai_name = "snd-soc-dummy-dai",
  4149. .codec_name = "snd-soc-dummy",
  4150. },
  4151. {/* hw:x,15 */
  4152. .name = "VoiceMMode2",
  4153. .stream_name = "VoiceMMode2",
  4154. .cpu_dai_name = "VoiceMMode2",
  4155. .platform_name = "msm-pcm-voice",
  4156. .dynamic = 1,
  4157. .dpcm_playback = 1,
  4158. .dpcm_capture = 1,
  4159. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4160. SND_SOC_DPCM_TRIGGER_POST},
  4161. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4162. .ignore_suspend = 1,
  4163. .ignore_pmdown_time = 1,
  4164. .codec_dai_name = "snd-soc-dummy-dai",
  4165. .codec_name = "snd-soc-dummy",
  4166. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  4167. },
  4168. /* LSM FE */
  4169. {/* hw:x,16 */
  4170. .name = "Listen 2 Audio Service",
  4171. .stream_name = "Listen 2 Audio Service",
  4172. .cpu_dai_name = "LSM2",
  4173. .platform_name = "msm-lsm-client",
  4174. .dynamic = 1,
  4175. .dpcm_capture = 1,
  4176. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4177. SND_SOC_DPCM_TRIGGER_POST },
  4178. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4179. .ignore_suspend = 1,
  4180. .codec_dai_name = "snd-soc-dummy-dai",
  4181. .codec_name = "snd-soc-dummy",
  4182. .id = MSM_FRONTEND_DAI_LSM2,
  4183. },
  4184. {/* hw:x,17 */
  4185. .name = "Listen 3 Audio Service",
  4186. .stream_name = "Listen 3 Audio Service",
  4187. .cpu_dai_name = "LSM3",
  4188. .platform_name = "msm-lsm-client",
  4189. .dynamic = 1,
  4190. .dpcm_capture = 1,
  4191. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4192. SND_SOC_DPCM_TRIGGER_POST },
  4193. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4194. .ignore_suspend = 1,
  4195. .codec_dai_name = "snd-soc-dummy-dai",
  4196. .codec_name = "snd-soc-dummy",
  4197. .id = MSM_FRONTEND_DAI_LSM3,
  4198. },
  4199. {/* hw:x,18 */
  4200. .name = "Listen 4 Audio Service",
  4201. .stream_name = "Listen 4 Audio Service",
  4202. .cpu_dai_name = "LSM4",
  4203. .platform_name = "msm-lsm-client",
  4204. .dynamic = 1,
  4205. .dpcm_capture = 1,
  4206. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4207. SND_SOC_DPCM_TRIGGER_POST },
  4208. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4209. .ignore_suspend = 1,
  4210. .codec_dai_name = "snd-soc-dummy-dai",
  4211. .codec_name = "snd-soc-dummy",
  4212. .id = MSM_FRONTEND_DAI_LSM4,
  4213. },
  4214. {/* hw:x,19 */
  4215. .name = "Listen 5 Audio Service",
  4216. .stream_name = "Listen 5 Audio Service",
  4217. .cpu_dai_name = "LSM5",
  4218. .platform_name = "msm-lsm-client",
  4219. .dynamic = 1,
  4220. .dpcm_capture = 1,
  4221. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4222. SND_SOC_DPCM_TRIGGER_POST },
  4223. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4224. .ignore_suspend = 1,
  4225. .codec_dai_name = "snd-soc-dummy-dai",
  4226. .codec_name = "snd-soc-dummy",
  4227. .id = MSM_FRONTEND_DAI_LSM5,
  4228. },
  4229. {/* hw:x,20 */
  4230. .name = "Listen 6 Audio Service",
  4231. .stream_name = "Listen 6 Audio Service",
  4232. .cpu_dai_name = "LSM6",
  4233. .platform_name = "msm-lsm-client",
  4234. .dynamic = 1,
  4235. .dpcm_capture = 1,
  4236. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4237. SND_SOC_DPCM_TRIGGER_POST },
  4238. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4239. .ignore_suspend = 1,
  4240. .codec_dai_name = "snd-soc-dummy-dai",
  4241. .codec_name = "snd-soc-dummy",
  4242. .id = MSM_FRONTEND_DAI_LSM6,
  4243. },
  4244. {/* hw:x,21 */
  4245. .name = "Listen 7 Audio Service",
  4246. .stream_name = "Listen 7 Audio Service",
  4247. .cpu_dai_name = "LSM7",
  4248. .platform_name = "msm-lsm-client",
  4249. .dynamic = 1,
  4250. .dpcm_capture = 1,
  4251. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4252. SND_SOC_DPCM_TRIGGER_POST },
  4253. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4254. .ignore_suspend = 1,
  4255. .codec_dai_name = "snd-soc-dummy-dai",
  4256. .codec_name = "snd-soc-dummy",
  4257. .id = MSM_FRONTEND_DAI_LSM7,
  4258. },
  4259. {/* hw:x,22 */
  4260. .name = "Listen 8 Audio Service",
  4261. .stream_name = "Listen 8 Audio Service",
  4262. .cpu_dai_name = "LSM8",
  4263. .platform_name = "msm-lsm-client",
  4264. .dynamic = 1,
  4265. .dpcm_capture = 1,
  4266. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4267. SND_SOC_DPCM_TRIGGER_POST },
  4268. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4269. .ignore_suspend = 1,
  4270. .codec_dai_name = "snd-soc-dummy-dai",
  4271. .codec_name = "snd-soc-dummy",
  4272. .id = MSM_FRONTEND_DAI_LSM8,
  4273. },
  4274. {/* hw:x,23 */
  4275. .name = MSM_DAILINK_NAME(Media9),
  4276. .stream_name = "MultiMedia9",
  4277. .cpu_dai_name = "MultiMedia9",
  4278. .platform_name = "msm-pcm-dsp.0",
  4279. .dynamic = 1,
  4280. .dpcm_playback = 1,
  4281. .dpcm_capture = 1,
  4282. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4283. SND_SOC_DPCM_TRIGGER_POST},
  4284. .codec_dai_name = "snd-soc-dummy-dai",
  4285. .codec_name = "snd-soc-dummy",
  4286. .ignore_suspend = 1,
  4287. /* this dainlink has playback support */
  4288. .ignore_pmdown_time = 1,
  4289. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  4290. },
  4291. {/* hw:x,24 */
  4292. .name = MSM_DAILINK_NAME(Compress4),
  4293. .stream_name = "Compress4",
  4294. .cpu_dai_name = "MultiMedia11",
  4295. .platform_name = "msm-compress-dsp",
  4296. .dynamic = 1,
  4297. .dpcm_playback = 1,
  4298. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4299. SND_SOC_DPCM_TRIGGER_POST},
  4300. .codec_dai_name = "snd-soc-dummy-dai",
  4301. .codec_name = "snd-soc-dummy",
  4302. .ignore_suspend = 1,
  4303. .ignore_pmdown_time = 1,
  4304. /* this dainlink has playback support */
  4305. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  4306. },
  4307. {/* hw:x,25 */
  4308. .name = MSM_DAILINK_NAME(Compress5),
  4309. .stream_name = "Compress5",
  4310. .cpu_dai_name = "MultiMedia12",
  4311. .platform_name = "msm-compress-dsp",
  4312. .dynamic = 1,
  4313. .dpcm_playback = 1,
  4314. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4315. SND_SOC_DPCM_TRIGGER_POST},
  4316. .codec_dai_name = "snd-soc-dummy-dai",
  4317. .codec_name = "snd-soc-dummy",
  4318. .ignore_suspend = 1,
  4319. .ignore_pmdown_time = 1,
  4320. /* this dainlink has playback support */
  4321. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  4322. },
  4323. {/* hw:x,26 */
  4324. .name = MSM_DAILINK_NAME(Compress6),
  4325. .stream_name = "Compress6",
  4326. .cpu_dai_name = "MultiMedia13",
  4327. .platform_name = "msm-compress-dsp",
  4328. .dynamic = 1,
  4329. .dpcm_playback = 1,
  4330. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4331. SND_SOC_DPCM_TRIGGER_POST},
  4332. .codec_dai_name = "snd-soc-dummy-dai",
  4333. .codec_name = "snd-soc-dummy",
  4334. .ignore_suspend = 1,
  4335. .ignore_pmdown_time = 1,
  4336. /* this dainlink has playback support */
  4337. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  4338. },
  4339. {/* hw:x,27 */
  4340. .name = MSM_DAILINK_NAME(Compress7),
  4341. .stream_name = "Compress7",
  4342. .cpu_dai_name = "MultiMedia14",
  4343. .platform_name = "msm-compress-dsp",
  4344. .dynamic = 1,
  4345. .dpcm_playback = 1,
  4346. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4347. SND_SOC_DPCM_TRIGGER_POST},
  4348. .codec_dai_name = "snd-soc-dummy-dai",
  4349. .codec_name = "snd-soc-dummy",
  4350. .ignore_suspend = 1,
  4351. .ignore_pmdown_time = 1,
  4352. /* this dainlink has playback support */
  4353. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  4354. },
  4355. {/* hw:x,28 */
  4356. .name = MSM_DAILINK_NAME(Compress8),
  4357. .stream_name = "Compress8",
  4358. .cpu_dai_name = "MultiMedia15",
  4359. .platform_name = "msm-compress-dsp",
  4360. .dynamic = 1,
  4361. .dpcm_playback = 1,
  4362. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4363. SND_SOC_DPCM_TRIGGER_POST},
  4364. .codec_dai_name = "snd-soc-dummy-dai",
  4365. .codec_name = "snd-soc-dummy",
  4366. .ignore_suspend = 1,
  4367. .ignore_pmdown_time = 1,
  4368. /* this dainlink has playback support */
  4369. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  4370. },
  4371. {/* hw:x,29 */
  4372. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  4373. .stream_name = "MM_NOIRQ_2",
  4374. .cpu_dai_name = "MultiMedia16",
  4375. .platform_name = "msm-pcm-dsp-noirq",
  4376. .dynamic = 1,
  4377. .dpcm_playback = 1,
  4378. .dpcm_capture = 1,
  4379. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4380. SND_SOC_DPCM_TRIGGER_POST},
  4381. .codec_dai_name = "snd-soc-dummy-dai",
  4382. .codec_name = "snd-soc-dummy",
  4383. .ignore_suspend = 1,
  4384. .ignore_pmdown_time = 1,
  4385. /* this dainlink has playback support */
  4386. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  4387. },
  4388. {/* hw:x,30 */
  4389. .name = "CDC_DMA Hostless",
  4390. .stream_name = "CDC_DMA Hostless",
  4391. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  4392. .platform_name = "msm-pcm-hostless",
  4393. .dynamic = 1,
  4394. .dpcm_playback = 1,
  4395. .dpcm_capture = 1,
  4396. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4397. SND_SOC_DPCM_TRIGGER_POST},
  4398. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4399. .ignore_suspend = 1,
  4400. /* this dailink has playback support */
  4401. .ignore_pmdown_time = 1,
  4402. .codec_dai_name = "snd-soc-dummy-dai",
  4403. .codec_name = "snd-soc-dummy",
  4404. },
  4405. {/* hw:x,31 */
  4406. .name = "TX3_CDC_DMA Hostless",
  4407. .stream_name = "TX3_CDC_DMA Hostless",
  4408. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  4409. .platform_name = "msm-pcm-hostless",
  4410. .dynamic = 1,
  4411. .dpcm_capture = 1,
  4412. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4413. SND_SOC_DPCM_TRIGGER_POST},
  4414. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4415. .ignore_suspend = 1,
  4416. .codec_dai_name = "snd-soc-dummy-dai",
  4417. .codec_name = "snd-soc-dummy",
  4418. },
  4419. {/* hw:x,32 */
  4420. .name = "Tertiary MI2S TX_Hostless",
  4421. .stream_name = "Tertiary MI2S_TX Hostless Capture",
  4422. .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
  4423. .platform_name = "msm-pcm-hostless",
  4424. .dynamic = 1,
  4425. .dpcm_capture = 1,
  4426. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4427. SND_SOC_DPCM_TRIGGER_POST},
  4428. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4429. .ignore_suspend = 1,
  4430. .ignore_pmdown_time = 1,
  4431. .codec_dai_name = "snd-soc-dummy-dai",
  4432. .codec_name = "snd-soc-dummy",
  4433. },
  4434. };
  4435. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  4436. {/* hw:x,33 */
  4437. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  4438. .stream_name = "WSA CDC DMA0 Capture",
  4439. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  4440. .platform_name = "msm-pcm-hostless",
  4441. .codec_name = "bolero_codec",
  4442. .codec_dai_name = "wsa_macro_vifeedback",
  4443. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  4444. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4445. .ignore_suspend = 1,
  4446. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4447. .ops = &msm_cdc_dma_be_ops,
  4448. },
  4449. };
  4450. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  4451. {/* hw:x,34 */
  4452. .name = MSM_DAILINK_NAME(ASM Loopback),
  4453. .stream_name = "MultiMedia6",
  4454. .cpu_dai_name = "MultiMedia6",
  4455. .platform_name = "msm-pcm-loopback",
  4456. .dynamic = 1,
  4457. .dpcm_playback = 1,
  4458. .dpcm_capture = 1,
  4459. .codec_dai_name = "snd-soc-dummy-dai",
  4460. .codec_name = "snd-soc-dummy",
  4461. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4462. SND_SOC_DPCM_TRIGGER_POST},
  4463. .ignore_suspend = 1,
  4464. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4465. .ignore_pmdown_time = 1,
  4466. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  4467. },
  4468. {/* hw:x,35 */
  4469. .name = "USB Audio Hostless",
  4470. .stream_name = "USB Audio Hostless",
  4471. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  4472. .platform_name = "msm-pcm-hostless",
  4473. .dynamic = 1,
  4474. .dpcm_playback = 1,
  4475. .dpcm_capture = 1,
  4476. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4477. SND_SOC_DPCM_TRIGGER_POST},
  4478. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4479. .ignore_suspend = 1,
  4480. .ignore_pmdown_time = 1,
  4481. .codec_dai_name = "snd-soc-dummy-dai",
  4482. .codec_name = "snd-soc-dummy",
  4483. },
  4484. {/* hw:x,36 */
  4485. .name = "SLIMBUS_7 Hostless",
  4486. .stream_name = "SLIMBUS_7 Hostless",
  4487. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  4488. .platform_name = "msm-pcm-hostless",
  4489. .dynamic = 1,
  4490. .dpcm_capture = 1,
  4491. .dpcm_playback = 1,
  4492. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4493. SND_SOC_DPCM_TRIGGER_POST},
  4494. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4495. .ignore_suspend = 1,
  4496. .ignore_pmdown_time = 1,
  4497. .codec_dai_name = "snd-soc-dummy-dai",
  4498. .codec_name = "snd-soc-dummy",
  4499. },
  4500. {/* hw:x,37 */
  4501. .name = "Compress Capture",
  4502. .stream_name = "Compress9",
  4503. .cpu_dai_name = "MultiMedia17",
  4504. .platform_name = "msm-compress-dsp",
  4505. .dynamic = 1,
  4506. .dpcm_capture = 1,
  4507. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4508. SND_SOC_DPCM_TRIGGER_POST},
  4509. .codec_dai_name = "snd-soc-dummy-dai",
  4510. .codec_name = "snd-soc-dummy",
  4511. .ignore_suspend = 1,
  4512. .ignore_pmdown_time = 1,
  4513. .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
  4514. },
  4515. {/* hw:x,38 */
  4516. .name = "SLIMBUS_8 Hostless",
  4517. .stream_name = "SLIMBUS_8 Hostless",
  4518. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  4519. .platform_name = "msm-pcm-hostless",
  4520. .dynamic = 1,
  4521. .dpcm_capture = 1,
  4522. .dpcm_playback = 1,
  4523. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4524. SND_SOC_DPCM_TRIGGER_POST},
  4525. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4526. .ignore_suspend = 1,
  4527. .ignore_pmdown_time = 1,
  4528. .codec_dai_name = "snd-soc-dummy-dai",
  4529. .codec_name = "snd-soc-dummy",
  4530. },
  4531. };
  4532. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  4533. /* Backend AFE DAI Links */
  4534. {
  4535. .name = LPASS_BE_AFE_PCM_RX,
  4536. .stream_name = "AFE Playback",
  4537. .cpu_dai_name = "msm-dai-q6-dev.224",
  4538. .platform_name = "msm-pcm-routing",
  4539. .codec_name = "msm-stub-codec.1",
  4540. .codec_dai_name = "msm-stub-rx",
  4541. .no_pcm = 1,
  4542. .dpcm_playback = 1,
  4543. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  4544. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4545. /* this dainlink has playback support */
  4546. .ignore_pmdown_time = 1,
  4547. .ignore_suspend = 1,
  4548. },
  4549. {
  4550. .name = LPASS_BE_AFE_PCM_TX,
  4551. .stream_name = "AFE Capture",
  4552. .cpu_dai_name = "msm-dai-q6-dev.225",
  4553. .platform_name = "msm-pcm-routing",
  4554. .codec_name = "msm-stub-codec.1",
  4555. .codec_dai_name = "msm-stub-tx",
  4556. .no_pcm = 1,
  4557. .dpcm_capture = 1,
  4558. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  4559. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4560. .ignore_suspend = 1,
  4561. },
  4562. /* Incall Record Uplink BACK END DAI Link */
  4563. {
  4564. .name = LPASS_BE_INCALL_RECORD_TX,
  4565. .stream_name = "Voice Uplink Capture",
  4566. .cpu_dai_name = "msm-dai-q6-dev.32772",
  4567. .platform_name = "msm-pcm-routing",
  4568. .codec_name = "msm-stub-codec.1",
  4569. .codec_dai_name = "msm-stub-tx",
  4570. .no_pcm = 1,
  4571. .dpcm_capture = 1,
  4572. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  4573. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4574. .ignore_suspend = 1,
  4575. },
  4576. /* Incall Record Downlink BACK END DAI Link */
  4577. {
  4578. .name = LPASS_BE_INCALL_RECORD_RX,
  4579. .stream_name = "Voice Downlink Capture",
  4580. .cpu_dai_name = "msm-dai-q6-dev.32771",
  4581. .platform_name = "msm-pcm-routing",
  4582. .codec_name = "msm-stub-codec.1",
  4583. .codec_dai_name = "msm-stub-tx",
  4584. .no_pcm = 1,
  4585. .dpcm_capture = 1,
  4586. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  4587. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4588. .ignore_suspend = 1,
  4589. },
  4590. /* Incall Music BACK END DAI Link */
  4591. {
  4592. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  4593. .stream_name = "Voice Farend Playback",
  4594. .cpu_dai_name = "msm-dai-q6-dev.32773",
  4595. .platform_name = "msm-pcm-routing",
  4596. .codec_name = "msm-stub-codec.1",
  4597. .codec_dai_name = "msm-stub-rx",
  4598. .no_pcm = 1,
  4599. .dpcm_playback = 1,
  4600. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  4601. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4602. .ignore_suspend = 1,
  4603. .ignore_pmdown_time = 1,
  4604. },
  4605. /* Incall Music 2 BACK END DAI Link */
  4606. {
  4607. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  4608. .stream_name = "Voice2 Farend Playback",
  4609. .cpu_dai_name = "msm-dai-q6-dev.32770",
  4610. .platform_name = "msm-pcm-routing",
  4611. .codec_name = "msm-stub-codec.1",
  4612. .codec_dai_name = "msm-stub-rx",
  4613. .no_pcm = 1,
  4614. .dpcm_playback = 1,
  4615. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  4616. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4617. .ignore_suspend = 1,
  4618. .ignore_pmdown_time = 1,
  4619. },
  4620. {
  4621. .name = LPASS_BE_USB_AUDIO_RX,
  4622. .stream_name = "USB Audio Playback",
  4623. .cpu_dai_name = "msm-dai-q6-dev.28672",
  4624. .platform_name = "msm-pcm-routing",
  4625. .codec_name = "msm-stub-codec.1",
  4626. .codec_dai_name = "msm-stub-rx",
  4627. .no_pcm = 1,
  4628. .dpcm_playback = 1,
  4629. .id = MSM_BACKEND_DAI_USB_RX,
  4630. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4631. .ignore_pmdown_time = 1,
  4632. .ignore_suspend = 1,
  4633. },
  4634. {
  4635. .name = LPASS_BE_USB_AUDIO_TX,
  4636. .stream_name = "USB Audio Capture",
  4637. .cpu_dai_name = "msm-dai-q6-dev.28673",
  4638. .platform_name = "msm-pcm-routing",
  4639. .codec_name = "msm-stub-codec.1",
  4640. .codec_dai_name = "msm-stub-tx",
  4641. .no_pcm = 1,
  4642. .dpcm_capture = 1,
  4643. .id = MSM_BACKEND_DAI_USB_TX,
  4644. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4645. .ignore_suspend = 1,
  4646. },
  4647. {
  4648. .name = LPASS_BE_PRI_TDM_RX_0,
  4649. .stream_name = "Primary TDM0 Playback",
  4650. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  4651. .platform_name = "msm-pcm-routing",
  4652. .codec_name = "msm-stub-codec.1",
  4653. .codec_dai_name = "msm-stub-rx",
  4654. .no_pcm = 1,
  4655. .dpcm_playback = 1,
  4656. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  4657. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4658. .ops = &kona_tdm_be_ops,
  4659. .ignore_suspend = 1,
  4660. .ignore_pmdown_time = 1,
  4661. },
  4662. {
  4663. .name = LPASS_BE_PRI_TDM_TX_0,
  4664. .stream_name = "Primary TDM0 Capture",
  4665. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  4666. .platform_name = "msm-pcm-routing",
  4667. .codec_name = "msm-stub-codec.1",
  4668. .codec_dai_name = "msm-stub-tx",
  4669. .no_pcm = 1,
  4670. .dpcm_capture = 1,
  4671. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  4672. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4673. .ops = &kona_tdm_be_ops,
  4674. .ignore_suspend = 1,
  4675. },
  4676. {
  4677. .name = LPASS_BE_SEC_TDM_RX_0,
  4678. .stream_name = "Secondary TDM0 Playback",
  4679. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  4680. .platform_name = "msm-pcm-routing",
  4681. .codec_name = "msm-stub-codec.1",
  4682. .codec_dai_name = "msm-stub-rx",
  4683. .no_pcm = 1,
  4684. .dpcm_playback = 1,
  4685. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  4686. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4687. .ops = &kona_tdm_be_ops,
  4688. .ignore_suspend = 1,
  4689. .ignore_pmdown_time = 1,
  4690. },
  4691. {
  4692. .name = LPASS_BE_SEC_TDM_TX_0,
  4693. .stream_name = "Secondary TDM0 Capture",
  4694. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  4695. .platform_name = "msm-pcm-routing",
  4696. .codec_name = "msm-stub-codec.1",
  4697. .codec_dai_name = "msm-stub-tx",
  4698. .no_pcm = 1,
  4699. .dpcm_capture = 1,
  4700. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  4701. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4702. .ops = &kona_tdm_be_ops,
  4703. .ignore_suspend = 1,
  4704. },
  4705. {
  4706. .name = LPASS_BE_TERT_TDM_RX_0,
  4707. .stream_name = "Tertiary TDM0 Playback",
  4708. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  4709. .platform_name = "msm-pcm-routing",
  4710. .codec_name = "msm-stub-codec.1",
  4711. .codec_dai_name = "msm-stub-rx",
  4712. .no_pcm = 1,
  4713. .dpcm_playback = 1,
  4714. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  4715. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4716. .ops = &kona_tdm_be_ops,
  4717. .ignore_suspend = 1,
  4718. .ignore_pmdown_time = 1,
  4719. },
  4720. {
  4721. .name = LPASS_BE_TERT_TDM_TX_0,
  4722. .stream_name = "Tertiary TDM0 Capture",
  4723. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  4724. .platform_name = "msm-pcm-routing",
  4725. .codec_name = "msm-stub-codec.1",
  4726. .codec_dai_name = "msm-stub-tx",
  4727. .no_pcm = 1,
  4728. .dpcm_capture = 1,
  4729. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  4730. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4731. .ops = &kona_tdm_be_ops,
  4732. .ignore_suspend = 1,
  4733. },
  4734. };
  4735. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  4736. {
  4737. .name = LPASS_BE_SLIMBUS_7_RX,
  4738. .stream_name = "Slimbus7 Playback",
  4739. .cpu_dai_name = "msm-dai-q6-dev.16398",
  4740. .platform_name = "msm-pcm-routing",
  4741. .codec_name = "btfmslim_slave",
  4742. /* BT codec driver determines capabilities based on
  4743. * dai name, bt codecdai name should always contains
  4744. * supported usecase information
  4745. */
  4746. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  4747. .no_pcm = 1,
  4748. .dpcm_playback = 1,
  4749. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  4750. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4751. .init = &msm_wcn_init,
  4752. .ops = &msm_wcn_ops,
  4753. /* dai link has playback support */
  4754. .ignore_pmdown_time = 1,
  4755. .ignore_suspend = 1,
  4756. },
  4757. {
  4758. .name = LPASS_BE_SLIMBUS_7_TX,
  4759. .stream_name = "Slimbus7 Capture",
  4760. .cpu_dai_name = "msm-dai-q6-dev.16399",
  4761. .platform_name = "msm-pcm-routing",
  4762. .codec_name = "btfmslim_slave",
  4763. .codec_dai_name = "btfm_bt_sco_slim_tx",
  4764. .no_pcm = 1,
  4765. .dpcm_capture = 1,
  4766. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  4767. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4768. .ops = &msm_wcn_ops,
  4769. .ignore_suspend = 1,
  4770. },
  4771. };
  4772. static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
  4773. {
  4774. .name = LPASS_BE_SLIMBUS_7_RX,
  4775. .stream_name = "Slimbus7 Playback",
  4776. .cpu_dai_name = "msm-dai-q6-dev.16398",
  4777. .platform_name = "msm-pcm-routing",
  4778. .codec_name = "btfmslim_slave",
  4779. /* BT codec driver determines capabilities based on
  4780. * dai name, bt codecdai name should always contains
  4781. * supported usecase information
  4782. */
  4783. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  4784. .no_pcm = 1,
  4785. .dpcm_playback = 1,
  4786. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  4787. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4788. .init = &msm_wcn_init_lito,
  4789. .ops = &msm_wcn_ops_lito,
  4790. /* dai link has playback support */
  4791. .ignore_pmdown_time = 1,
  4792. .ignore_suspend = 1,
  4793. },
  4794. {
  4795. .name = LPASS_BE_SLIMBUS_7_TX,
  4796. .stream_name = "Slimbus7 Capture",
  4797. .cpu_dai_name = "msm-dai-q6-dev.16399",
  4798. .platform_name = "msm-pcm-routing",
  4799. .codec_name = "btfmslim_slave",
  4800. .codec_dai_name = "btfm_bt_sco_slim_tx",
  4801. .no_pcm = 1,
  4802. .dpcm_capture = 1,
  4803. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  4804. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4805. .ops = &msm_wcn_ops_lito,
  4806. .ignore_suspend = 1,
  4807. },
  4808. {
  4809. .name = LPASS_BE_SLIMBUS_8_TX,
  4810. .stream_name = "Slimbus8 Capture",
  4811. .cpu_dai_name = "msm-dai-q6-dev.16401",
  4812. .platform_name = "msm-pcm-routing",
  4813. .codec_name = "btfmslim_slave",
  4814. .codec_dai_name = "btfm_fm_slim_tx",
  4815. .no_pcm = 1,
  4816. .dpcm_capture = 1,
  4817. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  4818. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4819. .ops = &msm_wcn_ops_lito,
  4820. .ignore_suspend = 1,
  4821. },
  4822. };
  4823. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  4824. /* DISP PORT BACK END DAI Link */
  4825. {
  4826. .name = LPASS_BE_DISPLAY_PORT,
  4827. .stream_name = "Display Port Playback",
  4828. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4829. .platform_name = "msm-pcm-routing",
  4830. .codec_name = "msm-ext-disp-audio-codec-rx",
  4831. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  4832. .no_pcm = 1,
  4833. .dpcm_playback = 1,
  4834. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  4835. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4836. .ignore_pmdown_time = 1,
  4837. .ignore_suspend = 1,
  4838. },
  4839. /* DISP PORT 1 BACK END DAI Link */
  4840. {
  4841. .name = LPASS_BE_DISPLAY_PORT1,
  4842. .stream_name = "Display Port1 Playback",
  4843. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4844. .platform_name = "msm-pcm-routing",
  4845. .codec_name = "msm-ext-disp-audio-codec-rx",
  4846. .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
  4847. .no_pcm = 1,
  4848. .dpcm_playback = 1,
  4849. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
  4850. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4851. .ignore_pmdown_time = 1,
  4852. .ignore_suspend = 1,
  4853. },
  4854. };
  4855. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  4856. {
  4857. .name = LPASS_BE_PRI_MI2S_RX,
  4858. .stream_name = "Primary MI2S Playback",
  4859. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4860. .platform_name = "msm-pcm-routing",
  4861. .codec_name = "msm-stub-codec.1",
  4862. .codec_dai_name = "msm-stub-rx",
  4863. .no_pcm = 1,
  4864. .dpcm_playback = 1,
  4865. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  4866. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4867. .ops = &msm_mi2s_be_ops,
  4868. .ignore_suspend = 1,
  4869. .ignore_pmdown_time = 1,
  4870. },
  4871. {
  4872. .name = LPASS_BE_PRI_MI2S_TX,
  4873. .stream_name = "Primary MI2S Capture",
  4874. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4875. .platform_name = "msm-pcm-routing",
  4876. .codec_name = "msm-stub-codec.1",
  4877. .codec_dai_name = "msm-stub-tx",
  4878. .no_pcm = 1,
  4879. .dpcm_capture = 1,
  4880. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  4881. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4882. .ops = &msm_mi2s_be_ops,
  4883. .ignore_suspend = 1,
  4884. },
  4885. {
  4886. .name = LPASS_BE_SEC_MI2S_RX,
  4887. .stream_name = "Secondary MI2S Playback",
  4888. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4889. .platform_name = "msm-pcm-routing",
  4890. .codec_name = "msm-stub-codec.1",
  4891. .codec_dai_name = "msm-stub-rx",
  4892. .no_pcm = 1,
  4893. .dpcm_playback = 1,
  4894. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  4895. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4896. .ops = &msm_mi2s_be_ops,
  4897. .ignore_suspend = 1,
  4898. .ignore_pmdown_time = 1,
  4899. },
  4900. {
  4901. .name = LPASS_BE_SEC_MI2S_TX,
  4902. .stream_name = "Secondary MI2S Capture",
  4903. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4904. .platform_name = "msm-pcm-routing",
  4905. .codec_name = "msm-stub-codec.1",
  4906. .codec_dai_name = "msm-stub-tx",
  4907. .no_pcm = 1,
  4908. .dpcm_capture = 1,
  4909. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  4910. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4911. .ops = &msm_mi2s_be_ops,
  4912. .ignore_suspend = 1,
  4913. },
  4914. {
  4915. .name = LPASS_BE_TERT_MI2S_RX,
  4916. .stream_name = "Tertiary MI2S Playback",
  4917. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4918. .platform_name = "msm-pcm-routing",
  4919. .codec_name = "msm-stub-codec.1",
  4920. .codec_dai_name = "msm-stub-rx",
  4921. .no_pcm = 1,
  4922. .dpcm_playback = 1,
  4923. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  4924. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4925. .ops = &msm_mi2s_be_ops,
  4926. .ignore_suspend = 1,
  4927. .ignore_pmdown_time = 1,
  4928. },
  4929. {
  4930. .name = LPASS_BE_TERT_MI2S_TX,
  4931. .stream_name = "Tertiary MI2S Capture",
  4932. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4933. .platform_name = "msm-pcm-routing",
  4934. .codec_name = "msm-stub-codec.1",
  4935. .codec_dai_name = "msm-stub-tx",
  4936. .no_pcm = 1,
  4937. .dpcm_capture = 1,
  4938. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  4939. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4940. .ops = &msm_mi2s_be_ops,
  4941. .ignore_suspend = 1,
  4942. },
  4943. };
  4944. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  4945. /* Primary AUX PCM Backend DAI Links */
  4946. {
  4947. .name = LPASS_BE_AUXPCM_RX,
  4948. .stream_name = "AUX PCM Playback",
  4949. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4950. .platform_name = "msm-pcm-routing",
  4951. .codec_name = "msm-stub-codec.1",
  4952. .codec_dai_name = "msm-stub-rx",
  4953. .no_pcm = 1,
  4954. .dpcm_playback = 1,
  4955. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4956. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4957. .ignore_pmdown_time = 1,
  4958. .ignore_suspend = 1,
  4959. },
  4960. {
  4961. .name = LPASS_BE_AUXPCM_TX,
  4962. .stream_name = "AUX PCM Capture",
  4963. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4964. .platform_name = "msm-pcm-routing",
  4965. .codec_name = "msm-stub-codec.1",
  4966. .codec_dai_name = "msm-stub-tx",
  4967. .no_pcm = 1,
  4968. .dpcm_capture = 1,
  4969. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4970. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4971. .ignore_suspend = 1,
  4972. },
  4973. /* Secondary AUX PCM Backend DAI Links */
  4974. {
  4975. .name = LPASS_BE_SEC_AUXPCM_RX,
  4976. .stream_name = "Sec AUX PCM Playback",
  4977. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4978. .platform_name = "msm-pcm-routing",
  4979. .codec_name = "msm-stub-codec.1",
  4980. .codec_dai_name = "msm-stub-rx",
  4981. .no_pcm = 1,
  4982. .dpcm_playback = 1,
  4983. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  4984. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4985. .ignore_pmdown_time = 1,
  4986. .ignore_suspend = 1,
  4987. },
  4988. {
  4989. .name = LPASS_BE_SEC_AUXPCM_TX,
  4990. .stream_name = "Sec AUX PCM Capture",
  4991. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4992. .platform_name = "msm-pcm-routing",
  4993. .codec_name = "msm-stub-codec.1",
  4994. .codec_dai_name = "msm-stub-tx",
  4995. .no_pcm = 1,
  4996. .dpcm_capture = 1,
  4997. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  4998. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4999. .ignore_suspend = 1,
  5000. },
  5001. /* Tertiary AUX PCM Backend DAI Links */
  5002. {
  5003. .name = LPASS_BE_TERT_AUXPCM_RX,
  5004. .stream_name = "Tert AUX PCM Playback",
  5005. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5006. .platform_name = "msm-pcm-routing",
  5007. .codec_name = "msm-stub-codec.1",
  5008. .codec_dai_name = "msm-stub-rx",
  5009. .no_pcm = 1,
  5010. .dpcm_playback = 1,
  5011. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  5012. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5013. .ignore_suspend = 1,
  5014. },
  5015. {
  5016. .name = LPASS_BE_TERT_AUXPCM_TX,
  5017. .stream_name = "Tert AUX PCM Capture",
  5018. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5019. .platform_name = "msm-pcm-routing",
  5020. .codec_name = "msm-stub-codec.1",
  5021. .codec_dai_name = "msm-stub-tx",
  5022. .no_pcm = 1,
  5023. .dpcm_capture = 1,
  5024. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  5025. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5026. .ignore_suspend = 1,
  5027. },
  5028. };
  5029. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  5030. /* WSA CDC DMA Backend DAI Links */
  5031. {
  5032. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  5033. .stream_name = "WSA CDC DMA0 Playback",
  5034. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  5035. .platform_name = "msm-pcm-routing",
  5036. .codec_name = "bolero_codec",
  5037. .codec_dai_name = "wsa_macro_rx1",
  5038. .no_pcm = 1,
  5039. .dpcm_playback = 1,
  5040. .init = &msm_int_audrx_init,
  5041. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  5042. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5043. .ignore_pmdown_time = 1,
  5044. .ignore_suspend = 1,
  5045. .ops = &msm_cdc_dma_be_ops,
  5046. },
  5047. {
  5048. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  5049. .stream_name = "WSA CDC DMA1 Playback",
  5050. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  5051. .platform_name = "msm-pcm-routing",
  5052. .codec_name = "bolero_codec",
  5053. .codec_dai_name = "wsa_macro_rx_mix",
  5054. .no_pcm = 1,
  5055. .dpcm_playback = 1,
  5056. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  5057. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5058. .ignore_pmdown_time = 1,
  5059. .ignore_suspend = 1,
  5060. .ops = &msm_cdc_dma_be_ops,
  5061. },
  5062. {
  5063. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  5064. .stream_name = "WSA CDC DMA1 Capture",
  5065. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  5066. .platform_name = "msm-pcm-routing",
  5067. .codec_name = "bolero_codec",
  5068. .codec_dai_name = "wsa_macro_echo",
  5069. .no_pcm = 1,
  5070. .dpcm_capture = 1,
  5071. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  5072. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5073. .ignore_suspend = 1,
  5074. .ops = &msm_cdc_dma_be_ops,
  5075. },
  5076. };
  5077. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  5078. /* RX CDC DMA Backend DAI Links */
  5079. {
  5080. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  5081. .stream_name = "RX CDC DMA0 Playback",
  5082. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  5083. .platform_name = "msm-pcm-routing",
  5084. .codec_name = "bolero_codec",
  5085. .codec_dai_name = "rx_macro_rx1",
  5086. .no_pcm = 1,
  5087. .dpcm_playback = 1,
  5088. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  5089. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5090. .ignore_pmdown_time = 1,
  5091. .ignore_suspend = 1,
  5092. .ops = &msm_cdc_dma_be_ops,
  5093. },
  5094. {
  5095. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  5096. .stream_name = "RX CDC DMA1 Playback",
  5097. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  5098. .platform_name = "msm-pcm-routing",
  5099. .codec_name = "bolero_codec",
  5100. .codec_dai_name = "rx_macro_rx2",
  5101. .no_pcm = 1,
  5102. .dpcm_playback = 1,
  5103. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  5104. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5105. .ignore_pmdown_time = 1,
  5106. .ignore_suspend = 1,
  5107. .ops = &msm_cdc_dma_be_ops,
  5108. },
  5109. {
  5110. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  5111. .stream_name = "RX CDC DMA2 Playback",
  5112. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  5113. .platform_name = "msm-pcm-routing",
  5114. .codec_name = "bolero_codec",
  5115. .codec_dai_name = "rx_macro_rx3",
  5116. .no_pcm = 1,
  5117. .dpcm_playback = 1,
  5118. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  5119. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5120. .ignore_pmdown_time = 1,
  5121. .ignore_suspend = 1,
  5122. .ops = &msm_cdc_dma_be_ops,
  5123. },
  5124. {
  5125. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  5126. .stream_name = "RX CDC DMA3 Playback",
  5127. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  5128. .platform_name = "msm-pcm-routing",
  5129. .codec_name = "bolero_codec",
  5130. .codec_dai_name = "rx_macro_rx4",
  5131. .no_pcm = 1,
  5132. .dpcm_playback = 1,
  5133. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  5134. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5135. .ignore_pmdown_time = 1,
  5136. .ignore_suspend = 1,
  5137. .ops = &msm_cdc_dma_be_ops,
  5138. },
  5139. /* TX CDC DMA Backend DAI Links */
  5140. {
  5141. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  5142. .stream_name = "TX CDC DMA3 Capture",
  5143. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  5144. .platform_name = "msm-pcm-routing",
  5145. .codec_name = "bolero_codec",
  5146. .codec_dai_name = "tx_macro_tx1",
  5147. .no_pcm = 1,
  5148. .dpcm_capture = 1,
  5149. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  5150. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5151. .ignore_suspend = 1,
  5152. .ops = &msm_cdc_dma_be_ops,
  5153. },
  5154. {
  5155. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  5156. .stream_name = "TX CDC DMA4 Capture",
  5157. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  5158. .platform_name = "msm-pcm-routing",
  5159. .codec_name = "bolero_codec",
  5160. .codec_dai_name = "tx_macro_tx2",
  5161. .no_pcm = 1,
  5162. .dpcm_capture = 1,
  5163. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  5164. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5165. .ignore_suspend = 1,
  5166. .ops = &msm_cdc_dma_be_ops,
  5167. },
  5168. };
  5169. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  5170. {
  5171. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  5172. .stream_name = "VA CDC DMA0 Capture",
  5173. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  5174. .platform_name = "msm-pcm-routing",
  5175. .codec_name = "bolero_codec",
  5176. .codec_dai_name = "va_macro_tx1",
  5177. .no_pcm = 1,
  5178. .dpcm_capture = 1,
  5179. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  5180. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5181. .ignore_suspend = 1,
  5182. .ops = &msm_cdc_dma_be_ops,
  5183. },
  5184. {
  5185. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  5186. .stream_name = "VA CDC DMA1 Capture",
  5187. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  5188. .platform_name = "msm-pcm-routing",
  5189. .codec_name = "bolero_codec",
  5190. .codec_dai_name = "va_macro_tx2",
  5191. .no_pcm = 1,
  5192. .dpcm_capture = 1,
  5193. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  5194. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5195. .ignore_suspend = 1,
  5196. .ops = &msm_cdc_dma_be_ops,
  5197. },
  5198. {
  5199. .name = LPASS_BE_VA_CDC_DMA_TX_2,
  5200. .stream_name = "VA CDC DMA2 Capture",
  5201. .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
  5202. .platform_name = "msm-pcm-routing",
  5203. .codec_name = "bolero_codec",
  5204. .codec_dai_name = "va_macro_tx3",
  5205. .no_pcm = 1,
  5206. .dpcm_capture = 1,
  5207. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
  5208. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5209. .ignore_suspend = 1,
  5210. .ops = &msm_cdc_dma_be_ops,
  5211. },
  5212. };
  5213. static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
  5214. {
  5215. .name = LPASS_BE_AFE_LOOPBACK_TX,
  5216. .stream_name = "AFE Loopback Capture",
  5217. .cpu_dai_name = "msm-dai-q6-dev.24577",
  5218. .platform_name = "msm-pcm-routing",
  5219. .codec_name = "msm-stub-codec.1",
  5220. .codec_dai_name = "msm-stub-tx",
  5221. .no_pcm = 1,
  5222. .dpcm_capture = 1,
  5223. .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
  5224. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5225. .ignore_pmdown_time = 1,
  5226. .ignore_suspend = 1,
  5227. },
  5228. };
  5229. static struct snd_soc_dai_link msm_kona_dai_links[
  5230. ARRAY_SIZE(msm_common_dai_links) +
  5231. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  5232. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  5233. ARRAY_SIZE(msm_common_be_dai_links) +
  5234. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  5235. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  5236. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  5237. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
  5238. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
  5239. ARRAY_SIZE(ext_disp_be_dai_link) +
  5240. ARRAY_SIZE(msm_wcn_be_dai_links) +
  5241. ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
  5242. ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
  5243. static int msm_populate_dai_link_component_of_node(
  5244. struct snd_soc_card *card)
  5245. {
  5246. int i, index, ret = 0;
  5247. struct device *cdev = card->dev;
  5248. struct snd_soc_dai_link *dai_link = card->dai_link;
  5249. struct device_node *np;
  5250. if (!cdev) {
  5251. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  5252. return -ENODEV;
  5253. }
  5254. for (i = 0; i < card->num_links; i++) {
  5255. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  5256. continue;
  5257. /* populate platform_of_node for snd card dai links */
  5258. if (dai_link[i].platform_name &&
  5259. !dai_link[i].platform_of_node) {
  5260. index = of_property_match_string(cdev->of_node,
  5261. "asoc-platform-names",
  5262. dai_link[i].platform_name);
  5263. if (index < 0) {
  5264. dev_err(cdev, "%s: No match found for platform name: %s\n",
  5265. __func__, dai_link[i].platform_name);
  5266. ret = index;
  5267. goto err;
  5268. }
  5269. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  5270. index);
  5271. if (!np) {
  5272. dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
  5273. __func__, dai_link[i].platform_name,
  5274. index);
  5275. ret = -ENODEV;
  5276. goto err;
  5277. }
  5278. dai_link[i].platform_of_node = np;
  5279. dai_link[i].platform_name = NULL;
  5280. }
  5281. /* populate cpu_of_node for snd card dai links */
  5282. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  5283. index = of_property_match_string(cdev->of_node,
  5284. "asoc-cpu-names",
  5285. dai_link[i].cpu_dai_name);
  5286. if (index >= 0) {
  5287. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  5288. index);
  5289. if (!np) {
  5290. dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
  5291. __func__,
  5292. dai_link[i].cpu_dai_name);
  5293. ret = -ENODEV;
  5294. goto err;
  5295. }
  5296. dai_link[i].cpu_of_node = np;
  5297. dai_link[i].cpu_dai_name = NULL;
  5298. }
  5299. }
  5300. /* populate codec_of_node for snd card dai links */
  5301. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  5302. index = of_property_match_string(cdev->of_node,
  5303. "asoc-codec-names",
  5304. dai_link[i].codec_name);
  5305. if (index < 0)
  5306. continue;
  5307. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  5308. index);
  5309. if (!np) {
  5310. dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
  5311. __func__, dai_link[i].codec_name);
  5312. ret = -ENODEV;
  5313. goto err;
  5314. }
  5315. dai_link[i].codec_of_node = np;
  5316. dai_link[i].codec_name = NULL;
  5317. }
  5318. }
  5319. err:
  5320. return ret;
  5321. }
  5322. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  5323. {
  5324. int ret = -EINVAL;
  5325. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  5326. if (!component) {
  5327. pr_err("* %s: No match for msm-stub-codec component\n", __func__);
  5328. return ret;
  5329. }
  5330. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  5331. ARRAY_SIZE(msm_snd_controls));
  5332. if (ret < 0) {
  5333. dev_err(component->dev,
  5334. "%s: add_codec_controls failed, err = %d\n",
  5335. __func__, ret);
  5336. return ret;
  5337. }
  5338. return ret;
  5339. }
  5340. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  5341. struct snd_pcm_hw_params *params)
  5342. {
  5343. return 0;
  5344. }
  5345. static struct snd_soc_ops msm_stub_be_ops = {
  5346. .hw_params = msm_snd_stub_hw_params,
  5347. };
  5348. struct snd_soc_card snd_soc_card_stub_msm = {
  5349. .name = "kona-stub-snd-card",
  5350. };
  5351. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  5352. /* FrontEnd DAI Links */
  5353. {
  5354. .name = "MSMSTUB Media1",
  5355. .stream_name = "MultiMedia1",
  5356. .cpu_dai_name = "MultiMedia1",
  5357. .platform_name = "msm-pcm-dsp.0",
  5358. .dynamic = 1,
  5359. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5360. .dpcm_playback = 1,
  5361. .dpcm_capture = 1,
  5362. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5363. SND_SOC_DPCM_TRIGGER_POST},
  5364. .codec_dai_name = "snd-soc-dummy-dai",
  5365. .codec_name = "snd-soc-dummy",
  5366. .ignore_suspend = 1,
  5367. /* this dainlink has playback support */
  5368. .ignore_pmdown_time = 1,
  5369. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5370. },
  5371. };
  5372. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  5373. /* Backend DAI Links */
  5374. {
  5375. .name = LPASS_BE_AUXPCM_RX,
  5376. .stream_name = "AUX PCM Playback",
  5377. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5378. .platform_name = "msm-pcm-routing",
  5379. .codec_name = "msm-stub-codec.1",
  5380. .codec_dai_name = "msm-stub-rx",
  5381. .no_pcm = 1,
  5382. .dpcm_playback = 1,
  5383. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  5384. .init = &msm_audrx_stub_init,
  5385. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5386. .ignore_pmdown_time = 1,
  5387. .ignore_suspend = 1,
  5388. .ops = &msm_stub_be_ops,
  5389. },
  5390. {
  5391. .name = LPASS_BE_AUXPCM_TX,
  5392. .stream_name = "AUX PCM Capture",
  5393. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5394. .platform_name = "msm-pcm-routing",
  5395. .codec_name = "msm-stub-codec.1",
  5396. .codec_dai_name = "msm-stub-tx",
  5397. .no_pcm = 1,
  5398. .dpcm_capture = 1,
  5399. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  5400. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5401. .ignore_suspend = 1,
  5402. .ops = &msm_stub_be_ops,
  5403. },
  5404. };
  5405. static struct snd_soc_dai_link msm_stub_dai_links[
  5406. ARRAY_SIZE(msm_stub_fe_dai_links) +
  5407. ARRAY_SIZE(msm_stub_be_dai_links)];
  5408. static const struct of_device_id kona_asoc_machine_of_match[] = {
  5409. { .compatible = "qcom,kona-asoc-snd",
  5410. .data = "codec"},
  5411. { .compatible = "qcom,kona-asoc-snd-stub",
  5412. .data = "stub_codec"},
  5413. {},
  5414. };
  5415. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  5416. {
  5417. struct snd_soc_card *card = NULL;
  5418. struct snd_soc_dai_link *dailink = NULL;
  5419. int len_1 = 0;
  5420. int len_2 = 0;
  5421. int total_links = 0;
  5422. int rc = 0;
  5423. u32 mi2s_audio_intf = 0;
  5424. u32 auxpcm_audio_intf = 0;
  5425. u32 val = 0;
  5426. u32 wcn_btfm_intf = 0;
  5427. const struct of_device_id *match;
  5428. match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
  5429. if (!match) {
  5430. dev_err(dev, "%s: No DT match found for sound card\n",
  5431. __func__);
  5432. return NULL;
  5433. }
  5434. if (!strcmp(match->data, "codec")) {
  5435. card = &snd_soc_card_kona_msm;
  5436. memcpy(msm_kona_dai_links + total_links,
  5437. msm_common_dai_links,
  5438. sizeof(msm_common_dai_links));
  5439. total_links += ARRAY_SIZE(msm_common_dai_links);
  5440. memcpy(msm_kona_dai_links + total_links,
  5441. msm_bolero_fe_dai_links,
  5442. sizeof(msm_bolero_fe_dai_links));
  5443. total_links +=
  5444. ARRAY_SIZE(msm_bolero_fe_dai_links);
  5445. memcpy(msm_kona_dai_links + total_links,
  5446. msm_common_misc_fe_dai_links,
  5447. sizeof(msm_common_misc_fe_dai_links));
  5448. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  5449. memcpy(msm_kona_dai_links + total_links,
  5450. msm_common_be_dai_links,
  5451. sizeof(msm_common_be_dai_links));
  5452. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  5453. memcpy(msm_kona_dai_links + total_links,
  5454. msm_wsa_cdc_dma_be_dai_links,
  5455. sizeof(msm_wsa_cdc_dma_be_dai_links));
  5456. total_links +=
  5457. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  5458. memcpy(msm_kona_dai_links + total_links,
  5459. msm_rx_tx_cdc_dma_be_dai_links,
  5460. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  5461. total_links +=
  5462. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  5463. memcpy(msm_kona_dai_links + total_links,
  5464. msm_va_cdc_dma_be_dai_links,
  5465. sizeof(msm_va_cdc_dma_be_dai_links));
  5466. total_links +=
  5467. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  5468. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  5469. &mi2s_audio_intf);
  5470. if (rc) {
  5471. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  5472. __func__);
  5473. } else {
  5474. if (mi2s_audio_intf) {
  5475. memcpy(msm_kona_dai_links + total_links,
  5476. msm_mi2s_be_dai_links,
  5477. sizeof(msm_mi2s_be_dai_links));
  5478. total_links +=
  5479. ARRAY_SIZE(msm_mi2s_be_dai_links);
  5480. }
  5481. }
  5482. rc = of_property_read_u32(dev->of_node,
  5483. "qcom,auxpcm-audio-intf",
  5484. &auxpcm_audio_intf);
  5485. if (rc) {
  5486. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  5487. __func__);
  5488. } else {
  5489. if (auxpcm_audio_intf) {
  5490. memcpy(msm_kona_dai_links + total_links,
  5491. msm_auxpcm_be_dai_links,
  5492. sizeof(msm_auxpcm_be_dai_links));
  5493. total_links +=
  5494. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  5495. }
  5496. }
  5497. rc = of_property_read_u32(dev->of_node,
  5498. "qcom,ext-disp-audio-rx", &val);
  5499. if (!rc && val) {
  5500. dev_dbg(dev, "%s(): ext disp audio support present\n",
  5501. __func__);
  5502. memcpy(msm_kona_dai_links + total_links,
  5503. ext_disp_be_dai_link,
  5504. sizeof(ext_disp_be_dai_link));
  5505. total_links += ARRAY_SIZE(ext_disp_be_dai_link);
  5506. }
  5507. rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
  5508. if (!rc && val) {
  5509. dev_dbg(dev, "%s(): WCN BT support present\n",
  5510. __func__);
  5511. memcpy(msm_kona_dai_links + total_links,
  5512. msm_wcn_be_dai_links,
  5513. sizeof(msm_wcn_be_dai_links));
  5514. total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
  5515. }
  5516. rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
  5517. &val);
  5518. if (!rc && val) {
  5519. memcpy(msm_kona_dai_links + total_links,
  5520. msm_afe_rxtx_lb_be_dai_link,
  5521. sizeof(msm_afe_rxtx_lb_be_dai_link));
  5522. total_links +=
  5523. ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
  5524. }
  5525. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  5526. &wcn_btfm_intf);
  5527. if (rc) {
  5528. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  5529. __func__);
  5530. } else {
  5531. if (wcn_btfm_intf) {
  5532. memcpy(msm_kona_dai_links + total_links,
  5533. msm_wcn_btfm_be_dai_links,
  5534. sizeof(msm_wcn_btfm_be_dai_links));
  5535. total_links +=
  5536. ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
  5537. }
  5538. }
  5539. dailink = msm_kona_dai_links;
  5540. } else if(!strcmp(match->data, "stub_codec")) {
  5541. card = &snd_soc_card_stub_msm;
  5542. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  5543. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  5544. memcpy(msm_stub_dai_links,
  5545. msm_stub_fe_dai_links,
  5546. sizeof(msm_stub_fe_dai_links));
  5547. memcpy(msm_stub_dai_links + len_1,
  5548. msm_stub_be_dai_links,
  5549. sizeof(msm_stub_be_dai_links));
  5550. dailink = msm_stub_dai_links;
  5551. total_links = len_2;
  5552. }
  5553. if (card) {
  5554. card->dai_link = dailink;
  5555. card->num_links = total_links;
  5556. }
  5557. return card;
  5558. }
  5559. static int msm_wsa881x_init(struct snd_soc_component *component)
  5560. {
  5561. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  5562. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  5563. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  5564. SPKR_L_BOOST, SPKR_L_VI};
  5565. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  5566. SPKR_R_BOOST, SPKR_R_VI};
  5567. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  5568. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  5569. struct msm_asoc_mach_data *pdata;
  5570. struct snd_soc_dapm_context *dapm;
  5571. struct snd_card *card;
  5572. struct snd_info_entry *entry;
  5573. int ret = 0;
  5574. if (!component) {
  5575. pr_err("%s component is NULL\n", __func__);
  5576. return -EINVAL;
  5577. }
  5578. card = component->card->snd_card;
  5579. dapm = snd_soc_component_get_dapm(component);
  5580. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  5581. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  5582. __func__, component->name);
  5583. wsa881x_set_channel_map(component, &spkleft_ports[0],
  5584. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5585. &ch_rate[0], &spkleft_port_types[0]);
  5586. if (dapm->component) {
  5587. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  5588. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  5589. }
  5590. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  5591. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  5592. __func__, component->name);
  5593. wsa881x_set_channel_map(component, &spkright_ports[0],
  5594. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5595. &ch_rate[0], &spkright_port_types[0]);
  5596. if (dapm->component) {
  5597. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  5598. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  5599. }
  5600. } else {
  5601. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  5602. component->name);
  5603. ret = -EINVAL;
  5604. goto err;
  5605. }
  5606. pdata = snd_soc_card_get_drvdata(component->card);
  5607. if (!pdata->codec_root) {
  5608. entry = snd_info_create_subdir(card->module, "codecs",
  5609. card->proc_root);
  5610. if (!entry) {
  5611. pr_err("%s: Cannot create codecs module entry\n",
  5612. __func__);
  5613. ret = 0;
  5614. goto err;
  5615. }
  5616. pdata->codec_root = entry;
  5617. }
  5618. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  5619. component);
  5620. err:
  5621. return ret;
  5622. }
  5623. static int msm_aux_codec_init(struct snd_soc_component *component)
  5624. {
  5625. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  5626. int ret = 0;
  5627. void *mbhc_calibration;
  5628. struct snd_info_entry *entry;
  5629. struct snd_card *card = component->card->snd_card;
  5630. struct msm_asoc_mach_data *pdata;
  5631. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  5632. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  5633. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  5634. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  5635. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  5636. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  5637. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  5638. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  5639. snd_soc_dapm_sync(dapm);
  5640. pdata = snd_soc_card_get_drvdata(component->card);
  5641. if (!pdata->codec_root) {
  5642. entry = snd_info_create_subdir(card->module, "codecs",
  5643. card->proc_root);
  5644. if (!entry) {
  5645. dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
  5646. __func__);
  5647. ret = 0;
  5648. goto mbhc_cfg_cal;
  5649. }
  5650. pdata->codec_root = entry;
  5651. }
  5652. wcd938x_info_create_codec_entry(pdata->codec_root, component);
  5653. mbhc_cfg_cal:
  5654. mbhc_calibration = def_wcd_mbhc_cal();
  5655. if (!mbhc_calibration)
  5656. return -ENOMEM;
  5657. wcd_mbhc_cfg.calibration = mbhc_calibration;
  5658. ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  5659. if (ret) {
  5660. dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
  5661. __func__, ret);
  5662. goto err_hs_detect;
  5663. }
  5664. return 0;
  5665. err_hs_detect:
  5666. kfree(mbhc_calibration);
  5667. return ret;
  5668. }
  5669. static int msm_init_aux_dev(struct platform_device *pdev,
  5670. struct snd_soc_card *card)
  5671. {
  5672. struct device_node *wsa_of_node;
  5673. struct device_node *aux_codec_of_node;
  5674. u32 wsa_max_devs;
  5675. u32 wsa_dev_cnt;
  5676. u32 codec_aux_dev_cnt = 0;
  5677. int i;
  5678. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  5679. struct aux_codec_dev_info *aux_cdc_dev_info;
  5680. const char *auxdev_name_prefix[1];
  5681. char *dev_name_str = NULL;
  5682. int found = 0;
  5683. int codecs_found = 0;
  5684. int ret = 0;
  5685. /* Get maximum WSA device count for this platform */
  5686. ret = of_property_read_u32(pdev->dev.of_node,
  5687. "qcom,wsa-max-devs", &wsa_max_devs);
  5688. if (ret) {
  5689. dev_info(&pdev->dev,
  5690. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  5691. __func__, pdev->dev.of_node->full_name, ret);
  5692. wsa_max_devs = 0;
  5693. goto codec_aux_dev;
  5694. }
  5695. if (wsa_max_devs == 0) {
  5696. dev_warn(&pdev->dev,
  5697. "%s: Max WSA devices is 0 for this target?\n",
  5698. __func__);
  5699. goto codec_aux_dev;
  5700. }
  5701. /* Get count of WSA device phandles for this platform */
  5702. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  5703. "qcom,wsa-devs", NULL);
  5704. if (wsa_dev_cnt == -ENOENT) {
  5705. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  5706. __func__);
  5707. goto err;
  5708. } else if (wsa_dev_cnt <= 0) {
  5709. dev_err(&pdev->dev,
  5710. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  5711. __func__, wsa_dev_cnt);
  5712. ret = -EINVAL;
  5713. goto err;
  5714. }
  5715. /*
  5716. * Expect total phandles count to be NOT less than maximum possible
  5717. * WSA count. However, if it is less, then assign same value to
  5718. * max count as well.
  5719. */
  5720. if (wsa_dev_cnt < wsa_max_devs) {
  5721. dev_dbg(&pdev->dev,
  5722. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  5723. __func__, wsa_max_devs, wsa_dev_cnt);
  5724. wsa_max_devs = wsa_dev_cnt;
  5725. }
  5726. /* Make sure prefix string passed for each WSA device */
  5727. ret = of_property_count_strings(pdev->dev.of_node,
  5728. "qcom,wsa-aux-dev-prefix");
  5729. if (ret != wsa_dev_cnt) {
  5730. dev_err(&pdev->dev,
  5731. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  5732. __func__, wsa_dev_cnt, ret);
  5733. ret = -EINVAL;
  5734. goto err;
  5735. }
  5736. /*
  5737. * Alloc mem to store phandle and index info of WSA device, if already
  5738. * registered with ALSA core
  5739. */
  5740. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  5741. sizeof(struct msm_wsa881x_dev_info),
  5742. GFP_KERNEL);
  5743. if (!wsa881x_dev_info) {
  5744. ret = -ENOMEM;
  5745. goto err;
  5746. }
  5747. /*
  5748. * search and check whether all WSA devices are already
  5749. * registered with ALSA core or not. If found a node, store
  5750. * the node and the index in a local array of struct for later
  5751. * use.
  5752. */
  5753. for (i = 0; i < wsa_dev_cnt; i++) {
  5754. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  5755. "qcom,wsa-devs", i);
  5756. if (unlikely(!wsa_of_node)) {
  5757. /* we should not be here */
  5758. dev_err(&pdev->dev,
  5759. "%s: wsa dev node is not present\n",
  5760. __func__);
  5761. ret = -EINVAL;
  5762. goto err;
  5763. }
  5764. if (soc_find_component(wsa_of_node, NULL)) {
  5765. /* WSA device registered with ALSA core */
  5766. wsa881x_dev_info[found].of_node = wsa_of_node;
  5767. wsa881x_dev_info[found].index = i;
  5768. found++;
  5769. if (found == wsa_max_devs)
  5770. break;
  5771. }
  5772. }
  5773. if (found < wsa_max_devs) {
  5774. dev_dbg(&pdev->dev,
  5775. "%s: failed to find %d components. Found only %d\n",
  5776. __func__, wsa_max_devs, found);
  5777. return -EPROBE_DEFER;
  5778. }
  5779. dev_info(&pdev->dev,
  5780. "%s: found %d wsa881x devices registered with ALSA core\n",
  5781. __func__, found);
  5782. codec_aux_dev:
  5783. /* Get count of aux codec device phandles for this platform */
  5784. codec_aux_dev_cnt = of_count_phandle_with_args(
  5785. pdev->dev.of_node,
  5786. "qcom,codec-aux-devs", NULL);
  5787. if (codec_aux_dev_cnt == -ENOENT) {
  5788. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  5789. __func__);
  5790. goto err;
  5791. } else if (codec_aux_dev_cnt <= 0) {
  5792. dev_err(&pdev->dev,
  5793. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  5794. __func__, codec_aux_dev_cnt);
  5795. ret = -EINVAL;
  5796. goto err;
  5797. }
  5798. /*
  5799. * Alloc mem to store phandle and index info of aux codec
  5800. * if already registered with ALSA core
  5801. */
  5802. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  5803. sizeof(struct aux_codec_dev_info),
  5804. GFP_KERNEL);
  5805. if (!aux_cdc_dev_info) {
  5806. ret = -ENOMEM;
  5807. goto err;
  5808. }
  5809. /*
  5810. * search and check whether all aux codecs are already
  5811. * registered with ALSA core or not. If found a node, store
  5812. * the node and the index in a local array of struct for later
  5813. * use.
  5814. */
  5815. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5816. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  5817. "qcom,codec-aux-devs", i);
  5818. if (unlikely(!aux_codec_of_node)) {
  5819. /* we should not be here */
  5820. dev_err(&pdev->dev,
  5821. "%s: aux codec dev node is not present\n",
  5822. __func__);
  5823. ret = -EINVAL;
  5824. goto err;
  5825. }
  5826. if (soc_find_component(aux_codec_of_node, NULL)) {
  5827. /* AUX codec registered with ALSA core */
  5828. aux_cdc_dev_info[codecs_found].of_node =
  5829. aux_codec_of_node;
  5830. aux_cdc_dev_info[codecs_found].index = i;
  5831. codecs_found++;
  5832. }
  5833. }
  5834. if (codecs_found < codec_aux_dev_cnt) {
  5835. dev_dbg(&pdev->dev,
  5836. "%s: failed to find %d components. Found only %d\n",
  5837. __func__, codec_aux_dev_cnt, codecs_found);
  5838. return -EPROBE_DEFER;
  5839. }
  5840. dev_info(&pdev->dev,
  5841. "%s: found %d AUX codecs registered with ALSA core\n",
  5842. __func__, codecs_found);
  5843. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  5844. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  5845. /* Alloc array of AUX devs struct */
  5846. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  5847. sizeof(struct snd_soc_aux_dev),
  5848. GFP_KERNEL);
  5849. if (!msm_aux_dev) {
  5850. ret = -ENOMEM;
  5851. goto err;
  5852. }
  5853. /* Alloc array of codec conf struct */
  5854. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  5855. sizeof(struct snd_soc_codec_conf),
  5856. GFP_KERNEL);
  5857. if (!msm_codec_conf) {
  5858. ret = -ENOMEM;
  5859. goto err;
  5860. }
  5861. for (i = 0; i < wsa_max_devs; i++) {
  5862. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  5863. GFP_KERNEL);
  5864. if (!dev_name_str) {
  5865. ret = -ENOMEM;
  5866. goto err;
  5867. }
  5868. ret = of_property_read_string_index(pdev->dev.of_node,
  5869. "qcom,wsa-aux-dev-prefix",
  5870. wsa881x_dev_info[i].index,
  5871. auxdev_name_prefix);
  5872. if (ret) {
  5873. dev_err(&pdev->dev,
  5874. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  5875. __func__, ret);
  5876. ret = -EINVAL;
  5877. goto err;
  5878. }
  5879. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  5880. msm_aux_dev[i].name = dev_name_str;
  5881. msm_aux_dev[i].codec_name = NULL;
  5882. msm_aux_dev[i].codec_of_node =
  5883. wsa881x_dev_info[i].of_node;
  5884. msm_aux_dev[i].init = msm_wsa881x_init;
  5885. msm_codec_conf[i].dev_name = NULL;
  5886. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  5887. msm_codec_conf[i].of_node =
  5888. wsa881x_dev_info[i].of_node;
  5889. }
  5890. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5891. msm_aux_dev[wsa_max_devs + i].name = NULL;
  5892. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  5893. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  5894. aux_cdc_dev_info[i].of_node;
  5895. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  5896. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  5897. msm_codec_conf[wsa_max_devs + i].name_prefix =
  5898. NULL;
  5899. msm_codec_conf[wsa_max_devs + i].of_node =
  5900. aux_cdc_dev_info[i].of_node;
  5901. }
  5902. card->codec_conf = msm_codec_conf;
  5903. card->aux_dev = msm_aux_dev;
  5904. err:
  5905. return ret;
  5906. }
  5907. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  5908. {
  5909. int count = 0;
  5910. u32 mi2s_master_slave[MI2S_MAX];
  5911. int ret = 0;
  5912. for (count = 0; count < MI2S_MAX; count++) {
  5913. mutex_init(&mi2s_intf_conf[count].lock);
  5914. mi2s_intf_conf[count].ref_cnt = 0;
  5915. }
  5916. ret = of_property_read_u32_array(pdev->dev.of_node,
  5917. "qcom,msm-mi2s-master",
  5918. mi2s_master_slave, MI2S_MAX);
  5919. if (ret) {
  5920. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  5921. __func__);
  5922. } else {
  5923. for (count = 0; count < MI2S_MAX; count++) {
  5924. mi2s_intf_conf[count].msm_is_mi2s_master =
  5925. mi2s_master_slave[count];
  5926. }
  5927. }
  5928. }
  5929. static void msm_i2s_auxpcm_deinit(void)
  5930. {
  5931. int count = 0;
  5932. for (count = 0; count < MI2S_MAX; count++) {
  5933. mutex_destroy(&mi2s_intf_conf[count].lock);
  5934. mi2s_intf_conf[count].ref_cnt = 0;
  5935. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  5936. }
  5937. }
  5938. static int kona_ssr_enable(struct device *dev, void *data)
  5939. {
  5940. struct platform_device *pdev = to_platform_device(dev);
  5941. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5942. int ret = 0;
  5943. if (!card) {
  5944. dev_err(dev, "%s: card is NULL\n", __func__);
  5945. ret = -EINVAL;
  5946. goto err;
  5947. }
  5948. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5949. /* TODO */
  5950. dev_dbg(dev, "%s: TODO \n", __func__);
  5951. }
  5952. snd_soc_card_change_online_state(card, 1);
  5953. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  5954. err:
  5955. return ret;
  5956. }
  5957. static void kona_ssr_disable(struct device *dev, void *data)
  5958. {
  5959. struct platform_device *pdev = to_platform_device(dev);
  5960. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5961. if (!card) {
  5962. dev_err(dev, "%s: card is NULL\n", __func__);
  5963. return;
  5964. }
  5965. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  5966. snd_soc_card_change_online_state(card, 0);
  5967. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5968. /* TODO */
  5969. dev_dbg(dev, "%s: TODO \n", __func__);
  5970. }
  5971. }
  5972. static const struct snd_event_ops kona_ssr_ops = {
  5973. .enable = kona_ssr_enable,
  5974. .disable = kona_ssr_disable,
  5975. };
  5976. static int msm_audio_ssr_compare(struct device *dev, void *data)
  5977. {
  5978. struct device_node *node = data;
  5979. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  5980. __func__, dev->of_node, node);
  5981. return (dev->of_node && dev->of_node == node);
  5982. }
  5983. static int msm_audio_ssr_register(struct device *dev)
  5984. {
  5985. struct device_node *np = dev->of_node;
  5986. struct snd_event_clients *ssr_clients = NULL;
  5987. struct device_node *node = NULL;
  5988. int ret = 0;
  5989. int i = 0;
  5990. for (i = 0; ; i++) {
  5991. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  5992. if (!node)
  5993. break;
  5994. snd_event_mstr_add_client(&ssr_clients,
  5995. msm_audio_ssr_compare, node);
  5996. }
  5997. ret = snd_event_master_register(dev, &kona_ssr_ops,
  5998. ssr_clients, NULL);
  5999. if (!ret)
  6000. snd_event_notify(dev, SND_EVENT_UP);
  6001. return ret;
  6002. }
  6003. static int msm_asoc_machine_probe(struct platform_device *pdev)
  6004. {
  6005. struct snd_soc_card *card = NULL;
  6006. struct msm_asoc_mach_data *pdata = NULL;
  6007. const char *mbhc_audio_jack_type = NULL;
  6008. int ret = 0;
  6009. if (!pdev->dev.of_node) {
  6010. dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
  6011. return -EINVAL;
  6012. }
  6013. pdata = devm_kzalloc(&pdev->dev,
  6014. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  6015. if (!pdata)
  6016. return -ENOMEM;
  6017. card = populate_snd_card_dailinks(&pdev->dev);
  6018. if (!card) {
  6019. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  6020. ret = -EINVAL;
  6021. goto err;
  6022. }
  6023. card->dev = &pdev->dev;
  6024. platform_set_drvdata(pdev, card);
  6025. snd_soc_card_set_drvdata(card, pdata);
  6026. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  6027. if (ret) {
  6028. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  6029. __func__, ret);
  6030. goto err;
  6031. }
  6032. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  6033. if (ret) {
  6034. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  6035. __func__, ret);
  6036. goto err;
  6037. }
  6038. ret = msm_populate_dai_link_component_of_node(card);
  6039. if (ret) {
  6040. ret = -EPROBE_DEFER;
  6041. goto err;
  6042. }
  6043. ret = msm_init_aux_dev(pdev, card);
  6044. if (ret)
  6045. goto err;
  6046. ret = devm_snd_soc_register_card(&pdev->dev, card);
  6047. if (ret == -EPROBE_DEFER) {
  6048. if (codec_reg_done)
  6049. ret = -EINVAL;
  6050. goto err;
  6051. } else if (ret) {
  6052. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  6053. __func__, ret);
  6054. goto err;
  6055. }
  6056. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  6057. __func__, card->name);
  6058. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6059. "qcom,hph-en1-gpio", 0);
  6060. if (!pdata->hph_en1_gpio_p) {
  6061. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  6062. __func__, "qcom,hph-en1-gpio",
  6063. pdev->dev.of_node->full_name);
  6064. }
  6065. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6066. "qcom,hph-en0-gpio", 0);
  6067. if (!pdata->hph_en0_gpio_p) {
  6068. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  6069. __func__, "qcom,hph-en0-gpio",
  6070. pdev->dev.of_node->full_name);
  6071. }
  6072. ret = of_property_read_string(pdev->dev.of_node,
  6073. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  6074. if (ret) {
  6075. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  6076. __func__, "qcom,mbhc-audio-jack-type",
  6077. pdev->dev.of_node->full_name);
  6078. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  6079. } else {
  6080. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  6081. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  6082. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  6083. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  6084. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  6085. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  6086. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  6087. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  6088. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  6089. } else {
  6090. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  6091. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  6092. }
  6093. }
  6094. /*
  6095. * Parse US-Euro gpio info from DT. Report no error if us-euro
  6096. * entry is not found in DT file as some targets do not support
  6097. * US-Euro detection
  6098. */
  6099. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6100. "qcom,us-euro-gpios", 0);
  6101. if (!pdata->us_euro_gpio_p) {
  6102. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  6103. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  6104. } else {
  6105. dev_dbg(&pdev->dev, "%s detected\n",
  6106. "qcom,us-euro-gpios");
  6107. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  6108. }
  6109. if (wcd_mbhc_cfg.enable_usbc_analog)
  6110. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  6111. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  6112. "fsa4480-i2c-handle", 0);
  6113. if (!pdata->fsa_handle)
  6114. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  6115. "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
  6116. msm_i2s_auxpcm_init(pdev);
  6117. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6118. "qcom,cdc-dmic01-gpios",
  6119. 0);
  6120. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6121. "qcom,cdc-dmic23-gpios",
  6122. 0);
  6123. pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6124. "qcom,cdc-dmic45-gpios",
  6125. 0);
  6126. ret = msm_audio_ssr_register(&pdev->dev);
  6127. if (ret)
  6128. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  6129. __func__, ret);
  6130. is_initial_boot = true;
  6131. return 0;
  6132. err:
  6133. devm_kfree(&pdev->dev, pdata);
  6134. return ret;
  6135. }
  6136. static int msm_asoc_machine_remove(struct platform_device *pdev)
  6137. {
  6138. struct snd_soc_card *card = platform_get_drvdata(pdev);
  6139. snd_event_master_deregister(&pdev->dev);
  6140. snd_soc_unregister_card(card);
  6141. msm_i2s_auxpcm_deinit();
  6142. return 0;
  6143. }
  6144. static struct platform_driver kona_asoc_machine_driver = {
  6145. .driver = {
  6146. .name = DRV_NAME,
  6147. .owner = THIS_MODULE,
  6148. .pm = &snd_soc_pm_ops,
  6149. .of_match_table = kona_asoc_machine_of_match,
  6150. },
  6151. .probe = msm_asoc_machine_probe,
  6152. .remove = msm_asoc_machine_remove,
  6153. };
  6154. module_platform_driver(kona_asoc_machine_driver);
  6155. MODULE_DESCRIPTION("ALSA SoC msm");
  6156. MODULE_LICENSE("GPL v2");
  6157. MODULE_ALIAS("platform:" DRV_NAME);
  6158. MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);