main.c 122 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include <linux/soc/qcom/slatecom_interface.h>
  47. #include "main.h"
  48. #include "qmi.h"
  49. #include "debug.h"
  50. #include "power.h"
  51. #include "genl.h"
  52. #define MAX_PROP_SIZE 32
  53. #define NUM_LOG_PAGES 10
  54. #define NUM_LOG_LONG_PAGES 4
  55. #define ICNSS_MAGIC 0x5abc5abc
  56. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  57. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  58. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  59. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  60. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  61. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  62. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  63. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  64. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  65. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  66. #define ICNSS_MAX_PROBE_CNT 2
  67. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  68. #define PROBE_TIMEOUT 15000
  69. #define SMP2P_SOC_WAKE_TIMEOUT 500
  70. #ifdef CONFIG_ICNSS2_DEBUG
  71. static unsigned long qmi_timeout = 3000;
  72. module_param(qmi_timeout, ulong, 0600);
  73. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  74. #else
  75. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  76. #endif
  77. #define ICNSS_RECOVERY_TIMEOUT 60000
  78. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  79. #define ICNSS_CAL_TIMEOUT 40000
  80. static struct icnss_priv *penv;
  81. static struct work_struct wpss_loader;
  82. static struct work_struct wpss_ssr_work;
  83. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  84. #define ICNSS_EVENT_PENDING 2989
  85. #define ICNSS_EVENT_SYNC BIT(0)
  86. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  87. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  88. ICNSS_EVENT_SYNC)
  89. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  90. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  91. #define SMP2P_GET_MAX_RETRY 4
  92. #define SMP2P_GET_RETRY_DELAY_MS 500
  93. #define RAMDUMP_NUM_DEVICES 256
  94. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  95. #define WLAN_EN_TEMP_THRESHOLD 5000
  96. #define WLAN_EN_DELAY 500
  97. #define ICNSS_RPROC_LEN 10
  98. static DEFINE_IDA(rd_minor_id);
  99. enum icnss_pdr_cause_index {
  100. ICNSS_FW_CRASH,
  101. ICNSS_ROOT_PD_CRASH,
  102. ICNSS_ROOT_PD_SHUTDOWN,
  103. ICNSS_HOST_ERROR,
  104. };
  105. static const char * const icnss_pdr_cause[] = {
  106. [ICNSS_FW_CRASH] = "FW crash",
  107. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  108. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  109. [ICNSS_HOST_ERROR] = "Host error",
  110. };
  111. static void icnss_set_plat_priv(struct icnss_priv *priv)
  112. {
  113. penv = priv;
  114. }
  115. static struct icnss_priv *icnss_get_plat_priv(void)
  116. {
  117. return penv;
  118. }
  119. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  120. {
  121. if (priv && priv->rproc) {
  122. rproc_shutdown(priv->rproc);
  123. rproc_put(priv->rproc);
  124. priv->rproc = NULL;
  125. }
  126. }
  127. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  128. struct kobj_attribute *attr,
  129. const char *buf, size_t count)
  130. {
  131. struct icnss_priv *priv = icnss_get_plat_priv();
  132. if (!priv)
  133. return count;
  134. icnss_pr_dbg("Received shutdown indication");
  135. atomic_set(&priv->is_shutdown, true);
  136. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  137. icnss_wpss_unload(priv);
  138. return count;
  139. }
  140. static struct kobj_attribute icnss_sysfs_attribute =
  141. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  142. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  143. {
  144. if (atomic_inc_return(&priv->pm_count) != 1)
  145. return;
  146. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  147. atomic_read(&priv->pm_count));
  148. pm_stay_awake(&priv->pdev->dev);
  149. priv->stats.pm_stay_awake++;
  150. }
  151. static void icnss_pm_relax(struct icnss_priv *priv)
  152. {
  153. int r = atomic_dec_return(&priv->pm_count);
  154. WARN_ON(r < 0);
  155. if (r != 0)
  156. return;
  157. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  158. atomic_read(&priv->pm_count));
  159. pm_relax(&priv->pdev->dev);
  160. priv->stats.pm_relax++;
  161. }
  162. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  163. {
  164. switch (type) {
  165. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  166. return "SERVER_ARRIVE";
  167. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  168. return "SERVER_EXIT";
  169. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  170. return "FW_READY";
  171. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  172. return "REGISTER_DRIVER";
  173. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  174. return "UNREGISTER_DRIVER";
  175. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  176. return "PD_SERVICE_DOWN";
  177. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  178. return "FW_EARLY_CRASH_IND";
  179. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  180. return "IDLE_SHUTDOWN";
  181. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  182. return "IDLE_RESTART";
  183. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  184. return "FW_INIT_DONE";
  185. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  186. return "QDSS_TRACE_REQ_MEM";
  187. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  188. return "QDSS_TRACE_SAVE";
  189. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  190. return "QDSS_TRACE_FREE";
  191. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  192. return "M3_DUMP_UPLOAD";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  194. return "QDSS_TRACE_REQ_DATA";
  195. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  196. return "SUBSYS_RESTART_LEVEL";
  197. case ICNSS_DRIVER_EVENT_MAX:
  198. return "EVENT_MAX";
  199. }
  200. return "UNKNOWN";
  201. };
  202. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  203. {
  204. switch (type) {
  205. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  206. return "SOC_WAKE_REQUEST";
  207. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  208. return "SOC_WAKE_RELEASE";
  209. case ICNSS_SOC_WAKE_EVENT_MAX:
  210. return "SOC_EVENT_MAX";
  211. }
  212. return "UNKNOWN";
  213. };
  214. int icnss_driver_event_post(struct icnss_priv *priv,
  215. enum icnss_driver_event_type type,
  216. u32 flags, void *data)
  217. {
  218. struct icnss_driver_event *event;
  219. unsigned long irq_flags;
  220. int gfp = GFP_KERNEL;
  221. int ret = 0;
  222. if (!priv)
  223. return -ENODEV;
  224. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  225. icnss_driver_event_to_str(type), type, current->comm,
  226. flags, priv->state);
  227. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  228. icnss_pr_err("Invalid Event type: %d, can't post", type);
  229. return -EINVAL;
  230. }
  231. if (in_interrupt() || irqs_disabled())
  232. gfp = GFP_ATOMIC;
  233. event = kzalloc(sizeof(*event), gfp);
  234. if (event == NULL)
  235. return -ENOMEM;
  236. icnss_pm_stay_awake(priv);
  237. event->type = type;
  238. event->data = data;
  239. init_completion(&event->complete);
  240. event->ret = ICNSS_EVENT_PENDING;
  241. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  242. spin_lock_irqsave(&priv->event_lock, irq_flags);
  243. list_add_tail(&event->list, &priv->event_list);
  244. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  245. priv->stats.events[type].posted++;
  246. queue_work(priv->event_wq, &priv->event_work);
  247. if (!(flags & ICNSS_EVENT_SYNC))
  248. goto out;
  249. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  250. wait_for_completion(&event->complete);
  251. else
  252. ret = wait_for_completion_interruptible(&event->complete);
  253. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  254. icnss_driver_event_to_str(type), type, priv->state, ret,
  255. event->ret);
  256. spin_lock_irqsave(&priv->event_lock, irq_flags);
  257. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  258. event->sync = false;
  259. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  260. ret = -EINTR;
  261. goto out;
  262. }
  263. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  264. ret = event->ret;
  265. kfree(event);
  266. out:
  267. icnss_pm_relax(priv);
  268. return ret;
  269. }
  270. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  271. enum icnss_soc_wake_event_type type,
  272. u32 flags, void *data)
  273. {
  274. struct icnss_soc_wake_event *event;
  275. unsigned long irq_flags;
  276. int gfp = GFP_KERNEL;
  277. int ret = 0;
  278. if (!priv)
  279. return -ENODEV;
  280. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  281. icnss_soc_wake_event_to_str(type),
  282. type, current->comm, flags, priv->state);
  283. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  284. icnss_pr_err("Invalid Event type: %d, can't post", type);
  285. return -EINVAL;
  286. }
  287. if (in_interrupt() || irqs_disabled())
  288. gfp = GFP_ATOMIC;
  289. event = kzalloc(sizeof(*event), gfp);
  290. if (!event)
  291. return -ENOMEM;
  292. icnss_pm_stay_awake(priv);
  293. event->type = type;
  294. event->data = data;
  295. init_completion(&event->complete);
  296. event->ret = ICNSS_EVENT_PENDING;
  297. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  298. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  299. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  300. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  301. priv->stats.soc_wake_events[type].posted++;
  302. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  303. if (!(flags & ICNSS_EVENT_SYNC))
  304. goto out;
  305. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  306. wait_for_completion(&event->complete);
  307. else
  308. ret = wait_for_completion_interruptible(&event->complete);
  309. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  310. icnss_soc_wake_event_to_str(type),
  311. type, priv->state, ret, event->ret);
  312. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  313. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  314. event->sync = false;
  315. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  316. ret = -EINTR;
  317. goto out;
  318. }
  319. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  320. ret = event->ret;
  321. kfree(event);
  322. out:
  323. icnss_pm_relax(priv);
  324. return ret;
  325. }
  326. bool icnss_is_fw_ready(void)
  327. {
  328. if (!penv)
  329. return false;
  330. else
  331. return test_bit(ICNSS_FW_READY, &penv->state);
  332. }
  333. EXPORT_SYMBOL(icnss_is_fw_ready);
  334. void icnss_block_shutdown(bool status)
  335. {
  336. if (!penv)
  337. return;
  338. if (status) {
  339. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  340. reinit_completion(&penv->unblock_shutdown);
  341. } else {
  342. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  343. complete(&penv->unblock_shutdown);
  344. }
  345. }
  346. EXPORT_SYMBOL(icnss_block_shutdown);
  347. bool icnss_is_fw_down(void)
  348. {
  349. struct icnss_priv *priv = icnss_get_plat_priv();
  350. if (!priv)
  351. return false;
  352. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  353. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  354. test_bit(ICNSS_REJUVENATE, &priv->state);
  355. }
  356. EXPORT_SYMBOL(icnss_is_fw_down);
  357. unsigned long icnss_get_device_config(void)
  358. {
  359. struct icnss_priv *priv = icnss_get_plat_priv();
  360. if (!priv)
  361. return 0;
  362. return priv->device_config;
  363. }
  364. EXPORT_SYMBOL(icnss_get_device_config);
  365. bool icnss_is_rejuvenate(void)
  366. {
  367. if (!penv)
  368. return false;
  369. else
  370. return test_bit(ICNSS_REJUVENATE, &penv->state);
  371. }
  372. EXPORT_SYMBOL(icnss_is_rejuvenate);
  373. bool icnss_is_pdr(void)
  374. {
  375. if (!penv)
  376. return false;
  377. else
  378. return test_bit(ICNSS_PDR, &penv->state);
  379. }
  380. EXPORT_SYMBOL(icnss_is_pdr);
  381. static int icnss_send_smp2p(struct icnss_priv *priv,
  382. enum icnss_smp2p_msg_id msg_id,
  383. enum smp2p_out_entry smp2p_entry)
  384. {
  385. unsigned int value = 0;
  386. int ret;
  387. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  388. return -EINVAL;
  389. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  390. if (msg_id == ICNSS_RESET_MSG) {
  391. priv->smp2p_info[smp2p_entry].seq = 0;
  392. ret = qcom_smem_state_update_bits(
  393. priv->smp2p_info[smp2p_entry].smem_state,
  394. ICNSS_SMEM_VALUE_MASK,
  395. 0);
  396. if (ret)
  397. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  398. ret, icnss_smp2p_str[smp2p_entry]);
  399. return ret;
  400. }
  401. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  402. !test_bit(ICNSS_FW_READY, &priv->state)) {
  403. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  404. priv->state);
  405. return -EINVAL;
  406. }
  407. value |= priv->smp2p_info[smp2p_entry].seq++;
  408. value <<= ICNSS_SMEM_SEQ_NO_POS;
  409. value |= msg_id;
  410. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  411. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  412. reinit_completion(&penv->smp2p_soc_wake_wait);
  413. ret = qcom_smem_state_update_bits(
  414. priv->smp2p_info[smp2p_entry].smem_state,
  415. ICNSS_SMEM_VALUE_MASK,
  416. value);
  417. if (ret) {
  418. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  419. icnss_smp2p_str[smp2p_entry]);
  420. } else {
  421. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  422. msg_id == ICNSS_SOC_WAKE_REL) {
  423. if (!wait_for_completion_timeout(
  424. &priv->smp2p_soc_wake_wait,
  425. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  426. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  427. icnss_smp2p_str[smp2p_entry]);
  428. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  429. ICNSS_ASSERT(0);
  430. }
  431. }
  432. }
  433. return ret;
  434. }
  435. bool icnss_is_low_power(void)
  436. {
  437. if (!penv)
  438. return false;
  439. else
  440. return test_bit(ICNSS_LOW_POWER, &penv->state);
  441. }
  442. EXPORT_SYMBOL(icnss_is_low_power);
  443. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  444. {
  445. struct icnss_priv *priv = ctx;
  446. if (priv)
  447. priv->force_err_fatal = true;
  448. icnss_pr_err("Received force error fatal request from FW\n");
  449. return IRQ_HANDLED;
  450. }
  451. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  452. {
  453. struct icnss_priv *priv = ctx;
  454. struct icnss_uevent_fw_down_data fw_down_data = {0};
  455. icnss_pr_err("Received early crash indication from FW\n");
  456. if (priv) {
  457. if (priv->wpss_self_recovery_enabled)
  458. mod_timer(&priv->wpss_ssr_timer,
  459. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  460. set_bit(ICNSS_FW_DOWN, &priv->state);
  461. icnss_ignore_fw_timeout(true);
  462. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  463. clear_bit(ICNSS_FW_READY, &priv->state);
  464. fw_down_data.crashed = true;
  465. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  466. &fw_down_data);
  467. }
  468. }
  469. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  470. 0, NULL);
  471. return IRQ_HANDLED;
  472. }
  473. static void register_fw_error_notifications(struct device *dev)
  474. {
  475. struct icnss_priv *priv = dev_get_drvdata(dev);
  476. struct device_node *dev_node;
  477. int irq = 0, ret = 0;
  478. if (!priv)
  479. return;
  480. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  481. if (!dev_node) {
  482. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  483. return;
  484. }
  485. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  486. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  487. ret = irq = of_irq_get_byname(dev_node,
  488. "qcom,smp2p-force-fatal-error");
  489. if (ret < 0) {
  490. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  491. irq);
  492. return;
  493. }
  494. }
  495. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  496. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  497. "wlanfw-err", priv);
  498. if (ret < 0) {
  499. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  500. irq, ret);
  501. return;
  502. }
  503. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  504. priv->fw_error_fatal_irq = irq;
  505. }
  506. static void register_early_crash_notifications(struct device *dev)
  507. {
  508. struct icnss_priv *priv = dev_get_drvdata(dev);
  509. struct device_node *dev_node;
  510. int irq = 0, ret = 0;
  511. if (!priv)
  512. return;
  513. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  514. if (!dev_node) {
  515. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  516. return;
  517. }
  518. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  519. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  520. ret = irq = of_irq_get_byname(dev_node,
  521. "qcom,smp2p-early-crash-ind");
  522. if (ret < 0) {
  523. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  524. irq);
  525. return;
  526. }
  527. }
  528. ret = devm_request_threaded_irq(dev, irq, NULL,
  529. fw_crash_indication_handler,
  530. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  531. "wlanfw-early-crash-ind", priv);
  532. if (ret < 0) {
  533. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  534. irq, ret);
  535. return;
  536. }
  537. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  538. priv->fw_early_crash_irq = irq;
  539. }
  540. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  541. {
  542. struct thermal_zone_device *thermal_dev;
  543. const char *tsens;
  544. int ret;
  545. ret = of_property_read_string(priv->pdev->dev.of_node,
  546. "tsens",
  547. &tsens);
  548. if (ret)
  549. return ret;
  550. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  551. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  552. if (IS_ERR(thermal_dev)) {
  553. icnss_pr_err("Fail to get thermal zone. ret: %d",
  554. PTR_ERR(thermal_dev));
  555. return PTR_ERR(thermal_dev);
  556. }
  557. ret = thermal_zone_get_temp(thermal_dev, temp);
  558. if (ret)
  559. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  560. return ret;
  561. }
  562. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  563. {
  564. struct icnss_priv *priv = ctx;
  565. if (priv)
  566. complete(&priv->smp2p_soc_wake_wait);
  567. return IRQ_HANDLED;
  568. }
  569. static void register_soc_wake_notif(struct device *dev)
  570. {
  571. struct icnss_priv *priv = dev_get_drvdata(dev);
  572. struct device_node *dev_node;
  573. int irq = 0, ret = 0;
  574. if (!priv)
  575. return;
  576. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  577. if (!dev_node) {
  578. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  579. return;
  580. }
  581. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  582. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  583. ret = irq = of_irq_get_byname(dev_node,
  584. "qcom,smp2p-soc-wake-ack");
  585. if (ret < 0) {
  586. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  587. irq);
  588. return;
  589. }
  590. }
  591. ret = devm_request_threaded_irq(dev, irq, NULL,
  592. fw_soc_wake_ack_handler,
  593. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  594. IRQF_TRIGGER_FALLING,
  595. "wlanfw-soc-wake-ack", priv);
  596. if (ret < 0) {
  597. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  598. irq, ret);
  599. return;
  600. }
  601. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  602. priv->fw_soc_wake_ack_irq = irq;
  603. }
  604. int icnss_call_driver_uevent(struct icnss_priv *priv,
  605. enum icnss_uevent uevent, void *data)
  606. {
  607. struct icnss_uevent_data uevent_data;
  608. if (!priv->ops || !priv->ops->uevent)
  609. return 0;
  610. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  611. priv->state, uevent);
  612. uevent_data.uevent = uevent;
  613. uevent_data.data = data;
  614. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  615. }
  616. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  617. {
  618. int i;
  619. int ret = 0;
  620. ret = icnss_qmi_get_dms_mac(priv);
  621. if (ret == 0 && priv->dms.mac_valid)
  622. goto qmi_send;
  623. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  624. * Thus assert on failure to get MAC from DMS even after retries
  625. */
  626. if (priv->use_nv_mac) {
  627. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  628. if (priv->dms.mac_valid)
  629. break;
  630. ret = icnss_qmi_get_dms_mac(priv);
  631. if (ret != -EAGAIN)
  632. break;
  633. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  634. }
  635. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  636. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  637. ICNSS_ASSERT(0);
  638. return -EINVAL;
  639. }
  640. }
  641. qmi_send:
  642. if (priv->dms.mac_valid)
  643. ret =
  644. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  645. ARRAY_SIZE(priv->dms.mac));
  646. return ret;
  647. }
  648. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  649. enum smp2p_out_entry smp2p_entry)
  650. {
  651. int retry = 0;
  652. int error;
  653. if (priv->smp2p_info[smp2p_entry].smem_state)
  654. return;
  655. retry:
  656. priv->smp2p_info[smp2p_entry].smem_state =
  657. qcom_smem_state_get(&priv->pdev->dev,
  658. icnss_smp2p_str[smp2p_entry],
  659. &priv->smp2p_info[smp2p_entry].smem_bit);
  660. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  661. if (retry++ < SMP2P_GET_MAX_RETRY) {
  662. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  663. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  664. error, icnss_smp2p_str[smp2p_entry]);
  665. msleep(SMP2P_GET_RETRY_DELAY_MS);
  666. goto retry;
  667. }
  668. ICNSS_ASSERT(0);
  669. return;
  670. }
  671. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  672. }
  673. static inline
  674. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  675. {
  676. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  677. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  678. } else {
  679. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  680. }
  681. }
  682. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  683. {
  684. switch (val) {
  685. case WLAN_RF_SLATE:
  686. return WLFW_WLAN_RF_SLATE_V01;
  687. case WLAN_RF_APACHE:
  688. return WLFW_WLAN_RF_APACHE_V01;
  689. default:
  690. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  691. }
  692. }
  693. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  694. void *data)
  695. {
  696. int ret = 0;
  697. int temp = 0;
  698. bool ignore_assert = false;
  699. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  700. if (!priv)
  701. return -ENODEV;
  702. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  703. clear_bit(ICNSS_FW_DOWN, &priv->state);
  704. clear_bit(ICNSS_FW_READY, &priv->state);
  705. icnss_ignore_fw_timeout(false);
  706. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  707. icnss_pr_err("QMI Server already in Connected State\n");
  708. ICNSS_ASSERT(0);
  709. }
  710. ret = icnss_connect_to_fw_server(priv, data);
  711. if (ret)
  712. goto fail;
  713. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  714. if (priv->is_slate_rfa) {
  715. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  716. reinit_completion(&priv->slate_boot_complete);
  717. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  718. priv->state);
  719. wait_for_completion(&priv->slate_boot_complete);
  720. }
  721. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  722. icnss_pr_info("sent wlan boot init command\n");
  723. }
  724. ret = wlfw_ind_register_send_sync_msg(priv);
  725. if (ret < 0) {
  726. if (ret == -EALREADY) {
  727. ret = 0;
  728. goto qmi_registered;
  729. }
  730. ignore_assert = true;
  731. goto fail;
  732. }
  733. if (priv->is_rf_subtype_valid) {
  734. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  735. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  736. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  737. if (ret < 0)
  738. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  739. ret);
  740. } else {
  741. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  742. priv->rf_subtype);
  743. }
  744. }
  745. if (priv->device_id == WCN6750_DEVICE_ID ||
  746. priv->device_id == WCN6450_DEVICE_ID) {
  747. if (!icnss_get_temperature(priv, &temp)) {
  748. icnss_pr_dbg("Temperature: %d\n", temp);
  749. if (temp < WLAN_EN_TEMP_THRESHOLD)
  750. icnss_set_wlan_en_delay(priv);
  751. }
  752. ret = wlfw_host_cap_send_sync(priv);
  753. if (ret < 0)
  754. goto fail;
  755. }
  756. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  757. if (!priv->msa_va) {
  758. icnss_pr_err("Invalid MSA address\n");
  759. ret = -EINVAL;
  760. goto fail;
  761. }
  762. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  763. if (ret < 0) {
  764. ignore_assert = true;
  765. goto fail;
  766. }
  767. ret = wlfw_msa_ready_send_sync_msg(priv);
  768. if (ret < 0) {
  769. ignore_assert = true;
  770. goto fail;
  771. }
  772. }
  773. if (priv->device_id == WCN6450_DEVICE_ID)
  774. icnss_hw_power_off(priv);
  775. ret = wlfw_cap_send_sync_msg(priv);
  776. if (ret < 0) {
  777. ignore_assert = true;
  778. goto fail;
  779. }
  780. ret = icnss_hw_power_on(priv);
  781. if (ret)
  782. goto fail;
  783. if (priv->device_id == WCN6750_DEVICE_ID ||
  784. priv->device_id == WCN6450_DEVICE_ID) {
  785. ret = wlfw_device_info_send_msg(priv);
  786. if (ret < 0) {
  787. ignore_assert = true;
  788. goto device_info_failure;
  789. }
  790. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  791. priv->mem_base_pa,
  792. priv->mem_base_size);
  793. if (!priv->mem_base_va) {
  794. icnss_pr_err("Ioremap failed for bar address\n");
  795. goto device_info_failure;
  796. }
  797. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  798. &priv->mem_base_pa,
  799. priv->mem_base_va);
  800. if (priv->mhi_state_info_pa)
  801. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  802. priv->mhi_state_info_pa,
  803. PAGE_SIZE);
  804. if (!priv->mhi_state_info_va)
  805. icnss_pr_err("Ioremap failed for MHI info address\n");
  806. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  807. &priv->mhi_state_info_pa,
  808. priv->mhi_state_info_va);
  809. }
  810. if (priv->bdf_download_support) {
  811. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  812. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  813. priv->ctrl_params.bdf_type);
  814. if (ret < 0)
  815. goto device_info_failure;
  816. }
  817. if (priv->device_id == WCN6450_DEVICE_ID) {
  818. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  819. if (ret < 0)
  820. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  821. ret);
  822. }
  823. if (priv->device_id == WCN6750_DEVICE_ID ||
  824. priv->device_id == WCN6450_DEVICE_ID) {
  825. if (!priv->fw_soc_wake_ack_irq)
  826. register_soc_wake_notif(&priv->pdev->dev);
  827. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  828. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  829. }
  830. if (priv->wpss_supported)
  831. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  832. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  833. if (priv->bdf_download_support) {
  834. ret = wlfw_cal_report_req(priv);
  835. if (ret < 0)
  836. goto device_info_failure;
  837. }
  838. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  839. dynamic_feature_mask);
  840. }
  841. if (!priv->fw_error_fatal_irq)
  842. register_fw_error_notifications(&priv->pdev->dev);
  843. if (!priv->fw_early_crash_irq)
  844. register_early_crash_notifications(&priv->pdev->dev);
  845. if (priv->psf_supported)
  846. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  847. return ret;
  848. device_info_failure:
  849. icnss_hw_power_off(priv);
  850. fail:
  851. ICNSS_ASSERT(ignore_assert);
  852. qmi_registered:
  853. return ret;
  854. }
  855. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  856. {
  857. if (!priv)
  858. return -ENODEV;
  859. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  860. icnss_clear_server(priv);
  861. if (priv->psf_supported)
  862. priv->last_updated_voltage = 0;
  863. return 0;
  864. }
  865. static int icnss_call_driver_probe(struct icnss_priv *priv)
  866. {
  867. int ret = 0;
  868. int probe_cnt = 0;
  869. if (!priv->ops || !priv->ops->probe)
  870. return 0;
  871. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  872. return -EINVAL;
  873. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  874. icnss_hw_power_on(priv);
  875. icnss_block_shutdown(true);
  876. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  877. ret = priv->ops->probe(&priv->pdev->dev);
  878. probe_cnt++;
  879. if (ret != -EPROBE_DEFER)
  880. break;
  881. }
  882. if (ret < 0) {
  883. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  884. ret, priv->state, probe_cnt);
  885. icnss_block_shutdown(false);
  886. goto out;
  887. }
  888. icnss_block_shutdown(false);
  889. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  890. return 0;
  891. out:
  892. icnss_hw_power_off(priv);
  893. return ret;
  894. }
  895. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  896. {
  897. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  898. goto out;
  899. if (!priv->ops || !priv->ops->shutdown)
  900. goto out;
  901. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  902. goto out;
  903. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  904. priv->ops->shutdown(&priv->pdev->dev);
  905. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  906. out:
  907. return 0;
  908. }
  909. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  910. {
  911. int ret = 0;
  912. icnss_pm_relax(priv);
  913. icnss_call_driver_shutdown(priv);
  914. clear_bit(ICNSS_PDR, &priv->state);
  915. clear_bit(ICNSS_REJUVENATE, &priv->state);
  916. clear_bit(ICNSS_PD_RESTART, &priv->state);
  917. clear_bit(ICNSS_LOW_POWER, &priv->state);
  918. priv->early_crash_ind = false;
  919. priv->is_ssr = false;
  920. if (!priv->ops || !priv->ops->reinit)
  921. goto out;
  922. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  923. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  924. priv->state);
  925. goto out;
  926. }
  927. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  928. goto call_probe;
  929. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  930. icnss_hw_power_on(priv);
  931. icnss_block_shutdown(true);
  932. ret = priv->ops->reinit(&priv->pdev->dev);
  933. if (ret < 0) {
  934. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  935. ret, priv->state);
  936. if (!priv->allow_recursive_recovery)
  937. ICNSS_ASSERT(false);
  938. icnss_block_shutdown(false);
  939. goto out_power_off;
  940. }
  941. icnss_block_shutdown(false);
  942. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  943. return 0;
  944. call_probe:
  945. return icnss_call_driver_probe(priv);
  946. out_power_off:
  947. icnss_hw_power_off(priv);
  948. out:
  949. return ret;
  950. }
  951. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  952. {
  953. int ret = 0;
  954. if (!priv)
  955. return -ENODEV;
  956. del_timer(&priv->recovery_timer);
  957. set_bit(ICNSS_FW_READY, &priv->state);
  958. clear_bit(ICNSS_MODE_ON, &priv->state);
  959. atomic_set(&priv->soc_wake_ref_count, 0);
  960. if (priv->device_id == WCN6750_DEVICE_ID ||
  961. priv->device_id == WCN6450_DEVICE_ID)
  962. icnss_free_qdss_mem(priv);
  963. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  964. icnss_hw_power_off(priv);
  965. if (!priv->pdev) {
  966. icnss_pr_err("Device is not ready\n");
  967. ret = -ENODEV;
  968. goto out;
  969. }
  970. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state)) {
  971. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  972. icnss_pr_info("sent wlan boot complete command\n");
  973. }
  974. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  975. ret = icnss_pd_restart_complete(priv);
  976. } else {
  977. if (priv->wpss_supported)
  978. icnss_setup_dms_mac(priv);
  979. ret = icnss_call_driver_probe(priv);
  980. }
  981. icnss_vreg_unvote(priv);
  982. out:
  983. return ret;
  984. }
  985. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  986. {
  987. int ret = 0;
  988. if (!priv)
  989. return -ENODEV;
  990. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  991. if (priv->device_id == WCN6750_DEVICE_ID) {
  992. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  993. if (ret < 0)
  994. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  995. ret);
  996. }
  997. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  998. mod_timer(&priv->recovery_timer,
  999. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1000. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1001. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1002. } else {
  1003. icnss_driver_event_fw_ready_ind(priv, NULL);
  1004. }
  1005. return ret;
  1006. }
  1007. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1008. {
  1009. struct platform_device *pdev = priv->pdev;
  1010. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1011. int i, j;
  1012. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1013. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1014. qdss_mem[i].va =
  1015. dma_alloc_coherent(&pdev->dev,
  1016. qdss_mem[i].size,
  1017. &qdss_mem[i].pa,
  1018. GFP_KERNEL);
  1019. if (!qdss_mem[i].va) {
  1020. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1021. qdss_mem[i].size,
  1022. qdss_mem[i].type, i);
  1023. break;
  1024. }
  1025. }
  1026. }
  1027. /* Best-effort allocation for QDSS trace */
  1028. if (i < priv->qdss_mem_seg_len) {
  1029. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1030. qdss_mem[j].type = 0;
  1031. qdss_mem[j].size = 0;
  1032. }
  1033. priv->qdss_mem_seg_len = i;
  1034. }
  1035. return 0;
  1036. }
  1037. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1038. {
  1039. struct platform_device *pdev = priv->pdev;
  1040. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1041. int i;
  1042. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1043. if (qdss_mem[i].va && qdss_mem[i].size) {
  1044. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1045. &qdss_mem[i].pa, qdss_mem[i].size,
  1046. qdss_mem[i].type);
  1047. dma_free_coherent(&pdev->dev,
  1048. qdss_mem[i].size, qdss_mem[i].va,
  1049. qdss_mem[i].pa);
  1050. qdss_mem[i].va = NULL;
  1051. qdss_mem[i].pa = 0;
  1052. qdss_mem[i].size = 0;
  1053. qdss_mem[i].type = 0;
  1054. }
  1055. }
  1056. priv->qdss_mem_seg_len = 0;
  1057. }
  1058. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1059. {
  1060. int ret = 0;
  1061. ret = icnss_alloc_qdss_mem(priv);
  1062. if (ret < 0)
  1063. return ret;
  1064. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1065. }
  1066. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1067. u64 pa, u32 size, int *seg_id)
  1068. {
  1069. int i = 0;
  1070. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1071. u64 offset = 0;
  1072. void *va = NULL;
  1073. u64 local_pa;
  1074. u32 local_size;
  1075. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1076. local_pa = (u64)qdss_mem[i].pa;
  1077. local_size = (u32)qdss_mem[i].size;
  1078. if (pa == local_pa && size <= local_size) {
  1079. va = qdss_mem[i].va;
  1080. break;
  1081. }
  1082. if (pa > local_pa &&
  1083. pa < local_pa + local_size &&
  1084. pa + size <= local_pa + local_size) {
  1085. offset = pa - local_pa;
  1086. va = qdss_mem[i].va + offset;
  1087. break;
  1088. }
  1089. }
  1090. *seg_id = i;
  1091. return va;
  1092. }
  1093. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1094. void *data)
  1095. {
  1096. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1097. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1098. int ret = 0;
  1099. int i;
  1100. void *va = NULL;
  1101. u64 pa;
  1102. u32 size;
  1103. int seg_id = 0;
  1104. if (!priv->qdss_mem_seg_len) {
  1105. icnss_pr_err("Memory for QDSS trace is not available\n");
  1106. return -ENOMEM;
  1107. }
  1108. if (event_data->mem_seg_len == 0) {
  1109. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1110. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1111. ICNSS_GENL_MSG_TYPE_QDSS,
  1112. event_data->file_name,
  1113. qdss_mem[i].size);
  1114. if (ret < 0) {
  1115. icnss_pr_err("Fail to save QDSS data: %d\n",
  1116. ret);
  1117. break;
  1118. }
  1119. }
  1120. } else {
  1121. for (i = 0; i < event_data->mem_seg_len; i++) {
  1122. pa = event_data->mem_seg[i].addr;
  1123. size = event_data->mem_seg[i].size;
  1124. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1125. size, &seg_id);
  1126. if (!va) {
  1127. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1128. &pa);
  1129. ret = -EINVAL;
  1130. break;
  1131. }
  1132. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1133. event_data->file_name, size);
  1134. if (ret < 0) {
  1135. icnss_pr_err("Fail to save QDSS data: %d\n",
  1136. ret);
  1137. break;
  1138. }
  1139. }
  1140. }
  1141. kfree(data);
  1142. return ret;
  1143. }
  1144. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1145. {
  1146. int dec, c = atomic_read(v);
  1147. do {
  1148. dec = c - 1;
  1149. if (unlikely(dec < 1))
  1150. break;
  1151. } while (!atomic_try_cmpxchg(v, &c, dec));
  1152. return dec;
  1153. }
  1154. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1155. void *data)
  1156. {
  1157. int ret = 0;
  1158. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1159. if (!priv)
  1160. return -ENODEV;
  1161. if (!data)
  1162. return -EINVAL;
  1163. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1164. event_data->total_size);
  1165. kfree(data);
  1166. return ret;
  1167. }
  1168. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1169. {
  1170. int ret = 0;
  1171. if (!priv)
  1172. return -ENODEV;
  1173. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1174. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1175. atomic_read(&priv->soc_wake_ref_count));
  1176. return 0;
  1177. }
  1178. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1179. ICNSS_SMP2P_OUT_SOC_WAKE);
  1180. if (!ret)
  1181. atomic_inc(&priv->soc_wake_ref_count);
  1182. return ret;
  1183. }
  1184. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1185. {
  1186. int ret = 0;
  1187. if (!priv)
  1188. return -ENODEV;
  1189. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1190. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1191. priv->soc_wake_ref_count);
  1192. return 0;
  1193. }
  1194. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1195. ICNSS_SMP2P_OUT_SOC_WAKE);
  1196. return ret;
  1197. }
  1198. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1199. void *data)
  1200. {
  1201. int ret = 0;
  1202. int probe_cnt = 0;
  1203. if (priv->ops)
  1204. return -EEXIST;
  1205. priv->ops = data;
  1206. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1207. set_bit(ICNSS_FW_READY, &priv->state);
  1208. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1209. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1210. priv->state);
  1211. return -ENODEV;
  1212. }
  1213. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1214. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1215. priv->state);
  1216. goto out;
  1217. }
  1218. ret = icnss_hw_power_on(priv);
  1219. if (ret)
  1220. goto out;
  1221. icnss_block_shutdown(true);
  1222. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1223. ret = priv->ops->probe(&priv->pdev->dev);
  1224. probe_cnt++;
  1225. if (ret != -EPROBE_DEFER)
  1226. break;
  1227. }
  1228. if (ret) {
  1229. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1230. ret, priv->state, probe_cnt);
  1231. icnss_block_shutdown(false);
  1232. goto power_off;
  1233. }
  1234. icnss_block_shutdown(false);
  1235. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1236. return 0;
  1237. power_off:
  1238. icnss_hw_power_off(priv);
  1239. out:
  1240. return ret;
  1241. }
  1242. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1243. void *data)
  1244. {
  1245. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1246. priv->ops = NULL;
  1247. goto out;
  1248. }
  1249. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1250. icnss_block_shutdown(true);
  1251. if (priv->ops)
  1252. priv->ops->remove(&priv->pdev->dev);
  1253. icnss_block_shutdown(false);
  1254. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1255. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1256. priv->ops = NULL;
  1257. icnss_hw_power_off(priv);
  1258. out:
  1259. return 0;
  1260. }
  1261. static int icnss_fw_crashed(struct icnss_priv *priv,
  1262. struct icnss_event_pd_service_down_data *event_data)
  1263. {
  1264. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1265. set_bit(ICNSS_PD_RESTART, &priv->state);
  1266. clear_bit(ICNSS_FW_READY, &priv->state);
  1267. icnss_pm_stay_awake(priv);
  1268. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1269. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1270. if (event_data && event_data->fw_rejuvenate)
  1271. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1272. return 0;
  1273. }
  1274. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1275. struct icnss_uevent_hang_data *hang_data)
  1276. {
  1277. if (!priv->hang_event_data_va)
  1278. return -EINVAL;
  1279. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1280. priv->hang_event_data_len,
  1281. GFP_ATOMIC);
  1282. if (!priv->hang_event_data)
  1283. return -ENOMEM;
  1284. // Update the hang event params
  1285. hang_data->hang_event_data = priv->hang_event_data;
  1286. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1287. return 0;
  1288. }
  1289. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1290. {
  1291. struct icnss_uevent_hang_data hang_data = {0};
  1292. int ret = 0xFF;
  1293. if (priv->early_crash_ind) {
  1294. ret = icnss_update_hang_event_data(priv, &hang_data);
  1295. if (ret)
  1296. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1297. }
  1298. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1299. &hang_data);
  1300. if (!ret) {
  1301. kfree(priv->hang_event_data);
  1302. priv->hang_event_data = NULL;
  1303. }
  1304. return 0;
  1305. }
  1306. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1307. void *data)
  1308. {
  1309. struct icnss_event_pd_service_down_data *event_data = data;
  1310. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1311. icnss_ignore_fw_timeout(false);
  1312. goto out;
  1313. }
  1314. if (priv->force_err_fatal)
  1315. ICNSS_ASSERT(0);
  1316. if (priv->device_id == WCN6750_DEVICE_ID ||
  1317. priv->device_id == WCN6450_DEVICE_ID) {
  1318. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1319. ICNSS_SMP2P_OUT_SOC_WAKE);
  1320. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1321. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1322. }
  1323. if (priv->wpss_supported)
  1324. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1325. ICNSS_SMP2P_OUT_POWER_SAVE);
  1326. icnss_send_hang_event_data(priv);
  1327. if (priv->early_crash_ind) {
  1328. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1329. event_data->crashed, priv->state);
  1330. goto out;
  1331. }
  1332. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1333. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1334. event_data->crashed, priv->state);
  1335. if (!priv->allow_recursive_recovery)
  1336. ICNSS_ASSERT(0);
  1337. goto out;
  1338. }
  1339. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1340. icnss_fw_crashed(priv, event_data);
  1341. out:
  1342. kfree(data);
  1343. return 0;
  1344. }
  1345. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1346. void *data)
  1347. {
  1348. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1349. icnss_ignore_fw_timeout(false);
  1350. goto out;
  1351. }
  1352. priv->early_crash_ind = true;
  1353. icnss_fw_crashed(priv, NULL);
  1354. out:
  1355. kfree(data);
  1356. return 0;
  1357. }
  1358. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1359. void *data)
  1360. {
  1361. int ret = 0;
  1362. if (!priv->ops || !priv->ops->idle_shutdown)
  1363. return 0;
  1364. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1365. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1366. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1367. ret = -EBUSY;
  1368. } else {
  1369. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1370. priv->state);
  1371. icnss_block_shutdown(true);
  1372. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1373. icnss_block_shutdown(false);
  1374. }
  1375. return ret;
  1376. }
  1377. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1378. void *data)
  1379. {
  1380. int ret = 0;
  1381. if (!priv->ops || !priv->ops->idle_restart)
  1382. return 0;
  1383. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1384. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1385. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1386. ret = -EBUSY;
  1387. } else {
  1388. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1389. priv->state);
  1390. icnss_block_shutdown(true);
  1391. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1392. icnss_block_shutdown(false);
  1393. }
  1394. return ret;
  1395. }
  1396. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1397. {
  1398. icnss_free_qdss_mem(priv);
  1399. return 0;
  1400. }
  1401. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1402. void *data)
  1403. {
  1404. struct icnss_m3_upload_segments_req_data *event_data = data;
  1405. struct qcom_dump_segment segment;
  1406. int i, status = 0, ret = 0;
  1407. struct list_head head;
  1408. if (!dump_enabled()) {
  1409. icnss_pr_info("Dump collection is not enabled\n");
  1410. return ret;
  1411. }
  1412. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1413. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1414. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1415. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1416. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1417. return ret;
  1418. INIT_LIST_HEAD(&head);
  1419. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1420. memset(&segment, 0, sizeof(segment));
  1421. segment.va = devm_ioremap(&priv->pdev->dev,
  1422. event_data->m3_segment[i].addr,
  1423. event_data->m3_segment[i].size);
  1424. if (!segment.va) {
  1425. icnss_pr_err("Failed to ioremap M3 Dump region");
  1426. ret = -ENOMEM;
  1427. goto send_resp;
  1428. }
  1429. segment.size = event_data->m3_segment[i].size;
  1430. list_add(&segment.node, &head);
  1431. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1432. event_data->m3_segment[i].name);
  1433. switch (event_data->m3_segment[i].type) {
  1434. case QMI_M3_SEGMENT_PHYAREG_V01:
  1435. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1436. break;
  1437. case QMI_M3_SEGMENT_PHYDBG_V01:
  1438. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1439. break;
  1440. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1441. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1442. break;
  1443. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1444. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1445. break;
  1446. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1447. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1448. break;
  1449. default:
  1450. icnss_pr_err("Invalid Segment type: %d",
  1451. event_data->m3_segment[i].type);
  1452. }
  1453. if (ret) {
  1454. status = ret;
  1455. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1456. event_data->m3_segment[i].name, ret);
  1457. }
  1458. list_del(&segment.node);
  1459. }
  1460. send_resp:
  1461. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1462. status);
  1463. return ret;
  1464. }
  1465. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1466. {
  1467. int ret = 0;
  1468. struct icnss_subsys_restart_level_data *event_data = data;
  1469. if (!priv)
  1470. return -ENODEV;
  1471. if (!data)
  1472. return -EINVAL;
  1473. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1474. kfree(data);
  1475. return ret;
  1476. }
  1477. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1478. {
  1479. int ret;
  1480. struct icnss_priv *priv = icnss_get_plat_priv();
  1481. rproc_shutdown(priv->rproc);
  1482. ret = rproc_boot(priv->rproc);
  1483. if (ret) {
  1484. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1485. rproc_put(priv->rproc);
  1486. }
  1487. }
  1488. static void icnss_driver_event_work(struct work_struct *work)
  1489. {
  1490. struct icnss_priv *priv =
  1491. container_of(work, struct icnss_priv, event_work);
  1492. struct icnss_driver_event *event;
  1493. unsigned long flags;
  1494. int ret;
  1495. icnss_pm_stay_awake(priv);
  1496. spin_lock_irqsave(&priv->event_lock, flags);
  1497. while (!list_empty(&priv->event_list)) {
  1498. event = list_first_entry(&priv->event_list,
  1499. struct icnss_driver_event, list);
  1500. list_del(&event->list);
  1501. spin_unlock_irqrestore(&priv->event_lock, flags);
  1502. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1503. icnss_driver_event_to_str(event->type),
  1504. event->sync ? "-sync" : "", event->type,
  1505. priv->state);
  1506. switch (event->type) {
  1507. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1508. ret = icnss_driver_event_server_arrive(priv,
  1509. event->data);
  1510. break;
  1511. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1512. ret = icnss_driver_event_server_exit(priv);
  1513. break;
  1514. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1515. ret = icnss_driver_event_fw_ready_ind(priv,
  1516. event->data);
  1517. break;
  1518. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1519. ret = icnss_driver_event_register_driver(priv,
  1520. event->data);
  1521. break;
  1522. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1523. ret = icnss_driver_event_unregister_driver(priv,
  1524. event->data);
  1525. break;
  1526. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1527. ret = icnss_driver_event_pd_service_down(priv,
  1528. event->data);
  1529. break;
  1530. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1531. ret = icnss_driver_event_early_crash_ind(priv,
  1532. event->data);
  1533. break;
  1534. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1535. ret = icnss_driver_event_idle_shutdown(priv,
  1536. event->data);
  1537. break;
  1538. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1539. ret = icnss_driver_event_idle_restart(priv,
  1540. event->data);
  1541. break;
  1542. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1543. ret = icnss_driver_event_fw_init_done(priv,
  1544. event->data);
  1545. break;
  1546. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1547. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1548. break;
  1549. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1550. ret = icnss_qdss_trace_save_hdlr(priv,
  1551. event->data);
  1552. break;
  1553. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1554. ret = icnss_qdss_trace_free_hdlr(priv);
  1555. break;
  1556. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1557. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1558. break;
  1559. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1560. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1561. event->data);
  1562. break;
  1563. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1564. ret = icnss_subsys_restart_level(priv, event->data);
  1565. break;
  1566. default:
  1567. icnss_pr_err("Invalid Event type: %d", event->type);
  1568. kfree(event);
  1569. continue;
  1570. }
  1571. priv->stats.events[event->type].processed++;
  1572. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1573. icnss_driver_event_to_str(event->type),
  1574. event->sync ? "-sync" : "", event->type, ret,
  1575. priv->state);
  1576. spin_lock_irqsave(&priv->event_lock, flags);
  1577. if (event->sync) {
  1578. event->ret = ret;
  1579. complete(&event->complete);
  1580. continue;
  1581. }
  1582. spin_unlock_irqrestore(&priv->event_lock, flags);
  1583. kfree(event);
  1584. spin_lock_irqsave(&priv->event_lock, flags);
  1585. }
  1586. spin_unlock_irqrestore(&priv->event_lock, flags);
  1587. icnss_pm_relax(priv);
  1588. }
  1589. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1590. {
  1591. struct icnss_priv *priv =
  1592. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1593. struct icnss_soc_wake_event *event;
  1594. unsigned long flags;
  1595. int ret;
  1596. icnss_pm_stay_awake(priv);
  1597. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1598. while (!list_empty(&priv->soc_wake_msg_list)) {
  1599. event = list_first_entry(&priv->soc_wake_msg_list,
  1600. struct icnss_soc_wake_event, list);
  1601. list_del(&event->list);
  1602. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1603. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1604. icnss_soc_wake_event_to_str(event->type),
  1605. event->sync ? "-sync" : "", event->type,
  1606. priv->state);
  1607. switch (event->type) {
  1608. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1609. ret = icnss_event_soc_wake_request(priv,
  1610. event->data);
  1611. break;
  1612. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1613. ret = icnss_event_soc_wake_release(priv,
  1614. event->data);
  1615. break;
  1616. default:
  1617. icnss_pr_err("Invalid Event type: %d", event->type);
  1618. kfree(event);
  1619. continue;
  1620. }
  1621. priv->stats.soc_wake_events[event->type].processed++;
  1622. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1623. icnss_soc_wake_event_to_str(event->type),
  1624. event->sync ? "-sync" : "", event->type, ret,
  1625. priv->state);
  1626. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1627. if (event->sync) {
  1628. event->ret = ret;
  1629. complete(&event->complete);
  1630. continue;
  1631. }
  1632. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1633. kfree(event);
  1634. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1635. }
  1636. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1637. icnss_pm_relax(priv);
  1638. }
  1639. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1640. {
  1641. int ret = 0;
  1642. struct qcom_dump_segment segment;
  1643. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1644. struct list_head head;
  1645. if (!dump_enabled()) {
  1646. icnss_pr_info("Dump collection is not enabled\n");
  1647. return ret;
  1648. }
  1649. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1650. return ret;
  1651. INIT_LIST_HEAD(&head);
  1652. memset(&segment, 0, sizeof(segment));
  1653. segment.va = priv->msa_va;
  1654. segment.size = priv->msa_mem_size;
  1655. list_add(&segment.node, &head);
  1656. if (!msa0_dump_dev->dev) {
  1657. icnss_pr_err("Created Dump Device not found\n");
  1658. return 0;
  1659. }
  1660. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1661. if (ret) {
  1662. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1663. return ret;
  1664. }
  1665. list_del(&segment.node);
  1666. return ret;
  1667. }
  1668. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1669. void *data)
  1670. {
  1671. struct qcom_ssr_notify_data *notif = data;
  1672. int ret = 0;
  1673. if (!notif->crashed) {
  1674. if (atomic_read(&priv->is_shutdown)) {
  1675. atomic_set(&priv->is_shutdown, false);
  1676. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1677. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1678. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1679. clear_bit(ICNSS_FW_READY, &priv->state);
  1680. icnss_driver_event_post(priv,
  1681. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1682. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1683. NULL);
  1684. }
  1685. }
  1686. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1687. if (!wait_for_completion_timeout(
  1688. &priv->unblock_shutdown,
  1689. msecs_to_jiffies(PROBE_TIMEOUT)))
  1690. icnss_pr_err("modem block shutdown timeout\n");
  1691. }
  1692. ret = wlfw_send_modem_shutdown_msg(priv);
  1693. if (ret < 0)
  1694. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1695. ret);
  1696. }
  1697. }
  1698. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1699. {
  1700. switch (code) {
  1701. case QCOM_SSR_BEFORE_POWERUP:
  1702. return "BEFORE_POWERUP";
  1703. case QCOM_SSR_AFTER_POWERUP:
  1704. return "AFTER_POWERUP";
  1705. case QCOM_SSR_BEFORE_SHUTDOWN:
  1706. return "BEFORE_SHUTDOWN";
  1707. case QCOM_SSR_AFTER_SHUTDOWN:
  1708. return "AFTER_SHUTDOWN";
  1709. default:
  1710. return "UNKNOWN";
  1711. }
  1712. };
  1713. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1714. unsigned long code,
  1715. void *data)
  1716. {
  1717. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1718. wpss_early_ssr_nb);
  1719. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1720. icnss_qcom_ssr_notify_state_to_str(code), code);
  1721. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1722. set_bit(ICNSS_FW_DOWN, &priv->state);
  1723. icnss_ignore_fw_timeout(true);
  1724. }
  1725. return NOTIFY_DONE;
  1726. }
  1727. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1728. unsigned long code,
  1729. void *data)
  1730. {
  1731. struct icnss_event_pd_service_down_data *event_data;
  1732. struct qcom_ssr_notify_data *notif = data;
  1733. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1734. wpss_ssr_nb);
  1735. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1736. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1737. icnss_qcom_ssr_notify_state_to_str(code), code);
  1738. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1739. icnss_pr_info("Collecting msa0 segment dump\n");
  1740. icnss_msa0_ramdump(priv);
  1741. goto out;
  1742. }
  1743. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1744. goto out;
  1745. if (priv->wpss_self_recovery_enabled)
  1746. del_timer(&priv->wpss_ssr_timer);
  1747. priv->is_ssr = true;
  1748. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1749. priv->state, notif->crashed);
  1750. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1751. icnss_update_state_send_modem_shutdown(priv, data);
  1752. set_bit(ICNSS_FW_DOWN, &priv->state);
  1753. icnss_ignore_fw_timeout(true);
  1754. if (notif->crashed)
  1755. priv->stats.recovery.root_pd_crash++;
  1756. else
  1757. priv->stats.recovery.root_pd_shutdown++;
  1758. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1759. if (event_data == NULL)
  1760. return notifier_from_errno(-ENOMEM);
  1761. event_data->crashed = notif->crashed;
  1762. fw_down_data.crashed = !!notif->crashed;
  1763. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1764. clear_bit(ICNSS_FW_READY, &priv->state);
  1765. fw_down_data.crashed = !!notif->crashed;
  1766. icnss_call_driver_uevent(priv,
  1767. ICNSS_UEVENT_FW_DOWN,
  1768. &fw_down_data);
  1769. }
  1770. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1771. ICNSS_EVENT_SYNC, event_data);
  1772. if (notif->crashed)
  1773. mod_timer(&priv->recovery_timer,
  1774. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1775. out:
  1776. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1777. return NOTIFY_OK;
  1778. }
  1779. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1780. unsigned long code,
  1781. void *data)
  1782. {
  1783. struct icnss_event_pd_service_down_data *event_data;
  1784. struct qcom_ssr_notify_data *notif = data;
  1785. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1786. modem_ssr_nb);
  1787. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1788. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1789. icnss_qcom_ssr_notify_state_to_str(code), code);
  1790. switch (code) {
  1791. case QCOM_SSR_BEFORE_SHUTDOWN:
  1792. if (!notif->crashed &&
  1793. priv->low_power_support) { /* Hibernate */
  1794. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1795. icnss_driver_event_post(
  1796. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1797. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1798. set_bit(ICNSS_LOW_POWER, &priv->state);
  1799. }
  1800. break;
  1801. case QCOM_SSR_AFTER_SHUTDOWN:
  1802. /* Collect ramdump only when there was a crash. */
  1803. if (notif->crashed) {
  1804. icnss_pr_info("Collecting msa0 segment dump\n");
  1805. icnss_msa0_ramdump(priv);
  1806. }
  1807. goto out;
  1808. default:
  1809. goto out;
  1810. }
  1811. priv->is_ssr = true;
  1812. if (notif->crashed) {
  1813. priv->stats.recovery.root_pd_crash++;
  1814. priv->root_pd_shutdown = false;
  1815. } else {
  1816. priv->stats.recovery.root_pd_shutdown++;
  1817. priv->root_pd_shutdown = true;
  1818. }
  1819. icnss_update_state_send_modem_shutdown(priv, data);
  1820. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1821. set_bit(ICNSS_FW_DOWN, &priv->state);
  1822. icnss_ignore_fw_timeout(true);
  1823. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1824. clear_bit(ICNSS_FW_READY, &priv->state);
  1825. fw_down_data.crashed = !!notif->crashed;
  1826. icnss_call_driver_uevent(priv,
  1827. ICNSS_UEVENT_FW_DOWN,
  1828. &fw_down_data);
  1829. }
  1830. goto out;
  1831. }
  1832. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1833. priv->state, notif->crashed);
  1834. set_bit(ICNSS_FW_DOWN, &priv->state);
  1835. icnss_ignore_fw_timeout(true);
  1836. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1837. if (event_data == NULL)
  1838. return notifier_from_errno(-ENOMEM);
  1839. event_data->crashed = notif->crashed;
  1840. fw_down_data.crashed = !!notif->crashed;
  1841. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1842. clear_bit(ICNSS_FW_READY, &priv->state);
  1843. fw_down_data.crashed = !!notif->crashed;
  1844. icnss_call_driver_uevent(priv,
  1845. ICNSS_UEVENT_FW_DOWN,
  1846. &fw_down_data);
  1847. }
  1848. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1849. ICNSS_EVENT_SYNC, event_data);
  1850. if (notif->crashed)
  1851. mod_timer(&priv->recovery_timer,
  1852. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1853. out:
  1854. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1855. return NOTIFY_OK;
  1856. }
  1857. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1858. {
  1859. int ret = 0;
  1860. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1861. priv->wpss_early_notify_handler =
  1862. qcom_register_early_ssr_notifier("wpss",
  1863. &priv->wpss_early_ssr_nb);
  1864. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1865. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1866. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1867. }
  1868. return ret;
  1869. }
  1870. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1871. {
  1872. int ret = 0;
  1873. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1874. /*
  1875. * Assign priority of icnss wpss notifier callback over IPA
  1876. * modem notifier callback which is 0
  1877. */
  1878. priv->wpss_ssr_nb.priority = 1;
  1879. priv->wpss_notify_handler =
  1880. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1881. if (IS_ERR(priv->wpss_notify_handler)) {
  1882. ret = PTR_ERR(priv->wpss_notify_handler);
  1883. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1884. }
  1885. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1886. return ret;
  1887. }
  1888. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1889. unsigned long code,
  1890. void *data)
  1891. {
  1892. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1893. slate_ssr_nb);
  1894. int ret = 0;
  1895. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1896. if (code == QCOM_SSR_AFTER_POWERUP) {
  1897. set_bit(ICNSS_SLATE_UP, &priv->state);
  1898. complete(&priv->slate_boot_complete);
  1899. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1900. priv->state);
  1901. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1902. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1903. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1904. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1905. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1906. priv->state);
  1907. goto skip_pdr;
  1908. }
  1909. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1910. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1911. if (ret < 0) {
  1912. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1913. ret, priv->state);
  1914. goto skip_pdr;
  1915. }
  1916. }
  1917. skip_pdr:
  1918. return NOTIFY_OK;
  1919. }
  1920. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1921. {
  1922. int ret = 0;
  1923. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1924. priv->slate_notify_handler =
  1925. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1926. if (IS_ERR(priv->slate_notify_handler)) {
  1927. ret = PTR_ERR(priv->slate_notify_handler);
  1928. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1929. }
  1930. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1931. return ret;
  1932. }
  1933. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1934. {
  1935. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1936. return 0;
  1937. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1938. &priv->slate_ssr_nb);
  1939. priv->slate_notify_handler = NULL;
  1940. return 0;
  1941. }
  1942. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1943. {
  1944. int ret = 0;
  1945. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1946. /*
  1947. * Assign priority of icnss modem notifier callback over IPA
  1948. * modem notifier callback which is 0
  1949. */
  1950. priv->modem_ssr_nb.priority = 1;
  1951. priv->modem_notify_handler =
  1952. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1953. if (IS_ERR(priv->modem_notify_handler)) {
  1954. ret = PTR_ERR(priv->modem_notify_handler);
  1955. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1956. }
  1957. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1958. return ret;
  1959. }
  1960. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1961. {
  1962. if (IS_ERR(priv->wpss_early_notify_handler))
  1963. return;
  1964. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1965. &priv->wpss_early_ssr_nb);
  1966. priv->wpss_early_notify_handler = NULL;
  1967. }
  1968. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1969. {
  1970. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1971. return 0;
  1972. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1973. &priv->wpss_ssr_nb);
  1974. priv->wpss_notify_handler = NULL;
  1975. return 0;
  1976. }
  1977. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1978. {
  1979. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1980. return 0;
  1981. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1982. &priv->modem_ssr_nb);
  1983. priv->modem_notify_handler = NULL;
  1984. return 0;
  1985. }
  1986. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1987. {
  1988. struct icnss_priv *priv = priv_cb;
  1989. struct icnss_event_pd_service_down_data *event_data;
  1990. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1991. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1992. if (!priv)
  1993. return;
  1994. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1995. state, priv->state);
  1996. switch (state) {
  1997. case SERVREG_SERVICE_STATE_DOWN:
  1998. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1999. if (!event_data)
  2000. return;
  2001. event_data->crashed = true;
  2002. if (!priv->is_ssr) {
  2003. set_bit(ICNSS_PDR, &penv->state);
  2004. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2005. cause = ICNSS_HOST_ERROR;
  2006. priv->stats.recovery.pdr_host_error++;
  2007. } else {
  2008. cause = ICNSS_FW_CRASH;
  2009. priv->stats.recovery.pdr_fw_crash++;
  2010. }
  2011. } else if (priv->root_pd_shutdown) {
  2012. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2013. event_data->crashed = false;
  2014. }
  2015. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2016. priv->state, icnss_pdr_cause[cause]);
  2017. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2018. set_bit(ICNSS_FW_DOWN, &priv->state);
  2019. icnss_ignore_fw_timeout(true);
  2020. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2021. clear_bit(ICNSS_FW_READY, &priv->state);
  2022. fw_down_data.crashed = event_data->crashed;
  2023. icnss_call_driver_uevent(priv,
  2024. ICNSS_UEVENT_FW_DOWN,
  2025. &fw_down_data);
  2026. }
  2027. }
  2028. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2029. if (event_data->crashed)
  2030. mod_timer(&priv->recovery_timer,
  2031. jiffies +
  2032. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2033. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2034. ICNSS_EVENT_SYNC, event_data);
  2035. break;
  2036. case SERVREG_SERVICE_STATE_UP:
  2037. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2038. break;
  2039. default:
  2040. break;
  2041. }
  2042. return;
  2043. }
  2044. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2045. {
  2046. struct pdr_handle *handle = NULL;
  2047. struct pdr_service *service = NULL;
  2048. int err = 0;
  2049. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2050. if (IS_ERR_OR_NULL(handle)) {
  2051. err = PTR_ERR(handle);
  2052. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2053. goto out;
  2054. }
  2055. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2056. if (IS_ERR_OR_NULL(service)) {
  2057. err = PTR_ERR(service);
  2058. icnss_pr_err("Failed to add lookup, err %d", err);
  2059. goto out;
  2060. }
  2061. priv->pdr_handle = handle;
  2062. priv->pdr_service = service;
  2063. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2064. icnss_pr_info("PDR registration happened");
  2065. out:
  2066. return err;
  2067. }
  2068. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2069. {
  2070. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2071. return;
  2072. pdr_handle_release(priv->pdr_handle);
  2073. }
  2074. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2075. {
  2076. int ret = 0;
  2077. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2078. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2079. ret = PTR_ERR(priv->icnss_ramdump_class);
  2080. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2081. return ret;
  2082. }
  2083. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2084. ICNSS_RAMDUMP_NAME);
  2085. if (ret < 0) {
  2086. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2087. goto fail_alloc_major;
  2088. }
  2089. return 0;
  2090. fail_alloc_major:
  2091. class_destroy(priv->icnss_ramdump_class);
  2092. return ret;
  2093. }
  2094. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2095. {
  2096. int ret = 0;
  2097. struct icnss_ramdump_info *ramdump_info;
  2098. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2099. if (!ramdump_info)
  2100. return ERR_PTR(-ENOMEM);
  2101. if (!dev_name) {
  2102. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2103. return NULL;
  2104. }
  2105. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2106. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2107. if (ramdump_info->minor < 0) {
  2108. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2109. ramdump_info->minor);
  2110. ret = -ENODEV;
  2111. goto fail_out_of_minors;
  2112. }
  2113. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2114. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2115. ramdump_info->minor),
  2116. ramdump_info, ramdump_info->name);
  2117. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2118. ret = PTR_ERR(ramdump_info->dev);
  2119. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2120. ramdump_info->name, ret);
  2121. goto fail_device_create;
  2122. }
  2123. return (void *)ramdump_info;
  2124. fail_device_create:
  2125. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2126. fail_out_of_minors:
  2127. kfree(ramdump_info);
  2128. return ERR_PTR(ret);
  2129. }
  2130. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2131. {
  2132. int ret = 0;
  2133. if (!priv || !priv->pdev) {
  2134. icnss_pr_err("Platform priv or pdev is NULL\n");
  2135. return -EINVAL;
  2136. }
  2137. ret = icnss_ramdump_devnode_init(priv);
  2138. if (ret)
  2139. return ret;
  2140. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2141. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2142. icnss_pr_err("Failed to create msa0 dump device!");
  2143. return -ENOMEM;
  2144. }
  2145. if (priv->device_id == WCN6750_DEVICE_ID ||
  2146. priv->device_id == WCN6450_DEVICE_ID) {
  2147. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2148. ICNSS_M3_SEGMENT(
  2149. ICNSS_M3_SEGMENT_PHYAREG));
  2150. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2151. !priv->m3_dump_phyareg->dev) {
  2152. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2153. return -ENOMEM;
  2154. }
  2155. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2156. ICNSS_M3_SEGMENT(
  2157. ICNSS_M3_SEGMENT_PHYA));
  2158. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2159. !priv->m3_dump_phydbg->dev) {
  2160. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2161. return -ENOMEM;
  2162. }
  2163. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2164. ICNSS_M3_SEGMENT(
  2165. ICNSS_M3_SEGMENT_WMACREG));
  2166. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2167. !priv->m3_dump_wmac0reg->dev) {
  2168. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2169. return -ENOMEM;
  2170. }
  2171. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2172. ICNSS_M3_SEGMENT(
  2173. ICNSS_M3_SEGMENT_WCSSDBG));
  2174. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2175. !priv->m3_dump_wcssdbg->dev) {
  2176. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2177. return -ENOMEM;
  2178. }
  2179. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2180. ICNSS_M3_SEGMENT(
  2181. ICNSS_M3_SEGMENT_PHYAM3));
  2182. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2183. !priv->m3_dump_phyapdmem->dev) {
  2184. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2185. return -ENOMEM;
  2186. }
  2187. }
  2188. return 0;
  2189. }
  2190. static int icnss_enable_recovery(struct icnss_priv *priv)
  2191. {
  2192. int ret;
  2193. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2194. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2195. return 0;
  2196. }
  2197. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2198. icnss_pr_dbg("SSR disabled through module parameter\n");
  2199. goto enable_pdr;
  2200. }
  2201. ret = icnss_register_ramdump_devices(priv);
  2202. if (ret)
  2203. return ret;
  2204. if (priv->wpss_supported) {
  2205. icnss_wpss_early_ssr_register_notifier(priv);
  2206. icnss_wpss_ssr_register_notifier(priv);
  2207. return 0;
  2208. }
  2209. icnss_modem_ssr_register_notifier(priv);
  2210. if (priv->is_slate_rfa)
  2211. icnss_slate_ssr_register_notifier(priv);
  2212. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2213. icnss_pr_dbg("PDR disabled through module parameter\n");
  2214. return 0;
  2215. }
  2216. enable_pdr:
  2217. ret = icnss_pd_restart_enable(priv);
  2218. if (ret)
  2219. return ret;
  2220. return 0;
  2221. }
  2222. static int icnss_dev_id_match(struct icnss_priv *priv,
  2223. struct device_info *dev_info)
  2224. {
  2225. while (dev_info->device_id) {
  2226. if (priv->device_id == dev_info->device_id)
  2227. return 1;
  2228. dev_info++;
  2229. }
  2230. return 0;
  2231. }
  2232. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2233. unsigned long *thermal_state)
  2234. {
  2235. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2236. *thermal_state = icnss_tcdev->max_thermal_state;
  2237. return 0;
  2238. }
  2239. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2240. unsigned long *thermal_state)
  2241. {
  2242. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2243. *thermal_state = icnss_tcdev->curr_thermal_state;
  2244. return 0;
  2245. }
  2246. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2247. unsigned long thermal_state)
  2248. {
  2249. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2250. struct device *dev = &penv->pdev->dev;
  2251. int ret = 0;
  2252. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2253. return 0;
  2254. if (thermal_state > icnss_tcdev->max_thermal_state)
  2255. return -EINVAL;
  2256. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2257. thermal_state, icnss_tcdev->tcdev_id);
  2258. mutex_lock(&penv->tcdev_lock);
  2259. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2260. icnss_tcdev->tcdev_id);
  2261. if (!ret)
  2262. icnss_tcdev->curr_thermal_state = thermal_state;
  2263. mutex_unlock(&penv->tcdev_lock);
  2264. if (ret) {
  2265. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2266. ret, icnss_tcdev->tcdev_id);
  2267. return ret;
  2268. }
  2269. return 0;
  2270. }
  2271. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2272. .get_max_state = icnss_tcdev_get_max_state,
  2273. .get_cur_state = icnss_tcdev_get_cur_state,
  2274. .set_cur_state = icnss_tcdev_set_cur_state,
  2275. };
  2276. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2277. int tcdev_id)
  2278. {
  2279. struct icnss_priv *priv = dev_get_drvdata(dev);
  2280. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2281. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2282. struct device_node *dev_node;
  2283. int ret = 0;
  2284. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2285. if (!icnss_tcdev)
  2286. return -ENOMEM;
  2287. icnss_tcdev->tcdev_id = tcdev_id;
  2288. icnss_tcdev->max_thermal_state = max_state;
  2289. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2290. "qcom,icnss_cdev%d", tcdev_id);
  2291. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2292. if (!dev_node) {
  2293. icnss_pr_err("Failed to get cooling device node\n");
  2294. return -EINVAL;
  2295. }
  2296. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2297. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2298. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2299. dev_node,
  2300. cdev_node_name, icnss_tcdev,
  2301. &icnss_cooling_ops);
  2302. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2303. ret = PTR_ERR(icnss_tcdev->tcdev);
  2304. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2305. ret, icnss_tcdev->tcdev_id);
  2306. } else {
  2307. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2308. icnss_tcdev->tcdev_id);
  2309. list_add(&icnss_tcdev->tcdev_list,
  2310. &priv->icnss_tcdev_list);
  2311. }
  2312. } else {
  2313. icnss_pr_dbg("Cooling device registration not supported");
  2314. ret = -EOPNOTSUPP;
  2315. }
  2316. return ret;
  2317. }
  2318. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2319. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2320. {
  2321. struct icnss_priv *priv = dev_get_drvdata(dev);
  2322. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2323. while (!list_empty(&priv->icnss_tcdev_list)) {
  2324. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2325. struct icnss_thermal_cdev,
  2326. tcdev_list);
  2327. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2328. list_del(&icnss_tcdev->tcdev_list);
  2329. kfree(icnss_tcdev);
  2330. }
  2331. }
  2332. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2333. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2334. unsigned long *thermal_state,
  2335. int tcdev_id)
  2336. {
  2337. struct icnss_priv *priv = dev_get_drvdata(dev);
  2338. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2339. mutex_lock(&priv->tcdev_lock);
  2340. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2341. if (icnss_tcdev->tcdev_id != tcdev_id)
  2342. continue;
  2343. *thermal_state = icnss_tcdev->curr_thermal_state;
  2344. mutex_unlock(&priv->tcdev_lock);
  2345. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2346. icnss_tcdev->curr_thermal_state, tcdev_id);
  2347. return 0;
  2348. }
  2349. mutex_unlock(&priv->tcdev_lock);
  2350. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2351. return -EINVAL;
  2352. }
  2353. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2354. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2355. int cmd_len, void *cb_ctx,
  2356. int (*cb)(void *ctx, void *event, int event_len))
  2357. {
  2358. struct icnss_priv *priv = icnss_get_plat_priv();
  2359. int ret;
  2360. if (!priv)
  2361. return -ENODEV;
  2362. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2363. return -EINVAL;
  2364. priv->get_info_cb = cb;
  2365. priv->get_info_cb_ctx = cb_ctx;
  2366. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2367. if (ret) {
  2368. priv->get_info_cb = NULL;
  2369. priv->get_info_cb_ctx = NULL;
  2370. }
  2371. return ret;
  2372. }
  2373. EXPORT_SYMBOL(icnss_qmi_send);
  2374. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2375. struct module *owner, const char *mod_name)
  2376. {
  2377. int ret = 0;
  2378. struct icnss_priv *priv = icnss_get_plat_priv();
  2379. if (!priv || !priv->pdev) {
  2380. ret = -ENODEV;
  2381. goto out;
  2382. }
  2383. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2384. if (priv->ops) {
  2385. icnss_pr_err("Driver already registered\n");
  2386. ret = -EEXIST;
  2387. goto out;
  2388. }
  2389. if (!ops->dev_info) {
  2390. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2391. return -EINVAL;
  2392. }
  2393. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2394. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2395. ops->dev_info->name);
  2396. return -ENODEV;
  2397. }
  2398. if (!ops->probe || !ops->remove) {
  2399. ret = -EINVAL;
  2400. goto out;
  2401. }
  2402. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2403. 0, ops);
  2404. if (ret == -EINTR)
  2405. ret = 0;
  2406. out:
  2407. return ret;
  2408. }
  2409. EXPORT_SYMBOL(__icnss_register_driver);
  2410. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2411. {
  2412. int ret;
  2413. struct icnss_priv *priv = icnss_get_plat_priv();
  2414. if (!priv || !priv->pdev) {
  2415. ret = -ENODEV;
  2416. goto out;
  2417. }
  2418. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2419. if (!priv->ops) {
  2420. icnss_pr_err("Driver not registered\n");
  2421. ret = -ENOENT;
  2422. goto out;
  2423. }
  2424. ret = icnss_driver_event_post(priv,
  2425. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2426. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2427. out:
  2428. return ret;
  2429. }
  2430. EXPORT_SYMBOL(icnss_unregister_driver);
  2431. static struct icnss_msi_config msi_config_wcn6750 = {
  2432. .total_vectors = 28,
  2433. .total_users = 2,
  2434. .users = (struct icnss_msi_user[]) {
  2435. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2436. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2437. },
  2438. };
  2439. static struct icnss_msi_config msi_config_wcn6450 = {
  2440. .total_vectors = 10,
  2441. .total_users = 1,
  2442. .users = (struct icnss_msi_user[]) {
  2443. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2444. },
  2445. };
  2446. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2447. {
  2448. if (priv->device_id == WCN6750_DEVICE_ID)
  2449. priv->msi_config = &msi_config_wcn6750;
  2450. else
  2451. priv->msi_config = &msi_config_wcn6450;
  2452. return 0;
  2453. }
  2454. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2455. int *num_vectors, u32 *user_base_data,
  2456. u32 *base_vector)
  2457. {
  2458. struct icnss_priv *priv = dev_get_drvdata(dev);
  2459. struct icnss_msi_config *msi_config;
  2460. int idx;
  2461. if (!priv)
  2462. return -ENODEV;
  2463. msi_config = priv->msi_config;
  2464. if (!msi_config) {
  2465. icnss_pr_err("MSI is not supported.\n");
  2466. return -EINVAL;
  2467. }
  2468. for (idx = 0; idx < msi_config->total_users; idx++) {
  2469. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2470. *num_vectors = msi_config->users[idx].num_vectors;
  2471. *user_base_data = msi_config->users[idx].base_vector
  2472. + priv->msi_base_data;
  2473. *base_vector = msi_config->users[idx].base_vector;
  2474. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2475. user_name, *num_vectors, *user_base_data,
  2476. *base_vector);
  2477. return 0;
  2478. }
  2479. }
  2480. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2481. return -EINVAL;
  2482. }
  2483. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2484. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2485. {
  2486. struct icnss_priv *priv = dev_get_drvdata(dev);
  2487. int irq_num;
  2488. irq_num = priv->srng_irqs[vector];
  2489. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2490. irq_num, vector);
  2491. return irq_num;
  2492. }
  2493. EXPORT_SYMBOL(icnss_get_msi_irq);
  2494. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2495. u32 *msi_addr_high)
  2496. {
  2497. struct icnss_priv *priv = dev_get_drvdata(dev);
  2498. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2499. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2500. }
  2501. EXPORT_SYMBOL(icnss_get_msi_address);
  2502. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2503. irqreturn_t (*handler)(int, void *),
  2504. unsigned long flags, const char *name, void *ctx)
  2505. {
  2506. int ret = 0;
  2507. unsigned int irq;
  2508. struct ce_irq_list *irq_entry;
  2509. struct icnss_priv *priv = dev_get_drvdata(dev);
  2510. if (!priv || !priv->pdev) {
  2511. ret = -ENODEV;
  2512. goto out;
  2513. }
  2514. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2515. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2516. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2517. ret = -EINVAL;
  2518. goto out;
  2519. }
  2520. irq = priv->ce_irqs[ce_id];
  2521. irq_entry = &priv->ce_irq_list[ce_id];
  2522. if (irq_entry->handler || irq_entry->irq) {
  2523. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2524. irq, ce_id);
  2525. ret = -EEXIST;
  2526. goto out;
  2527. }
  2528. ret = request_irq(irq, handler, flags, name, ctx);
  2529. if (ret) {
  2530. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2531. irq, ce_id, ret);
  2532. goto out;
  2533. }
  2534. irq_entry->irq = irq;
  2535. irq_entry->handler = handler;
  2536. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2537. penv->stats.ce_irqs[ce_id].request++;
  2538. out:
  2539. return ret;
  2540. }
  2541. EXPORT_SYMBOL(icnss_ce_request_irq);
  2542. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2543. {
  2544. int ret = 0;
  2545. unsigned int irq;
  2546. struct ce_irq_list *irq_entry;
  2547. if (!penv || !penv->pdev || !dev) {
  2548. ret = -ENODEV;
  2549. goto out;
  2550. }
  2551. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2552. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2553. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2554. ret = -EINVAL;
  2555. goto out;
  2556. }
  2557. irq = penv->ce_irqs[ce_id];
  2558. irq_entry = &penv->ce_irq_list[ce_id];
  2559. if (!irq_entry->handler || !irq_entry->irq) {
  2560. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2561. ret = -EEXIST;
  2562. goto out;
  2563. }
  2564. free_irq(irq, ctx);
  2565. irq_entry->irq = 0;
  2566. irq_entry->handler = NULL;
  2567. penv->stats.ce_irqs[ce_id].free++;
  2568. out:
  2569. return ret;
  2570. }
  2571. EXPORT_SYMBOL(icnss_ce_free_irq);
  2572. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2573. {
  2574. unsigned int irq;
  2575. if (!penv || !penv->pdev || !dev) {
  2576. icnss_pr_err("Platform driver not initialized\n");
  2577. return;
  2578. }
  2579. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2580. penv->state);
  2581. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2582. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2583. return;
  2584. }
  2585. penv->stats.ce_irqs[ce_id].enable++;
  2586. irq = penv->ce_irqs[ce_id];
  2587. enable_irq(irq);
  2588. }
  2589. EXPORT_SYMBOL(icnss_enable_irq);
  2590. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2591. {
  2592. unsigned int irq;
  2593. if (!penv || !penv->pdev || !dev) {
  2594. icnss_pr_err("Platform driver not initialized\n");
  2595. return;
  2596. }
  2597. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2598. penv->state);
  2599. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2600. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2601. ce_id);
  2602. return;
  2603. }
  2604. irq = penv->ce_irqs[ce_id];
  2605. disable_irq(irq);
  2606. penv->stats.ce_irqs[ce_id].disable++;
  2607. }
  2608. EXPORT_SYMBOL(icnss_disable_irq);
  2609. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2610. {
  2611. char *fw_build_timestamp = NULL;
  2612. struct icnss_priv *priv = dev_get_drvdata(dev);
  2613. if (!priv) {
  2614. icnss_pr_err("Platform driver not initialized\n");
  2615. return -EINVAL;
  2616. }
  2617. info->v_addr = priv->mem_base_va;
  2618. info->p_addr = priv->mem_base_pa;
  2619. info->chip_id = priv->chip_info.chip_id;
  2620. info->chip_family = priv->chip_info.chip_family;
  2621. info->board_id = priv->board_id;
  2622. info->soc_id = priv->soc_id;
  2623. info->fw_version = priv->fw_version_info.fw_version;
  2624. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2625. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2626. strlcpy(info->fw_build_timestamp,
  2627. priv->fw_version_info.fw_build_timestamp,
  2628. WLFW_MAX_TIMESTAMP_LEN + 1);
  2629. strlcpy(info->fw_build_id, priv->fw_build_id,
  2630. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2631. return 0;
  2632. }
  2633. EXPORT_SYMBOL(icnss_get_soc_info);
  2634. int icnss_get_mhi_state(struct device *dev)
  2635. {
  2636. struct icnss_priv *priv = dev_get_drvdata(dev);
  2637. if (!priv) {
  2638. icnss_pr_err("Platform driver not initialized\n");
  2639. return -EINVAL;
  2640. }
  2641. if (!priv->mhi_state_info_va)
  2642. return -ENOMEM;
  2643. return ioread32(priv->mhi_state_info_va);
  2644. }
  2645. EXPORT_SYMBOL(icnss_get_mhi_state);
  2646. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2647. {
  2648. int ret;
  2649. struct icnss_priv *priv;
  2650. if (!dev)
  2651. return -ENODEV;
  2652. priv = dev_get_drvdata(dev);
  2653. if (!priv) {
  2654. icnss_pr_err("Platform driver not initialized\n");
  2655. return -EINVAL;
  2656. }
  2657. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2658. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2659. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2660. priv->state);
  2661. return -EINVAL;
  2662. }
  2663. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2664. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2665. if (ret)
  2666. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2667. ret, fw_log_mode);
  2668. return ret;
  2669. }
  2670. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2671. int icnss_force_wake_request(struct device *dev)
  2672. {
  2673. struct icnss_priv *priv;
  2674. if (!dev)
  2675. return -ENODEV;
  2676. priv = dev_get_drvdata(dev);
  2677. if (!priv) {
  2678. icnss_pr_err("Platform driver not initialized\n");
  2679. return -EINVAL;
  2680. }
  2681. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2682. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2683. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2684. priv->state);
  2685. return -EINVAL;
  2686. }
  2687. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2688. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2689. atomic_read(&priv->soc_wake_ref_count));
  2690. return 0;
  2691. }
  2692. icnss_pr_soc_wake("Calling SOC Wake request");
  2693. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2694. 0, NULL);
  2695. return 0;
  2696. }
  2697. EXPORT_SYMBOL(icnss_force_wake_request);
  2698. int icnss_force_wake_release(struct device *dev)
  2699. {
  2700. struct icnss_priv *priv;
  2701. if (!dev)
  2702. return -ENODEV;
  2703. priv = dev_get_drvdata(dev);
  2704. if (!priv) {
  2705. icnss_pr_err("Platform driver not initialized\n");
  2706. return -EINVAL;
  2707. }
  2708. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2709. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2710. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2711. priv->state);
  2712. return -EINVAL;
  2713. }
  2714. icnss_pr_soc_wake("Calling SOC Wake response");
  2715. if (atomic_read(&priv->soc_wake_ref_count) &&
  2716. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2717. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2718. atomic_read(&priv->soc_wake_ref_count));
  2719. return 0;
  2720. }
  2721. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2722. 0, NULL);
  2723. return 0;
  2724. }
  2725. EXPORT_SYMBOL(icnss_force_wake_release);
  2726. int icnss_is_device_awake(struct device *dev)
  2727. {
  2728. struct icnss_priv *priv = dev_get_drvdata(dev);
  2729. if (!priv) {
  2730. icnss_pr_err("Platform driver not initialized\n");
  2731. return -EINVAL;
  2732. }
  2733. return atomic_read(&priv->soc_wake_ref_count);
  2734. }
  2735. EXPORT_SYMBOL(icnss_is_device_awake);
  2736. int icnss_is_pci_ep_awake(struct device *dev)
  2737. {
  2738. struct icnss_priv *priv = dev_get_drvdata(dev);
  2739. if (!priv) {
  2740. icnss_pr_err("Platform driver not initialized\n");
  2741. return -EINVAL;
  2742. }
  2743. if (!priv->mhi_state_info_va)
  2744. return -ENOMEM;
  2745. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2746. }
  2747. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2748. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2749. uint32_t mem_type, uint32_t data_len,
  2750. uint8_t *output)
  2751. {
  2752. int ret = 0;
  2753. struct icnss_priv *priv = dev_get_drvdata(dev);
  2754. if (priv->magic != ICNSS_MAGIC) {
  2755. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2756. dev, priv, priv->magic);
  2757. return -EINVAL;
  2758. }
  2759. if (!output || data_len == 0
  2760. || data_len > WLFW_MAX_DATA_SIZE) {
  2761. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2762. output, data_len);
  2763. ret = -EINVAL;
  2764. goto out;
  2765. }
  2766. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2767. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2768. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2769. priv->state);
  2770. ret = -EINVAL;
  2771. goto out;
  2772. }
  2773. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2774. data_len, output);
  2775. out:
  2776. return ret;
  2777. }
  2778. EXPORT_SYMBOL(icnss_athdiag_read);
  2779. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2780. uint32_t mem_type, uint32_t data_len,
  2781. uint8_t *input)
  2782. {
  2783. int ret = 0;
  2784. struct icnss_priv *priv = dev_get_drvdata(dev);
  2785. if (priv->magic != ICNSS_MAGIC) {
  2786. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2787. dev, priv, priv->magic);
  2788. return -EINVAL;
  2789. }
  2790. if (!input || data_len == 0
  2791. || data_len > WLFW_MAX_DATA_SIZE) {
  2792. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2793. input, data_len);
  2794. ret = -EINVAL;
  2795. goto out;
  2796. }
  2797. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2798. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2799. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2800. priv->state);
  2801. ret = -EINVAL;
  2802. goto out;
  2803. }
  2804. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2805. data_len, input);
  2806. out:
  2807. return ret;
  2808. }
  2809. EXPORT_SYMBOL(icnss_athdiag_write);
  2810. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2811. enum icnss_driver_mode mode,
  2812. const char *host_version)
  2813. {
  2814. struct icnss_priv *priv = dev_get_drvdata(dev);
  2815. int temp = 0, ret = 0;
  2816. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2817. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2818. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2819. priv->state);
  2820. return -EINVAL;
  2821. }
  2822. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2823. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2824. priv->state);
  2825. return -EINVAL;
  2826. }
  2827. if (priv->wpss_supported &&
  2828. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2829. icnss_setup_dms_mac(priv);
  2830. if (priv->device_id == WCN6750_DEVICE_ID) {
  2831. if (!icnss_get_temperature(priv, &temp)) {
  2832. icnss_pr_dbg("Temperature: %d\n", temp);
  2833. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2834. icnss_set_wlan_en_delay(priv);
  2835. }
  2836. }
  2837. if (priv->device_id == WCN6450_DEVICE_ID)
  2838. icnss_hw_power_off(priv);
  2839. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2840. if (priv->device_id == WCN6450_DEVICE_ID)
  2841. icnss_hw_power_on(priv);
  2842. return ret;
  2843. }
  2844. EXPORT_SYMBOL(icnss_wlan_enable);
  2845. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2846. {
  2847. struct icnss_priv *priv = dev_get_drvdata(dev);
  2848. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2849. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2850. priv->state);
  2851. return 0;
  2852. }
  2853. return icnss_send_wlan_disable_to_fw(priv);
  2854. }
  2855. EXPORT_SYMBOL(icnss_wlan_disable);
  2856. bool icnss_is_qmi_disable(struct device *dev)
  2857. {
  2858. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2859. }
  2860. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2861. int icnss_get_ce_id(struct device *dev, int irq)
  2862. {
  2863. int i;
  2864. if (!penv || !penv->pdev || !dev)
  2865. return -ENODEV;
  2866. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2867. if (penv->ce_irqs[i] == irq)
  2868. return i;
  2869. }
  2870. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2871. return -EINVAL;
  2872. }
  2873. EXPORT_SYMBOL(icnss_get_ce_id);
  2874. int icnss_get_irq(struct device *dev, int ce_id)
  2875. {
  2876. int irq;
  2877. if (!penv || !penv->pdev || !dev)
  2878. return -ENODEV;
  2879. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2880. return -EINVAL;
  2881. irq = penv->ce_irqs[ce_id];
  2882. return irq;
  2883. }
  2884. EXPORT_SYMBOL(icnss_get_irq);
  2885. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2886. {
  2887. struct icnss_priv *priv = dev_get_drvdata(dev);
  2888. if (!priv) {
  2889. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2890. return NULL;
  2891. }
  2892. return priv->iommu_domain;
  2893. }
  2894. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2895. int icnss_smmu_map(struct device *dev,
  2896. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2897. {
  2898. struct icnss_priv *priv = dev_get_drvdata(dev);
  2899. int flag = IOMMU_READ | IOMMU_WRITE;
  2900. bool dma_coherent = false;
  2901. unsigned long iova;
  2902. int prop_len = 0;
  2903. size_t len;
  2904. int ret = 0;
  2905. if (!priv) {
  2906. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2907. dev, priv);
  2908. return -EINVAL;
  2909. }
  2910. if (!iova_addr) {
  2911. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2912. &paddr, size);
  2913. return -EINVAL;
  2914. }
  2915. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2916. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2917. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2918. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2919. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2920. iova,
  2921. &priv->smmu_iova_ipa_start,
  2922. priv->smmu_iova_ipa_len);
  2923. return -ENOMEM;
  2924. }
  2925. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2926. icnss_pr_dbg("dma-coherent is %s\n",
  2927. dma_coherent ? "enabled" : "disabled");
  2928. if (dma_coherent)
  2929. flag |= IOMMU_CACHE;
  2930. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2931. ret = iommu_map(priv->iommu_domain, iova,
  2932. rounddown(paddr, PAGE_SIZE), len,
  2933. flag);
  2934. if (ret) {
  2935. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2936. return ret;
  2937. }
  2938. priv->smmu_iova_ipa_current = iova + len;
  2939. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2940. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2941. return 0;
  2942. }
  2943. EXPORT_SYMBOL(icnss_smmu_map);
  2944. int icnss_smmu_unmap(struct device *dev,
  2945. uint32_t iova_addr, size_t size)
  2946. {
  2947. struct icnss_priv *priv = dev_get_drvdata(dev);
  2948. unsigned long iova;
  2949. size_t len, unmapped_len;
  2950. if (!priv) {
  2951. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2952. dev, priv);
  2953. return -EINVAL;
  2954. }
  2955. if (!iova_addr) {
  2956. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2957. size);
  2958. return -EINVAL;
  2959. }
  2960. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2961. PAGE_SIZE);
  2962. iova = rounddown(iova_addr, PAGE_SIZE);
  2963. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2964. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2965. iova,
  2966. &priv->smmu_iova_ipa_start,
  2967. priv->smmu_iova_ipa_len);
  2968. return -ENOMEM;
  2969. }
  2970. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2971. iova, len);
  2972. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2973. if (unmapped_len != len) {
  2974. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2975. return -EINVAL;
  2976. }
  2977. priv->smmu_iova_ipa_current = iova;
  2978. return 0;
  2979. }
  2980. EXPORT_SYMBOL(icnss_smmu_unmap);
  2981. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2982. {
  2983. return socinfo_get_serial_number();
  2984. }
  2985. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2986. int icnss_trigger_recovery(struct device *dev)
  2987. {
  2988. int ret = 0;
  2989. struct icnss_priv *priv = dev_get_drvdata(dev);
  2990. if (priv->magic != ICNSS_MAGIC) {
  2991. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2992. ret = -EINVAL;
  2993. goto out;
  2994. }
  2995. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2996. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2997. priv->state);
  2998. ret = -EPERM;
  2999. goto out;
  3000. }
  3001. if (priv->wpss_supported) {
  3002. icnss_pr_vdbg("Initiate Root PD restart");
  3003. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3004. ICNSS_SMP2P_OUT_POWER_SAVE);
  3005. if (!ret)
  3006. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3007. return ret;
  3008. }
  3009. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3010. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3011. priv->state);
  3012. ret = -EOPNOTSUPP;
  3013. goto out;
  3014. }
  3015. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3016. priv->state);
  3017. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3018. if (!ret)
  3019. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3020. out:
  3021. return ret;
  3022. }
  3023. EXPORT_SYMBOL(icnss_trigger_recovery);
  3024. int icnss_idle_shutdown(struct device *dev)
  3025. {
  3026. struct icnss_priv *priv = dev_get_drvdata(dev);
  3027. if (!priv) {
  3028. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3029. return -EINVAL;
  3030. }
  3031. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3032. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3033. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3034. return -EBUSY;
  3035. }
  3036. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3037. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3038. }
  3039. EXPORT_SYMBOL(icnss_idle_shutdown);
  3040. int icnss_idle_restart(struct device *dev)
  3041. {
  3042. struct icnss_priv *priv = dev_get_drvdata(dev);
  3043. if (!priv) {
  3044. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3045. return -EINVAL;
  3046. }
  3047. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3048. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3049. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3050. return -EBUSY;
  3051. }
  3052. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3053. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3054. }
  3055. EXPORT_SYMBOL(icnss_idle_restart);
  3056. int icnss_exit_power_save(struct device *dev)
  3057. {
  3058. struct icnss_priv *priv = dev_get_drvdata(dev);
  3059. icnss_pr_vdbg("Calling Exit Power Save\n");
  3060. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3061. !test_bit(ICNSS_MODE_ON, &priv->state))
  3062. return 0;
  3063. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3064. ICNSS_SMP2P_OUT_POWER_SAVE);
  3065. }
  3066. EXPORT_SYMBOL(icnss_exit_power_save);
  3067. int icnss_prevent_l1(struct device *dev)
  3068. {
  3069. struct icnss_priv *priv = dev_get_drvdata(dev);
  3070. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3071. !test_bit(ICNSS_MODE_ON, &priv->state))
  3072. return 0;
  3073. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3074. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3075. }
  3076. EXPORT_SYMBOL(icnss_prevent_l1);
  3077. void icnss_allow_l1(struct device *dev)
  3078. {
  3079. struct icnss_priv *priv = dev_get_drvdata(dev);
  3080. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3081. !test_bit(ICNSS_MODE_ON, &priv->state))
  3082. return;
  3083. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3084. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3085. }
  3086. EXPORT_SYMBOL(icnss_allow_l1);
  3087. void icnss_allow_recursive_recovery(struct device *dev)
  3088. {
  3089. struct icnss_priv *priv = dev_get_drvdata(dev);
  3090. priv->allow_recursive_recovery = true;
  3091. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3092. }
  3093. void icnss_disallow_recursive_recovery(struct device *dev)
  3094. {
  3095. struct icnss_priv *priv = dev_get_drvdata(dev);
  3096. priv->allow_recursive_recovery = false;
  3097. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3098. }
  3099. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3100. {
  3101. struct kobject *icnss_kobject;
  3102. int ret = 0;
  3103. atomic_set(&priv->is_shutdown, false);
  3104. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3105. if (!icnss_kobject) {
  3106. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3107. return -EINVAL;
  3108. }
  3109. priv->icnss_kobject = icnss_kobject;
  3110. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3111. if (ret) {
  3112. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3113. return ret;
  3114. }
  3115. return ret;
  3116. }
  3117. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3118. {
  3119. struct kobject *icnss_kobject;
  3120. icnss_kobject = priv->icnss_kobject;
  3121. if (icnss_kobject)
  3122. kobject_put(icnss_kobject);
  3123. }
  3124. static ssize_t qdss_tr_start_store(struct device *dev,
  3125. struct device_attribute *attr,
  3126. const char *buf, size_t count)
  3127. {
  3128. struct icnss_priv *priv = dev_get_drvdata(dev);
  3129. wlfw_qdss_trace_start(priv);
  3130. icnss_pr_dbg("Received QDSS start command\n");
  3131. return count;
  3132. }
  3133. static ssize_t qdss_tr_stop_store(struct device *dev,
  3134. struct device_attribute *attr,
  3135. const char *user_buf, size_t count)
  3136. {
  3137. struct icnss_priv *priv = dev_get_drvdata(dev);
  3138. u32 option = 0;
  3139. if (sscanf(user_buf, "%du", &option) != 1)
  3140. return -EINVAL;
  3141. wlfw_qdss_trace_stop(priv, option);
  3142. icnss_pr_dbg("Received QDSS stop command\n");
  3143. return count;
  3144. }
  3145. static ssize_t qdss_conf_download_store(struct device *dev,
  3146. struct device_attribute *attr,
  3147. const char *buf, size_t count)
  3148. {
  3149. struct icnss_priv *priv = dev_get_drvdata(dev);
  3150. icnss_wlfw_qdss_dnld_send_sync(priv);
  3151. icnss_pr_dbg("Received QDSS download config command\n");
  3152. return count;
  3153. }
  3154. static ssize_t hw_trc_override_store(struct device *dev,
  3155. struct device_attribute *attr,
  3156. const char *buf, size_t count)
  3157. {
  3158. struct icnss_priv *priv = dev_get_drvdata(dev);
  3159. int tmp = 0;
  3160. if (sscanf(buf, "%du", &tmp) != 1)
  3161. return -EINVAL;
  3162. priv->hw_trc_override = tmp;
  3163. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3164. return count;
  3165. }
  3166. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3167. {
  3168. struct icnss_priv *priv = icnss_get_plat_priv();
  3169. phandle rproc_phandle;
  3170. int ret;
  3171. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3172. &rproc_phandle)) {
  3173. icnss_pr_err("error reading rproc phandle\n");
  3174. return;
  3175. }
  3176. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3177. if (IS_ERR_OR_NULL(priv->rproc)) {
  3178. icnss_pr_err("rproc not found");
  3179. return;
  3180. }
  3181. ret = rproc_boot(priv->rproc);
  3182. if (ret) {
  3183. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3184. rproc_put(priv->rproc);
  3185. }
  3186. }
  3187. static ssize_t wpss_boot_store(struct device *dev,
  3188. struct device_attribute *attr,
  3189. const char *buf, size_t count)
  3190. {
  3191. struct icnss_priv *priv = dev_get_drvdata(dev);
  3192. int wpss_rproc = 0;
  3193. if (!priv->wpss_supported)
  3194. return count;
  3195. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3196. icnss_pr_err("Failed to read wpss rproc info");
  3197. return -EINVAL;
  3198. }
  3199. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3200. if (wpss_rproc == 1)
  3201. schedule_work(&wpss_loader);
  3202. else if (wpss_rproc == 0)
  3203. icnss_wpss_unload(priv);
  3204. return count;
  3205. }
  3206. static ssize_t wlan_en_delay_store(struct device *dev,
  3207. struct device_attribute *attr,
  3208. const char *buf, size_t count)
  3209. {
  3210. struct icnss_priv *priv = dev_get_drvdata(dev);
  3211. uint32_t wlan_en_delay = 0;
  3212. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3213. return count;
  3214. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3215. icnss_pr_err("Failed to read wlan_en_delay");
  3216. return -EINVAL;
  3217. }
  3218. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3219. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3220. return count;
  3221. }
  3222. static DEVICE_ATTR_WO(qdss_tr_start);
  3223. static DEVICE_ATTR_WO(qdss_tr_stop);
  3224. static DEVICE_ATTR_WO(qdss_conf_download);
  3225. static DEVICE_ATTR_WO(hw_trc_override);
  3226. static DEVICE_ATTR_WO(wpss_boot);
  3227. static DEVICE_ATTR_WO(wlan_en_delay);
  3228. static struct attribute *icnss_attrs[] = {
  3229. &dev_attr_qdss_tr_start.attr,
  3230. &dev_attr_qdss_tr_stop.attr,
  3231. &dev_attr_qdss_conf_download.attr,
  3232. &dev_attr_hw_trc_override.attr,
  3233. &dev_attr_wpss_boot.attr,
  3234. &dev_attr_wlan_en_delay.attr,
  3235. NULL,
  3236. };
  3237. static struct attribute_group icnss_attr_group = {
  3238. .attrs = icnss_attrs,
  3239. };
  3240. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3241. {
  3242. struct device *dev = &priv->pdev->dev;
  3243. int ret;
  3244. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3245. if (ret) {
  3246. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3247. ret);
  3248. goto out;
  3249. }
  3250. return 0;
  3251. out:
  3252. return ret;
  3253. }
  3254. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3255. {
  3256. sysfs_remove_link(kernel_kobj, "icnss");
  3257. }
  3258. static int icnss_sysfs_create(struct icnss_priv *priv)
  3259. {
  3260. int ret = 0;
  3261. ret = devm_device_add_group(&priv->pdev->dev,
  3262. &icnss_attr_group);
  3263. if (ret) {
  3264. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3265. ret);
  3266. goto out;
  3267. }
  3268. icnss_create_sysfs_link(priv);
  3269. ret = icnss_create_shutdown_sysfs(priv);
  3270. if (ret)
  3271. goto remove_icnss_group;
  3272. return 0;
  3273. remove_icnss_group:
  3274. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3275. out:
  3276. return ret;
  3277. }
  3278. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3279. {
  3280. icnss_destroy_shutdown_sysfs(priv);
  3281. icnss_remove_sysfs_link(priv);
  3282. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3283. }
  3284. static int icnss_resource_parse(struct icnss_priv *priv)
  3285. {
  3286. int ret = 0, i = 0;
  3287. struct platform_device *pdev = priv->pdev;
  3288. struct device *dev = &pdev->dev;
  3289. struct resource *res;
  3290. u32 int_prop;
  3291. ret = icnss_get_vreg(priv);
  3292. if (ret) {
  3293. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3294. goto out;
  3295. }
  3296. ret = icnss_get_clk(priv);
  3297. if (ret) {
  3298. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3299. goto put_vreg;
  3300. }
  3301. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3302. ret = icnss_get_psf_info(priv);
  3303. if (ret < 0)
  3304. goto out;
  3305. priv->psf_supported = true;
  3306. }
  3307. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3308. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3309. "membase");
  3310. if (!res) {
  3311. icnss_pr_err("Memory base not found in DT\n");
  3312. ret = -EINVAL;
  3313. goto put_clk;
  3314. }
  3315. priv->mem_base_pa = res->start;
  3316. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3317. resource_size(res));
  3318. if (!priv->mem_base_va) {
  3319. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3320. &priv->mem_base_pa);
  3321. ret = -EINVAL;
  3322. goto put_clk;
  3323. }
  3324. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3325. &priv->mem_base_pa,
  3326. priv->mem_base_va);
  3327. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3328. res = platform_get_resource(priv->pdev,
  3329. IORESOURCE_IRQ, i);
  3330. if (!res) {
  3331. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3332. ret = -ENODEV;
  3333. goto put_clk;
  3334. } else {
  3335. priv->ce_irqs[i] = res->start;
  3336. }
  3337. }
  3338. if (of_property_read_bool(pdev->dev.of_node,
  3339. "qcom,is_low_power")) {
  3340. priv->low_power_support = true;
  3341. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3342. }
  3343. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3344. &priv->rf_subtype) == 0) {
  3345. priv->is_rf_subtype_valid = true;
  3346. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3347. }
  3348. if (of_property_read_bool(pdev->dev.of_node,
  3349. "qcom,is_slate_rfa")) {
  3350. priv->is_slate_rfa = true;
  3351. icnss_pr_err("SLATE rfa is enabled\n");
  3352. }
  3353. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3354. priv->device_id == WCN6450_DEVICE_ID) {
  3355. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3356. "msi_addr");
  3357. if (!res) {
  3358. icnss_pr_err("MSI address not found in DT\n");
  3359. ret = -EINVAL;
  3360. goto put_clk;
  3361. }
  3362. priv->msi_addr_pa = res->start;
  3363. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3364. PAGE_SIZE,
  3365. DMA_FROM_DEVICE, 0);
  3366. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3367. icnss_pr_err("MSI: failed to map msi address\n");
  3368. priv->msi_addr_iova = 0;
  3369. ret = -ENOMEM;
  3370. goto put_clk;
  3371. }
  3372. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3373. &priv->msi_addr_pa,
  3374. priv->msi_addr_iova);
  3375. ret = of_property_read_u32_index(dev->of_node,
  3376. "interrupts",
  3377. 1,
  3378. &int_prop);
  3379. if (ret) {
  3380. icnss_pr_dbg("Read interrupt prop failed");
  3381. goto put_clk;
  3382. }
  3383. priv->msi_base_data = int_prop + 32;
  3384. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3385. priv->msi_base_data, int_prop);
  3386. icnss_get_msi_assignment(priv);
  3387. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3388. res = platform_get_resource(priv->pdev,
  3389. IORESOURCE_IRQ, i);
  3390. if (!res) {
  3391. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3392. ret = -ENODEV;
  3393. goto put_clk;
  3394. } else {
  3395. priv->srng_irqs[i] = res->start;
  3396. }
  3397. }
  3398. }
  3399. return 0;
  3400. put_clk:
  3401. icnss_put_clk(priv);
  3402. put_vreg:
  3403. icnss_put_vreg(priv);
  3404. out:
  3405. return ret;
  3406. }
  3407. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3408. {
  3409. int ret = 0;
  3410. struct platform_device *pdev = priv->pdev;
  3411. struct device *dev = &pdev->dev;
  3412. struct device_node *np = NULL;
  3413. u64 prop_size = 0;
  3414. const __be32 *addrp = NULL;
  3415. np = of_parse_phandle(dev->of_node,
  3416. "qcom,wlan-msa-fixed-region", 0);
  3417. if (np) {
  3418. addrp = of_get_address(np, 0, &prop_size, NULL);
  3419. if (!addrp) {
  3420. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3421. ret = -EINVAL;
  3422. of_node_put(np);
  3423. goto out;
  3424. }
  3425. priv->msa_pa = of_translate_address(np, addrp);
  3426. if (priv->msa_pa == OF_BAD_ADDR) {
  3427. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3428. ret = -EINVAL;
  3429. of_node_put(np);
  3430. goto out;
  3431. }
  3432. of_node_put(np);
  3433. priv->msa_va = memremap(priv->msa_pa,
  3434. (unsigned long)prop_size, MEMREMAP_WT);
  3435. if (!priv->msa_va) {
  3436. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3437. &priv->msa_pa);
  3438. ret = -EINVAL;
  3439. goto out;
  3440. }
  3441. priv->msa_mem_size = prop_size;
  3442. } else {
  3443. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3444. &priv->msa_mem_size);
  3445. if (ret || priv->msa_mem_size == 0) {
  3446. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3447. priv->msa_mem_size, ret);
  3448. goto out;
  3449. }
  3450. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3451. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3452. if (!priv->msa_va) {
  3453. icnss_pr_err("DMA alloc failed for MSA\n");
  3454. ret = -ENOMEM;
  3455. goto out;
  3456. }
  3457. }
  3458. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3459. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3460. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3461. "qcom,fw-prefix");
  3462. return 0;
  3463. out:
  3464. return ret;
  3465. }
  3466. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3467. struct device *dev, unsigned long iova,
  3468. int flags, void *handler_token)
  3469. {
  3470. struct icnss_priv *priv = handler_token;
  3471. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3472. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3473. if (!priv) {
  3474. icnss_pr_err("priv is NULL\n");
  3475. return -ENODEV;
  3476. }
  3477. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3478. fw_down_data.crashed = true;
  3479. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3480. &fw_down_data);
  3481. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3482. &fw_down_data);
  3483. }
  3484. icnss_trigger_recovery(&priv->pdev->dev);
  3485. /* IOMMU driver requires non-zero return value to print debug info. */
  3486. return -EINVAL;
  3487. }
  3488. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3489. {
  3490. int ret = 0;
  3491. struct platform_device *pdev = priv->pdev;
  3492. struct device *dev = &pdev->dev;
  3493. const char *iommu_dma_type;
  3494. struct resource *res;
  3495. u32 addr_win[2];
  3496. ret = of_property_read_u32_array(dev->of_node,
  3497. "qcom,iommu-dma-addr-pool",
  3498. addr_win,
  3499. ARRAY_SIZE(addr_win));
  3500. if (ret) {
  3501. icnss_pr_err("SMMU IOVA base not found\n");
  3502. } else {
  3503. priv->smmu_iova_start = addr_win[0];
  3504. priv->smmu_iova_len = addr_win[1];
  3505. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3506. &priv->smmu_iova_start,
  3507. priv->smmu_iova_len);
  3508. priv->iommu_domain =
  3509. iommu_get_domain_for_dev(&pdev->dev);
  3510. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3511. &iommu_dma_type);
  3512. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3513. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3514. priv->smmu_s1_enable = true;
  3515. if (priv->device_id == WCN6750_DEVICE_ID ||
  3516. priv->device_id == WCN6450_DEVICE_ID)
  3517. iommu_set_fault_handler(priv->iommu_domain,
  3518. icnss_smmu_fault_handler,
  3519. priv);
  3520. }
  3521. res = platform_get_resource_byname(pdev,
  3522. IORESOURCE_MEM,
  3523. "smmu_iova_ipa");
  3524. if (!res) {
  3525. icnss_pr_err("SMMU IOVA IPA not found\n");
  3526. } else {
  3527. priv->smmu_iova_ipa_start = res->start;
  3528. priv->smmu_iova_ipa_current = res->start;
  3529. priv->smmu_iova_ipa_len = resource_size(res);
  3530. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3531. &priv->smmu_iova_ipa_start,
  3532. priv->smmu_iova_ipa_len);
  3533. }
  3534. }
  3535. return 0;
  3536. }
  3537. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3538. {
  3539. if (!priv)
  3540. return -ENODEV;
  3541. if (!priv->smmu_iova_len)
  3542. return -EINVAL;
  3543. *addr = priv->smmu_iova_start;
  3544. *size = priv->smmu_iova_len;
  3545. return 0;
  3546. }
  3547. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3548. {
  3549. if (!priv)
  3550. return -ENODEV;
  3551. if (!priv->smmu_iova_ipa_len)
  3552. return -EINVAL;
  3553. *addr = priv->smmu_iova_ipa_start;
  3554. *size = priv->smmu_iova_ipa_len;
  3555. return 0;
  3556. }
  3557. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3558. char *name)
  3559. {
  3560. if (!priv)
  3561. return;
  3562. if (!priv->use_prefix_path) {
  3563. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3564. return;
  3565. }
  3566. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3567. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3568. ADRASTEA_PATH_PREFIX "%s", name);
  3569. else if (priv->device_id == WCN6750_DEVICE_ID)
  3570. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3571. QCA6750_PATH_PREFIX "%s", name);
  3572. else if (priv->device_id == WCN6450_DEVICE_ID)
  3573. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3574. WCN6450_PATH_PREFIX "%s", name);
  3575. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3576. }
  3577. static const struct platform_device_id icnss_platform_id_table[] = {
  3578. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3579. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3580. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3581. { },
  3582. };
  3583. static const struct of_device_id icnss_dt_match[] = {
  3584. {
  3585. .compatible = "qcom,wcn6750",
  3586. .data = (void *)&icnss_platform_id_table[0]},
  3587. {
  3588. .compatible = "qcom,icnss",
  3589. .data = (void *)&icnss_platform_id_table[1]},
  3590. {
  3591. .compatible = "qcom,wcn6450",
  3592. .data = (void *)&icnss_platform_id_table[2]},
  3593. { },
  3594. };
  3595. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3596. static void icnss_init_control_params(struct icnss_priv *priv)
  3597. {
  3598. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3599. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3600. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3601. if (priv->device_id == WCN6750_DEVICE_ID ||
  3602. of_property_read_bool(priv->pdev->dev.of_node,
  3603. "wpss-support-enable"))
  3604. priv->wpss_supported = true;
  3605. if (of_property_read_bool(priv->pdev->dev.of_node,
  3606. "bdf-download-support"))
  3607. priv->bdf_download_support = true;
  3608. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3609. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3610. }
  3611. static void icnss_read_device_configs(struct icnss_priv *priv)
  3612. {
  3613. if (of_property_read_bool(priv->pdev->dev.of_node,
  3614. "wlan-ipa-disabled")) {
  3615. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3616. }
  3617. if (of_property_read_bool(priv->pdev->dev.of_node,
  3618. "qcom,wpss-self-recovery"))
  3619. priv->wpss_self_recovery_enabled = true;
  3620. }
  3621. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3622. {
  3623. pm_runtime_get_sync(&priv->pdev->dev);
  3624. pm_runtime_forbid(&priv->pdev->dev);
  3625. pm_runtime_set_active(&priv->pdev->dev);
  3626. pm_runtime_enable(&priv->pdev->dev);
  3627. }
  3628. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3629. {
  3630. pm_runtime_disable(&priv->pdev->dev);
  3631. pm_runtime_allow(&priv->pdev->dev);
  3632. pm_runtime_put_sync(&priv->pdev->dev);
  3633. }
  3634. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3635. {
  3636. return of_property_read_bool(priv->pdev->dev.of_node,
  3637. "use-nv-mac");
  3638. }
  3639. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3640. {
  3641. struct icnss_subsys_restart_level_data *restart_level_data;
  3642. icnss_pr_info("rproc name: %s recovery disable: %d",
  3643. rproc->name, rproc->recovery_disabled);
  3644. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3645. if (!restart_level_data)
  3646. return;
  3647. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3648. if (rproc->recovery_disabled)
  3649. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3650. else
  3651. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3652. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3653. 0, restart_level_data);
  3654. }
  3655. }
  3656. #ifdef CONFIG_WCNSS_MEM_PRE_ALLOC
  3657. static void icnss_initialize_mem_pool(unsigned long device_id)
  3658. {
  3659. cnss_initialize_prealloc_pool(device_id);
  3660. }
  3661. static void icnss_deinitialize_mem_pool(void)
  3662. {
  3663. cnss_deinitialize_prealloc_pool();
  3664. }
  3665. #else
  3666. static void icnss_initialize_mem_pool(unsigned long device_id)
  3667. {
  3668. }
  3669. static void icnss_deinitialize_mem_pool(void)
  3670. {
  3671. }
  3672. #endif
  3673. static int icnss_probe(struct platform_device *pdev)
  3674. {
  3675. int ret = 0;
  3676. struct device *dev = &pdev->dev;
  3677. struct icnss_priv *priv;
  3678. const struct of_device_id *of_id;
  3679. const struct platform_device_id *device_id;
  3680. if (dev_get_drvdata(dev)) {
  3681. icnss_pr_err("Driver is already initialized\n");
  3682. return -EEXIST;
  3683. }
  3684. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3685. if (!of_id || !of_id->data) {
  3686. icnss_pr_err("Failed to find of match device!\n");
  3687. ret = -ENODEV;
  3688. goto out_reset_drvdata;
  3689. }
  3690. device_id = of_id->data;
  3691. icnss_pr_dbg("Platform driver probe\n");
  3692. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3693. if (!priv)
  3694. return -ENOMEM;
  3695. priv->magic = ICNSS_MAGIC;
  3696. dev_set_drvdata(dev, priv);
  3697. priv->pdev = pdev;
  3698. priv->device_id = device_id->driver_data;
  3699. priv->is_chain1_supported = true;
  3700. INIT_LIST_HEAD(&priv->vreg_list);
  3701. INIT_LIST_HEAD(&priv->clk_list);
  3702. icnss_allow_recursive_recovery(dev);
  3703. icnss_initialize_mem_pool(priv->device_id);
  3704. icnss_init_control_params(priv);
  3705. icnss_read_device_configs(priv);
  3706. ret = icnss_resource_parse(priv);
  3707. if (ret)
  3708. goto out_reset_drvdata;
  3709. ret = icnss_msa_dt_parse(priv);
  3710. if (ret)
  3711. goto out_free_resources;
  3712. ret = icnss_smmu_dt_parse(priv);
  3713. if (ret)
  3714. goto out_free_resources;
  3715. spin_lock_init(&priv->event_lock);
  3716. spin_lock_init(&priv->on_off_lock);
  3717. spin_lock_init(&priv->soc_wake_msg_lock);
  3718. mutex_init(&priv->dev_lock);
  3719. mutex_init(&priv->tcdev_lock);
  3720. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3721. if (!priv->event_wq) {
  3722. icnss_pr_err("Workqueue creation failed\n");
  3723. ret = -EFAULT;
  3724. goto smmu_cleanup;
  3725. }
  3726. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3727. INIT_LIST_HEAD(&priv->event_list);
  3728. ret = icnss_register_fw_service(priv);
  3729. if (ret < 0) {
  3730. icnss_pr_err("fw service registration failed: %d\n", ret);
  3731. goto out_destroy_wq;
  3732. }
  3733. icnss_enable_recovery(priv);
  3734. icnss_debugfs_create(priv);
  3735. icnss_sysfs_create(priv);
  3736. ret = device_init_wakeup(&priv->pdev->dev, true);
  3737. if (ret)
  3738. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3739. ret);
  3740. icnss_set_plat_priv(priv);
  3741. init_completion(&priv->unblock_shutdown);
  3742. if (priv->is_slate_rfa)
  3743. init_completion(&priv->slate_boot_complete);
  3744. if (priv->device_id == WCN6750_DEVICE_ID ||
  3745. priv->device_id == WCN6450_DEVICE_ID) {
  3746. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3747. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3748. if (!priv->soc_wake_wq) {
  3749. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3750. ret = -EFAULT;
  3751. goto out_unregister_fw_service;
  3752. }
  3753. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3754. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3755. ret = icnss_genl_init();
  3756. if (ret < 0)
  3757. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3758. init_completion(&priv->smp2p_soc_wake_wait);
  3759. icnss_runtime_pm_init(priv);
  3760. icnss_aop_mbox_init(priv);
  3761. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3762. priv->bdf_download_support = true;
  3763. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3764. }
  3765. if (priv->wpss_supported) {
  3766. ret = icnss_dms_init(priv);
  3767. if (ret)
  3768. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3769. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3770. icnss_pr_dbg("NV MAC feature is %s\n",
  3771. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3772. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3773. }
  3774. timer_setup(&priv->recovery_timer,
  3775. icnss_recovery_timeout_hdlr, 0);
  3776. if (priv->wpss_self_recovery_enabled) {
  3777. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3778. timer_setup(&priv->wpss_ssr_timer,
  3779. icnss_wpss_ssr_timeout_hdlr, 0);
  3780. }
  3781. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3782. icnss_pr_info("Platform driver probed successfully\n");
  3783. return 0;
  3784. out_unregister_fw_service:
  3785. icnss_unregister_fw_service(priv);
  3786. out_destroy_wq:
  3787. destroy_workqueue(priv->event_wq);
  3788. smmu_cleanup:
  3789. priv->iommu_domain = NULL;
  3790. out_free_resources:
  3791. icnss_put_resources(priv);
  3792. out_reset_drvdata:
  3793. icnss_deinitialize_mem_pool();
  3794. dev_set_drvdata(dev, NULL);
  3795. return ret;
  3796. }
  3797. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3798. {
  3799. if (IS_ERR_OR_NULL(ramdump_info))
  3800. return;
  3801. device_unregister(ramdump_info->dev);
  3802. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3803. kfree(ramdump_info);
  3804. }
  3805. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3806. {
  3807. if (priv->batt_psy)
  3808. power_supply_put(penv->batt_psy);
  3809. if (priv->psf_supported) {
  3810. flush_workqueue(priv->soc_update_wq);
  3811. destroy_workqueue(priv->soc_update_wq);
  3812. power_supply_unreg_notifier(&priv->psf_nb);
  3813. }
  3814. }
  3815. static int icnss_remove(struct platform_device *pdev)
  3816. {
  3817. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3818. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3819. del_timer(&priv->recovery_timer);
  3820. if (priv->wpss_self_recovery_enabled)
  3821. del_timer(&priv->wpss_ssr_timer);
  3822. device_init_wakeup(&priv->pdev->dev, false);
  3823. icnss_debugfs_destroy(priv);
  3824. icnss_unregister_power_supply_notifier(penv);
  3825. icnss_sysfs_destroy(priv);
  3826. complete_all(&priv->unblock_shutdown);
  3827. if (priv->is_slate_rfa)
  3828. icnss_slate_ssr_unregister_notifier(priv);
  3829. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3830. if (priv->wpss_supported) {
  3831. icnss_dms_deinit(priv);
  3832. icnss_wpss_early_ssr_unregister_notifier(priv);
  3833. icnss_wpss_ssr_unregister_notifier(priv);
  3834. } else {
  3835. icnss_modem_ssr_unregister_notifier(priv);
  3836. icnss_pdr_unregister_notifier(priv);
  3837. }
  3838. if (priv->device_id == WCN6750_DEVICE_ID ||
  3839. priv->device_id == WCN6450_DEVICE_ID) {
  3840. icnss_genl_exit();
  3841. icnss_runtime_pm_deinit(priv);
  3842. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3843. mbox_free_channel(priv->mbox_chan);
  3844. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3845. complete_all(&priv->smp2p_soc_wake_wait);
  3846. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3847. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3848. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3849. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3850. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3851. if (priv->soc_wake_wq)
  3852. destroy_workqueue(priv->soc_wake_wq);
  3853. }
  3854. class_destroy(priv->icnss_ramdump_class);
  3855. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3856. icnss_unregister_fw_service(priv);
  3857. if (priv->event_wq)
  3858. destroy_workqueue(priv->event_wq);
  3859. priv->iommu_domain = NULL;
  3860. icnss_hw_power_off(priv);
  3861. icnss_put_resources(priv);
  3862. icnss_deinitialize_mem_pool();
  3863. dev_set_drvdata(&pdev->dev, NULL);
  3864. return 0;
  3865. }
  3866. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3867. {
  3868. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3869. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3870. ICNSS_ASSERT(0);
  3871. }
  3872. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3873. {
  3874. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3875. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3876. priv->state);
  3877. schedule_work(&wpss_ssr_work);
  3878. }
  3879. #ifdef CONFIG_PM_SLEEP
  3880. static int icnss_pm_suspend(struct device *dev)
  3881. {
  3882. struct icnss_priv *priv = dev_get_drvdata(dev);
  3883. int ret = 0;
  3884. if (priv->magic != ICNSS_MAGIC) {
  3885. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3886. dev, priv, priv->magic);
  3887. return -EINVAL;
  3888. }
  3889. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3890. if (!priv->ops || !priv->ops->pm_suspend ||
  3891. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3892. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3893. return 0;
  3894. ret = priv->ops->pm_suspend(dev);
  3895. if (ret == 0) {
  3896. if (priv->device_id == WCN6750_DEVICE_ID ||
  3897. priv->device_id == WCN6450_DEVICE_ID) {
  3898. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3899. !test_bit(ICNSS_MODE_ON, &priv->state))
  3900. return 0;
  3901. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3902. ICNSS_SMP2P_OUT_POWER_SAVE);
  3903. }
  3904. priv->stats.pm_suspend++;
  3905. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3906. } else {
  3907. priv->stats.pm_suspend_err++;
  3908. }
  3909. return ret;
  3910. }
  3911. static int icnss_pm_resume(struct device *dev)
  3912. {
  3913. struct icnss_priv *priv = dev_get_drvdata(dev);
  3914. int ret = 0;
  3915. if (priv->magic != ICNSS_MAGIC) {
  3916. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3917. dev, priv, priv->magic);
  3918. return -EINVAL;
  3919. }
  3920. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3921. if (!priv->ops || !priv->ops->pm_resume ||
  3922. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3923. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3924. goto out;
  3925. ret = priv->ops->pm_resume(dev);
  3926. out:
  3927. if (ret == 0) {
  3928. priv->stats.pm_resume++;
  3929. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3930. } else {
  3931. priv->stats.pm_resume_err++;
  3932. }
  3933. return ret;
  3934. }
  3935. static int icnss_pm_suspend_noirq(struct device *dev)
  3936. {
  3937. struct icnss_priv *priv = dev_get_drvdata(dev);
  3938. int ret = 0;
  3939. if (priv->magic != ICNSS_MAGIC) {
  3940. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3941. dev, priv, priv->magic);
  3942. return -EINVAL;
  3943. }
  3944. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3945. if (!priv->ops || !priv->ops->suspend_noirq ||
  3946. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3947. goto out;
  3948. ret = priv->ops->suspend_noirq(dev);
  3949. out:
  3950. if (ret == 0) {
  3951. priv->stats.pm_suspend_noirq++;
  3952. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3953. } else {
  3954. priv->stats.pm_suspend_noirq_err++;
  3955. }
  3956. return ret;
  3957. }
  3958. static int icnss_pm_resume_noirq(struct device *dev)
  3959. {
  3960. struct icnss_priv *priv = dev_get_drvdata(dev);
  3961. int ret = 0;
  3962. if (priv->magic != ICNSS_MAGIC) {
  3963. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3964. dev, priv, priv->magic);
  3965. return -EINVAL;
  3966. }
  3967. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3968. if (!priv->ops || !priv->ops->resume_noirq ||
  3969. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3970. goto out;
  3971. ret = priv->ops->resume_noirq(dev);
  3972. out:
  3973. if (ret == 0) {
  3974. priv->stats.pm_resume_noirq++;
  3975. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3976. } else {
  3977. priv->stats.pm_resume_noirq_err++;
  3978. }
  3979. return ret;
  3980. }
  3981. static int icnss_pm_runtime_suspend(struct device *dev)
  3982. {
  3983. struct icnss_priv *priv = dev_get_drvdata(dev);
  3984. int ret = 0;
  3985. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3986. icnss_pr_err("Ignore runtime suspend:\n");
  3987. goto out;
  3988. }
  3989. if (priv->magic != ICNSS_MAGIC) {
  3990. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3991. dev, priv, priv->magic);
  3992. return -EINVAL;
  3993. }
  3994. if (!priv->ops || !priv->ops->runtime_suspend ||
  3995. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3996. goto out;
  3997. icnss_pr_vdbg("Runtime suspend\n");
  3998. ret = priv->ops->runtime_suspend(dev);
  3999. if (!ret) {
  4000. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4001. !test_bit(ICNSS_MODE_ON, &priv->state))
  4002. return 0;
  4003. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4004. ICNSS_SMP2P_OUT_POWER_SAVE);
  4005. }
  4006. out:
  4007. return ret;
  4008. }
  4009. static int icnss_pm_runtime_resume(struct device *dev)
  4010. {
  4011. struct icnss_priv *priv = dev_get_drvdata(dev);
  4012. int ret = 0;
  4013. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4014. icnss_pr_err("Ignore runtime resume\n");
  4015. goto out;
  4016. }
  4017. if (priv->magic != ICNSS_MAGIC) {
  4018. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4019. dev, priv, priv->magic);
  4020. return -EINVAL;
  4021. }
  4022. if (!priv->ops || !priv->ops->runtime_resume ||
  4023. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4024. goto out;
  4025. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4026. ret = priv->ops->runtime_resume(dev);
  4027. out:
  4028. return ret;
  4029. }
  4030. static int icnss_pm_runtime_idle(struct device *dev)
  4031. {
  4032. struct icnss_priv *priv = dev_get_drvdata(dev);
  4033. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4034. icnss_pr_err("Ignore runtime idle\n");
  4035. goto out;
  4036. }
  4037. icnss_pr_vdbg("Runtime idle\n");
  4038. pm_request_autosuspend(dev);
  4039. out:
  4040. return -EBUSY;
  4041. }
  4042. #endif
  4043. static const struct dev_pm_ops icnss_pm_ops = {
  4044. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4045. icnss_pm_resume)
  4046. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4047. icnss_pm_resume_noirq)
  4048. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4049. icnss_pm_runtime_idle)
  4050. };
  4051. static struct platform_driver icnss_driver = {
  4052. .probe = icnss_probe,
  4053. .remove = icnss_remove,
  4054. .driver = {
  4055. .name = "icnss2",
  4056. .pm = &icnss_pm_ops,
  4057. .of_match_table = icnss_dt_match,
  4058. },
  4059. };
  4060. static int __init icnss_initialize(void)
  4061. {
  4062. icnss_debug_init();
  4063. return platform_driver_register(&icnss_driver);
  4064. }
  4065. static void __exit icnss_exit(void)
  4066. {
  4067. platform_driver_unregister(&icnss_driver);
  4068. icnss_debug_deinit();
  4069. }
  4070. module_init(icnss_initialize);
  4071. module_exit(icnss_exit);
  4072. MODULE_LICENSE("GPL v2");
  4073. MODULE_DESCRIPTION("iWCN CORE platform driver");