bengal.c 188 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/soc/qcom/fsa4480-i2c.h>
  16. #include <linux/nvmem-consumer.h>
  17. #include <sound/core.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/info.h>
  23. #include <soc/snd_event.h>
  24. #include <dsp/audio_notifier.h>
  25. #include <soc/swr-common.h>
  26. #include <dsp/q6afe-v2.h>
  27. #include <dsp/q6core.h>
  28. #include "device_event.h"
  29. #include "msm-pcm-routing-v2.h"
  30. #include "asoc/msm-cdc-pinctrl.h"
  31. #include "asoc/wcd-mbhc-v2.h"
  32. #include "codecs/wcd937x/wcd937x-mbhc.h"
  33. #include "codecs/rouleur/rouleur-mbhc.h"
  34. #include "codecs/wsa881x-analog.h"
  35. #include "codecs/wcd937x/wcd937x.h"
  36. #include "codecs/rouleur/rouleur.h"
  37. #include "codecs/bolero/bolero-cdc.h"
  38. #include <dt-bindings/sound/audio-codec-port-types.h>
  39. #include "bengal-port-config.h"
  40. #define DRV_NAME "bengal-asoc-snd"
  41. #define __CHIPSET__ "BENGAL "
  42. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  43. #define SAMPLING_RATE_8KHZ 8000
  44. #define SAMPLING_RATE_11P025KHZ 11025
  45. #define SAMPLING_RATE_16KHZ 16000
  46. #define SAMPLING_RATE_22P05KHZ 22050
  47. #define SAMPLING_RATE_32KHZ 32000
  48. #define SAMPLING_RATE_44P1KHZ 44100
  49. #define SAMPLING_RATE_48KHZ 48000
  50. #define SAMPLING_RATE_88P2KHZ 88200
  51. #define SAMPLING_RATE_96KHZ 96000
  52. #define SAMPLING_RATE_176P4KHZ 176400
  53. #define SAMPLING_RATE_192KHZ 192000
  54. #define SAMPLING_RATE_352P8KHZ 352800
  55. #define SAMPLING_RATE_384KHZ 384000
  56. #define WCD9XXX_MBHC_DEF_RLOADS 5
  57. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  58. #define CODEC_EXT_CLK_RATE 9600000
  59. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  60. #define DEV_NAME_STR_LEN 32
  61. #define WCD_MBHC_HS_V_MAX 1600
  62. #define TDM_CHANNEL_MAX 8
  63. #define DEV_NAME_STR_LEN 32
  64. /* time in us to ensure LPM doesn't go in C3/C4 */
  65. #define MSM_LL_QOS_VALUE 300
  66. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  67. #define WCN_CDC_SLIM_RX_CH_MAX 2
  68. #define WCN_CDC_SLIM_TX_CH_MAX 3
  69. enum {
  70. TDM_0 = 0,
  71. TDM_1,
  72. TDM_2,
  73. TDM_3,
  74. TDM_4,
  75. TDM_5,
  76. TDM_6,
  77. TDM_7,
  78. TDM_PORT_MAX,
  79. };
  80. enum {
  81. TDM_PRI = 0,
  82. TDM_SEC,
  83. TDM_TERT,
  84. TDM_QUAT,
  85. TDM_INTERFACE_MAX,
  86. };
  87. enum {
  88. PRIM_AUX_PCM = 0,
  89. SEC_AUX_PCM,
  90. TERT_AUX_PCM,
  91. QUAT_AUX_PCM,
  92. AUX_PCM_MAX,
  93. };
  94. enum {
  95. PRIM_MI2S = 0,
  96. SEC_MI2S,
  97. TERT_MI2S,
  98. QUAT_MI2S,
  99. MI2S_MAX,
  100. };
  101. enum {
  102. RX_CDC_DMA_RX_0 = 0,
  103. RX_CDC_DMA_RX_1,
  104. RX_CDC_DMA_RX_2,
  105. RX_CDC_DMA_RX_3,
  106. RX_CDC_DMA_RX_5,
  107. CDC_DMA_RX_MAX,
  108. };
  109. enum {
  110. TX_CDC_DMA_TX_0 = 0,
  111. TX_CDC_DMA_TX_3,
  112. TX_CDC_DMA_TX_4,
  113. VA_CDC_DMA_TX_0,
  114. VA_CDC_DMA_TX_1,
  115. VA_CDC_DMA_TX_2,
  116. CDC_DMA_TX_MAX,
  117. };
  118. enum {
  119. SLIM_RX_7 = 0,
  120. SLIM_RX_MAX,
  121. };
  122. enum {
  123. SLIM_TX_7 = 0,
  124. SLIM_TX_8,
  125. SLIM_TX_MAX,
  126. };
  127. enum {
  128. AFE_LOOPBACK_TX_IDX = 0,
  129. AFE_LOOPBACK_TX_IDX_MAX,
  130. };
  131. struct msm_asoc_mach_data {
  132. struct snd_info_entry *codec_root;
  133. int usbc_en2_gpio; /* used by gpio driver API */
  134. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  135. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  136. struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
  137. atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
  138. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  139. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  140. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  141. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  142. bool is_afe_config_done;
  143. struct device_node *fsa_handle;
  144. };
  145. struct tdm_port {
  146. u32 mode;
  147. u32 channel;
  148. };
  149. enum {
  150. EXT_DISP_RX_IDX_DP = 0,
  151. EXT_DISP_RX_IDX_DP1,
  152. EXT_DISP_RX_IDX_MAX,
  153. };
  154. struct msm_wsa881x_dev_info {
  155. struct device_node *of_node;
  156. u32 index;
  157. };
  158. struct aux_codec_dev_info {
  159. struct device_node *of_node;
  160. u32 index;
  161. };
  162. struct dev_config {
  163. u32 sample_rate;
  164. u32 bit_format;
  165. u32 channels;
  166. };
  167. /* Default configuration of slimbus channels */
  168. static struct dev_config slim_rx_cfg[] = {
  169. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  170. };
  171. static struct dev_config slim_tx_cfg[] = {
  172. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  173. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  174. };
  175. static struct dev_config usb_rx_cfg = {
  176. .sample_rate = SAMPLING_RATE_48KHZ,
  177. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  178. .channels = 2,
  179. };
  180. static struct dev_config usb_tx_cfg = {
  181. .sample_rate = SAMPLING_RATE_48KHZ,
  182. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  183. .channels = 1,
  184. };
  185. static struct dev_config proxy_rx_cfg = {
  186. .sample_rate = SAMPLING_RATE_48KHZ,
  187. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  188. .channels = 2,
  189. };
  190. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  191. {
  192. AFE_API_VERSION_I2S_CONFIG,
  193. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  194. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  195. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  196. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  197. 0,
  198. },
  199. {
  200. AFE_API_VERSION_I2S_CONFIG,
  201. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  202. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  203. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  204. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  205. 0,
  206. },
  207. {
  208. AFE_API_VERSION_I2S_CONFIG,
  209. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  210. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  211. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  212. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  213. 0,
  214. },
  215. {
  216. AFE_API_VERSION_I2S_CONFIG,
  217. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  218. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  219. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  220. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  221. 0,
  222. },
  223. };
  224. struct mi2s_conf {
  225. struct mutex lock;
  226. u32 ref_cnt;
  227. u32 msm_is_mi2s_master;
  228. };
  229. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  230. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  231. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  232. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  233. };
  234. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  235. static bool va_disable;
  236. /* Default configuration of TDM channels */
  237. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  238. { /* PRI TDM */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  247. },
  248. { /* SEC TDM */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  257. },
  258. { /* TERT TDM */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  267. },
  268. { /* QUAT TDM */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  277. },
  278. };
  279. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  280. { /* PRI TDM */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  289. },
  290. { /* SEC TDM */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  299. },
  300. { /* TERT TDM */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  309. },
  310. { /* QUAT TDM */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  317. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  318. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  319. },
  320. };
  321. /* Default configuration of AUX PCM channels */
  322. static struct dev_config aux_pcm_rx_cfg[] = {
  323. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. };
  328. static struct dev_config aux_pcm_tx_cfg[] = {
  329. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  330. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  332. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. };
  334. /* Default configuration of MI2S channels */
  335. static struct dev_config mi2s_rx_cfg[] = {
  336. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  337. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  338. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  339. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  340. };
  341. static struct dev_config mi2s_tx_cfg[] = {
  342. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  343. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  344. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  345. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  346. };
  347. /* Default configuration of Codec DMA Interface RX */
  348. static struct dev_config cdc_dma_rx_cfg[] = {
  349. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  350. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  352. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  353. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. };
  355. /* Default configuration of Codec DMA Interface TX */
  356. static struct dev_config cdc_dma_tx_cfg[] = {
  357. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  359. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  360. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  361. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  362. [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  363. };
  364. static struct dev_config afe_loopback_tx_cfg[] = {
  365. [AFE_LOOPBACK_TX_IDX] = {
  366. SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  367. };
  368. static int msm_vi_feed_tx_ch = 2;
  369. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  370. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  371. "S32_LE"};
  372. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  373. "Six", "Seven", "Eight"};
  374. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  375. "KHZ_16", "KHZ_22P05",
  376. "KHZ_32", "KHZ_44P1", "KHZ_48",
  377. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  378. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  379. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  380. "Five", "Six", "Seven",
  381. "Eight"};
  382. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  383. "KHZ_48", "KHZ_176P4",
  384. "KHZ_352P8"};
  385. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  386. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  387. "Five", "Six", "Seven", "Eight"};
  388. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  389. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  390. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  391. "KHZ_48", "KHZ_96", "KHZ_192"};
  392. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  393. "Five", "Six", "Seven",
  394. "Eight"};
  395. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  396. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  397. "Five", "Six", "Seven",
  398. "Eight"};
  399. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  400. "KHZ_16", "KHZ_22P05",
  401. "KHZ_32", "KHZ_44P1", "KHZ_48",
  402. "KHZ_88P2", "KHZ_96",
  403. "KHZ_176P4", "KHZ_192",
  404. "KHZ_352P8", "KHZ_384"};
  405. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  406. "KHZ_44P1", "KHZ_48",
  407. "KHZ_88P2", "KHZ_96"};
  408. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  409. "KHZ_44P1", "KHZ_48",
  410. "KHZ_88P2", "KHZ_96"};
  411. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  412. "KHZ_44P1", "KHZ_48",
  413. "KHZ_88P2", "KHZ_96"};
  414. static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
  415. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  416. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  417. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  418. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  419. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  420. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  421. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  422. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  424. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  425. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  426. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  427. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  428. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  429. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  430. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  431. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  432. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  433. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  434. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  435. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  436. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  437. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  438. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  439. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  440. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  441. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  442. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  443. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  444. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  445. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  446. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  447. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  448. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  449. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  450. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  451. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  452. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  453. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  454. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  455. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  456. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  457. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  459. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  461. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  463. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  480. cdc_dma_sample_rate_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  482. cdc_dma_sample_rate_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  484. cdc_dma_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  486. cdc_dma_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  488. cdc_dma_sample_rate_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  490. cdc_dma_sample_rate_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  492. cdc_dma_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  494. cdc_dma_sample_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  496. cdc_dma_sample_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  498. cdc_dma_sample_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
  500. cdc_dma_sample_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
  505. static bool is_initial_boot;
  506. static bool codec_reg_done;
  507. static struct snd_soc_aux_dev *msm_aux_dev;
  508. static struct snd_soc_codec_conf *msm_codec_conf;
  509. static struct snd_soc_card snd_soc_card_bengal_msm;
  510. static int dmic_0_1_gpio_cnt;
  511. static int dmic_2_3_gpio_cnt;
  512. static void *def_wcd_mbhc_cal(void);
  513. /*
  514. * Need to report LINEIN
  515. * if R/L channel impedance is larger than 5K ohm
  516. */
  517. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  518. .read_fw_bin = false,
  519. .calibration = NULL,
  520. .detect_extn_cable = true,
  521. .mono_stero_detection = false,
  522. .swap_gnd_mic = NULL,
  523. .hs_ext_micbias = true,
  524. .key_code[0] = KEY_MEDIA,
  525. .key_code[1] = KEY_VOICECOMMAND,
  526. .key_code[2] = KEY_VOLUMEUP,
  527. .key_code[3] = KEY_VOLUMEDOWN,
  528. .key_code[4] = 0,
  529. .key_code[5] = 0,
  530. .key_code[6] = 0,
  531. .key_code[7] = 0,
  532. .linein_th = 5000,
  533. .moisture_en = false,
  534. .mbhc_micbias = MIC_BIAS_2,
  535. .anc_micbias = MIC_BIAS_2,
  536. .enable_anc_mic_detect = false,
  537. .moisture_duty_cycle_en = true,
  538. };
  539. static inline int param_is_mask(int p)
  540. {
  541. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  542. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  543. }
  544. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  545. int n)
  546. {
  547. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  548. }
  549. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  550. unsigned int bit)
  551. {
  552. if (bit >= SNDRV_MASK_MAX)
  553. return;
  554. if (param_is_mask(n)) {
  555. struct snd_mask *m = param_to_mask(p, n);
  556. m->bits[0] = 0;
  557. m->bits[1] = 0;
  558. m->bits[bit >> 5] |= (1 << (bit & 31));
  559. }
  560. }
  561. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  562. struct snd_ctl_elem_value *ucontrol)
  563. {
  564. int sample_rate_val = 0;
  565. switch (usb_rx_cfg.sample_rate) {
  566. case SAMPLING_RATE_384KHZ:
  567. sample_rate_val = 12;
  568. break;
  569. case SAMPLING_RATE_352P8KHZ:
  570. sample_rate_val = 11;
  571. break;
  572. case SAMPLING_RATE_192KHZ:
  573. sample_rate_val = 10;
  574. break;
  575. case SAMPLING_RATE_176P4KHZ:
  576. sample_rate_val = 9;
  577. break;
  578. case SAMPLING_RATE_96KHZ:
  579. sample_rate_val = 8;
  580. break;
  581. case SAMPLING_RATE_88P2KHZ:
  582. sample_rate_val = 7;
  583. break;
  584. case SAMPLING_RATE_48KHZ:
  585. sample_rate_val = 6;
  586. break;
  587. case SAMPLING_RATE_44P1KHZ:
  588. sample_rate_val = 5;
  589. break;
  590. case SAMPLING_RATE_32KHZ:
  591. sample_rate_val = 4;
  592. break;
  593. case SAMPLING_RATE_22P05KHZ:
  594. sample_rate_val = 3;
  595. break;
  596. case SAMPLING_RATE_16KHZ:
  597. sample_rate_val = 2;
  598. break;
  599. case SAMPLING_RATE_11P025KHZ:
  600. sample_rate_val = 1;
  601. break;
  602. case SAMPLING_RATE_8KHZ:
  603. default:
  604. sample_rate_val = 0;
  605. break;
  606. }
  607. ucontrol->value.integer.value[0] = sample_rate_val;
  608. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  609. usb_rx_cfg.sample_rate);
  610. return 0;
  611. }
  612. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  613. struct snd_ctl_elem_value *ucontrol)
  614. {
  615. switch (ucontrol->value.integer.value[0]) {
  616. case 12:
  617. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  618. break;
  619. case 11:
  620. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  621. break;
  622. case 10:
  623. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  624. break;
  625. case 9:
  626. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  627. break;
  628. case 8:
  629. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  630. break;
  631. case 7:
  632. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  633. break;
  634. case 6:
  635. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  636. break;
  637. case 5:
  638. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  639. break;
  640. case 4:
  641. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  642. break;
  643. case 3:
  644. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  645. break;
  646. case 2:
  647. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  648. break;
  649. case 1:
  650. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  651. break;
  652. case 0:
  653. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  654. break;
  655. default:
  656. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  657. break;
  658. }
  659. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  660. __func__, ucontrol->value.integer.value[0],
  661. usb_rx_cfg.sample_rate);
  662. return 0;
  663. }
  664. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  665. struct snd_ctl_elem_value *ucontrol)
  666. {
  667. int sample_rate_val = 0;
  668. switch (usb_tx_cfg.sample_rate) {
  669. case SAMPLING_RATE_384KHZ:
  670. sample_rate_val = 12;
  671. break;
  672. case SAMPLING_RATE_352P8KHZ:
  673. sample_rate_val = 11;
  674. break;
  675. case SAMPLING_RATE_192KHZ:
  676. sample_rate_val = 10;
  677. break;
  678. case SAMPLING_RATE_176P4KHZ:
  679. sample_rate_val = 9;
  680. break;
  681. case SAMPLING_RATE_96KHZ:
  682. sample_rate_val = 8;
  683. break;
  684. case SAMPLING_RATE_88P2KHZ:
  685. sample_rate_val = 7;
  686. break;
  687. case SAMPLING_RATE_48KHZ:
  688. sample_rate_val = 6;
  689. break;
  690. case SAMPLING_RATE_44P1KHZ:
  691. sample_rate_val = 5;
  692. break;
  693. case SAMPLING_RATE_32KHZ:
  694. sample_rate_val = 4;
  695. break;
  696. case SAMPLING_RATE_22P05KHZ:
  697. sample_rate_val = 3;
  698. break;
  699. case SAMPLING_RATE_16KHZ:
  700. sample_rate_val = 2;
  701. break;
  702. case SAMPLING_RATE_11P025KHZ:
  703. sample_rate_val = 1;
  704. break;
  705. case SAMPLING_RATE_8KHZ:
  706. sample_rate_val = 0;
  707. break;
  708. default:
  709. sample_rate_val = 6;
  710. break;
  711. }
  712. ucontrol->value.integer.value[0] = sample_rate_val;
  713. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  714. usb_tx_cfg.sample_rate);
  715. return 0;
  716. }
  717. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  718. struct snd_ctl_elem_value *ucontrol)
  719. {
  720. switch (ucontrol->value.integer.value[0]) {
  721. case 12:
  722. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  723. break;
  724. case 11:
  725. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  726. break;
  727. case 10:
  728. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  729. break;
  730. case 9:
  731. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  732. break;
  733. case 8:
  734. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  735. break;
  736. case 7:
  737. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  738. break;
  739. case 6:
  740. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  741. break;
  742. case 5:
  743. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  744. break;
  745. case 4:
  746. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  747. break;
  748. case 3:
  749. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  750. break;
  751. case 2:
  752. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  753. break;
  754. case 1:
  755. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  756. break;
  757. case 0:
  758. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  759. break;
  760. default:
  761. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  762. break;
  763. }
  764. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  765. __func__, ucontrol->value.integer.value[0],
  766. usb_tx_cfg.sample_rate);
  767. return 0;
  768. }
  769. static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
  770. struct snd_ctl_elem_value *ucontrol)
  771. {
  772. pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
  773. afe_loopback_tx_cfg[0].channels);
  774. ucontrol->value.enumerated.item[0] =
  775. afe_loopback_tx_cfg[0].channels - 1;
  776. return 0;
  777. }
  778. static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
  779. struct snd_ctl_elem_value *ucontrol)
  780. {
  781. afe_loopback_tx_cfg[0].channels =
  782. ucontrol->value.enumerated.item[0] + 1;
  783. pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
  784. afe_loopback_tx_cfg[0].channels);
  785. return 1;
  786. }
  787. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  788. struct snd_ctl_elem_value *ucontrol)
  789. {
  790. switch (usb_rx_cfg.bit_format) {
  791. case SNDRV_PCM_FORMAT_S32_LE:
  792. ucontrol->value.integer.value[0] = 3;
  793. break;
  794. case SNDRV_PCM_FORMAT_S24_3LE:
  795. ucontrol->value.integer.value[0] = 2;
  796. break;
  797. case SNDRV_PCM_FORMAT_S24_LE:
  798. ucontrol->value.integer.value[0] = 1;
  799. break;
  800. case SNDRV_PCM_FORMAT_S16_LE:
  801. default:
  802. ucontrol->value.integer.value[0] = 0;
  803. break;
  804. }
  805. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  806. __func__, usb_rx_cfg.bit_format,
  807. ucontrol->value.integer.value[0]);
  808. return 0;
  809. }
  810. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  811. struct snd_ctl_elem_value *ucontrol)
  812. {
  813. int rc = 0;
  814. switch (ucontrol->value.integer.value[0]) {
  815. case 3:
  816. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  817. break;
  818. case 2:
  819. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  820. break;
  821. case 1:
  822. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  823. break;
  824. case 0:
  825. default:
  826. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  827. break;
  828. }
  829. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  830. __func__, usb_rx_cfg.bit_format,
  831. ucontrol->value.integer.value[0]);
  832. return rc;
  833. }
  834. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  835. struct snd_ctl_elem_value *ucontrol)
  836. {
  837. switch (usb_tx_cfg.bit_format) {
  838. case SNDRV_PCM_FORMAT_S32_LE:
  839. ucontrol->value.integer.value[0] = 3;
  840. break;
  841. case SNDRV_PCM_FORMAT_S24_3LE:
  842. ucontrol->value.integer.value[0] = 2;
  843. break;
  844. case SNDRV_PCM_FORMAT_S24_LE:
  845. ucontrol->value.integer.value[0] = 1;
  846. break;
  847. case SNDRV_PCM_FORMAT_S16_LE:
  848. default:
  849. ucontrol->value.integer.value[0] = 0;
  850. break;
  851. }
  852. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  853. __func__, usb_tx_cfg.bit_format,
  854. ucontrol->value.integer.value[0]);
  855. return 0;
  856. }
  857. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  858. struct snd_ctl_elem_value *ucontrol)
  859. {
  860. int rc = 0;
  861. switch (ucontrol->value.integer.value[0]) {
  862. case 3:
  863. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  864. break;
  865. case 2:
  866. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  867. break;
  868. case 1:
  869. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  870. break;
  871. case 0:
  872. default:
  873. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  874. break;
  875. }
  876. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  877. __func__, usb_tx_cfg.bit_format,
  878. ucontrol->value.integer.value[0]);
  879. return rc;
  880. }
  881. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  882. struct snd_ctl_elem_value *ucontrol)
  883. {
  884. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  885. usb_rx_cfg.channels);
  886. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  887. return 0;
  888. }
  889. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  890. struct snd_ctl_elem_value *ucontrol)
  891. {
  892. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  893. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  894. return 1;
  895. }
  896. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  897. struct snd_ctl_elem_value *ucontrol)
  898. {
  899. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  900. usb_tx_cfg.channels);
  901. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  902. return 0;
  903. }
  904. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  905. struct snd_ctl_elem_value *ucontrol)
  906. {
  907. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  908. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  909. return 1;
  910. }
  911. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  912. struct snd_ctl_elem_value *ucontrol)
  913. {
  914. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  915. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  916. ucontrol->value.integer.value[0]);
  917. return 0;
  918. }
  919. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  920. struct snd_ctl_elem_value *ucontrol)
  921. {
  922. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  923. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  924. return 1;
  925. }
  926. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  927. struct snd_ctl_elem_value *ucontrol)
  928. {
  929. pr_debug("%s: proxy_rx channels = %d\n",
  930. __func__, proxy_rx_cfg.channels);
  931. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  932. return 0;
  933. }
  934. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  935. struct snd_ctl_elem_value *ucontrol)
  936. {
  937. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  938. pr_debug("%s: proxy_rx channels = %d\n",
  939. __func__, proxy_rx_cfg.channels);
  940. return 1;
  941. }
  942. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  943. struct tdm_port *port)
  944. {
  945. if (port) {
  946. if (strnstr(kcontrol->id.name, "PRI",
  947. sizeof(kcontrol->id.name))) {
  948. port->mode = TDM_PRI;
  949. } else if (strnstr(kcontrol->id.name, "SEC",
  950. sizeof(kcontrol->id.name))) {
  951. port->mode = TDM_SEC;
  952. } else if (strnstr(kcontrol->id.name, "TERT",
  953. sizeof(kcontrol->id.name))) {
  954. port->mode = TDM_TERT;
  955. } else if (strnstr(kcontrol->id.name, "QUAT",
  956. sizeof(kcontrol->id.name))) {
  957. port->mode = TDM_QUAT;
  958. } else {
  959. pr_err("%s: unsupported mode in: %s\n",
  960. __func__, kcontrol->id.name);
  961. return -EINVAL;
  962. }
  963. if (strnstr(kcontrol->id.name, "RX_0",
  964. sizeof(kcontrol->id.name)) ||
  965. strnstr(kcontrol->id.name, "TX_0",
  966. sizeof(kcontrol->id.name))) {
  967. port->channel = TDM_0;
  968. } else if (strnstr(kcontrol->id.name, "RX_1",
  969. sizeof(kcontrol->id.name)) ||
  970. strnstr(kcontrol->id.name, "TX_1",
  971. sizeof(kcontrol->id.name))) {
  972. port->channel = TDM_1;
  973. } else if (strnstr(kcontrol->id.name, "RX_2",
  974. sizeof(kcontrol->id.name)) ||
  975. strnstr(kcontrol->id.name, "TX_2",
  976. sizeof(kcontrol->id.name))) {
  977. port->channel = TDM_2;
  978. } else if (strnstr(kcontrol->id.name, "RX_3",
  979. sizeof(kcontrol->id.name)) ||
  980. strnstr(kcontrol->id.name, "TX_3",
  981. sizeof(kcontrol->id.name))) {
  982. port->channel = TDM_3;
  983. } else if (strnstr(kcontrol->id.name, "RX_4",
  984. sizeof(kcontrol->id.name)) ||
  985. strnstr(kcontrol->id.name, "TX_4",
  986. sizeof(kcontrol->id.name))) {
  987. port->channel = TDM_4;
  988. } else if (strnstr(kcontrol->id.name, "RX_5",
  989. sizeof(kcontrol->id.name)) ||
  990. strnstr(kcontrol->id.name, "TX_5",
  991. sizeof(kcontrol->id.name))) {
  992. port->channel = TDM_5;
  993. } else if (strnstr(kcontrol->id.name, "RX_6",
  994. sizeof(kcontrol->id.name)) ||
  995. strnstr(kcontrol->id.name, "TX_6",
  996. sizeof(kcontrol->id.name))) {
  997. port->channel = TDM_6;
  998. } else if (strnstr(kcontrol->id.name, "RX_7",
  999. sizeof(kcontrol->id.name)) ||
  1000. strnstr(kcontrol->id.name, "TX_7",
  1001. sizeof(kcontrol->id.name))) {
  1002. port->channel = TDM_7;
  1003. } else {
  1004. pr_err("%s: unsupported channel in: %s\n",
  1005. __func__, kcontrol->id.name);
  1006. return -EINVAL;
  1007. }
  1008. } else {
  1009. return -EINVAL;
  1010. }
  1011. return 0;
  1012. }
  1013. static int tdm_get_sample_rate(int value)
  1014. {
  1015. int sample_rate = 0;
  1016. switch (value) {
  1017. case 0:
  1018. sample_rate = SAMPLING_RATE_8KHZ;
  1019. break;
  1020. case 1:
  1021. sample_rate = SAMPLING_RATE_16KHZ;
  1022. break;
  1023. case 2:
  1024. sample_rate = SAMPLING_RATE_32KHZ;
  1025. break;
  1026. case 3:
  1027. sample_rate = SAMPLING_RATE_48KHZ;
  1028. break;
  1029. case 4:
  1030. sample_rate = SAMPLING_RATE_176P4KHZ;
  1031. break;
  1032. case 5:
  1033. sample_rate = SAMPLING_RATE_352P8KHZ;
  1034. break;
  1035. default:
  1036. sample_rate = SAMPLING_RATE_48KHZ;
  1037. break;
  1038. }
  1039. return sample_rate;
  1040. }
  1041. static int tdm_get_sample_rate_val(int sample_rate)
  1042. {
  1043. int sample_rate_val = 0;
  1044. switch (sample_rate) {
  1045. case SAMPLING_RATE_8KHZ:
  1046. sample_rate_val = 0;
  1047. break;
  1048. case SAMPLING_RATE_16KHZ:
  1049. sample_rate_val = 1;
  1050. break;
  1051. case SAMPLING_RATE_32KHZ:
  1052. sample_rate_val = 2;
  1053. break;
  1054. case SAMPLING_RATE_48KHZ:
  1055. sample_rate_val = 3;
  1056. break;
  1057. case SAMPLING_RATE_176P4KHZ:
  1058. sample_rate_val = 4;
  1059. break;
  1060. case SAMPLING_RATE_352P8KHZ:
  1061. sample_rate_val = 5;
  1062. break;
  1063. default:
  1064. sample_rate_val = 3;
  1065. break;
  1066. }
  1067. return sample_rate_val;
  1068. }
  1069. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1070. struct snd_ctl_elem_value *ucontrol)
  1071. {
  1072. struct tdm_port port;
  1073. int ret = tdm_get_port_idx(kcontrol, &port);
  1074. if (ret) {
  1075. pr_err("%s: unsupported control: %s\n",
  1076. __func__, kcontrol->id.name);
  1077. } else {
  1078. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1079. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  1080. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1081. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1082. ucontrol->value.enumerated.item[0]);
  1083. }
  1084. return ret;
  1085. }
  1086. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1087. struct snd_ctl_elem_value *ucontrol)
  1088. {
  1089. struct tdm_port port;
  1090. int ret = tdm_get_port_idx(kcontrol, &port);
  1091. if (ret) {
  1092. pr_err("%s: unsupported control: %s\n",
  1093. __func__, kcontrol->id.name);
  1094. } else {
  1095. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  1096. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1097. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1098. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1099. ucontrol->value.enumerated.item[0]);
  1100. }
  1101. return ret;
  1102. }
  1103. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1104. struct snd_ctl_elem_value *ucontrol)
  1105. {
  1106. struct tdm_port port;
  1107. int ret = tdm_get_port_idx(kcontrol, &port);
  1108. if (ret) {
  1109. pr_err("%s: unsupported control: %s\n",
  1110. __func__, kcontrol->id.name);
  1111. } else {
  1112. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1113. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1114. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1115. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1116. ucontrol->value.enumerated.item[0]);
  1117. }
  1118. return ret;
  1119. }
  1120. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1121. struct snd_ctl_elem_value *ucontrol)
  1122. {
  1123. struct tdm_port port;
  1124. int ret = tdm_get_port_idx(kcontrol, &port);
  1125. if (ret) {
  1126. pr_err("%s: unsupported control: %s\n",
  1127. __func__, kcontrol->id.name);
  1128. } else {
  1129. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1130. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1131. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1132. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1133. ucontrol->value.enumerated.item[0]);
  1134. }
  1135. return ret;
  1136. }
  1137. static int tdm_get_format(int value)
  1138. {
  1139. int format = 0;
  1140. switch (value) {
  1141. case 0:
  1142. format = SNDRV_PCM_FORMAT_S16_LE;
  1143. break;
  1144. case 1:
  1145. format = SNDRV_PCM_FORMAT_S24_LE;
  1146. break;
  1147. case 2:
  1148. format = SNDRV_PCM_FORMAT_S32_LE;
  1149. break;
  1150. default:
  1151. format = SNDRV_PCM_FORMAT_S16_LE;
  1152. break;
  1153. }
  1154. return format;
  1155. }
  1156. static int tdm_get_format_val(int format)
  1157. {
  1158. int value = 0;
  1159. switch (format) {
  1160. case SNDRV_PCM_FORMAT_S16_LE:
  1161. value = 0;
  1162. break;
  1163. case SNDRV_PCM_FORMAT_S24_LE:
  1164. value = 1;
  1165. break;
  1166. case SNDRV_PCM_FORMAT_S32_LE:
  1167. value = 2;
  1168. break;
  1169. default:
  1170. value = 0;
  1171. break;
  1172. }
  1173. return value;
  1174. }
  1175. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1176. struct snd_ctl_elem_value *ucontrol)
  1177. {
  1178. struct tdm_port port;
  1179. int ret = tdm_get_port_idx(kcontrol, &port);
  1180. if (ret) {
  1181. pr_err("%s: unsupported control: %s\n",
  1182. __func__, kcontrol->id.name);
  1183. } else {
  1184. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1185. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1186. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1187. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1188. ucontrol->value.enumerated.item[0]);
  1189. }
  1190. return ret;
  1191. }
  1192. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1193. struct snd_ctl_elem_value *ucontrol)
  1194. {
  1195. struct tdm_port port;
  1196. int ret = tdm_get_port_idx(kcontrol, &port);
  1197. if (ret) {
  1198. pr_err("%s: unsupported control: %s\n",
  1199. __func__, kcontrol->id.name);
  1200. } else {
  1201. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1202. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1203. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1204. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1205. ucontrol->value.enumerated.item[0]);
  1206. }
  1207. return ret;
  1208. }
  1209. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1210. struct snd_ctl_elem_value *ucontrol)
  1211. {
  1212. struct tdm_port port;
  1213. int ret = tdm_get_port_idx(kcontrol, &port);
  1214. if (ret) {
  1215. pr_err("%s: unsupported control: %s\n",
  1216. __func__, kcontrol->id.name);
  1217. } else {
  1218. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1219. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1220. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1221. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1222. ucontrol->value.enumerated.item[0]);
  1223. }
  1224. return ret;
  1225. }
  1226. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1227. struct snd_ctl_elem_value *ucontrol)
  1228. {
  1229. struct tdm_port port;
  1230. int ret = tdm_get_port_idx(kcontrol, &port);
  1231. if (ret) {
  1232. pr_err("%s: unsupported control: %s\n",
  1233. __func__, kcontrol->id.name);
  1234. } else {
  1235. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1236. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1237. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1238. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1239. ucontrol->value.enumerated.item[0]);
  1240. }
  1241. return ret;
  1242. }
  1243. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1244. struct snd_ctl_elem_value *ucontrol)
  1245. {
  1246. struct tdm_port port;
  1247. int ret = tdm_get_port_idx(kcontrol, &port);
  1248. if (ret) {
  1249. pr_err("%s: unsupported control: %s\n",
  1250. __func__, kcontrol->id.name);
  1251. } else {
  1252. ucontrol->value.enumerated.item[0] =
  1253. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1254. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1255. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1256. ucontrol->value.enumerated.item[0]);
  1257. }
  1258. return ret;
  1259. }
  1260. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1261. struct snd_ctl_elem_value *ucontrol)
  1262. {
  1263. struct tdm_port port;
  1264. int ret = tdm_get_port_idx(kcontrol, &port);
  1265. if (ret) {
  1266. pr_err("%s: unsupported control: %s\n",
  1267. __func__, kcontrol->id.name);
  1268. } else {
  1269. tdm_rx_cfg[port.mode][port.channel].channels =
  1270. ucontrol->value.enumerated.item[0] + 1;
  1271. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1272. tdm_rx_cfg[port.mode][port.channel].channels,
  1273. ucontrol->value.enumerated.item[0] + 1);
  1274. }
  1275. return ret;
  1276. }
  1277. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1278. struct snd_ctl_elem_value *ucontrol)
  1279. {
  1280. struct tdm_port port;
  1281. int ret = tdm_get_port_idx(kcontrol, &port);
  1282. if (ret) {
  1283. pr_err("%s: unsupported control: %s\n",
  1284. __func__, kcontrol->id.name);
  1285. } else {
  1286. ucontrol->value.enumerated.item[0] =
  1287. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1288. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1289. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1290. ucontrol->value.enumerated.item[0]);
  1291. }
  1292. return ret;
  1293. }
  1294. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1295. struct snd_ctl_elem_value *ucontrol)
  1296. {
  1297. struct tdm_port port;
  1298. int ret = tdm_get_port_idx(kcontrol, &port);
  1299. if (ret) {
  1300. pr_err("%s: unsupported control: %s\n",
  1301. __func__, kcontrol->id.name);
  1302. } else {
  1303. tdm_tx_cfg[port.mode][port.channel].channels =
  1304. ucontrol->value.enumerated.item[0] + 1;
  1305. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1306. tdm_tx_cfg[port.mode][port.channel].channels,
  1307. ucontrol->value.enumerated.item[0] + 1);
  1308. }
  1309. return ret;
  1310. }
  1311. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1312. {
  1313. int idx = 0;
  1314. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1315. sizeof("PRIM_AUX_PCM"))) {
  1316. idx = PRIM_AUX_PCM;
  1317. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1318. sizeof("SEC_AUX_PCM"))) {
  1319. idx = SEC_AUX_PCM;
  1320. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1321. sizeof("TERT_AUX_PCM"))) {
  1322. idx = TERT_AUX_PCM;
  1323. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  1324. sizeof("QUAT_AUX_PCM"))) {
  1325. idx = QUAT_AUX_PCM;
  1326. } else {
  1327. pr_err("%s: unsupported port: %s\n",
  1328. __func__, kcontrol->id.name);
  1329. idx = -EINVAL;
  1330. }
  1331. return idx;
  1332. }
  1333. static int aux_pcm_get_sample_rate(int value)
  1334. {
  1335. int sample_rate = 0;
  1336. switch (value) {
  1337. case 1:
  1338. sample_rate = SAMPLING_RATE_16KHZ;
  1339. break;
  1340. case 0:
  1341. default:
  1342. sample_rate = SAMPLING_RATE_8KHZ;
  1343. break;
  1344. }
  1345. return sample_rate;
  1346. }
  1347. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1348. {
  1349. int sample_rate_val = 0;
  1350. switch (sample_rate) {
  1351. case SAMPLING_RATE_16KHZ:
  1352. sample_rate_val = 1;
  1353. break;
  1354. case SAMPLING_RATE_8KHZ:
  1355. default:
  1356. sample_rate_val = 0;
  1357. break;
  1358. }
  1359. return sample_rate_val;
  1360. }
  1361. static int mi2s_auxpcm_get_format(int value)
  1362. {
  1363. int format = 0;
  1364. switch (value) {
  1365. case 0:
  1366. format = SNDRV_PCM_FORMAT_S16_LE;
  1367. break;
  1368. case 1:
  1369. format = SNDRV_PCM_FORMAT_S24_LE;
  1370. break;
  1371. case 2:
  1372. format = SNDRV_PCM_FORMAT_S24_3LE;
  1373. break;
  1374. case 3:
  1375. format = SNDRV_PCM_FORMAT_S32_LE;
  1376. break;
  1377. default:
  1378. format = SNDRV_PCM_FORMAT_S16_LE;
  1379. break;
  1380. }
  1381. return format;
  1382. }
  1383. static int mi2s_auxpcm_get_format_value(int format)
  1384. {
  1385. int value = 0;
  1386. switch (format) {
  1387. case SNDRV_PCM_FORMAT_S16_LE:
  1388. value = 0;
  1389. break;
  1390. case SNDRV_PCM_FORMAT_S24_LE:
  1391. value = 1;
  1392. break;
  1393. case SNDRV_PCM_FORMAT_S24_3LE:
  1394. value = 2;
  1395. break;
  1396. case SNDRV_PCM_FORMAT_S32_LE:
  1397. value = 3;
  1398. break;
  1399. default:
  1400. value = 0;
  1401. break;
  1402. }
  1403. return value;
  1404. }
  1405. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1406. struct snd_ctl_elem_value *ucontrol)
  1407. {
  1408. int idx = aux_pcm_get_port_idx(kcontrol);
  1409. if (idx < 0)
  1410. return idx;
  1411. ucontrol->value.enumerated.item[0] =
  1412. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1413. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1414. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1415. ucontrol->value.enumerated.item[0]);
  1416. return 0;
  1417. }
  1418. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1419. struct snd_ctl_elem_value *ucontrol)
  1420. {
  1421. int idx = aux_pcm_get_port_idx(kcontrol);
  1422. if (idx < 0)
  1423. return idx;
  1424. aux_pcm_rx_cfg[idx].sample_rate =
  1425. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1426. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1427. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1428. ucontrol->value.enumerated.item[0]);
  1429. return 0;
  1430. }
  1431. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1432. struct snd_ctl_elem_value *ucontrol)
  1433. {
  1434. int idx = aux_pcm_get_port_idx(kcontrol);
  1435. if (idx < 0)
  1436. return idx;
  1437. ucontrol->value.enumerated.item[0] =
  1438. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1439. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1440. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1441. ucontrol->value.enumerated.item[0]);
  1442. return 0;
  1443. }
  1444. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1445. struct snd_ctl_elem_value *ucontrol)
  1446. {
  1447. int idx = aux_pcm_get_port_idx(kcontrol);
  1448. if (idx < 0)
  1449. return idx;
  1450. aux_pcm_tx_cfg[idx].sample_rate =
  1451. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1452. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1453. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1454. ucontrol->value.enumerated.item[0]);
  1455. return 0;
  1456. }
  1457. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1458. struct snd_ctl_elem_value *ucontrol)
  1459. {
  1460. int idx = aux_pcm_get_port_idx(kcontrol);
  1461. if (idx < 0)
  1462. return idx;
  1463. ucontrol->value.enumerated.item[0] =
  1464. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1465. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1466. idx, aux_pcm_rx_cfg[idx].bit_format,
  1467. ucontrol->value.enumerated.item[0]);
  1468. return 0;
  1469. }
  1470. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1471. struct snd_ctl_elem_value *ucontrol)
  1472. {
  1473. int idx = aux_pcm_get_port_idx(kcontrol);
  1474. if (idx < 0)
  1475. return idx;
  1476. aux_pcm_rx_cfg[idx].bit_format =
  1477. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1478. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1479. idx, aux_pcm_rx_cfg[idx].bit_format,
  1480. ucontrol->value.enumerated.item[0]);
  1481. return 0;
  1482. }
  1483. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1484. struct snd_ctl_elem_value *ucontrol)
  1485. {
  1486. int idx = aux_pcm_get_port_idx(kcontrol);
  1487. if (idx < 0)
  1488. return idx;
  1489. ucontrol->value.enumerated.item[0] =
  1490. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1491. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1492. idx, aux_pcm_tx_cfg[idx].bit_format,
  1493. ucontrol->value.enumerated.item[0]);
  1494. return 0;
  1495. }
  1496. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1497. struct snd_ctl_elem_value *ucontrol)
  1498. {
  1499. int idx = aux_pcm_get_port_idx(kcontrol);
  1500. if (idx < 0)
  1501. return idx;
  1502. aux_pcm_tx_cfg[idx].bit_format =
  1503. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1504. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1505. idx, aux_pcm_tx_cfg[idx].bit_format,
  1506. ucontrol->value.enumerated.item[0]);
  1507. return 0;
  1508. }
  1509. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1510. {
  1511. int idx = 0;
  1512. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1513. sizeof("PRIM_MI2S_RX"))) {
  1514. idx = PRIM_MI2S;
  1515. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1516. sizeof("SEC_MI2S_RX"))) {
  1517. idx = SEC_MI2S;
  1518. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1519. sizeof("TERT_MI2S_RX"))) {
  1520. idx = TERT_MI2S;
  1521. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  1522. sizeof("QUAT_MI2S_RX"))) {
  1523. idx = QUAT_MI2S;
  1524. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1525. sizeof("PRIM_MI2S_TX"))) {
  1526. idx = PRIM_MI2S;
  1527. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1528. sizeof("SEC_MI2S_TX"))) {
  1529. idx = SEC_MI2S;
  1530. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1531. sizeof("TERT_MI2S_TX"))) {
  1532. idx = TERT_MI2S;
  1533. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  1534. sizeof("QUAT_MI2S_TX"))) {
  1535. idx = QUAT_MI2S;
  1536. } else {
  1537. pr_err("%s: unsupported channel: %s\n",
  1538. __func__, kcontrol->id.name);
  1539. idx = -EINVAL;
  1540. }
  1541. return idx;
  1542. }
  1543. static int mi2s_get_sample_rate(int value)
  1544. {
  1545. int sample_rate = 0;
  1546. switch (value) {
  1547. case 0:
  1548. sample_rate = SAMPLING_RATE_8KHZ;
  1549. break;
  1550. case 1:
  1551. sample_rate = SAMPLING_RATE_11P025KHZ;
  1552. break;
  1553. case 2:
  1554. sample_rate = SAMPLING_RATE_16KHZ;
  1555. break;
  1556. case 3:
  1557. sample_rate = SAMPLING_RATE_22P05KHZ;
  1558. break;
  1559. case 4:
  1560. sample_rate = SAMPLING_RATE_32KHZ;
  1561. break;
  1562. case 5:
  1563. sample_rate = SAMPLING_RATE_44P1KHZ;
  1564. break;
  1565. case 6:
  1566. sample_rate = SAMPLING_RATE_48KHZ;
  1567. break;
  1568. case 7:
  1569. sample_rate = SAMPLING_RATE_96KHZ;
  1570. break;
  1571. case 8:
  1572. sample_rate = SAMPLING_RATE_192KHZ;
  1573. break;
  1574. default:
  1575. sample_rate = SAMPLING_RATE_48KHZ;
  1576. break;
  1577. }
  1578. return sample_rate;
  1579. }
  1580. static int mi2s_get_sample_rate_val(int sample_rate)
  1581. {
  1582. int sample_rate_val = 0;
  1583. switch (sample_rate) {
  1584. case SAMPLING_RATE_8KHZ:
  1585. sample_rate_val = 0;
  1586. break;
  1587. case SAMPLING_RATE_11P025KHZ:
  1588. sample_rate_val = 1;
  1589. break;
  1590. case SAMPLING_RATE_16KHZ:
  1591. sample_rate_val = 2;
  1592. break;
  1593. case SAMPLING_RATE_22P05KHZ:
  1594. sample_rate_val = 3;
  1595. break;
  1596. case SAMPLING_RATE_32KHZ:
  1597. sample_rate_val = 4;
  1598. break;
  1599. case SAMPLING_RATE_44P1KHZ:
  1600. sample_rate_val = 5;
  1601. break;
  1602. case SAMPLING_RATE_48KHZ:
  1603. sample_rate_val = 6;
  1604. break;
  1605. case SAMPLING_RATE_96KHZ:
  1606. sample_rate_val = 7;
  1607. break;
  1608. case SAMPLING_RATE_192KHZ:
  1609. sample_rate_val = 8;
  1610. break;
  1611. default:
  1612. sample_rate_val = 6;
  1613. break;
  1614. }
  1615. return sample_rate_val;
  1616. }
  1617. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1618. struct snd_ctl_elem_value *ucontrol)
  1619. {
  1620. int idx = mi2s_get_port_idx(kcontrol);
  1621. if (idx < 0)
  1622. return idx;
  1623. ucontrol->value.enumerated.item[0] =
  1624. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1625. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1626. idx, mi2s_rx_cfg[idx].sample_rate,
  1627. ucontrol->value.enumerated.item[0]);
  1628. return 0;
  1629. }
  1630. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1631. struct snd_ctl_elem_value *ucontrol)
  1632. {
  1633. int idx = mi2s_get_port_idx(kcontrol);
  1634. if (idx < 0)
  1635. return idx;
  1636. mi2s_rx_cfg[idx].sample_rate =
  1637. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1638. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1639. idx, mi2s_rx_cfg[idx].sample_rate,
  1640. ucontrol->value.enumerated.item[0]);
  1641. return 0;
  1642. }
  1643. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1644. struct snd_ctl_elem_value *ucontrol)
  1645. {
  1646. int idx = mi2s_get_port_idx(kcontrol);
  1647. if (idx < 0)
  1648. return idx;
  1649. ucontrol->value.enumerated.item[0] =
  1650. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1651. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1652. idx, mi2s_tx_cfg[idx].sample_rate,
  1653. ucontrol->value.enumerated.item[0]);
  1654. return 0;
  1655. }
  1656. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1657. struct snd_ctl_elem_value *ucontrol)
  1658. {
  1659. int idx = mi2s_get_port_idx(kcontrol);
  1660. if (idx < 0)
  1661. return idx;
  1662. mi2s_tx_cfg[idx].sample_rate =
  1663. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1664. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1665. idx, mi2s_tx_cfg[idx].sample_rate,
  1666. ucontrol->value.enumerated.item[0]);
  1667. return 0;
  1668. }
  1669. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1670. struct snd_ctl_elem_value *ucontrol)
  1671. {
  1672. int idx = mi2s_get_port_idx(kcontrol);
  1673. if (idx < 0)
  1674. return idx;
  1675. ucontrol->value.enumerated.item[0] =
  1676. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1677. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1678. idx, mi2s_rx_cfg[idx].bit_format,
  1679. ucontrol->value.enumerated.item[0]);
  1680. return 0;
  1681. }
  1682. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1683. struct snd_ctl_elem_value *ucontrol)
  1684. {
  1685. int idx = mi2s_get_port_idx(kcontrol);
  1686. if (idx < 0)
  1687. return idx;
  1688. mi2s_rx_cfg[idx].bit_format =
  1689. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1690. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1691. idx, mi2s_rx_cfg[idx].bit_format,
  1692. ucontrol->value.enumerated.item[0]);
  1693. return 0;
  1694. }
  1695. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1696. struct snd_ctl_elem_value *ucontrol)
  1697. {
  1698. int idx = mi2s_get_port_idx(kcontrol);
  1699. if (idx < 0)
  1700. return idx;
  1701. ucontrol->value.enumerated.item[0] =
  1702. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1703. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1704. idx, mi2s_tx_cfg[idx].bit_format,
  1705. ucontrol->value.enumerated.item[0]);
  1706. return 0;
  1707. }
  1708. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1709. struct snd_ctl_elem_value *ucontrol)
  1710. {
  1711. int idx = mi2s_get_port_idx(kcontrol);
  1712. if (idx < 0)
  1713. return idx;
  1714. mi2s_tx_cfg[idx].bit_format =
  1715. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1716. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1717. idx, mi2s_tx_cfg[idx].bit_format,
  1718. ucontrol->value.enumerated.item[0]);
  1719. return 0;
  1720. }
  1721. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1722. struct snd_ctl_elem_value *ucontrol)
  1723. {
  1724. int idx = mi2s_get_port_idx(kcontrol);
  1725. if (idx < 0)
  1726. return idx;
  1727. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1728. idx, mi2s_rx_cfg[idx].channels);
  1729. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1730. return 0;
  1731. }
  1732. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1733. struct snd_ctl_elem_value *ucontrol)
  1734. {
  1735. int idx = mi2s_get_port_idx(kcontrol);
  1736. if (idx < 0)
  1737. return idx;
  1738. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1739. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1740. idx, mi2s_rx_cfg[idx].channels);
  1741. return 1;
  1742. }
  1743. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1744. struct snd_ctl_elem_value *ucontrol)
  1745. {
  1746. int idx = mi2s_get_port_idx(kcontrol);
  1747. if (idx < 0)
  1748. return idx;
  1749. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1750. idx, mi2s_tx_cfg[idx].channels);
  1751. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1752. return 0;
  1753. }
  1754. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1755. struct snd_ctl_elem_value *ucontrol)
  1756. {
  1757. int idx = mi2s_get_port_idx(kcontrol);
  1758. if (idx < 0)
  1759. return idx;
  1760. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1761. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1762. idx, mi2s_tx_cfg[idx].channels);
  1763. return 1;
  1764. }
  1765. static int msm_get_port_id(int be_id)
  1766. {
  1767. int afe_port_id = 0;
  1768. switch (be_id) {
  1769. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1770. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1771. break;
  1772. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1773. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1774. break;
  1775. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1776. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1777. break;
  1778. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1779. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1780. break;
  1781. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1782. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1783. break;
  1784. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1785. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1786. break;
  1787. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  1788. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  1789. break;
  1790. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  1791. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  1792. break;
  1793. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  1794. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
  1795. break;
  1796. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  1797. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
  1798. break;
  1799. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  1800. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
  1801. break;
  1802. default:
  1803. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1804. afe_port_id = -EINVAL;
  1805. }
  1806. return afe_port_id;
  1807. }
  1808. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1809. {
  1810. u32 bit_per_sample = 0;
  1811. switch (bit_format) {
  1812. case SNDRV_PCM_FORMAT_S32_LE:
  1813. case SNDRV_PCM_FORMAT_S24_3LE:
  1814. case SNDRV_PCM_FORMAT_S24_LE:
  1815. bit_per_sample = 32;
  1816. break;
  1817. case SNDRV_PCM_FORMAT_S16_LE:
  1818. default:
  1819. bit_per_sample = 16;
  1820. break;
  1821. }
  1822. return bit_per_sample;
  1823. }
  1824. static void update_mi2s_clk_val(int dai_id, int stream)
  1825. {
  1826. u32 bit_per_sample = 0;
  1827. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1828. bit_per_sample =
  1829. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1830. mi2s_clk[dai_id].clk_freq_in_hz =
  1831. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1832. } else {
  1833. bit_per_sample =
  1834. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1835. mi2s_clk[dai_id].clk_freq_in_hz =
  1836. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1837. }
  1838. }
  1839. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1840. {
  1841. int ret = 0;
  1842. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1843. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1844. int port_id = 0;
  1845. int index = cpu_dai->id;
  1846. port_id = msm_get_port_id(rtd->dai_link->id);
  1847. if (port_id < 0) {
  1848. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1849. ret = port_id;
  1850. goto err;
  1851. }
  1852. if (enable) {
  1853. update_mi2s_clk_val(index, substream->stream);
  1854. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1855. mi2s_clk[index].clk_freq_in_hz);
  1856. }
  1857. mi2s_clk[index].enable = enable;
  1858. ret = afe_set_lpass_clock_v2(port_id,
  1859. &mi2s_clk[index]);
  1860. if (ret < 0) {
  1861. dev_err(rtd->card->dev,
  1862. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1863. __func__, port_id, ret);
  1864. goto err;
  1865. }
  1866. err:
  1867. return ret;
  1868. }
  1869. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1870. {
  1871. int idx = 0;
  1872. if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1873. sizeof("RX_CDC_DMA_RX_0")))
  1874. idx = RX_CDC_DMA_RX_0;
  1875. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1876. sizeof("RX_CDC_DMA_RX_1")))
  1877. idx = RX_CDC_DMA_RX_1;
  1878. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1879. sizeof("RX_CDC_DMA_RX_2")))
  1880. idx = RX_CDC_DMA_RX_2;
  1881. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1882. sizeof("RX_CDC_DMA_RX_3")))
  1883. idx = RX_CDC_DMA_RX_3;
  1884. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1885. sizeof("RX_CDC_DMA_RX_5")))
  1886. idx = RX_CDC_DMA_RX_5;
  1887. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1888. sizeof("TX_CDC_DMA_TX_0")))
  1889. idx = TX_CDC_DMA_TX_0;
  1890. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1891. sizeof("TX_CDC_DMA_TX_3")))
  1892. idx = TX_CDC_DMA_TX_3;
  1893. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1894. sizeof("TX_CDC_DMA_TX_4")))
  1895. idx = TX_CDC_DMA_TX_4;
  1896. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  1897. sizeof("VA_CDC_DMA_TX_0")))
  1898. idx = VA_CDC_DMA_TX_0;
  1899. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  1900. sizeof("VA_CDC_DMA_TX_1")))
  1901. idx = VA_CDC_DMA_TX_1;
  1902. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
  1903. sizeof("VA_CDC_DMA_TX_2")))
  1904. idx = VA_CDC_DMA_TX_2;
  1905. else {
  1906. pr_err("%s: unsupported channel: %s\n",
  1907. __func__, kcontrol->id.name);
  1908. return -EINVAL;
  1909. }
  1910. return idx;
  1911. }
  1912. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1913. struct snd_ctl_elem_value *ucontrol)
  1914. {
  1915. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1916. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  1917. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1918. return ch_num;
  1919. }
  1920. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1921. cdc_dma_rx_cfg[ch_num].channels - 1);
  1922. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1923. return 0;
  1924. }
  1925. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1926. struct snd_ctl_elem_value *ucontrol)
  1927. {
  1928. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1929. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  1930. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1931. return ch_num;
  1932. }
  1933. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1934. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1935. cdc_dma_rx_cfg[ch_num].channels);
  1936. return 1;
  1937. }
  1938. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1939. struct snd_ctl_elem_value *ucontrol)
  1940. {
  1941. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1942. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  1943. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1944. return ch_num;
  1945. }
  1946. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1947. case SNDRV_PCM_FORMAT_S32_LE:
  1948. ucontrol->value.integer.value[0] = 3;
  1949. break;
  1950. case SNDRV_PCM_FORMAT_S24_3LE:
  1951. ucontrol->value.integer.value[0] = 2;
  1952. break;
  1953. case SNDRV_PCM_FORMAT_S24_LE:
  1954. ucontrol->value.integer.value[0] = 1;
  1955. break;
  1956. case SNDRV_PCM_FORMAT_S16_LE:
  1957. default:
  1958. ucontrol->value.integer.value[0] = 0;
  1959. break;
  1960. }
  1961. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1962. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1963. ucontrol->value.integer.value[0]);
  1964. return 0;
  1965. }
  1966. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1967. struct snd_ctl_elem_value *ucontrol)
  1968. {
  1969. int rc = 0;
  1970. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1971. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  1972. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1973. return ch_num;
  1974. }
  1975. switch (ucontrol->value.integer.value[0]) {
  1976. case 3:
  1977. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1978. break;
  1979. case 2:
  1980. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1981. break;
  1982. case 1:
  1983. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1984. break;
  1985. case 0:
  1986. default:
  1987. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1988. break;
  1989. }
  1990. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1991. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1992. ucontrol->value.integer.value[0]);
  1993. return rc;
  1994. }
  1995. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1996. {
  1997. int sample_rate_val = 0;
  1998. switch (sample_rate) {
  1999. case SAMPLING_RATE_8KHZ:
  2000. sample_rate_val = 0;
  2001. break;
  2002. case SAMPLING_RATE_11P025KHZ:
  2003. sample_rate_val = 1;
  2004. break;
  2005. case SAMPLING_RATE_16KHZ:
  2006. sample_rate_val = 2;
  2007. break;
  2008. case SAMPLING_RATE_22P05KHZ:
  2009. sample_rate_val = 3;
  2010. break;
  2011. case SAMPLING_RATE_32KHZ:
  2012. sample_rate_val = 4;
  2013. break;
  2014. case SAMPLING_RATE_44P1KHZ:
  2015. sample_rate_val = 5;
  2016. break;
  2017. case SAMPLING_RATE_48KHZ:
  2018. sample_rate_val = 6;
  2019. break;
  2020. case SAMPLING_RATE_88P2KHZ:
  2021. sample_rate_val = 7;
  2022. break;
  2023. case SAMPLING_RATE_96KHZ:
  2024. sample_rate_val = 8;
  2025. break;
  2026. case SAMPLING_RATE_176P4KHZ:
  2027. sample_rate_val = 9;
  2028. break;
  2029. case SAMPLING_RATE_192KHZ:
  2030. sample_rate_val = 10;
  2031. break;
  2032. case SAMPLING_RATE_352P8KHZ:
  2033. sample_rate_val = 11;
  2034. break;
  2035. case SAMPLING_RATE_384KHZ:
  2036. sample_rate_val = 12;
  2037. break;
  2038. default:
  2039. sample_rate_val = 6;
  2040. break;
  2041. }
  2042. return sample_rate_val;
  2043. }
  2044. static int cdc_dma_get_sample_rate(int value)
  2045. {
  2046. int sample_rate = 0;
  2047. switch (value) {
  2048. case 0:
  2049. sample_rate = SAMPLING_RATE_8KHZ;
  2050. break;
  2051. case 1:
  2052. sample_rate = SAMPLING_RATE_11P025KHZ;
  2053. break;
  2054. case 2:
  2055. sample_rate = SAMPLING_RATE_16KHZ;
  2056. break;
  2057. case 3:
  2058. sample_rate = SAMPLING_RATE_22P05KHZ;
  2059. break;
  2060. case 4:
  2061. sample_rate = SAMPLING_RATE_32KHZ;
  2062. break;
  2063. case 5:
  2064. sample_rate = SAMPLING_RATE_44P1KHZ;
  2065. break;
  2066. case 6:
  2067. sample_rate = SAMPLING_RATE_48KHZ;
  2068. break;
  2069. case 7:
  2070. sample_rate = SAMPLING_RATE_88P2KHZ;
  2071. break;
  2072. case 8:
  2073. sample_rate = SAMPLING_RATE_96KHZ;
  2074. break;
  2075. case 9:
  2076. sample_rate = SAMPLING_RATE_176P4KHZ;
  2077. break;
  2078. case 10:
  2079. sample_rate = SAMPLING_RATE_192KHZ;
  2080. break;
  2081. case 11:
  2082. sample_rate = SAMPLING_RATE_352P8KHZ;
  2083. break;
  2084. case 12:
  2085. sample_rate = SAMPLING_RATE_384KHZ;
  2086. break;
  2087. default:
  2088. sample_rate = SAMPLING_RATE_48KHZ;
  2089. break;
  2090. }
  2091. return sample_rate;
  2092. }
  2093. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2094. struct snd_ctl_elem_value *ucontrol)
  2095. {
  2096. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2097. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2098. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2099. return ch_num;
  2100. }
  2101. ucontrol->value.enumerated.item[0] =
  2102. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  2103. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  2104. cdc_dma_rx_cfg[ch_num].sample_rate);
  2105. return 0;
  2106. }
  2107. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2108. struct snd_ctl_elem_value *ucontrol)
  2109. {
  2110. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2111. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2112. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2113. return ch_num;
  2114. }
  2115. cdc_dma_rx_cfg[ch_num].sample_rate =
  2116. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2117. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  2118. __func__, ucontrol->value.enumerated.item[0],
  2119. cdc_dma_rx_cfg[ch_num].sample_rate);
  2120. return 0;
  2121. }
  2122. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  2123. struct snd_ctl_elem_value *ucontrol)
  2124. {
  2125. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2126. if (ch_num < 0) {
  2127. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2128. return ch_num;
  2129. }
  2130. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2131. cdc_dma_tx_cfg[ch_num].channels);
  2132. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  2133. return 0;
  2134. }
  2135. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  2136. struct snd_ctl_elem_value *ucontrol)
  2137. {
  2138. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2139. if (ch_num < 0) {
  2140. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2141. return ch_num;
  2142. }
  2143. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2144. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2145. cdc_dma_tx_cfg[ch_num].channels);
  2146. return 1;
  2147. }
  2148. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2149. struct snd_ctl_elem_value *ucontrol)
  2150. {
  2151. int sample_rate_val;
  2152. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2153. if (ch_num < 0) {
  2154. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2155. return ch_num;
  2156. }
  2157. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2158. case SAMPLING_RATE_384KHZ:
  2159. sample_rate_val = 12;
  2160. break;
  2161. case SAMPLING_RATE_352P8KHZ:
  2162. sample_rate_val = 11;
  2163. break;
  2164. case SAMPLING_RATE_192KHZ:
  2165. sample_rate_val = 10;
  2166. break;
  2167. case SAMPLING_RATE_176P4KHZ:
  2168. sample_rate_val = 9;
  2169. break;
  2170. case SAMPLING_RATE_96KHZ:
  2171. sample_rate_val = 8;
  2172. break;
  2173. case SAMPLING_RATE_88P2KHZ:
  2174. sample_rate_val = 7;
  2175. break;
  2176. case SAMPLING_RATE_48KHZ:
  2177. sample_rate_val = 6;
  2178. break;
  2179. case SAMPLING_RATE_44P1KHZ:
  2180. sample_rate_val = 5;
  2181. break;
  2182. case SAMPLING_RATE_32KHZ:
  2183. sample_rate_val = 4;
  2184. break;
  2185. case SAMPLING_RATE_22P05KHZ:
  2186. sample_rate_val = 3;
  2187. break;
  2188. case SAMPLING_RATE_16KHZ:
  2189. sample_rate_val = 2;
  2190. break;
  2191. case SAMPLING_RATE_11P025KHZ:
  2192. sample_rate_val = 1;
  2193. break;
  2194. case SAMPLING_RATE_8KHZ:
  2195. sample_rate_val = 0;
  2196. break;
  2197. default:
  2198. sample_rate_val = 6;
  2199. break;
  2200. }
  2201. ucontrol->value.integer.value[0] = sample_rate_val;
  2202. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2203. cdc_dma_tx_cfg[ch_num].sample_rate);
  2204. return 0;
  2205. }
  2206. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2207. struct snd_ctl_elem_value *ucontrol)
  2208. {
  2209. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2210. if (ch_num < 0) {
  2211. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2212. return ch_num;
  2213. }
  2214. switch (ucontrol->value.integer.value[0]) {
  2215. case 12:
  2216. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2217. break;
  2218. case 11:
  2219. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2220. break;
  2221. case 10:
  2222. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2223. break;
  2224. case 9:
  2225. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2226. break;
  2227. case 8:
  2228. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2229. break;
  2230. case 7:
  2231. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2232. break;
  2233. case 6:
  2234. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2235. break;
  2236. case 5:
  2237. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2238. break;
  2239. case 4:
  2240. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2241. break;
  2242. case 3:
  2243. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2244. break;
  2245. case 2:
  2246. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2247. break;
  2248. case 1:
  2249. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2250. break;
  2251. case 0:
  2252. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2253. break;
  2254. default:
  2255. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2256. break;
  2257. }
  2258. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2259. __func__, ucontrol->value.integer.value[0],
  2260. cdc_dma_tx_cfg[ch_num].sample_rate);
  2261. return 0;
  2262. }
  2263. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2264. struct snd_ctl_elem_value *ucontrol)
  2265. {
  2266. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2267. if (ch_num < 0) {
  2268. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2269. return ch_num;
  2270. }
  2271. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2272. case SNDRV_PCM_FORMAT_S32_LE:
  2273. ucontrol->value.integer.value[0] = 3;
  2274. break;
  2275. case SNDRV_PCM_FORMAT_S24_3LE:
  2276. ucontrol->value.integer.value[0] = 2;
  2277. break;
  2278. case SNDRV_PCM_FORMAT_S24_LE:
  2279. ucontrol->value.integer.value[0] = 1;
  2280. break;
  2281. case SNDRV_PCM_FORMAT_S16_LE:
  2282. default:
  2283. ucontrol->value.integer.value[0] = 0;
  2284. break;
  2285. }
  2286. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2287. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2288. ucontrol->value.integer.value[0]);
  2289. return 0;
  2290. }
  2291. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2292. struct snd_ctl_elem_value *ucontrol)
  2293. {
  2294. int rc = 0;
  2295. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2296. if (ch_num < 0) {
  2297. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2298. return ch_num;
  2299. }
  2300. switch (ucontrol->value.integer.value[0]) {
  2301. case 3:
  2302. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2303. break;
  2304. case 2:
  2305. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2306. break;
  2307. case 1:
  2308. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2309. break;
  2310. case 0:
  2311. default:
  2312. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2313. break;
  2314. }
  2315. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2316. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2317. ucontrol->value.integer.value[0]);
  2318. return rc;
  2319. }
  2320. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2321. {
  2322. int idx = 0;
  2323. switch (be_id) {
  2324. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2325. idx = RX_CDC_DMA_RX_0;
  2326. break;
  2327. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2328. idx = RX_CDC_DMA_RX_1;
  2329. break;
  2330. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2331. idx = RX_CDC_DMA_RX_2;
  2332. break;
  2333. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2334. idx = RX_CDC_DMA_RX_3;
  2335. break;
  2336. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2337. idx = RX_CDC_DMA_RX_5;
  2338. break;
  2339. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2340. idx = TX_CDC_DMA_TX_0;
  2341. break;
  2342. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2343. idx = TX_CDC_DMA_TX_3;
  2344. break;
  2345. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2346. idx = TX_CDC_DMA_TX_4;
  2347. break;
  2348. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2349. idx = VA_CDC_DMA_TX_0;
  2350. break;
  2351. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2352. idx = VA_CDC_DMA_TX_1;
  2353. break;
  2354. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2355. idx = VA_CDC_DMA_TX_2;
  2356. break;
  2357. default:
  2358. idx = RX_CDC_DMA_RX_0;
  2359. break;
  2360. }
  2361. return idx;
  2362. }
  2363. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  2364. struct snd_ctl_elem_value *ucontrol)
  2365. {
  2366. /*
  2367. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  2368. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  2369. * value.
  2370. */
  2371. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2372. case SAMPLING_RATE_96KHZ:
  2373. ucontrol->value.integer.value[0] = 5;
  2374. break;
  2375. case SAMPLING_RATE_88P2KHZ:
  2376. ucontrol->value.integer.value[0] = 4;
  2377. break;
  2378. case SAMPLING_RATE_48KHZ:
  2379. ucontrol->value.integer.value[0] = 3;
  2380. break;
  2381. case SAMPLING_RATE_44P1KHZ:
  2382. ucontrol->value.integer.value[0] = 2;
  2383. break;
  2384. case SAMPLING_RATE_16KHZ:
  2385. ucontrol->value.integer.value[0] = 1;
  2386. break;
  2387. case SAMPLING_RATE_8KHZ:
  2388. default:
  2389. ucontrol->value.integer.value[0] = 0;
  2390. break;
  2391. }
  2392. pr_debug("%s: sample rate = %d\n", __func__,
  2393. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2394. return 0;
  2395. }
  2396. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  2397. struct snd_ctl_elem_value *ucontrol)
  2398. {
  2399. switch (ucontrol->value.integer.value[0]) {
  2400. case 1:
  2401. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2402. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2403. break;
  2404. case 2:
  2405. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2406. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2407. break;
  2408. case 3:
  2409. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2410. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2411. break;
  2412. case 4:
  2413. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2414. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2415. break;
  2416. case 5:
  2417. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2418. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2419. break;
  2420. case 0:
  2421. default:
  2422. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2423. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2424. break;
  2425. }
  2426. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  2427. __func__,
  2428. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2429. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2430. ucontrol->value.enumerated.item[0]);
  2431. return 0;
  2432. }
  2433. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  2434. struct snd_ctl_elem_value *ucontrol)
  2435. {
  2436. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2437. case SAMPLING_RATE_96KHZ:
  2438. ucontrol->value.integer.value[0] = 5;
  2439. break;
  2440. case SAMPLING_RATE_88P2KHZ:
  2441. ucontrol->value.integer.value[0] = 4;
  2442. break;
  2443. case SAMPLING_RATE_48KHZ:
  2444. ucontrol->value.integer.value[0] = 3;
  2445. break;
  2446. case SAMPLING_RATE_44P1KHZ:
  2447. ucontrol->value.integer.value[0] = 2;
  2448. break;
  2449. case SAMPLING_RATE_16KHZ:
  2450. ucontrol->value.integer.value[0] = 1;
  2451. break;
  2452. case SAMPLING_RATE_8KHZ:
  2453. default:
  2454. ucontrol->value.integer.value[0] = 0;
  2455. break;
  2456. }
  2457. pr_debug("%s: sample rate rx = %d\n", __func__,
  2458. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2459. return 0;
  2460. }
  2461. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  2462. struct snd_ctl_elem_value *ucontrol)
  2463. {
  2464. switch (ucontrol->value.integer.value[0]) {
  2465. case 1:
  2466. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2467. break;
  2468. case 2:
  2469. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2470. break;
  2471. case 3:
  2472. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2473. break;
  2474. case 4:
  2475. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2476. break;
  2477. case 5:
  2478. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2479. break;
  2480. case 0:
  2481. default:
  2482. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2483. break;
  2484. }
  2485. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  2486. __func__,
  2487. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2488. ucontrol->value.enumerated.item[0]);
  2489. return 0;
  2490. }
  2491. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  2492. struct snd_ctl_elem_value *ucontrol)
  2493. {
  2494. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  2495. case SAMPLING_RATE_96KHZ:
  2496. ucontrol->value.integer.value[0] = 5;
  2497. break;
  2498. case SAMPLING_RATE_88P2KHZ:
  2499. ucontrol->value.integer.value[0] = 4;
  2500. break;
  2501. case SAMPLING_RATE_48KHZ:
  2502. ucontrol->value.integer.value[0] = 3;
  2503. break;
  2504. case SAMPLING_RATE_44P1KHZ:
  2505. ucontrol->value.integer.value[0] = 2;
  2506. break;
  2507. case SAMPLING_RATE_16KHZ:
  2508. ucontrol->value.integer.value[0] = 1;
  2509. break;
  2510. case SAMPLING_RATE_8KHZ:
  2511. default:
  2512. ucontrol->value.integer.value[0] = 0;
  2513. break;
  2514. }
  2515. pr_debug("%s: sample rate tx = %d\n", __func__,
  2516. slim_tx_cfg[SLIM_TX_7].sample_rate);
  2517. return 0;
  2518. }
  2519. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  2520. struct snd_ctl_elem_value *ucontrol)
  2521. {
  2522. switch (ucontrol->value.integer.value[0]) {
  2523. case 1:
  2524. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2525. break;
  2526. case 2:
  2527. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2528. break;
  2529. case 3:
  2530. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2531. break;
  2532. case 4:
  2533. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2534. break;
  2535. case 5:
  2536. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2537. break;
  2538. case 0:
  2539. default:
  2540. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2541. break;
  2542. }
  2543. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  2544. __func__,
  2545. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2546. ucontrol->value.enumerated.item[0]);
  2547. return 0;
  2548. }
  2549. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2550. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2551. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2552. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2553. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2554. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2555. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2556. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2557. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2558. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2559. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2560. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2561. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2562. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2563. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2564. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2565. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2566. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2567. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2568. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2569. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2570. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
  2571. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2572. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2573. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2574. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2575. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2576. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2577. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2578. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2579. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2580. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2581. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2582. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2583. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2584. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2585. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2586. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2587. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2588. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2589. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2590. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2591. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2592. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
  2593. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2594. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2595. rx_cdc_dma_rx_0_sample_rate,
  2596. cdc_dma_rx_sample_rate_get,
  2597. cdc_dma_rx_sample_rate_put),
  2598. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2599. rx_cdc_dma_rx_1_sample_rate,
  2600. cdc_dma_rx_sample_rate_get,
  2601. cdc_dma_rx_sample_rate_put),
  2602. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2603. rx_cdc_dma_rx_2_sample_rate,
  2604. cdc_dma_rx_sample_rate_get,
  2605. cdc_dma_rx_sample_rate_put),
  2606. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2607. rx_cdc_dma_rx_3_sample_rate,
  2608. cdc_dma_rx_sample_rate_get,
  2609. cdc_dma_rx_sample_rate_put),
  2610. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2611. rx_cdc_dma_rx_5_sample_rate,
  2612. cdc_dma_rx_sample_rate_get,
  2613. cdc_dma_rx_sample_rate_put),
  2614. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2615. tx_cdc_dma_tx_0_sample_rate,
  2616. cdc_dma_tx_sample_rate_get,
  2617. cdc_dma_tx_sample_rate_put),
  2618. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2619. tx_cdc_dma_tx_3_sample_rate,
  2620. cdc_dma_tx_sample_rate_get,
  2621. cdc_dma_tx_sample_rate_put),
  2622. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2623. tx_cdc_dma_tx_4_sample_rate,
  2624. cdc_dma_tx_sample_rate_get,
  2625. cdc_dma_tx_sample_rate_put),
  2626. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2627. va_cdc_dma_tx_0_sample_rate,
  2628. cdc_dma_tx_sample_rate_get,
  2629. cdc_dma_tx_sample_rate_put),
  2630. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2631. va_cdc_dma_tx_1_sample_rate,
  2632. cdc_dma_tx_sample_rate_get,
  2633. cdc_dma_tx_sample_rate_put),
  2634. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
  2635. va_cdc_dma_tx_2_sample_rate,
  2636. cdc_dma_tx_sample_rate_get,
  2637. cdc_dma_tx_sample_rate_put),
  2638. };
  2639. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2640. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2641. usb_audio_rx_sample_rate_get,
  2642. usb_audio_rx_sample_rate_put),
  2643. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2644. usb_audio_tx_sample_rate_get,
  2645. usb_audio_tx_sample_rate_put),
  2646. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2647. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2648. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2649. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2650. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2651. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2652. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2653. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2654. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2655. proxy_rx_ch_get, proxy_rx_ch_put),
  2656. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  2657. msm_bt_sample_rate_get,
  2658. msm_bt_sample_rate_put),
  2659. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  2660. msm_bt_sample_rate_rx_get,
  2661. msm_bt_sample_rate_rx_put),
  2662. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  2663. msm_bt_sample_rate_tx_get,
  2664. msm_bt_sample_rate_tx_put),
  2665. SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
  2666. afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
  2667. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  2668. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  2669. };
  2670. static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
  2671. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2672. tdm_rx_sample_rate_get,
  2673. tdm_rx_sample_rate_put),
  2674. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2675. tdm_rx_sample_rate_get,
  2676. tdm_rx_sample_rate_put),
  2677. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2678. tdm_rx_sample_rate_get,
  2679. tdm_rx_sample_rate_put),
  2680. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2681. tdm_rx_sample_rate_get,
  2682. tdm_rx_sample_rate_put),
  2683. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2684. tdm_tx_sample_rate_get,
  2685. tdm_tx_sample_rate_put),
  2686. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2687. tdm_tx_sample_rate_get,
  2688. tdm_tx_sample_rate_put),
  2689. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2690. tdm_tx_sample_rate_get,
  2691. tdm_tx_sample_rate_put),
  2692. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2693. tdm_tx_sample_rate_get,
  2694. tdm_tx_sample_rate_put),
  2695. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2696. tdm_rx_format_get,
  2697. tdm_rx_format_put),
  2698. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2699. tdm_rx_format_get,
  2700. tdm_rx_format_put),
  2701. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2702. tdm_rx_format_get,
  2703. tdm_rx_format_put),
  2704. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  2705. tdm_rx_format_get,
  2706. tdm_rx_format_put),
  2707. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2708. tdm_tx_format_get,
  2709. tdm_tx_format_put),
  2710. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2711. tdm_tx_format_get,
  2712. tdm_tx_format_put),
  2713. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2714. tdm_tx_format_get,
  2715. tdm_tx_format_put),
  2716. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  2717. tdm_tx_format_get,
  2718. tdm_tx_format_put),
  2719. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2720. tdm_rx_ch_get,
  2721. tdm_rx_ch_put),
  2722. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2723. tdm_rx_ch_get,
  2724. tdm_rx_ch_put),
  2725. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2726. tdm_rx_ch_get,
  2727. tdm_rx_ch_put),
  2728. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  2729. tdm_rx_ch_get,
  2730. tdm_rx_ch_put),
  2731. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2732. tdm_tx_ch_get,
  2733. tdm_tx_ch_put),
  2734. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2735. tdm_tx_ch_get,
  2736. tdm_tx_ch_put),
  2737. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2738. tdm_tx_ch_get,
  2739. tdm_tx_ch_put),
  2740. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  2741. tdm_tx_ch_get,
  2742. tdm_tx_ch_put),
  2743. };
  2744. static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
  2745. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2746. aux_pcm_rx_sample_rate_get,
  2747. aux_pcm_rx_sample_rate_put),
  2748. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2749. aux_pcm_rx_sample_rate_get,
  2750. aux_pcm_rx_sample_rate_put),
  2751. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2752. aux_pcm_rx_sample_rate_get,
  2753. aux_pcm_rx_sample_rate_put),
  2754. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  2755. aux_pcm_rx_sample_rate_get,
  2756. aux_pcm_rx_sample_rate_put),
  2757. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2758. aux_pcm_tx_sample_rate_get,
  2759. aux_pcm_tx_sample_rate_put),
  2760. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2761. aux_pcm_tx_sample_rate_get,
  2762. aux_pcm_tx_sample_rate_put),
  2763. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2764. aux_pcm_tx_sample_rate_get,
  2765. aux_pcm_tx_sample_rate_put),
  2766. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  2767. aux_pcm_tx_sample_rate_get,
  2768. aux_pcm_tx_sample_rate_put),
  2769. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2770. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2771. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2772. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2773. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2774. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2775. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2776. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2777. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2778. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2779. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2780. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2781. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2782. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2783. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2784. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2785. };
  2786. static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
  2787. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2788. mi2s_rx_sample_rate_get,
  2789. mi2s_rx_sample_rate_put),
  2790. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2791. mi2s_rx_sample_rate_get,
  2792. mi2s_rx_sample_rate_put),
  2793. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2794. mi2s_rx_sample_rate_get,
  2795. mi2s_rx_sample_rate_put),
  2796. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  2797. mi2s_rx_sample_rate_get,
  2798. mi2s_tx_sample_rate_put),
  2799. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2800. mi2s_tx_sample_rate_get,
  2801. mi2s_tx_sample_rate_put),
  2802. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2803. mi2s_tx_sample_rate_get,
  2804. mi2s_tx_sample_rate_put),
  2805. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  2806. mi2s_tx_sample_rate_get,
  2807. mi2s_tx_sample_rate_put),
  2808. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2809. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2810. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2811. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2812. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2813. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2814. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  2815. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2816. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2817. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2818. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2819. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2820. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2821. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2822. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  2823. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2824. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2825. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2826. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2827. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2828. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2829. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2830. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  2831. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2832. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2833. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2834. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2835. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2836. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2837. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2838. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  2839. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2840. };
  2841. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2842. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2843. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2844. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2845. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2846. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2847. aux_pcm_rx_sample_rate_get,
  2848. aux_pcm_rx_sample_rate_put),
  2849. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2850. aux_pcm_tx_sample_rate_get,
  2851. aux_pcm_tx_sample_rate_put),
  2852. };
  2853. static int bengal_send_island_va_config(int32_t be_id)
  2854. {
  2855. int rc = 0;
  2856. int port_id = 0xFFFF;
  2857. port_id = msm_get_port_id(be_id);
  2858. if (port_id < 0) {
  2859. pr_err("%s: Invalid island interface, be_id: %d\n",
  2860. __func__, be_id);
  2861. rc = -EINVAL;
  2862. } else {
  2863. /*
  2864. * send island mode config
  2865. * This should be the first configuration
  2866. */
  2867. rc = afe_send_port_island_mode(port_id);
  2868. if (rc)
  2869. pr_err("%s: afe send island mode failed %d\n",
  2870. __func__, rc);
  2871. }
  2872. return rc;
  2873. }
  2874. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  2875. struct snd_pcm_hw_params *params)
  2876. {
  2877. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2878. struct snd_interval *rate = hw_param_interval(params,
  2879. SNDRV_PCM_HW_PARAM_RATE);
  2880. struct snd_interval *channels = hw_param_interval(params,
  2881. SNDRV_PCM_HW_PARAM_CHANNELS);
  2882. int idx = 0;
  2883. pr_debug("%s: format = %d, rate = %d\n",
  2884. __func__, params_format(params), params_rate(params));
  2885. switch (dai_link->id) {
  2886. case MSM_BACKEND_DAI_USB_RX:
  2887. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2888. usb_rx_cfg.bit_format);
  2889. rate->min = rate->max = usb_rx_cfg.sample_rate;
  2890. channels->min = channels->max = usb_rx_cfg.channels;
  2891. break;
  2892. case MSM_BACKEND_DAI_USB_TX:
  2893. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2894. usb_tx_cfg.bit_format);
  2895. rate->min = rate->max = usb_tx_cfg.sample_rate;
  2896. channels->min = channels->max = usb_tx_cfg.channels;
  2897. break;
  2898. case MSM_BACKEND_DAI_AFE_PCM_RX:
  2899. channels->min = channels->max = proxy_rx_cfg.channels;
  2900. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2901. break;
  2902. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  2903. channels->min = channels->max =
  2904. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2905. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2906. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  2907. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  2908. break;
  2909. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  2910. channels->min = channels->max =
  2911. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2912. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2913. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  2914. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  2915. break;
  2916. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  2917. channels->min = channels->max =
  2918. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2919. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2920. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  2921. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  2922. break;
  2923. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  2924. channels->min = channels->max =
  2925. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2926. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2927. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  2928. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  2929. break;
  2930. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  2931. channels->min = channels->max =
  2932. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2933. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2934. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  2935. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  2936. break;
  2937. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  2938. channels->min = channels->max =
  2939. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2940. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2941. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  2942. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  2943. break;
  2944. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  2945. channels->min = channels->max =
  2946. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  2947. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2948. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  2949. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  2950. break;
  2951. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  2952. channels->min = channels->max =
  2953. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  2954. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2955. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  2956. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  2957. break;
  2958. case MSM_BACKEND_DAI_AUXPCM_RX:
  2959. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2960. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  2961. rate->min = rate->max =
  2962. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  2963. channels->min = channels->max =
  2964. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  2965. break;
  2966. case MSM_BACKEND_DAI_AUXPCM_TX:
  2967. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2968. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  2969. rate->min = rate->max =
  2970. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  2971. channels->min = channels->max =
  2972. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  2973. break;
  2974. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  2975. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2976. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  2977. rate->min = rate->max =
  2978. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  2979. channels->min = channels->max =
  2980. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  2981. break;
  2982. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  2983. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2984. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  2985. rate->min = rate->max =
  2986. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  2987. channels->min = channels->max =
  2988. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  2989. break;
  2990. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  2991. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2992. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  2993. rate->min = rate->max =
  2994. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  2995. channels->min = channels->max =
  2996. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  2997. break;
  2998. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  2999. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3000. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3001. rate->min = rate->max =
  3002. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3003. channels->min = channels->max =
  3004. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3005. break;
  3006. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3007. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3008. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3009. rate->min = rate->max =
  3010. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3011. channels->min = channels->max =
  3012. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3013. break;
  3014. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3015. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3016. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3017. rate->min = rate->max =
  3018. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3019. channels->min = channels->max =
  3020. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3021. break;
  3022. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3023. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3024. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3025. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3026. channels->min = channels->max =
  3027. mi2s_rx_cfg[PRIM_MI2S].channels;
  3028. break;
  3029. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3030. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3031. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3032. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3033. channels->min = channels->max =
  3034. mi2s_tx_cfg[PRIM_MI2S].channels;
  3035. break;
  3036. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3037. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3038. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3039. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3040. channels->min = channels->max =
  3041. mi2s_rx_cfg[SEC_MI2S].channels;
  3042. break;
  3043. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3044. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3045. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3046. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3047. channels->min = channels->max =
  3048. mi2s_tx_cfg[SEC_MI2S].channels;
  3049. break;
  3050. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3051. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3052. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3053. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3054. channels->min = channels->max =
  3055. mi2s_rx_cfg[TERT_MI2S].channels;
  3056. break;
  3057. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3058. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3059. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3060. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3061. channels->min = channels->max =
  3062. mi2s_tx_cfg[TERT_MI2S].channels;
  3063. break;
  3064. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3065. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3066. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3067. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3068. channels->min = channels->max =
  3069. mi2s_rx_cfg[QUAT_MI2S].channels;
  3070. break;
  3071. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3072. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3073. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3074. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3075. channels->min = channels->max =
  3076. mi2s_tx_cfg[QUAT_MI2S].channels;
  3077. break;
  3078. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3079. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3080. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3081. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3082. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3083. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3084. cdc_dma_rx_cfg[idx].bit_format);
  3085. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3086. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3087. break;
  3088. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3089. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3090. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3091. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3092. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3093. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3094. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3095. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3096. cdc_dma_tx_cfg[idx].bit_format);
  3097. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3098. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3099. break;
  3100. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3101. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3102. slim_rx_cfg[SLIM_RX_7].bit_format);
  3103. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3104. channels->min = channels->max =
  3105. slim_rx_cfg[SLIM_RX_7].channels;
  3106. break;
  3107. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3108. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3109. slim_tx_cfg[SLIM_TX_7].bit_format);
  3110. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3111. channels->min = channels->max =
  3112. slim_tx_cfg[SLIM_TX_7].channels;
  3113. break;
  3114. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3115. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3116. channels->min = channels->max =
  3117. slim_tx_cfg[SLIM_TX_8].channels;
  3118. break;
  3119. case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
  3120. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3121. afe_loopback_tx_cfg[idx].bit_format);
  3122. rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
  3123. channels->min = channels->max =
  3124. afe_loopback_tx_cfg[idx].channels;
  3125. break;
  3126. default:
  3127. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3128. break;
  3129. }
  3130. return 0;
  3131. }
  3132. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
  3133. bool active)
  3134. {
  3135. struct snd_soc_card *card = component->card;
  3136. struct msm_asoc_mach_data *pdata =
  3137. snd_soc_card_get_drvdata(card);
  3138. if (!pdata->fsa_handle)
  3139. return false;
  3140. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  3141. }
  3142. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  3143. {
  3144. int value = 0;
  3145. bool ret = false;
  3146. struct snd_soc_card *card;
  3147. struct msm_asoc_mach_data *pdata;
  3148. if (!component) {
  3149. pr_err("%s component is NULL\n", __func__);
  3150. return false;
  3151. }
  3152. card = component->card;
  3153. pdata = snd_soc_card_get_drvdata(card);
  3154. if (!pdata)
  3155. return false;
  3156. if (wcd_mbhc_cfg.enable_usbc_analog)
  3157. return msm_usbc_swap_gnd_mic(component, active);
  3158. /* if usbc is not defined, swap using us_euro_gpio_p */
  3159. if (pdata->us_euro_gpio_p) {
  3160. value = msm_cdc_pinctrl_get_state(
  3161. pdata->us_euro_gpio_p);
  3162. if (value)
  3163. msm_cdc_pinctrl_select_sleep_state(
  3164. pdata->us_euro_gpio_p);
  3165. else
  3166. msm_cdc_pinctrl_select_active_state(
  3167. pdata->us_euro_gpio_p);
  3168. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  3169. __func__, value, !value);
  3170. ret = true;
  3171. }
  3172. return ret;
  3173. }
  3174. static int bengal_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  3175. struct snd_pcm_hw_params *params)
  3176. {
  3177. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3178. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3179. int ret = 0;
  3180. int slot_width = 32;
  3181. int channels, slots;
  3182. unsigned int slot_mask, rate, clk_freq;
  3183. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  3184. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  3185. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  3186. switch (cpu_dai->id) {
  3187. case AFE_PORT_ID_PRIMARY_TDM_RX:
  3188. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3189. break;
  3190. case AFE_PORT_ID_SECONDARY_TDM_RX:
  3191. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3192. break;
  3193. case AFE_PORT_ID_TERTIARY_TDM_RX:
  3194. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3195. break;
  3196. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  3197. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3198. break;
  3199. case AFE_PORT_ID_PRIMARY_TDM_TX:
  3200. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3201. break;
  3202. case AFE_PORT_ID_SECONDARY_TDM_TX:
  3203. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3204. break;
  3205. case AFE_PORT_ID_TERTIARY_TDM_TX:
  3206. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3207. break;
  3208. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  3209. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3210. break;
  3211. default:
  3212. pr_err("%s: dai id 0x%x not supported\n",
  3213. __func__, cpu_dai->id);
  3214. return -EINVAL;
  3215. }
  3216. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3217. /*2 slot config - bits 0 and 1 set for the first two slots */
  3218. slot_mask = 0x0000FFFF >> (16 - slots);
  3219. channels = slots;
  3220. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  3221. __func__, slot_width, slots);
  3222. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  3223. slots, slot_width);
  3224. if (ret < 0) {
  3225. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  3226. __func__, ret);
  3227. goto end;
  3228. }
  3229. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3230. 0, NULL, channels, slot_offset);
  3231. if (ret < 0) {
  3232. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  3233. __func__, ret);
  3234. goto end;
  3235. }
  3236. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  3237. /*2 slot config - bits 0 and 1 set for the first two slots */
  3238. slot_mask = 0x0000FFFF >> (16 - slots);
  3239. channels = slots;
  3240. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  3241. __func__, slot_width, slots);
  3242. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  3243. slots, slot_width);
  3244. if (ret < 0) {
  3245. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  3246. __func__, ret);
  3247. goto end;
  3248. }
  3249. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3250. channels, slot_offset, 0, NULL);
  3251. if (ret < 0) {
  3252. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  3253. __func__, ret);
  3254. goto end;
  3255. }
  3256. } else {
  3257. ret = -EINVAL;
  3258. pr_err("%s: invalid use case, err:%d\n",
  3259. __func__, ret);
  3260. goto end;
  3261. }
  3262. rate = params_rate(params);
  3263. clk_freq = rate * slot_width * slots;
  3264. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  3265. if (ret < 0)
  3266. pr_err("%s: failed to set tdm clk, err:%d\n",
  3267. __func__, ret);
  3268. end:
  3269. return ret;
  3270. }
  3271. static int msm_get_tdm_mode(u32 port_id)
  3272. {
  3273. int tdm_mode;
  3274. switch (port_id) {
  3275. case AFE_PORT_ID_PRIMARY_TDM_RX:
  3276. case AFE_PORT_ID_PRIMARY_TDM_TX:
  3277. tdm_mode = TDM_PRI;
  3278. break;
  3279. case AFE_PORT_ID_SECONDARY_TDM_RX:
  3280. case AFE_PORT_ID_SECONDARY_TDM_TX:
  3281. tdm_mode = TDM_SEC;
  3282. break;
  3283. case AFE_PORT_ID_TERTIARY_TDM_RX:
  3284. case AFE_PORT_ID_TERTIARY_TDM_TX:
  3285. tdm_mode = TDM_TERT;
  3286. break;
  3287. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  3288. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  3289. tdm_mode = TDM_QUAT;
  3290. break;
  3291. default:
  3292. pr_err("%s: Invalid port id: %d\n", __func__, port_id);
  3293. tdm_mode = -EINVAL;
  3294. }
  3295. return tdm_mode;
  3296. }
  3297. static int bengal_tdm_snd_startup(struct snd_pcm_substream *substream)
  3298. {
  3299. int ret = 0;
  3300. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3301. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3302. struct snd_soc_card *card = rtd->card;
  3303. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3304. int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
  3305. if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
  3306. ret = -EINVAL;
  3307. pr_err("%s: Invalid TDM interface %d\n",
  3308. __func__, ret);
  3309. return ret;
  3310. }
  3311. if (pdata->mi2s_gpio_p[tdm_mode]) {
  3312. if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
  3313. == 0) {
  3314. ret = msm_cdc_pinctrl_select_active_state(
  3315. pdata->mi2s_gpio_p[tdm_mode]);
  3316. if (ret) {
  3317. pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
  3318. __func__, ret);
  3319. goto done;
  3320. }
  3321. }
  3322. atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
  3323. }
  3324. done:
  3325. return ret;
  3326. }
  3327. static void bengal_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  3328. {
  3329. int ret = 0;
  3330. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3331. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3332. struct snd_soc_card *card = rtd->card;
  3333. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3334. int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
  3335. if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
  3336. ret = -EINVAL;
  3337. pr_err("%s: Invalid TDM interface %d\n",
  3338. __func__, ret);
  3339. return;
  3340. }
  3341. if (pdata->mi2s_gpio_p[tdm_mode]) {
  3342. atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
  3343. if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
  3344. == 0) {
  3345. ret = msm_cdc_pinctrl_select_sleep_state(
  3346. pdata->mi2s_gpio_p[tdm_mode]);
  3347. if (ret)
  3348. pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
  3349. __func__, ret);
  3350. }
  3351. }
  3352. }
  3353. static int bengal_aux_snd_startup(struct snd_pcm_substream *substream)
  3354. {
  3355. int ret = 0;
  3356. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3357. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3358. struct snd_soc_card *card = rtd->card;
  3359. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3360. u32 aux_mode = cpu_dai->id - 1;
  3361. if (aux_mode >= AUX_PCM_MAX) {
  3362. ret = -EINVAL;
  3363. pr_err("%s: Invalid AUX interface %d\n",
  3364. __func__, ret);
  3365. return ret;
  3366. }
  3367. if (pdata->mi2s_gpio_p[aux_mode]) {
  3368. if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
  3369. == 0) {
  3370. ret = msm_cdc_pinctrl_select_active_state(
  3371. pdata->mi2s_gpio_p[aux_mode]);
  3372. if (ret) {
  3373. pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
  3374. __func__, ret);
  3375. goto done;
  3376. }
  3377. }
  3378. atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
  3379. }
  3380. done:
  3381. return ret;
  3382. }
  3383. static void bengal_aux_snd_shutdown(struct snd_pcm_substream *substream)
  3384. {
  3385. int ret = 0;
  3386. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3387. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3388. struct snd_soc_card *card = rtd->card;
  3389. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3390. u32 aux_mode = cpu_dai->id - 1;
  3391. if (aux_mode >= AUX_PCM_MAX) {
  3392. pr_err("%s: Invalid AUX interface %d\n",
  3393. __func__, ret);
  3394. return;
  3395. }
  3396. if (pdata->mi2s_gpio_p[aux_mode]) {
  3397. atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
  3398. if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
  3399. == 0) {
  3400. ret = msm_cdc_pinctrl_select_sleep_state(
  3401. pdata->mi2s_gpio_p[aux_mode]);
  3402. if (ret)
  3403. pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
  3404. __func__, ret);
  3405. }
  3406. }
  3407. }
  3408. static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
  3409. {
  3410. int ret = 0;
  3411. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3412. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3413. switch (dai_link->id) {
  3414. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3415. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3416. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3417. if (va_disable)
  3418. break;
  3419. ret = bengal_send_island_va_config(dai_link->id);
  3420. if (ret)
  3421. pr_err("%s: send island va cfg failed, err: %d\n",
  3422. __func__, ret);
  3423. break;
  3424. }
  3425. return ret;
  3426. }
  3427. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  3428. struct snd_pcm_hw_params *params)
  3429. {
  3430. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3431. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3432. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3433. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3434. int ret = 0;
  3435. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  3436. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3437. u32 user_set_tx_ch = 0;
  3438. u32 user_set_rx_ch = 0;
  3439. u32 ch_id;
  3440. ret = snd_soc_dai_get_channel_map(codec_dai,
  3441. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  3442. &rx_ch_cdc_dma);
  3443. if (ret < 0) {
  3444. pr_err("%s: failed to get codec chan map, err:%d\n",
  3445. __func__, ret);
  3446. goto err;
  3447. }
  3448. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3449. switch (dai_link->id) {
  3450. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3451. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3452. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3453. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3454. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  3455. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3456. {
  3457. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3458. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  3459. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  3460. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  3461. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3462. user_set_rx_ch, &rx_ch_cdc_dma);
  3463. if (ret < 0) {
  3464. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3465. __func__, ret);
  3466. goto err;
  3467. }
  3468. }
  3469. break;
  3470. }
  3471. } else {
  3472. switch (dai_link->id) {
  3473. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3474. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3475. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3476. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3477. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3478. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3479. {
  3480. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3481. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  3482. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  3483. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  3484. }
  3485. break;
  3486. }
  3487. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  3488. &tx_ch_cdc_dma, 0, 0);
  3489. if (ret < 0) {
  3490. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3491. __func__, ret);
  3492. goto err;
  3493. }
  3494. }
  3495. err:
  3496. return ret;
  3497. }
  3498. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  3499. {
  3500. cpumask_t mask;
  3501. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  3502. pm_qos_remove_request(&substream->latency_pm_qos_req);
  3503. cpumask_clear(&mask);
  3504. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  3505. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  3506. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  3507. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  3508. pm_qos_add_request(&substream->latency_pm_qos_req,
  3509. PM_QOS_CPU_DMA_LATENCY,
  3510. MSM_LL_QOS_VALUE);
  3511. return 0;
  3512. }
  3513. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  3514. {
  3515. int ret = 0;
  3516. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3517. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3518. int index = cpu_dai->id;
  3519. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  3520. struct snd_soc_card *card = rtd->card;
  3521. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3522. dev_dbg(rtd->card->dev,
  3523. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  3524. __func__, substream->name, substream->stream,
  3525. cpu_dai->name, cpu_dai->id);
  3526. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3527. ret = -EINVAL;
  3528. dev_err(rtd->card->dev,
  3529. "%s: CPU DAI id (%d) out of range\n",
  3530. __func__, cpu_dai->id);
  3531. goto err;
  3532. }
  3533. /*
  3534. * Mutex protection in case the same MI2S
  3535. * interface using for both TX and RX so
  3536. * that the same clock won't be enable twice.
  3537. */
  3538. mutex_lock(&mi2s_intf_conf[index].lock);
  3539. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  3540. /* Check if msm needs to provide the clock to the interface */
  3541. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  3542. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  3543. fmt = SND_SOC_DAIFMT_CBM_CFM;
  3544. }
  3545. ret = msm_mi2s_set_sclk(substream, true);
  3546. if (ret < 0) {
  3547. dev_err(rtd->card->dev,
  3548. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  3549. __func__, ret);
  3550. goto clean_up;
  3551. }
  3552. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  3553. if (ret < 0) {
  3554. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  3555. __func__, index, ret);
  3556. goto clk_off;
  3557. }
  3558. if (pdata->mi2s_gpio_p[index]) {
  3559. if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
  3560. == 0) {
  3561. ret = msm_cdc_pinctrl_select_active_state(
  3562. pdata->mi2s_gpio_p[index]);
  3563. if (ret) {
  3564. pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
  3565. __func__, ret);
  3566. goto clk_off;
  3567. }
  3568. }
  3569. atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
  3570. }
  3571. }
  3572. clk_off:
  3573. if (ret < 0)
  3574. msm_mi2s_set_sclk(substream, false);
  3575. clean_up:
  3576. if (ret < 0)
  3577. mi2s_intf_conf[index].ref_cnt--;
  3578. mutex_unlock(&mi2s_intf_conf[index].lock);
  3579. err:
  3580. return ret;
  3581. }
  3582. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  3583. {
  3584. int ret = 0;
  3585. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3586. int index = rtd->cpu_dai->id;
  3587. struct snd_soc_card *card = rtd->card;
  3588. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3589. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  3590. substream->name, substream->stream);
  3591. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3592. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  3593. return;
  3594. }
  3595. mutex_lock(&mi2s_intf_conf[index].lock);
  3596. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  3597. if (pdata->mi2s_gpio_p[index]) {
  3598. atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
  3599. if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
  3600. == 0) {
  3601. ret = msm_cdc_pinctrl_select_sleep_state(
  3602. pdata->mi2s_gpio_p[index]);
  3603. if (ret)
  3604. pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
  3605. __func__, ret);
  3606. }
  3607. }
  3608. ret = msm_mi2s_set_sclk(substream, false);
  3609. if (ret < 0)
  3610. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  3611. __func__, index, ret);
  3612. }
  3613. mutex_unlock(&mi2s_intf_conf[index].lock);
  3614. }
  3615. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  3616. struct snd_pcm_hw_params *params)
  3617. {
  3618. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3619. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3620. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3621. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3622. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  3623. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3624. int ret = 0;
  3625. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3626. codec_dai->name, codec_dai->id);
  3627. ret = snd_soc_dai_get_channel_map(codec_dai,
  3628. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3629. if (ret) {
  3630. dev_err(rtd->dev,
  3631. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3632. __func__, ret);
  3633. goto err;
  3634. }
  3635. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3636. __func__, tx_ch_cnt, dai_link->id);
  3637. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3638. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3639. if (ret)
  3640. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3641. __func__, ret);
  3642. err:
  3643. return ret;
  3644. }
  3645. static struct snd_soc_ops bengal_aux_be_ops = {
  3646. .startup = bengal_aux_snd_startup,
  3647. .shutdown = bengal_aux_snd_shutdown
  3648. };
  3649. static struct snd_soc_ops bengal_tdm_be_ops = {
  3650. .hw_params = bengal_tdm_snd_hw_params,
  3651. .startup = bengal_tdm_snd_startup,
  3652. .shutdown = bengal_tdm_snd_shutdown
  3653. };
  3654. static struct snd_soc_ops msm_mi2s_be_ops = {
  3655. .startup = msm_mi2s_snd_startup,
  3656. .shutdown = msm_mi2s_snd_shutdown,
  3657. };
  3658. static struct snd_soc_ops msm_fe_qos_ops = {
  3659. .prepare = msm_fe_qos_prepare,
  3660. };
  3661. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  3662. .startup = msm_snd_cdc_dma_startup,
  3663. .hw_params = msm_snd_cdc_dma_hw_params,
  3664. };
  3665. static struct snd_soc_ops msm_wcn_ops = {
  3666. .hw_params = msm_wcn_hw_params,
  3667. };
  3668. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3669. struct snd_kcontrol *kcontrol, int event)
  3670. {
  3671. struct msm_asoc_mach_data *pdata = NULL;
  3672. struct snd_soc_component *component =
  3673. snd_soc_dapm_to_component(w->dapm);
  3674. int ret = 0;
  3675. u32 dmic_idx;
  3676. int *dmic_gpio_cnt;
  3677. struct device_node *dmic_gpio;
  3678. char *wname;
  3679. wname = strpbrk(w->name, "0123");
  3680. if (!wname) {
  3681. dev_err(component->dev, "%s: widget not found\n", __func__);
  3682. return -EINVAL;
  3683. }
  3684. ret = kstrtouint(wname, 10, &dmic_idx);
  3685. if (ret < 0) {
  3686. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3687. __func__);
  3688. return -EINVAL;
  3689. }
  3690. pdata = snd_soc_card_get_drvdata(component->card);
  3691. switch (dmic_idx) {
  3692. case 0:
  3693. case 1:
  3694. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3695. dmic_gpio = pdata->dmic01_gpio_p;
  3696. break;
  3697. case 2:
  3698. case 3:
  3699. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3700. dmic_gpio = pdata->dmic23_gpio_p;
  3701. break;
  3702. default:
  3703. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3704. __func__);
  3705. return -EINVAL;
  3706. }
  3707. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3708. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3709. switch (event) {
  3710. case SND_SOC_DAPM_PRE_PMU:
  3711. (*dmic_gpio_cnt)++;
  3712. if (*dmic_gpio_cnt == 1) {
  3713. ret = msm_cdc_pinctrl_select_active_state(
  3714. dmic_gpio);
  3715. if (ret < 0) {
  3716. pr_err("%s: gpio set cannot be activated %sd",
  3717. __func__, "dmic_gpio");
  3718. return ret;
  3719. }
  3720. }
  3721. break;
  3722. case SND_SOC_DAPM_POST_PMD:
  3723. (*dmic_gpio_cnt)--;
  3724. if (*dmic_gpio_cnt == 0) {
  3725. ret = msm_cdc_pinctrl_select_sleep_state(
  3726. dmic_gpio);
  3727. if (ret < 0) {
  3728. pr_err("%s: gpio set cannot be de-activated %sd",
  3729. __func__, "dmic_gpio");
  3730. return ret;
  3731. }
  3732. }
  3733. break;
  3734. default:
  3735. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3736. return -EINVAL;
  3737. }
  3738. return 0;
  3739. }
  3740. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3741. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3742. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3743. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3744. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3745. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3746. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3747. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3748. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3749. };
  3750. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  3751. {
  3752. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3753. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  3754. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3755. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3756. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3757. }
  3758. #ifndef CONFIG_TDM_DISABLE
  3759. static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
  3760. {
  3761. snd_soc_add_component_controls(component, msm_tdm_snd_controls,
  3762. ARRAY_SIZE(msm_tdm_snd_controls));
  3763. }
  3764. #else
  3765. static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
  3766. {
  3767. return;
  3768. }
  3769. #endif
  3770. #ifndef CONFIG_MI2S_DISABLE
  3771. static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
  3772. {
  3773. snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
  3774. ARRAY_SIZE(msm_mi2s_snd_controls));
  3775. }
  3776. #else
  3777. static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
  3778. {
  3779. return;
  3780. }
  3781. #endif
  3782. #ifndef CONFIG_AUXPCM_DISABLE
  3783. static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
  3784. {
  3785. snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
  3786. ARRAY_SIZE(msm_auxpcm_snd_controls));
  3787. }
  3788. #else
  3789. static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
  3790. {
  3791. return;
  3792. }
  3793. #endif
  3794. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3795. {
  3796. int ret = -EINVAL;
  3797. struct snd_soc_component *component;
  3798. struct snd_soc_dapm_context *dapm;
  3799. struct snd_card *card;
  3800. struct snd_info_entry *entry;
  3801. struct msm_asoc_mach_data *pdata =
  3802. snd_soc_card_get_drvdata(rtd->card);
  3803. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3804. if (!component) {
  3805. pr_err("%s: could not find component for bolero_codec\n",
  3806. __func__);
  3807. return ret;
  3808. }
  3809. dapm = snd_soc_component_get_dapm(component);
  3810. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3811. ARRAY_SIZE(msm_int_snd_controls));
  3812. if (ret < 0) {
  3813. pr_err("%s: add_component_controls failed: %d\n",
  3814. __func__, ret);
  3815. return ret;
  3816. }
  3817. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3818. ARRAY_SIZE(msm_common_snd_controls));
  3819. if (ret < 0) {
  3820. pr_err("%s: add common snd controls failed: %d\n",
  3821. __func__, ret);
  3822. return ret;
  3823. }
  3824. msm_add_tdm_snd_controls(component);
  3825. msm_add_mi2s_snd_controls(component);
  3826. msm_add_auxpcm_snd_controls(component);
  3827. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3828. ARRAY_SIZE(msm_int_dapm_widgets));
  3829. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3830. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3831. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3832. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3833. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3834. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3835. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3836. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3837. snd_soc_dapm_sync(dapm);
  3838. bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
  3839. sm_port_map);
  3840. card = rtd->card->snd_card;
  3841. if (!pdata->codec_root) {
  3842. entry = snd_info_create_subdir(card->module, "codecs",
  3843. card->proc_root);
  3844. if (!entry) {
  3845. pr_debug("%s: Cannot create codecs module entry\n",
  3846. __func__);
  3847. ret = 0;
  3848. goto err;
  3849. }
  3850. pdata->codec_root = entry;
  3851. }
  3852. bolero_info_create_codec_entry(pdata->codec_root, component);
  3853. bolero_register_wake_irq(component, false);
  3854. codec_reg_done = true;
  3855. return 0;
  3856. err:
  3857. return ret;
  3858. }
  3859. static void *def_wcd_mbhc_cal(void)
  3860. {
  3861. void *wcd_mbhc_cal;
  3862. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  3863. u16 *btn_high;
  3864. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  3865. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  3866. if (!wcd_mbhc_cal)
  3867. return NULL;
  3868. WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
  3869. WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
  3870. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  3871. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  3872. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  3873. btn_high[0] = 75;
  3874. btn_high[1] = 150;
  3875. btn_high[2] = 237;
  3876. btn_high[3] = 500;
  3877. btn_high[4] = 500;
  3878. btn_high[5] = 500;
  3879. btn_high[6] = 500;
  3880. btn_high[7] = 500;
  3881. return wcd_mbhc_cal;
  3882. }
  3883. /* Digital audio interface glue - connects codec <---> CPU */
  3884. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3885. /* FrontEnd DAI Links */
  3886. {/* hw:x,0 */
  3887. .name = MSM_DAILINK_NAME(Media1),
  3888. .stream_name = "MultiMedia1",
  3889. .cpu_dai_name = "MultiMedia1",
  3890. .platform_name = "msm-pcm-dsp.0",
  3891. .dynamic = 1,
  3892. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3893. .dpcm_playback = 1,
  3894. .dpcm_capture = 1,
  3895. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3896. SND_SOC_DPCM_TRIGGER_POST},
  3897. .codec_dai_name = "snd-soc-dummy-dai",
  3898. .codec_name = "snd-soc-dummy",
  3899. .ignore_suspend = 1,
  3900. /* this dainlink has playback support */
  3901. .ignore_pmdown_time = 1,
  3902. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3903. },
  3904. {/* hw:x,1 */
  3905. .name = MSM_DAILINK_NAME(Media2),
  3906. .stream_name = "MultiMedia2",
  3907. .cpu_dai_name = "MultiMedia2",
  3908. .platform_name = "msm-pcm-dsp.0",
  3909. .dynamic = 1,
  3910. .dpcm_playback = 1,
  3911. .dpcm_capture = 1,
  3912. .codec_dai_name = "snd-soc-dummy-dai",
  3913. .codec_name = "snd-soc-dummy",
  3914. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3915. SND_SOC_DPCM_TRIGGER_POST},
  3916. .ignore_suspend = 1,
  3917. /* this dainlink has playback support */
  3918. .ignore_pmdown_time = 1,
  3919. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3920. },
  3921. {/* hw:x,2 */
  3922. .name = "VoiceMMode1",
  3923. .stream_name = "VoiceMMode1",
  3924. .cpu_dai_name = "VoiceMMode1",
  3925. .platform_name = "msm-pcm-voice",
  3926. .dynamic = 1,
  3927. .dpcm_playback = 1,
  3928. .dpcm_capture = 1,
  3929. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3930. SND_SOC_DPCM_TRIGGER_POST},
  3931. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3932. .ignore_suspend = 1,
  3933. .ignore_pmdown_time = 1,
  3934. .codec_dai_name = "snd-soc-dummy-dai",
  3935. .codec_name = "snd-soc-dummy",
  3936. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3937. },
  3938. {/* hw:x,3 */
  3939. .name = "MSM VoIP",
  3940. .stream_name = "VoIP",
  3941. .cpu_dai_name = "VoIP",
  3942. .platform_name = "msm-voip-dsp",
  3943. .dynamic = 1,
  3944. .dpcm_playback = 1,
  3945. .dpcm_capture = 1,
  3946. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3947. SND_SOC_DPCM_TRIGGER_POST},
  3948. .codec_dai_name = "snd-soc-dummy-dai",
  3949. .codec_name = "snd-soc-dummy",
  3950. .ignore_suspend = 1,
  3951. /* this dainlink has playback support */
  3952. .ignore_pmdown_time = 1,
  3953. .id = MSM_FRONTEND_DAI_VOIP,
  3954. },
  3955. {/* hw:x,4 */
  3956. .name = MSM_DAILINK_NAME(ULL),
  3957. .stream_name = "MultiMedia3",
  3958. .cpu_dai_name = "MultiMedia3",
  3959. .platform_name = "msm-pcm-dsp.2",
  3960. .dynamic = 1,
  3961. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3962. .dpcm_playback = 1,
  3963. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3964. SND_SOC_DPCM_TRIGGER_POST},
  3965. .codec_dai_name = "snd-soc-dummy-dai",
  3966. .codec_name = "snd-soc-dummy",
  3967. .ignore_suspend = 1,
  3968. /* this dainlink has playback support */
  3969. .ignore_pmdown_time = 1,
  3970. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3971. },
  3972. {/* hw:x,5 */
  3973. .name = "MSM AFE-PCM RX",
  3974. .stream_name = "AFE-PROXY RX",
  3975. .cpu_dai_name = "msm-dai-q6-dev.241",
  3976. .codec_name = "msm-stub-codec.1",
  3977. .codec_dai_name = "msm-stub-rx",
  3978. .platform_name = "msm-pcm-afe",
  3979. .dpcm_playback = 1,
  3980. .ignore_suspend = 1,
  3981. /* this dainlink has playback support */
  3982. .ignore_pmdown_time = 1,
  3983. },
  3984. {/* hw:x,6 */
  3985. .name = "MSM AFE-PCM TX",
  3986. .stream_name = "AFE-PROXY TX",
  3987. .cpu_dai_name = "msm-dai-q6-dev.240",
  3988. .codec_name = "msm-stub-codec.1",
  3989. .codec_dai_name = "msm-stub-tx",
  3990. .platform_name = "msm-pcm-afe",
  3991. .dpcm_capture = 1,
  3992. .ignore_suspend = 1,
  3993. },
  3994. {/* hw:x,7 */
  3995. .name = MSM_DAILINK_NAME(Compress1),
  3996. .stream_name = "Compress1",
  3997. .cpu_dai_name = "MultiMedia4",
  3998. .platform_name = "msm-compress-dsp",
  3999. .dynamic = 1,
  4000. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  4001. .dpcm_playback = 1,
  4002. .dpcm_capture = 1,
  4003. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4004. SND_SOC_DPCM_TRIGGER_POST},
  4005. .codec_dai_name = "snd-soc-dummy-dai",
  4006. .codec_name = "snd-soc-dummy",
  4007. .ignore_suspend = 1,
  4008. .ignore_pmdown_time = 1,
  4009. /* this dainlink has playback support */
  4010. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  4011. },
  4012. /* Hostless PCM purpose */
  4013. {/* hw:x,8 */
  4014. .name = "AUXPCM Hostless",
  4015. .stream_name = "AUXPCM Hostless",
  4016. .cpu_dai_name = "AUXPCM_HOSTLESS",
  4017. .platform_name = "msm-pcm-hostless",
  4018. .dynamic = 1,
  4019. .dpcm_playback = 1,
  4020. .dpcm_capture = 1,
  4021. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4022. SND_SOC_DPCM_TRIGGER_POST},
  4023. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4024. .ignore_suspend = 1,
  4025. /* this dainlink has playback support */
  4026. .ignore_pmdown_time = 1,
  4027. .codec_dai_name = "snd-soc-dummy-dai",
  4028. .codec_name = "snd-soc-dummy",
  4029. },
  4030. {/* hw:x,9 */
  4031. .name = MSM_DAILINK_NAME(LowLatency),
  4032. .stream_name = "MultiMedia5",
  4033. .cpu_dai_name = "MultiMedia5",
  4034. .platform_name = "msm-pcm-dsp.1",
  4035. .dynamic = 1,
  4036. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4037. .dpcm_playback = 1,
  4038. .dpcm_capture = 1,
  4039. .codec_dai_name = "snd-soc-dummy-dai",
  4040. .codec_name = "snd-soc-dummy",
  4041. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4042. SND_SOC_DPCM_TRIGGER_POST},
  4043. .ignore_suspend = 1,
  4044. /* this dainlink has playback support */
  4045. .ignore_pmdown_time = 1,
  4046. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  4047. .ops = &msm_fe_qos_ops,
  4048. },
  4049. {/* hw:x,10 */
  4050. .name = "Listen 1 Audio Service",
  4051. .stream_name = "Listen 1 Audio Service",
  4052. .cpu_dai_name = "LSM1",
  4053. .platform_name = "msm-lsm-client",
  4054. .dynamic = 1,
  4055. .dpcm_capture = 1,
  4056. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4057. SND_SOC_DPCM_TRIGGER_POST },
  4058. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4059. .ignore_suspend = 1,
  4060. .codec_dai_name = "snd-soc-dummy-dai",
  4061. .codec_name = "snd-soc-dummy",
  4062. .id = MSM_FRONTEND_DAI_LSM1,
  4063. },
  4064. /* Multiple Tunnel instances */
  4065. {/* hw:x,11 */
  4066. .name = MSM_DAILINK_NAME(Compress2),
  4067. .stream_name = "Compress2",
  4068. .cpu_dai_name = "MultiMedia7",
  4069. .platform_name = "msm-compress-dsp",
  4070. .dynamic = 1,
  4071. .dpcm_playback = 1,
  4072. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4073. SND_SOC_DPCM_TRIGGER_POST},
  4074. .codec_dai_name = "snd-soc-dummy-dai",
  4075. .codec_name = "snd-soc-dummy",
  4076. .ignore_suspend = 1,
  4077. .ignore_pmdown_time = 1,
  4078. /* this dainlink has playback support */
  4079. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  4080. },
  4081. {/* hw:x,12 */
  4082. .name = MSM_DAILINK_NAME(MultiMedia10),
  4083. .stream_name = "MultiMedia10",
  4084. .cpu_dai_name = "MultiMedia10",
  4085. .platform_name = "msm-pcm-dsp.1",
  4086. .dynamic = 1,
  4087. .dpcm_playback = 1,
  4088. .dpcm_capture = 1,
  4089. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4090. SND_SOC_DPCM_TRIGGER_POST},
  4091. .codec_dai_name = "snd-soc-dummy-dai",
  4092. .codec_name = "snd-soc-dummy",
  4093. .ignore_suspend = 1,
  4094. .ignore_pmdown_time = 1,
  4095. /* this dainlink has playback support */
  4096. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  4097. },
  4098. {/* hw:x,13 */
  4099. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  4100. .stream_name = "MM_NOIRQ",
  4101. .cpu_dai_name = "MultiMedia8",
  4102. .platform_name = "msm-pcm-dsp-noirq",
  4103. .dynamic = 1,
  4104. .dpcm_playback = 1,
  4105. .dpcm_capture = 1,
  4106. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4107. SND_SOC_DPCM_TRIGGER_POST},
  4108. .codec_dai_name = "snd-soc-dummy-dai",
  4109. .codec_name = "snd-soc-dummy",
  4110. .ignore_suspend = 1,
  4111. .ignore_pmdown_time = 1,
  4112. /* this dainlink has playback support */
  4113. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  4114. .ops = &msm_fe_qos_ops,
  4115. },
  4116. /* HDMI Hostless */
  4117. {/* hw:x,14 */
  4118. .name = "HDMI_RX_HOSTLESS",
  4119. .stream_name = "HDMI_RX_HOSTLESS",
  4120. .cpu_dai_name = "HDMI_HOSTLESS",
  4121. .platform_name = "msm-pcm-hostless",
  4122. .dynamic = 1,
  4123. .dpcm_playback = 1,
  4124. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4125. SND_SOC_DPCM_TRIGGER_POST},
  4126. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4127. .ignore_suspend = 1,
  4128. .ignore_pmdown_time = 1,
  4129. .codec_dai_name = "snd-soc-dummy-dai",
  4130. .codec_name = "snd-soc-dummy",
  4131. },
  4132. {/* hw:x,15 */
  4133. .name = "VoiceMMode2",
  4134. .stream_name = "VoiceMMode2",
  4135. .cpu_dai_name = "VoiceMMode2",
  4136. .platform_name = "msm-pcm-voice",
  4137. .dynamic = 1,
  4138. .dpcm_playback = 1,
  4139. .dpcm_capture = 1,
  4140. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4141. SND_SOC_DPCM_TRIGGER_POST},
  4142. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4143. .ignore_suspend = 1,
  4144. .ignore_pmdown_time = 1,
  4145. .codec_dai_name = "snd-soc-dummy-dai",
  4146. .codec_name = "snd-soc-dummy",
  4147. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  4148. },
  4149. /* LSM FE */
  4150. {/* hw:x,16 */
  4151. .name = "Listen 2 Audio Service",
  4152. .stream_name = "Listen 2 Audio Service",
  4153. .cpu_dai_name = "LSM2",
  4154. .platform_name = "msm-lsm-client",
  4155. .dynamic = 1,
  4156. .dpcm_capture = 1,
  4157. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4158. SND_SOC_DPCM_TRIGGER_POST },
  4159. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4160. .ignore_suspend = 1,
  4161. .codec_dai_name = "snd-soc-dummy-dai",
  4162. .codec_name = "snd-soc-dummy",
  4163. .id = MSM_FRONTEND_DAI_LSM2,
  4164. },
  4165. {/* hw:x,17 */
  4166. .name = "Listen 3 Audio Service",
  4167. .stream_name = "Listen 3 Audio Service",
  4168. .cpu_dai_name = "LSM3",
  4169. .platform_name = "msm-lsm-client",
  4170. .dynamic = 1,
  4171. .dpcm_capture = 1,
  4172. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4173. SND_SOC_DPCM_TRIGGER_POST },
  4174. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4175. .ignore_suspend = 1,
  4176. .codec_dai_name = "snd-soc-dummy-dai",
  4177. .codec_name = "snd-soc-dummy",
  4178. .id = MSM_FRONTEND_DAI_LSM3,
  4179. },
  4180. {/* hw:x,18 */
  4181. .name = "Listen 4 Audio Service",
  4182. .stream_name = "Listen 4 Audio Service",
  4183. .cpu_dai_name = "LSM4",
  4184. .platform_name = "msm-lsm-client",
  4185. .dynamic = 1,
  4186. .dpcm_capture = 1,
  4187. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4188. SND_SOC_DPCM_TRIGGER_POST },
  4189. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4190. .ignore_suspend = 1,
  4191. .codec_dai_name = "snd-soc-dummy-dai",
  4192. .codec_name = "snd-soc-dummy",
  4193. .id = MSM_FRONTEND_DAI_LSM4,
  4194. },
  4195. {/* hw:x,19 */
  4196. .name = "Listen 5 Audio Service",
  4197. .stream_name = "Listen 5 Audio Service",
  4198. .cpu_dai_name = "LSM5",
  4199. .platform_name = "msm-lsm-client",
  4200. .dynamic = 1,
  4201. .dpcm_capture = 1,
  4202. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4203. SND_SOC_DPCM_TRIGGER_POST },
  4204. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4205. .ignore_suspend = 1,
  4206. .codec_dai_name = "snd-soc-dummy-dai",
  4207. .codec_name = "snd-soc-dummy",
  4208. .id = MSM_FRONTEND_DAI_LSM5,
  4209. },
  4210. {/* hw:x,20 */
  4211. .name = "Listen 6 Audio Service",
  4212. .stream_name = "Listen 6 Audio Service",
  4213. .cpu_dai_name = "LSM6",
  4214. .platform_name = "msm-lsm-client",
  4215. .dynamic = 1,
  4216. .dpcm_capture = 1,
  4217. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4218. SND_SOC_DPCM_TRIGGER_POST },
  4219. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4220. .ignore_suspend = 1,
  4221. .codec_dai_name = "snd-soc-dummy-dai",
  4222. .codec_name = "snd-soc-dummy",
  4223. .id = MSM_FRONTEND_DAI_LSM6,
  4224. },
  4225. {/* hw:x,21 */
  4226. .name = "Listen 7 Audio Service",
  4227. .stream_name = "Listen 7 Audio Service",
  4228. .cpu_dai_name = "LSM7",
  4229. .platform_name = "msm-lsm-client",
  4230. .dynamic = 1,
  4231. .dpcm_capture = 1,
  4232. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4233. SND_SOC_DPCM_TRIGGER_POST },
  4234. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4235. .ignore_suspend = 1,
  4236. .codec_dai_name = "snd-soc-dummy-dai",
  4237. .codec_name = "snd-soc-dummy",
  4238. .id = MSM_FRONTEND_DAI_LSM7,
  4239. },
  4240. {/* hw:x,22 */
  4241. .name = "Listen 8 Audio Service",
  4242. .stream_name = "Listen 8 Audio Service",
  4243. .cpu_dai_name = "LSM8",
  4244. .platform_name = "msm-lsm-client",
  4245. .dynamic = 1,
  4246. .dpcm_capture = 1,
  4247. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4248. SND_SOC_DPCM_TRIGGER_POST },
  4249. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4250. .ignore_suspend = 1,
  4251. .codec_dai_name = "snd-soc-dummy-dai",
  4252. .codec_name = "snd-soc-dummy",
  4253. .id = MSM_FRONTEND_DAI_LSM8,
  4254. },
  4255. {/* hw:x,23 */
  4256. .name = MSM_DAILINK_NAME(Media9),
  4257. .stream_name = "MultiMedia9",
  4258. .cpu_dai_name = "MultiMedia9",
  4259. .platform_name = "msm-pcm-dsp.0",
  4260. .dynamic = 1,
  4261. .dpcm_playback = 1,
  4262. .dpcm_capture = 1,
  4263. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4264. SND_SOC_DPCM_TRIGGER_POST},
  4265. .codec_dai_name = "snd-soc-dummy-dai",
  4266. .codec_name = "snd-soc-dummy",
  4267. .ignore_suspend = 1,
  4268. /* this dainlink has playback support */
  4269. .ignore_pmdown_time = 1,
  4270. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  4271. },
  4272. {/* hw:x,24 */
  4273. .name = MSM_DAILINK_NAME(Compress4),
  4274. .stream_name = "Compress4",
  4275. .cpu_dai_name = "MultiMedia11",
  4276. .platform_name = "msm-compress-dsp",
  4277. .dynamic = 1,
  4278. .dpcm_playback = 1,
  4279. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4280. SND_SOC_DPCM_TRIGGER_POST},
  4281. .codec_dai_name = "snd-soc-dummy-dai",
  4282. .codec_name = "snd-soc-dummy",
  4283. .ignore_suspend = 1,
  4284. .ignore_pmdown_time = 1,
  4285. /* this dainlink has playback support */
  4286. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  4287. },
  4288. {/* hw:x,25 */
  4289. .name = MSM_DAILINK_NAME(Compress5),
  4290. .stream_name = "Compress5",
  4291. .cpu_dai_name = "MultiMedia12",
  4292. .platform_name = "msm-compress-dsp",
  4293. .dynamic = 1,
  4294. .dpcm_playback = 1,
  4295. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4296. SND_SOC_DPCM_TRIGGER_POST},
  4297. .codec_dai_name = "snd-soc-dummy-dai",
  4298. .codec_name = "snd-soc-dummy",
  4299. .ignore_suspend = 1,
  4300. .ignore_pmdown_time = 1,
  4301. /* this dainlink has playback support */
  4302. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  4303. },
  4304. {/* hw:x,26 */
  4305. .name = MSM_DAILINK_NAME(Compress6),
  4306. .stream_name = "Compress6",
  4307. .cpu_dai_name = "MultiMedia13",
  4308. .platform_name = "msm-compress-dsp",
  4309. .dynamic = 1,
  4310. .dpcm_playback = 1,
  4311. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4312. SND_SOC_DPCM_TRIGGER_POST},
  4313. .codec_dai_name = "snd-soc-dummy-dai",
  4314. .codec_name = "snd-soc-dummy",
  4315. .ignore_suspend = 1,
  4316. .ignore_pmdown_time = 1,
  4317. /* this dainlink has playback support */
  4318. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  4319. },
  4320. {/* hw:x,27 */
  4321. .name = MSM_DAILINK_NAME(Compress7),
  4322. .stream_name = "Compress7",
  4323. .cpu_dai_name = "MultiMedia14",
  4324. .platform_name = "msm-compress-dsp",
  4325. .dynamic = 1,
  4326. .dpcm_playback = 1,
  4327. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4328. SND_SOC_DPCM_TRIGGER_POST},
  4329. .codec_dai_name = "snd-soc-dummy-dai",
  4330. .codec_name = "snd-soc-dummy",
  4331. .ignore_suspend = 1,
  4332. .ignore_pmdown_time = 1,
  4333. /* this dainlink has playback support */
  4334. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  4335. },
  4336. {/* hw:x,28 */
  4337. .name = MSM_DAILINK_NAME(Compress8),
  4338. .stream_name = "Compress8",
  4339. .cpu_dai_name = "MultiMedia15",
  4340. .platform_name = "msm-compress-dsp",
  4341. .dynamic = 1,
  4342. .dpcm_playback = 1,
  4343. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4344. SND_SOC_DPCM_TRIGGER_POST},
  4345. .codec_dai_name = "snd-soc-dummy-dai",
  4346. .codec_name = "snd-soc-dummy",
  4347. .ignore_suspend = 1,
  4348. .ignore_pmdown_time = 1,
  4349. /* this dainlink has playback support */
  4350. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  4351. },
  4352. {/* hw:x,29 */
  4353. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  4354. .stream_name = "MM_NOIRQ_2",
  4355. .cpu_dai_name = "MultiMedia16",
  4356. .platform_name = "msm-pcm-dsp-noirq",
  4357. .dynamic = 1,
  4358. .dpcm_playback = 1,
  4359. .dpcm_capture = 1,
  4360. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4361. SND_SOC_DPCM_TRIGGER_POST},
  4362. .codec_dai_name = "snd-soc-dummy-dai",
  4363. .codec_name = "snd-soc-dummy",
  4364. .ignore_suspend = 1,
  4365. .ignore_pmdown_time = 1,
  4366. /* this dainlink has playback support */
  4367. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  4368. .ops = &msm_fe_qos_ops,
  4369. },
  4370. {/* hw:x,30 */
  4371. .name = "CDC_DMA Hostless",
  4372. .stream_name = "CDC_DMA Hostless",
  4373. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  4374. .platform_name = "msm-pcm-hostless",
  4375. .dynamic = 1,
  4376. .dpcm_playback = 1,
  4377. .dpcm_capture = 1,
  4378. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4379. SND_SOC_DPCM_TRIGGER_POST},
  4380. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4381. .ignore_suspend = 1,
  4382. /* this dailink has playback support */
  4383. .ignore_pmdown_time = 1,
  4384. .codec_dai_name = "snd-soc-dummy-dai",
  4385. .codec_name = "snd-soc-dummy",
  4386. },
  4387. {/* hw:x,31 */
  4388. .name = "TX3_CDC_DMA Hostless",
  4389. .stream_name = "TX3_CDC_DMA Hostless",
  4390. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  4391. .platform_name = "msm-pcm-hostless",
  4392. .dynamic = 1,
  4393. .dpcm_capture = 1,
  4394. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4395. SND_SOC_DPCM_TRIGGER_POST},
  4396. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4397. .ignore_suspend = 1,
  4398. .codec_dai_name = "snd-soc-dummy-dai",
  4399. .codec_name = "snd-soc-dummy",
  4400. },
  4401. {/* hw:x,32 */
  4402. .name = "Tertiary MI2S TX_Hostless",
  4403. .stream_name = "Tertiary MI2S_TX Hostless Capture",
  4404. .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
  4405. .platform_name = "msm-pcm-hostless",
  4406. .dynamic = 1,
  4407. .dpcm_capture = 1,
  4408. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4409. SND_SOC_DPCM_TRIGGER_POST},
  4410. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4411. .ignore_suspend = 1,
  4412. .ignore_pmdown_time = 1,
  4413. .codec_dai_name = "snd-soc-dummy-dai",
  4414. .codec_name = "snd-soc-dummy",
  4415. },
  4416. };
  4417. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  4418. {/* hw:x,33 */
  4419. .name = MSM_DAILINK_NAME(ASM Loopback),
  4420. .stream_name = "MultiMedia6",
  4421. .cpu_dai_name = "MultiMedia6",
  4422. .platform_name = "msm-pcm-loopback",
  4423. .dynamic = 1,
  4424. .dpcm_playback = 1,
  4425. .dpcm_capture = 1,
  4426. .codec_dai_name = "snd-soc-dummy-dai",
  4427. .codec_name = "snd-soc-dummy",
  4428. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4429. SND_SOC_DPCM_TRIGGER_POST},
  4430. .ignore_suspend = 1,
  4431. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4432. .ignore_pmdown_time = 1,
  4433. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  4434. },
  4435. {/* hw:x,34 */
  4436. .name = "USB Audio Hostless",
  4437. .stream_name = "USB Audio Hostless",
  4438. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  4439. .platform_name = "msm-pcm-hostless",
  4440. .dynamic = 1,
  4441. .dpcm_playback = 1,
  4442. .dpcm_capture = 1,
  4443. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4444. SND_SOC_DPCM_TRIGGER_POST},
  4445. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4446. .ignore_suspend = 1,
  4447. .ignore_pmdown_time = 1,
  4448. .codec_dai_name = "snd-soc-dummy-dai",
  4449. .codec_name = "snd-soc-dummy",
  4450. },
  4451. {/* hw:x,35 */
  4452. .name = "SLIMBUS_7 Hostless",
  4453. .stream_name = "SLIMBUS_7 Hostless",
  4454. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  4455. .platform_name = "msm-pcm-hostless",
  4456. .dynamic = 1,
  4457. .dpcm_capture = 1,
  4458. .dpcm_playback = 1,
  4459. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4460. SND_SOC_DPCM_TRIGGER_POST},
  4461. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4462. .ignore_suspend = 1,
  4463. .ignore_pmdown_time = 1,
  4464. .codec_dai_name = "snd-soc-dummy-dai",
  4465. .codec_name = "snd-soc-dummy",
  4466. },
  4467. {/* hw:x,36 */
  4468. .name = "Compress Capture",
  4469. .stream_name = "Compress9",
  4470. .cpu_dai_name = "MultiMedia17",
  4471. .platform_name = "msm-compress-dsp",
  4472. .dynamic = 1,
  4473. .dpcm_capture = 1,
  4474. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4475. SND_SOC_DPCM_TRIGGER_POST},
  4476. .codec_dai_name = "snd-soc-dummy-dai",
  4477. .codec_name = "snd-soc-dummy",
  4478. .ignore_suspend = 1,
  4479. .ignore_pmdown_time = 1,
  4480. .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
  4481. },
  4482. {/* hw:x,37 */
  4483. .name = "SLIMBUS_8 Hostless",
  4484. .stream_name = "SLIMBUS_8 Hostless",
  4485. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  4486. .platform_name = "msm-pcm-hostless",
  4487. .dynamic = 1,
  4488. .dpcm_capture = 1,
  4489. .dpcm_playback = 1,
  4490. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4491. SND_SOC_DPCM_TRIGGER_POST},
  4492. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4493. .ignore_suspend = 1,
  4494. .ignore_pmdown_time = 1,
  4495. .codec_dai_name = "snd-soc-dummy-dai",
  4496. .codec_name = "snd-soc-dummy",
  4497. },
  4498. {/* hw:x,38 */
  4499. .name = LPASS_BE_TX_CDC_DMA_TX_5,
  4500. .stream_name = "TX CDC DMA5 Capture",
  4501. .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
  4502. .platform_name = "msm-pcm-hostless",
  4503. .codec_name = "bolero_codec",
  4504. .codec_dai_name = "tx_macro_tx3",
  4505. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
  4506. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4507. .ignore_suspend = 1,
  4508. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4509. .ops = &msm_cdc_dma_be_ops,
  4510. },
  4511. {/* hw:x,39 */
  4512. .name = MSM_DAILINK_NAME(Compress3),
  4513. .stream_name = "Compress3",
  4514. .cpu_dai_name = "MultiMedia10",
  4515. .platform_name = "msm-compress-dsp",
  4516. .dynamic = 1,
  4517. .dpcm_playback = 1,
  4518. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4519. SND_SOC_DPCM_TRIGGER_POST},
  4520. .codec_dai_name = "snd-soc-dummy-dai",
  4521. .codec_name = "snd-soc-dummy",
  4522. .ignore_suspend = 1,
  4523. .ignore_pmdown_time = 1,
  4524. /* this dainlink has playback support */
  4525. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  4526. },
  4527. };
  4528. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  4529. /* Backend AFE DAI Links */
  4530. {
  4531. .name = LPASS_BE_AFE_PCM_RX,
  4532. .stream_name = "AFE Playback",
  4533. .cpu_dai_name = "msm-dai-q6-dev.224",
  4534. .platform_name = "msm-pcm-routing",
  4535. .codec_name = "msm-stub-codec.1",
  4536. .codec_dai_name = "msm-stub-rx",
  4537. .no_pcm = 1,
  4538. .dpcm_playback = 1,
  4539. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  4540. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4541. /* this dainlink has playback support */
  4542. .ignore_pmdown_time = 1,
  4543. .ignore_suspend = 1,
  4544. },
  4545. {
  4546. .name = LPASS_BE_AFE_PCM_TX,
  4547. .stream_name = "AFE Capture",
  4548. .cpu_dai_name = "msm-dai-q6-dev.225",
  4549. .platform_name = "msm-pcm-routing",
  4550. .codec_name = "msm-stub-codec.1",
  4551. .codec_dai_name = "msm-stub-tx",
  4552. .no_pcm = 1,
  4553. .dpcm_capture = 1,
  4554. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  4555. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4556. .ignore_suspend = 1,
  4557. },
  4558. /* Incall Record Uplink BACK END DAI Link */
  4559. {
  4560. .name = LPASS_BE_INCALL_RECORD_TX,
  4561. .stream_name = "Voice Uplink Capture",
  4562. .cpu_dai_name = "msm-dai-q6-dev.32772",
  4563. .platform_name = "msm-pcm-routing",
  4564. .codec_name = "msm-stub-codec.1",
  4565. .codec_dai_name = "msm-stub-tx",
  4566. .no_pcm = 1,
  4567. .dpcm_capture = 1,
  4568. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  4569. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4570. .ignore_suspend = 1,
  4571. },
  4572. /* Incall Record Downlink BACK END DAI Link */
  4573. {
  4574. .name = LPASS_BE_INCALL_RECORD_RX,
  4575. .stream_name = "Voice Downlink Capture",
  4576. .cpu_dai_name = "msm-dai-q6-dev.32771",
  4577. .platform_name = "msm-pcm-routing",
  4578. .codec_name = "msm-stub-codec.1",
  4579. .codec_dai_name = "msm-stub-tx",
  4580. .no_pcm = 1,
  4581. .dpcm_capture = 1,
  4582. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  4583. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4584. .ignore_suspend = 1,
  4585. },
  4586. /* Incall Music BACK END DAI Link */
  4587. {
  4588. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  4589. .stream_name = "Voice Farend Playback",
  4590. .cpu_dai_name = "msm-dai-q6-dev.32773",
  4591. .platform_name = "msm-pcm-routing",
  4592. .codec_name = "msm-stub-codec.1",
  4593. .codec_dai_name = "msm-stub-rx",
  4594. .no_pcm = 1,
  4595. .dpcm_playback = 1,
  4596. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  4597. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4598. .ignore_suspend = 1,
  4599. .ignore_pmdown_time = 1,
  4600. },
  4601. /* Incall Music 2 BACK END DAI Link */
  4602. {
  4603. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  4604. .stream_name = "Voice2 Farend Playback",
  4605. .cpu_dai_name = "msm-dai-q6-dev.32770",
  4606. .platform_name = "msm-pcm-routing",
  4607. .codec_name = "msm-stub-codec.1",
  4608. .codec_dai_name = "msm-stub-rx",
  4609. .no_pcm = 1,
  4610. .dpcm_playback = 1,
  4611. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  4612. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4613. .ignore_suspend = 1,
  4614. .ignore_pmdown_time = 1,
  4615. },
  4616. {
  4617. .name = LPASS_BE_USB_AUDIO_RX,
  4618. .stream_name = "USB Audio Playback",
  4619. .cpu_dai_name = "msm-dai-q6-dev.28672",
  4620. .platform_name = "msm-pcm-routing",
  4621. .codec_name = "msm-stub-codec.1",
  4622. .codec_dai_name = "msm-stub-rx",
  4623. .dynamic_be = 1,
  4624. .no_pcm = 1,
  4625. .dpcm_playback = 1,
  4626. .id = MSM_BACKEND_DAI_USB_RX,
  4627. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4628. .ignore_pmdown_time = 1,
  4629. .ignore_suspend = 1,
  4630. },
  4631. {
  4632. .name = LPASS_BE_USB_AUDIO_TX,
  4633. .stream_name = "USB Audio Capture",
  4634. .cpu_dai_name = "msm-dai-q6-dev.28673",
  4635. .platform_name = "msm-pcm-routing",
  4636. .codec_name = "msm-stub-codec.1",
  4637. .codec_dai_name = "msm-stub-tx",
  4638. .no_pcm = 1,
  4639. .dpcm_capture = 1,
  4640. .id = MSM_BACKEND_DAI_USB_TX,
  4641. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4642. .ignore_suspend = 1,
  4643. },
  4644. };
  4645. static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
  4646. {
  4647. .name = LPASS_BE_PRI_TDM_RX_0,
  4648. .stream_name = "Primary TDM0 Playback",
  4649. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  4650. .platform_name = "msm-pcm-routing",
  4651. .codec_name = "msm-stub-codec.1",
  4652. .codec_dai_name = "msm-stub-rx",
  4653. .no_pcm = 1,
  4654. .dpcm_playback = 1,
  4655. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  4656. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4657. .ops = &bengal_tdm_be_ops,
  4658. .ignore_suspend = 1,
  4659. .ignore_pmdown_time = 1,
  4660. },
  4661. {
  4662. .name = LPASS_BE_PRI_TDM_TX_0,
  4663. .stream_name = "Primary TDM0 Capture",
  4664. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  4665. .platform_name = "msm-pcm-routing",
  4666. .codec_name = "msm-stub-codec.1",
  4667. .codec_dai_name = "msm-stub-tx",
  4668. .no_pcm = 1,
  4669. .dpcm_capture = 1,
  4670. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  4671. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4672. .ops = &bengal_tdm_be_ops,
  4673. .ignore_suspend = 1,
  4674. },
  4675. {
  4676. .name = LPASS_BE_SEC_TDM_RX_0,
  4677. .stream_name = "Secondary TDM0 Playback",
  4678. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  4679. .platform_name = "msm-pcm-routing",
  4680. .codec_name = "msm-stub-codec.1",
  4681. .codec_dai_name = "msm-stub-rx",
  4682. .no_pcm = 1,
  4683. .dpcm_playback = 1,
  4684. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  4685. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4686. .ops = &bengal_tdm_be_ops,
  4687. .ignore_suspend = 1,
  4688. .ignore_pmdown_time = 1,
  4689. },
  4690. {
  4691. .name = LPASS_BE_SEC_TDM_TX_0,
  4692. .stream_name = "Secondary TDM0 Capture",
  4693. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  4694. .platform_name = "msm-pcm-routing",
  4695. .codec_name = "msm-stub-codec.1",
  4696. .codec_dai_name = "msm-stub-tx",
  4697. .no_pcm = 1,
  4698. .dpcm_capture = 1,
  4699. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  4700. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4701. .ops = &bengal_tdm_be_ops,
  4702. .ignore_suspend = 1,
  4703. },
  4704. {
  4705. .name = LPASS_BE_TERT_TDM_RX_0,
  4706. .stream_name = "Tertiary TDM0 Playback",
  4707. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  4708. .platform_name = "msm-pcm-routing",
  4709. .codec_name = "msm-stub-codec.1",
  4710. .codec_dai_name = "msm-stub-rx",
  4711. .no_pcm = 1,
  4712. .dpcm_playback = 1,
  4713. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  4714. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4715. .ops = &bengal_tdm_be_ops,
  4716. .ignore_suspend = 1,
  4717. .ignore_pmdown_time = 1,
  4718. },
  4719. {
  4720. .name = LPASS_BE_TERT_TDM_TX_0,
  4721. .stream_name = "Tertiary TDM0 Capture",
  4722. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  4723. .platform_name = "msm-pcm-routing",
  4724. .codec_name = "msm-stub-codec.1",
  4725. .codec_dai_name = "msm-stub-tx",
  4726. .no_pcm = 1,
  4727. .dpcm_capture = 1,
  4728. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  4729. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4730. .ops = &bengal_tdm_be_ops,
  4731. .ignore_suspend = 1,
  4732. },
  4733. {
  4734. .name = LPASS_BE_QUAT_TDM_RX_0,
  4735. .stream_name = "Quaternary TDM0 Playback",
  4736. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  4737. .platform_name = "msm-pcm-routing",
  4738. .codec_name = "msm-stub-codec.1",
  4739. .codec_dai_name = "msm-stub-rx",
  4740. .no_pcm = 1,
  4741. .dpcm_playback = 1,
  4742. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  4743. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4744. .ops = &bengal_tdm_be_ops,
  4745. .ignore_suspend = 1,
  4746. .ignore_pmdown_time = 1,
  4747. },
  4748. {
  4749. .name = LPASS_BE_QUAT_TDM_TX_0,
  4750. .stream_name = "Quaternary TDM0 Capture",
  4751. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  4752. .platform_name = "msm-pcm-routing",
  4753. .codec_name = "msm-stub-codec.1",
  4754. .codec_dai_name = "msm-stub-tx",
  4755. .no_pcm = 1,
  4756. .dpcm_capture = 1,
  4757. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  4758. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4759. .ops = &bengal_tdm_be_ops,
  4760. .ignore_suspend = 1,
  4761. },
  4762. };
  4763. static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
  4764. {
  4765. .name = LPASS_BE_SLIMBUS_7_RX,
  4766. .stream_name = "Slimbus7 Playback",
  4767. .cpu_dai_name = "msm-dai-q6-dev.16398",
  4768. .platform_name = "msm-pcm-routing",
  4769. .codec_name = "btfmslim_slave",
  4770. /* BT codec driver determines capabilities based on
  4771. * dai name, bt codecdai name should always contains
  4772. * supported usecase information
  4773. */
  4774. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  4775. .no_pcm = 1,
  4776. .dpcm_playback = 1,
  4777. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  4778. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4779. .init = &msm_wcn_init,
  4780. .ops = &msm_wcn_ops,
  4781. /* dai link has playback support */
  4782. .ignore_pmdown_time = 1,
  4783. .ignore_suspend = 1,
  4784. },
  4785. {
  4786. .name = LPASS_BE_SLIMBUS_7_TX,
  4787. .stream_name = "Slimbus7 Capture",
  4788. .cpu_dai_name = "msm-dai-q6-dev.16399",
  4789. .platform_name = "msm-pcm-routing",
  4790. .codec_name = "btfmslim_slave",
  4791. .codec_dai_name = "btfm_bt_sco_slim_tx",
  4792. .no_pcm = 1,
  4793. .dpcm_capture = 1,
  4794. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  4795. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4796. .ops = &msm_wcn_ops,
  4797. .ignore_suspend = 1,
  4798. },
  4799. {
  4800. .name = LPASS_BE_SLIMBUS_8_TX,
  4801. .stream_name = "Slimbus8 Capture",
  4802. .cpu_dai_name = "msm-dai-q6-dev.16401",
  4803. .platform_name = "msm-pcm-routing",
  4804. .codec_name = "btfmslim_slave",
  4805. .codec_dai_name = "btfm_fm_slim_tx",
  4806. .no_pcm = 1,
  4807. .dpcm_capture = 1,
  4808. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  4809. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4810. .ops = &msm_wcn_ops,
  4811. .ignore_suspend = 1,
  4812. },
  4813. };
  4814. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  4815. {
  4816. .name = LPASS_BE_PRI_MI2S_RX,
  4817. .stream_name = "Primary MI2S Playback",
  4818. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4819. .platform_name = "msm-pcm-routing",
  4820. .codec_name = "msm-stub-codec.1",
  4821. .codec_dai_name = "msm-stub-rx",
  4822. .no_pcm = 1,
  4823. .dpcm_playback = 1,
  4824. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  4825. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4826. .ops = &msm_mi2s_be_ops,
  4827. .ignore_suspend = 1,
  4828. .ignore_pmdown_time = 1,
  4829. },
  4830. {
  4831. .name = LPASS_BE_PRI_MI2S_TX,
  4832. .stream_name = "Primary MI2S Capture",
  4833. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4834. .platform_name = "msm-pcm-routing",
  4835. .codec_name = "msm-stub-codec.1",
  4836. .codec_dai_name = "msm-stub-tx",
  4837. .no_pcm = 1,
  4838. .dpcm_capture = 1,
  4839. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  4840. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4841. .ops = &msm_mi2s_be_ops,
  4842. .ignore_suspend = 1,
  4843. },
  4844. {
  4845. .name = LPASS_BE_SEC_MI2S_RX,
  4846. .stream_name = "Secondary MI2S Playback",
  4847. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4848. .platform_name = "msm-pcm-routing",
  4849. .codec_name = "msm-stub-codec.1",
  4850. .codec_dai_name = "msm-stub-rx",
  4851. .no_pcm = 1,
  4852. .dpcm_playback = 1,
  4853. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  4854. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4855. .ops = &msm_mi2s_be_ops,
  4856. .ignore_suspend = 1,
  4857. .ignore_pmdown_time = 1,
  4858. },
  4859. {
  4860. .name = LPASS_BE_SEC_MI2S_TX,
  4861. .stream_name = "Secondary MI2S Capture",
  4862. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4863. .platform_name = "msm-pcm-routing",
  4864. .codec_name = "msm-stub-codec.1",
  4865. .codec_dai_name = "msm-stub-tx",
  4866. .no_pcm = 1,
  4867. .dpcm_capture = 1,
  4868. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  4869. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4870. .ops = &msm_mi2s_be_ops,
  4871. .ignore_suspend = 1,
  4872. },
  4873. {
  4874. .name = LPASS_BE_TERT_MI2S_RX,
  4875. .stream_name = "Tertiary MI2S Playback",
  4876. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4877. .platform_name = "msm-pcm-routing",
  4878. .codec_name = "msm-stub-codec.1",
  4879. .codec_dai_name = "msm-stub-rx",
  4880. .no_pcm = 1,
  4881. .dpcm_playback = 1,
  4882. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  4883. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4884. .ops = &msm_mi2s_be_ops,
  4885. .ignore_suspend = 1,
  4886. .ignore_pmdown_time = 1,
  4887. },
  4888. {
  4889. .name = LPASS_BE_TERT_MI2S_TX,
  4890. .stream_name = "Tertiary MI2S Capture",
  4891. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4892. .platform_name = "msm-pcm-routing",
  4893. .codec_name = "msm-stub-codec.1",
  4894. .codec_dai_name = "msm-stub-tx",
  4895. .no_pcm = 1,
  4896. .dpcm_capture = 1,
  4897. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  4898. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4899. .ops = &msm_mi2s_be_ops,
  4900. .ignore_suspend = 1,
  4901. },
  4902. {
  4903. .name = LPASS_BE_QUAT_MI2S_RX,
  4904. .stream_name = "Quaternary MI2S Playback",
  4905. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  4906. .platform_name = "msm-pcm-routing",
  4907. .codec_name = "msm-stub-codec.1",
  4908. .codec_dai_name = "msm-stub-rx",
  4909. .no_pcm = 1,
  4910. .dpcm_playback = 1,
  4911. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  4912. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4913. .ops = &msm_mi2s_be_ops,
  4914. .ignore_suspend = 1,
  4915. .ignore_pmdown_time = 1,
  4916. },
  4917. {
  4918. .name = LPASS_BE_QUAT_MI2S_TX,
  4919. .stream_name = "Quaternary MI2S Capture",
  4920. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  4921. .platform_name = "msm-pcm-routing",
  4922. .codec_name = "msm-stub-codec.1",
  4923. .codec_dai_name = "msm-stub-tx",
  4924. .no_pcm = 1,
  4925. .dpcm_capture = 1,
  4926. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  4927. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4928. .ops = &msm_mi2s_be_ops,
  4929. .ignore_suspend = 1,
  4930. },
  4931. };
  4932. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  4933. /* Primary AUX PCM Backend DAI Links */
  4934. {
  4935. .name = LPASS_BE_AUXPCM_RX,
  4936. .stream_name = "AUX PCM Playback",
  4937. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4938. .platform_name = "msm-pcm-routing",
  4939. .codec_name = "msm-stub-codec.1",
  4940. .codec_dai_name = "msm-stub-rx",
  4941. .no_pcm = 1,
  4942. .dpcm_playback = 1,
  4943. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4944. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4945. .ops = &bengal_aux_be_ops,
  4946. .ignore_pmdown_time = 1,
  4947. .ignore_suspend = 1,
  4948. },
  4949. {
  4950. .name = LPASS_BE_AUXPCM_TX,
  4951. .stream_name = "AUX PCM Capture",
  4952. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4953. .platform_name = "msm-pcm-routing",
  4954. .codec_name = "msm-stub-codec.1",
  4955. .codec_dai_name = "msm-stub-tx",
  4956. .no_pcm = 1,
  4957. .dpcm_capture = 1,
  4958. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4959. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4960. .ops = &bengal_aux_be_ops,
  4961. .ignore_suspend = 1,
  4962. },
  4963. /* Secondary AUX PCM Backend DAI Links */
  4964. {
  4965. .name = LPASS_BE_SEC_AUXPCM_RX,
  4966. .stream_name = "Sec AUX PCM Playback",
  4967. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4968. .platform_name = "msm-pcm-routing",
  4969. .codec_name = "msm-stub-codec.1",
  4970. .codec_dai_name = "msm-stub-rx",
  4971. .no_pcm = 1,
  4972. .dpcm_playback = 1,
  4973. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  4974. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4975. .ops = &bengal_aux_be_ops,
  4976. .ignore_pmdown_time = 1,
  4977. .ignore_suspend = 1,
  4978. },
  4979. {
  4980. .name = LPASS_BE_SEC_AUXPCM_TX,
  4981. .stream_name = "Sec AUX PCM Capture",
  4982. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4983. .platform_name = "msm-pcm-routing",
  4984. .codec_name = "msm-stub-codec.1",
  4985. .codec_dai_name = "msm-stub-tx",
  4986. .no_pcm = 1,
  4987. .dpcm_capture = 1,
  4988. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  4989. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4990. .ops = &bengal_aux_be_ops,
  4991. .ignore_suspend = 1,
  4992. },
  4993. /* Tertiary AUX PCM Backend DAI Links */
  4994. {
  4995. .name = LPASS_BE_TERT_AUXPCM_RX,
  4996. .stream_name = "Tert AUX PCM Playback",
  4997. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4998. .platform_name = "msm-pcm-routing",
  4999. .codec_name = "msm-stub-codec.1",
  5000. .codec_dai_name = "msm-stub-rx",
  5001. .no_pcm = 1,
  5002. .dpcm_playback = 1,
  5003. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  5004. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5005. .ops = &bengal_aux_be_ops,
  5006. .ignore_suspend = 1,
  5007. },
  5008. {
  5009. .name = LPASS_BE_TERT_AUXPCM_TX,
  5010. .stream_name = "Tert AUX PCM Capture",
  5011. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5012. .platform_name = "msm-pcm-routing",
  5013. .codec_name = "msm-stub-codec.1",
  5014. .codec_dai_name = "msm-stub-tx",
  5015. .no_pcm = 1,
  5016. .dpcm_capture = 1,
  5017. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  5018. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5019. .ops = &bengal_aux_be_ops,
  5020. .ignore_suspend = 1,
  5021. },
  5022. /* Quaternary AUX PCM Backend DAI Links */
  5023. {
  5024. .name = LPASS_BE_QUAT_AUXPCM_RX,
  5025. .stream_name = "Quat AUX PCM Playback",
  5026. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  5027. .platform_name = "msm-pcm-routing",
  5028. .codec_name = "msm-stub-codec.1",
  5029. .codec_dai_name = "msm-stub-rx",
  5030. .no_pcm = 1,
  5031. .dpcm_playback = 1,
  5032. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  5033. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5034. .ops = &bengal_aux_be_ops,
  5035. .ignore_suspend = 1,
  5036. },
  5037. {
  5038. .name = LPASS_BE_QUAT_AUXPCM_TX,
  5039. .stream_name = "Quat AUX PCM Capture",
  5040. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  5041. .platform_name = "msm-pcm-routing",
  5042. .codec_name = "msm-stub-codec.1",
  5043. .codec_dai_name = "msm-stub-tx",
  5044. .no_pcm = 1,
  5045. .dpcm_capture = 1,
  5046. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  5047. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5048. .ops = &bengal_aux_be_ops,
  5049. .ignore_suspend = 1,
  5050. },
  5051. };
  5052. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  5053. /* RX CDC DMA Backend DAI Links */
  5054. {
  5055. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  5056. .stream_name = "RX CDC DMA0 Playback",
  5057. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  5058. .platform_name = "msm-pcm-routing",
  5059. .codec_name = "bolero_codec",
  5060. .codec_dai_name = "rx_macro_rx1",
  5061. .dynamic_be = 1,
  5062. .no_pcm = 1,
  5063. .dpcm_playback = 1,
  5064. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  5065. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5066. .ignore_pmdown_time = 1,
  5067. .ignore_suspend = 1,
  5068. .ops = &msm_cdc_dma_be_ops,
  5069. },
  5070. {
  5071. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  5072. .stream_name = "RX CDC DMA1 Playback",
  5073. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  5074. .platform_name = "msm-pcm-routing",
  5075. .codec_name = "bolero_codec",
  5076. .codec_dai_name = "rx_macro_rx2",
  5077. .dynamic_be = 1,
  5078. .no_pcm = 1,
  5079. .dpcm_playback = 1,
  5080. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  5081. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5082. .ignore_pmdown_time = 1,
  5083. .ignore_suspend = 1,
  5084. .ops = &msm_cdc_dma_be_ops,
  5085. },
  5086. {
  5087. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  5088. .stream_name = "RX CDC DMA2 Playback",
  5089. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  5090. .platform_name = "msm-pcm-routing",
  5091. .codec_name = "bolero_codec",
  5092. .codec_dai_name = "rx_macro_rx3",
  5093. .dynamic_be = 1,
  5094. .no_pcm = 1,
  5095. .dpcm_playback = 1,
  5096. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  5097. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5098. .ignore_pmdown_time = 1,
  5099. .ignore_suspend = 1,
  5100. .ops = &msm_cdc_dma_be_ops,
  5101. },
  5102. {
  5103. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  5104. .stream_name = "RX CDC DMA3 Playback",
  5105. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  5106. .platform_name = "msm-pcm-routing",
  5107. .codec_name = "bolero_codec",
  5108. .codec_dai_name = "rx_macro_rx4",
  5109. .dynamic_be = 1,
  5110. .no_pcm = 1,
  5111. .dpcm_playback = 1,
  5112. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  5113. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5114. .ignore_pmdown_time = 1,
  5115. .ignore_suspend = 1,
  5116. .ops = &msm_cdc_dma_be_ops,
  5117. },
  5118. /* TX CDC DMA Backend DAI Links */
  5119. {
  5120. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  5121. .stream_name = "TX CDC DMA3 Capture",
  5122. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  5123. .platform_name = "msm-pcm-routing",
  5124. .codec_name = "bolero_codec",
  5125. .codec_dai_name = "tx_macro_tx1",
  5126. .no_pcm = 1,
  5127. .dpcm_capture = 1,
  5128. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  5129. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5130. .ignore_suspend = 1,
  5131. .ops = &msm_cdc_dma_be_ops,
  5132. },
  5133. {
  5134. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  5135. .stream_name = "TX CDC DMA4 Capture",
  5136. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  5137. .platform_name = "msm-pcm-routing",
  5138. .codec_name = "bolero_codec",
  5139. .codec_dai_name = "tx_macro_tx2",
  5140. .no_pcm = 1,
  5141. .dpcm_capture = 1,
  5142. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  5143. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5144. .ignore_suspend = 1,
  5145. .ops = &msm_cdc_dma_be_ops,
  5146. },
  5147. };
  5148. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  5149. {
  5150. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  5151. .stream_name = "VA CDC DMA0 Capture",
  5152. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  5153. .platform_name = "msm-pcm-routing",
  5154. .codec_name = "bolero_codec",
  5155. .codec_dai_name = "va_macro_tx1",
  5156. .no_pcm = 1,
  5157. .dpcm_capture = 1,
  5158. .init = &msm_int_audrx_init,
  5159. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  5160. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5161. .ignore_suspend = 1,
  5162. .ops = &msm_cdc_dma_be_ops,
  5163. },
  5164. {
  5165. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  5166. .stream_name = "VA CDC DMA1 Capture",
  5167. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  5168. .platform_name = "msm-pcm-routing",
  5169. .codec_name = "bolero_codec",
  5170. .codec_dai_name = "va_macro_tx2",
  5171. .no_pcm = 1,
  5172. .dpcm_capture = 1,
  5173. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  5174. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5175. .ignore_suspend = 1,
  5176. .ops = &msm_cdc_dma_be_ops,
  5177. },
  5178. {
  5179. .name = LPASS_BE_VA_CDC_DMA_TX_2,
  5180. .stream_name = "VA CDC DMA2 Capture",
  5181. .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
  5182. .platform_name = "msm-pcm-routing",
  5183. .codec_name = "bolero_codec",
  5184. .codec_dai_name = "va_macro_tx3",
  5185. .no_pcm = 1,
  5186. .dpcm_capture = 1,
  5187. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
  5188. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5189. .ignore_suspend = 1,
  5190. .ops = &msm_cdc_dma_be_ops,
  5191. },
  5192. };
  5193. static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
  5194. {
  5195. .name = LPASS_BE_AFE_LOOPBACK_TX,
  5196. .stream_name = "AFE Loopback Capture",
  5197. .cpu_dai_name = "msm-dai-q6-dev.24577",
  5198. .platform_name = "msm-pcm-routing",
  5199. .codec_name = "msm-stub-codec.1",
  5200. .codec_dai_name = "msm-stub-tx",
  5201. .no_pcm = 1,
  5202. .dpcm_capture = 1,
  5203. .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
  5204. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5205. .ignore_pmdown_time = 1,
  5206. .ignore_suspend = 1,
  5207. },
  5208. };
  5209. static struct snd_soc_dai_link msm_bengal_dai_links[
  5210. ARRAY_SIZE(msm_common_dai_links) +
  5211. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  5212. ARRAY_SIZE(msm_common_be_dai_links) +
  5213. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  5214. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  5215. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
  5216. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
  5217. ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
  5218. ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
  5219. ARRAY_SIZE(msm_tdm_be_dai_links)];
  5220. static int msm_populate_dai_link_component_of_node(
  5221. struct snd_soc_card *card)
  5222. {
  5223. int i, index, ret = 0;
  5224. struct device *cdev = card->dev;
  5225. struct snd_soc_dai_link *dai_link = card->dai_link;
  5226. struct device_node *np;
  5227. if (!cdev) {
  5228. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  5229. return -ENODEV;
  5230. }
  5231. for (i = 0; i < card->num_links; i++) {
  5232. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  5233. continue;
  5234. /* populate platform_of_node for snd card dai links */
  5235. if (dai_link[i].platform_name &&
  5236. !dai_link[i].platform_of_node) {
  5237. index = of_property_match_string(cdev->of_node,
  5238. "asoc-platform-names",
  5239. dai_link[i].platform_name);
  5240. if (index < 0) {
  5241. dev_err(cdev,
  5242. "%s: No match found for platform name: %s\n",
  5243. __func__, dai_link[i].platform_name);
  5244. ret = index;
  5245. goto err;
  5246. }
  5247. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  5248. index);
  5249. if (!np) {
  5250. dev_err(cdev,
  5251. "%s: retrieving phandle for platform %s, index %d failed\n",
  5252. __func__, dai_link[i].platform_name,
  5253. index);
  5254. ret = -ENODEV;
  5255. goto err;
  5256. }
  5257. dai_link[i].platform_of_node = np;
  5258. dai_link[i].platform_name = NULL;
  5259. }
  5260. /* populate cpu_of_node for snd card dai links */
  5261. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  5262. index = of_property_match_string(cdev->of_node,
  5263. "asoc-cpu-names",
  5264. dai_link[i].cpu_dai_name);
  5265. if (index >= 0) {
  5266. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  5267. index);
  5268. if (!np) {
  5269. dev_err(cdev,
  5270. "%s: retrieving phandle for cpu dai %s failed\n",
  5271. __func__,
  5272. dai_link[i].cpu_dai_name);
  5273. ret = -ENODEV;
  5274. goto err;
  5275. }
  5276. dai_link[i].cpu_of_node = np;
  5277. dai_link[i].cpu_dai_name = NULL;
  5278. }
  5279. }
  5280. /* populate codec_of_node for snd card dai links */
  5281. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  5282. index = of_property_match_string(cdev->of_node,
  5283. "asoc-codec-names",
  5284. dai_link[i].codec_name);
  5285. if (index < 0)
  5286. continue;
  5287. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  5288. index);
  5289. if (!np) {
  5290. dev_err(cdev,
  5291. "%s: retrieving phandle for codec %s failed\n",
  5292. __func__, dai_link[i].codec_name);
  5293. ret = -ENODEV;
  5294. goto err;
  5295. }
  5296. dai_link[i].codec_of_node = np;
  5297. dai_link[i].codec_name = NULL;
  5298. }
  5299. }
  5300. err:
  5301. return ret;
  5302. }
  5303. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  5304. {
  5305. int ret = -EINVAL;
  5306. struct snd_soc_component *component =
  5307. snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  5308. if (!component) {
  5309. pr_err("* %s: No match for msm-stub-codec component\n",
  5310. __func__);
  5311. return ret;
  5312. }
  5313. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  5314. ARRAY_SIZE(msm_snd_controls));
  5315. if (ret < 0) {
  5316. dev_err(component->dev,
  5317. "%s: add_codec_controls failed, err = %d\n",
  5318. __func__, ret);
  5319. return ret;
  5320. }
  5321. return ret;
  5322. }
  5323. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  5324. struct snd_pcm_hw_params *params)
  5325. {
  5326. return 0;
  5327. }
  5328. static struct snd_soc_ops msm_stub_be_ops = {
  5329. .hw_params = msm_snd_stub_hw_params,
  5330. };
  5331. struct snd_soc_card snd_soc_card_stub_msm = {
  5332. .name = "bengal-stub-snd-card",
  5333. };
  5334. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  5335. /* FrontEnd DAI Links */
  5336. {
  5337. .name = "MSMSTUB Media1",
  5338. .stream_name = "MultiMedia1",
  5339. .cpu_dai_name = "MultiMedia1",
  5340. .platform_name = "msm-pcm-dsp.0",
  5341. .dynamic = 1,
  5342. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5343. .dpcm_playback = 1,
  5344. .dpcm_capture = 1,
  5345. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5346. SND_SOC_DPCM_TRIGGER_POST},
  5347. .codec_dai_name = "snd-soc-dummy-dai",
  5348. .codec_name = "snd-soc-dummy",
  5349. .ignore_suspend = 1,
  5350. /* this dainlink has playback support */
  5351. .ignore_pmdown_time = 1,
  5352. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5353. },
  5354. };
  5355. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  5356. /* Backend DAI Links */
  5357. {
  5358. .name = LPASS_BE_AUXPCM_RX,
  5359. .stream_name = "AUX PCM Playback",
  5360. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5361. .platform_name = "msm-pcm-routing",
  5362. .codec_name = "msm-stub-codec.1",
  5363. .codec_dai_name = "msm-stub-rx",
  5364. .no_pcm = 1,
  5365. .dpcm_playback = 1,
  5366. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  5367. .init = &msm_audrx_stub_init,
  5368. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5369. .ignore_pmdown_time = 1,
  5370. .ignore_suspend = 1,
  5371. .ops = &msm_stub_be_ops,
  5372. },
  5373. {
  5374. .name = LPASS_BE_AUXPCM_TX,
  5375. .stream_name = "AUX PCM Capture",
  5376. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5377. .platform_name = "msm-pcm-routing",
  5378. .codec_name = "msm-stub-codec.1",
  5379. .codec_dai_name = "msm-stub-tx",
  5380. .no_pcm = 1,
  5381. .dpcm_capture = 1,
  5382. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  5383. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5384. .ignore_suspend = 1,
  5385. .ops = &msm_stub_be_ops,
  5386. },
  5387. };
  5388. static struct snd_soc_dai_link msm_stub_dai_links[
  5389. ARRAY_SIZE(msm_stub_fe_dai_links) +
  5390. ARRAY_SIZE(msm_stub_be_dai_links)];
  5391. static const struct of_device_id bengal_asoc_machine_of_match[] = {
  5392. { .compatible = "qcom,bengal-asoc-snd",
  5393. .data = "codec"},
  5394. { .compatible = "qcom,bengal-asoc-snd-stub",
  5395. .data = "stub_codec"},
  5396. {},
  5397. };
  5398. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  5399. {
  5400. struct snd_soc_card *card = NULL;
  5401. struct snd_soc_dai_link *dailink = NULL;
  5402. int len_1 = 0;
  5403. int len_2 = 0;
  5404. int total_links = 0;
  5405. int rc = 0;
  5406. u32 mi2s_audio_intf = 0;
  5407. u32 auxpcm_audio_intf = 0;
  5408. u32 rxtx_bolero_codec = 0;
  5409. u32 va_bolero_codec = 0;
  5410. u32 val = 0;
  5411. u32 wcn_btfm_intf = 0;
  5412. const struct of_device_id *match;
  5413. match = of_match_node(bengal_asoc_machine_of_match, dev->of_node);
  5414. if (!match) {
  5415. dev_err(dev, "%s: No DT match found for sound card\n",
  5416. __func__);
  5417. return NULL;
  5418. }
  5419. if (!strcmp(match->data, "codec")) {
  5420. card = &snd_soc_card_bengal_msm;
  5421. memcpy(msm_bengal_dai_links + total_links,
  5422. msm_common_dai_links,
  5423. sizeof(msm_common_dai_links));
  5424. total_links += ARRAY_SIZE(msm_common_dai_links);
  5425. memcpy(msm_bengal_dai_links + total_links,
  5426. msm_common_misc_fe_dai_links,
  5427. sizeof(msm_common_misc_fe_dai_links));
  5428. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  5429. memcpy(msm_bengal_dai_links + total_links,
  5430. msm_common_be_dai_links,
  5431. sizeof(msm_common_be_dai_links));
  5432. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  5433. rc = of_property_read_u32(dev->of_node,
  5434. "qcom,rxtx-bolero-codec",
  5435. &rxtx_bolero_codec);
  5436. if (rc) {
  5437. dev_dbg(dev, "%s: No DT match RXTX Macro codec\n",
  5438. __func__);
  5439. } else {
  5440. if (rxtx_bolero_codec) {
  5441. memcpy(msm_bengal_dai_links + total_links,
  5442. msm_rx_tx_cdc_dma_be_dai_links,
  5443. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  5444. total_links +=
  5445. ARRAY_SIZE(
  5446. msm_rx_tx_cdc_dma_be_dai_links);
  5447. }
  5448. }
  5449. rc = of_property_read_u32(dev->of_node, "qcom,va-bolero-codec",
  5450. &va_bolero_codec);
  5451. if (rc) {
  5452. dev_dbg(dev, "%s: No DT match VA Macro codec\n",
  5453. __func__);
  5454. } else {
  5455. if (va_bolero_codec) {
  5456. memcpy(msm_bengal_dai_links + total_links,
  5457. msm_va_cdc_dma_be_dai_links,
  5458. sizeof(msm_va_cdc_dma_be_dai_links));
  5459. total_links +=
  5460. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  5461. }
  5462. }
  5463. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  5464. &mi2s_audio_intf);
  5465. if (rc) {
  5466. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  5467. __func__);
  5468. } else {
  5469. if (mi2s_audio_intf) {
  5470. memcpy(msm_bengal_dai_links + total_links,
  5471. msm_mi2s_be_dai_links,
  5472. sizeof(msm_mi2s_be_dai_links));
  5473. total_links +=
  5474. ARRAY_SIZE(msm_mi2s_be_dai_links);
  5475. }
  5476. }
  5477. rc = of_property_read_u32(dev->of_node,
  5478. "qcom,auxpcm-audio-intf",
  5479. &auxpcm_audio_intf);
  5480. if (rc) {
  5481. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  5482. __func__);
  5483. } else {
  5484. if (auxpcm_audio_intf) {
  5485. memcpy(msm_bengal_dai_links + total_links,
  5486. msm_auxpcm_be_dai_links,
  5487. sizeof(msm_auxpcm_be_dai_links));
  5488. total_links +=
  5489. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  5490. }
  5491. }
  5492. rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
  5493. &val);
  5494. if (!rc && val) {
  5495. memcpy(msm_bengal_dai_links + total_links,
  5496. msm_afe_rxtx_lb_be_dai_link,
  5497. sizeof(msm_afe_rxtx_lb_be_dai_link));
  5498. total_links +=
  5499. ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
  5500. }
  5501. rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
  5502. &val);
  5503. if (!rc && val) {
  5504. memcpy(msm_bengal_dai_links + total_links,
  5505. msm_tdm_be_dai_links,
  5506. sizeof(msm_tdm_be_dai_links));
  5507. total_links +=
  5508. ARRAY_SIZE(msm_tdm_be_dai_links);
  5509. }
  5510. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  5511. &wcn_btfm_intf);
  5512. if (rc) {
  5513. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  5514. __func__);
  5515. } else {
  5516. if (wcn_btfm_intf) {
  5517. memcpy(msm_bengal_dai_links + total_links,
  5518. msm_wcn_btfm_be_dai_links,
  5519. sizeof(msm_wcn_btfm_be_dai_links));
  5520. total_links +=
  5521. ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
  5522. }
  5523. }
  5524. dailink = msm_bengal_dai_links;
  5525. } else if (!strcmp(match->data, "stub_codec")) {
  5526. card = &snd_soc_card_stub_msm;
  5527. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  5528. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  5529. memcpy(msm_stub_dai_links,
  5530. msm_stub_fe_dai_links,
  5531. sizeof(msm_stub_fe_dai_links));
  5532. memcpy(msm_stub_dai_links + len_1,
  5533. msm_stub_be_dai_links,
  5534. sizeof(msm_stub_be_dai_links));
  5535. dailink = msm_stub_dai_links;
  5536. total_links = len_2;
  5537. }
  5538. if (card) {
  5539. card->dai_link = dailink;
  5540. card->num_links = total_links;
  5541. }
  5542. return card;
  5543. }
  5544. static int msm_aux_codec_init(struct snd_soc_component *component)
  5545. {
  5546. struct snd_soc_dapm_context *dapm =
  5547. snd_soc_component_get_dapm(component);
  5548. int ret = 0;
  5549. void *mbhc_calibration;
  5550. struct snd_info_entry *entry;
  5551. struct snd_card *card = component->card->snd_card;
  5552. struct msm_asoc_mach_data *pdata;
  5553. struct platform_device *pdev = NULL;
  5554. char *data = NULL;
  5555. int i = 0;
  5556. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  5557. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  5558. snd_soc_dapm_ignore_suspend(dapm, "LO");
  5559. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  5560. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  5561. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  5562. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  5563. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  5564. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  5565. snd_soc_dapm_sync(dapm);
  5566. pdata = snd_soc_card_get_drvdata(component->card);
  5567. if (!pdata->codec_root) {
  5568. entry = snd_info_create_subdir(card->module, "codecs",
  5569. card->proc_root);
  5570. if (!entry) {
  5571. dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
  5572. __func__);
  5573. ret = 0;
  5574. goto mbhc_cfg_cal;
  5575. }
  5576. pdata->codec_root = entry;
  5577. }
  5578. for (i = 0; i < component->card->num_aux_devs; i++)
  5579. {
  5580. if (msm_aux_dev[i].name != NULL ) {
  5581. if (strstr(msm_aux_dev[i].name, "wsa"))
  5582. continue;
  5583. }
  5584. if (msm_aux_dev[i].codec_of_node) {
  5585. pdev = of_find_device_by_node(
  5586. msm_aux_dev[i].codec_of_node);
  5587. if (pdev)
  5588. data = (char*) of_device_get_match_data(
  5589. &pdev->dev);
  5590. if (data != NULL) {
  5591. if (!strncmp(data, "wcd937x",
  5592. sizeof("wcd937x"))) {
  5593. wcd937x_info_create_codec_entry(
  5594. pdata->codec_root, component);
  5595. break;
  5596. } else if (!strncmp(data, "rouleur",
  5597. sizeof("rouleur"))) {
  5598. rouleur_info_create_codec_entry(
  5599. pdata->codec_root, component);
  5600. break;
  5601. }
  5602. }
  5603. }
  5604. }
  5605. mbhc_cfg_cal:
  5606. mbhc_calibration = def_wcd_mbhc_cal();
  5607. if (!mbhc_calibration)
  5608. return -ENOMEM;
  5609. wcd_mbhc_cfg.calibration = mbhc_calibration;
  5610. if (data != NULL) {
  5611. if (!strncmp(data, "wcd937x", sizeof("wcd937x")))
  5612. ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  5613. else if (!strncmp( data, "rouleur", sizeof("rouleur")))
  5614. ret = rouleur_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  5615. }
  5616. if (ret) {
  5617. dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
  5618. __func__, ret);
  5619. goto err_hs_detect;
  5620. }
  5621. return 0;
  5622. err_hs_detect:
  5623. kfree(mbhc_calibration);
  5624. return ret;
  5625. }
  5626. static int msm_init_aux_dev(struct platform_device *pdev,
  5627. struct snd_soc_card *card)
  5628. {
  5629. struct device_node *wsa_of_node;
  5630. struct device_node *aux_codec_of_node;
  5631. u32 wsa_max_devs;
  5632. u32 wsa_dev_cnt;
  5633. u32 codec_max_aux_devs = 0;
  5634. u32 codec_aux_dev_cnt = 0;
  5635. int i;
  5636. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  5637. struct aux_codec_dev_info *aux_cdc_dev_info;
  5638. const char *auxdev_name_prefix[1];
  5639. char *dev_name_str = NULL;
  5640. int found = 0;
  5641. int codecs_found = 0;
  5642. int ret = 0;
  5643. /* Get maximum WSA device count for this platform */
  5644. ret = of_property_read_u32(pdev->dev.of_node,
  5645. "qcom,wsa-max-devs", &wsa_max_devs);
  5646. if (ret) {
  5647. dev_info(&pdev->dev,
  5648. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  5649. __func__, pdev->dev.of_node->full_name, ret);
  5650. wsa_max_devs = 0;
  5651. goto codec_aux_dev;
  5652. }
  5653. if (wsa_max_devs == 0) {
  5654. dev_warn(&pdev->dev,
  5655. "%s: Max WSA devices is 0 for this target?\n",
  5656. __func__);
  5657. goto codec_aux_dev;
  5658. }
  5659. /* Get count of WSA device phandles for this platform */
  5660. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  5661. "qcom,wsa-devs", NULL);
  5662. if (wsa_dev_cnt == -ENOENT) {
  5663. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  5664. __func__);
  5665. goto err;
  5666. } else if (wsa_dev_cnt <= 0) {
  5667. dev_err(&pdev->dev,
  5668. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  5669. __func__, wsa_dev_cnt);
  5670. ret = -EINVAL;
  5671. goto err;
  5672. }
  5673. /*
  5674. * Expect total phandles count to be NOT less than maximum possible
  5675. * WSA count. However, if it is less, then assign same value to
  5676. * max count as well.
  5677. */
  5678. if (wsa_dev_cnt < wsa_max_devs) {
  5679. dev_dbg(&pdev->dev,
  5680. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  5681. __func__, wsa_max_devs, wsa_dev_cnt);
  5682. wsa_max_devs = wsa_dev_cnt;
  5683. }
  5684. /* Make sure prefix string passed for each WSA device */
  5685. ret = of_property_count_strings(pdev->dev.of_node,
  5686. "qcom,wsa-aux-dev-prefix");
  5687. if (ret != wsa_dev_cnt) {
  5688. dev_err(&pdev->dev,
  5689. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  5690. __func__, wsa_dev_cnt, ret);
  5691. ret = -EINVAL;
  5692. goto err;
  5693. }
  5694. /*
  5695. * Alloc mem to store phandle and index info of WSA device, if already
  5696. * registered with ALSA core
  5697. */
  5698. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  5699. sizeof(struct msm_wsa881x_dev_info),
  5700. GFP_KERNEL);
  5701. if (!wsa881x_dev_info) {
  5702. ret = -ENOMEM;
  5703. goto err;
  5704. }
  5705. /*
  5706. * search and check whether all WSA devices are already
  5707. * registered with ALSA core or not. If found a node, store
  5708. * the node and the index in a local array of struct for later
  5709. * use.
  5710. */
  5711. for (i = 0; i < wsa_dev_cnt; i++) {
  5712. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  5713. "qcom,wsa-devs", i);
  5714. if (unlikely(!wsa_of_node)) {
  5715. /* we should not be here */
  5716. dev_err(&pdev->dev,
  5717. "%s: wsa dev node is not present\n",
  5718. __func__);
  5719. ret = -EINVAL;
  5720. goto err;
  5721. }
  5722. if (soc_find_component(wsa_of_node, NULL)) {
  5723. /* WSA device registered with ALSA core */
  5724. wsa881x_dev_info[found].of_node = wsa_of_node;
  5725. wsa881x_dev_info[found].index = i;
  5726. found++;
  5727. if (found == wsa_max_devs)
  5728. break;
  5729. }
  5730. }
  5731. if (found < wsa_max_devs) {
  5732. dev_dbg(&pdev->dev,
  5733. "%s: failed to find %d components. Found only %d\n",
  5734. __func__, wsa_max_devs, found);
  5735. return -EPROBE_DEFER;
  5736. }
  5737. dev_info(&pdev->dev,
  5738. "%s: found %d wsa881x devices registered with ALSA core\n",
  5739. __func__, found);
  5740. codec_aux_dev:
  5741. /* Get maximum aux codec device count for this platform */
  5742. ret = of_property_read_u32(pdev->dev.of_node,
  5743. "qcom,codec-max-aux-devs",
  5744. &codec_max_aux_devs);
  5745. if (ret) {
  5746. dev_err(&pdev->dev,
  5747. "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
  5748. __func__, pdev->dev.of_node->full_name, ret);
  5749. codec_max_aux_devs = 0;
  5750. goto aux_dev_register;
  5751. }
  5752. if (codec_max_aux_devs == 0) {
  5753. dev_dbg(&pdev->dev,
  5754. "%s: Max aux codec devices is 0 for this target?\n",
  5755. __func__);
  5756. goto aux_dev_register;
  5757. }
  5758. /* Get count of aux codec device phandles for this platform */
  5759. codec_aux_dev_cnt = of_count_phandle_with_args(
  5760. pdev->dev.of_node,
  5761. "qcom,codec-aux-devs", NULL);
  5762. if (codec_aux_dev_cnt == -ENOENT) {
  5763. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  5764. __func__);
  5765. goto err;
  5766. } else if (codec_aux_dev_cnt <= 0) {
  5767. dev_err(&pdev->dev,
  5768. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  5769. __func__, codec_aux_dev_cnt);
  5770. ret = -EINVAL;
  5771. goto err;
  5772. }
  5773. /*
  5774. * Expect total phandles count to be NOT less than maximum possible
  5775. * AUX device count. However, if it is less, then assign same value to
  5776. * max count as well.
  5777. */
  5778. if (codec_aux_dev_cnt < codec_max_aux_devs) {
  5779. dev_dbg(&pdev->dev,
  5780. "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
  5781. __func__, codec_max_aux_devs,
  5782. codec_aux_dev_cnt);
  5783. codec_max_aux_devs = codec_aux_dev_cnt;
  5784. }
  5785. /*
  5786. * Alloc mem to store phandle and index info of aux codec
  5787. * if already registered with ALSA core
  5788. */
  5789. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  5790. sizeof(struct aux_codec_dev_info),
  5791. GFP_KERNEL);
  5792. if (!aux_cdc_dev_info) {
  5793. ret = -ENOMEM;
  5794. goto err;
  5795. }
  5796. /*
  5797. * search and check whether all aux codecs are already
  5798. * registered with ALSA core or not. If found a node, store
  5799. * the node and the index in a local array of struct for later
  5800. * use.
  5801. */
  5802. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5803. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  5804. "qcom,codec-aux-devs", i);
  5805. if (unlikely(!aux_codec_of_node)) {
  5806. /* we should not be here */
  5807. dev_err(&pdev->dev,
  5808. "%s: aux codec dev node is not present\n",
  5809. __func__);
  5810. ret = -EINVAL;
  5811. goto err;
  5812. }
  5813. if (soc_find_component(aux_codec_of_node, NULL)) {
  5814. /* AUX codec registered with ALSA core */
  5815. aux_cdc_dev_info[codecs_found].of_node =
  5816. aux_codec_of_node;
  5817. aux_cdc_dev_info[codecs_found].index = i;
  5818. codecs_found++;
  5819. }
  5820. }
  5821. if (codecs_found < codec_aux_dev_cnt) {
  5822. dev_dbg(&pdev->dev,
  5823. "%s: failed to find %d components. Found only %d\n",
  5824. __func__, codec_aux_dev_cnt, codecs_found);
  5825. return -EPROBE_DEFER;
  5826. }
  5827. dev_info(&pdev->dev,
  5828. "%s: found %d AUX codecs registered with ALSA core\n",
  5829. __func__, codecs_found);
  5830. aux_dev_register:
  5831. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  5832. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  5833. /* Alloc array of AUX devs struct */
  5834. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  5835. sizeof(struct snd_soc_aux_dev),
  5836. GFP_KERNEL);
  5837. if (!msm_aux_dev) {
  5838. ret = -ENOMEM;
  5839. goto err;
  5840. }
  5841. /* Alloc array of codec conf struct */
  5842. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  5843. sizeof(struct snd_soc_codec_conf),
  5844. GFP_KERNEL);
  5845. if (!msm_codec_conf) {
  5846. ret = -ENOMEM;
  5847. goto err;
  5848. }
  5849. for (i = 0; i < wsa_max_devs; i++) {
  5850. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  5851. GFP_KERNEL);
  5852. if (!dev_name_str) {
  5853. ret = -ENOMEM;
  5854. goto err;
  5855. }
  5856. ret = of_property_read_string_index(pdev->dev.of_node,
  5857. "qcom,wsa-aux-dev-prefix",
  5858. wsa881x_dev_info[i].index,
  5859. auxdev_name_prefix);
  5860. if (ret) {
  5861. dev_err(&pdev->dev,
  5862. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  5863. __func__, ret);
  5864. ret = -EINVAL;
  5865. goto err;
  5866. }
  5867. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  5868. msm_aux_dev[i].name = dev_name_str;
  5869. msm_aux_dev[i].codec_name = NULL;
  5870. msm_aux_dev[i].codec_of_node =
  5871. wsa881x_dev_info[i].of_node;
  5872. msm_aux_dev[i].init = NULL;
  5873. msm_codec_conf[i].dev_name = NULL;
  5874. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  5875. msm_codec_conf[i].of_node =
  5876. wsa881x_dev_info[i].of_node;
  5877. }
  5878. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5879. msm_aux_dev[wsa_max_devs + i].name = NULL;
  5880. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  5881. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  5882. aux_cdc_dev_info[i].of_node;
  5883. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  5884. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  5885. msm_codec_conf[wsa_max_devs + i].name_prefix =
  5886. NULL;
  5887. msm_codec_conf[wsa_max_devs + i].of_node =
  5888. aux_cdc_dev_info[i].of_node;
  5889. }
  5890. card->codec_conf = msm_codec_conf;
  5891. card->aux_dev = msm_aux_dev;
  5892. err:
  5893. return ret;
  5894. }
  5895. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  5896. {
  5897. int count = 0;
  5898. u32 mi2s_master_slave[MI2S_MAX];
  5899. int ret = 0;
  5900. for (count = 0; count < MI2S_MAX; count++) {
  5901. mutex_init(&mi2s_intf_conf[count].lock);
  5902. mi2s_intf_conf[count].ref_cnt = 0;
  5903. }
  5904. ret = of_property_read_u32_array(pdev->dev.of_node,
  5905. "qcom,msm-mi2s-master",
  5906. mi2s_master_slave, MI2S_MAX);
  5907. if (ret) {
  5908. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  5909. __func__);
  5910. } else {
  5911. for (count = 0; count < MI2S_MAX; count++) {
  5912. mi2s_intf_conf[count].msm_is_mi2s_master =
  5913. mi2s_master_slave[count];
  5914. }
  5915. }
  5916. }
  5917. static void msm_i2s_auxpcm_deinit(void)
  5918. {
  5919. int count = 0;
  5920. for (count = 0; count < MI2S_MAX; count++) {
  5921. mutex_destroy(&mi2s_intf_conf[count].lock);
  5922. mi2s_intf_conf[count].ref_cnt = 0;
  5923. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  5924. }
  5925. }
  5926. static int bengal_ssr_enable(struct device *dev, void *data)
  5927. {
  5928. struct platform_device *pdev = to_platform_device(dev);
  5929. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5930. int ret = 0;
  5931. if (!card) {
  5932. dev_err(dev, "%s: card is NULL\n", __func__);
  5933. ret = -EINVAL;
  5934. goto err;
  5935. }
  5936. if (!strcmp(card->name, "bengal-stub-snd-card")) {
  5937. /* TODO */
  5938. dev_dbg(dev, "%s: TODO\n", __func__);
  5939. }
  5940. snd_soc_card_change_online_state(card, 1);
  5941. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  5942. err:
  5943. return ret;
  5944. }
  5945. static void bengal_ssr_disable(struct device *dev, void *data)
  5946. {
  5947. struct platform_device *pdev = to_platform_device(dev);
  5948. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5949. if (!card) {
  5950. dev_err(dev, "%s: card is NULL\n", __func__);
  5951. return;
  5952. }
  5953. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  5954. snd_soc_card_change_online_state(card, 0);
  5955. if (!strcmp(card->name, "bengal-stub-snd-card")) {
  5956. /* TODO */
  5957. dev_dbg(dev, "%s: TODO\n", __func__);
  5958. }
  5959. }
  5960. static const struct snd_event_ops bengal_ssr_ops = {
  5961. .enable = bengal_ssr_enable,
  5962. .disable = bengal_ssr_disable,
  5963. };
  5964. static int msm_audio_ssr_compare(struct device *dev, void *data)
  5965. {
  5966. struct device_node *node = data;
  5967. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  5968. __func__, dev->of_node, node);
  5969. return (dev->of_node && dev->of_node == node);
  5970. }
  5971. static int msm_audio_ssr_register(struct device *dev)
  5972. {
  5973. struct device_node *np = dev->of_node;
  5974. struct snd_event_clients *ssr_clients = NULL;
  5975. struct device_node *node = NULL;
  5976. int ret = 0;
  5977. int i = 0;
  5978. for (i = 0; ; i++) {
  5979. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  5980. if (!node)
  5981. break;
  5982. snd_event_mstr_add_client(&ssr_clients,
  5983. msm_audio_ssr_compare, node);
  5984. }
  5985. ret = snd_event_master_register(dev, &bengal_ssr_ops,
  5986. ssr_clients, NULL);
  5987. if (!ret)
  5988. snd_event_notify(dev, SND_EVENT_UP);
  5989. return ret;
  5990. }
  5991. static int msm_asoc_machine_probe(struct platform_device *pdev)
  5992. {
  5993. struct snd_soc_card *card = NULL;
  5994. struct msm_asoc_mach_data *pdata = NULL;
  5995. const char *mbhc_audio_jack_type = NULL;
  5996. int ret = 0;
  5997. uint index = 0;
  5998. struct nvmem_cell *cell;
  5999. size_t len;
  6000. u32 *buf;
  6001. u32 adsp_var_idx = 0;
  6002. if (!pdev->dev.of_node) {
  6003. dev_err(&pdev->dev,
  6004. "%s: No platform supplied from device tree\n",
  6005. __func__);
  6006. return -EINVAL;
  6007. }
  6008. pdata = devm_kzalloc(&pdev->dev,
  6009. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  6010. if (!pdata)
  6011. return -ENOMEM;
  6012. card = populate_snd_card_dailinks(&pdev->dev);
  6013. if (!card) {
  6014. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  6015. ret = -EINVAL;
  6016. goto err;
  6017. }
  6018. card->dev = &pdev->dev;
  6019. platform_set_drvdata(pdev, card);
  6020. snd_soc_card_set_drvdata(card, pdata);
  6021. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  6022. if (ret) {
  6023. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  6024. __func__, ret);
  6025. goto err;
  6026. }
  6027. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  6028. if (ret) {
  6029. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  6030. __func__, ret);
  6031. goto err;
  6032. }
  6033. ret = msm_populate_dai_link_component_of_node(card);
  6034. if (ret) {
  6035. ret = -EPROBE_DEFER;
  6036. goto err;
  6037. }
  6038. ret = msm_init_aux_dev(pdev, card);
  6039. if (ret)
  6040. goto err;
  6041. ret = devm_snd_soc_register_card(&pdev->dev, card);
  6042. if (ret == -EPROBE_DEFER) {
  6043. if (codec_reg_done)
  6044. ret = -EINVAL;
  6045. goto err;
  6046. } else if (ret) {
  6047. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  6048. __func__, ret);
  6049. goto err;
  6050. }
  6051. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  6052. __func__, card->name);
  6053. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6054. "qcom,hph-en1-gpio", 0);
  6055. if (!pdata->hph_en1_gpio_p) {
  6056. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  6057. __func__, "qcom,hph-en1-gpio",
  6058. pdev->dev.of_node->full_name);
  6059. }
  6060. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6061. "qcom,hph-en0-gpio", 0);
  6062. if (!pdata->hph_en0_gpio_p) {
  6063. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  6064. __func__, "qcom,hph-en0-gpio",
  6065. pdev->dev.of_node->full_name);
  6066. }
  6067. ret = of_property_read_string(pdev->dev.of_node,
  6068. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  6069. if (ret) {
  6070. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  6071. __func__, "qcom,mbhc-audio-jack-type",
  6072. pdev->dev.of_node->full_name);
  6073. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  6074. } else {
  6075. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  6076. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  6077. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  6078. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  6079. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  6080. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  6081. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  6082. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  6083. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  6084. } else {
  6085. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  6086. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  6087. }
  6088. }
  6089. /*
  6090. * Parse US-Euro gpio info from DT. Report no error if us-euro
  6091. * entry is not found in DT file as some targets do not support
  6092. * US-Euro detection
  6093. */
  6094. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6095. "qcom,us-euro-gpios", 0);
  6096. if (!pdata->us_euro_gpio_p) {
  6097. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  6098. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  6099. } else {
  6100. dev_dbg(&pdev->dev, "%s detected\n",
  6101. "qcom,us-euro-gpios");
  6102. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  6103. }
  6104. if (wcd_mbhc_cfg.enable_usbc_analog)
  6105. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  6106. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  6107. "fsa4480-i2c-handle", 0);
  6108. if (!pdata->fsa_handle)
  6109. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  6110. "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
  6111. msm_i2s_auxpcm_init(pdev);
  6112. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6113. "qcom,cdc-dmic01-gpios",
  6114. 0);
  6115. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6116. "qcom,cdc-dmic23-gpios",
  6117. 0);
  6118. pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
  6119. "qcom,pri-mi2s-gpios", 0);
  6120. pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
  6121. "qcom,sec-mi2s-gpios", 0);
  6122. pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
  6123. "qcom,tert-mi2s-gpios", 0);
  6124. pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
  6125. "qcom,quat-mi2s-gpios", 0);
  6126. for (index = PRIM_MI2S; index < MI2S_MAX; index++)
  6127. atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
  6128. ret = msm_audio_ssr_register(&pdev->dev);
  6129. if (ret)
  6130. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  6131. __func__, ret);
  6132. is_initial_boot = true;
  6133. /* get adsp variant idx */
  6134. cell = nvmem_cell_get(&pdev->dev, "adsp_variant");
  6135. if (IS_ERR_OR_NULL(cell)) {
  6136. dev_dbg(&pdev->dev, "%s: FAILED to get nvmem cell \n", __func__);
  6137. goto ret;
  6138. }
  6139. buf = nvmem_cell_read(cell, &len);
  6140. nvmem_cell_put(cell);
  6141. if (IS_ERR_OR_NULL(buf) || len <= 0 || len > sizeof(32)) {
  6142. dev_dbg(&pdev->dev, "%s: FAILED to read nvmem cell \n", __func__);
  6143. goto ret;
  6144. }
  6145. memcpy(&adsp_var_idx, buf, len);
  6146. kfree(buf);
  6147. va_disable = adsp_var_idx;
  6148. ret:
  6149. return 0;
  6150. err:
  6151. devm_kfree(&pdev->dev, pdata);
  6152. return ret;
  6153. }
  6154. static int msm_asoc_machine_remove(struct platform_device *pdev)
  6155. {
  6156. struct snd_soc_card *card = platform_get_drvdata(pdev);
  6157. snd_event_master_deregister(&pdev->dev);
  6158. snd_soc_unregister_card(card);
  6159. msm_i2s_auxpcm_deinit();
  6160. return 0;
  6161. }
  6162. static struct platform_driver bengal_asoc_machine_driver = {
  6163. .driver = {
  6164. .name = DRV_NAME,
  6165. .owner = THIS_MODULE,
  6166. .pm = &snd_soc_pm_ops,
  6167. .of_match_table = bengal_asoc_machine_of_match,
  6168. .suppress_bind_attrs = true,
  6169. },
  6170. .probe = msm_asoc_machine_probe,
  6171. .remove = msm_asoc_machine_remove,
  6172. };
  6173. module_platform_driver(bengal_asoc_machine_driver);
  6174. MODULE_DESCRIPTION("ALSA SoC msm");
  6175. MODULE_LICENSE("GPL v2");
  6176. MODULE_ALIAS("platform:" DRV_NAME);
  6177. MODULE_DEVICE_TABLE(of, bengal_asoc_machine_of_match);