
Update file header to GPL-2.0-only. Change-Id: Ic1542a3209a5fe73c937a5b36491ede4a451936d Signed-off-by: Meng Wang <mengw@codeaurora.org>
222 satır
3.7 KiB
C
222 satır
3.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
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*/
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#ifndef AQT1000_H
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#define AQT1000_H
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/i2c.h>
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#include "pdata.h"
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#include "aqt1000-clsh.h"
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#define AQT1000_MAX_MICBIAS 1
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#define AQT1000_NUM_INTERPOLATORS 2
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#define AQT1000_NUM_DECIMATORS 3
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#define AQT1000_VOUT_CTL_TO_MICB(v) (1000 + v * 50)
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#define AQT1000_RX_PATH_CTL_OFFSET 20
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#define AQT1000_CLK_24P576MHZ 24576000
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#define AQT1000_CLK_19P2MHZ 19200000
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#define AQT1000_CLK_12P288MHZ 12288000
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#define AQT1000_CLK_9P6MHZ 9600000
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#define AQT1000_ST_IIR_COEFF_MAX 5
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enum {
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AQT1000_RX0 = 0,
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AQT1000_RX1,
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AQT1000_RX_MAX,
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};
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enum {
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AQT_NONE,
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AQT_MCLK,
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AQT_RCO,
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};
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enum {
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AQT_TX0 = 0,
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AQT_TX1,
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};
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enum {
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ASRC0,
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ASRC1,
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ASRC_MAX,
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};
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/* Each IIR has 5 Filter Stages */
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enum {
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BAND1 = 0,
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BAND2,
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BAND3,
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BAND4,
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BAND5,
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BAND_MAX,
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};
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enum {
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AQT1000_TX0 = 0,
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AQT1000_TX1,
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AQT1000_TX2,
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AQT1000_TX_MAX,
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};
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enum {
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INTERP_HPHL,
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INTERP_HPHR,
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INTERP_MAX,
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};
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enum {
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INTERP_MAIN_PATH,
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INTERP_MIX_PATH,
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};
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enum {
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COMPANDER_1, /* HPH_L */
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COMPANDER_2, /* HPH_R */
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COMPANDER_MAX,
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};
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enum {
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AIF1_PB = 0,
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AIF1_CAP,
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NUM_CODEC_DAIS,
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};
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struct aqt_codec_dai_data {
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u32 rate;
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u32 *ch_num;
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u32 ch_act;
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u32 ch_tot;
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};
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struct aqt_idle_detect_config {
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u8 hph_idle_thr;
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u8 hph_idle_detect_en;
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};
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struct aqt1000_i2c {
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struct i2c_client *client;
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struct i2c_msg xfer_msg[2];
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struct mutex xfer_lock;
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int mod_id;
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};
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struct aqt1000_cdc_dai_data {
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u32 rate; /* sample rate */
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u32 bit_width; /* sit width 16,24,32 */
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struct list_head ch_list;
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wait_queue_head_t dai_wait;
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};
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struct tx_mute_work {
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struct aqt1000 *aqt;
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u8 decimator;
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struct delayed_work dwork;
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};
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struct hpf_work {
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struct aqt1000 *aqt;
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u8 decimator;
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u8 hpf_cut_off_freq;
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struct delayed_work dwork;
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};
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struct aqt1000 {
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struct device *dev;
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struct mutex io_lock;
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struct mutex xfer_lock;
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struct mutex reset_lock;
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struct device_node *aqt_rst_np;
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int (*read_dev)(struct aqt1000 *aqt, unsigned short reg,
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void *dest, int bytes);
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int (*write_dev)(struct aqt1000 *aqt, unsigned short reg,
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void *src, int bytes);
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u32 num_of_supplies;
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struct regulator_bulk_data *supplies;
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u32 mclk_rate;
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struct regmap *regmap;
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struct snd_soc_component *component;
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bool dev_up;
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bool prev_pg_valid;
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u8 prev_pg;
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struct aqt1000_i2c i2c_dev;
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/* Codec params */
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/* ANC related */
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u32 anc_slot;
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bool anc_func;
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/* compander */
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int comp_enabled[COMPANDER_MAX];
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/* class h specific data */
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struct aqt_clsh_cdc_data clsh_d;
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/* Interpolator Mode Select for HPH_L and HPH_R */
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u32 hph_mode;
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unsigned long status_mask;
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struct aqt1000_cdc_dai_data dai[NUM_CODEC_DAIS];
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struct mutex micb_lock;
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struct clk *ext_clk;
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/* mbhc module */
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struct aqt1000_mbhc *mbhc;
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struct mutex codec_mutex;
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/* cal info for codec */
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struct fw_info *fw_data;
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int native_clk_users;
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/* ASRC users count */
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int asrc_users[ASRC_MAX];
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int asrc_output_mode[ASRC_MAX];
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/* Main path clock users count */
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int main_clk_users[AQT1000_NUM_INTERPOLATORS];
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struct aqt_idle_detect_config idle_det_cfg;
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u32 rx_bias_count;
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s32 micb_ref;
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s32 pullup_ref;
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int master_bias_users;
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int mclk_users;
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int i2s_users;
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struct hpf_work tx_hpf_work[AQT1000_NUM_DECIMATORS];
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struct tx_mute_work tx_mute_dwork[AQT1000_NUM_DECIMATORS];
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struct mutex master_bias_lock;
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struct mutex cdc_bg_clk_lock;
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struct mutex i2s_lock;
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/* Interrupt */
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struct regmap_irq_chip_data *irq_chip;
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int num_irq_regs;
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struct irq_domain *virq;
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int irq;
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int irq_base;
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/* Entry for version info */
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struct snd_info_entry *entry;
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struct snd_info_entry *version_entry;
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};
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#endif /* AQT1000_H */
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