dp_main.c 216 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_hw_headers.h>
  24. #include <hal_api.h>
  25. #include <hif.h>
  26. #include <htt.h>
  27. #include <wdi_event.h>
  28. #include <queue.h>
  29. #include "dp_htt.h"
  30. #include "dp_types.h"
  31. #include "dp_internal.h"
  32. #include "dp_tx.h"
  33. #include "dp_tx_desc.h"
  34. #include "dp_rx.h"
  35. #include <cdp_txrx_handle.h>
  36. #include <wlan_cfg.h>
  37. #include "cdp_txrx_cmn_struct.h"
  38. #include "cdp_txrx_stats_struct.h"
  39. #include <qdf_util.h>
  40. #include "dp_peer.h"
  41. #include "dp_rx_mon.h"
  42. #include "htt_stats.h"
  43. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  44. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  45. #include "cdp_txrx_flow_ctrl_v2.h"
  46. #else
  47. static inline void
  48. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  49. {
  50. return;
  51. }
  52. #endif
  53. #include "dp_ipa.h"
  54. #ifdef CONFIG_MCL
  55. static void dp_service_mon_rings(void *arg);
  56. #ifndef REMOVE_PKT_LOG
  57. #include <pktlog_ac_api.h>
  58. #include <pktlog_ac.h>
  59. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  60. #endif
  61. #endif
  62. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  63. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  64. uint8_t *peer_mac_addr,
  65. struct cdp_ctrl_objmgr_peer *ctrl_peer);
  66. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  67. #define DP_INTR_POLL_TIMER_MS 10
  68. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  69. #define DP_MCS_LENGTH (6*MAX_MCS)
  70. #define DP_NSS_LENGTH (6*SS_COUNT)
  71. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  72. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  73. #define DP_MAX_MCS_STRING_LEN 30
  74. #define DP_CURR_FW_STATS_AVAIL 19
  75. #define DP_HTT_DBG_EXT_STATS_MAX 256
  76. #define DP_MAX_SLEEP_TIME 100
  77. #ifdef IPA_OFFLOAD
  78. /* Exclude IPA rings from the interrupt context */
  79. #define TX_RING_MASK_VAL 0xb
  80. #define RX_RING_MASK_VAL 0x7
  81. #else
  82. #define TX_RING_MASK_VAL 0xF
  83. #define RX_RING_MASK_VAL 0xF
  84. #endif
  85. bool rx_hash = 1;
  86. qdf_declare_param(rx_hash, bool);
  87. #define STR_MAXLEN 64
  88. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  89. /* PPDU stats mask sent to FW to enable enhanced stats */
  90. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  91. /* PPDU stats mask sent to FW to support debug sniffer feature */
  92. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  93. /* PPDU stats mask sent to FW to support BPR feature*/
  94. #define DP_PPDU_STATS_CFG_BPR 0x2000
  95. /* PPDU stats mask sent to FW to support BPR and enhanced stats feature */
  96. #define DP_PPDU_STATS_CFG_BPR_ENH (DP_PPDU_STATS_CFG_BPR | \
  97. DP_PPDU_STATS_CFG_ENH_STATS)
  98. /* PPDU stats mask sent to FW to support BPR and pcktlog stats feature */
  99. #define DP_PPDU_STATS_CFG_BPR_PKTLOG (DP_PPDU_STATS_CFG_BPR | \
  100. DP_PPDU_TXLITE_STATS_BITMASK_CFG)
  101. /**
  102. * default_dscp_tid_map - Default DSCP-TID mapping
  103. *
  104. * DSCP TID
  105. * 000000 0
  106. * 001000 1
  107. * 010000 2
  108. * 011000 3
  109. * 100000 4
  110. * 101000 5
  111. * 110000 6
  112. * 111000 7
  113. */
  114. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  115. 0, 0, 0, 0, 0, 0, 0, 0,
  116. 1, 1, 1, 1, 1, 1, 1, 1,
  117. 2, 2, 2, 2, 2, 2, 2, 2,
  118. 3, 3, 3, 3, 3, 3, 3, 3,
  119. 4, 4, 4, 4, 4, 4, 4, 4,
  120. 5, 5, 5, 5, 5, 5, 5, 5,
  121. 6, 6, 6, 6, 6, 6, 6, 6,
  122. 7, 7, 7, 7, 7, 7, 7, 7,
  123. };
  124. /*
  125. * struct dp_rate_debug
  126. *
  127. * @mcs_type: print string for a given mcs
  128. * @valid: valid mcs rate?
  129. */
  130. struct dp_rate_debug {
  131. char mcs_type[DP_MAX_MCS_STRING_LEN];
  132. uint8_t valid;
  133. };
  134. #define MCS_VALID 1
  135. #define MCS_INVALID 0
  136. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  137. {
  138. {"OFDM 48 Mbps", MCS_VALID},
  139. {"OFDM 24 Mbps", MCS_VALID},
  140. {"OFDM 12 Mbps", MCS_VALID},
  141. {"OFDM 6 Mbps ", MCS_VALID},
  142. {"OFDM 54 Mbps", MCS_VALID},
  143. {"OFDM 36 Mbps", MCS_VALID},
  144. {"OFDM 18 Mbps", MCS_VALID},
  145. {"OFDM 9 Mbps ", MCS_VALID},
  146. {"INVALID ", MCS_INVALID},
  147. {"INVALID ", MCS_INVALID},
  148. {"INVALID ", MCS_INVALID},
  149. {"INVALID ", MCS_INVALID},
  150. {"INVALID ", MCS_VALID},
  151. },
  152. {
  153. {"CCK 11 Mbps Long ", MCS_VALID},
  154. {"CCK 5.5 Mbps Long ", MCS_VALID},
  155. {"CCK 2 Mbps Long ", MCS_VALID},
  156. {"CCK 1 Mbps Long ", MCS_VALID},
  157. {"CCK 11 Mbps Short ", MCS_VALID},
  158. {"CCK 5.5 Mbps Short", MCS_VALID},
  159. {"CCK 2 Mbps Short ", MCS_VALID},
  160. {"INVALID ", MCS_INVALID},
  161. {"INVALID ", MCS_INVALID},
  162. {"INVALID ", MCS_INVALID},
  163. {"INVALID ", MCS_INVALID},
  164. {"INVALID ", MCS_INVALID},
  165. {"INVALID ", MCS_VALID},
  166. },
  167. {
  168. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  169. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  170. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  171. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  172. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  173. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  174. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  175. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  176. {"INVALID ", MCS_INVALID},
  177. {"INVALID ", MCS_INVALID},
  178. {"INVALID ", MCS_INVALID},
  179. {"INVALID ", MCS_INVALID},
  180. {"INVALID ", MCS_VALID},
  181. },
  182. {
  183. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  184. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  185. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  186. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  187. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  188. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  189. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  190. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  191. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  192. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  193. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  194. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  195. {"INVALID ", MCS_VALID},
  196. },
  197. {
  198. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  199. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  200. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  201. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  202. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  203. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  204. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  205. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  206. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  207. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  208. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  209. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  210. {"INVALID ", MCS_VALID},
  211. }
  212. };
  213. /**
  214. * @brief Cpu ring map types
  215. */
  216. enum dp_cpu_ring_map_types {
  217. DP_DEFAULT_MAP,
  218. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  219. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  220. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  221. DP_CPU_RING_MAP_MAX
  222. };
  223. /**
  224. * @brief Cpu to tx ring map
  225. */
  226. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  227. {0x0, 0x1, 0x2, 0x0},
  228. {0x1, 0x2, 0x1, 0x2},
  229. {0x0, 0x2, 0x0, 0x2},
  230. {0x2, 0x2, 0x2, 0x2}
  231. };
  232. /**
  233. * @brief Select the type of statistics
  234. */
  235. enum dp_stats_type {
  236. STATS_FW = 0,
  237. STATS_HOST = 1,
  238. STATS_TYPE_MAX = 2,
  239. };
  240. /**
  241. * @brief General Firmware statistics options
  242. *
  243. */
  244. enum dp_fw_stats {
  245. TXRX_FW_STATS_INVALID = -1,
  246. };
  247. /**
  248. * dp_stats_mapping_table - Firmware and Host statistics
  249. * currently supported
  250. */
  251. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  252. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  253. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  261. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  262. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  263. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  264. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  265. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  266. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  267. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  268. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  269. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  270. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  271. /* Last ENUM for HTT FW STATS */
  272. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  273. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  274. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  275. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  276. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  277. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  278. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  279. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  280. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  281. };
  282. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  283. struct cdp_peer *peer_hdl,
  284. uint8_t *mac_addr,
  285. enum cdp_txrx_ast_entry_type type,
  286. uint32_t flags)
  287. {
  288. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  289. (struct dp_peer *)peer_hdl,
  290. mac_addr,
  291. type,
  292. flags);
  293. }
  294. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  295. void *ast_entry_hdl)
  296. {
  297. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  298. qdf_spin_lock_bh(&soc->ast_lock);
  299. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  300. (struct dp_ast_entry *)ast_entry_hdl);
  301. qdf_spin_unlock_bh(&soc->ast_lock);
  302. }
  303. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  304. struct cdp_peer *peer_hdl,
  305. uint8_t *wds_macaddr,
  306. uint32_t flags)
  307. {
  308. int status = -1;
  309. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  310. struct dp_ast_entry *ast_entry = NULL;
  311. qdf_spin_lock_bh(&soc->ast_lock);
  312. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  313. if (ast_entry) {
  314. status = dp_peer_update_ast(soc,
  315. (struct dp_peer *)peer_hdl,
  316. ast_entry, flags);
  317. }
  318. qdf_spin_unlock_bh(&soc->ast_lock);
  319. return status;
  320. }
  321. /*
  322. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  323. * @soc_handle: Datapath SOC handle
  324. * @wds_macaddr: MAC address of the WDS entry to be added
  325. * @vdev_hdl: vdev handle
  326. * Return: None
  327. */
  328. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  329. uint8_t *wds_macaddr, void *vdev_hdl)
  330. {
  331. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  332. struct dp_ast_entry *ast_entry = NULL;
  333. qdf_spin_lock_bh(&soc->ast_lock);
  334. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  335. if (ast_entry) {
  336. if (ast_entry->type != CDP_TXRX_AST_TYPE_STATIC)
  337. ast_entry->is_active = TRUE;
  338. }
  339. qdf_spin_unlock_bh(&soc->ast_lock);
  340. }
  341. /*
  342. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  343. * @soc: Datapath SOC handle
  344. * @vdev_hdl: vdev handle
  345. *
  346. * Return: None
  347. */
  348. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  349. void *vdev_hdl)
  350. {
  351. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  352. struct dp_pdev *pdev;
  353. struct dp_vdev *vdev;
  354. struct dp_peer *peer;
  355. struct dp_ast_entry *ase, *temp_ase;
  356. int i;
  357. qdf_spin_lock_bh(&soc->ast_lock);
  358. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  359. pdev = soc->pdev_list[i];
  360. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  361. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  362. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  363. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  364. if (ase->type ==
  365. CDP_TXRX_AST_TYPE_STATIC)
  366. continue;
  367. ase->is_active = TRUE;
  368. }
  369. }
  370. }
  371. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  372. }
  373. qdf_spin_unlock_bh(&soc->ast_lock);
  374. }
  375. /*
  376. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  377. * @soc: Datapath SOC handle
  378. *
  379. * Return: None
  380. */
  381. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  382. {
  383. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  384. struct dp_pdev *pdev;
  385. struct dp_vdev *vdev;
  386. struct dp_peer *peer;
  387. struct dp_ast_entry *ase, *temp_ase;
  388. int i;
  389. qdf_spin_lock_bh(&soc->ast_lock);
  390. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  391. pdev = soc->pdev_list[i];
  392. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  393. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  394. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  395. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  396. if (ase->type ==
  397. CDP_TXRX_AST_TYPE_STATIC)
  398. continue;
  399. dp_peer_del_ast(soc, ase);
  400. }
  401. }
  402. }
  403. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  404. }
  405. qdf_spin_unlock_bh(&soc->ast_lock);
  406. }
  407. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  408. uint8_t *ast_mac_addr)
  409. {
  410. struct dp_ast_entry *ast_entry;
  411. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  412. qdf_spin_lock_bh(&soc->ast_lock);
  413. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  414. qdf_spin_unlock_bh(&soc->ast_lock);
  415. return (void *)ast_entry;
  416. }
  417. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  418. void *ast_entry_hdl)
  419. {
  420. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  421. (struct dp_ast_entry *)ast_entry_hdl);
  422. }
  423. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  424. void *ast_entry_hdl)
  425. {
  426. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  427. (struct dp_ast_entry *)ast_entry_hdl);
  428. }
  429. static void dp_peer_ast_set_type_wifi3(
  430. struct cdp_soc_t *soc_hdl,
  431. void *ast_entry_hdl,
  432. enum cdp_txrx_ast_entry_type type)
  433. {
  434. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  435. (struct dp_ast_entry *)ast_entry_hdl,
  436. type);
  437. }
  438. /**
  439. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  440. * @ring_num: ring num of the ring being queried
  441. * @grp_mask: the grp_mask array for the ring type in question.
  442. *
  443. * The grp_mask array is indexed by group number and the bit fields correspond
  444. * to ring numbers. We are finding which interrupt group a ring belongs to.
  445. *
  446. * Return: the index in the grp_mask array with the ring number.
  447. * -QDF_STATUS_E_NOENT if no entry is found
  448. */
  449. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  450. {
  451. int ext_group_num;
  452. int mask = 1 << ring_num;
  453. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  454. ext_group_num++) {
  455. if (mask & grp_mask[ext_group_num])
  456. return ext_group_num;
  457. }
  458. return -QDF_STATUS_E_NOENT;
  459. }
  460. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  461. enum hal_ring_type ring_type,
  462. int ring_num)
  463. {
  464. int *grp_mask;
  465. switch (ring_type) {
  466. case WBM2SW_RELEASE:
  467. /* dp_tx_comp_handler - soc->tx_comp_ring */
  468. if (ring_num < 3)
  469. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  470. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  471. else if (ring_num == 3) {
  472. /* sw treats this as a separate ring type */
  473. grp_mask = &soc->wlan_cfg_ctx->
  474. int_rx_wbm_rel_ring_mask[0];
  475. ring_num = 0;
  476. } else {
  477. qdf_assert(0);
  478. return -QDF_STATUS_E_NOENT;
  479. }
  480. break;
  481. case REO_EXCEPTION:
  482. /* dp_rx_err_process - &soc->reo_exception_ring */
  483. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  484. break;
  485. case REO_DST:
  486. /* dp_rx_process - soc->reo_dest_ring */
  487. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  488. break;
  489. case REO_STATUS:
  490. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  491. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  492. break;
  493. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  494. case RXDMA_MONITOR_STATUS:
  495. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  496. case RXDMA_MONITOR_DST:
  497. /* dp_mon_process */
  498. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  499. break;
  500. case RXDMA_DST:
  501. /* dp_rxdma_err_process */
  502. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  503. break;
  504. case RXDMA_BUF:
  505. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  506. break;
  507. case RXDMA_MONITOR_BUF:
  508. /* TODO: support low_thresh interrupt */
  509. return -QDF_STATUS_E_NOENT;
  510. break;
  511. case TCL_DATA:
  512. case TCL_CMD:
  513. case REO_CMD:
  514. case SW2WBM_RELEASE:
  515. case WBM_IDLE_LINK:
  516. /* normally empty SW_TO_HW rings */
  517. return -QDF_STATUS_E_NOENT;
  518. break;
  519. case TCL_STATUS:
  520. case REO_REINJECT:
  521. /* misc unused rings */
  522. return -QDF_STATUS_E_NOENT;
  523. break;
  524. case CE_SRC:
  525. case CE_DST:
  526. case CE_DST_STATUS:
  527. /* CE_rings - currently handled by hif */
  528. default:
  529. return -QDF_STATUS_E_NOENT;
  530. break;
  531. }
  532. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  533. }
  534. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  535. *ring_params, int ring_type, int ring_num)
  536. {
  537. int msi_group_number;
  538. int msi_data_count;
  539. int ret;
  540. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  541. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  542. &msi_data_count, &msi_data_start,
  543. &msi_irq_start);
  544. if (ret)
  545. return;
  546. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  547. ring_num);
  548. if (msi_group_number < 0) {
  549. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  550. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  551. ring_type, ring_num);
  552. ring_params->msi_addr = 0;
  553. ring_params->msi_data = 0;
  554. return;
  555. }
  556. if (msi_group_number > msi_data_count) {
  557. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  558. FL("2 msi_groups will share an msi; msi_group_num %d"),
  559. msi_group_number);
  560. QDF_ASSERT(0);
  561. }
  562. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  563. ring_params->msi_addr = addr_low;
  564. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  565. ring_params->msi_data = (msi_group_number % msi_data_count)
  566. + msi_data_start;
  567. ring_params->flags |= HAL_SRNG_MSI_INTR;
  568. }
  569. /**
  570. * dp_print_ast_stats() - Dump AST table contents
  571. * @soc: Datapath soc handle
  572. *
  573. * return void
  574. */
  575. #ifdef FEATURE_AST
  576. static void dp_print_ast_stats(struct dp_soc *soc)
  577. {
  578. uint8_t i;
  579. uint8_t num_entries = 0;
  580. struct dp_vdev *vdev;
  581. struct dp_pdev *pdev;
  582. struct dp_peer *peer;
  583. struct dp_ast_entry *ase, *tmp_ase;
  584. char type[5][10] = {"NONE", "STATIC", "WDS", "MEC", "HMWDS"};
  585. DP_PRINT_STATS("AST Stats:");
  586. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  587. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  588. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  589. DP_PRINT_STATS("AST Table:");
  590. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  591. pdev = soc->pdev_list[i];
  592. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  593. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  594. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  595. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  596. DP_PRINT_STATS("%6d mac_addr = %pM"
  597. " peer_mac_addr = %pM"
  598. " type = %s"
  599. " next_hop = %d"
  600. " is_active = %d"
  601. " is_bss = %d"
  602. " ast_idx = %d"
  603. " pdev_id = %d"
  604. " vdev_id = %d",
  605. ++num_entries,
  606. ase->mac_addr.raw,
  607. ase->peer->mac_addr.raw,
  608. type[ase->type],
  609. ase->next_hop,
  610. ase->is_active,
  611. ase->is_bss,
  612. ase->ast_idx,
  613. ase->pdev_id,
  614. ase->vdev_id);
  615. }
  616. }
  617. }
  618. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  619. }
  620. }
  621. #else
  622. static void dp_print_ast_stats(struct dp_soc *soc)
  623. {
  624. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  625. return;
  626. }
  627. #endif
  628. static void dp_print_peer_table(struct dp_vdev *vdev)
  629. {
  630. struct dp_peer *peer = NULL;
  631. DP_PRINT_STATS("Dumping Peer Table Stats:");
  632. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  633. if (!peer) {
  634. DP_PRINT_STATS("Invalid Peer");
  635. return;
  636. }
  637. DP_PRINT_STATS(" peer_mac_addr = %pM"
  638. " nawds_enabled = %d"
  639. " bss_peer = %d"
  640. " wapi = %d"
  641. " wds_enabled = %d"
  642. " delete in progress = %d",
  643. peer->mac_addr.raw,
  644. peer->nawds_enabled,
  645. peer->bss_peer,
  646. peer->wapi,
  647. peer->wds_enabled,
  648. peer->delete_in_progress);
  649. }
  650. }
  651. /*
  652. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  653. */
  654. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  655. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  656. {
  657. void *hal_soc = soc->hal_soc;
  658. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  659. /* TODO: See if we should get align size from hal */
  660. uint32_t ring_base_align = 8;
  661. struct hal_srng_params ring_params;
  662. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  663. /* TODO: Currently hal layer takes care of endianness related settings.
  664. * See if these settings need to passed from DP layer
  665. */
  666. ring_params.flags = 0;
  667. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  668. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  669. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  670. srng->hal_srng = NULL;
  671. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  672. srng->num_entries = num_entries;
  673. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  674. soc->osdev, soc->osdev->dev, srng->alloc_size,
  675. &(srng->base_paddr_unaligned));
  676. if (!srng->base_vaddr_unaligned) {
  677. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  678. FL("alloc failed - ring_type: %d, ring_num %d"),
  679. ring_type, ring_num);
  680. return QDF_STATUS_E_NOMEM;
  681. }
  682. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  683. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  684. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  685. ((unsigned long)(ring_params.ring_base_vaddr) -
  686. (unsigned long)srng->base_vaddr_unaligned);
  687. ring_params.num_entries = num_entries;
  688. if (soc->intr_mode == DP_INTR_MSI) {
  689. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  690. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  691. FL("Using MSI for ring_type: %d, ring_num %d"),
  692. ring_type, ring_num);
  693. } else {
  694. ring_params.msi_data = 0;
  695. ring_params.msi_addr = 0;
  696. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  697. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  698. ring_type, ring_num);
  699. }
  700. /*
  701. * Setup interrupt timer and batch counter thresholds for
  702. * interrupt mitigation based on ring type
  703. */
  704. if (ring_type == REO_DST) {
  705. ring_params.intr_timer_thres_us =
  706. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  707. ring_params.intr_batch_cntr_thres_entries =
  708. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  709. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  710. ring_params.intr_timer_thres_us =
  711. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  712. ring_params.intr_batch_cntr_thres_entries =
  713. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  714. } else {
  715. ring_params.intr_timer_thres_us =
  716. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  717. ring_params.intr_batch_cntr_thres_entries =
  718. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  719. }
  720. /* Enable low threshold interrupts for rx buffer rings (regular and
  721. * monitor buffer rings.
  722. * TODO: See if this is required for any other ring
  723. */
  724. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  725. (ring_type == RXDMA_MONITOR_STATUS)) {
  726. /* TODO: Setting low threshold to 1/8th of ring size
  727. * see if this needs to be configurable
  728. */
  729. ring_params.low_threshold = num_entries >> 3;
  730. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  731. ring_params.intr_timer_thres_us =
  732. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  733. ring_params.intr_batch_cntr_thres_entries = 0;
  734. }
  735. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  736. mac_id, &ring_params);
  737. if (!srng->hal_srng) {
  738. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  739. srng->alloc_size,
  740. srng->base_vaddr_unaligned,
  741. srng->base_paddr_unaligned, 0);
  742. }
  743. return 0;
  744. }
  745. /**
  746. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  747. * Any buffers allocated and attached to ring entries are expected to be freed
  748. * before calling this function.
  749. */
  750. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  751. int ring_type, int ring_num)
  752. {
  753. if (!srng->hal_srng) {
  754. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  755. FL("Ring type: %d, num:%d not setup"),
  756. ring_type, ring_num);
  757. return;
  758. }
  759. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  760. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  761. srng->alloc_size,
  762. srng->base_vaddr_unaligned,
  763. srng->base_paddr_unaligned, 0);
  764. srng->hal_srng = NULL;
  765. }
  766. /* TODO: Need this interface from HIF */
  767. void *hif_get_hal_handle(void *hif_handle);
  768. /*
  769. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  770. * @dp_ctx: DP SOC handle
  771. * @budget: Number of frames/descriptors that can be processed in one shot
  772. *
  773. * Return: remaining budget/quota for the soc device
  774. */
  775. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  776. {
  777. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  778. struct dp_soc *soc = int_ctx->soc;
  779. int ring = 0;
  780. uint32_t work_done = 0;
  781. int budget = dp_budget;
  782. uint8_t tx_mask = int_ctx->tx_ring_mask;
  783. uint8_t rx_mask = int_ctx->rx_ring_mask;
  784. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  785. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  786. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  787. uint32_t remaining_quota = dp_budget;
  788. struct dp_pdev *pdev = NULL;
  789. int mac_id;
  790. /* Process Tx completion interrupts first to return back buffers */
  791. while (tx_mask) {
  792. if (tx_mask & 0x1) {
  793. work_done = dp_tx_comp_handler(soc,
  794. soc->tx_comp_ring[ring].hal_srng,
  795. remaining_quota);
  796. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  797. "tx mask 0x%x ring %d, budget %d, work_done %d",
  798. tx_mask, ring, budget, work_done);
  799. budget -= work_done;
  800. if (budget <= 0)
  801. goto budget_done;
  802. remaining_quota = budget;
  803. }
  804. tx_mask = tx_mask >> 1;
  805. ring++;
  806. }
  807. /* Process REO Exception ring interrupt */
  808. if (rx_err_mask) {
  809. work_done = dp_rx_err_process(soc,
  810. soc->reo_exception_ring.hal_srng,
  811. remaining_quota);
  812. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  813. "REO Exception Ring: work_done %d budget %d",
  814. work_done, budget);
  815. budget -= work_done;
  816. if (budget <= 0) {
  817. goto budget_done;
  818. }
  819. remaining_quota = budget;
  820. }
  821. /* Process Rx WBM release ring interrupt */
  822. if (rx_wbm_rel_mask) {
  823. work_done = dp_rx_wbm_err_process(soc,
  824. soc->rx_rel_ring.hal_srng, remaining_quota);
  825. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  826. "WBM Release Ring: work_done %d budget %d",
  827. work_done, budget);
  828. budget -= work_done;
  829. if (budget <= 0) {
  830. goto budget_done;
  831. }
  832. remaining_quota = budget;
  833. }
  834. /* Process Rx interrupts */
  835. if (rx_mask) {
  836. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  837. if (rx_mask & (1 << ring)) {
  838. work_done = dp_rx_process(int_ctx,
  839. soc->reo_dest_ring[ring].hal_srng,
  840. remaining_quota);
  841. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  842. "rx mask 0x%x ring %d, work_done %d budget %d",
  843. rx_mask, ring, work_done, budget);
  844. budget -= work_done;
  845. if (budget <= 0)
  846. goto budget_done;
  847. remaining_quota = budget;
  848. }
  849. }
  850. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  851. work_done = dp_rxdma_err_process(soc, ring,
  852. remaining_quota);
  853. budget -= work_done;
  854. }
  855. }
  856. if (reo_status_mask)
  857. dp_reo_status_ring_handler(soc);
  858. /* Process LMAC interrupts */
  859. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  860. pdev = soc->pdev_list[ring];
  861. if (pdev == NULL)
  862. continue;
  863. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  864. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  865. pdev->pdev_id);
  866. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  867. work_done = dp_mon_process(soc, mac_for_pdev,
  868. remaining_quota);
  869. budget -= work_done;
  870. if (budget <= 0)
  871. goto budget_done;
  872. remaining_quota = budget;
  873. }
  874. if (int_ctx->rxdma2host_ring_mask &
  875. (1 << mac_for_pdev)) {
  876. work_done = dp_rxdma_err_process(soc,
  877. mac_for_pdev,
  878. remaining_quota);
  879. budget -= work_done;
  880. if (budget <= 0)
  881. goto budget_done;
  882. remaining_quota = budget;
  883. }
  884. if (int_ctx->host2rxdma_ring_mask &
  885. (1 << mac_for_pdev)) {
  886. union dp_rx_desc_list_elem_t *desc_list = NULL;
  887. union dp_rx_desc_list_elem_t *tail = NULL;
  888. struct dp_srng *rx_refill_buf_ring =
  889. &pdev->rx_refill_buf_ring;
  890. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  891. 1);
  892. dp_rx_buffers_replenish(soc, mac_for_pdev,
  893. rx_refill_buf_ring,
  894. &soc->rx_desc_buf[mac_for_pdev], 0,
  895. &desc_list, &tail);
  896. }
  897. }
  898. }
  899. qdf_lro_flush(int_ctx->lro_ctx);
  900. budget_done:
  901. return dp_budget - budget;
  902. }
  903. #ifdef DP_INTR_POLL_BASED
  904. /* dp_interrupt_timer()- timer poll for interrupts
  905. *
  906. * @arg: SoC Handle
  907. *
  908. * Return:
  909. *
  910. */
  911. static void dp_interrupt_timer(void *arg)
  912. {
  913. struct dp_soc *soc = (struct dp_soc *) arg;
  914. int i;
  915. if (qdf_atomic_read(&soc->cmn_init_done)) {
  916. for (i = 0;
  917. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  918. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  919. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  920. }
  921. }
  922. /*
  923. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  924. * @txrx_soc: DP SOC handle
  925. *
  926. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  927. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  928. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  929. *
  930. * Return: 0 for success. nonzero for failure.
  931. */
  932. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  933. {
  934. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  935. int i;
  936. soc->intr_mode = DP_INTR_POLL;
  937. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  938. soc->intr_ctx[i].dp_intr_id = i;
  939. soc->intr_ctx[i].tx_ring_mask =
  940. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  941. soc->intr_ctx[i].rx_ring_mask =
  942. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  943. soc->intr_ctx[i].rx_mon_ring_mask =
  944. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  945. soc->intr_ctx[i].rx_err_ring_mask =
  946. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  947. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  948. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  949. soc->intr_ctx[i].reo_status_ring_mask =
  950. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  951. soc->intr_ctx[i].rxdma2host_ring_mask =
  952. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  953. soc->intr_ctx[i].soc = soc;
  954. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  955. }
  956. qdf_timer_init(soc->osdev, &soc->int_timer,
  957. dp_interrupt_timer, (void *)soc,
  958. QDF_TIMER_TYPE_WAKE_APPS);
  959. return QDF_STATUS_SUCCESS;
  960. }
  961. #else
  962. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  963. {
  964. return -QDF_STATUS_E_NOSUPPORT;
  965. }
  966. #endif
  967. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  968. #if defined(CONFIG_MCL)
  969. extern int con_mode_monitor;
  970. /*
  971. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  972. * @txrx_soc: DP SOC handle
  973. *
  974. * Call the appropriate attach function based on the mode of operation.
  975. * This is a WAR for enabling monitor mode.
  976. *
  977. * Return: 0 for success. nonzero for failure.
  978. */
  979. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  980. {
  981. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  982. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  983. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  984. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  985. "%s: Poll mode", __func__);
  986. return dp_soc_attach_poll(txrx_soc);
  987. } else {
  988. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  989. "%s: Interrupt mode", __func__);
  990. return dp_soc_interrupt_attach(txrx_soc);
  991. }
  992. }
  993. #else
  994. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  995. {
  996. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  997. if (hif_is_polled_mode_enabled(soc->hif_handle))
  998. return dp_soc_attach_poll(txrx_soc);
  999. else
  1000. return dp_soc_interrupt_attach(txrx_soc);
  1001. }
  1002. #endif
  1003. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  1004. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  1005. {
  1006. int j;
  1007. int num_irq = 0;
  1008. int tx_mask =
  1009. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1010. int rx_mask =
  1011. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1012. int rx_mon_mask =
  1013. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1014. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1015. soc->wlan_cfg_ctx, intr_ctx_num);
  1016. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1017. soc->wlan_cfg_ctx, intr_ctx_num);
  1018. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1019. soc->wlan_cfg_ctx, intr_ctx_num);
  1020. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1021. soc->wlan_cfg_ctx, intr_ctx_num);
  1022. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1023. soc->wlan_cfg_ctx, intr_ctx_num);
  1024. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1025. if (tx_mask & (1 << j)) {
  1026. irq_id_map[num_irq++] =
  1027. (wbm2host_tx_completions_ring1 - j);
  1028. }
  1029. if (rx_mask & (1 << j)) {
  1030. irq_id_map[num_irq++] =
  1031. (reo2host_destination_ring1 - j);
  1032. }
  1033. if (rxdma2host_ring_mask & (1 << j)) {
  1034. irq_id_map[num_irq++] =
  1035. rxdma2host_destination_ring_mac1 -
  1036. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1037. }
  1038. if (host2rxdma_ring_mask & (1 << j)) {
  1039. irq_id_map[num_irq++] =
  1040. host2rxdma_host_buf_ring_mac1 -
  1041. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1042. }
  1043. if (rx_mon_mask & (1 << j)) {
  1044. irq_id_map[num_irq++] =
  1045. ppdu_end_interrupts_mac1 -
  1046. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1047. irq_id_map[num_irq++] =
  1048. rxdma2host_monitor_status_ring_mac1 -
  1049. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1050. }
  1051. if (rx_wbm_rel_ring_mask & (1 << j))
  1052. irq_id_map[num_irq++] = wbm2host_rx_release;
  1053. if (rx_err_ring_mask & (1 << j))
  1054. irq_id_map[num_irq++] = reo2host_exception;
  1055. if (reo_status_ring_mask & (1 << j))
  1056. irq_id_map[num_irq++] = reo2host_status;
  1057. }
  1058. *num_irq_r = num_irq;
  1059. }
  1060. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1061. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1062. int msi_vector_count, int msi_vector_start)
  1063. {
  1064. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1065. soc->wlan_cfg_ctx, intr_ctx_num);
  1066. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1067. soc->wlan_cfg_ctx, intr_ctx_num);
  1068. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1069. soc->wlan_cfg_ctx, intr_ctx_num);
  1070. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1071. soc->wlan_cfg_ctx, intr_ctx_num);
  1072. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1073. soc->wlan_cfg_ctx, intr_ctx_num);
  1074. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1075. soc->wlan_cfg_ctx, intr_ctx_num);
  1076. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1077. soc->wlan_cfg_ctx, intr_ctx_num);
  1078. unsigned int vector =
  1079. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1080. int num_irq = 0;
  1081. soc->intr_mode = DP_INTR_MSI;
  1082. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1083. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1084. irq_id_map[num_irq++] =
  1085. pld_get_msi_irq(soc->osdev->dev, vector);
  1086. *num_irq_r = num_irq;
  1087. }
  1088. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1089. int *irq_id_map, int *num_irq)
  1090. {
  1091. int msi_vector_count, ret;
  1092. uint32_t msi_base_data, msi_vector_start;
  1093. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1094. &msi_vector_count,
  1095. &msi_base_data,
  1096. &msi_vector_start);
  1097. if (ret)
  1098. return dp_soc_interrupt_map_calculate_integrated(soc,
  1099. intr_ctx_num, irq_id_map, num_irq);
  1100. else
  1101. dp_soc_interrupt_map_calculate_msi(soc,
  1102. intr_ctx_num, irq_id_map, num_irq,
  1103. msi_vector_count, msi_vector_start);
  1104. }
  1105. /*
  1106. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1107. * @txrx_soc: DP SOC handle
  1108. *
  1109. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1110. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1111. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1112. *
  1113. * Return: 0 for success. nonzero for failure.
  1114. */
  1115. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1116. {
  1117. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1118. int i = 0;
  1119. int num_irq = 0;
  1120. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1121. int ret = 0;
  1122. /* Map of IRQ ids registered with one interrupt context */
  1123. int irq_id_map[HIF_MAX_GRP_IRQ];
  1124. int tx_mask =
  1125. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1126. int rx_mask =
  1127. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1128. int rx_mon_mask =
  1129. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1130. int rx_err_ring_mask =
  1131. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1132. int rx_wbm_rel_ring_mask =
  1133. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1134. int reo_status_ring_mask =
  1135. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1136. int rxdma2host_ring_mask =
  1137. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1138. int host2rxdma_ring_mask =
  1139. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1140. soc->intr_ctx[i].dp_intr_id = i;
  1141. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1142. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1143. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1144. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1145. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1146. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1147. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1148. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1149. soc->intr_ctx[i].soc = soc;
  1150. num_irq = 0;
  1151. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1152. &num_irq);
  1153. ret = hif_register_ext_group(soc->hif_handle,
  1154. num_irq, irq_id_map, dp_service_srngs,
  1155. &soc->intr_ctx[i], "dp_intr",
  1156. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1157. if (ret) {
  1158. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1159. FL("failed, ret = %d"), ret);
  1160. return QDF_STATUS_E_FAILURE;
  1161. }
  1162. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1163. }
  1164. hif_configure_ext_group_interrupts(soc->hif_handle);
  1165. return QDF_STATUS_SUCCESS;
  1166. }
  1167. /*
  1168. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1169. * @txrx_soc: DP SOC handle
  1170. *
  1171. * Return: void
  1172. */
  1173. static void dp_soc_interrupt_detach(void *txrx_soc)
  1174. {
  1175. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1176. int i;
  1177. if (soc->intr_mode == DP_INTR_POLL) {
  1178. qdf_timer_stop(&soc->int_timer);
  1179. qdf_timer_free(&soc->int_timer);
  1180. } else {
  1181. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1182. }
  1183. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1184. soc->intr_ctx[i].tx_ring_mask = 0;
  1185. soc->intr_ctx[i].rx_ring_mask = 0;
  1186. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1187. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1188. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1189. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1190. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1191. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1192. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1193. }
  1194. }
  1195. #define AVG_MAX_MPDUS_PER_TID 128
  1196. #define AVG_TIDS_PER_CLIENT 2
  1197. #define AVG_FLOWS_PER_TID 2
  1198. #define AVG_MSDUS_PER_FLOW 128
  1199. #define AVG_MSDUS_PER_MPDU 4
  1200. /*
  1201. * Allocate and setup link descriptor pool that will be used by HW for
  1202. * various link and queue descriptors and managed by WBM
  1203. */
  1204. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1205. {
  1206. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1207. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1208. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1209. uint32_t num_mpdus_per_link_desc =
  1210. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1211. uint32_t num_msdus_per_link_desc =
  1212. hal_num_msdus_per_link_desc(soc->hal_soc);
  1213. uint32_t num_mpdu_links_per_queue_desc =
  1214. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1215. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1216. uint32_t total_link_descs, total_mem_size;
  1217. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1218. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1219. uint32_t num_link_desc_banks;
  1220. uint32_t last_bank_size = 0;
  1221. uint32_t entry_size, num_entries;
  1222. int i;
  1223. uint32_t desc_id = 0;
  1224. /* Only Tx queue descriptors are allocated from common link descriptor
  1225. * pool Rx queue descriptors are not included in this because (REO queue
  1226. * extension descriptors) they are expected to be allocated contiguously
  1227. * with REO queue descriptors
  1228. */
  1229. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1230. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1231. num_mpdu_queue_descs = num_mpdu_link_descs /
  1232. num_mpdu_links_per_queue_desc;
  1233. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1234. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1235. num_msdus_per_link_desc;
  1236. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1237. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1238. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1239. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1240. /* Round up to power of 2 */
  1241. total_link_descs = 1;
  1242. while (total_link_descs < num_entries)
  1243. total_link_descs <<= 1;
  1244. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1245. FL("total_link_descs: %u, link_desc_size: %d"),
  1246. total_link_descs, link_desc_size);
  1247. total_mem_size = total_link_descs * link_desc_size;
  1248. total_mem_size += link_desc_align;
  1249. if (total_mem_size <= max_alloc_size) {
  1250. num_link_desc_banks = 0;
  1251. last_bank_size = total_mem_size;
  1252. } else {
  1253. num_link_desc_banks = (total_mem_size) /
  1254. (max_alloc_size - link_desc_align);
  1255. last_bank_size = total_mem_size %
  1256. (max_alloc_size - link_desc_align);
  1257. }
  1258. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1259. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1260. total_mem_size, num_link_desc_banks);
  1261. for (i = 0; i < num_link_desc_banks; i++) {
  1262. soc->link_desc_banks[i].base_vaddr_unaligned =
  1263. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1264. max_alloc_size,
  1265. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1266. soc->link_desc_banks[i].size = max_alloc_size;
  1267. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1268. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1269. ((unsigned long)(
  1270. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1271. link_desc_align));
  1272. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1273. soc->link_desc_banks[i].base_paddr_unaligned) +
  1274. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1275. (unsigned long)(
  1276. soc->link_desc_banks[i].base_vaddr_unaligned));
  1277. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1278. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1279. FL("Link descriptor memory alloc failed"));
  1280. goto fail;
  1281. }
  1282. }
  1283. if (last_bank_size) {
  1284. /* Allocate last bank in case total memory required is not exact
  1285. * multiple of max_alloc_size
  1286. */
  1287. soc->link_desc_banks[i].base_vaddr_unaligned =
  1288. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1289. last_bank_size,
  1290. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1291. soc->link_desc_banks[i].size = last_bank_size;
  1292. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1293. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1294. ((unsigned long)(
  1295. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1296. link_desc_align));
  1297. soc->link_desc_banks[i].base_paddr =
  1298. (unsigned long)(
  1299. soc->link_desc_banks[i].base_paddr_unaligned) +
  1300. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1301. (unsigned long)(
  1302. soc->link_desc_banks[i].base_vaddr_unaligned));
  1303. }
  1304. /* Allocate and setup link descriptor idle list for HW internal use */
  1305. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1306. total_mem_size = entry_size * total_link_descs;
  1307. if (total_mem_size <= max_alloc_size) {
  1308. void *desc;
  1309. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1310. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1311. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1312. FL("Link desc idle ring setup failed"));
  1313. goto fail;
  1314. }
  1315. hal_srng_access_start_unlocked(soc->hal_soc,
  1316. soc->wbm_idle_link_ring.hal_srng);
  1317. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1318. soc->link_desc_banks[i].base_paddr; i++) {
  1319. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1320. ((unsigned long)(
  1321. soc->link_desc_banks[i].base_vaddr) -
  1322. (unsigned long)(
  1323. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1324. / link_desc_size;
  1325. unsigned long paddr = (unsigned long)(
  1326. soc->link_desc_banks[i].base_paddr);
  1327. while (num_entries && (desc = hal_srng_src_get_next(
  1328. soc->hal_soc,
  1329. soc->wbm_idle_link_ring.hal_srng))) {
  1330. hal_set_link_desc_addr(desc,
  1331. LINK_DESC_COOKIE(desc_id, i), paddr);
  1332. num_entries--;
  1333. desc_id++;
  1334. paddr += link_desc_size;
  1335. }
  1336. }
  1337. hal_srng_access_end_unlocked(soc->hal_soc,
  1338. soc->wbm_idle_link_ring.hal_srng);
  1339. } else {
  1340. uint32_t num_scatter_bufs;
  1341. uint32_t num_entries_per_buf;
  1342. uint32_t rem_entries;
  1343. uint8_t *scatter_buf_ptr;
  1344. uint16_t scatter_buf_num;
  1345. soc->wbm_idle_scatter_buf_size =
  1346. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1347. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1348. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1349. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1350. soc->hal_soc, total_mem_size,
  1351. soc->wbm_idle_scatter_buf_size);
  1352. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1353. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1354. FL("scatter bufs size out of bounds"));
  1355. goto fail;
  1356. }
  1357. for (i = 0; i < num_scatter_bufs; i++) {
  1358. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1359. qdf_mem_alloc_consistent(soc->osdev,
  1360. soc->osdev->dev,
  1361. soc->wbm_idle_scatter_buf_size,
  1362. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1363. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1364. QDF_TRACE(QDF_MODULE_ID_DP,
  1365. QDF_TRACE_LEVEL_ERROR,
  1366. FL("Scatter list memory alloc failed"));
  1367. goto fail;
  1368. }
  1369. }
  1370. /* Populate idle list scatter buffers with link descriptor
  1371. * pointers
  1372. */
  1373. scatter_buf_num = 0;
  1374. scatter_buf_ptr = (uint8_t *)(
  1375. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1376. rem_entries = num_entries_per_buf;
  1377. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1378. soc->link_desc_banks[i].base_paddr; i++) {
  1379. uint32_t num_link_descs =
  1380. (soc->link_desc_banks[i].size -
  1381. ((unsigned long)(
  1382. soc->link_desc_banks[i].base_vaddr) -
  1383. (unsigned long)(
  1384. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1385. / link_desc_size;
  1386. unsigned long paddr = (unsigned long)(
  1387. soc->link_desc_banks[i].base_paddr);
  1388. while (num_link_descs) {
  1389. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1390. LINK_DESC_COOKIE(desc_id, i), paddr);
  1391. num_link_descs--;
  1392. desc_id++;
  1393. paddr += link_desc_size;
  1394. rem_entries--;
  1395. if (rem_entries) {
  1396. scatter_buf_ptr += entry_size;
  1397. } else {
  1398. rem_entries = num_entries_per_buf;
  1399. scatter_buf_num++;
  1400. if (scatter_buf_num >= num_scatter_bufs)
  1401. break;
  1402. scatter_buf_ptr = (uint8_t *)(
  1403. soc->wbm_idle_scatter_buf_base_vaddr[
  1404. scatter_buf_num]);
  1405. }
  1406. }
  1407. }
  1408. /* Setup link descriptor idle list in HW */
  1409. hal_setup_link_idle_list(soc->hal_soc,
  1410. soc->wbm_idle_scatter_buf_base_paddr,
  1411. soc->wbm_idle_scatter_buf_base_vaddr,
  1412. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1413. (uint32_t)(scatter_buf_ptr -
  1414. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1415. scatter_buf_num-1])), total_link_descs);
  1416. }
  1417. return 0;
  1418. fail:
  1419. if (soc->wbm_idle_link_ring.hal_srng) {
  1420. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1421. WBM_IDLE_LINK, 0);
  1422. }
  1423. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1424. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1425. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1426. soc->wbm_idle_scatter_buf_size,
  1427. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1428. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1429. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1430. }
  1431. }
  1432. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1433. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1434. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1435. soc->link_desc_banks[i].size,
  1436. soc->link_desc_banks[i].base_vaddr_unaligned,
  1437. soc->link_desc_banks[i].base_paddr_unaligned,
  1438. 0);
  1439. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1440. }
  1441. }
  1442. return QDF_STATUS_E_FAILURE;
  1443. }
  1444. /*
  1445. * Free link descriptor pool that was setup HW
  1446. */
  1447. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1448. {
  1449. int i;
  1450. if (soc->wbm_idle_link_ring.hal_srng) {
  1451. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1452. WBM_IDLE_LINK, 0);
  1453. }
  1454. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1455. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1456. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1457. soc->wbm_idle_scatter_buf_size,
  1458. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1459. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1460. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1461. }
  1462. }
  1463. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1464. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1465. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1466. soc->link_desc_banks[i].size,
  1467. soc->link_desc_banks[i].base_vaddr_unaligned,
  1468. soc->link_desc_banks[i].base_paddr_unaligned,
  1469. 0);
  1470. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1471. }
  1472. }
  1473. }
  1474. /* TODO: Following should be configurable */
  1475. #define WBM_RELEASE_RING_SIZE 64
  1476. #define TCL_CMD_RING_SIZE 32
  1477. #define TCL_STATUS_RING_SIZE 32
  1478. #define REO_DST_RING_SIZE_QCA6290 1024
  1479. #define REO_DST_RING_SIZE_QCA8074 2048
  1480. #define REO_REINJECT_RING_SIZE 32
  1481. #define RX_RELEASE_RING_SIZE 1024
  1482. #define REO_EXCEPTION_RING_SIZE 128
  1483. #define REO_CMD_RING_SIZE 64
  1484. #define REO_STATUS_RING_SIZE 128
  1485. #define RXDMA_BUF_RING_SIZE 1024
  1486. #define RXDMA_REFILL_RING_SIZE 4096
  1487. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1488. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1489. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1490. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1491. #define RXDMA_ERR_DST_RING_SIZE 1024
  1492. /*
  1493. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1494. * @soc: Datapath SOC handle
  1495. *
  1496. * This is a timer function used to age out stale AST nodes from
  1497. * AST table
  1498. */
  1499. #ifdef FEATURE_WDS
  1500. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1501. {
  1502. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1503. struct dp_pdev *pdev;
  1504. struct dp_vdev *vdev;
  1505. struct dp_peer *peer;
  1506. struct dp_ast_entry *ase, *temp_ase;
  1507. int i;
  1508. qdf_spin_lock_bh(&soc->ast_lock);
  1509. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1510. pdev = soc->pdev_list[i];
  1511. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1512. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1513. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1514. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1515. /*
  1516. * Do not expire static ast entries
  1517. * and HM WDS entries
  1518. */
  1519. if (ase->type != CDP_TXRX_AST_TYPE_WDS)
  1520. continue;
  1521. if (ase->is_active) {
  1522. ase->is_active = FALSE;
  1523. continue;
  1524. }
  1525. DP_STATS_INC(soc, ast.aged_out, 1);
  1526. dp_peer_del_ast(soc, ase);
  1527. }
  1528. }
  1529. }
  1530. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1531. }
  1532. qdf_spin_unlock_bh(&soc->ast_lock);
  1533. if (qdf_atomic_read(&soc->cmn_init_done))
  1534. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1535. }
  1536. /*
  1537. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1538. * @soc: Datapath SOC handle
  1539. *
  1540. * Return: None
  1541. */
  1542. static void dp_soc_wds_attach(struct dp_soc *soc)
  1543. {
  1544. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1545. dp_wds_aging_timer_fn, (void *)soc,
  1546. QDF_TIMER_TYPE_WAKE_APPS);
  1547. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1548. }
  1549. /*
  1550. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1551. * @txrx_soc: DP SOC handle
  1552. *
  1553. * Return: None
  1554. */
  1555. static void dp_soc_wds_detach(struct dp_soc *soc)
  1556. {
  1557. qdf_timer_stop(&soc->wds_aging_timer);
  1558. qdf_timer_free(&soc->wds_aging_timer);
  1559. }
  1560. #else
  1561. static void dp_soc_wds_attach(struct dp_soc *soc)
  1562. {
  1563. }
  1564. static void dp_soc_wds_detach(struct dp_soc *soc)
  1565. {
  1566. }
  1567. #endif
  1568. /*
  1569. * dp_soc_reset_ring_map() - Reset cpu ring map
  1570. * @soc: Datapath soc handler
  1571. *
  1572. * This api resets the default cpu ring map
  1573. */
  1574. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1575. {
  1576. uint8_t i;
  1577. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1578. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1579. if (nss_config == 1) {
  1580. /*
  1581. * Setting Tx ring map for one nss offloaded radio
  1582. */
  1583. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1584. } else if (nss_config == 2) {
  1585. /*
  1586. * Setting Tx ring for two nss offloaded radios
  1587. */
  1588. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1589. } else {
  1590. /*
  1591. * Setting Tx ring map for all nss offloaded radios
  1592. */
  1593. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1594. }
  1595. }
  1596. }
  1597. /*
  1598. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1599. * @dp_soc - DP soc handle
  1600. * @ring_type - ring type
  1601. * @ring_num - ring_num
  1602. *
  1603. * return 0 or 1
  1604. */
  1605. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1606. {
  1607. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1608. uint8_t status = 0;
  1609. switch (ring_type) {
  1610. case WBM2SW_RELEASE:
  1611. case REO_DST:
  1612. case RXDMA_BUF:
  1613. status = ((nss_config) & (1 << ring_num));
  1614. break;
  1615. default:
  1616. break;
  1617. }
  1618. return status;
  1619. }
  1620. /*
  1621. * dp_soc_reset_intr_mask() - reset interrupt mask
  1622. * @dp_soc - DP Soc handle
  1623. *
  1624. * Return: Return void
  1625. */
  1626. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1627. {
  1628. uint8_t j;
  1629. int *grp_mask = NULL;
  1630. int group_number, mask, num_ring;
  1631. /* number of tx ring */
  1632. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1633. /*
  1634. * group mask for tx completion ring.
  1635. */
  1636. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1637. /* loop and reset the mask for only offloaded ring */
  1638. for (j = 0; j < num_ring; j++) {
  1639. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1640. continue;
  1641. }
  1642. /*
  1643. * Group number corresponding to tx offloaded ring.
  1644. */
  1645. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1646. if (group_number < 0) {
  1647. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1648. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1649. WBM2SW_RELEASE, j);
  1650. return;
  1651. }
  1652. /* reset the tx mask for offloaded ring */
  1653. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1654. mask &= (~(1 << j));
  1655. /*
  1656. * reset the interrupt mask for offloaded ring.
  1657. */
  1658. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1659. }
  1660. /* number of rx rings */
  1661. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1662. /*
  1663. * group mask for reo destination ring.
  1664. */
  1665. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1666. /* loop and reset the mask for only offloaded ring */
  1667. for (j = 0; j < num_ring; j++) {
  1668. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1669. continue;
  1670. }
  1671. /*
  1672. * Group number corresponding to rx offloaded ring.
  1673. */
  1674. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1675. if (group_number < 0) {
  1676. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1677. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1678. REO_DST, j);
  1679. return;
  1680. }
  1681. /* set the interrupt mask for offloaded ring */
  1682. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1683. mask &= (~(1 << j));
  1684. /*
  1685. * set the interrupt mask to zero for rx offloaded radio.
  1686. */
  1687. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1688. }
  1689. /*
  1690. * group mask for Rx buffer refill ring
  1691. */
  1692. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1693. /* loop and reset the mask for only offloaded ring */
  1694. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1695. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1696. continue;
  1697. }
  1698. /*
  1699. * Group number corresponding to rx offloaded ring.
  1700. */
  1701. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1702. if (group_number < 0) {
  1703. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1704. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1705. REO_DST, j);
  1706. return;
  1707. }
  1708. /* set the interrupt mask for offloaded ring */
  1709. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1710. group_number);
  1711. mask &= (~(1 << j));
  1712. /*
  1713. * set the interrupt mask to zero for rx offloaded radio.
  1714. */
  1715. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1716. group_number, mask);
  1717. }
  1718. }
  1719. #ifdef IPA_OFFLOAD
  1720. /**
  1721. * dp_reo_remap_config() - configure reo remap register value based
  1722. * nss configuration.
  1723. * based on offload_radio value below remap configuration
  1724. * get applied.
  1725. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1726. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1727. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1728. * 3 - both Radios handled by NSS (remap not required)
  1729. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1730. *
  1731. * @remap1: output parameter indicates reo remap 1 register value
  1732. * @remap2: output parameter indicates reo remap 2 register value
  1733. * Return: bool type, true if remap is configured else false.
  1734. */
  1735. static bool dp_reo_remap_config(struct dp_soc *soc,
  1736. uint32_t *remap1,
  1737. uint32_t *remap2)
  1738. {
  1739. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1740. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1741. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1742. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1743. return true;
  1744. }
  1745. #else
  1746. static bool dp_reo_remap_config(struct dp_soc *soc,
  1747. uint32_t *remap1,
  1748. uint32_t *remap2)
  1749. {
  1750. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1751. switch (offload_radio) {
  1752. case 0:
  1753. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1754. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1755. (0x3 << 18) | (0x4 << 21)) << 8;
  1756. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1757. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1758. (0x3 << 18) | (0x4 << 21)) << 8;
  1759. break;
  1760. case 1:
  1761. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1762. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1763. (0x2 << 18) | (0x3 << 21)) << 8;
  1764. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1765. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1766. (0x4 << 18) | (0x2 << 21)) << 8;
  1767. break;
  1768. case 2:
  1769. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1770. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1771. (0x1 << 18) | (0x3 << 21)) << 8;
  1772. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1773. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1774. (0x4 << 18) | (0x1 << 21)) << 8;
  1775. break;
  1776. case 3:
  1777. /* return false if both radios are offloaded to NSS */
  1778. return false;
  1779. }
  1780. return true;
  1781. }
  1782. #endif
  1783. /*
  1784. * dp_reo_frag_dst_set() - configure reo register to set the
  1785. * fragment destination ring
  1786. * @soc : Datapath soc
  1787. * @frag_dst_ring : output parameter to set fragment destination ring
  1788. *
  1789. * Based on offload_radio below fragment destination rings is selected
  1790. * 0 - TCL
  1791. * 1 - SW1
  1792. * 2 - SW2
  1793. * 3 - SW3
  1794. * 4 - SW4
  1795. * 5 - Release
  1796. * 6 - FW
  1797. * 7 - alternate select
  1798. *
  1799. * return: void
  1800. */
  1801. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1802. {
  1803. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1804. switch (offload_radio) {
  1805. case 0:
  1806. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1807. break;
  1808. case 3:
  1809. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1810. break;
  1811. default:
  1812. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1813. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1814. break;
  1815. }
  1816. }
  1817. /*
  1818. * dp_soc_cmn_setup() - Common SoC level initializion
  1819. * @soc: Datapath SOC handle
  1820. *
  1821. * This is an internal function used to setup common SOC data structures,
  1822. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1823. */
  1824. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1825. {
  1826. int i;
  1827. struct hal_reo_params reo_params;
  1828. int tx_ring_size;
  1829. int tx_comp_ring_size;
  1830. int reo_dst_ring_size;
  1831. if (qdf_atomic_read(&soc->cmn_init_done))
  1832. return 0;
  1833. if (dp_hw_link_desc_pool_setup(soc))
  1834. goto fail1;
  1835. /* Setup SRNG rings */
  1836. /* Common rings */
  1837. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1838. WBM_RELEASE_RING_SIZE)) {
  1839. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1840. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1841. goto fail1;
  1842. }
  1843. soc->num_tcl_data_rings = 0;
  1844. /* Tx data rings */
  1845. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1846. soc->num_tcl_data_rings =
  1847. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1848. tx_comp_ring_size =
  1849. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1850. tx_ring_size =
  1851. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1852. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1853. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1854. TCL_DATA, i, 0, tx_ring_size)) {
  1855. QDF_TRACE(QDF_MODULE_ID_DP,
  1856. QDF_TRACE_LEVEL_ERROR,
  1857. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1858. goto fail1;
  1859. }
  1860. /*
  1861. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1862. * count
  1863. */
  1864. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1865. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1866. QDF_TRACE(QDF_MODULE_ID_DP,
  1867. QDF_TRACE_LEVEL_ERROR,
  1868. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1869. goto fail1;
  1870. }
  1871. }
  1872. } else {
  1873. /* This will be incremented during per pdev ring setup */
  1874. soc->num_tcl_data_rings = 0;
  1875. }
  1876. if (dp_tx_soc_attach(soc)) {
  1877. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1878. FL("dp_tx_soc_attach failed"));
  1879. goto fail1;
  1880. }
  1881. /* TCL command and status rings */
  1882. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1883. TCL_CMD_RING_SIZE)) {
  1884. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1885. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1886. goto fail1;
  1887. }
  1888. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1889. TCL_STATUS_RING_SIZE)) {
  1890. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1891. FL("dp_srng_setup failed for tcl_status_ring"));
  1892. goto fail1;
  1893. }
  1894. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  1895. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1896. * descriptors
  1897. */
  1898. /* Rx data rings */
  1899. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1900. soc->num_reo_dest_rings =
  1901. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1902. QDF_TRACE(QDF_MODULE_ID_DP,
  1903. QDF_TRACE_LEVEL_ERROR,
  1904. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1905. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1906. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1907. i, 0, reo_dst_ring_size)) {
  1908. QDF_TRACE(QDF_MODULE_ID_DP,
  1909. QDF_TRACE_LEVEL_ERROR,
  1910. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1911. goto fail1;
  1912. }
  1913. }
  1914. } else {
  1915. /* This will be incremented during per pdev ring setup */
  1916. soc->num_reo_dest_rings = 0;
  1917. }
  1918. /* LMAC RxDMA to SW Rings configuration */
  1919. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1920. /* Only valid for MCL */
  1921. struct dp_pdev *pdev = soc->pdev_list[0];
  1922. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1923. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1924. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1925. QDF_TRACE(QDF_MODULE_ID_DP,
  1926. QDF_TRACE_LEVEL_ERROR,
  1927. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1928. goto fail1;
  1929. }
  1930. }
  1931. }
  1932. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1933. /* REO reinjection ring */
  1934. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1935. REO_REINJECT_RING_SIZE)) {
  1936. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1937. FL("dp_srng_setup failed for reo_reinject_ring"));
  1938. goto fail1;
  1939. }
  1940. /* Rx release ring */
  1941. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1942. RX_RELEASE_RING_SIZE)) {
  1943. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1944. FL("dp_srng_setup failed for rx_rel_ring"));
  1945. goto fail1;
  1946. }
  1947. /* Rx exception ring */
  1948. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1949. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1950. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1951. FL("dp_srng_setup failed for reo_exception_ring"));
  1952. goto fail1;
  1953. }
  1954. /* REO command and status rings */
  1955. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1956. REO_CMD_RING_SIZE)) {
  1957. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1958. FL("dp_srng_setup failed for reo_cmd_ring"));
  1959. goto fail1;
  1960. }
  1961. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1962. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1963. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1964. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1965. REO_STATUS_RING_SIZE)) {
  1966. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1967. FL("dp_srng_setup failed for reo_status_ring"));
  1968. goto fail1;
  1969. }
  1970. qdf_spinlock_create(&soc->ast_lock);
  1971. dp_soc_wds_attach(soc);
  1972. /* Reset the cpu ring map if radio is NSS offloaded */
  1973. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1974. dp_soc_reset_cpu_ring_map(soc);
  1975. dp_soc_reset_intr_mask(soc);
  1976. }
  1977. /* Setup HW REO */
  1978. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1979. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1980. /*
  1981. * Reo ring remap is not required if both radios
  1982. * are offloaded to NSS
  1983. */
  1984. if (!dp_reo_remap_config(soc,
  1985. &reo_params.remap1,
  1986. &reo_params.remap2))
  1987. goto out;
  1988. reo_params.rx_hash_enabled = true;
  1989. }
  1990. /* setup the global rx defrag waitlist */
  1991. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1992. soc->rx.defrag.timeout_ms =
  1993. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1994. soc->rx.flags.defrag_timeout_check =
  1995. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1996. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  1997. out:
  1998. /*
  1999. * set the fragment destination ring
  2000. */
  2001. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  2002. hal_reo_setup(soc->hal_soc, &reo_params);
  2003. qdf_atomic_set(&soc->cmn_init_done, 1);
  2004. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  2005. return 0;
  2006. fail1:
  2007. /*
  2008. * Cleanup will be done as part of soc_detach, which will
  2009. * be called on pdev attach failure
  2010. */
  2011. return QDF_STATUS_E_FAILURE;
  2012. }
  2013. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2014. static void dp_lro_hash_setup(struct dp_soc *soc)
  2015. {
  2016. struct cdp_lro_hash_config lro_hash;
  2017. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2018. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2019. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2020. FL("LRO disabled RX hash disabled"));
  2021. return;
  2022. }
  2023. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2024. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  2025. lro_hash.lro_enable = 1;
  2026. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2027. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2028. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2029. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2030. }
  2031. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  2032. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2033. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2034. LRO_IPV4_SEED_ARR_SZ));
  2035. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2036. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2037. LRO_IPV6_SEED_ARR_SZ));
  2038. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2039. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2040. lro_hash.lro_enable, lro_hash.tcp_flag,
  2041. lro_hash.tcp_flag_mask);
  2042. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2043. QDF_TRACE_LEVEL_ERROR,
  2044. (void *)lro_hash.toeplitz_hash_ipv4,
  2045. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2046. LRO_IPV4_SEED_ARR_SZ));
  2047. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2048. QDF_TRACE_LEVEL_ERROR,
  2049. (void *)lro_hash.toeplitz_hash_ipv6,
  2050. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2051. LRO_IPV6_SEED_ARR_SZ));
  2052. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2053. if (soc->cdp_soc.ol_ops->lro_hash_config)
  2054. (void)soc->cdp_soc.ol_ops->lro_hash_config
  2055. (soc->ctrl_psoc, &lro_hash);
  2056. }
  2057. /*
  2058. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2059. * @soc: data path SoC handle
  2060. * @pdev: Physical device handle
  2061. *
  2062. * Return: 0 - success, > 0 - failure
  2063. */
  2064. #ifdef QCA_HOST2FW_RXBUF_RING
  2065. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2066. struct dp_pdev *pdev)
  2067. {
  2068. int max_mac_rings =
  2069. wlan_cfg_get_num_mac_rings
  2070. (pdev->wlan_cfg_ctx);
  2071. int i;
  2072. for (i = 0; i < max_mac_rings; i++) {
  2073. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2074. "%s: pdev_id %d mac_id %d\n",
  2075. __func__, pdev->pdev_id, i);
  2076. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2077. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  2078. QDF_TRACE(QDF_MODULE_ID_DP,
  2079. QDF_TRACE_LEVEL_ERROR,
  2080. FL("failed rx mac ring setup"));
  2081. return QDF_STATUS_E_FAILURE;
  2082. }
  2083. }
  2084. return QDF_STATUS_SUCCESS;
  2085. }
  2086. #else
  2087. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2088. struct dp_pdev *pdev)
  2089. {
  2090. return QDF_STATUS_SUCCESS;
  2091. }
  2092. #endif
  2093. /**
  2094. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2095. * @pdev - DP_PDEV handle
  2096. *
  2097. * Return: void
  2098. */
  2099. static inline void
  2100. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2101. {
  2102. uint8_t map_id;
  2103. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2104. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  2105. sizeof(default_dscp_tid_map));
  2106. }
  2107. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  2108. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  2109. pdev->dscp_tid_map[map_id],
  2110. map_id);
  2111. }
  2112. }
  2113. #ifdef QCA_SUPPORT_SON
  2114. /**
  2115. * dp_mark_peer_inact(): Update peer inactivity status
  2116. * @peer_handle - datapath peer handle
  2117. *
  2118. * Return: void
  2119. */
  2120. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  2121. {
  2122. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2123. struct dp_pdev *pdev;
  2124. struct dp_soc *soc;
  2125. bool inactive_old;
  2126. if (!peer)
  2127. return;
  2128. pdev = peer->vdev->pdev;
  2129. soc = pdev->soc;
  2130. inactive_old = peer->peer_bs_inact_flag == 1;
  2131. if (!inactive)
  2132. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2133. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  2134. if (inactive_old != inactive) {
  2135. /**
  2136. * Note: a node lookup can happen in RX datapath context
  2137. * when a node changes from inactive to active (at most once
  2138. * per inactivity timeout threshold)
  2139. */
  2140. if (soc->cdp_soc.ol_ops->record_act_change) {
  2141. soc->cdp_soc.ol_ops->record_act_change(
  2142. (void *)pdev->ctrl_pdev,
  2143. peer->mac_addr.raw, !inactive);
  2144. }
  2145. }
  2146. }
  2147. /**
  2148. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2149. *
  2150. * Periodically checks the inactivity status
  2151. */
  2152. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2153. {
  2154. struct dp_pdev *pdev;
  2155. struct dp_vdev *vdev;
  2156. struct dp_peer *peer;
  2157. struct dp_soc *soc;
  2158. int i;
  2159. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2160. qdf_spin_lock(&soc->peer_ref_mutex);
  2161. for (i = 0; i < soc->pdev_count; i++) {
  2162. pdev = soc->pdev_list[i];
  2163. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2164. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2165. if (vdev->opmode != wlan_op_mode_ap)
  2166. continue;
  2167. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2168. if (!peer->authorize) {
  2169. /**
  2170. * Inactivity check only interested in
  2171. * connected node
  2172. */
  2173. continue;
  2174. }
  2175. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2176. /**
  2177. * This check ensures we do not wait extra long
  2178. * due to the potential race condition
  2179. */
  2180. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2181. }
  2182. if (peer->peer_bs_inact > 0) {
  2183. /* Do not let it wrap around */
  2184. peer->peer_bs_inact--;
  2185. }
  2186. if (peer->peer_bs_inact == 0)
  2187. dp_mark_peer_inact(peer, true);
  2188. }
  2189. }
  2190. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2191. }
  2192. qdf_spin_unlock(&soc->peer_ref_mutex);
  2193. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2194. soc->pdev_bs_inact_interval * 1000);
  2195. }
  2196. /**
  2197. * dp_free_inact_timer(): free inact timer
  2198. * @timer - inact timer handle
  2199. *
  2200. * Return: bool
  2201. */
  2202. void dp_free_inact_timer(struct dp_soc *soc)
  2203. {
  2204. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2205. }
  2206. #else
  2207. void dp_mark_peer_inact(void *peer, bool inactive)
  2208. {
  2209. return;
  2210. }
  2211. void dp_free_inact_timer(struct dp_soc *soc)
  2212. {
  2213. return;
  2214. }
  2215. #endif
  2216. #ifdef IPA_OFFLOAD
  2217. /**
  2218. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2219. * @soc: data path instance
  2220. * @pdev: core txrx pdev context
  2221. *
  2222. * Return: QDF_STATUS_SUCCESS: success
  2223. * QDF_STATUS_E_RESOURCES: Error return
  2224. */
  2225. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2226. struct dp_pdev *pdev)
  2227. {
  2228. /* Setup second Rx refill buffer ring */
  2229. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2230. IPA_RX_REFILL_BUF_RING_IDX,
  2231. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2232. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2233. FL("dp_srng_setup failed second rx refill ring"));
  2234. return QDF_STATUS_E_FAILURE;
  2235. }
  2236. return QDF_STATUS_SUCCESS;
  2237. }
  2238. /**
  2239. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2240. * @soc: data path instance
  2241. * @pdev: core txrx pdev context
  2242. *
  2243. * Return: void
  2244. */
  2245. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2246. struct dp_pdev *pdev)
  2247. {
  2248. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2249. IPA_RX_REFILL_BUF_RING_IDX);
  2250. }
  2251. #else
  2252. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2253. struct dp_pdev *pdev)
  2254. {
  2255. return QDF_STATUS_SUCCESS;
  2256. }
  2257. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2258. struct dp_pdev *pdev)
  2259. {
  2260. }
  2261. #endif
  2262. #ifndef QCA_WIFI_QCA6390
  2263. static
  2264. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2265. {
  2266. int mac_id = 0;
  2267. int pdev_id = pdev->pdev_id;
  2268. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2269. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2270. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2271. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2272. RXDMA_MONITOR_BUF_RING_SIZE)) {
  2273. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2274. FL("Srng setup failed for rxdma_mon_buf_ring"));
  2275. return QDF_STATUS_E_NOMEM;
  2276. }
  2277. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2278. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2279. RXDMA_MONITOR_DST_RING_SIZE)) {
  2280. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2281. FL("Srng setup failed for rxdma_mon_dst_ring"));
  2282. return QDF_STATUS_E_NOMEM;
  2283. }
  2284. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2285. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2286. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2287. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2288. FL("Srng setup failed for rxdma_mon_status_ring"));
  2289. return QDF_STATUS_E_NOMEM;
  2290. }
  2291. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2292. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2293. RXDMA_MONITOR_DESC_RING_SIZE)) {
  2294. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2295. "Srng setup failed for rxdma_mon_desc_ring\n");
  2296. return QDF_STATUS_E_NOMEM;
  2297. }
  2298. }
  2299. return QDF_STATUS_SUCCESS;
  2300. }
  2301. #else
  2302. static QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2303. {
  2304. return QDF_STATUS_SUCCESS;
  2305. }
  2306. #endif
  2307. /*
  2308. * dp_pdev_attach_wifi3() - attach txrx pdev
  2309. * @ctrl_pdev: Opaque PDEV object
  2310. * @txrx_soc: Datapath SOC handle
  2311. * @htc_handle: HTC handle for host-target interface
  2312. * @qdf_osdev: QDF OS device
  2313. * @pdev_id: PDEV ID
  2314. *
  2315. * Return: DP PDEV handle on success, NULL on failure
  2316. */
  2317. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2318. struct cdp_ctrl_objmgr_pdev *ctrl_pdev,
  2319. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2320. {
  2321. int tx_ring_size;
  2322. int tx_comp_ring_size;
  2323. int reo_dst_ring_size;
  2324. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2325. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2326. if (!pdev) {
  2327. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2328. FL("DP PDEV memory allocation failed"));
  2329. goto fail0;
  2330. }
  2331. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  2332. if (!pdev->wlan_cfg_ctx) {
  2333. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2334. FL("pdev cfg_attach failed"));
  2335. qdf_mem_free(pdev);
  2336. goto fail0;
  2337. }
  2338. /*
  2339. * set nss pdev config based on soc config
  2340. */
  2341. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2342. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2343. pdev->soc = soc;
  2344. pdev->ctrl_pdev = ctrl_pdev;
  2345. pdev->pdev_id = pdev_id;
  2346. soc->pdev_list[pdev_id] = pdev;
  2347. soc->pdev_count++;
  2348. TAILQ_INIT(&pdev->vdev_list);
  2349. qdf_spinlock_create(&pdev->vdev_list_lock);
  2350. pdev->vdev_count = 0;
  2351. qdf_spinlock_create(&pdev->tx_mutex);
  2352. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2353. TAILQ_INIT(&pdev->neighbour_peers_list);
  2354. if (dp_soc_cmn_setup(soc)) {
  2355. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2356. FL("dp_soc_cmn_setup failed"));
  2357. goto fail1;
  2358. }
  2359. /* Setup per PDEV TCL rings if configured */
  2360. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2361. tx_ring_size =
  2362. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2363. tx_comp_ring_size =
  2364. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2365. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2366. pdev_id, pdev_id, tx_ring_size)) {
  2367. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2368. FL("dp_srng_setup failed for tcl_data_ring"));
  2369. goto fail1;
  2370. }
  2371. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2372. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2373. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2374. FL("dp_srng_setup failed for tx_comp_ring"));
  2375. goto fail1;
  2376. }
  2377. soc->num_tcl_data_rings++;
  2378. }
  2379. /* Tx specific init */
  2380. if (dp_tx_pdev_attach(pdev)) {
  2381. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2382. FL("dp_tx_pdev_attach failed"));
  2383. goto fail1;
  2384. }
  2385. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2386. /* Setup per PDEV REO rings if configured */
  2387. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2388. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2389. pdev_id, pdev_id, reo_dst_ring_size)) {
  2390. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2391. FL("dp_srng_setup failed for reo_dest_ringn"));
  2392. goto fail1;
  2393. }
  2394. soc->num_reo_dest_rings++;
  2395. }
  2396. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2397. RXDMA_REFILL_RING_SIZE)) {
  2398. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2399. FL("dp_srng_setup failed rx refill ring"));
  2400. goto fail1;
  2401. }
  2402. if (dp_rxdma_ring_setup(soc, pdev)) {
  2403. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2404. FL("RXDMA ring config failed"));
  2405. goto fail1;
  2406. }
  2407. if (dp_mon_rings_setup(soc, pdev)) {
  2408. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2409. FL("MONITOR rings setup failed"));
  2410. goto fail1;
  2411. }
  2412. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2413. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2414. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2415. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2416. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2417. goto fail1;
  2418. }
  2419. }
  2420. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2421. goto fail1;
  2422. if (dp_ipa_ring_resource_setup(soc, pdev))
  2423. goto fail1;
  2424. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2425. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2426. FL("dp_ipa_uc_attach failed"));
  2427. goto fail1;
  2428. }
  2429. /* Rx specific init */
  2430. if (dp_rx_pdev_attach(pdev)) {
  2431. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2432. FL("dp_rx_pdev_attach failed"));
  2433. goto fail0;
  2434. }
  2435. DP_STATS_INIT(pdev);
  2436. /* Monitor filter init */
  2437. pdev->mon_filter_mode = MON_FILTER_ALL;
  2438. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2439. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2440. pdev->fp_data_filter = FILTER_DATA_ALL;
  2441. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2442. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2443. pdev->mo_data_filter = FILTER_DATA_ALL;
  2444. dp_local_peer_id_pool_init(pdev);
  2445. dp_dscp_tid_map_setup(pdev);
  2446. /* Rx monitor mode specific init */
  2447. if (dp_rx_pdev_mon_attach(pdev)) {
  2448. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2449. "dp_rx_pdev_attach failed\n");
  2450. goto fail1;
  2451. }
  2452. if (dp_wdi_event_attach(pdev)) {
  2453. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2454. "dp_wdi_evet_attach failed\n");
  2455. goto fail1;
  2456. }
  2457. /* set the reo destination during initialization */
  2458. pdev->reo_dest = pdev->pdev_id + 1;
  2459. /*
  2460. * initialize ppdu tlv list
  2461. */
  2462. TAILQ_INIT(&pdev->ppdu_info_list);
  2463. pdev->tlv_count = 0;
  2464. pdev->list_depth = 0;
  2465. return (struct cdp_pdev *)pdev;
  2466. fail1:
  2467. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2468. fail0:
  2469. return NULL;
  2470. }
  2471. /*
  2472. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2473. * @soc: data path SoC handle
  2474. * @pdev: Physical device handle
  2475. *
  2476. * Return: void
  2477. */
  2478. #ifdef QCA_HOST2FW_RXBUF_RING
  2479. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2480. struct dp_pdev *pdev)
  2481. {
  2482. int max_mac_rings =
  2483. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2484. int i;
  2485. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2486. max_mac_rings : MAX_RX_MAC_RINGS;
  2487. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2488. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2489. RXDMA_BUF, 1);
  2490. qdf_timer_free(&soc->mon_reap_timer);
  2491. }
  2492. #else
  2493. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2494. struct dp_pdev *pdev)
  2495. {
  2496. }
  2497. #endif
  2498. /*
  2499. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2500. * @pdev: device object
  2501. *
  2502. * Return: void
  2503. */
  2504. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2505. {
  2506. struct dp_neighbour_peer *peer = NULL;
  2507. struct dp_neighbour_peer *temp_peer = NULL;
  2508. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2509. neighbour_peer_list_elem, temp_peer) {
  2510. /* delete this peer from the list */
  2511. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2512. peer, neighbour_peer_list_elem);
  2513. qdf_mem_free(peer);
  2514. }
  2515. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2516. }
  2517. /**
  2518. * dp_htt_ppdu_stats_detach() - detach stats resources
  2519. * @pdev: Datapath PDEV handle
  2520. *
  2521. * Return: void
  2522. */
  2523. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  2524. {
  2525. struct ppdu_info *ppdu_info, *ppdu_info_next;
  2526. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  2527. ppdu_info_list_elem, ppdu_info_next) {
  2528. if (!ppdu_info)
  2529. break;
  2530. qdf_assert_always(ppdu_info->nbuf);
  2531. qdf_nbuf_free(ppdu_info->nbuf);
  2532. qdf_mem_free(ppdu_info);
  2533. }
  2534. }
  2535. #ifndef QCA_WIFI_QCA6390
  2536. static
  2537. void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  2538. int mac_id)
  2539. {
  2540. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2541. RXDMA_MONITOR_BUF, 0);
  2542. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2543. RXDMA_MONITOR_DST, 0);
  2544. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2545. RXDMA_MONITOR_STATUS, 0);
  2546. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2547. RXDMA_MONITOR_DESC, 0);
  2548. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2549. RXDMA_DST, 0);
  2550. }
  2551. #else
  2552. static void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  2553. int mac_id)
  2554. {
  2555. }
  2556. #endif
  2557. /*
  2558. * dp_pdev_detach_wifi3() - detach txrx pdev
  2559. * @txrx_pdev: Datapath PDEV handle
  2560. * @force: Force detach
  2561. *
  2562. */
  2563. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2564. {
  2565. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2566. struct dp_soc *soc = pdev->soc;
  2567. qdf_nbuf_t curr_nbuf, next_nbuf;
  2568. int mac_id;
  2569. dp_wdi_event_detach(pdev);
  2570. dp_tx_pdev_detach(pdev);
  2571. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2572. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2573. TCL_DATA, pdev->pdev_id);
  2574. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2575. WBM2SW_RELEASE, pdev->pdev_id);
  2576. }
  2577. dp_pktlogmod_exit(pdev);
  2578. dp_rx_pdev_detach(pdev);
  2579. dp_rx_pdev_mon_detach(pdev);
  2580. dp_neighbour_peers_detach(pdev);
  2581. qdf_spinlock_destroy(&pdev->tx_mutex);
  2582. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  2583. dp_ipa_uc_detach(soc, pdev);
  2584. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2585. /* Cleanup per PDEV REO rings if configured */
  2586. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2587. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2588. REO_DST, pdev->pdev_id);
  2589. }
  2590. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2591. dp_rxdma_ring_cleanup(soc, pdev);
  2592. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2593. dp_mon_ring_deinit(soc, pdev, mac_id);
  2594. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2595. RXDMA_DST, 0);
  2596. }
  2597. curr_nbuf = pdev->invalid_peer_head_msdu;
  2598. while (curr_nbuf) {
  2599. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2600. qdf_nbuf_free(curr_nbuf);
  2601. curr_nbuf = next_nbuf;
  2602. }
  2603. dp_htt_ppdu_stats_detach(pdev);
  2604. soc->pdev_list[pdev->pdev_id] = NULL;
  2605. soc->pdev_count--;
  2606. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2607. qdf_mem_free(pdev->dp_txrx_handle);
  2608. qdf_mem_free(pdev);
  2609. }
  2610. /*
  2611. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2612. * @soc: DP SOC handle
  2613. */
  2614. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2615. {
  2616. struct reo_desc_list_node *desc;
  2617. struct dp_rx_tid *rx_tid;
  2618. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2619. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2620. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2621. rx_tid = &desc->rx_tid;
  2622. qdf_mem_unmap_nbytes_single(soc->osdev,
  2623. rx_tid->hw_qdesc_paddr,
  2624. QDF_DMA_BIDIRECTIONAL,
  2625. rx_tid->hw_qdesc_alloc_size);
  2626. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2627. qdf_mem_free(desc);
  2628. }
  2629. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2630. qdf_list_destroy(&soc->reo_desc_freelist);
  2631. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2632. }
  2633. /*
  2634. * dp_soc_detach_wifi3() - Detach txrx SOC
  2635. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2636. */
  2637. static void dp_soc_detach_wifi3(void *txrx_soc)
  2638. {
  2639. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2640. int i;
  2641. qdf_atomic_set(&soc->cmn_init_done, 0);
  2642. qdf_flush_work(&soc->htt_stats.work);
  2643. qdf_disable_work(&soc->htt_stats.work);
  2644. /* Free pending htt stats messages */
  2645. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2646. dp_free_inact_timer(soc);
  2647. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2648. if (soc->pdev_list[i])
  2649. dp_pdev_detach_wifi3(
  2650. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2651. }
  2652. dp_peer_find_detach(soc);
  2653. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2654. * SW descriptors
  2655. */
  2656. /* Free the ring memories */
  2657. /* Common rings */
  2658. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2659. dp_tx_soc_detach(soc);
  2660. /* Tx data rings */
  2661. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2662. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2663. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2664. TCL_DATA, i);
  2665. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2666. WBM2SW_RELEASE, i);
  2667. }
  2668. }
  2669. /* TCL command and status rings */
  2670. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2671. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2672. /* Rx data rings */
  2673. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2674. soc->num_reo_dest_rings =
  2675. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2676. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2677. /* TODO: Get number of rings and ring sizes
  2678. * from wlan_cfg
  2679. */
  2680. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2681. REO_DST, i);
  2682. }
  2683. }
  2684. /* REO reinjection ring */
  2685. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2686. /* Rx release ring */
  2687. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2688. /* Rx exception ring */
  2689. /* TODO: Better to store ring_type and ring_num in
  2690. * dp_srng during setup
  2691. */
  2692. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2693. /* REO command and status rings */
  2694. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2695. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2696. dp_hw_link_desc_pool_cleanup(soc);
  2697. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2698. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2699. htt_soc_detach(soc->htt_handle);
  2700. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  2701. dp_reo_cmdlist_destroy(soc);
  2702. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2703. dp_reo_desc_freelist_destroy(soc);
  2704. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2705. dp_soc_wds_detach(soc);
  2706. qdf_spinlock_destroy(&soc->ast_lock);
  2707. qdf_mem_free(soc);
  2708. }
  2709. #ifndef QCA_WIFI_QCA6390
  2710. static void dp_mon_htt_srng_setup(struct dp_soc *soc,
  2711. struct dp_pdev *pdev,
  2712. int mac_id,
  2713. int mac_for_pdev)
  2714. {
  2715. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2716. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2717. RXDMA_MONITOR_BUF);
  2718. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2719. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2720. RXDMA_MONITOR_DST);
  2721. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2722. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2723. RXDMA_MONITOR_STATUS);
  2724. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2725. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2726. RXDMA_MONITOR_DESC);
  2727. }
  2728. #else
  2729. static void dp_mon_htt_srng_setup(struct dp_soc *soc,
  2730. struct dp_pdev *pdev,
  2731. int mac_id,
  2732. int mac_for_pdev)
  2733. {
  2734. }
  2735. #endif
  2736. /*
  2737. * dp_rxdma_ring_config() - configure the RX DMA rings
  2738. *
  2739. * This function is used to configure the MAC rings.
  2740. * On MCL host provides buffers in Host2FW ring
  2741. * FW refills (copies) buffers to the ring and updates
  2742. * ring_idx in register
  2743. *
  2744. * @soc: data path SoC handle
  2745. *
  2746. * Return: void
  2747. */
  2748. #ifdef QCA_HOST2FW_RXBUF_RING
  2749. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2750. {
  2751. int i;
  2752. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2753. struct dp_pdev *pdev = soc->pdev_list[i];
  2754. if (pdev) {
  2755. int mac_id;
  2756. bool dbs_enable = 0;
  2757. int max_mac_rings =
  2758. wlan_cfg_get_num_mac_rings
  2759. (pdev->wlan_cfg_ctx);
  2760. htt_srng_setup(soc->htt_handle, 0,
  2761. pdev->rx_refill_buf_ring.hal_srng,
  2762. RXDMA_BUF);
  2763. if (pdev->rx_refill_buf_ring2.hal_srng)
  2764. htt_srng_setup(soc->htt_handle, 0,
  2765. pdev->rx_refill_buf_ring2.hal_srng,
  2766. RXDMA_BUF);
  2767. if (soc->cdp_soc.ol_ops->
  2768. is_hw_dbs_2x2_capable) {
  2769. dbs_enable = soc->cdp_soc.ol_ops->
  2770. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2771. }
  2772. if (dbs_enable) {
  2773. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2774. QDF_TRACE_LEVEL_ERROR,
  2775. FL("DBS enabled max_mac_rings %d\n"),
  2776. max_mac_rings);
  2777. } else {
  2778. max_mac_rings = 1;
  2779. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2780. QDF_TRACE_LEVEL_ERROR,
  2781. FL("DBS disabled, max_mac_rings %d\n"),
  2782. max_mac_rings);
  2783. }
  2784. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2785. FL("pdev_id %d max_mac_rings %d\n"),
  2786. pdev->pdev_id, max_mac_rings);
  2787. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  2788. int mac_for_pdev = dp_get_mac_id_for_pdev(
  2789. mac_id, pdev->pdev_id);
  2790. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2791. QDF_TRACE_LEVEL_ERROR,
  2792. FL("mac_id %d\n"), mac_for_pdev);
  2793. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2794. pdev->rx_mac_buf_ring[mac_id]
  2795. .hal_srng,
  2796. RXDMA_BUF);
  2797. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2798. pdev->rxdma_err_dst_ring[mac_id]
  2799. .hal_srng,
  2800. RXDMA_DST);
  2801. /* Configure monitor mode rings */
  2802. dp_mon_htt_srng_setup(soc, pdev, mac_id,
  2803. mac_for_pdev);
  2804. }
  2805. }
  2806. }
  2807. /*
  2808. * Timer to reap rxdma status rings.
  2809. * Needed until we enable ppdu end interrupts
  2810. */
  2811. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2812. dp_service_mon_rings, (void *)soc,
  2813. QDF_TIMER_TYPE_WAKE_APPS);
  2814. soc->reap_timer_init = 1;
  2815. }
  2816. #else
  2817. /* This is only for WIN */
  2818. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2819. {
  2820. int i;
  2821. int mac_id;
  2822. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2823. struct dp_pdev *pdev = soc->pdev_list[i];
  2824. if (pdev == NULL)
  2825. continue;
  2826. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2827. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  2828. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2829. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2830. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2831. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2832. RXDMA_MONITOR_BUF);
  2833. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2834. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2835. RXDMA_MONITOR_DST);
  2836. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2837. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2838. RXDMA_MONITOR_STATUS);
  2839. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2840. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2841. RXDMA_MONITOR_DESC);
  2842. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2843. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  2844. RXDMA_DST);
  2845. }
  2846. }
  2847. }
  2848. #endif
  2849. /*
  2850. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2851. * @txrx_soc: Datapath SOC handle
  2852. */
  2853. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2854. {
  2855. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2856. htt_soc_attach_target(soc->htt_handle);
  2857. dp_rxdma_ring_config(soc);
  2858. DP_STATS_INIT(soc);
  2859. /* initialize work queue for stats processing */
  2860. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2861. return 0;
  2862. }
  2863. /*
  2864. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2865. * @txrx_soc: Datapath SOC handle
  2866. */
  2867. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2868. {
  2869. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2870. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2871. }
  2872. /*
  2873. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2874. * @txrx_soc: Datapath SOC handle
  2875. * @nss_cfg: nss config
  2876. */
  2877. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2878. {
  2879. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2880. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  2881. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  2882. /*
  2883. * TODO: masked out based on the per offloaded radio
  2884. */
  2885. if (config == dp_nss_cfg_dbdc) {
  2886. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  2887. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  2888. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  2889. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  2890. }
  2891. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2892. FL("nss-wifi<0> nss config is enabled"));
  2893. }
  2894. /*
  2895. * dp_vdev_attach_wifi3() - attach txrx vdev
  2896. * @txrx_pdev: Datapath PDEV handle
  2897. * @vdev_mac_addr: MAC address of the virtual interface
  2898. * @vdev_id: VDEV Id
  2899. * @wlan_op_mode: VDEV operating mode
  2900. *
  2901. * Return: DP VDEV handle on success, NULL on failure
  2902. */
  2903. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2904. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2905. {
  2906. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2907. struct dp_soc *soc = pdev->soc;
  2908. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2909. if (!vdev) {
  2910. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2911. FL("DP VDEV memory allocation failed"));
  2912. goto fail0;
  2913. }
  2914. vdev->pdev = pdev;
  2915. vdev->vdev_id = vdev_id;
  2916. vdev->opmode = op_mode;
  2917. vdev->osdev = soc->osdev;
  2918. vdev->osif_rx = NULL;
  2919. vdev->osif_rsim_rx_decap = NULL;
  2920. vdev->osif_get_key = NULL;
  2921. vdev->osif_rx_mon = NULL;
  2922. vdev->osif_tx_free_ext = NULL;
  2923. vdev->osif_vdev = NULL;
  2924. vdev->delete.pending = 0;
  2925. vdev->safemode = 0;
  2926. vdev->drop_unenc = 1;
  2927. vdev->sec_type = cdp_sec_type_none;
  2928. #ifdef notyet
  2929. vdev->filters_num = 0;
  2930. #endif
  2931. qdf_mem_copy(
  2932. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2933. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2934. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2935. vdev->dscp_tid_map_id = 0;
  2936. vdev->mcast_enhancement_en = 0;
  2937. /* TODO: Initialize default HTT meta data that will be used in
  2938. * TCL descriptors for packets transmitted from this VDEV
  2939. */
  2940. TAILQ_INIT(&vdev->peer_list);
  2941. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2942. /* add this vdev into the pdev's list */
  2943. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2944. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2945. pdev->vdev_count++;
  2946. dp_tx_vdev_attach(vdev);
  2947. if ((soc->intr_mode == DP_INTR_POLL) &&
  2948. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2949. if (pdev->vdev_count == 1)
  2950. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2951. }
  2952. dp_lro_hash_setup(soc);
  2953. /* LRO */
  2954. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2955. wlan_op_mode_sta == vdev->opmode)
  2956. vdev->lro_enable = true;
  2957. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2958. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2959. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2960. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2961. DP_STATS_INIT(vdev);
  2962. if (wlan_op_mode_sta == vdev->opmode)
  2963. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  2964. vdev->mac_addr.raw,
  2965. NULL);
  2966. return (struct cdp_vdev *)vdev;
  2967. fail0:
  2968. return NULL;
  2969. }
  2970. /**
  2971. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2972. * @vdev: Datapath VDEV handle
  2973. * @osif_vdev: OSIF vdev handle
  2974. * @ctrl_vdev: UMAC vdev handle
  2975. * @txrx_ops: Tx and Rx operations
  2976. *
  2977. * Return: DP VDEV handle on success, NULL on failure
  2978. */
  2979. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2980. void *osif_vdev, struct cdp_ctrl_objmgr_vdev *ctrl_vdev,
  2981. struct ol_txrx_ops *txrx_ops)
  2982. {
  2983. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2984. vdev->osif_vdev = osif_vdev;
  2985. vdev->ctrl_vdev = ctrl_vdev;
  2986. vdev->osif_rx = txrx_ops->rx.rx;
  2987. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2988. vdev->osif_get_key = txrx_ops->get_key;
  2989. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2990. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2991. #ifdef notyet
  2992. #if ATH_SUPPORT_WAPI
  2993. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2994. #endif
  2995. #endif
  2996. #ifdef UMAC_SUPPORT_PROXY_ARP
  2997. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2998. #endif
  2999. vdev->me_convert = txrx_ops->me_convert;
  3000. /* TODO: Enable the following once Tx code is integrated */
  3001. if (vdev->mesh_vdev)
  3002. txrx_ops->tx.tx = dp_tx_send_mesh;
  3003. else
  3004. txrx_ops->tx.tx = dp_tx_send;
  3005. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  3006. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  3007. "DP Vdev Register success");
  3008. }
  3009. /**
  3010. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  3011. * @vdev: Datapath VDEV handle
  3012. *
  3013. * Return: void
  3014. */
  3015. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  3016. {
  3017. struct dp_pdev *pdev = vdev->pdev;
  3018. struct dp_soc *soc = pdev->soc;
  3019. struct dp_peer *peer;
  3020. uint16_t *peer_ids;
  3021. uint8_t i = 0, j = 0;
  3022. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  3023. if (!peer_ids) {
  3024. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3025. "DP alloc failure - unable to flush peers");
  3026. return;
  3027. }
  3028. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3029. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3030. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3031. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  3032. if (j < soc->max_peers)
  3033. peer_ids[j++] = peer->peer_ids[i];
  3034. }
  3035. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3036. for (i = 0; i < j ; i++)
  3037. dp_rx_peer_unmap_handler(soc, peer_ids[i]);
  3038. qdf_mem_free(peer_ids);
  3039. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3040. FL("Flushed peers for vdev object %pK "), vdev);
  3041. }
  3042. /*
  3043. * dp_vdev_detach_wifi3() - Detach txrx vdev
  3044. * @txrx_vdev: Datapath VDEV handle
  3045. * @callback: Callback OL_IF on completion of detach
  3046. * @cb_context: Callback context
  3047. *
  3048. */
  3049. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  3050. ol_txrx_vdev_delete_cb callback, void *cb_context)
  3051. {
  3052. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3053. struct dp_pdev *pdev = vdev->pdev;
  3054. struct dp_soc *soc = pdev->soc;
  3055. /* preconditions */
  3056. qdf_assert(vdev);
  3057. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3058. /* remove the vdev from its parent pdev's list */
  3059. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  3060. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3061. if (wlan_op_mode_sta == vdev->opmode)
  3062. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  3063. /*
  3064. * If Target is hung, flush all peers before detaching vdev
  3065. * this will free all references held due to missing
  3066. * unmap commands from Target
  3067. */
  3068. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  3069. dp_vdev_flush_peers(vdev);
  3070. /*
  3071. * Use peer_ref_mutex while accessing peer_list, in case
  3072. * a peer is in the process of being removed from the list.
  3073. */
  3074. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3075. /* check that the vdev has no peers allocated */
  3076. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  3077. /* debug print - will be removed later */
  3078. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3079. FL("not deleting vdev object %pK (%pM)"
  3080. "until deletion finishes for all its peers"),
  3081. vdev, vdev->mac_addr.raw);
  3082. /* indicate that the vdev needs to be deleted */
  3083. vdev->delete.pending = 1;
  3084. vdev->delete.callback = callback;
  3085. vdev->delete.context = cb_context;
  3086. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3087. return;
  3088. }
  3089. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3090. dp_tx_vdev_detach(vdev);
  3091. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3092. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  3093. qdf_mem_free(vdev);
  3094. if (callback)
  3095. callback(cb_context);
  3096. }
  3097. /*
  3098. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  3099. * @soc - datapath soc handle
  3100. * @peer - datapath peer handle
  3101. *
  3102. * Delete the AST entries belonging to a peer
  3103. */
  3104. #ifdef FEATURE_AST
  3105. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3106. struct dp_peer *peer)
  3107. {
  3108. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  3109. qdf_spin_lock_bh(&soc->ast_lock);
  3110. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  3111. dp_peer_del_ast(soc, ast_entry);
  3112. peer->self_ast_entry = NULL;
  3113. TAILQ_INIT(&peer->ast_entry_list);
  3114. qdf_spin_unlock_bh(&soc->ast_lock);
  3115. }
  3116. #else
  3117. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3118. struct dp_peer *peer)
  3119. {
  3120. }
  3121. #endif
  3122. /*
  3123. * dp_peer_create_wifi3() - attach txrx peer
  3124. * @txrx_vdev: Datapath VDEV handle
  3125. * @peer_mac_addr: Peer MAC address
  3126. *
  3127. * Return: DP peeer handle on success, NULL on failure
  3128. */
  3129. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  3130. uint8_t *peer_mac_addr, struct cdp_ctrl_objmgr_peer *ctrl_peer)
  3131. {
  3132. struct dp_peer *peer;
  3133. int i;
  3134. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3135. struct dp_pdev *pdev;
  3136. struct dp_soc *soc;
  3137. struct dp_ast_entry *ast_entry;
  3138. /* preconditions */
  3139. qdf_assert(vdev);
  3140. qdf_assert(peer_mac_addr);
  3141. pdev = vdev->pdev;
  3142. soc = pdev->soc;
  3143. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr,
  3144. 0, vdev->vdev_id);
  3145. if (peer) {
  3146. peer->delete_in_progress = false;
  3147. dp_peer_delete_ast_entries(soc, peer);
  3148. /*
  3149. * on peer create, peer ref count decrements, sice new peer is not
  3150. * getting created earlier reference is reused, peer_unref_delete will
  3151. * take care of incrementing count
  3152. * */
  3153. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3154. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  3155. vdev->vdev_id, peer->mac_addr.raw);
  3156. }
  3157. peer->ctrl_peer = ctrl_peer;
  3158. dp_local_peer_id_alloc(pdev, peer);
  3159. DP_STATS_INIT(peer);
  3160. return (void *)peer;
  3161. } else {
  3162. /*
  3163. * When a STA roams from RPTR AP to ROOT AP and vice versa, we
  3164. * need to remove the AST entry which was earlier added as a WDS
  3165. * entry.
  3166. */
  3167. ast_entry = dp_peer_ast_hash_find(soc, peer_mac_addr);
  3168. if (ast_entry)
  3169. dp_peer_del_ast(soc, ast_entry);
  3170. }
  3171. #ifdef notyet
  3172. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  3173. soc->mempool_ol_ath_peer);
  3174. #else
  3175. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  3176. #endif
  3177. if (!peer)
  3178. return NULL; /* failure */
  3179. qdf_mem_zero(peer, sizeof(struct dp_peer));
  3180. TAILQ_INIT(&peer->ast_entry_list);
  3181. /* store provided params */
  3182. peer->vdev = vdev;
  3183. peer->ctrl_peer = ctrl_peer;
  3184. dp_peer_add_ast(soc, peer, peer_mac_addr, CDP_TXRX_AST_TYPE_STATIC, 0);
  3185. qdf_spinlock_create(&peer->peer_info_lock);
  3186. qdf_mem_copy(
  3187. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3188. /* TODO: See of rx_opt_proc is really required */
  3189. peer->rx_opt_proc = soc->rx_opt_proc;
  3190. /* initialize the peer_id */
  3191. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3192. peer->peer_ids[i] = HTT_INVALID_PEER;
  3193. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3194. qdf_atomic_init(&peer->ref_cnt);
  3195. /* keep one reference for attach */
  3196. qdf_atomic_inc(&peer->ref_cnt);
  3197. /* add this peer into the vdev's list */
  3198. if (wlan_op_mode_sta == vdev->opmode)
  3199. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  3200. else
  3201. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  3202. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3203. /* TODO: See if hash based search is required */
  3204. dp_peer_find_hash_add(soc, peer);
  3205. /* Initialize the peer state */
  3206. peer->state = OL_TXRX_PEER_STATE_DISC;
  3207. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3208. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  3209. vdev, peer, peer->mac_addr.raw,
  3210. qdf_atomic_read(&peer->ref_cnt));
  3211. /*
  3212. * For every peer MAp message search and set if bss_peer
  3213. */
  3214. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  3215. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3216. "vdev bss_peer!!!!");
  3217. peer->bss_peer = 1;
  3218. vdev->vap_bss_peer = peer;
  3219. }
  3220. dp_local_peer_id_alloc(pdev, peer);
  3221. DP_STATS_INIT(peer);
  3222. return (void *)peer;
  3223. }
  3224. /*
  3225. * dp_peer_setup_wifi3() - initialize the peer
  3226. * @vdev_hdl: virtual device object
  3227. * @peer: Peer object
  3228. *
  3229. * Return: void
  3230. */
  3231. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  3232. {
  3233. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  3234. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3235. struct dp_pdev *pdev;
  3236. struct dp_soc *soc;
  3237. bool hash_based = 0;
  3238. enum cdp_host_reo_dest_ring reo_dest;
  3239. /* preconditions */
  3240. qdf_assert(vdev);
  3241. qdf_assert(peer);
  3242. pdev = vdev->pdev;
  3243. soc = pdev->soc;
  3244. peer->last_assoc_rcvd = 0;
  3245. peer->last_disassoc_rcvd = 0;
  3246. peer->last_deauth_rcvd = 0;
  3247. /*
  3248. * hash based steering is disabled for Radios which are offloaded
  3249. * to NSS
  3250. */
  3251. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  3252. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  3253. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3254. FL("hash based steering for pdev: %d is %d\n"),
  3255. pdev->pdev_id, hash_based);
  3256. /*
  3257. * Below line of code will ensure the proper reo_dest ring is chosen
  3258. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  3259. */
  3260. reo_dest = pdev->reo_dest;
  3261. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  3262. /* TODO: Check the destination ring number to be passed to FW */
  3263. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3264. pdev->ctrl_pdev, peer->mac_addr.raw,
  3265. peer->vdev->vdev_id, hash_based, reo_dest);
  3266. }
  3267. dp_peer_rx_init(pdev, peer);
  3268. return;
  3269. }
  3270. /*
  3271. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  3272. * @vdev_handle: virtual device object
  3273. * @htt_pkt_type: type of pkt
  3274. *
  3275. * Return: void
  3276. */
  3277. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  3278. enum htt_cmn_pkt_type val)
  3279. {
  3280. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3281. vdev->tx_encap_type = val;
  3282. }
  3283. /*
  3284. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  3285. * @vdev_handle: virtual device object
  3286. * @htt_pkt_type: type of pkt
  3287. *
  3288. * Return: void
  3289. */
  3290. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3291. enum htt_cmn_pkt_type val)
  3292. {
  3293. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3294. vdev->rx_decap_type = val;
  3295. }
  3296. /*
  3297. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3298. * @pdev_handle: physical device object
  3299. * @val: reo destination ring index (1 - 4)
  3300. *
  3301. * Return: void
  3302. */
  3303. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3304. enum cdp_host_reo_dest_ring val)
  3305. {
  3306. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3307. if (pdev)
  3308. pdev->reo_dest = val;
  3309. }
  3310. /*
  3311. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3312. * @pdev_handle: physical device object
  3313. *
  3314. * Return: reo destination ring index
  3315. */
  3316. static enum cdp_host_reo_dest_ring
  3317. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3318. {
  3319. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3320. if (pdev)
  3321. return pdev->reo_dest;
  3322. else
  3323. return cdp_host_reo_dest_ring_unknown;
  3324. }
  3325. #ifdef QCA_SUPPORT_SON
  3326. static void dp_son_peer_authorize(struct dp_peer *peer)
  3327. {
  3328. struct dp_soc *soc;
  3329. soc = peer->vdev->pdev->soc;
  3330. peer->peer_bs_inact_flag = 0;
  3331. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3332. return;
  3333. }
  3334. #else
  3335. static void dp_son_peer_authorize(struct dp_peer *peer)
  3336. {
  3337. return;
  3338. }
  3339. #endif
  3340. /*
  3341. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3342. * @pdev_handle: device object
  3343. * @val: value to be set
  3344. *
  3345. * Return: void
  3346. */
  3347. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3348. uint32_t val)
  3349. {
  3350. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3351. /* Enable/Disable smart mesh filtering. This flag will be checked
  3352. * during rx processing to check if packets are from NAC clients.
  3353. */
  3354. pdev->filter_neighbour_peers = val;
  3355. return 0;
  3356. }
  3357. /*
  3358. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3359. * address for smart mesh filtering
  3360. * @pdev_handle: device object
  3361. * @cmd: Add/Del command
  3362. * @macaddr: nac client mac address
  3363. *
  3364. * Return: void
  3365. */
  3366. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3367. uint32_t cmd, uint8_t *macaddr)
  3368. {
  3369. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3370. struct dp_neighbour_peer *peer = NULL;
  3371. if (!macaddr)
  3372. goto fail0;
  3373. /* Store address of NAC (neighbour peer) which will be checked
  3374. * against TA of received packets.
  3375. */
  3376. if (cmd == DP_NAC_PARAM_ADD) {
  3377. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3378. sizeof(*peer));
  3379. if (!peer) {
  3380. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3381. FL("DP neighbour peer node memory allocation failed"));
  3382. goto fail0;
  3383. }
  3384. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3385. macaddr, DP_MAC_ADDR_LEN);
  3386. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3387. /* add this neighbour peer into the list */
  3388. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3389. neighbour_peer_list_elem);
  3390. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3391. return 1;
  3392. } else if (cmd == DP_NAC_PARAM_DEL) {
  3393. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3394. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3395. neighbour_peer_list_elem) {
  3396. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3397. macaddr, DP_MAC_ADDR_LEN)) {
  3398. /* delete this peer from the list */
  3399. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3400. peer, neighbour_peer_list_elem);
  3401. qdf_mem_free(peer);
  3402. break;
  3403. }
  3404. }
  3405. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3406. return 1;
  3407. }
  3408. fail0:
  3409. return 0;
  3410. }
  3411. /*
  3412. * dp_get_sec_type() - Get the security type
  3413. * @peer: Datapath peer handle
  3414. * @sec_idx: Security id (mcast, ucast)
  3415. *
  3416. * return sec_type: Security type
  3417. */
  3418. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3419. {
  3420. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3421. return dpeer->security[sec_idx].sec_type;
  3422. }
  3423. /*
  3424. * dp_peer_authorize() - authorize txrx peer
  3425. * @peer_handle: Datapath peer handle
  3426. * @authorize
  3427. *
  3428. */
  3429. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3430. {
  3431. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3432. struct dp_soc *soc;
  3433. if (peer != NULL) {
  3434. soc = peer->vdev->pdev->soc;
  3435. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3436. dp_son_peer_authorize(peer);
  3437. peer->authorize = authorize ? 1 : 0;
  3438. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3439. }
  3440. }
  3441. #ifdef QCA_SUPPORT_SON
  3442. /*
  3443. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3444. * @pdev_handle: Device handle
  3445. * @new_threshold : updated threshold value
  3446. *
  3447. */
  3448. static void
  3449. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3450. u_int16_t new_threshold)
  3451. {
  3452. struct dp_vdev *vdev;
  3453. struct dp_peer *peer;
  3454. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3455. struct dp_soc *soc = pdev->soc;
  3456. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3457. if (old_threshold == new_threshold)
  3458. return;
  3459. soc->pdev_bs_inact_reload = new_threshold;
  3460. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3461. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3462. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3463. if (vdev->opmode != wlan_op_mode_ap)
  3464. continue;
  3465. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3466. if (!peer->authorize)
  3467. continue;
  3468. if (old_threshold - peer->peer_bs_inact >=
  3469. new_threshold) {
  3470. dp_mark_peer_inact((void *)peer, true);
  3471. peer->peer_bs_inact = 0;
  3472. } else {
  3473. peer->peer_bs_inact = new_threshold -
  3474. (old_threshold - peer->peer_bs_inact);
  3475. }
  3476. }
  3477. }
  3478. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3479. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3480. }
  3481. /**
  3482. * dp_txrx_reset_inact_count(): Reset inact count
  3483. * @pdev_handle - device handle
  3484. *
  3485. * Return: void
  3486. */
  3487. static void
  3488. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3489. {
  3490. struct dp_vdev *vdev = NULL;
  3491. struct dp_peer *peer = NULL;
  3492. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3493. struct dp_soc *soc = pdev->soc;
  3494. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3495. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3496. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3497. if (vdev->opmode != wlan_op_mode_ap)
  3498. continue;
  3499. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3500. if (!peer->authorize)
  3501. continue;
  3502. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3503. }
  3504. }
  3505. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3506. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3507. }
  3508. /**
  3509. * dp_set_inact_params(): set inactivity params
  3510. * @pdev_handle - device handle
  3511. * @inact_check_interval - inactivity interval
  3512. * @inact_normal - Inactivity normal
  3513. * @inact_overload - Inactivity overload
  3514. *
  3515. * Return: bool
  3516. */
  3517. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3518. u_int16_t inact_check_interval,
  3519. u_int16_t inact_normal, u_int16_t inact_overload)
  3520. {
  3521. struct dp_soc *soc;
  3522. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3523. if (!pdev)
  3524. return false;
  3525. soc = pdev->soc;
  3526. if (!soc)
  3527. return false;
  3528. soc->pdev_bs_inact_interval = inact_check_interval;
  3529. soc->pdev_bs_inact_normal = inact_normal;
  3530. soc->pdev_bs_inact_overload = inact_overload;
  3531. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3532. soc->pdev_bs_inact_normal);
  3533. return true;
  3534. }
  3535. /**
  3536. * dp_start_inact_timer(): Inactivity timer start
  3537. * @pdev_handle - device handle
  3538. * @enable - Inactivity timer start/stop
  3539. *
  3540. * Return: bool
  3541. */
  3542. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3543. {
  3544. struct dp_soc *soc;
  3545. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3546. if (!pdev)
  3547. return false;
  3548. soc = pdev->soc;
  3549. if (!soc)
  3550. return false;
  3551. if (enable) {
  3552. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3553. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3554. soc->pdev_bs_inact_interval * 1000);
  3555. } else {
  3556. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3557. }
  3558. return true;
  3559. }
  3560. /**
  3561. * dp_set_overload(): Set inactivity overload
  3562. * @pdev_handle - device handle
  3563. * @overload - overload status
  3564. *
  3565. * Return: void
  3566. */
  3567. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3568. {
  3569. struct dp_soc *soc;
  3570. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3571. if (!pdev)
  3572. return;
  3573. soc = pdev->soc;
  3574. if (!soc)
  3575. return;
  3576. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3577. overload ? soc->pdev_bs_inact_overload :
  3578. soc->pdev_bs_inact_normal);
  3579. }
  3580. /**
  3581. * dp_peer_is_inact(): check whether peer is inactive
  3582. * @peer_handle - datapath peer handle
  3583. *
  3584. * Return: bool
  3585. */
  3586. bool dp_peer_is_inact(void *peer_handle)
  3587. {
  3588. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3589. if (!peer)
  3590. return false;
  3591. return peer->peer_bs_inact_flag == 1;
  3592. }
  3593. /**
  3594. * dp_init_inact_timer: initialize the inact timer
  3595. * @soc - SOC handle
  3596. *
  3597. * Return: void
  3598. */
  3599. void dp_init_inact_timer(struct dp_soc *soc)
  3600. {
  3601. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3602. dp_txrx_peer_find_inact_timeout_handler,
  3603. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3604. }
  3605. #else
  3606. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3607. u_int16_t inact_normal, u_int16_t inact_overload)
  3608. {
  3609. return false;
  3610. }
  3611. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3612. {
  3613. return false;
  3614. }
  3615. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3616. {
  3617. return;
  3618. }
  3619. void dp_init_inact_timer(struct dp_soc *soc)
  3620. {
  3621. return;
  3622. }
  3623. bool dp_peer_is_inact(void *peer)
  3624. {
  3625. return false;
  3626. }
  3627. #endif
  3628. /*
  3629. * dp_peer_unref_delete() - unref and delete peer
  3630. * @peer_handle: Datapath peer handle
  3631. *
  3632. */
  3633. void dp_peer_unref_delete(void *peer_handle)
  3634. {
  3635. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3636. struct dp_peer *bss_peer = NULL;
  3637. struct dp_vdev *vdev = peer->vdev;
  3638. struct dp_pdev *pdev = vdev->pdev;
  3639. struct dp_soc *soc = pdev->soc;
  3640. struct dp_peer *tmppeer;
  3641. int found = 0;
  3642. uint16_t peer_id;
  3643. uint16_t vdev_id;
  3644. /*
  3645. * Hold the lock all the way from checking if the peer ref count
  3646. * is zero until the peer references are removed from the hash
  3647. * table and vdev list (if the peer ref count is zero).
  3648. * This protects against a new HL tx operation starting to use the
  3649. * peer object just after this function concludes it's done being used.
  3650. * Furthermore, the lock needs to be held while checking whether the
  3651. * vdev's list of peers is empty, to make sure that list is not modified
  3652. * concurrently with the empty check.
  3653. */
  3654. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3655. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3656. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3657. peer, qdf_atomic_read(&peer->ref_cnt));
  3658. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3659. peer_id = peer->peer_ids[0];
  3660. vdev_id = vdev->vdev_id;
  3661. /*
  3662. * Make sure that the reference to the peer in
  3663. * peer object map is removed
  3664. */
  3665. if (peer_id != HTT_INVALID_PEER)
  3666. soc->peer_id_to_obj_map[peer_id] = NULL;
  3667. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3668. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3669. /* remove the reference to the peer from the hash table */
  3670. dp_peer_find_hash_remove(soc, peer);
  3671. qdf_spin_lock_bh(&soc->ast_lock);
  3672. if (peer->self_ast_entry) {
  3673. dp_peer_del_ast(soc, peer->self_ast_entry);
  3674. peer->self_ast_entry = NULL;
  3675. }
  3676. qdf_spin_unlock_bh(&soc->ast_lock);
  3677. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3678. if (tmppeer == peer) {
  3679. found = 1;
  3680. break;
  3681. }
  3682. }
  3683. if (found) {
  3684. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3685. peer_list_elem);
  3686. } else {
  3687. /*Ignoring the remove operation as peer not found*/
  3688. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3689. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3690. peer, vdev, &peer->vdev->peer_list);
  3691. }
  3692. /* cleanup the peer data */
  3693. dp_peer_cleanup(vdev, peer);
  3694. /* check whether the parent vdev has no peers left */
  3695. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3696. /*
  3697. * Now that there are no references to the peer, we can
  3698. * release the peer reference lock.
  3699. */
  3700. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3701. /*
  3702. * Check if the parent vdev was waiting for its peers
  3703. * to be deleted, in order for it to be deleted too.
  3704. */
  3705. if (vdev->delete.pending) {
  3706. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3707. vdev->delete.callback;
  3708. void *vdev_delete_context =
  3709. vdev->delete.context;
  3710. QDF_TRACE(QDF_MODULE_ID_DP,
  3711. QDF_TRACE_LEVEL_INFO_HIGH,
  3712. FL("deleting vdev object %pK (%pM)"
  3713. " - its last peer is done"),
  3714. vdev, vdev->mac_addr.raw);
  3715. /* all peers are gone, go ahead and delete it */
  3716. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  3717. FLOW_TYPE_VDEV,
  3718. vdev_id);
  3719. dp_tx_vdev_detach(vdev);
  3720. QDF_TRACE(QDF_MODULE_ID_DP,
  3721. QDF_TRACE_LEVEL_INFO_HIGH,
  3722. FL("deleting vdev object %pK (%pM)"),
  3723. vdev, vdev->mac_addr.raw);
  3724. qdf_mem_free(vdev);
  3725. vdev = NULL;
  3726. if (vdev_delete_cb)
  3727. vdev_delete_cb(vdev_delete_context);
  3728. }
  3729. } else {
  3730. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3731. }
  3732. if (vdev) {
  3733. if (vdev->vap_bss_peer == peer) {
  3734. vdev->vap_bss_peer = NULL;
  3735. }
  3736. }
  3737. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3738. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  3739. vdev_id, peer->mac_addr.raw);
  3740. }
  3741. if (!vdev || !vdev->vap_bss_peer) {
  3742. goto free_peer;
  3743. }
  3744. #ifdef notyet
  3745. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3746. #else
  3747. bss_peer = vdev->vap_bss_peer;
  3748. DP_UPDATE_STATS(bss_peer, peer);
  3749. free_peer:
  3750. qdf_mem_free(peer);
  3751. #endif
  3752. } else {
  3753. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3754. }
  3755. }
  3756. /*
  3757. * dp_peer_detach_wifi3() – Detach txrx peer
  3758. * @peer_handle: Datapath peer handle
  3759. * @bitmap: bitmap indicating special handling of request.
  3760. *
  3761. */
  3762. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3763. {
  3764. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3765. /* redirect the peer's rx delivery function to point to a
  3766. * discard func
  3767. */
  3768. peer->rx_opt_proc = dp_rx_discard;
  3769. peer->ctrl_peer = NULL;
  3770. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3771. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3772. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3773. qdf_spinlock_destroy(&peer->peer_info_lock);
  3774. /*
  3775. * Remove the reference added during peer_attach.
  3776. * The peer will still be left allocated until the
  3777. * PEER_UNMAP message arrives to remove the other
  3778. * reference, added by the PEER_MAP message.
  3779. */
  3780. dp_peer_unref_delete(peer_handle);
  3781. }
  3782. /*
  3783. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3784. * @peer_handle: Datapath peer handle
  3785. *
  3786. */
  3787. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3788. {
  3789. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3790. return vdev->mac_addr.raw;
  3791. }
  3792. /*
  3793. * dp_vdev_set_wds() - Enable per packet stats
  3794. * @vdev_handle: DP VDEV handle
  3795. * @val: value
  3796. *
  3797. * Return: none
  3798. */
  3799. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3800. {
  3801. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3802. vdev->wds_enabled = val;
  3803. return 0;
  3804. }
  3805. /*
  3806. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3807. * @peer_handle: Datapath peer handle
  3808. *
  3809. */
  3810. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3811. uint8_t vdev_id)
  3812. {
  3813. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3814. struct dp_vdev *vdev = NULL;
  3815. if (qdf_unlikely(!pdev))
  3816. return NULL;
  3817. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3818. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3819. if (vdev->vdev_id == vdev_id)
  3820. break;
  3821. }
  3822. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3823. return (struct cdp_vdev *)vdev;
  3824. }
  3825. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3826. {
  3827. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3828. return vdev->opmode;
  3829. }
  3830. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3831. {
  3832. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3833. struct dp_pdev *pdev = vdev->pdev;
  3834. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3835. }
  3836. /**
  3837. * dp_reset_monitor_mode() - Disable monitor mode
  3838. * @pdev_handle: Datapath PDEV handle
  3839. *
  3840. * Return: 0 on success, not 0 on failure
  3841. */
  3842. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3843. {
  3844. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3845. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3846. struct dp_soc *soc = pdev->soc;
  3847. uint8_t pdev_id;
  3848. int mac_id;
  3849. pdev_id = pdev->pdev_id;
  3850. soc = pdev->soc;
  3851. qdf_spin_lock_bh(&pdev->mon_lock);
  3852. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3853. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3854. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3855. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3856. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3857. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3858. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3859. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3860. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3861. }
  3862. pdev->monitor_vdev = NULL;
  3863. qdf_spin_unlock_bh(&pdev->mon_lock);
  3864. return 0;
  3865. }
  3866. /**
  3867. * dp_set_nac() - set peer_nac
  3868. * @peer_handle: Datapath PEER handle
  3869. *
  3870. * Return: void
  3871. */
  3872. static void dp_set_nac(struct cdp_peer *peer_handle)
  3873. {
  3874. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3875. peer->nac = 1;
  3876. }
  3877. /**
  3878. * dp_get_tx_pending() - read pending tx
  3879. * @pdev_handle: Datapath PDEV handle
  3880. *
  3881. * Return: outstanding tx
  3882. */
  3883. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  3884. {
  3885. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3886. return qdf_atomic_read(&pdev->num_tx_outstanding);
  3887. }
  3888. /**
  3889. * dp_get_peer_mac_from_peer_id() - get peer mac
  3890. * @pdev_handle: Datapath PDEV handle
  3891. * @peer_id: Peer ID
  3892. * @peer_mac: MAC addr of PEER
  3893. *
  3894. * Return: void
  3895. */
  3896. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  3897. uint32_t peer_id, uint8_t *peer_mac)
  3898. {
  3899. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3900. struct dp_peer *peer;
  3901. if (pdev && peer_mac) {
  3902. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  3903. if (peer && peer->mac_addr.raw) {
  3904. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  3905. DP_MAC_ADDR_LEN);
  3906. }
  3907. }
  3908. }
  3909. /**
  3910. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3911. * @vdev_handle: Datapath VDEV handle
  3912. * @smart_monitor: Flag to denote if its smart monitor mode
  3913. *
  3914. * Return: 0 on success, not 0 on failure
  3915. */
  3916. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3917. uint8_t smart_monitor)
  3918. {
  3919. /* Many monitor VAPs can exists in a system but only one can be up at
  3920. * anytime
  3921. */
  3922. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3923. struct dp_pdev *pdev;
  3924. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3925. struct dp_soc *soc;
  3926. uint8_t pdev_id;
  3927. int mac_id;
  3928. qdf_assert(vdev);
  3929. pdev = vdev->pdev;
  3930. pdev_id = pdev->pdev_id;
  3931. soc = pdev->soc;
  3932. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3933. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3934. pdev, pdev_id, soc, vdev);
  3935. /*Check if current pdev's monitor_vdev exists */
  3936. if (pdev->monitor_vdev) {
  3937. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3938. "vdev=%pK\n", vdev);
  3939. qdf_assert(vdev);
  3940. }
  3941. pdev->monitor_vdev = vdev;
  3942. /* If smart monitor mode, do not configure monitor ring */
  3943. if (smart_monitor)
  3944. return QDF_STATUS_SUCCESS;
  3945. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3946. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3947. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3948. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3949. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3950. pdev->mo_data_filter);
  3951. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3952. htt_tlv_filter.mpdu_start = 1;
  3953. htt_tlv_filter.msdu_start = 1;
  3954. htt_tlv_filter.packet = 1;
  3955. htt_tlv_filter.msdu_end = 1;
  3956. htt_tlv_filter.mpdu_end = 1;
  3957. htt_tlv_filter.packet_header = 1;
  3958. htt_tlv_filter.attention = 1;
  3959. htt_tlv_filter.ppdu_start = 0;
  3960. htt_tlv_filter.ppdu_end = 0;
  3961. htt_tlv_filter.ppdu_end_user_stats = 0;
  3962. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3963. htt_tlv_filter.ppdu_end_status_done = 0;
  3964. htt_tlv_filter.header_per_msdu = 1;
  3965. htt_tlv_filter.enable_fp =
  3966. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3967. htt_tlv_filter.enable_md = 0;
  3968. htt_tlv_filter.enable_mo =
  3969. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3970. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3971. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3972. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3973. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3974. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3975. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3976. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3977. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3978. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3979. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3980. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3981. }
  3982. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3983. htt_tlv_filter.mpdu_start = 1;
  3984. htt_tlv_filter.msdu_start = 0;
  3985. htt_tlv_filter.packet = 0;
  3986. htt_tlv_filter.msdu_end = 0;
  3987. htt_tlv_filter.mpdu_end = 0;
  3988. htt_tlv_filter.attention = 0;
  3989. htt_tlv_filter.ppdu_start = 1;
  3990. htt_tlv_filter.ppdu_end = 1;
  3991. htt_tlv_filter.ppdu_end_user_stats = 1;
  3992. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3993. htt_tlv_filter.ppdu_end_status_done = 1;
  3994. htt_tlv_filter.enable_fp = 1;
  3995. htt_tlv_filter.enable_md = 0;
  3996. htt_tlv_filter.enable_mo = 1;
  3997. if (pdev->mcopy_mode) {
  3998. htt_tlv_filter.packet_header = 1;
  3999. }
  4000. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4001. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4002. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4003. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4004. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4005. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4006. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4007. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4008. pdev->pdev_id);
  4009. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4010. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4011. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4012. }
  4013. return QDF_STATUS_SUCCESS;
  4014. }
  4015. /**
  4016. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  4017. * @pdev_handle: Datapath PDEV handle
  4018. * @filter_val: Flag to select Filter for monitor mode
  4019. * Return: 0 on success, not 0 on failure
  4020. */
  4021. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  4022. struct cdp_monitor_filter *filter_val)
  4023. {
  4024. /* Many monitor VAPs can exists in a system but only one can be up at
  4025. * anytime
  4026. */
  4027. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4028. struct dp_vdev *vdev = pdev->monitor_vdev;
  4029. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4030. struct dp_soc *soc;
  4031. uint8_t pdev_id;
  4032. int mac_id;
  4033. pdev_id = pdev->pdev_id;
  4034. soc = pdev->soc;
  4035. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  4036. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  4037. pdev, pdev_id, soc, vdev);
  4038. /*Check if current pdev's monitor_vdev exists */
  4039. if (!pdev->monitor_vdev) {
  4040. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4041. "vdev=%pK\n", vdev);
  4042. qdf_assert(vdev);
  4043. }
  4044. /* update filter mode, type in pdev structure */
  4045. pdev->mon_filter_mode = filter_val->mode;
  4046. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  4047. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  4048. pdev->fp_data_filter = filter_val->fp_data;
  4049. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  4050. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  4051. pdev->mo_data_filter = filter_val->mo_data;
  4052. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  4053. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  4054. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  4055. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  4056. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  4057. pdev->mo_data_filter);
  4058. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4059. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4060. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4061. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4062. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4063. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4064. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4065. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4066. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4067. }
  4068. htt_tlv_filter.mpdu_start = 1;
  4069. htt_tlv_filter.msdu_start = 1;
  4070. htt_tlv_filter.packet = 1;
  4071. htt_tlv_filter.msdu_end = 1;
  4072. htt_tlv_filter.mpdu_end = 1;
  4073. htt_tlv_filter.packet_header = 1;
  4074. htt_tlv_filter.attention = 1;
  4075. htt_tlv_filter.ppdu_start = 0;
  4076. htt_tlv_filter.ppdu_end = 0;
  4077. htt_tlv_filter.ppdu_end_user_stats = 0;
  4078. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4079. htt_tlv_filter.ppdu_end_status_done = 0;
  4080. htt_tlv_filter.header_per_msdu = 1;
  4081. htt_tlv_filter.enable_fp =
  4082. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4083. htt_tlv_filter.enable_md = 0;
  4084. htt_tlv_filter.enable_mo =
  4085. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4086. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4087. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4088. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4089. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4090. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4091. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4092. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4093. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4094. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4095. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4096. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4097. }
  4098. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4099. htt_tlv_filter.mpdu_start = 1;
  4100. htt_tlv_filter.msdu_start = 0;
  4101. htt_tlv_filter.packet = 0;
  4102. htt_tlv_filter.msdu_end = 0;
  4103. htt_tlv_filter.mpdu_end = 0;
  4104. htt_tlv_filter.attention = 0;
  4105. htt_tlv_filter.ppdu_start = 1;
  4106. htt_tlv_filter.ppdu_end = 1;
  4107. htt_tlv_filter.ppdu_end_user_stats = 1;
  4108. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4109. htt_tlv_filter.ppdu_end_status_done = 1;
  4110. htt_tlv_filter.enable_fp = 1;
  4111. htt_tlv_filter.enable_md = 0;
  4112. htt_tlv_filter.enable_mo = 1;
  4113. if (pdev->mcopy_mode) {
  4114. htt_tlv_filter.packet_header = 1;
  4115. }
  4116. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4117. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4118. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4119. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4120. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4121. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4122. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4123. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4124. pdev->pdev_id);
  4125. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4126. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4127. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4128. }
  4129. return QDF_STATUS_SUCCESS;
  4130. }
  4131. /**
  4132. * dp_get_pdev_id_frm_pdev() - get pdev_id
  4133. * @pdev_handle: Datapath PDEV handle
  4134. *
  4135. * Return: pdev_id
  4136. */
  4137. static
  4138. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  4139. {
  4140. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4141. return pdev->pdev_id;
  4142. }
  4143. /**
  4144. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  4145. * @vdev_handle: Datapath VDEV handle
  4146. * Return: true on ucast filter flag set
  4147. */
  4148. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  4149. {
  4150. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4151. struct dp_pdev *pdev;
  4152. pdev = vdev->pdev;
  4153. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  4154. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  4155. return true;
  4156. return false;
  4157. }
  4158. /**
  4159. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  4160. * @vdev_handle: Datapath VDEV handle
  4161. * Return: true on mcast filter flag set
  4162. */
  4163. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  4164. {
  4165. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4166. struct dp_pdev *pdev;
  4167. pdev = vdev->pdev;
  4168. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  4169. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  4170. return true;
  4171. return false;
  4172. }
  4173. /**
  4174. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  4175. * @vdev_handle: Datapath VDEV handle
  4176. * Return: true on non data filter flag set
  4177. */
  4178. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  4179. {
  4180. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4181. struct dp_pdev *pdev;
  4182. pdev = vdev->pdev;
  4183. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  4184. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  4185. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  4186. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  4187. return true;
  4188. }
  4189. }
  4190. return false;
  4191. }
  4192. #ifdef MESH_MODE_SUPPORT
  4193. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  4194. {
  4195. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4196. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4197. FL("val %d"), val);
  4198. vdev->mesh_vdev = val;
  4199. }
  4200. /*
  4201. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  4202. * @vdev_hdl: virtual device object
  4203. * @val: value to be set
  4204. *
  4205. * Return: void
  4206. */
  4207. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  4208. {
  4209. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4210. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4211. FL("val %d"), val);
  4212. vdev->mesh_rx_filter = val;
  4213. }
  4214. #endif
  4215. /*
  4216. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  4217. * Current scope is bar received count
  4218. *
  4219. * @pdev_handle: DP_PDEV handle
  4220. *
  4221. * Return: void
  4222. */
  4223. #define STATS_PROC_TIMEOUT (HZ/1000)
  4224. static void
  4225. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  4226. {
  4227. struct dp_vdev *vdev;
  4228. struct dp_peer *peer;
  4229. uint32_t waitcnt;
  4230. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4231. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4232. if (!peer) {
  4233. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4234. FL("DP Invalid Peer refernce"));
  4235. return;
  4236. }
  4237. if (peer->delete_in_progress) {
  4238. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4239. FL("DP Peer deletion in progress"));
  4240. continue;
  4241. }
  4242. qdf_atomic_inc(&peer->ref_cnt);
  4243. waitcnt = 0;
  4244. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  4245. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  4246. && waitcnt < 10) {
  4247. schedule_timeout_interruptible(
  4248. STATS_PROC_TIMEOUT);
  4249. waitcnt++;
  4250. }
  4251. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  4252. dp_peer_unref_delete(peer);
  4253. }
  4254. }
  4255. }
  4256. /**
  4257. * dp_rx_bar_stats_cb(): BAR received stats callback
  4258. * @soc: SOC handle
  4259. * @cb_ctxt: Call back context
  4260. * @reo_status: Reo status
  4261. *
  4262. * return: void
  4263. */
  4264. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  4265. union hal_reo_status *reo_status)
  4266. {
  4267. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  4268. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  4269. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  4270. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  4271. queue_status->header.status);
  4272. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4273. return;
  4274. }
  4275. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  4276. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4277. }
  4278. /**
  4279. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  4280. * @vdev: DP VDEV handle
  4281. *
  4282. * return: void
  4283. */
  4284. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  4285. {
  4286. struct dp_peer *peer = NULL;
  4287. struct dp_soc *soc = vdev->pdev->soc;
  4288. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  4289. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  4290. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  4291. DP_UPDATE_STATS(vdev, peer);
  4292. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4293. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->ctrl_pdev,
  4294. &vdev->stats, (uint16_t) vdev->vdev_id,
  4295. UPDATE_VDEV_STATS);
  4296. }
  4297. /**
  4298. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  4299. * @pdev: DP PDEV handle
  4300. *
  4301. * return: void
  4302. */
  4303. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  4304. {
  4305. struct dp_vdev *vdev = NULL;
  4306. struct dp_soc *soc = pdev->soc;
  4307. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  4308. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  4309. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  4310. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4311. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4312. dp_aggregate_vdev_stats(vdev);
  4313. DP_UPDATE_STATS(pdev, vdev);
  4314. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  4315. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  4316. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  4317. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  4318. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  4319. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  4320. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  4321. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  4322. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  4323. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  4324. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  4325. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4326. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4327. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4328. DP_STATS_AGGR(pdev, vdev,
  4329. tx_i.mcast_en.dropped_map_error);
  4330. DP_STATS_AGGR(pdev, vdev,
  4331. tx_i.mcast_en.dropped_self_mac);
  4332. DP_STATS_AGGR(pdev, vdev,
  4333. tx_i.mcast_en.dropped_send_fail);
  4334. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4335. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4336. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4337. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4338. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  4339. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4340. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4341. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4342. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4343. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4344. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4345. pdev->stats.tx_i.dropped.dma_error +
  4346. pdev->stats.tx_i.dropped.ring_full +
  4347. pdev->stats.tx_i.dropped.enqueue_fail +
  4348. pdev->stats.tx_i.dropped.desc_na +
  4349. pdev->stats.tx_i.dropped.res_full;
  4350. pdev->stats.tx.last_ack_rssi =
  4351. vdev->stats.tx.last_ack_rssi;
  4352. pdev->stats.tx_i.tso.num_seg =
  4353. vdev->stats.tx_i.tso.num_seg;
  4354. }
  4355. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4356. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4357. soc->cdp_soc.ol_ops->update_dp_stats(pdev->ctrl_pdev,
  4358. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4359. }
  4360. /**
  4361. * dp_vdev_getstats() - get vdev packet level stats
  4362. * @vdev_handle: Datapath VDEV handle
  4363. * @stats: cdp network device stats structure
  4364. *
  4365. * Return: void
  4366. */
  4367. static void dp_vdev_getstats(void *vdev_handle,
  4368. struct cdp_dev_stats *stats)
  4369. {
  4370. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4371. dp_aggregate_vdev_stats(vdev);
  4372. }
  4373. /**
  4374. * dp_pdev_getstats() - get pdev packet level stats
  4375. * @pdev_handle: Datapath PDEV handle
  4376. * @stats: cdp network device stats structure
  4377. *
  4378. * Return: void
  4379. */
  4380. static void dp_pdev_getstats(void *pdev_handle,
  4381. struct cdp_dev_stats *stats)
  4382. {
  4383. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4384. dp_aggregate_pdev_stats(pdev);
  4385. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  4386. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  4387. stats->tx_errors = pdev->stats.tx.tx_failed +
  4388. pdev->stats.tx_i.dropped.dropped_pkt.num;
  4389. stats->tx_dropped = stats->tx_errors;
  4390. stats->rx_packets = pdev->stats.rx.unicast.num +
  4391. pdev->stats.rx.multicast.num +
  4392. pdev->stats.rx.bcast.num;
  4393. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  4394. pdev->stats.rx.multicast.bytes +
  4395. pdev->stats.rx.bcast.bytes;
  4396. }
  4397. /**
  4398. * dp_get_device_stats() - get interface level packet stats
  4399. * @handle: device handle
  4400. * @stats: cdp network device stats structure
  4401. * @type: device type pdev/vdev
  4402. *
  4403. * Return: void
  4404. */
  4405. static void dp_get_device_stats(void *handle,
  4406. struct cdp_dev_stats *stats, uint8_t type)
  4407. {
  4408. switch (type) {
  4409. case UPDATE_VDEV_STATS:
  4410. dp_vdev_getstats(handle, stats);
  4411. break;
  4412. case UPDATE_PDEV_STATS:
  4413. dp_pdev_getstats(handle, stats);
  4414. break;
  4415. default:
  4416. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4417. "apstats cannot be updated for this input "
  4418. "type %d\n", type);
  4419. break;
  4420. }
  4421. }
  4422. /**
  4423. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4424. * @pdev: DP_PDEV Handle
  4425. *
  4426. * Return:void
  4427. */
  4428. static inline void
  4429. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4430. {
  4431. uint8_t index = 0;
  4432. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4433. DP_PRINT_STATS("Received From Stack:");
  4434. DP_PRINT_STATS(" Packets = %d",
  4435. pdev->stats.tx_i.rcvd.num);
  4436. DP_PRINT_STATS(" Bytes = %llu",
  4437. pdev->stats.tx_i.rcvd.bytes);
  4438. DP_PRINT_STATS("Processed:");
  4439. DP_PRINT_STATS(" Packets = %d",
  4440. pdev->stats.tx_i.processed.num);
  4441. DP_PRINT_STATS(" Bytes = %llu",
  4442. pdev->stats.tx_i.processed.bytes);
  4443. DP_PRINT_STATS("Total Completions:");
  4444. DP_PRINT_STATS(" Packets = %u",
  4445. pdev->stats.tx.comp_pkt.num);
  4446. DP_PRINT_STATS(" Bytes = %llu",
  4447. pdev->stats.tx.comp_pkt.bytes);
  4448. DP_PRINT_STATS("Successful Completions:");
  4449. DP_PRINT_STATS(" Packets = %u",
  4450. pdev->stats.tx.tx_success.num);
  4451. DP_PRINT_STATS(" Bytes = %llu",
  4452. pdev->stats.tx.tx_success.bytes);
  4453. DP_PRINT_STATS("Dropped:");
  4454. DP_PRINT_STATS(" Total = %d",
  4455. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4456. DP_PRINT_STATS(" Dma_map_error = %d",
  4457. pdev->stats.tx_i.dropped.dma_error);
  4458. DP_PRINT_STATS(" Ring Full = %d",
  4459. pdev->stats.tx_i.dropped.ring_full);
  4460. DP_PRINT_STATS(" Descriptor Not available = %d",
  4461. pdev->stats.tx_i.dropped.desc_na);
  4462. DP_PRINT_STATS(" HW enqueue failed= %d",
  4463. pdev->stats.tx_i.dropped.enqueue_fail);
  4464. DP_PRINT_STATS(" Resources Full = %d",
  4465. pdev->stats.tx_i.dropped.res_full);
  4466. DP_PRINT_STATS(" FW removed = %d",
  4467. pdev->stats.tx.dropped.fw_rem);
  4468. DP_PRINT_STATS(" FW removed transmitted = %d",
  4469. pdev->stats.tx.dropped.fw_rem_tx);
  4470. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4471. pdev->stats.tx.dropped.fw_rem_notx);
  4472. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4473. pdev->stats.tx.dropped.fw_reason1);
  4474. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4475. pdev->stats.tx.dropped.fw_reason2);
  4476. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4477. pdev->stats.tx.dropped.fw_reason3);
  4478. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4479. pdev->stats.tx.dropped.age_out);
  4480. DP_PRINT_STATS(" Multicast:");
  4481. DP_PRINT_STATS(" Packets: %u",
  4482. pdev->stats.tx.mcast.num);
  4483. DP_PRINT_STATS(" Bytes: %llu",
  4484. pdev->stats.tx.mcast.bytes);
  4485. DP_PRINT_STATS("Scatter Gather:");
  4486. DP_PRINT_STATS(" Packets = %d",
  4487. pdev->stats.tx_i.sg.sg_pkt.num);
  4488. DP_PRINT_STATS(" Bytes = %llu",
  4489. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4490. DP_PRINT_STATS(" Dropped By Host = %d",
  4491. pdev->stats.tx_i.sg.dropped_host);
  4492. DP_PRINT_STATS(" Dropped By Target = %d",
  4493. pdev->stats.tx_i.sg.dropped_target);
  4494. DP_PRINT_STATS("TSO:");
  4495. DP_PRINT_STATS(" Number of Segments = %d",
  4496. pdev->stats.tx_i.tso.num_seg);
  4497. DP_PRINT_STATS(" Packets = %d",
  4498. pdev->stats.tx_i.tso.tso_pkt.num);
  4499. DP_PRINT_STATS(" Bytes = %llu",
  4500. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4501. DP_PRINT_STATS(" Dropped By Host = %d",
  4502. pdev->stats.tx_i.tso.dropped_host);
  4503. DP_PRINT_STATS("Mcast Enhancement:");
  4504. DP_PRINT_STATS(" Packets = %d",
  4505. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4506. DP_PRINT_STATS(" Bytes = %llu",
  4507. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4508. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4509. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4510. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4511. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4512. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4513. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4514. DP_PRINT_STATS(" Unicast sent = %d",
  4515. pdev->stats.tx_i.mcast_en.ucast);
  4516. DP_PRINT_STATS("Raw:");
  4517. DP_PRINT_STATS(" Packets = %d",
  4518. pdev->stats.tx_i.raw.raw_pkt.num);
  4519. DP_PRINT_STATS(" Bytes = %llu",
  4520. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4521. DP_PRINT_STATS(" DMA map error = %d",
  4522. pdev->stats.tx_i.raw.dma_map_error);
  4523. DP_PRINT_STATS("Reinjected:");
  4524. DP_PRINT_STATS(" Packets = %d",
  4525. pdev->stats.tx_i.reinject_pkts.num);
  4526. DP_PRINT_STATS(" Bytes = %llu\n",
  4527. pdev->stats.tx_i.reinject_pkts.bytes);
  4528. DP_PRINT_STATS("Inspected:");
  4529. DP_PRINT_STATS(" Packets = %d",
  4530. pdev->stats.tx_i.inspect_pkts.num);
  4531. DP_PRINT_STATS(" Bytes = %llu",
  4532. pdev->stats.tx_i.inspect_pkts.bytes);
  4533. DP_PRINT_STATS("Nawds Multicast:");
  4534. DP_PRINT_STATS(" Packets = %d",
  4535. pdev->stats.tx_i.nawds_mcast.num);
  4536. DP_PRINT_STATS(" Bytes = %llu",
  4537. pdev->stats.tx_i.nawds_mcast.bytes);
  4538. DP_PRINT_STATS("CCE Classified:");
  4539. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4540. pdev->stats.tx_i.cce_classified);
  4541. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4542. pdev->stats.tx_i.cce_classified_raw);
  4543. DP_PRINT_STATS("Mesh stats:");
  4544. DP_PRINT_STATS(" frames to firmware: %u",
  4545. pdev->stats.tx_i.mesh.exception_fw);
  4546. DP_PRINT_STATS(" completions from fw: %u",
  4547. pdev->stats.tx_i.mesh.completion_fw);
  4548. DP_PRINT_STATS("PPDU stats counter");
  4549. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4550. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4551. pdev->stats.ppdu_stats_counter[index]);
  4552. }
  4553. }
  4554. /**
  4555. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4556. * @pdev: DP_PDEV Handle
  4557. *
  4558. * Return: void
  4559. */
  4560. static inline void
  4561. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4562. {
  4563. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4564. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4565. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4566. pdev->stats.rx.rcvd_reo[0].num,
  4567. pdev->stats.rx.rcvd_reo[1].num,
  4568. pdev->stats.rx.rcvd_reo[2].num,
  4569. pdev->stats.rx.rcvd_reo[3].num);
  4570. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4571. pdev->stats.rx.rcvd_reo[0].bytes,
  4572. pdev->stats.rx.rcvd_reo[1].bytes,
  4573. pdev->stats.rx.rcvd_reo[2].bytes,
  4574. pdev->stats.rx.rcvd_reo[3].bytes);
  4575. DP_PRINT_STATS("Replenished:");
  4576. DP_PRINT_STATS(" Packets = %d",
  4577. pdev->stats.replenish.pkts.num);
  4578. DP_PRINT_STATS(" Bytes = %llu",
  4579. pdev->stats.replenish.pkts.bytes);
  4580. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4581. pdev->stats.buf_freelist);
  4582. DP_PRINT_STATS(" Low threshold intr = %d",
  4583. pdev->stats.replenish.low_thresh_intrs);
  4584. DP_PRINT_STATS("Dropped:");
  4585. DP_PRINT_STATS(" msdu_not_done = %d",
  4586. pdev->stats.dropped.msdu_not_done);
  4587. DP_PRINT_STATS(" mon_rx_drop = %d",
  4588. pdev->stats.dropped.mon_rx_drop);
  4589. DP_PRINT_STATS("Sent To Stack:");
  4590. DP_PRINT_STATS(" Packets = %d",
  4591. pdev->stats.rx.to_stack.num);
  4592. DP_PRINT_STATS(" Bytes = %llu",
  4593. pdev->stats.rx.to_stack.bytes);
  4594. DP_PRINT_STATS("Multicast/Broadcast:");
  4595. DP_PRINT_STATS(" Packets = %d",
  4596. (pdev->stats.rx.multicast.num +
  4597. pdev->stats.rx.bcast.num));
  4598. DP_PRINT_STATS(" Bytes = %llu",
  4599. (pdev->stats.rx.multicast.bytes +
  4600. pdev->stats.rx.bcast.bytes));
  4601. DP_PRINT_STATS("Errors:");
  4602. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4603. pdev->stats.replenish.rxdma_err);
  4604. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4605. pdev->stats.err.desc_alloc_fail);
  4606. DP_PRINT_STATS(" IP checksum error = %d",
  4607. pdev->stats.err.ip_csum_err);
  4608. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  4609. pdev->stats.err.tcp_udp_csum_err);
  4610. /* Get bar_recv_cnt */
  4611. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4612. DP_PRINT_STATS("BAR Received Count: = %d",
  4613. pdev->stats.rx.bar_recv_cnt);
  4614. }
  4615. /**
  4616. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  4617. * @pdev: DP_PDEV Handle
  4618. *
  4619. * Return: void
  4620. */
  4621. static inline void
  4622. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  4623. {
  4624. struct cdp_pdev_mon_stats *rx_mon_stats;
  4625. rx_mon_stats = &pdev->rx_mon_stats;
  4626. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  4627. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  4628. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  4629. rx_mon_stats->status_ppdu_done);
  4630. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  4631. rx_mon_stats->dest_ppdu_done);
  4632. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  4633. rx_mon_stats->dest_mpdu_done);
  4634. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  4635. rx_mon_stats->dest_mpdu_drop);
  4636. }
  4637. /**
  4638. * dp_print_soc_tx_stats(): Print SOC level stats
  4639. * @soc DP_SOC Handle
  4640. *
  4641. * Return: void
  4642. */
  4643. static inline void
  4644. dp_print_soc_tx_stats(struct dp_soc *soc)
  4645. {
  4646. uint8_t desc_pool_id;
  4647. soc->stats.tx.desc_in_use = 0;
  4648. DP_PRINT_STATS("SOC Tx Stats:\n");
  4649. for (desc_pool_id = 0;
  4650. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  4651. desc_pool_id++)
  4652. soc->stats.tx.desc_in_use +=
  4653. soc->tx_desc[desc_pool_id].num_allocated;
  4654. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4655. soc->stats.tx.desc_in_use);
  4656. DP_PRINT_STATS("Invalid peer:");
  4657. DP_PRINT_STATS(" Packets = %d",
  4658. soc->stats.tx.tx_invalid_peer.num);
  4659. DP_PRINT_STATS(" Bytes = %llu",
  4660. soc->stats.tx.tx_invalid_peer.bytes);
  4661. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4662. soc->stats.tx.tcl_ring_full[0],
  4663. soc->stats.tx.tcl_ring_full[1],
  4664. soc->stats.tx.tcl_ring_full[2]);
  4665. }
  4666. /**
  4667. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4668. * @soc: DP_SOC Handle
  4669. *
  4670. * Return:void
  4671. */
  4672. static inline void
  4673. dp_print_soc_rx_stats(struct dp_soc *soc)
  4674. {
  4675. uint32_t i;
  4676. char reo_error[DP_REO_ERR_LENGTH];
  4677. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  4678. uint8_t index = 0;
  4679. DP_PRINT_STATS("SOC Rx Stats:\n");
  4680. DP_PRINT_STATS("Errors:\n");
  4681. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  4682. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  4683. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  4684. DP_PRINT_STATS("Invalid RBM = %d",
  4685. soc->stats.rx.err.invalid_rbm);
  4686. DP_PRINT_STATS("Invalid Vdev = %d",
  4687. soc->stats.rx.err.invalid_vdev);
  4688. DP_PRINT_STATS("Invalid Pdev = %d",
  4689. soc->stats.rx.err.invalid_pdev);
  4690. DP_PRINT_STATS("Invalid Peer = %d",
  4691. soc->stats.rx.err.rx_invalid_peer.num);
  4692. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  4693. soc->stats.rx.err.hal_ring_access_fail);
  4694. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  4695. index += qdf_snprint(&rxdma_error[index],
  4696. DP_RXDMA_ERR_LENGTH - index,
  4697. " %d", soc->stats.rx.err.rxdma_error[i]);
  4698. }
  4699. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  4700. rxdma_error);
  4701. index = 0;
  4702. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  4703. index += qdf_snprint(&reo_error[index],
  4704. DP_REO_ERR_LENGTH - index,
  4705. " %d", soc->stats.rx.err.reo_error[i]);
  4706. }
  4707. DP_PRINT_STATS("REO Error(0-14):%s",
  4708. reo_error);
  4709. }
  4710. /**
  4711. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  4712. * @soc: DP_SOC handle
  4713. * @srng: DP_SRNG handle
  4714. * @ring_name: SRNG name
  4715. *
  4716. * Return: void
  4717. */
  4718. static inline void
  4719. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  4720. char *ring_name)
  4721. {
  4722. uint32_t tailp;
  4723. uint32_t headp;
  4724. if (srng->hal_srng != NULL) {
  4725. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4726. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4727. ring_name, headp, tailp);
  4728. }
  4729. }
  4730. /**
  4731. * dp_print_ring_stats(): Print tail and head pointer
  4732. * @pdev: DP_PDEV handle
  4733. *
  4734. * Return:void
  4735. */
  4736. static inline void
  4737. dp_print_ring_stats(struct dp_pdev *pdev)
  4738. {
  4739. uint32_t i;
  4740. char ring_name[STR_MAXLEN + 1];
  4741. int mac_id;
  4742. dp_print_ring_stat_from_hal(pdev->soc,
  4743. &pdev->soc->reo_exception_ring,
  4744. "Reo Exception Ring");
  4745. dp_print_ring_stat_from_hal(pdev->soc,
  4746. &pdev->soc->reo_reinject_ring,
  4747. "Reo Inject Ring");
  4748. dp_print_ring_stat_from_hal(pdev->soc,
  4749. &pdev->soc->reo_cmd_ring,
  4750. "Reo Command Ring");
  4751. dp_print_ring_stat_from_hal(pdev->soc,
  4752. &pdev->soc->reo_status_ring,
  4753. "Reo Status Ring");
  4754. dp_print_ring_stat_from_hal(pdev->soc,
  4755. &pdev->soc->rx_rel_ring,
  4756. "Rx Release ring");
  4757. dp_print_ring_stat_from_hal(pdev->soc,
  4758. &pdev->soc->tcl_cmd_ring,
  4759. "Tcl command Ring");
  4760. dp_print_ring_stat_from_hal(pdev->soc,
  4761. &pdev->soc->tcl_status_ring,
  4762. "Tcl Status Ring");
  4763. dp_print_ring_stat_from_hal(pdev->soc,
  4764. &pdev->soc->wbm_desc_rel_ring,
  4765. "Wbm Desc Rel Ring");
  4766. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4767. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4768. dp_print_ring_stat_from_hal(pdev->soc,
  4769. &pdev->soc->reo_dest_ring[i],
  4770. ring_name);
  4771. }
  4772. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4773. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4774. dp_print_ring_stat_from_hal(pdev->soc,
  4775. &pdev->soc->tcl_data_ring[i],
  4776. ring_name);
  4777. }
  4778. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4779. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4780. dp_print_ring_stat_from_hal(pdev->soc,
  4781. &pdev->soc->tx_comp_ring[i],
  4782. ring_name);
  4783. }
  4784. dp_print_ring_stat_from_hal(pdev->soc,
  4785. &pdev->rx_refill_buf_ring,
  4786. "Rx Refill Buf Ring");
  4787. dp_print_ring_stat_from_hal(pdev->soc,
  4788. &pdev->rx_refill_buf_ring2,
  4789. "Second Rx Refill Buf Ring");
  4790. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4791. dp_print_ring_stat_from_hal(pdev->soc,
  4792. &pdev->rxdma_mon_buf_ring[mac_id],
  4793. "Rxdma Mon Buf Ring");
  4794. dp_print_ring_stat_from_hal(pdev->soc,
  4795. &pdev->rxdma_mon_dst_ring[mac_id],
  4796. "Rxdma Mon Dst Ring");
  4797. dp_print_ring_stat_from_hal(pdev->soc,
  4798. &pdev->rxdma_mon_status_ring[mac_id],
  4799. "Rxdma Mon Status Ring");
  4800. dp_print_ring_stat_from_hal(pdev->soc,
  4801. &pdev->rxdma_mon_desc_ring[mac_id],
  4802. "Rxdma mon desc Ring");
  4803. }
  4804. for (i = 0; i < NUM_RXDMA_RINGS_PER_PDEV; i++) {
  4805. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4806. dp_print_ring_stat_from_hal(pdev->soc,
  4807. &pdev->rxdma_err_dst_ring[i],
  4808. ring_name);
  4809. }
  4810. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4811. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4812. dp_print_ring_stat_from_hal(pdev->soc,
  4813. &pdev->rx_mac_buf_ring[i],
  4814. ring_name);
  4815. }
  4816. }
  4817. /**
  4818. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4819. * @vdev: DP_VDEV handle
  4820. *
  4821. * Return:void
  4822. */
  4823. static inline void
  4824. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4825. {
  4826. struct dp_peer *peer = NULL;
  4827. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4828. DP_STATS_CLR(vdev->pdev);
  4829. DP_STATS_CLR(vdev->pdev->soc);
  4830. DP_STATS_CLR(vdev);
  4831. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4832. if (!peer)
  4833. return;
  4834. DP_STATS_CLR(peer);
  4835. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4836. soc->cdp_soc.ol_ops->update_dp_stats(
  4837. vdev->pdev->ctrl_pdev,
  4838. &peer->stats,
  4839. peer->peer_ids[0],
  4840. UPDATE_PEER_STATS);
  4841. }
  4842. }
  4843. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4844. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->ctrl_pdev,
  4845. &vdev->stats, (uint16_t)vdev->vdev_id,
  4846. UPDATE_VDEV_STATS);
  4847. }
  4848. /**
  4849. * dp_print_rx_rates(): Print Rx rate stats
  4850. * @vdev: DP_VDEV handle
  4851. *
  4852. * Return:void
  4853. */
  4854. static inline void
  4855. dp_print_rx_rates(struct dp_vdev *vdev)
  4856. {
  4857. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4858. uint8_t i, mcs, pkt_type;
  4859. uint8_t index = 0;
  4860. char nss[DP_NSS_LENGTH];
  4861. DP_PRINT_STATS("Rx Rate Info:\n");
  4862. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4863. index = 0;
  4864. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4865. if (!dp_rate_string[pkt_type][mcs].valid)
  4866. continue;
  4867. DP_PRINT_STATS(" %s = %d",
  4868. dp_rate_string[pkt_type][mcs].mcs_type,
  4869. pdev->stats.rx.pkt_type[pkt_type].
  4870. mcs_count[mcs]);
  4871. }
  4872. DP_PRINT_STATS("\n");
  4873. }
  4874. index = 0;
  4875. for (i = 0; i < SS_COUNT; i++) {
  4876. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4877. " %d", pdev->stats.rx.nss[i]);
  4878. }
  4879. DP_PRINT_STATS("NSS(1-8) = %s",
  4880. nss);
  4881. DP_PRINT_STATS("SGI ="
  4882. " 0.8us %d,"
  4883. " 0.4us %d,"
  4884. " 1.6us %d,"
  4885. " 3.2us %d,",
  4886. pdev->stats.rx.sgi_count[0],
  4887. pdev->stats.rx.sgi_count[1],
  4888. pdev->stats.rx.sgi_count[2],
  4889. pdev->stats.rx.sgi_count[3]);
  4890. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4891. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4892. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4893. DP_PRINT_STATS("Reception Type ="
  4894. " SU: %d,"
  4895. " MU_MIMO:%d,"
  4896. " MU_OFDMA:%d,"
  4897. " MU_OFDMA_MIMO:%d\n",
  4898. pdev->stats.rx.reception_type[0],
  4899. pdev->stats.rx.reception_type[1],
  4900. pdev->stats.rx.reception_type[2],
  4901. pdev->stats.rx.reception_type[3]);
  4902. DP_PRINT_STATS("Aggregation:\n");
  4903. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4904. pdev->stats.rx.ampdu_cnt);
  4905. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4906. pdev->stats.rx.non_ampdu_cnt);
  4907. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4908. pdev->stats.rx.amsdu_cnt);
  4909. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4910. pdev->stats.rx.non_amsdu_cnt);
  4911. }
  4912. /**
  4913. * dp_print_tx_rates(): Print tx rates
  4914. * @vdev: DP_VDEV handle
  4915. *
  4916. * Return:void
  4917. */
  4918. static inline void
  4919. dp_print_tx_rates(struct dp_vdev *vdev)
  4920. {
  4921. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4922. uint8_t mcs, pkt_type;
  4923. uint8_t index;
  4924. char nss[DP_NSS_LENGTH];
  4925. int nss_index;
  4926. DP_PRINT_STATS("Tx Rate Info:\n");
  4927. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4928. index = 0;
  4929. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4930. if (!dp_rate_string[pkt_type][mcs].valid)
  4931. continue;
  4932. DP_PRINT_STATS(" %s = %d",
  4933. dp_rate_string[pkt_type][mcs].mcs_type,
  4934. pdev->stats.tx.pkt_type[pkt_type].
  4935. mcs_count[mcs]);
  4936. }
  4937. DP_PRINT_STATS("\n");
  4938. }
  4939. DP_PRINT_STATS("SGI ="
  4940. " 0.8us %d"
  4941. " 0.4us %d"
  4942. " 1.6us %d"
  4943. " 3.2us %d",
  4944. pdev->stats.tx.sgi_count[0],
  4945. pdev->stats.tx.sgi_count[1],
  4946. pdev->stats.tx.sgi_count[2],
  4947. pdev->stats.tx.sgi_count[3]);
  4948. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4949. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4950. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4951. index = 0;
  4952. for (nss_index = 0; nss_index < SS_COUNT; nss_index++) {
  4953. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4954. " %d", pdev->stats.tx.nss[nss_index]);
  4955. }
  4956. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  4957. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4958. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4959. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4960. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4961. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4962. DP_PRINT_STATS("Aggregation:\n");
  4963. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4964. pdev->stats.tx.amsdu_cnt);
  4965. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4966. pdev->stats.tx.non_amsdu_cnt);
  4967. }
  4968. /**
  4969. * dp_print_peer_stats():print peer stats
  4970. * @peer: DP_PEER handle
  4971. *
  4972. * return void
  4973. */
  4974. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4975. {
  4976. uint8_t i, mcs, pkt_type;
  4977. uint32_t index;
  4978. char nss[DP_NSS_LENGTH];
  4979. DP_PRINT_STATS("Node Tx Stats:\n");
  4980. DP_PRINT_STATS("Total Packet Completions = %d",
  4981. peer->stats.tx.comp_pkt.num);
  4982. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4983. peer->stats.tx.comp_pkt.bytes);
  4984. DP_PRINT_STATS("Success Packets = %d",
  4985. peer->stats.tx.tx_success.num);
  4986. DP_PRINT_STATS("Success Bytes = %llu",
  4987. peer->stats.tx.tx_success.bytes);
  4988. DP_PRINT_STATS("Unicast Success Packets = %d",
  4989. peer->stats.tx.ucast.num);
  4990. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4991. peer->stats.tx.ucast.bytes);
  4992. DP_PRINT_STATS("Multicast Success Packets = %d",
  4993. peer->stats.tx.mcast.num);
  4994. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4995. peer->stats.tx.mcast.bytes);
  4996. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4997. peer->stats.tx.bcast.num);
  4998. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4999. peer->stats.tx.bcast.bytes);
  5000. DP_PRINT_STATS("Packets Failed = %d",
  5001. peer->stats.tx.tx_failed);
  5002. DP_PRINT_STATS("Packets In OFDMA = %d",
  5003. peer->stats.tx.ofdma);
  5004. DP_PRINT_STATS("Packets In STBC = %d",
  5005. peer->stats.tx.stbc);
  5006. DP_PRINT_STATS("Packets In LDPC = %d",
  5007. peer->stats.tx.ldpc);
  5008. DP_PRINT_STATS("Packet Retries = %d",
  5009. peer->stats.tx.retries);
  5010. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  5011. peer->stats.tx.amsdu_cnt);
  5012. DP_PRINT_STATS("Last Packet RSSI = %d",
  5013. peer->stats.tx.last_ack_rssi);
  5014. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  5015. peer->stats.tx.dropped.fw_rem);
  5016. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  5017. peer->stats.tx.dropped.fw_rem_tx);
  5018. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  5019. peer->stats.tx.dropped.fw_rem_notx);
  5020. DP_PRINT_STATS("Dropped : Age Out = %d",
  5021. peer->stats.tx.dropped.age_out);
  5022. DP_PRINT_STATS("NAWDS : ");
  5023. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  5024. peer->stats.tx.nawds_mcast_drop);
  5025. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  5026. peer->stats.tx.nawds_mcast.num);
  5027. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  5028. peer->stats.tx.nawds_mcast.bytes);
  5029. DP_PRINT_STATS("Rate Info:");
  5030. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5031. index = 0;
  5032. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5033. if (!dp_rate_string[pkt_type][mcs].valid)
  5034. continue;
  5035. DP_PRINT_STATS(" %s = %d",
  5036. dp_rate_string[pkt_type][mcs].mcs_type,
  5037. peer->stats.tx.pkt_type[pkt_type].
  5038. mcs_count[mcs]);
  5039. }
  5040. DP_PRINT_STATS("\n");
  5041. }
  5042. DP_PRINT_STATS("SGI = "
  5043. " 0.8us %d"
  5044. " 0.4us %d"
  5045. " 1.6us %d"
  5046. " 3.2us %d",
  5047. peer->stats.tx.sgi_count[0],
  5048. peer->stats.tx.sgi_count[1],
  5049. peer->stats.tx.sgi_count[2],
  5050. peer->stats.tx.sgi_count[3]);
  5051. DP_PRINT_STATS("Excess Retries per AC ");
  5052. DP_PRINT_STATS(" Best effort = %d",
  5053. peer->stats.tx.excess_retries_per_ac[0]);
  5054. DP_PRINT_STATS(" Background= %d",
  5055. peer->stats.tx.excess_retries_per_ac[1]);
  5056. DP_PRINT_STATS(" Video = %d",
  5057. peer->stats.tx.excess_retries_per_ac[2]);
  5058. DP_PRINT_STATS(" Voice = %d",
  5059. peer->stats.tx.excess_retries_per_ac[3]);
  5060. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  5061. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  5062. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  5063. index = 0;
  5064. for (i = 0; i < SS_COUNT; i++) {
  5065. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5066. " %d", peer->stats.tx.nss[i]);
  5067. }
  5068. DP_PRINT_STATS("NSS(1-8) = %s",
  5069. nss);
  5070. DP_PRINT_STATS("Aggregation:");
  5071. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  5072. peer->stats.tx.amsdu_cnt);
  5073. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  5074. peer->stats.tx.non_amsdu_cnt);
  5075. DP_PRINT_STATS("Node Rx Stats:");
  5076. DP_PRINT_STATS("Packets Sent To Stack = %d",
  5077. peer->stats.rx.to_stack.num);
  5078. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  5079. peer->stats.rx.to_stack.bytes);
  5080. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  5081. DP_PRINT_STATS("Ring Id = %d", i);
  5082. DP_PRINT_STATS(" Packets Received = %d",
  5083. peer->stats.rx.rcvd_reo[i].num);
  5084. DP_PRINT_STATS(" Bytes Received = %llu",
  5085. peer->stats.rx.rcvd_reo[i].bytes);
  5086. }
  5087. DP_PRINT_STATS("Multicast Packets Received = %d",
  5088. peer->stats.rx.multicast.num);
  5089. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  5090. peer->stats.rx.multicast.bytes);
  5091. DP_PRINT_STATS("Broadcast Packets Received = %d",
  5092. peer->stats.rx.bcast.num);
  5093. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  5094. peer->stats.rx.bcast.bytes);
  5095. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  5096. peer->stats.rx.intra_bss.pkts.num);
  5097. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  5098. peer->stats.rx.intra_bss.pkts.bytes);
  5099. DP_PRINT_STATS("Raw Packets Received = %d",
  5100. peer->stats.rx.raw.num);
  5101. DP_PRINT_STATS("Raw Bytes Received = %llu",
  5102. peer->stats.rx.raw.bytes);
  5103. DP_PRINT_STATS("Errors: MIC Errors = %d",
  5104. peer->stats.rx.err.mic_err);
  5105. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  5106. peer->stats.rx.err.decrypt_err);
  5107. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  5108. peer->stats.rx.non_ampdu_cnt);
  5109. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  5110. peer->stats.rx.ampdu_cnt);
  5111. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  5112. peer->stats.rx.non_amsdu_cnt);
  5113. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  5114. peer->stats.rx.amsdu_cnt);
  5115. DP_PRINT_STATS("NAWDS : ");
  5116. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  5117. peer->stats.rx.nawds_mcast_drop);
  5118. DP_PRINT_STATS("SGI ="
  5119. " 0.8us %d"
  5120. " 0.4us %d"
  5121. " 1.6us %d"
  5122. " 3.2us %d",
  5123. peer->stats.rx.sgi_count[0],
  5124. peer->stats.rx.sgi_count[1],
  5125. peer->stats.rx.sgi_count[2],
  5126. peer->stats.rx.sgi_count[3]);
  5127. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  5128. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  5129. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  5130. DP_PRINT_STATS("Reception Type ="
  5131. " SU %d,"
  5132. " MU_MIMO %d,"
  5133. " MU_OFDMA %d,"
  5134. " MU_OFDMA_MIMO %d",
  5135. peer->stats.rx.reception_type[0],
  5136. peer->stats.rx.reception_type[1],
  5137. peer->stats.rx.reception_type[2],
  5138. peer->stats.rx.reception_type[3]);
  5139. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5140. index = 0;
  5141. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5142. if (!dp_rate_string[pkt_type][mcs].valid)
  5143. continue;
  5144. DP_PRINT_STATS(" %s = %d",
  5145. dp_rate_string[pkt_type][mcs].mcs_type,
  5146. peer->stats.rx.pkt_type[pkt_type].
  5147. mcs_count[mcs]);
  5148. }
  5149. DP_PRINT_STATS("\n");
  5150. }
  5151. index = 0;
  5152. for (i = 0; i < SS_COUNT; i++) {
  5153. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5154. " %d", peer->stats.rx.nss[i]);
  5155. }
  5156. DP_PRINT_STATS("NSS(1-8) = %s",
  5157. nss);
  5158. DP_PRINT_STATS("Aggregation:");
  5159. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  5160. peer->stats.rx.ampdu_cnt);
  5161. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  5162. peer->stats.rx.non_ampdu_cnt);
  5163. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  5164. peer->stats.rx.amsdu_cnt);
  5165. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  5166. peer->stats.rx.non_amsdu_cnt);
  5167. }
  5168. /**
  5169. * dp_print_host_stats()- Function to print the stats aggregated at host
  5170. * @vdev_handle: DP_VDEV handle
  5171. * @type: host stats type
  5172. *
  5173. * Available Stat types
  5174. * TXRX_CLEAR_STATS : Clear the stats
  5175. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  5176. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  5177. * TXRX_TX_HOST_STATS: Print Tx Stats
  5178. * TXRX_RX_HOST_STATS: Print Rx Stats
  5179. * TXRX_AST_STATS: Print AST Stats
  5180. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  5181. *
  5182. * Return: 0 on success, print error message in case of failure
  5183. */
  5184. static int
  5185. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  5186. {
  5187. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5188. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5189. dp_aggregate_pdev_stats(pdev);
  5190. switch (type) {
  5191. case TXRX_CLEAR_STATS:
  5192. dp_txrx_host_stats_clr(vdev);
  5193. break;
  5194. case TXRX_RX_RATE_STATS:
  5195. dp_print_rx_rates(vdev);
  5196. break;
  5197. case TXRX_TX_RATE_STATS:
  5198. dp_print_tx_rates(vdev);
  5199. break;
  5200. case TXRX_TX_HOST_STATS:
  5201. dp_print_pdev_tx_stats(pdev);
  5202. dp_print_soc_tx_stats(pdev->soc);
  5203. break;
  5204. case TXRX_RX_HOST_STATS:
  5205. dp_print_pdev_rx_stats(pdev);
  5206. dp_print_soc_rx_stats(pdev->soc);
  5207. break;
  5208. case TXRX_AST_STATS:
  5209. dp_print_ast_stats(pdev->soc);
  5210. dp_print_peer_table(vdev);
  5211. break;
  5212. case TXRX_SRNG_PTR_STATS:
  5213. dp_print_ring_stats(pdev);
  5214. break;
  5215. case TXRX_RX_MON_STATS:
  5216. dp_print_pdev_rx_mon_stats(pdev);
  5217. break;
  5218. default:
  5219. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  5220. break;
  5221. }
  5222. return 0;
  5223. }
  5224. /*
  5225. * dp_get_host_peer_stats()- function to print peer stats
  5226. * @pdev_handle: DP_PDEV handle
  5227. * @mac_addr: mac address of the peer
  5228. *
  5229. * Return: void
  5230. */
  5231. static void
  5232. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  5233. {
  5234. struct dp_peer *peer;
  5235. uint8_t local_id;
  5236. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  5237. &local_id);
  5238. if (!peer) {
  5239. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5240. "%s: Invalid peer\n", __func__);
  5241. return;
  5242. }
  5243. dp_print_peer_stats(peer);
  5244. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  5245. return;
  5246. }
  5247. /*
  5248. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  5249. * @pdev: DP_PDEV handle
  5250. *
  5251. * Return: void
  5252. */
  5253. static void
  5254. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  5255. {
  5256. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5257. int mac_id;
  5258. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  5259. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5260. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5261. pdev->pdev_id);
  5262. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5263. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5264. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5265. }
  5266. }
  5267. /*
  5268. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  5269. * @pdev: DP_PDEV handle
  5270. *
  5271. * Return: void
  5272. */
  5273. static void
  5274. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  5275. {
  5276. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5277. int mac_id;
  5278. htt_tlv_filter.mpdu_start = 1;
  5279. htt_tlv_filter.msdu_start = 0;
  5280. htt_tlv_filter.packet = 0;
  5281. htt_tlv_filter.msdu_end = 0;
  5282. htt_tlv_filter.mpdu_end = 0;
  5283. htt_tlv_filter.attention = 0;
  5284. htt_tlv_filter.ppdu_start = 1;
  5285. htt_tlv_filter.ppdu_end = 1;
  5286. htt_tlv_filter.ppdu_end_user_stats = 1;
  5287. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5288. htt_tlv_filter.ppdu_end_status_done = 1;
  5289. htt_tlv_filter.enable_fp = 1;
  5290. htt_tlv_filter.enable_md = 0;
  5291. if (pdev->mcopy_mode) {
  5292. htt_tlv_filter.packet_header = 1;
  5293. htt_tlv_filter.enable_mo = 1;
  5294. }
  5295. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5296. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5297. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5298. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5299. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5300. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5301. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5302. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5303. pdev->pdev_id);
  5304. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5305. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5306. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5307. }
  5308. }
  5309. /*
  5310. *dp_set_bpr_enable() - API to enable/disable bpr feature
  5311. *@pdev_handle: DP_PDEV handle.
  5312. *@val: Provided value.
  5313. *
  5314. *Return: void
  5315. */
  5316. static void
  5317. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  5318. {
  5319. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5320. switch (val) {
  5321. case CDP_BPR_DISABLE:
  5322. pdev->bpr_enable = CDP_BPR_DISABLE;
  5323. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  5324. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  5325. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5326. } else if (pdev->enhanced_stats_en &&
  5327. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5328. !pdev->pktlog_ppdu_stats) {
  5329. dp_h2t_cfg_stats_msg_send(pdev,
  5330. DP_PPDU_STATS_CFG_ENH_STATS,
  5331. pdev->pdev_id);
  5332. }
  5333. break;
  5334. case CDP_BPR_ENABLE:
  5335. pdev->bpr_enable = CDP_BPR_ENABLE;
  5336. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  5337. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  5338. dp_h2t_cfg_stats_msg_send(pdev,
  5339. DP_PPDU_STATS_CFG_BPR,
  5340. pdev->pdev_id);
  5341. } else if (pdev->enhanced_stats_en &&
  5342. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5343. !pdev->pktlog_ppdu_stats) {
  5344. dp_h2t_cfg_stats_msg_send(pdev,
  5345. DP_PPDU_STATS_CFG_BPR_ENH,
  5346. pdev->pdev_id);
  5347. } else if (pdev->pktlog_ppdu_stats) {
  5348. dp_h2t_cfg_stats_msg_send(pdev,
  5349. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  5350. pdev->pdev_id);
  5351. }
  5352. break;
  5353. default:
  5354. break;
  5355. }
  5356. }
  5357. /*
  5358. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  5359. * @pdev_handle: DP_PDEV handle
  5360. * @val: user provided value
  5361. *
  5362. * Return: void
  5363. */
  5364. static void
  5365. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  5366. {
  5367. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5368. switch (val) {
  5369. case 0:
  5370. pdev->tx_sniffer_enable = 0;
  5371. pdev->mcopy_mode = 0;
  5372. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en) {
  5373. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5374. dp_ppdu_ring_reset(pdev);
  5375. } else if (pdev->enhanced_stats_en) {
  5376. dp_h2t_cfg_stats_msg_send(pdev,
  5377. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5378. }
  5379. break;
  5380. case 1:
  5381. pdev->tx_sniffer_enable = 1;
  5382. pdev->mcopy_mode = 0;
  5383. if (!pdev->pktlog_ppdu_stats)
  5384. dp_h2t_cfg_stats_msg_send(pdev,
  5385. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5386. break;
  5387. case 2:
  5388. pdev->mcopy_mode = 1;
  5389. pdev->tx_sniffer_enable = 0;
  5390. if (!pdev->enhanced_stats_en)
  5391. dp_ppdu_ring_cfg(pdev);
  5392. if (!pdev->pktlog_ppdu_stats)
  5393. dp_h2t_cfg_stats_msg_send(pdev,
  5394. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5395. break;
  5396. default:
  5397. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5398. "Invalid value\n");
  5399. break;
  5400. }
  5401. }
  5402. /*
  5403. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  5404. * @pdev_handle: DP_PDEV handle
  5405. *
  5406. * Return: void
  5407. */
  5408. static void
  5409. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5410. {
  5411. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5412. pdev->enhanced_stats_en = 1;
  5413. if (!pdev->mcopy_mode)
  5414. dp_ppdu_ring_cfg(pdev);
  5415. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5416. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5417. }
  5418. /*
  5419. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  5420. * @pdev_handle: DP_PDEV handle
  5421. *
  5422. * Return: void
  5423. */
  5424. static void
  5425. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5426. {
  5427. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5428. pdev->enhanced_stats_en = 0;
  5429. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5430. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5431. if (!pdev->mcopy_mode)
  5432. dp_ppdu_ring_reset(pdev);
  5433. }
  5434. /*
  5435. * dp_get_fw_peer_stats()- function to print peer stats
  5436. * @pdev_handle: DP_PDEV handle
  5437. * @mac_addr: mac address of the peer
  5438. * @cap: Type of htt stats requested
  5439. *
  5440. * Currently Supporting only MAC ID based requests Only
  5441. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  5442. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  5443. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  5444. *
  5445. * Return: void
  5446. */
  5447. static void
  5448. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  5449. uint32_t cap)
  5450. {
  5451. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5452. int i;
  5453. uint32_t config_param0 = 0;
  5454. uint32_t config_param1 = 0;
  5455. uint32_t config_param2 = 0;
  5456. uint32_t config_param3 = 0;
  5457. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  5458. config_param0 |= (1 << (cap + 1));
  5459. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  5460. config_param1 |= (1 << i);
  5461. }
  5462. config_param2 |= (mac_addr[0] & 0x000000ff);
  5463. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  5464. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  5465. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  5466. config_param3 |= (mac_addr[4] & 0x000000ff);
  5467. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  5468. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  5469. config_param0, config_param1, config_param2,
  5470. config_param3, 0, 0, 0);
  5471. }
  5472. /* This struct definition will be removed from here
  5473. * once it get added in FW headers*/
  5474. struct httstats_cmd_req {
  5475. uint32_t config_param0;
  5476. uint32_t config_param1;
  5477. uint32_t config_param2;
  5478. uint32_t config_param3;
  5479. int cookie;
  5480. u_int8_t stats_id;
  5481. };
  5482. /*
  5483. * dp_get_htt_stats: function to process the httstas request
  5484. * @pdev_handle: DP pdev handle
  5485. * @data: pointer to request data
  5486. * @data_len: length for request data
  5487. *
  5488. * return: void
  5489. */
  5490. static void
  5491. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  5492. {
  5493. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5494. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  5495. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  5496. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  5497. req->config_param0, req->config_param1,
  5498. req->config_param2, req->config_param3,
  5499. req->cookie, 0, 0);
  5500. }
  5501. /*
  5502. * dp_set_pdev_param: function to set parameters in pdev
  5503. * @pdev_handle: DP pdev handle
  5504. * @param: parameter type to be set
  5505. * @val: value of parameter to be set
  5506. *
  5507. * return: void
  5508. */
  5509. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5510. enum cdp_pdev_param_type param, uint8_t val)
  5511. {
  5512. switch (param) {
  5513. case CDP_CONFIG_DEBUG_SNIFFER:
  5514. dp_config_debug_sniffer(pdev_handle, val);
  5515. break;
  5516. case CDP_CONFIG_BPR_ENABLE:
  5517. dp_set_bpr_enable(pdev_handle, val);
  5518. break;
  5519. default:
  5520. break;
  5521. }
  5522. }
  5523. /*
  5524. * dp_set_vdev_param: function to set parameters in vdev
  5525. * @param: parameter type to be set
  5526. * @val: value of parameter to be set
  5527. *
  5528. * return: void
  5529. */
  5530. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  5531. enum cdp_vdev_param_type param, uint32_t val)
  5532. {
  5533. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5534. switch (param) {
  5535. case CDP_ENABLE_WDS:
  5536. vdev->wds_enabled = val;
  5537. break;
  5538. case CDP_ENABLE_NAWDS:
  5539. vdev->nawds_enabled = val;
  5540. break;
  5541. case CDP_ENABLE_MCAST_EN:
  5542. vdev->mcast_enhancement_en = val;
  5543. break;
  5544. case CDP_ENABLE_PROXYSTA:
  5545. vdev->proxysta_vdev = val;
  5546. break;
  5547. case CDP_UPDATE_TDLS_FLAGS:
  5548. vdev->tdls_link_connected = val;
  5549. break;
  5550. case CDP_CFG_WDS_AGING_TIMER:
  5551. if (val == 0)
  5552. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  5553. else if (val != vdev->wds_aging_timer_val)
  5554. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  5555. vdev->wds_aging_timer_val = val;
  5556. break;
  5557. case CDP_ENABLE_AP_BRIDGE:
  5558. if (wlan_op_mode_sta != vdev->opmode)
  5559. vdev->ap_bridge_enabled = val;
  5560. else
  5561. vdev->ap_bridge_enabled = false;
  5562. break;
  5563. case CDP_ENABLE_CIPHER:
  5564. vdev->sec_type = val;
  5565. break;
  5566. case CDP_ENABLE_QWRAP_ISOLATION:
  5567. vdev->isolation_vdev = val;
  5568. break;
  5569. default:
  5570. break;
  5571. }
  5572. dp_tx_vdev_update_search_flags(vdev);
  5573. }
  5574. /**
  5575. * dp_peer_set_nawds: set nawds bit in peer
  5576. * @peer_handle: pointer to peer
  5577. * @value: enable/disable nawds
  5578. *
  5579. * return: void
  5580. */
  5581. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  5582. {
  5583. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5584. peer->nawds_enabled = value;
  5585. }
  5586. /*
  5587. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  5588. * @vdev_handle: DP_VDEV handle
  5589. * @map_id:ID of map that needs to be updated
  5590. *
  5591. * Return: void
  5592. */
  5593. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  5594. uint8_t map_id)
  5595. {
  5596. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5597. vdev->dscp_tid_map_id = map_id;
  5598. return;
  5599. }
  5600. /*
  5601. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  5602. * @pdev_handle: DP_PDEV handle
  5603. * @buf: to hold pdev_stats
  5604. *
  5605. * Return: int
  5606. */
  5607. static int
  5608. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  5609. {
  5610. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5611. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  5612. struct cdp_txrx_stats_req req = {0,};
  5613. dp_aggregate_pdev_stats(pdev);
  5614. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  5615. req.cookie_val = 1;
  5616. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5617. req.param1, req.param2, req.param3, 0,
  5618. req.cookie_val, 0);
  5619. msleep(DP_MAX_SLEEP_TIME);
  5620. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  5621. req.cookie_val = 1;
  5622. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5623. req.param1, req.param2, req.param3, 0,
  5624. req.cookie_val, 0);
  5625. msleep(DP_MAX_SLEEP_TIME);
  5626. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  5627. return TXRX_STATS_LEVEL;
  5628. }
  5629. /**
  5630. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  5631. * @pdev: DP_PDEV handle
  5632. * @map_id: ID of map that needs to be updated
  5633. * @tos: index value in map
  5634. * @tid: tid value passed by the user
  5635. *
  5636. * Return: void
  5637. */
  5638. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  5639. uint8_t map_id, uint8_t tos, uint8_t tid)
  5640. {
  5641. uint8_t dscp;
  5642. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  5643. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  5644. pdev->dscp_tid_map[map_id][dscp] = tid;
  5645. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  5646. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  5647. map_id, dscp);
  5648. return;
  5649. }
  5650. /**
  5651. * dp_fw_stats_process(): Process TxRX FW stats request
  5652. * @vdev_handle: DP VDEV handle
  5653. * @req: stats request
  5654. *
  5655. * return: int
  5656. */
  5657. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  5658. struct cdp_txrx_stats_req *req)
  5659. {
  5660. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5661. struct dp_pdev *pdev = NULL;
  5662. uint32_t stats = req->stats;
  5663. uint8_t mac_id = req->mac_id;
  5664. if (!vdev) {
  5665. DP_TRACE(NONE, "VDEV not found");
  5666. return 1;
  5667. }
  5668. pdev = vdev->pdev;
  5669. /*
  5670. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  5671. * from param0 to param3 according to below rule:
  5672. *
  5673. * PARAM:
  5674. * - config_param0 : start_offset (stats type)
  5675. * - config_param1 : stats bmask from start offset
  5676. * - config_param2 : stats bmask from start offset + 32
  5677. * - config_param3 : stats bmask from start offset + 64
  5678. */
  5679. if (req->stats == CDP_TXRX_STATS_0) {
  5680. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  5681. req->param1 = 0xFFFFFFFF;
  5682. req->param2 = 0xFFFFFFFF;
  5683. req->param3 = 0xFFFFFFFF;
  5684. }
  5685. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  5686. req->param1, req->param2, req->param3,
  5687. 0, 0, mac_id);
  5688. }
  5689. /**
  5690. * dp_txrx_stats_request - function to map to firmware and host stats
  5691. * @vdev: virtual handle
  5692. * @req: stats request
  5693. *
  5694. * Return: integer
  5695. */
  5696. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  5697. struct cdp_txrx_stats_req *req)
  5698. {
  5699. int host_stats;
  5700. int fw_stats;
  5701. enum cdp_stats stats;
  5702. if (!vdev || !req) {
  5703. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5704. "Invalid vdev/req instance");
  5705. return 0;
  5706. }
  5707. stats = req->stats;
  5708. if (stats >= CDP_TXRX_MAX_STATS)
  5709. return 0;
  5710. /*
  5711. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  5712. * has to be updated if new FW HTT stats added
  5713. */
  5714. if (stats > CDP_TXRX_STATS_HTT_MAX)
  5715. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  5716. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  5717. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  5718. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5719. "stats: %u fw_stats_type: %d host_stats_type: %d",
  5720. stats, fw_stats, host_stats);
  5721. if (fw_stats != TXRX_FW_STATS_INVALID) {
  5722. /* update request with FW stats type */
  5723. req->stats = fw_stats;
  5724. return dp_fw_stats_process(vdev, req);
  5725. }
  5726. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  5727. (host_stats <= TXRX_HOST_STATS_MAX))
  5728. return dp_print_host_stats(vdev, host_stats);
  5729. else
  5730. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5731. "Wrong Input for TxRx Stats");
  5732. return 0;
  5733. }
  5734. /*
  5735. * dp_print_napi_stats(): NAPI stats
  5736. * @soc - soc handle
  5737. */
  5738. static void dp_print_napi_stats(struct dp_soc *soc)
  5739. {
  5740. hif_print_napi_stats(soc->hif_handle);
  5741. }
  5742. /*
  5743. * dp_print_per_ring_stats(): Packet count per ring
  5744. * @soc - soc handle
  5745. */
  5746. static void dp_print_per_ring_stats(struct dp_soc *soc)
  5747. {
  5748. uint8_t ring;
  5749. uint16_t core;
  5750. uint64_t total_packets;
  5751. DP_TRACE(FATAL, "Reo packets per ring:");
  5752. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  5753. total_packets = 0;
  5754. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  5755. for (core = 0; core < NR_CPUS; core++) {
  5756. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  5757. core, soc->stats.rx.ring_packets[core][ring]);
  5758. total_packets += soc->stats.rx.ring_packets[core][ring];
  5759. }
  5760. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  5761. ring, total_packets);
  5762. }
  5763. }
  5764. /*
  5765. * dp_txrx_path_stats() - Function to display dump stats
  5766. * @soc - soc handle
  5767. *
  5768. * return: none
  5769. */
  5770. static void dp_txrx_path_stats(struct dp_soc *soc)
  5771. {
  5772. uint8_t error_code;
  5773. uint8_t loop_pdev;
  5774. struct dp_pdev *pdev;
  5775. uint8_t i;
  5776. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  5777. pdev = soc->pdev_list[loop_pdev];
  5778. dp_aggregate_pdev_stats(pdev);
  5779. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5780. "Tx path Statistics:");
  5781. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  5782. pdev->stats.tx_i.rcvd.num,
  5783. pdev->stats.tx_i.rcvd.bytes);
  5784. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  5785. pdev->stats.tx_i.processed.num,
  5786. pdev->stats.tx_i.processed.bytes);
  5787. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  5788. pdev->stats.tx.tx_success.num,
  5789. pdev->stats.tx.tx_success.bytes);
  5790. DP_TRACE(FATAL, "Dropped in host:");
  5791. DP_TRACE(FATAL, "Total packets dropped: %u,",
  5792. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5793. DP_TRACE(FATAL, "Descriptor not available: %u",
  5794. pdev->stats.tx_i.dropped.desc_na);
  5795. DP_TRACE(FATAL, "Ring full: %u",
  5796. pdev->stats.tx_i.dropped.ring_full);
  5797. DP_TRACE(FATAL, "Enqueue fail: %u",
  5798. pdev->stats.tx_i.dropped.enqueue_fail);
  5799. DP_TRACE(FATAL, "DMA Error: %u",
  5800. pdev->stats.tx_i.dropped.dma_error);
  5801. DP_TRACE(FATAL, "Dropped in hardware:");
  5802. DP_TRACE(FATAL, "total packets dropped: %u",
  5803. pdev->stats.tx.tx_failed);
  5804. DP_TRACE(FATAL, "mpdu age out: %u",
  5805. pdev->stats.tx.dropped.age_out);
  5806. DP_TRACE(FATAL, "firmware removed: %u",
  5807. pdev->stats.tx.dropped.fw_rem);
  5808. DP_TRACE(FATAL, "firmware removed tx: %u",
  5809. pdev->stats.tx.dropped.fw_rem_tx);
  5810. DP_TRACE(FATAL, "firmware removed notx %u",
  5811. pdev->stats.tx.dropped.fw_rem_notx);
  5812. DP_TRACE(FATAL, "peer_invalid: %u",
  5813. pdev->soc->stats.tx.tx_invalid_peer.num);
  5814. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5815. DP_TRACE(FATAL, "Single Packet: %u",
  5816. pdev->stats.tx_comp_histogram.pkts_1);
  5817. DP_TRACE(FATAL, "2-20 Packets: %u",
  5818. pdev->stats.tx_comp_histogram.pkts_2_20);
  5819. DP_TRACE(FATAL, "21-40 Packets: %u",
  5820. pdev->stats.tx_comp_histogram.pkts_21_40);
  5821. DP_TRACE(FATAL, "41-60 Packets: %u",
  5822. pdev->stats.tx_comp_histogram.pkts_41_60);
  5823. DP_TRACE(FATAL, "61-80 Packets: %u",
  5824. pdev->stats.tx_comp_histogram.pkts_61_80);
  5825. DP_TRACE(FATAL, "81-100 Packets: %u",
  5826. pdev->stats.tx_comp_histogram.pkts_81_100);
  5827. DP_TRACE(FATAL, "101-200 Packets: %u",
  5828. pdev->stats.tx_comp_histogram.pkts_101_200);
  5829. DP_TRACE(FATAL, " 201+ Packets: %u",
  5830. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5831. DP_TRACE(FATAL, "Rx path statistics");
  5832. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5833. pdev->stats.rx.to_stack.num,
  5834. pdev->stats.rx.to_stack.bytes);
  5835. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5836. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5837. i, pdev->stats.rx.rcvd_reo[i].num,
  5838. pdev->stats.rx.rcvd_reo[i].bytes);
  5839. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5840. pdev->stats.rx.intra_bss.pkts.num,
  5841. pdev->stats.rx.intra_bss.pkts.bytes);
  5842. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5843. pdev->stats.rx.intra_bss.fail.num,
  5844. pdev->stats.rx.intra_bss.fail.bytes);
  5845. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5846. pdev->stats.rx.raw.num,
  5847. pdev->stats.rx.raw.bytes);
  5848. DP_TRACE(FATAL, "dropped: error %u msdus",
  5849. pdev->stats.rx.err.mic_err);
  5850. DP_TRACE(FATAL, "peer invalid %u",
  5851. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5852. DP_TRACE(FATAL, "Reo Statistics");
  5853. DP_TRACE(FATAL, "rbm error: %u msdus",
  5854. pdev->soc->stats.rx.err.invalid_rbm);
  5855. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5856. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5857. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5858. error_code++) {
  5859. if (!pdev->soc->stats.rx.err.reo_error[error_code])
  5860. continue;
  5861. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5862. error_code,
  5863. pdev->soc->stats.rx.err.reo_error[error_code]);
  5864. }
  5865. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5866. error_code++) {
  5867. if (!pdev->soc->stats.rx.err.rxdma_error[error_code])
  5868. continue;
  5869. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5870. error_code,
  5871. pdev->soc->stats.rx.err
  5872. .rxdma_error[error_code]);
  5873. }
  5874. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5875. DP_TRACE(FATAL, "Single Packet: %u",
  5876. pdev->stats.rx_ind_histogram.pkts_1);
  5877. DP_TRACE(FATAL, "2-20 Packets: %u",
  5878. pdev->stats.rx_ind_histogram.pkts_2_20);
  5879. DP_TRACE(FATAL, "21-40 Packets: %u",
  5880. pdev->stats.rx_ind_histogram.pkts_21_40);
  5881. DP_TRACE(FATAL, "41-60 Packets: %u",
  5882. pdev->stats.rx_ind_histogram.pkts_41_60);
  5883. DP_TRACE(FATAL, "61-80 Packets: %u",
  5884. pdev->stats.rx_ind_histogram.pkts_61_80);
  5885. DP_TRACE(FATAL, "81-100 Packets: %u",
  5886. pdev->stats.rx_ind_histogram.pkts_81_100);
  5887. DP_TRACE(FATAL, "101-200 Packets: %u",
  5888. pdev->stats.rx_ind_histogram.pkts_101_200);
  5889. DP_TRACE(FATAL, " 201+ Packets: %u",
  5890. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5891. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5892. __func__,
  5893. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5894. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5895. pdev->soc->wlan_cfg_ctx->rx_hash,
  5896. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5897. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5898. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5899. __func__,
  5900. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5901. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5902. #endif
  5903. }
  5904. }
  5905. /*
  5906. * dp_txrx_dump_stats() - Dump statistics
  5907. * @value - Statistics option
  5908. */
  5909. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5910. enum qdf_stats_verbosity_level level)
  5911. {
  5912. struct dp_soc *soc =
  5913. (struct dp_soc *)psoc;
  5914. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5915. if (!soc) {
  5916. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5917. "%s: soc is NULL", __func__);
  5918. return QDF_STATUS_E_INVAL;
  5919. }
  5920. switch (value) {
  5921. case CDP_TXRX_PATH_STATS:
  5922. dp_txrx_path_stats(soc);
  5923. break;
  5924. case CDP_RX_RING_STATS:
  5925. dp_print_per_ring_stats(soc);
  5926. break;
  5927. case CDP_TXRX_TSO_STATS:
  5928. /* TODO: NOT IMPLEMENTED */
  5929. break;
  5930. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5931. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5932. break;
  5933. case CDP_DP_NAPI_STATS:
  5934. dp_print_napi_stats(soc);
  5935. break;
  5936. case CDP_TXRX_DESC_STATS:
  5937. /* TODO: NOT IMPLEMENTED */
  5938. break;
  5939. default:
  5940. status = QDF_STATUS_E_INVAL;
  5941. break;
  5942. }
  5943. return status;
  5944. }
  5945. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5946. /**
  5947. * dp_update_flow_control_parameters() - API to store datapath
  5948. * config parameters
  5949. * @soc: soc handle
  5950. * @cfg: ini parameter handle
  5951. *
  5952. * Return: void
  5953. */
  5954. static inline
  5955. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5956. struct cdp_config_params *params)
  5957. {
  5958. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5959. params->tx_flow_stop_queue_threshold;
  5960. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5961. params->tx_flow_start_queue_offset;
  5962. }
  5963. #else
  5964. static inline
  5965. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5966. struct cdp_config_params *params)
  5967. {
  5968. }
  5969. #endif
  5970. /**
  5971. * dp_update_config_parameters() - API to store datapath
  5972. * config parameters
  5973. * @soc: soc handle
  5974. * @cfg: ini parameter handle
  5975. *
  5976. * Return: status
  5977. */
  5978. static
  5979. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5980. struct cdp_config_params *params)
  5981. {
  5982. struct dp_soc *soc = (struct dp_soc *)psoc;
  5983. if (!(soc)) {
  5984. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5985. "%s: Invalid handle", __func__);
  5986. return QDF_STATUS_E_INVAL;
  5987. }
  5988. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5989. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5990. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5991. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5992. params->tcp_udp_checksumoffload;
  5993. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5994. dp_update_flow_control_parameters(soc, params);
  5995. return QDF_STATUS_SUCCESS;
  5996. }
  5997. /**
  5998. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5999. * config parameters
  6000. * @vdev_handle - datapath vdev handle
  6001. * @cfg: ini parameter handle
  6002. *
  6003. * Return: status
  6004. */
  6005. #ifdef WDS_VENDOR_EXTENSION
  6006. void
  6007. dp_txrx_set_wds_rx_policy(
  6008. struct cdp_vdev *vdev_handle,
  6009. u_int32_t val)
  6010. {
  6011. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6012. struct dp_peer *peer;
  6013. if (vdev->opmode == wlan_op_mode_ap) {
  6014. /* for ap, set it on bss_peer */
  6015. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  6016. if (peer->bss_peer) {
  6017. peer->wds_ecm.wds_rx_filter = 1;
  6018. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  6019. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  6020. break;
  6021. }
  6022. }
  6023. } else if (vdev->opmode == wlan_op_mode_sta) {
  6024. peer = TAILQ_FIRST(&vdev->peer_list);
  6025. peer->wds_ecm.wds_rx_filter = 1;
  6026. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  6027. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  6028. }
  6029. }
  6030. /**
  6031. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  6032. *
  6033. * @peer_handle - datapath peer handle
  6034. * @wds_tx_ucast: policy for unicast transmission
  6035. * @wds_tx_mcast: policy for multicast transmission
  6036. *
  6037. * Return: void
  6038. */
  6039. void
  6040. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  6041. int wds_tx_ucast, int wds_tx_mcast)
  6042. {
  6043. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  6044. if (wds_tx_ucast || wds_tx_mcast) {
  6045. peer->wds_enabled = 1;
  6046. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  6047. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  6048. } else {
  6049. peer->wds_enabled = 0;
  6050. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  6051. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  6052. }
  6053. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  6054. FL("Policy Update set to :\
  6055. peer->wds_enabled %d\
  6056. peer->wds_ecm.wds_tx_ucast_4addr %d\
  6057. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  6058. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  6059. peer->wds_ecm.wds_tx_mcast_4addr);
  6060. return;
  6061. }
  6062. #endif
  6063. static struct cdp_wds_ops dp_ops_wds = {
  6064. .vdev_set_wds = dp_vdev_set_wds,
  6065. #ifdef WDS_VENDOR_EXTENSION
  6066. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  6067. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  6068. #endif
  6069. };
  6070. /*
  6071. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  6072. * @vdev_handle - datapath vdev handle
  6073. * @callback - callback function
  6074. * @ctxt: callback context
  6075. *
  6076. */
  6077. static void
  6078. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  6079. ol_txrx_data_tx_cb callback, void *ctxt)
  6080. {
  6081. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6082. vdev->tx_non_std_data_callback.func = callback;
  6083. vdev->tx_non_std_data_callback.ctxt = ctxt;
  6084. }
  6085. /**
  6086. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  6087. * @pdev_hdl: datapath pdev handle
  6088. *
  6089. * Return: opaque pointer to dp txrx handle
  6090. */
  6091. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  6092. {
  6093. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6094. return pdev->dp_txrx_handle;
  6095. }
  6096. /**
  6097. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  6098. * @pdev_hdl: datapath pdev handle
  6099. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  6100. *
  6101. * Return: void
  6102. */
  6103. static void
  6104. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  6105. {
  6106. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6107. pdev->dp_txrx_handle = dp_txrx_hdl;
  6108. }
  6109. /**
  6110. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  6111. * @soc_handle: datapath soc handle
  6112. *
  6113. * Return: opaque pointer to external dp (non-core DP)
  6114. */
  6115. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  6116. {
  6117. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6118. return soc->external_txrx_handle;
  6119. }
  6120. /**
  6121. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  6122. * @soc_handle: datapath soc handle
  6123. * @txrx_handle: opaque pointer to external dp (non-core DP)
  6124. *
  6125. * Return: void
  6126. */
  6127. static void
  6128. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  6129. {
  6130. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6131. soc->external_txrx_handle = txrx_handle;
  6132. }
  6133. #ifdef FEATURE_AST
  6134. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  6135. {
  6136. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  6137. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  6138. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6139. /*
  6140. * For BSS peer, new peer is not created on alloc_node if the
  6141. * peer with same address already exists , instead refcnt is
  6142. * increased for existing peer. Correspondingly in delete path,
  6143. * only refcnt is decreased; and peer is only deleted , when all
  6144. * references are deleted. So delete_in_progress should not be set
  6145. * for bss_peer, unless only 2 reference remains (peer map reference
  6146. * and peer hash table reference).
  6147. */
  6148. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  6149. return;
  6150. }
  6151. peer->delete_in_progress = true;
  6152. dp_peer_delete_ast_entries(soc, peer);
  6153. }
  6154. #endif
  6155. #ifdef ATH_SUPPORT_NAC_RSSI
  6156. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  6157. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  6158. uint8_t chan_num)
  6159. {
  6160. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6161. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6162. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6163. pdev->nac_rssi_filtering = 1;
  6164. /* Store address of NAC (neighbour peer) which will be checked
  6165. * against TA of received packets.
  6166. */
  6167. if (cmd == CDP_NAC_PARAM_ADD) {
  6168. qdf_mem_copy(vdev->cdp_nac_rssi.client_mac,
  6169. client_macaddr, DP_MAC_ADDR_LEN);
  6170. vdev->cdp_nac_rssi_enabled = 1;
  6171. } else if (cmd == CDP_NAC_PARAM_DEL) {
  6172. if (!qdf_mem_cmp(vdev->cdp_nac_rssi.client_mac,
  6173. client_macaddr, DP_MAC_ADDR_LEN)) {
  6174. /* delete this peer from the list */
  6175. qdf_mem_zero(vdev->cdp_nac_rssi.client_mac,
  6176. DP_MAC_ADDR_LEN);
  6177. }
  6178. vdev->cdp_nac_rssi_enabled = 0;
  6179. }
  6180. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  6181. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  6182. ((void *)vdev->pdev->ctrl_pdev,
  6183. vdev->vdev_id, cmd, bssid);
  6184. return QDF_STATUS_SUCCESS;
  6185. }
  6186. #endif
  6187. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  6188. uint32_t max_peers)
  6189. {
  6190. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  6191. soc->max_peers = max_peers;
  6192. qdf_print ("%s max_peers %u\n", __func__, max_peers);
  6193. if (dp_peer_find_attach(soc))
  6194. return QDF_STATUS_E_FAILURE;
  6195. return QDF_STATUS_SUCCESS;
  6196. }
  6197. /**
  6198. * dp_pdev_set_ctrl_pdev() - set ctrl pdev handle in dp pdev
  6199. * @dp_pdev: dp pdev handle
  6200. * @ctrl_pdev: UMAC ctrl pdev handle
  6201. *
  6202. * Return: void
  6203. */
  6204. static void dp_pdev_set_ctrl_pdev(struct cdp_pdev *dp_pdev,
  6205. struct cdp_ctrl_objmgr_pdev *ctrl_pdev)
  6206. {
  6207. struct dp_pdev *pdev = (struct dp_pdev *)dp_pdev;
  6208. pdev->ctrl_pdev = ctrl_pdev;
  6209. }
  6210. static struct cdp_cmn_ops dp_ops_cmn = {
  6211. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  6212. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  6213. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  6214. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  6215. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  6216. .txrx_peer_create = dp_peer_create_wifi3,
  6217. .txrx_peer_setup = dp_peer_setup_wifi3,
  6218. #ifdef FEATURE_AST
  6219. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  6220. #else
  6221. .txrx_peer_teardown = NULL,
  6222. #endif
  6223. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  6224. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  6225. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  6226. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  6227. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  6228. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  6229. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  6230. .txrx_peer_delete = dp_peer_delete_wifi3,
  6231. .txrx_vdev_register = dp_vdev_register_wifi3,
  6232. .txrx_soc_detach = dp_soc_detach_wifi3,
  6233. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  6234. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  6235. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  6236. .txrx_ath_getstats = dp_get_device_stats,
  6237. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  6238. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  6239. .delba_process = dp_delba_process_wifi3,
  6240. .set_addba_response = dp_set_addba_response,
  6241. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  6242. .flush_cache_rx_queue = NULL,
  6243. /* TODO: get API's for dscp-tid need to be added*/
  6244. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  6245. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  6246. .txrx_stats_request = dp_txrx_stats_request,
  6247. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  6248. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  6249. .txrx_set_nac = dp_set_nac,
  6250. .txrx_get_tx_pending = dp_get_tx_pending,
  6251. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  6252. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  6253. .display_stats = dp_txrx_dump_stats,
  6254. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  6255. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  6256. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  6257. .txrx_intr_detach = dp_soc_interrupt_detach,
  6258. .set_pn_check = dp_set_pn_check_wifi3,
  6259. .update_config_parameters = dp_update_config_parameters,
  6260. /* TODO: Add other functions */
  6261. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  6262. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  6263. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  6264. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  6265. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  6266. .tx_send = dp_tx_send,
  6267. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  6268. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  6269. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  6270. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  6271. .txrx_pdev_set_ctrl_pdev = dp_pdev_set_ctrl_pdev,
  6272. };
  6273. static struct cdp_ctrl_ops dp_ops_ctrl = {
  6274. .txrx_peer_authorize = dp_peer_authorize,
  6275. #ifdef QCA_SUPPORT_SON
  6276. .txrx_set_inact_params = dp_set_inact_params,
  6277. .txrx_start_inact_timer = dp_start_inact_timer,
  6278. .txrx_set_overload = dp_set_overload,
  6279. .txrx_peer_is_inact = dp_peer_is_inact,
  6280. .txrx_mark_peer_inact = dp_mark_peer_inact,
  6281. #endif
  6282. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  6283. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  6284. #ifdef MESH_MODE_SUPPORT
  6285. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  6286. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  6287. #endif
  6288. .txrx_set_vdev_param = dp_set_vdev_param,
  6289. .txrx_peer_set_nawds = dp_peer_set_nawds,
  6290. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  6291. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  6292. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  6293. .txrx_update_filter_neighbour_peers =
  6294. dp_update_filter_neighbour_peers,
  6295. .txrx_get_sec_type = dp_get_sec_type,
  6296. /* TODO: Add other functions */
  6297. .txrx_wdi_event_sub = dp_wdi_event_sub,
  6298. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  6299. #ifdef WDI_EVENT_ENABLE
  6300. .txrx_get_pldev = dp_get_pldev,
  6301. #endif
  6302. .txrx_set_pdev_param = dp_set_pdev_param,
  6303. #ifdef ATH_SUPPORT_NAC_RSSI
  6304. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  6305. #endif
  6306. .set_key = dp_set_michael_key,
  6307. };
  6308. static struct cdp_me_ops dp_ops_me = {
  6309. #ifdef ATH_SUPPORT_IQUE
  6310. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  6311. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  6312. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  6313. #endif
  6314. };
  6315. static struct cdp_mon_ops dp_ops_mon = {
  6316. .txrx_monitor_set_filter_ucast_data = NULL,
  6317. .txrx_monitor_set_filter_mcast_data = NULL,
  6318. .txrx_monitor_set_filter_non_data = NULL,
  6319. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  6320. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  6321. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  6322. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  6323. /* Added support for HK advance filter */
  6324. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  6325. };
  6326. static struct cdp_host_stats_ops dp_ops_host_stats = {
  6327. .txrx_per_peer_stats = dp_get_host_peer_stats,
  6328. .get_fw_peer_stats = dp_get_fw_peer_stats,
  6329. .get_htt_stats = dp_get_htt_stats,
  6330. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  6331. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  6332. .txrx_stats_publish = dp_txrx_stats_publish,
  6333. /* TODO */
  6334. };
  6335. static struct cdp_raw_ops dp_ops_raw = {
  6336. /* TODO */
  6337. };
  6338. #ifdef CONFIG_WIN
  6339. static struct cdp_pflow_ops dp_ops_pflow = {
  6340. /* TODO */
  6341. };
  6342. #endif /* CONFIG_WIN */
  6343. #ifdef FEATURE_RUNTIME_PM
  6344. /**
  6345. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  6346. * @opaque_pdev: DP pdev context
  6347. *
  6348. * DP is ready to runtime suspend if there are no pending TX packets.
  6349. *
  6350. * Return: QDF_STATUS
  6351. */
  6352. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  6353. {
  6354. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6355. struct dp_soc *soc = pdev->soc;
  6356. /* Call DP TX flow control API to check if there is any
  6357. pending packets */
  6358. if (soc->intr_mode == DP_INTR_POLL)
  6359. qdf_timer_stop(&soc->int_timer);
  6360. return QDF_STATUS_SUCCESS;
  6361. }
  6362. /**
  6363. * dp_runtime_resume() - ensure DP is ready to runtime resume
  6364. * @opaque_pdev: DP pdev context
  6365. *
  6366. * Resume DP for runtime PM.
  6367. *
  6368. * Return: QDF_STATUS
  6369. */
  6370. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  6371. {
  6372. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6373. struct dp_soc *soc = pdev->soc;
  6374. void *hal_srng;
  6375. int i;
  6376. if (soc->intr_mode == DP_INTR_POLL)
  6377. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6378. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  6379. hal_srng = soc->tcl_data_ring[i].hal_srng;
  6380. if (hal_srng) {
  6381. /* We actually only need to acquire the lock */
  6382. hal_srng_access_start(soc->hal_soc, hal_srng);
  6383. /* Update SRC ring head pointer for HW to send
  6384. all pending packets */
  6385. hal_srng_access_end(soc->hal_soc, hal_srng);
  6386. }
  6387. }
  6388. return QDF_STATUS_SUCCESS;
  6389. }
  6390. #endif /* FEATURE_RUNTIME_PM */
  6391. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  6392. {
  6393. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6394. struct dp_soc *soc = pdev->soc;
  6395. if (soc->intr_mode == DP_INTR_POLL)
  6396. qdf_timer_stop(&soc->int_timer);
  6397. return QDF_STATUS_SUCCESS;
  6398. }
  6399. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  6400. {
  6401. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6402. struct dp_soc *soc = pdev->soc;
  6403. if (soc->intr_mode == DP_INTR_POLL)
  6404. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6405. return QDF_STATUS_SUCCESS;
  6406. }
  6407. #ifndef CONFIG_WIN
  6408. static struct cdp_misc_ops dp_ops_misc = {
  6409. .tx_non_std = dp_tx_non_std,
  6410. .get_opmode = dp_get_opmode,
  6411. #ifdef FEATURE_RUNTIME_PM
  6412. .runtime_suspend = dp_runtime_suspend,
  6413. .runtime_resume = dp_runtime_resume,
  6414. #endif /* FEATURE_RUNTIME_PM */
  6415. .pkt_log_init = dp_pkt_log_init,
  6416. .pkt_log_con_service = dp_pkt_log_con_service,
  6417. };
  6418. static struct cdp_flowctl_ops dp_ops_flowctl = {
  6419. /* WIFI 3.0 DP implement as required. */
  6420. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6421. .flow_pool_map_handler = dp_tx_flow_pool_map,
  6422. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  6423. .register_pause_cb = dp_txrx_register_pause_cb,
  6424. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  6425. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  6426. };
  6427. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  6428. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6429. };
  6430. #ifdef IPA_OFFLOAD
  6431. static struct cdp_ipa_ops dp_ops_ipa = {
  6432. .ipa_get_resource = dp_ipa_get_resource,
  6433. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  6434. .ipa_op_response = dp_ipa_op_response,
  6435. .ipa_register_op_cb = dp_ipa_register_op_cb,
  6436. .ipa_get_stat = dp_ipa_get_stat,
  6437. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  6438. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  6439. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  6440. .ipa_setup = dp_ipa_setup,
  6441. .ipa_cleanup = dp_ipa_cleanup,
  6442. .ipa_setup_iface = dp_ipa_setup_iface,
  6443. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  6444. .ipa_enable_pipes = dp_ipa_enable_pipes,
  6445. .ipa_disable_pipes = dp_ipa_disable_pipes,
  6446. .ipa_set_perf_level = dp_ipa_set_perf_level
  6447. };
  6448. #endif
  6449. static struct cdp_bus_ops dp_ops_bus = {
  6450. .bus_suspend = dp_bus_suspend,
  6451. .bus_resume = dp_bus_resume
  6452. };
  6453. static struct cdp_ocb_ops dp_ops_ocb = {
  6454. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6455. };
  6456. static struct cdp_throttle_ops dp_ops_throttle = {
  6457. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6458. };
  6459. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  6460. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6461. };
  6462. static struct cdp_cfg_ops dp_ops_cfg = {
  6463. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6464. };
  6465. /*
  6466. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  6467. * @dev: physical device instance
  6468. * @peer_mac_addr: peer mac address
  6469. * @local_id: local id for the peer
  6470. * @debug_id: to track enum peer access
  6471. * Return: peer instance pointer
  6472. */
  6473. static inline void *
  6474. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  6475. u8 *local_id,
  6476. enum peer_debug_id_type debug_id)
  6477. {
  6478. /*
  6479. * Currently this function does not implement the "get ref"
  6480. * functionality and is mapped to dp_find_peer_by_addr which does not
  6481. * increment the peer ref count. So the peer state is uncertain after
  6482. * calling this API. The functionality needs to be implemented.
  6483. * Accordingly the corresponding release_ref function is NULL.
  6484. */
  6485. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  6486. }
  6487. static struct cdp_peer_ops dp_ops_peer = {
  6488. .register_peer = dp_register_peer,
  6489. .clear_peer = dp_clear_peer,
  6490. .find_peer_by_addr = dp_find_peer_by_addr,
  6491. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  6492. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  6493. .peer_release_ref = NULL,
  6494. .local_peer_id = dp_local_peer_id,
  6495. .peer_find_by_local_id = dp_peer_find_by_local_id,
  6496. .peer_state_update = dp_peer_state_update,
  6497. .get_vdevid = dp_get_vdevid,
  6498. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  6499. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  6500. .get_vdev_for_peer = dp_get_vdev_for_peer,
  6501. .get_peer_state = dp_get_peer_state,
  6502. .get_last_mgmt_timestamp = dp_get_last_mgmt_timestamp,
  6503. .update_last_mgmt_timestamp = dp_update_last_mgmt_timestamp,
  6504. };
  6505. #endif
  6506. static struct cdp_ops dp_txrx_ops = {
  6507. .cmn_drv_ops = &dp_ops_cmn,
  6508. .ctrl_ops = &dp_ops_ctrl,
  6509. .me_ops = &dp_ops_me,
  6510. .mon_ops = &dp_ops_mon,
  6511. .host_stats_ops = &dp_ops_host_stats,
  6512. .wds_ops = &dp_ops_wds,
  6513. .raw_ops = &dp_ops_raw,
  6514. #ifdef CONFIG_WIN
  6515. .pflow_ops = &dp_ops_pflow,
  6516. #endif /* CONFIG_WIN */
  6517. #ifndef CONFIG_WIN
  6518. .misc_ops = &dp_ops_misc,
  6519. .cfg_ops = &dp_ops_cfg,
  6520. .flowctl_ops = &dp_ops_flowctl,
  6521. .l_flowctl_ops = &dp_ops_l_flowctl,
  6522. #ifdef IPA_OFFLOAD
  6523. .ipa_ops = &dp_ops_ipa,
  6524. #endif
  6525. .bus_ops = &dp_ops_bus,
  6526. .ocb_ops = &dp_ops_ocb,
  6527. .peer_ops = &dp_ops_peer,
  6528. .throttle_ops = &dp_ops_throttle,
  6529. .mob_stats_ops = &dp_ops_mob_stats,
  6530. #endif
  6531. };
  6532. /*
  6533. * dp_soc_set_txrx_ring_map()
  6534. * @dp_soc: DP handler for soc
  6535. *
  6536. * Return: Void
  6537. */
  6538. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  6539. {
  6540. uint32_t i;
  6541. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  6542. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  6543. }
  6544. }
  6545. /*
  6546. * dp_soc_attach_wifi3() - Attach txrx SOC
  6547. * @ctrl_psoc: Opaque SOC handle from control plane
  6548. * @htc_handle: Opaque HTC handle
  6549. * @hif_handle: Opaque HIF handle
  6550. * @qdf_osdev: QDF device
  6551. *
  6552. * Return: DP SOC handle on success, NULL on failure
  6553. */
  6554. /*
  6555. * Local prototype added to temporarily address warning caused by
  6556. * -Wmissing-prototypes. A more correct solution, namely to expose
  6557. * a prototype in an appropriate header file, will come later.
  6558. */
  6559. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6560. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6561. struct ol_if_ops *ol_ops);
  6562. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6563. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6564. struct ol_if_ops *ol_ops)
  6565. {
  6566. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  6567. int target_type;
  6568. if (!soc) {
  6569. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6570. FL("DP SOC memory allocation failed"));
  6571. goto fail0;
  6572. }
  6573. soc->cdp_soc.ops = &dp_txrx_ops;
  6574. soc->cdp_soc.ol_ops = ol_ops;
  6575. soc->ctrl_psoc = ctrl_psoc;
  6576. soc->osdev = qdf_osdev;
  6577. soc->hif_handle = hif_handle;
  6578. soc->hal_soc = hif_get_hal_handle(hif_handle);
  6579. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  6580. soc->hal_soc, qdf_osdev);
  6581. if (!soc->htt_handle) {
  6582. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6583. FL("HTT attach failed"));
  6584. goto fail1;
  6585. }
  6586. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  6587. if (!soc->wlan_cfg_ctx) {
  6588. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6589. FL("wlan_cfg_soc_attach failed"));
  6590. goto fail2;
  6591. }
  6592. target_type = hal_get_target_type(soc->hal_soc);
  6593. switch (target_type) {
  6594. case TARGET_TYPE_QCA6290:
  6595. case TARGET_TYPE_QCA6390:
  6596. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  6597. REO_DST_RING_SIZE_QCA6290);
  6598. break;
  6599. case TARGET_TYPE_QCA8074:
  6600. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  6601. REO_DST_RING_SIZE_QCA8074);
  6602. break;
  6603. default:
  6604. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  6605. qdf_assert_always(0);
  6606. break;
  6607. }
  6608. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  6609. soc->cce_disable = false;
  6610. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  6611. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6612. CDP_CFG_MAX_PEER_ID);
  6613. if (ret != -EINVAL) {
  6614. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  6615. }
  6616. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6617. CDP_CFG_CCE_DISABLE);
  6618. if (ret == 1)
  6619. soc->cce_disable = true;
  6620. }
  6621. qdf_spinlock_create(&soc->peer_ref_mutex);
  6622. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  6623. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  6624. /* fill the tx/rx cpu ring map*/
  6625. dp_soc_set_txrx_ring_map(soc);
  6626. qdf_spinlock_create(&soc->htt_stats.lock);
  6627. /* initialize work queue for stats processing */
  6628. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  6629. /*Initialize inactivity timer for wifison */
  6630. dp_init_inact_timer(soc);
  6631. return (void *)soc;
  6632. fail2:
  6633. htt_soc_detach(soc->htt_handle);
  6634. fail1:
  6635. qdf_mem_free(soc);
  6636. fail0:
  6637. return NULL;
  6638. }
  6639. /*
  6640. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  6641. *
  6642. * @soc: handle to DP soc
  6643. * @mac_id: MAC id
  6644. *
  6645. * Return: Return pdev corresponding to MAC
  6646. */
  6647. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  6648. {
  6649. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  6650. return soc->pdev_list[mac_id];
  6651. /* Typically for MCL as there only 1 PDEV*/
  6652. return soc->pdev_list[0];
  6653. }
  6654. /*
  6655. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  6656. * @soc: DP SoC context
  6657. * @max_mac_rings: No of MAC rings
  6658. *
  6659. * Return: None
  6660. */
  6661. static
  6662. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  6663. int *max_mac_rings)
  6664. {
  6665. bool dbs_enable = false;
  6666. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  6667. dbs_enable = soc->cdp_soc.ol_ops->
  6668. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  6669. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  6670. }
  6671. /*
  6672. * dp_set_pktlog_wifi3() - attach txrx vdev
  6673. * @pdev: Datapath PDEV handle
  6674. * @event: which event's notifications are being subscribed to
  6675. * @enable: WDI event subscribe or not. (True or False)
  6676. *
  6677. * Return: Success, NULL on failure
  6678. */
  6679. #ifdef WDI_EVENT_ENABLE
  6680. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  6681. bool enable)
  6682. {
  6683. struct dp_soc *soc = pdev->soc;
  6684. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6685. int max_mac_rings = wlan_cfg_get_num_mac_rings
  6686. (pdev->wlan_cfg_ctx);
  6687. uint8_t mac_id = 0;
  6688. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  6689. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  6690. FL("Max_mac_rings %d \n"),
  6691. max_mac_rings);
  6692. if (enable) {
  6693. switch (event) {
  6694. case WDI_EVENT_RX_DESC:
  6695. if (pdev->monitor_vdev) {
  6696. /* Nothing needs to be done if monitor mode is
  6697. * enabled
  6698. */
  6699. return 0;
  6700. }
  6701. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  6702. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  6703. htt_tlv_filter.mpdu_start = 1;
  6704. htt_tlv_filter.msdu_start = 1;
  6705. htt_tlv_filter.msdu_end = 1;
  6706. htt_tlv_filter.mpdu_end = 1;
  6707. htt_tlv_filter.packet_header = 1;
  6708. htt_tlv_filter.attention = 1;
  6709. htt_tlv_filter.ppdu_start = 1;
  6710. htt_tlv_filter.ppdu_end = 1;
  6711. htt_tlv_filter.ppdu_end_user_stats = 1;
  6712. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6713. htt_tlv_filter.ppdu_end_status_done = 1;
  6714. htt_tlv_filter.enable_fp = 1;
  6715. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6716. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6717. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6718. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6719. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6720. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6721. for (mac_id = 0; mac_id < max_mac_rings;
  6722. mac_id++) {
  6723. int mac_for_pdev =
  6724. dp_get_mac_id_for_pdev(mac_id,
  6725. pdev->pdev_id);
  6726. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6727. mac_for_pdev,
  6728. pdev->rxdma_mon_status_ring[mac_id]
  6729. .hal_srng,
  6730. RXDMA_MONITOR_STATUS,
  6731. RX_BUFFER_SIZE,
  6732. &htt_tlv_filter);
  6733. }
  6734. if (soc->reap_timer_init)
  6735. qdf_timer_mod(&soc->mon_reap_timer,
  6736. DP_INTR_POLL_TIMER_MS);
  6737. }
  6738. break;
  6739. case WDI_EVENT_LITE_RX:
  6740. if (pdev->monitor_vdev) {
  6741. /* Nothing needs to be done if monitor mode is
  6742. * enabled
  6743. */
  6744. return 0;
  6745. }
  6746. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  6747. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  6748. htt_tlv_filter.ppdu_start = 1;
  6749. htt_tlv_filter.ppdu_end = 1;
  6750. htt_tlv_filter.ppdu_end_user_stats = 1;
  6751. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6752. htt_tlv_filter.ppdu_end_status_done = 1;
  6753. htt_tlv_filter.mpdu_start = 1;
  6754. htt_tlv_filter.enable_fp = 1;
  6755. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6756. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6757. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6758. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6759. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6760. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6761. for (mac_id = 0; mac_id < max_mac_rings;
  6762. mac_id++) {
  6763. int mac_for_pdev =
  6764. dp_get_mac_id_for_pdev(mac_id,
  6765. pdev->pdev_id);
  6766. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6767. mac_for_pdev,
  6768. pdev->rxdma_mon_status_ring[mac_id]
  6769. .hal_srng,
  6770. RXDMA_MONITOR_STATUS,
  6771. RX_BUFFER_SIZE_PKTLOG_LITE,
  6772. &htt_tlv_filter);
  6773. }
  6774. if (soc->reap_timer_init)
  6775. qdf_timer_mod(&soc->mon_reap_timer,
  6776. DP_INTR_POLL_TIMER_MS);
  6777. }
  6778. break;
  6779. case WDI_EVENT_LITE_T2H:
  6780. if (pdev->monitor_vdev) {
  6781. /* Nothing needs to be done if monitor mode is
  6782. * enabled
  6783. */
  6784. return 0;
  6785. }
  6786. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6787. int mac_for_pdev = dp_get_mac_id_for_pdev(
  6788. mac_id, pdev->pdev_id);
  6789. pdev->pktlog_ppdu_stats = true;
  6790. dp_h2t_cfg_stats_msg_send(pdev,
  6791. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  6792. mac_for_pdev);
  6793. }
  6794. break;
  6795. default:
  6796. /* Nothing needs to be done for other pktlog types */
  6797. break;
  6798. }
  6799. } else {
  6800. switch (event) {
  6801. case WDI_EVENT_RX_DESC:
  6802. case WDI_EVENT_LITE_RX:
  6803. if (pdev->monitor_vdev) {
  6804. /* Nothing needs to be done if monitor mode is
  6805. * enabled
  6806. */
  6807. return 0;
  6808. }
  6809. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  6810. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  6811. for (mac_id = 0; mac_id < max_mac_rings;
  6812. mac_id++) {
  6813. int mac_for_pdev =
  6814. dp_get_mac_id_for_pdev(mac_id,
  6815. pdev->pdev_id);
  6816. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6817. mac_for_pdev,
  6818. pdev->rxdma_mon_status_ring[mac_id]
  6819. .hal_srng,
  6820. RXDMA_MONITOR_STATUS,
  6821. RX_BUFFER_SIZE,
  6822. &htt_tlv_filter);
  6823. }
  6824. if (soc->reap_timer_init)
  6825. qdf_timer_stop(&soc->mon_reap_timer);
  6826. }
  6827. break;
  6828. case WDI_EVENT_LITE_T2H:
  6829. if (pdev->monitor_vdev) {
  6830. /* Nothing needs to be done if monitor mode is
  6831. * enabled
  6832. */
  6833. return 0;
  6834. }
  6835. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6836. * passing value 0. Once these macros will define in htt
  6837. * header file will use proper macros
  6838. */
  6839. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6840. int mac_for_pdev =
  6841. dp_get_mac_id_for_pdev(mac_id,
  6842. pdev->pdev_id);
  6843. pdev->pktlog_ppdu_stats = false;
  6844. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6845. dp_h2t_cfg_stats_msg_send(pdev, 0,
  6846. mac_for_pdev);
  6847. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  6848. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  6849. mac_for_pdev);
  6850. } else if (pdev->enhanced_stats_en) {
  6851. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  6852. mac_for_pdev);
  6853. }
  6854. }
  6855. break;
  6856. default:
  6857. /* Nothing needs to be done for other pktlog types */
  6858. break;
  6859. }
  6860. }
  6861. return 0;
  6862. }
  6863. #endif
  6864. #ifdef CONFIG_MCL
  6865. /*
  6866. * dp_service_mon_rings()- timer to reap monitor rings
  6867. * reqd as we are not getting ppdu end interrupts
  6868. * @arg: SoC Handle
  6869. *
  6870. * Return:
  6871. *
  6872. */
  6873. static void dp_service_mon_rings(void *arg)
  6874. {
  6875. struct dp_soc *soc = (struct dp_soc *) arg;
  6876. int ring = 0, work_done, mac_id;
  6877. struct dp_pdev *pdev = NULL;
  6878. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  6879. pdev = soc->pdev_list[ring];
  6880. if (pdev == NULL)
  6881. continue;
  6882. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6883. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6884. pdev->pdev_id);
  6885. work_done = dp_mon_process(soc, mac_for_pdev,
  6886. QCA_NAPI_BUDGET);
  6887. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  6888. FL("Reaped %d descs from Monitor rings"),
  6889. work_done);
  6890. }
  6891. }
  6892. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  6893. }
  6894. #ifndef REMOVE_PKT_LOG
  6895. /**
  6896. * dp_pkt_log_init() - API to initialize packet log
  6897. * @ppdev: physical device handle
  6898. * @scn: HIF context
  6899. *
  6900. * Return: none
  6901. */
  6902. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  6903. {
  6904. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  6905. if (handle->pkt_log_init) {
  6906. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6907. "%s: Packet log not initialized", __func__);
  6908. return;
  6909. }
  6910. pktlog_sethandle(&handle->pl_dev, scn);
  6911. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  6912. if (pktlogmod_init(scn)) {
  6913. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6914. "%s: pktlogmod_init failed", __func__);
  6915. handle->pkt_log_init = false;
  6916. } else {
  6917. handle->pkt_log_init = true;
  6918. }
  6919. }
  6920. /**
  6921. * dp_pkt_log_con_service() - connect packet log service
  6922. * @ppdev: physical device handle
  6923. * @scn: device context
  6924. *
  6925. * Return: none
  6926. */
  6927. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  6928. {
  6929. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  6930. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  6931. pktlog_htc_attach();
  6932. }
  6933. /**
  6934. * dp_pktlogmod_exit() - API to cleanup pktlog info
  6935. * @handle: Pdev handle
  6936. *
  6937. * Return: none
  6938. */
  6939. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  6940. {
  6941. void *scn = (void *)handle->soc->hif_handle;
  6942. if (!scn) {
  6943. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6944. "%s: Invalid hif(scn) handle", __func__);
  6945. return;
  6946. }
  6947. pktlogmod_exit(scn);
  6948. handle->pkt_log_init = false;
  6949. }
  6950. #endif
  6951. #else
  6952. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6953. #endif