cam_cpas_api.h 29 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #ifndef _CAM_CPAS_API_H_
  7. #define _CAM_CPAS_API_H_
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <media/cam_cpas.h>
  11. #include "cam_soc_util.h"
  12. #define CAM_HW_IDENTIFIER_LENGTH 128
  13. /* Default AXI Bandwidth vote */
  14. #define CAM_CPAS_DEFAULT_AXI_BW 1024
  15. /* Default RT AXI Bandwidth vote */
  16. #define CAM_CPAS_DEFAULT_RT_AXI_BW 2000000000L
  17. #define CAM_CPAS_MAX_PATHS_PER_CLIENT 15
  18. #define CAM_CPAS_API_PATH_DATA_STD_START 512
  19. #define CAM_CPAS_VOTE_LEVEL_NONE 0
  20. #define CAM_CPAS_VOTE_LEVEL_MAX 3
  21. /* Qos Selection mask */
  22. #define CAM_CPAS_QOS_DEFAULT_SETTINGS_MASK 0x1
  23. #define CAM_CPAS_QOS_CUSTOM_SETTINGS_MASK 0x2
  24. /**
  25. * enum cam_cpas_regbase_types - Enum for cpas regbase available for clients
  26. * to read/write
  27. */
  28. enum cam_cpas_regbase_types {
  29. CAM_CPAS_REGBASE_CPASTOP,
  30. CAM_CPAS_REGBASE_MAX
  31. };
  32. /**
  33. * enum cam_cpas_vote_type - Enum for cpas vote type
  34. */
  35. enum cam_cpas_vote_type {
  36. CAM_CPAS_VOTE_TYPE_HLOS,
  37. CAM_CPAS_VOTE_TYPE_DRV,
  38. CAM_CPAS_VOTE_TYPE_MAX,
  39. };
  40. /**
  41. * enum cam_cpas_hw_index - Enum for identify HW index
  42. */
  43. enum cam_cpas_hw_index {
  44. CAM_CPAS_HW_IDX_ANY = 0,
  45. CAM_CPAS_HW_IDX_0 = 1<<0,
  46. CAM_CPAS_HW_IDX_1 = 1<<1,
  47. CAM_CPAS_HW_IDX_2 = 1<<2,
  48. CAM_CPAS_HW_IDX_3 = 1<<3,
  49. CAM_CPAS_HW_IDX_4 = 1<<4,
  50. CAM_CPAS_HW_IDX_5 = 1<<5,
  51. CAM_CPAS_HW_IDX_6 = 1<<6,
  52. CAM_CPAS_HW_IDX_7 = 1<<7,
  53. CAM_CPAS_HW_IDX_MAX = 1<<8
  54. };
  55. /**
  56. * enum cam_cpas_camera_version Enum for Titan Camera Versions
  57. */
  58. enum cam_cpas_camera_version {
  59. CAM_CPAS_CAMERA_VERSION_NONE = 0,
  60. CAM_CPAS_CAMERA_VERSION_150 = 0x00010500,
  61. CAM_CPAS_CAMERA_VERSION_170 = 0x00010700,
  62. CAM_CPAS_CAMERA_VERSION_175 = 0x00010705,
  63. CAM_CPAS_CAMERA_VERSION_480 = 0x00040800,
  64. CAM_CPAS_CAMERA_VERSION_520 = 0x00050200,
  65. CAM_CPAS_CAMERA_VERSION_540 = 0x00050400,
  66. CAM_CPAS_CAMERA_VERSION_580 = 0x00050800,
  67. CAM_CPAS_CAMERA_VERSION_545 = 0x00050405,
  68. CAM_CPAS_CAMERA_VERSION_570 = 0x00050700,
  69. CAM_CPAS_CAMERA_VERSION_680 = 0x00060800,
  70. CAM_CPAS_CAMERA_VERSION_165 = 0x00010605,
  71. CAM_CPAS_CAMERA_VERSION_780 = 0x00070800,
  72. CAM_CPAS_CAMERA_VERSION_640 = 0x00060400,
  73. CAM_CPAS_CAMERA_VERSION_880 = 0x00080800,
  74. CAM_CPAS_CAMERA_VERSION_MAX
  75. };
  76. /**
  77. * enum cam_cpas_version Enum for Titan CPAS Versions
  78. */
  79. enum cam_cpas_version {
  80. CAM_CPAS_VERSION_NONE = 0,
  81. CAM_CPAS_VERSION_100 = 0x10000000,
  82. CAM_CPAS_VERSION_101 = 0x10000001,
  83. CAM_CPAS_VERSION_110 = 0x10010000,
  84. CAM_CPAS_VERSION_120 = 0x10020000,
  85. CAM_CPAS_VERSION_130 = 0x10030000,
  86. CAM_CPAS_VERSION_200 = 0x20000000,
  87. CAM_CPAS_VERSION_MAX
  88. };
  89. /**
  90. * enum cam_cpas_camera_version_map_id Enum for camera version map id
  91. * This enum is mapped with cam_cpas_camera_version
  92. */
  93. enum cam_cpas_camera_version_map_id {
  94. CAM_CPAS_CAMERA_VERSION_ID_150 = 0x0,
  95. CAM_CPAS_CAMERA_VERSION_ID_170 = 0x1,
  96. CAM_CPAS_CAMERA_VERSION_ID_175 = 0x2,
  97. CAM_CPAS_CAMERA_VERSION_ID_480 = 0x3,
  98. CAM_CPAS_CAMERA_VERSION_ID_580 = 0x4,
  99. CAM_CPAS_CAMERA_VERSION_ID_520 = 0x5,
  100. CAM_CPAS_CAMERA_VERSION_ID_540 = 0x6,
  101. CAM_CPAS_CAMERA_VERSION_ID_545 = 0x7,
  102. CAM_CPAS_CAMERA_VERSION_ID_570 = 0x8,
  103. CAM_CPAS_CAMERA_VERSION_ID_680 = 0x9,
  104. CAM_CPAS_CAMERA_VERSION_ID_165 = 0xA,
  105. CAM_CPAS_CAMERA_VERSION_ID_780 = 0xB,
  106. CAM_CPAS_CAMERA_VERSION_ID_640 = 0xC,
  107. CAM_CPAS_CAMERA_VERSION_ID_880 = 0xD,
  108. CAM_CPAS_CAMERA_VERSION_ID_MAX
  109. };
  110. /**
  111. * enum cam_cpas_version_map_id Enum for cpas version map id
  112. * This enum is mapped with cam_cpas_version
  113. */
  114. enum cam_cpas_version_map_id {
  115. CAM_CPAS_VERSION_ID_100 = 0x0,
  116. CAM_CPAS_VERSION_ID_101 = 0x1,
  117. CAM_CPAS_VERSION_ID_110 = 0x2,
  118. CAM_CPAS_VERSION_ID_120 = 0x3,
  119. CAM_CPAS_VERSION_ID_130 = 0x4,
  120. CAM_CPAS_VERSION_ID_200 = 0x5,
  121. CAM_CPAS_VERSION_ID_MAX
  122. };
  123. /**
  124. * enum cam_cpas_hw_version - Enum for Titan CPAS HW Versions
  125. */
  126. enum cam_cpas_hw_version {
  127. CAM_CPAS_TITAN_NONE = 0,
  128. CAM_CPAS_TITAN_150_V100 = 0x150100,
  129. CAM_CPAS_TITAN_165_V100 = 0x165100,
  130. CAM_CPAS_TITAN_170_V100 = 0x170100,
  131. CAM_CPAS_TITAN_170_V110 = 0x170110,
  132. CAM_CPAS_TITAN_170_V120 = 0x170120,
  133. CAM_CPAS_TITAN_170_V200 = 0x170200,
  134. CAM_CPAS_TITAN_175_V100 = 0x175100,
  135. CAM_CPAS_TITAN_175_V101 = 0x175101,
  136. CAM_CPAS_TITAN_175_V120 = 0x175120,
  137. CAM_CPAS_TITAN_175_V130 = 0x175130,
  138. CAM_CPAS_TITAN_480_V100 = 0x480100,
  139. CAM_CPAS_TITAN_580_V100 = 0x580100,
  140. CAM_CPAS_TITAN_540_V100 = 0x540100,
  141. CAM_CPAS_TITAN_520_V100 = 0x520100,
  142. CAM_CPAS_TITAN_545_V100 = 0x545100,
  143. CAM_CPAS_TITAN_570_V100 = 0x570100,
  144. CAM_CPAS_TITAN_570_V200 = 0x570200,
  145. CAM_CPAS_TITAN_680_V100 = 0x680100,
  146. CAM_CPAS_TITAN_680_V110 = 0x680110,
  147. CAM_CPAS_TITAN_780_V100 = 0x780100,
  148. CAM_CPAS_TITAN_640_V200 = 0x640200,
  149. CAM_CPAS_TITAN_880_V100 = 0x880100,
  150. CAM_CPAS_TITAN_MAX
  151. };
  152. /**
  153. * enum cam_camnoc_slave_error_codes - Enum for camnoc slave error codes
  154. *
  155. */
  156. enum cam_camnoc_slave_error_codes {
  157. CAM_CAMNOC_TARGET_ERROR,
  158. CAM_CAMNOC_ADDRESS_DECODE_ERROR,
  159. CAM_CAMNOC_UNSUPPORTED_REQUEST_ERROR,
  160. CAM_CAMNOC_DISCONNECTED_TARGET_ERROR,
  161. CAM_CAMNOC_SECURITY_VIOLATION,
  162. CAM_CAMNOC_HIDDEN_SECURITY_VIOLATION,
  163. CAM_CAMNOC_TIME_OUT,
  164. CAM_CAMNOC_UNUSED,
  165. };
  166. /**
  167. * enum cam_camnoc_irq_type - Enum for camnoc irq types
  168. *
  169. * @CAM_CAMNOC_IRQ_SLAVE_ERROR: Each slave port in CAMNOC (3 QSB ports and
  170. * 1 QHB port) has an error logger. The error
  171. * observed at any slave port is logged into
  172. * the error logger register and an IRQ is
  173. * triggered
  174. * @CAM_CAMNOC_IRQ_IFE_UBWC_ENCODE_ERROR : Triggered if any error detected
  175. * in the IFE UBWC encoder instance
  176. * @CAM_CAMNOC_IRQ_IFE_UBWC_STATS_ENCODE_ERROR: Triggered if any error detected
  177. * in the IFE UBWC-Stats encoder
  178. * instance
  179. * @CAM_CAMNOC_IRQ_IFE02_UBWC_ENCODE_ERROR : Triggered if any error detected
  180. * in the IFE0 UBWC encoder instance
  181. * @CAM_CAMNOC_IRQ_IFE13_UBWC_ENCODE_ERROR : Triggered if any error detected
  182. * in the IFE1 or IFE3 UBWC encoder
  183. * instance
  184. * @CAM_CAMNOC_IRQ_IFE0_UBWC_ENCODE_ERROR : Triggered if any error detected
  185. * in the IFE0 UBWC encoder instance
  186. * @CAM_CAMNOC_IRQ_IFE1_WR_UBWC_ENCODE_ERROR : Triggered if any error detected
  187. * in the IFE1 UBWC encoder
  188. * instance
  189. * @CAM_CAMNOC_IRQ_IPE_UBWC_ENCODE_ERROR : Triggered if any error detected
  190. * in the IPE write path encoder
  191. * instance
  192. * @CAM_CAMNOC_IRQ_BPS_UBWC_ENCODE_ERROR : Triggered if any error detected
  193. * in the BPS write path encoder
  194. * instance
  195. * @CAM_CAMNOC_IRQ_IPE1_BPS_UBWC_DECODE_ERROR: Triggered if any error detected
  196. * in the IPE1/BPS read path decoder
  197. * instance
  198. * @CAM_CAMNOC_IRQ_IPE0_UBWC_DECODE_ERROR : Triggered if any error detected
  199. * in the IPE0 read path decoder
  200. * instance
  201. * @CAM_CAMNOC_IRQ_IPE1_UBWC_DECODE_ERROR : Triggered if any error detected
  202. * in the IPE1 read path decoder
  203. * instance
  204. * @CAM_CAMNOC_IRQ_IPE_BPS_UBWC_DECODE_ERROR: Triggered if any error detected
  205. * in the IPE/BPS UBWC decoder
  206. * instance
  207. * @CAM_CAMNOC_IRQ_IPE_BPS_UBWC_ENCODE_ERROR: Triggered if any error detected
  208. * in the IPE/BPS UBWC encoder
  209. * instance
  210. * @CAM_CAMNOC_IRQ_OFE_WR_UBWC_DECODE_ERROR : Triggered if any error detected
  211. * in the OFE write UBWC decoder
  212. * instance
  213. * @CAM_CAMNOC_IRQ_OFE_RD_UBWC_DECODE_ERROR : Triggered if any error detected
  214. * in the OFE read UBWC decoder
  215. * instance
  216. * @CAM_CAMNOC_IRQ_AHB_TIMEOUT : Triggered when the QHS_ICP slave
  217. * times out after 4000 AHB cycles
  218. */
  219. enum cam_camnoc_irq_type {
  220. CAM_CAMNOC_IRQ_SLAVE_ERROR,
  221. CAM_CAMNOC_IRQ_IFE_UBWC_ENCODE_ERROR,
  222. CAM_CAMNOC_IRQ_IFE_UBWC_STATS_ENCODE_ERROR,
  223. CAM_CAMNOC_IRQ_IFE_UBWC_STATS_1_ENCODE_ERROR,
  224. CAM_CAMNOC_IRQ_IFE02_UBWC_ENCODE_ERROR,
  225. CAM_CAMNOC_IRQ_IFE13_UBWC_ENCODE_ERROR,
  226. CAM_CAMNOC_IRQ_IFE0_UBWC_ENCODE_ERROR,
  227. CAM_CAMNOC_IRQ_IFE1_WRITE_UBWC_ENCODE_ERROR,
  228. CAM_CAMNOC_IRQ_IPE_UBWC_ENCODE_ERROR,
  229. CAM_CAMNOC_IRQ_BPS_UBWC_ENCODE_ERROR,
  230. CAM_CAMNOC_IRQ_IPE1_BPS_UBWC_DECODE_ERROR,
  231. CAM_CAMNOC_IRQ_IPE0_UBWC_DECODE_ERROR,
  232. CAM_CAMNOC_IRQ_IPE1_UBWC_DECODE_ERROR,
  233. CAM_CAMNOC_IRQ_IPE_BPS_UBWC_DECODE_ERROR,
  234. CAM_CAMNOC_IRQ_IPE_BPS_UBWC_ENCODE_ERROR,
  235. CAM_CAMNOC_IRQ_OFE_WR_UBWC_DECODE_ERROR,
  236. CAM_CAMNOC_IRQ_OFE_RD_UBWC_DECODE_ERROR,
  237. CAM_CAMNOC_IRQ_AHB_TIMEOUT,
  238. };
  239. /**
  240. * enum cam_sys_cache_config_types - Enum for camera llc's
  241. */
  242. enum cam_sys_cache_config_types {
  243. CAM_LLCC_SMALL_1 = 0,
  244. CAM_LLCC_SMALL_2 = 1,
  245. CAM_LLCC_LARGE_1 = 2,
  246. CAM_LLCC_LARGE_2 = 3,
  247. CAM_LLCC_LARGE_3 = 4,
  248. CAM_LLCC_LARGE_4 = 5,
  249. CAM_LLCC_MAX = 6,
  250. };
  251. /**
  252. * enum cam_sys_cache_llcc_staling_mode - Enum for camera llc's stalling mode
  253. */
  254. enum cam_sys_cache_llcc_staling_mode {
  255. CAM_LLCC_STALING_MODE_CAPACITY,
  256. CAM_LLCC_STALING_MODE_NOTIFY,
  257. CAM_LLCC_STALING_MODE_MAX,
  258. };
  259. /**
  260. * enum cam_sys_cache_llcc_staling_mode - Enum for camera llc's stalling mode
  261. */
  262. enum cam_sys_cache_llcc_staling_op_type {
  263. CAM_LLCC_NOTIFY_STALING_EVICT,
  264. CAM_LLCC_NOTIFY_STALING_FORGET,
  265. CAM_LLCC_NOTIFY_STALING_OPS_MAX
  266. };
  267. /**
  268. * struct cam_camnoc_irq_slave_err_data : Data for Slave error.
  269. *
  270. * @mainctrl : Err logger mainctrl info
  271. * @errvld : Err logger errvld info
  272. * @errlog0_low : Err logger errlog0_low info
  273. * @errlog0_high : Err logger errlog0_high info
  274. * @errlog1_low : Err logger errlog1_low info
  275. * @errlog1_high : Err logger errlog1_high info
  276. * @errlog2_low : Err logger errlog2_low info
  277. * @errlog2_high : Err logger errlog2_high info
  278. * @errlog3_low : Err logger errlog3_low info
  279. * @errlog3_high : Err logger errlog3_high info
  280. *
  281. */
  282. struct cam_camnoc_irq_slave_err_data {
  283. union {
  284. struct {
  285. uint32_t stall_en : 1; /* bit 0 */
  286. uint32_t fault_en : 1; /* bit 1 */
  287. uint32_t rsv : 30; /* bits 2-31 */
  288. };
  289. uint32_t value;
  290. } mainctrl;
  291. union {
  292. struct {
  293. uint32_t err_vld : 1; /* bit 0 */
  294. uint32_t rsv : 31; /* bits 1-31 */
  295. };
  296. uint32_t value;
  297. } errvld;
  298. union {
  299. struct {
  300. uint32_t loginfo_vld : 1; /* bit 0 */
  301. uint32_t word_error : 1; /* bit 1 */
  302. uint32_t non_secure : 1; /* bit 2 */
  303. uint32_t device : 1; /* bit 3 */
  304. uint32_t opc : 3; /* bits 4 - 6 */
  305. uint32_t rsv0 : 1; /* bit 7 */
  306. uint32_t err_code : 3; /* bits 8 - 10 */
  307. uint32_t sizef : 3; /* bits 11 - 13 */
  308. uint32_t rsv1 : 2; /* bits 14 - 15 */
  309. uint32_t addr_space : 6; /* bits 16 - 21 */
  310. uint32_t rsv2 : 10; /* bits 22 - 31 */
  311. };
  312. uint32_t value;
  313. } errlog0_low;
  314. union {
  315. struct {
  316. uint32_t len1 : 10; /* bits 0 - 9 */
  317. uint32_t rsv : 22; /* bits 10 - 31 */
  318. };
  319. uint32_t value;
  320. } errlog0_high;
  321. union {
  322. struct {
  323. uint32_t path : 16; /* bits 0 - 15 */
  324. uint32_t rsv : 16; /* bits 16 - 31 */
  325. };
  326. uint32_t value;
  327. } errlog1_low;
  328. union {
  329. struct {
  330. uint32_t extid : 18; /* bits 0 - 17 */
  331. uint32_t rsv : 14; /* bits 18 - 31 */
  332. };
  333. uint32_t value;
  334. } errlog1_high;
  335. union {
  336. struct {
  337. uint32_t errlog2_lsb : 32; /* bits 0 - 31 */
  338. };
  339. uint32_t value;
  340. } errlog2_low;
  341. union {
  342. struct {
  343. uint32_t errlog2_msb : 16; /* bits 0 - 16 */
  344. uint32_t rsv : 16; /* bits 16 - 31 */
  345. };
  346. uint32_t value;
  347. } errlog2_high;
  348. union {
  349. struct {
  350. uint32_t errlog3_lsb : 32; /* bits 0 - 31 */
  351. };
  352. uint32_t value;
  353. } errlog3_low;
  354. union {
  355. struct {
  356. uint32_t errlog3_msb : 32; /* bits 0 - 31 */
  357. };
  358. uint32_t value;
  359. } errlog3_high;
  360. };
  361. /**
  362. * struct cam_camnoc_irq_ubwc_enc_data : Data for UBWC Encode error.
  363. *
  364. * @encerr_status : Encode error status
  365. *
  366. */
  367. struct cam_camnoc_irq_ubwc_enc_data {
  368. union {
  369. struct {
  370. uint32_t encerrstatus : 3; /* bits 0 - 2 */
  371. uint32_t rsv : 29; /* bits 3 - 31 */
  372. };
  373. uint32_t value;
  374. } encerr_status;
  375. };
  376. /**
  377. * struct cam_camnoc_irq_ubwc_dec_data : Data for UBWC Decode error.
  378. *
  379. * @decerr_status : Decoder error status
  380. * @thr_err : Set to 1 if
  381. * At least one of the bflc_len fields in the bit steam exceeds
  382. * its threshold value. This error is possible only for
  383. * RGBA1010102, TP10, and RGB565 formats
  384. * @fcl_err : Set to 1 if
  385. * Fast clear with a legal non-RGB format
  386. * @len_md_err : Set to 1 if
  387. * The calculated burst length does not match burst length
  388. * specified by the metadata value
  389. * @format_err : Set to 1 if
  390. * Illegal format
  391. * 1. bad format :2,3,6
  392. * 2. For 32B MAL, metadata=6
  393. * 3. For 32B MAL RGB565, Metadata != 0,1,7
  394. * 4. For 64B MAL RGB565, metadata[3:1] == 1,2
  395. *
  396. */
  397. struct cam_camnoc_irq_ubwc_dec_data {
  398. union {
  399. struct {
  400. uint32_t thr_err : 1; /* bit 0 */
  401. uint32_t fcl_err : 1; /* bit 1 */
  402. uint32_t len_md_err : 1; /* bit 2 */
  403. uint32_t format_err : 1; /* bit 3 */
  404. uint32_t rsv : 28; /* bits 4 - 31 */
  405. };
  406. uint32_t value;
  407. } decerr_status;
  408. };
  409. struct cam_camnoc_irq_ahb_timeout_data {
  410. uint32_t data;
  411. };
  412. /**
  413. * struct cam_cpas_irq_data : CAMNOC IRQ data
  414. *
  415. * @irq_type : To identify the type of IRQ
  416. * @u : Union of irq err data information
  417. * @slave_err : Data for Slave error.
  418. * Valid if type is CAM_CAMNOC_IRQ_SLAVE_ERROR
  419. * @enc_err : Data for UBWC Encode error.
  420. * Valid if type is one of below:
  421. * CAM_CAMNOC_IRQ_IFE02_UBWC_ENCODE_ERROR
  422. * CAM_CAMNOC_IRQ_IFE13_UBWC_ENCODE_ERROR
  423. * CAM_CAMNOC_IRQ_IPE_BPS_UBWC_ENCODE_ERROR
  424. * @dec_err : Data for UBWC Decode error.
  425. * Valid if type is CAM_CAMNOC_IRQ_IPE_BPS_UBWC_DECODE_ERROR
  426. * @ahb_err : Data for Slave error.
  427. * Valid if type is CAM_CAMNOC_IRQ_AHB_TIMEOUT
  428. *
  429. */
  430. struct cam_cpas_irq_data {
  431. enum cam_camnoc_irq_type irq_type;
  432. union {
  433. struct cam_camnoc_irq_slave_err_data slave_err;
  434. struct cam_camnoc_irq_ubwc_enc_data enc_err;
  435. struct cam_camnoc_irq_ubwc_dec_data dec_err;
  436. struct cam_camnoc_irq_ahb_timeout_data ahb_err;
  437. } u;
  438. };
  439. /*
  440. * CPAS client callback
  441. *
  442. * @client_handle : CPAS client handle
  443. * @userdata : User data given at the time of register
  444. * @irq_data : Event data
  445. */
  446. typedef bool (*cam_cpas_client_cb_func)(
  447. uint32_t client_handle, void *userdata,
  448. struct cam_cpas_irq_data *irq_data);
  449. /**
  450. * struct cam_cpas_register_params : Register params for cpas client
  451. *
  452. * @identifier : Input identifier string which is the device label
  453. * from dt like vfe, ife, jpeg etc
  454. * @cell_index : Input integer identifier pointing to the cell index
  455. * from dt of the device. This can be used to form a
  456. * unique string with @identifier like vfe0, ife1,
  457. * jpeg0, etc
  458. * @dev : device handle
  459. * @userdata : Input private data which will be passed as
  460. * an argument while callback.
  461. * @cam_cpas_callback : Input callback pointer for triggering the
  462. * callbacks from CPAS driver.
  463. * @client_handle : Output Unique handle generated for this register
  464. *
  465. */
  466. struct cam_cpas_register_params {
  467. char identifier[CAM_HW_IDENTIFIER_LENGTH];
  468. uint32_t cell_index;
  469. struct device *dev;
  470. void *userdata;
  471. cam_cpas_client_cb_func cam_cpas_client_cb;
  472. uint32_t client_handle;
  473. };
  474. /**
  475. * enum cam_vote_type - Enum for voting type
  476. *
  477. * @CAM_VOTE_ABSOLUTE : Absolute vote
  478. * @CAM_VOTE_DYNAMIC : Dynamic vote
  479. */
  480. enum cam_vote_type {
  481. CAM_VOTE_ABSOLUTE,
  482. CAM_VOTE_DYNAMIC,
  483. };
  484. /**
  485. * struct cam_ahb_vote : AHB vote
  486. *
  487. * @type : AHB voting type.
  488. * CAM_VOTE_ABSOLUTE : vote based on the value 'level' is set
  489. * CAM_VOTE_DYNAMIC : vote calculated dynamically using 'freq'
  490. * and 'dev' handle is set
  491. * @level : AHB vote level
  492. * @freq : AHB vote dynamic frequency
  493. *
  494. */
  495. struct cam_ahb_vote {
  496. enum cam_vote_type type;
  497. union {
  498. enum cam_vote_level level;
  499. unsigned long freq;
  500. } vote;
  501. };
  502. /**
  503. * struct cam_cpas_axi_per_path_bw_vote - Internal per path bandwidth vote information
  504. *
  505. * @usage_data: client usage data (left/right/rdi)
  506. * @transac_type: Transaction type on the path (read/write)
  507. * @path_data_type: Path for which vote is given (video, display, rdi)
  508. * @vote_level: Vote level for this path
  509. * @camnoc_bw: CAMNOC bw for this path
  510. * @mnoc_ab_bw: MNOC AB bw for this path
  511. * @mnoc_ib_bw: MNOC IB bw for this path
  512. */
  513. struct cam_cpas_axi_per_path_bw_vote {
  514. uint32_t usage_data;
  515. uint32_t transac_type;
  516. uint32_t path_data_type;
  517. uint32_t vote_level;
  518. uint64_t camnoc_bw;
  519. uint64_t mnoc_ab_bw;
  520. uint64_t mnoc_ib_bw;
  521. };
  522. /**
  523. * struct cam_axi_vote : AXI vote
  524. *
  525. * @num_paths: Number of paths on which BW vote is sent to CPAS
  526. * @axi_path: Per path BW vote info
  527. *
  528. */
  529. struct cam_axi_vote {
  530. uint32_t num_paths;
  531. struct cam_cpas_axi_per_path_bw_vote axi_path[CAM_CPAS_MAX_PATHS_PER_CLIENT];
  532. };
  533. /**
  534. * cam_cpas_register_client()
  535. *
  536. * @brief: API to register cpas client
  537. *
  538. * @register_params: Input params to register as a client to CPAS
  539. *
  540. * @return 0 on success.
  541. *
  542. */
  543. int cam_cpas_register_client(
  544. struct cam_cpas_register_params *register_params);
  545. /**
  546. * cam_cpas_unregister_client()
  547. *
  548. * @brief: API to unregister cpas client
  549. *
  550. * @client_handle: Client handle to be unregistered
  551. *
  552. * @return 0 on success.
  553. *
  554. */
  555. int cam_cpas_unregister_client(uint32_t client_handle);
  556. /**
  557. * cam_cpas_start()
  558. *
  559. * @brief: API to start cpas client hw. Clients have to vote for minimal
  560. * bandwidth requirements for AHB, AXI. Use cam_cpas_update_ahb_vote
  561. * to scale bandwidth after start.
  562. *
  563. * @client_handle: client cpas handle
  564. * @ahb_vote : Pointer to ahb vote info
  565. * @axi_vote : Pointer to axi bandwidth vote info
  566. *
  567. * If AXI vote is not applicable to a particular client, use the value exposed
  568. * by CAM_CPAS_DEFAULT_AXI_BW as the default vote request.
  569. *
  570. * @return 0 on success.
  571. *
  572. */
  573. int cam_cpas_start(
  574. uint32_t client_handle,
  575. struct cam_ahb_vote *ahb_vote,
  576. struct cam_axi_vote *axi_vote);
  577. /**
  578. * cam_cpas_stop()
  579. *
  580. * @brief: API to stop cpas client hw. Bandwidth for AHB, AXI votes
  581. * would be removed for this client on this call. Clients should not
  582. * use cam_cpas_update_ahb_vote or cam_cpas_update_axi_vote
  583. * to remove their bandwidth vote.
  584. *
  585. * @client_handle: client cpas handle
  586. *
  587. * @return 0 on success.
  588. *
  589. */
  590. int cam_cpas_stop(uint32_t client_handle);
  591. /**
  592. * cam_cpas_update_ahb_vote()
  593. *
  594. * @brief: API to update AHB vote requirement. Use this function only
  595. * between cam_cpas_start and cam_cpas_stop in case clients wants
  596. * to scale to different vote level. Do not use this function to de-vote,
  597. * removing client's vote is implicit on cam_cpas_stop
  598. *
  599. * @client_handle : Client cpas handle
  600. * @ahb_vote : Pointer to ahb vote info
  601. *
  602. * @return 0 on success.
  603. *
  604. */
  605. int cam_cpas_update_ahb_vote(
  606. uint32_t client_handle,
  607. struct cam_ahb_vote *ahb_vote);
  608. /**
  609. * cam_cpas_update_axi_vote()
  610. *
  611. * @brief: API to update AXI vote requirement. Use this function only
  612. * between cam_cpas_start and cam_cpas_stop in case clients wants
  613. * to scale to different vote level. Do not use this function to de-vote,
  614. * removing client's vote is implicit on cam_cpas_stop
  615. *
  616. * @client_handle : Client cpas handle
  617. * @axi_vote : Pointer to axi bandwidth vote info
  618. *
  619. * @return 0 on success.
  620. *
  621. */
  622. int cam_cpas_update_axi_vote(
  623. uint32_t client_handle,
  624. struct cam_axi_vote *axi_vote);
  625. /**
  626. * cam_cpas_reg_write()
  627. *
  628. * @brief: API to write a register value in CPAS register space
  629. *
  630. * @client_handle : Client cpas handle
  631. * @reg_base : Register base identifier
  632. * @offset : Offset from the register base address
  633. * @mb : Whether to do reg write with memory barrier
  634. * @value : Value to be written in register
  635. *
  636. * @return 0 on success.
  637. *
  638. */
  639. int cam_cpas_reg_write(
  640. uint32_t client_handle,
  641. enum cam_cpas_regbase_types reg_base,
  642. uint32_t offset,
  643. bool mb,
  644. uint32_t value);
  645. /**
  646. * cam_cpas_reg_read()
  647. *
  648. * @brief: API to read a register value from CPAS register space
  649. *
  650. * @client_handle : Client cpas handle
  651. * @reg_base : Register base identifier
  652. * @offset : Offset from the register base address
  653. * @mb : Whether to do reg read with memory barrier
  654. * @value : Value to be red from register
  655. *
  656. * @return 0 on success.
  657. *
  658. */
  659. int cam_cpas_reg_read(
  660. uint32_t client_handle,
  661. enum cam_cpas_regbase_types reg_base,
  662. uint32_t offset,
  663. bool mb,
  664. uint32_t *value);
  665. /**
  666. * cam_cpas_get_hw_info()
  667. *
  668. * @brief: API to get camera hw information
  669. *
  670. * @camera_family : Camera family type. One of
  671. * CAM_FAMILY_CAMERA_SS
  672. * CAM_FAMILY_CPAS_SS
  673. * @camera_version : Camera platform version
  674. * @cpas_version : Camera cpas version
  675. * @cam_caps : Camera capability
  676. * @cam_fuse_info : Camera fuse info
  677. * @domain_id_info : Domain id info
  678. *
  679. * @return 0 on success.
  680. *
  681. */
  682. int cam_cpas_get_hw_info(
  683. uint32_t *camera_family,
  684. struct cam_hw_version *camera_version,
  685. struct cam_hw_version *cpas_version,
  686. uint32_t *cam_caps,
  687. struct cam_cpas_fuse_info *cam_fuse_info,
  688. struct cam_cpas_domain_id_caps *domain_id_info);
  689. /**
  690. * cam_cpas_get_cpas_hw_version()
  691. *
  692. * @brief: API to get camera cpas hw version
  693. *
  694. * @hw_version : Camera cpas hw version
  695. *
  696. * @return 0 on success.
  697. *
  698. */
  699. int cam_cpas_get_cpas_hw_version(
  700. uint32_t *hw_version);
  701. /**
  702. * cam_cpas_is_feature_supported()
  703. *
  704. * @brief: API to get camera features
  705. *
  706. * @flag : Camera hw features to check
  707. *
  708. * @hw_map : To indicate which HWs are supported
  709. *
  710. * @fule_val : Return fule value in case of value type feature
  711. *
  712. * @return 1 if feature is supported
  713. *
  714. */
  715. bool cam_cpas_is_feature_supported(uint32_t flag, uint32_t hw_map,
  716. uint32_t *fuse_val);
  717. /**
  718. * cam_cpas_axi_util_path_type_to_string()
  719. *
  720. * @brief: API to get string for given path type
  721. *
  722. * @path_data_type : Path type
  723. *
  724. * @return string.
  725. *
  726. */
  727. const char *cam_cpas_axi_util_path_type_to_string(
  728. uint32_t path_data_type);
  729. /**
  730. * cam_cpas_axi_util_trans_type_to_string()
  731. *
  732. * @brief: API to get string for given transaction type
  733. *
  734. * @path_data_type : Transaction type
  735. *
  736. * @return string.
  737. *
  738. */
  739. const char *cam_cpas_axi_util_trans_type_to_string(
  740. uint32_t path_data_type);
  741. /**
  742. * cam_cpas_axi_util_drv_vote_lvl_to_string()
  743. *
  744. * @brief: API to get string for given DRV vote level
  745. *
  746. * @vote_lvl : DRV vote level
  747. *
  748. * @return string.
  749. *
  750. */
  751. const char *cam_cpas_axi_util_drv_vote_lvl_to_string(
  752. uint32_t vote_lvl);
  753. /**
  754. * cam_cpas_util_vote_type_to_string()
  755. *
  756. * @brief: API to get string for given vote type
  757. *
  758. * @vote_type : DRV vote level
  759. *
  760. * @return string.
  761. *
  762. */
  763. const char *cam_cpas_util_vote_type_to_string(enum cam_cpas_vote_type vote_type);
  764. /**
  765. * cam_cpas_log_votes()
  766. *
  767. * @brief: API to print the all bw votes of axi client. It also print the
  768. * applied camnoc axi clock vote value and ahb vote value
  769. *
  770. * @ddr_only: Print only DDR info
  771. *
  772. * @return 0 on success.
  773. *
  774. */
  775. void cam_cpas_log_votes(bool ddr_only);
  776. /**
  777. * cam_cpas_select_qos_settings()
  778. *
  779. * @brief: API to select specific qos settings based on usecase requirements
  780. *
  781. * @return 0 on success.
  782. *
  783. */
  784. int cam_cpas_select_qos_settings(uint32_t selection_mask);
  785. /**
  786. * cam_cpas_notify_event()
  787. *
  788. * @brief: API that clients can notify about their events. CPAS save the event
  789. * and any other useful information related to this event. This will
  790. * be printed while cpas state dump - cam_cpas_log_votes.
  791. * One such example is IFE notifiying SOF or EPOCH to cpas and cpas
  792. * saving axi clock information (camnoc_axi, mnoc_hf) at that point
  793. * and printing latest history on IFE overflow.
  794. *
  795. * @identifier_string: Identifier string passed by caller
  796. * @identifier_value: Identifier value passed by caller
  797. *
  798. * @return 0 on success.
  799. *
  800. */
  801. int cam_cpas_notify_event(const char *identifier_string,
  802. int32_t identifier_value);
  803. /**
  804. * cam_cpas_get_scid()
  805. *
  806. * @brief: API to obtain slice id for the given type
  807. *
  808. * @type: Cache type
  809. *
  810. * @return slice id, -1 for invalid id.
  811. *
  812. */
  813. int cam_cpas_get_scid(enum cam_sys_cache_config_types type);
  814. /**
  815. * cam_cpas_activate_llcc()
  816. *
  817. * @brief: API to activate system cache
  818. *
  819. * @type: Cache type
  820. *
  821. * @return 0 for success.
  822. *
  823. */
  824. int cam_cpas_activate_llcc(enum cam_sys_cache_config_types type);
  825. /**
  826. * cam_cpas_deactivate_llcc()
  827. *
  828. * @brief: API to de-activate system cache
  829. *
  830. * @type: Cache type
  831. *
  832. * @return 0 for success.
  833. *
  834. */
  835. int cam_cpas_deactivate_llcc(enum cam_sys_cache_config_types type);
  836. /**
  837. * cam_cpas_configure_staling_llcc()
  838. *
  839. * @brief: Configure cache staling mode by setting the
  840. * staling_mode and corresponding params
  841. *
  842. * @type: Cache type
  843. * @mode_param: llcc stalling mode params
  844. * @operation_type: cache operation type
  845. * @stalling_distance: llcc sys cache stalling distance
  846. *
  847. * @return 0 for success.
  848. *
  849. */
  850. int cam_cpas_configure_staling_llcc(
  851. enum cam_sys_cache_config_types type,
  852. enum cam_sys_cache_llcc_staling_mode mode_param,
  853. enum cam_sys_cache_llcc_staling_op_type operation_type,
  854. uint32_t staling_distance);
  855. /**
  856. * cam_cpas_notif_increment_staling_counter()
  857. *
  858. * @brief: This will increment the stalling counter
  859. * depends on what operation it does.
  860. * The operation mode what we have setup in other function.
  861. *
  862. * @type: Cache type
  863. *
  864. * @return 0 for success.
  865. *
  866. */
  867. int cam_cpas_notif_increment_staling_counter(
  868. enum cam_sys_cache_config_types type);
  869. /**
  870. * cam_cpas_dump_camnoc_buff_fill_info()
  871. *
  872. * @brief: API to dump camnoc buffer fill level info
  873. *
  874. * @client_handle : Client cpas handle
  875. *
  876. * @return 0 on success
  877. *
  878. */
  879. int cam_cpas_dump_camnoc_buff_fill_info(uint32_t client_handle);
  880. /**
  881. * cam_cpas_csid_input_core_info_update()
  882. *
  883. * @brief: API to communicate csid input core info to cpas
  884. *
  885. * @csid_idx: csid hw index connected to particular sfe
  886. * @sfe_idx: sfe idx to be connected to particular DRV path
  887. * @set_port: Indicates whether to set or reset DRV port info in dynamic client
  888. *
  889. * @return 0 on success
  890. *
  891. */
  892. int cam_cpas_csid_input_core_info_update(int csid_idx, int sfe_idx, bool set_port);
  893. /**
  894. * cam_cpas_csid_process_resume()
  895. *
  896. * @brief: API to process csid resume in cpas
  897. * @csid_idx: CSID idx to notify resume for
  898. *
  899. * @return 0 on success
  900. *
  901. */
  902. int cam_cpas_csid_process_resume(uint32_t csid_idx);
  903. /**
  904. * cam_cpas_query_drv_enable()
  905. *
  906. * @brief: API to indicate DRV enabled on hw or not
  907. * @is_ddr_drv_enabled: If DDR DRV enabled
  908. * @is_clk_drv_enabled: If Clock Cesta DRV enabled
  909. *
  910. * @return 0 on success
  911. *
  912. */
  913. int cam_cpas_query_drv_enable(bool *is_ddr_drv_enabled, bool *is_clk_drv_enabled);
  914. /**
  915. * cam_cpas_query_domain_id_security_support()
  916. * @brief: API to determine if target supports domain id feature
  917. * This information is determined by cpas during probe
  918. *
  919. * @return true if there's support, false otherwise
  920. */
  921. bool cam_cpas_query_domain_id_security_support(void);
  922. /**
  923. * cam_cpas_enable_clks_for_domain_id()
  924. *
  925. * @brief: API to enable/disable clocks for domain id support.
  926. * All CSIDs including those not in use for a ctxt
  927. * needs to be programmed in a secure session.
  928. * @enable: True to turn on, false otherwise.
  929. * @return 0 on success
  930. */
  931. int cam_cpas_enable_clks_for_domain_id(bool enable);
  932. /**
  933. * cam_cpas_is_notif_staling_supported()
  934. *
  935. * @brief: API to check stalling feature is supported or not
  936. *
  937. * @return rue if supported
  938. */
  939. bool cam_cpas_is_notif_staling_supported(void);
  940. #endif /* _CAM_CPAS_API_H_ */