dp_main.c 49 KB

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  1. /*
  2. * Copyright (c) 2016 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <hal_api.h>
  21. #include <hif.h>
  22. #include <htt.h>
  23. #include <wdi_event.h>
  24. #include <queue.h>
  25. #include "dp_htt.h"
  26. #include "dp_types.h"
  27. #include "dp_internal.h"
  28. #include "dp_tx.h"
  29. #include "dp_rx.h"
  30. #include "../../wlan_cfg/wlan_cfg.h"
  31. /**
  32. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  33. */
  34. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  35. int ring_type, int ring_num, int pdev_id, uint32_t num_entries)
  36. {
  37. void *hal_soc = soc->hal_soc;
  38. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  39. /* TODO: See if we should get align size from hal */
  40. uint32_t ring_base_align = 8;
  41. struct hal_srng_params ring_params;
  42. srng->hal_srng = NULL;
  43. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  44. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  45. soc->osdev, NULL, srng->alloc_size,
  46. &(srng->base_paddr_unaligned));
  47. if (!srng->base_vaddr_unaligned) {
  48. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  49. "%s: alloc failed - ring_type: %d, ring_num %d\n",
  50. __func__, ring_type, ring_num);
  51. return QDF_STATUS_E_NOMEM;
  52. }
  53. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  54. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  55. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  56. ((unsigned long)(ring_params.ring_base_vaddr) -
  57. (unsigned long)srng->base_vaddr_unaligned);
  58. ring_params.num_entries = num_entries;
  59. /* TODO: Check MSI support and get MSI settings from HIF layer */
  60. ring_params.msi_data = 0;
  61. ring_params.msi_addr = 0;
  62. /* TODO: Setup interrupt timer and batch counter thresholds for
  63. * interrupt mitigation based on ring type
  64. */
  65. ring_params.intr_timer_thres_us = 8;
  66. ring_params.intr_batch_cntr_thres_entries = 1;
  67. /* TODO: Currently hal layer takes care of endianness related settings.
  68. * See if these settings need to passed from DP layer
  69. */
  70. ring_params.flags = 0;
  71. /* Enable low threshold interrupts for rx buffer rings (regular and
  72. * monitor buffer rings.
  73. * TODO: See if this is required for any other ring
  74. */
  75. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  76. /* TODO: Setting low threshold to 1/8th of ring size
  77. * see if this needs to be configurable
  78. */
  79. ring_params.low_threshold = num_entries >> 3;
  80. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  81. }
  82. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  83. pdev_id, &ring_params);
  84. return 0;
  85. }
  86. /**
  87. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  88. * Any buffers allocated and attached to ring entries are expected to be freed
  89. * before calling this function.
  90. */
  91. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  92. int ring_type, int ring_num)
  93. {
  94. if (!srng->hal_srng) {
  95. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  96. "%s: Ring type: %d, num:%d not setup\n",
  97. __func__, ring_type, ring_num);
  98. return;
  99. }
  100. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  101. qdf_mem_free_consistent(soc->osdev, NULL,
  102. srng->alloc_size,
  103. srng->base_vaddr_unaligned,
  104. srng->base_paddr_unaligned, 0);
  105. }
  106. /* TODO: Need this interface from HIF */
  107. void *hif_get_hal_handle(void *hif_handle);
  108. /*
  109. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  110. * @dp_ctx: DP SOC handle
  111. * @budget: Number of frames/descriptors that can be processed in one shot
  112. *
  113. * Return: remaining budget/quota for the soc device
  114. */
  115. uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  116. {
  117. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  118. struct dp_soc *soc = int_ctx->soc;
  119. int ring = 0;
  120. uint32_t work_done = 0;
  121. uint32_t budget = dp_budget;
  122. uint8_t tx_mask = int_ctx->tx_ring_mask;
  123. uint8_t rx_mask = int_ctx->rx_ring_mask;
  124. /* Process Tx completion interrupts first to return back buffers */
  125. if (tx_mask) {
  126. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  127. if (tx_mask & (1 << ring)) {
  128. work_done =
  129. dp_tx_comp_handler(soc, ring, budget);
  130. budget -= work_done;
  131. if (work_done)
  132. DP_TRACE(INFO, "tx mask 0x%x ring %d, budget %d\n",
  133. tx_mask, ring, budget);
  134. if (budget <= 0)
  135. goto budget_done;
  136. }
  137. }
  138. }
  139. /* Process Rx interrupts */
  140. if (rx_mask) {
  141. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  142. if (rx_mask & (1 << ring)) {
  143. work_done =
  144. dp_rx_process(soc,
  145. soc->reo_dest_ring[ring].hal_srng,
  146. budget);
  147. budget -= work_done;
  148. if (work_done)
  149. DP_TRACE(INFO, "rx mask 0x%x ring %d, budget %d\n",
  150. tx_mask, ring, budget);
  151. if (budget <= 0)
  152. goto budget_done;
  153. }
  154. }
  155. }
  156. budget_done:
  157. return dp_budget - budget;
  158. }
  159. /* dp_interrupt_timer()- timer poll for interrupts
  160. *
  161. * @arg: SoC Handle
  162. *
  163. * Return:
  164. *
  165. */
  166. #ifdef DP_INTR_POLL_BASED
  167. void dp_interrupt_timer(void *arg)
  168. {
  169. struct dp_soc *soc = (struct dp_soc *) arg;
  170. int i;
  171. for (i = 0 ; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  172. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  173. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  174. }
  175. /*
  176. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  177. * @txrx_soc: DP SOC handle
  178. *
  179. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  180. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  181. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  182. *
  183. * Return: 0 for success. nonzero for failure.
  184. */
  185. QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  186. {
  187. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  188. int i;
  189. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  190. soc->intr_ctx[i].tx_ring_mask = 0xF;
  191. soc->intr_ctx[i].rx_ring_mask = 0xF;
  192. soc->intr_ctx[i].rx_mon_ring_mask = 0xF;
  193. soc->intr_ctx[i].soc = soc;
  194. }
  195. qdf_timer_init(soc->osdev, &soc->int_timer,
  196. dp_interrupt_timer, (void *)soc,
  197. QDF_TIMER_TYPE_WAKE_APPS);
  198. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  199. return QDF_STATUS_SUCCESS;
  200. }
  201. /*
  202. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  203. * @txrx_soc: DP SOC handle
  204. *
  205. * Return: void
  206. */
  207. void dp_soc_interrupt_detach(void *txrx_soc)
  208. {
  209. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  210. qdf_timer_stop(&soc->int_timer);
  211. qdf_timer_detach(&soc->int_timer);
  212. }
  213. #else
  214. /*
  215. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  216. * @txrx_soc: DP SOC handle
  217. *
  218. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  219. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  220. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  221. *
  222. * Return: 0 for success. nonzero for failure.
  223. */
  224. QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  225. {
  226. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  227. int i = 0;
  228. int num_irq = 0;
  229. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  230. int j = 0;
  231. int ret = 0;
  232. /* Map of IRQ ids registered with one interrupt context */
  233. int irq_id_map[HIF_MAX_GRP_IRQ];
  234. int tx_mask =
  235. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  236. int rx_mask =
  237. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  238. int rx_mon_mask =
  239. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  240. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  241. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  242. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  243. soc->intr_ctx[i].soc = soc;
  244. num_irq = 0;
  245. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  246. if (tx_mask & (1 << j)) {
  247. irq_id_map[num_irq++] =
  248. (wbm2host_tx_completions_ring1 - j);
  249. }
  250. if (rx_mask & (1 << j)) {
  251. irq_id_map[num_irq++] =
  252. (reo2host_destination_ring1 - j);
  253. }
  254. if (rx_mon_mask & (1 << j)) {
  255. irq_id_map[num_irq++] =
  256. (rxdma2host_monitor_destination_mac1
  257. - j);
  258. }
  259. }
  260. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  261. num_irq, irq_id_map,
  262. dp_service_srngs,
  263. &soc->intr_ctx[i]);
  264. if (ret) {
  265. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  266. "%s: failed, ret = %d", __func__, ret);
  267. return QDF_STATUS_E_FAILURE;
  268. }
  269. }
  270. return QDF_STATUS_SUCCESS;
  271. }
  272. /*
  273. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  274. * @txrx_soc: DP SOC handle
  275. *
  276. * Return: void
  277. */
  278. void dp_soc_interrupt_detach(void *txrx_soc)
  279. {
  280. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  281. int i;
  282. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  283. soc->intr_ctx[i].tx_ring_mask = 0;
  284. soc->intr_ctx[i].rx_ring_mask = 0;
  285. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  286. }
  287. }
  288. #endif
  289. #define AVG_MAX_MPDUS_PER_TID 128
  290. #define AVG_TIDS_PER_CLIENT 2
  291. #define AVG_FLOWS_PER_TID 2
  292. #define AVG_MSDUS_PER_FLOW 128
  293. #define AVG_MSDUS_PER_MPDU 4
  294. /*
  295. * Allocate and setup link descriptor pool that will be used by HW for
  296. * various link and queue descriptors and managed by WBM
  297. */
  298. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  299. {
  300. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  301. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  302. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  303. uint32_t num_mpdus_per_link_desc =
  304. hal_num_mpdus_per_link_desc(soc->hal_soc);
  305. uint32_t num_msdus_per_link_desc =
  306. hal_num_msdus_per_link_desc(soc->hal_soc);
  307. uint32_t num_mpdu_links_per_queue_desc =
  308. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  309. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  310. uint32_t total_link_descs, total_mem_size;
  311. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  312. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  313. uint32_t num_link_desc_banks;
  314. uint32_t last_bank_size = 0;
  315. uint32_t entry_size, num_entries;
  316. int i;
  317. /* Only Tx queue descriptors are allocated from common link descriptor
  318. * pool Rx queue descriptors are not included in this because (REO queue
  319. * extension descriptors) they are expected to be allocated contiguously
  320. * with REO queue descriptors
  321. */
  322. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  323. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  324. num_mpdu_queue_descs = num_mpdu_link_descs /
  325. num_mpdu_links_per_queue_desc;
  326. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  327. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  328. num_msdus_per_link_desc;
  329. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  330. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  331. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  332. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  333. /* Round up to power of 2 */
  334. total_link_descs = 1;
  335. while (total_link_descs < num_entries)
  336. total_link_descs <<= 1;
  337. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  338. "%s: total_link_descs: %u, link_desc_size: %d\n",
  339. __func__, total_link_descs, link_desc_size);
  340. total_mem_size = total_link_descs * link_desc_size;
  341. total_mem_size += link_desc_align;
  342. if (total_mem_size <= max_alloc_size) {
  343. num_link_desc_banks = 0;
  344. last_bank_size = total_mem_size;
  345. } else {
  346. num_link_desc_banks = (total_mem_size) /
  347. (max_alloc_size - link_desc_align);
  348. last_bank_size = total_mem_size %
  349. (max_alloc_size - link_desc_align);
  350. }
  351. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  352. "%s: total_mem_size: %d, num_link_desc_banks: %u\n",
  353. __func__, total_mem_size, num_link_desc_banks);
  354. for (i = 0; i < num_link_desc_banks; i++) {
  355. soc->link_desc_banks[i].base_vaddr_unaligned =
  356. qdf_mem_alloc_consistent(soc->osdev, NULL,
  357. max_alloc_size,
  358. &(soc->link_desc_banks[i].base_paddr_unaligned));
  359. soc->link_desc_banks[i].size = max_alloc_size;
  360. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  361. soc->link_desc_banks[i].base_vaddr_unaligned) +
  362. ((unsigned long)(
  363. soc->link_desc_banks[i].base_vaddr_unaligned) %
  364. link_desc_align));
  365. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  366. soc->link_desc_banks[i].base_paddr_unaligned) +
  367. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  368. (unsigned long)(
  369. soc->link_desc_banks[i].base_vaddr_unaligned));
  370. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  371. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  372. "%s: Link descriptor memory alloc failed\n",
  373. __func__);
  374. goto fail;
  375. }
  376. }
  377. if (last_bank_size) {
  378. /* Allocate last bank in case total memory required is not exact
  379. * multiple of max_alloc_size
  380. */
  381. soc->link_desc_banks[i].base_vaddr_unaligned =
  382. qdf_mem_alloc_consistent(soc->osdev, NULL,
  383. last_bank_size,
  384. &(soc->link_desc_banks[i].base_paddr_unaligned));
  385. soc->link_desc_banks[i].size = last_bank_size;
  386. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  387. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  388. ((unsigned long)(
  389. soc->link_desc_banks[i].base_vaddr_unaligned) %
  390. link_desc_align));
  391. soc->link_desc_banks[i].base_paddr =
  392. (unsigned long)(
  393. soc->link_desc_banks[i].base_paddr_unaligned) +
  394. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  395. (unsigned long)(
  396. soc->link_desc_banks[i].base_vaddr_unaligned));
  397. }
  398. /* Allocate and setup link descriptor idle list for HW internal use */
  399. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  400. total_mem_size = entry_size * total_link_descs;
  401. if (total_mem_size <= max_alloc_size) {
  402. void *desc;
  403. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  404. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  405. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  406. "%s: Link desc idle ring setup failed\n",
  407. __func__);
  408. goto fail;
  409. }
  410. hal_srng_access_start_unlocked(soc->hal_soc,
  411. soc->wbm_idle_link_ring.hal_srng);
  412. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  413. soc->link_desc_banks[i].base_paddr; i++) {
  414. uint32_t num_entries = (soc->link_desc_banks[i].size -
  415. (unsigned long)(
  416. soc->link_desc_banks[i].base_vaddr) -
  417. (unsigned long)(
  418. soc->link_desc_banks[i].base_vaddr_unaligned))
  419. / link_desc_size;
  420. unsigned long paddr = (unsigned long)(
  421. soc->link_desc_banks[i].base_paddr);
  422. while (num_entries && (desc = hal_srng_src_get_next(
  423. soc->hal_soc,
  424. soc->wbm_idle_link_ring.hal_srng))) {
  425. hal_set_link_desc_addr(desc, i, paddr);
  426. num_entries--;
  427. paddr += link_desc_size;
  428. }
  429. }
  430. hal_srng_access_end_unlocked(soc->hal_soc,
  431. soc->wbm_idle_link_ring.hal_srng);
  432. } else {
  433. uint32_t num_scatter_bufs;
  434. uint32_t num_entries_per_buf;
  435. uint32_t rem_entries;
  436. uint8_t *scatter_buf_ptr;
  437. uint16_t scatter_buf_num;
  438. soc->wbm_idle_scatter_buf_size =
  439. hal_idle_list_scatter_buf_size(soc->hal_soc);
  440. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  441. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  442. num_scatter_bufs = (total_mem_size /
  443. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  444. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  445. for (i = 0; i < num_scatter_bufs; i++) {
  446. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  447. qdf_mem_alloc_consistent(soc->osdev, NULL,
  448. soc->wbm_idle_scatter_buf_size,
  449. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  450. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  451. QDF_TRACE(QDF_MODULE_ID_TXRX,
  452. QDF_TRACE_LEVEL_ERROR,
  453. "%s:Scatter list memory alloc failed\n",
  454. __func__);
  455. goto fail;
  456. }
  457. }
  458. /* Populate idle list scatter buffers with link descriptor
  459. * pointers
  460. */
  461. scatter_buf_num = 0;
  462. scatter_buf_ptr = (uint8_t *)(
  463. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  464. rem_entries = num_entries_per_buf;
  465. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  466. soc->link_desc_banks[i].base_paddr; i++) {
  467. uint32_t num_link_descs =
  468. (soc->link_desc_banks[i].size -
  469. (unsigned long)(
  470. soc->link_desc_banks[i].base_vaddr) -
  471. (unsigned long)(
  472. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  473. link_desc_size;
  474. unsigned long paddr = (unsigned long)(
  475. soc->link_desc_banks[i].base_paddr);
  476. void *desc = NULL;
  477. while (num_link_descs && (desc =
  478. hal_srng_src_get_next(soc->hal_soc,
  479. soc->wbm_idle_link_ring.hal_srng))) {
  480. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  481. i, paddr);
  482. num_link_descs--;
  483. paddr += link_desc_size;
  484. if (rem_entries) {
  485. rem_entries--;
  486. scatter_buf_ptr += link_desc_size;
  487. } else {
  488. rem_entries = num_entries_per_buf;
  489. scatter_buf_num++;
  490. scatter_buf_ptr = (uint8_t *)(
  491. soc->wbm_idle_scatter_buf_base_vaddr[
  492. scatter_buf_num]);
  493. }
  494. }
  495. }
  496. /* Setup link descriptor idle list in HW */
  497. hal_setup_link_idle_list(soc->hal_soc,
  498. soc->wbm_idle_scatter_buf_base_paddr,
  499. soc->wbm_idle_scatter_buf_base_vaddr,
  500. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  501. (uint32_t)(scatter_buf_ptr -
  502. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  503. scatter_buf_num])));
  504. }
  505. return 0;
  506. fail:
  507. if (soc->wbm_idle_link_ring.hal_srng) {
  508. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  509. WBM_IDLE_LINK, 0);
  510. }
  511. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  512. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  513. qdf_mem_free_consistent(soc->osdev, NULL,
  514. soc->wbm_idle_scatter_buf_size,
  515. soc->wbm_idle_scatter_buf_base_vaddr[i],
  516. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  517. }
  518. }
  519. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  520. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  521. qdf_mem_free_consistent(soc->osdev, NULL,
  522. soc->link_desc_banks[i].size,
  523. soc->link_desc_banks[i].base_vaddr_unaligned,
  524. soc->link_desc_banks[i].base_paddr_unaligned,
  525. 0);
  526. }
  527. }
  528. return QDF_STATUS_E_FAILURE;
  529. }
  530. /*
  531. * Free link descriptor pool that was setup HW
  532. */
  533. void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  534. {
  535. int i;
  536. if (soc->wbm_idle_link_ring.hal_srng) {
  537. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  538. WBM_IDLE_LINK, 0);
  539. }
  540. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  541. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  542. qdf_mem_free_consistent(soc->osdev, NULL,
  543. soc->wbm_idle_scatter_buf_size,
  544. soc->wbm_idle_scatter_buf_base_vaddr[i],
  545. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  546. }
  547. }
  548. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  549. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  550. qdf_mem_free_consistent(soc->osdev, NULL,
  551. soc->link_desc_banks[i].size,
  552. soc->link_desc_banks[i].base_vaddr_unaligned,
  553. soc->link_desc_banks[i].base_paddr_unaligned,
  554. 0);
  555. }
  556. }
  557. }
  558. /* TODO: Following should be configurable */
  559. #define WBM_RELEASE_RING_SIZE 64
  560. #define TCL_DATA_RING_SIZE 512
  561. #define TCL_CMD_RING_SIZE 32
  562. #define TCL_STATUS_RING_SIZE 32
  563. #define REO_DST_RING_SIZE 2048
  564. #define REO_REINJECT_RING_SIZE 32
  565. #define RX_RELEASE_RING_SIZE 256
  566. #define REO_EXCEPTION_RING_SIZE 128
  567. #define REO_CMD_RING_SIZE 32
  568. #define REO_STATUS_RING_SIZE 32
  569. #define RXDMA_BUF_RING_SIZE 8192
  570. #define RXDMA_MONITOR_BUF_RING_SIZE 8192
  571. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  572. #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
  573. /*
  574. * dp_soc_cmn_setup() - Common SoC level initializion
  575. * @soc: Datapath SOC handle
  576. *
  577. * This is an internal function used to setup common SOC data structures,
  578. * to be called from PDEV attach after receiving HW mode capabilities from FW
  579. */
  580. static int dp_soc_cmn_setup(struct dp_soc *soc)
  581. {
  582. int i;
  583. if (soc->cmn_init_done)
  584. return 0;
  585. if (dp_peer_find_attach(soc))
  586. goto fail0;
  587. if (dp_hw_link_desc_pool_setup(soc))
  588. goto fail1;
  589. /* Setup SRNG rings */
  590. /* Common rings */
  591. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  592. WBM_RELEASE_RING_SIZE)) {
  593. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  594. "%s: dp_srng_setup failed for wbm_desc_rel_ring\n",
  595. __func__);
  596. goto fail1;
  597. }
  598. soc->num_tcl_data_rings = 0;
  599. /* Tx data rings */
  600. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  601. soc->num_tcl_data_rings =
  602. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  603. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  604. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  605. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  606. QDF_TRACE(QDF_MODULE_ID_TXRX,
  607. QDF_TRACE_LEVEL_ERROR,
  608. "%s: dp_srng_setup failed for tcl_data_ring[%d]\n",
  609. __func__, i);
  610. goto fail1;
  611. }
  612. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  613. WBM2SW_RELEASE, i, 0, TCL_DATA_RING_SIZE)) {
  614. QDF_TRACE(QDF_MODULE_ID_TXRX,
  615. QDF_TRACE_LEVEL_ERROR,
  616. "%s: dp_srng_setup failed for tx_comp_ring[%d]\n",
  617. __func__, i);
  618. goto fail1;
  619. }
  620. }
  621. } else {
  622. /* This will be incremented during per pdev ring setup */
  623. soc->num_tcl_data_rings = 0;
  624. }
  625. if (dp_tx_soc_attach(soc)) {
  626. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  627. "%s: dp_tx_soc_attach failed\n", __func__);
  628. goto fail1;
  629. }
  630. /* TCL command and status rings */
  631. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  632. TCL_CMD_RING_SIZE)) {
  633. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  634. "%s: dp_srng_setup failed for tcl_cmd_ring\n",
  635. __func__);
  636. goto fail1;
  637. }
  638. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  639. TCL_STATUS_RING_SIZE)) {
  640. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  641. "%s: dp_srng_setup failed for tcl_status_ring\n",
  642. __func__);
  643. goto fail1;
  644. }
  645. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  646. * descriptors
  647. */
  648. /* Rx data rings */
  649. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  650. soc->num_reo_dest_rings =
  651. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  652. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  653. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  654. i, 0, REO_DST_RING_SIZE)) {
  655. QDF_TRACE(QDF_MODULE_ID_TXRX,
  656. QDF_TRACE_LEVEL_ERROR,
  657. "%s: dp_srng_setup failed for reo_dest_ring[%d]\n",
  658. __func__, i);
  659. goto fail1;
  660. }
  661. }
  662. } else {
  663. /* This will be incremented during per pdev ring setup */
  664. soc->num_reo_dest_rings = 0;
  665. }
  666. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  667. /* REO reinjection ring */
  668. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  669. REO_REINJECT_RING_SIZE)) {
  670. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  671. "%s: dp_srng_setup failed for reo_reinject_ring\n",
  672. __func__);
  673. goto fail1;
  674. }
  675. /* Rx release ring */
  676. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  677. RX_RELEASE_RING_SIZE)) {
  678. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  679. "%s: dp_srng_setup failed for rx_rel_ring\n",
  680. __func__);
  681. goto fail1;
  682. }
  683. /* Rx exception ring */
  684. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  685. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  686. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  687. "%s: dp_srng_setup failed for reo_exception_ring\n",
  688. __func__);
  689. goto fail1;
  690. }
  691. /* REO command and status rings */
  692. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  693. REO_CMD_RING_SIZE)) {
  694. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  695. "%s: dp_srng_setup failed for reo_cmd_ring\n",
  696. __func__);
  697. goto fail1;
  698. }
  699. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  700. REO_STATUS_RING_SIZE)) {
  701. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  702. "%s: dp_srng_setup failed for reo_status_ring\n",
  703. __func__);
  704. goto fail1;
  705. }
  706. dp_soc_interrupt_attach(soc);
  707. /* Setup HW REO */
  708. hal_reo_setup(soc->hal_soc);
  709. soc->cmn_init_done = 1;
  710. return 0;
  711. fail1:
  712. /*
  713. * Cleanup will be done as part of soc_detach, which will
  714. * be called on pdev attach failure
  715. */
  716. fail0:
  717. return QDF_STATUS_E_FAILURE;
  718. }
  719. static void dp_pdev_detach_wifi3(void *txrx_pdev, int force);
  720. /*
  721. * dp_pdev_attach_wifi3() - attach txrx pdev
  722. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  723. * @txrx_soc: Datapath SOC handle
  724. * @htc_handle: HTC handle for host-target interface
  725. * @qdf_osdev: QDF OS device
  726. * @pdev_id: PDEV ID
  727. *
  728. * Return: DP PDEV handle on success, NULL on failure
  729. */
  730. void *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc, void *ctrl_pdev,
  731. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  732. {
  733. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  734. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  735. if (!pdev) {
  736. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  737. "%s: DP PDEV memory allocation failed\n", __func__);
  738. goto fail0;
  739. }
  740. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  741. if (!pdev->wlan_cfg_ctx) {
  742. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  743. "%s: pdev cfg_attach failed\n", __func__);
  744. qdf_mem_free(pdev);
  745. goto fail0;
  746. }
  747. pdev->soc = soc;
  748. pdev->osif_pdev = ctrl_pdev;
  749. pdev->pdev_id = pdev_id;
  750. soc->pdev_list[pdev_id] = pdev;
  751. TAILQ_INIT(&pdev->vdev_list);
  752. pdev->vdev_count = 0;
  753. if (dp_soc_cmn_setup(soc)) {
  754. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  755. "%s: dp_soc_cmn_setup failed\n", __func__);
  756. goto fail1;
  757. }
  758. /* Setup per PDEV TCL rings if configured */
  759. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  760. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  761. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  762. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  763. "%s: dp_srng_setup failed for tcl_data_ring\n",
  764. __func__);
  765. goto fail1;
  766. }
  767. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  768. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  769. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  770. "%s: dp_srng_setup failed for tx_comp_ring\n",
  771. __func__);
  772. goto fail1;
  773. }
  774. soc->num_tcl_data_rings++;
  775. }
  776. /* Tx specific init */
  777. if (dp_tx_pdev_attach(pdev)) {
  778. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  779. "%s: dp_tx_pdev_attach failed\n", __func__);
  780. goto fail1;
  781. }
  782. /* Setup per PDEV REO rings if configured */
  783. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  784. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  785. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  786. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  787. "%s: dp_srng_setup failed for reo_dest_ring\n",
  788. __func__);
  789. goto fail1;
  790. }
  791. soc->num_reo_dest_rings++;
  792. }
  793. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  794. RXDMA_BUF_RING_SIZE)) {
  795. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  796. "%s: dp_srng_setup failed rx refill ring\n", __func__);
  797. goto fail1;
  798. }
  799. #ifdef QCA_HOST2FW_RXBUF_RING
  800. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring, RXDMA_BUF, 1, pdev_id,
  801. RXDMA_BUF_RING_SIZE)) {
  802. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  803. "%s: dp_srng_setup failed rx mac ring\n", __func__);
  804. goto fail1;
  805. }
  806. #endif
  807. /* TODO: RXDMA destination ring is not planned to be used currently.
  808. * Setup the ring when required
  809. */
  810. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  811. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  812. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  813. "%s: dp_srng_setup failed for rxdma_mon_buf_ring\n",
  814. __func__);
  815. goto fail1;
  816. }
  817. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  818. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  819. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  820. "%s: dp_srng_setup failed for rxdma_mon_dst_ring\n",
  821. __func__);
  822. goto fail1;
  823. }
  824. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  825. RXDMA_MONITOR_STATUS, 0, pdev_id,
  826. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  827. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  828. "%s: dp_srng_setup failed for rxdma_mon_status_ring\n",
  829. __func__);
  830. goto fail1;
  831. }
  832. /* Rx specific init */
  833. if (dp_rx_pdev_attach(pdev)) {
  834. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  835. "%s: dp_rx_pdev_attach failed \n", __func__);
  836. goto fail0;
  837. }
  838. #ifndef CONFIG_WIN
  839. /* MCL */
  840. dp_local_peer_id_pool_init(pdev);
  841. #endif
  842. return (void *)pdev;
  843. fail1:
  844. dp_pdev_detach_wifi3((void *)pdev, 0);
  845. fail0:
  846. return NULL;
  847. }
  848. /*
  849. * dp_pdev_detach_wifi3() - detach txrx pdev
  850. * @txrx_pdev: Datapath PDEV handle
  851. * @force: Force detach
  852. *
  853. */
  854. static void dp_pdev_detach_wifi3(void *txrx_pdev, int force)
  855. {
  856. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  857. struct dp_soc *soc = pdev->soc;
  858. dp_tx_pdev_detach(pdev);
  859. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  860. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  861. TCL_DATA, pdev->pdev_id);
  862. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  863. WBM2SW_RELEASE, pdev->pdev_id);
  864. }
  865. dp_rx_pdev_detach(pdev);
  866. /* Setup per PDEV REO rings if configured */
  867. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  868. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  869. REO_DST, pdev->pdev_id);
  870. }
  871. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  872. #ifdef QCA_HOST2FW_RXBUF_RING
  873. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring, RXDMA_BUF, 1);
  874. #endif
  875. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  876. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  877. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  878. RXDMA_MONITOR_STATUS, 0);
  879. soc->pdev_list[pdev->pdev_id] = NULL;
  880. qdf_mem_free(pdev);
  881. }
  882. /*
  883. * dp_soc_detach_wifi3() - Detach txrx SOC
  884. * @txrx_soc: DP SOC handle
  885. *
  886. */
  887. void dp_soc_detach_wifi3(void *txrx_soc)
  888. {
  889. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  890. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  891. int i;
  892. soc->cmn_init_done = 0;
  893. for (i = 0; i < MAX_PDEV_CNT; i++) {
  894. if (soc->pdev_list[i])
  895. dp_pdev_detach_wifi3((void *)pdev, 1);
  896. }
  897. dp_peer_find_detach(soc);
  898. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  899. * SW descriptors
  900. */
  901. /* Free the ring memories */
  902. /* Common rings */
  903. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  904. /* Tx data rings */
  905. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  906. dp_tx_soc_detach(soc);
  907. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  908. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  909. TCL_DATA, i);
  910. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  911. WBM2SW_RELEASE, i);
  912. }
  913. }
  914. /* TCL command and status rings */
  915. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  916. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  917. /* Rx data rings */
  918. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  919. soc->num_reo_dest_rings =
  920. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  921. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  922. /* TODO: Get number of rings and ring sizes
  923. * from wlan_cfg
  924. */
  925. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  926. REO_DST, i);
  927. }
  928. }
  929. /* REO reinjection ring */
  930. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  931. /* Rx release ring */
  932. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  933. /* Rx exception ring */
  934. /* TODO: Better to store ring_type and ring_num in
  935. * dp_srng during setup
  936. */
  937. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  938. /* REO command and status rings */
  939. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  940. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  941. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  942. htt_soc_detach(soc->htt_handle);
  943. }
  944. /*
  945. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  946. * @txrx_soc: Datapath SOC handle
  947. */
  948. int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  949. {
  950. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  951. int i;
  952. htt_soc_attach_target(soc->htt_handle);
  953. for (i = 0; i < MAX_PDEV_CNT; i++) {
  954. struct dp_pdev *pdev = soc->pdev_list[i];
  955. if (pdev) {
  956. htt_srng_setup(soc->htt_handle, i,
  957. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  958. #ifdef QCA_HOST2FW_RXBUF_RING
  959. htt_srng_setup(soc->htt_handle, i,
  960. pdev->rx_mac_buf_ring.hal_srng, RXDMA_BUF);
  961. #endif
  962. #ifdef notyet /* FW doesn't handle monitor rings yet */
  963. htt_srng_setup(soc->htt_handle, i,
  964. pdev->rxdma_mon_buf_ring.hal_srng,
  965. RXDMA_MONITOR_BUF);
  966. htt_srng_setup(soc->htt_handle, i,
  967. pdev->rxdma_mon_dst_ring.hal_srng,
  968. RXDMA_MONITOR_DST);
  969. htt_srng_setup(soc->htt_handle, i,
  970. pdev->rxdma_mon_status_ring.hal_srng,
  971. RXDMA_MONITOR_STATUS);
  972. #endif
  973. }
  974. }
  975. return 0;
  976. }
  977. /*
  978. * dp_vdev_attach_wifi3() - attach txrx vdev
  979. * @txrx_pdev: Datapath PDEV handle
  980. * @vdev_mac_addr: MAC address of the virtual interface
  981. * @vdev_id: VDEV Id
  982. * @wlan_op_mode: VDEV operating mode
  983. *
  984. * Return: DP VDEV handle on success, NULL on failure
  985. */
  986. void *dp_vdev_attach_wifi3(void *txrx_pdev,
  987. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  988. {
  989. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  990. struct dp_soc *soc = pdev->soc;
  991. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  992. if (!vdev) {
  993. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  994. "%s: DP VDEV memory allocation failed\n", __func__);
  995. goto fail0;
  996. }
  997. vdev->pdev = pdev;
  998. vdev->vdev_id = vdev_id;
  999. vdev->opmode = op_mode;
  1000. vdev->osdev = soc->osdev;
  1001. vdev->osif_rx = NULL;
  1002. vdev->osif_rx_mon = NULL;
  1003. vdev->osif_vdev = NULL;
  1004. vdev->delete.pending = 0;
  1005. vdev->safemode = 0;
  1006. vdev->drop_unenc = 1;
  1007. #ifdef notyet
  1008. vdev->filters_num = 0;
  1009. #endif
  1010. qdf_mem_copy(
  1011. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1012. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1013. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1014. /* TODO: Initialize default HTT meta data that will be used in
  1015. * TCL descriptors for packets transmitted from this VDEV
  1016. */
  1017. TAILQ_INIT(&vdev->peer_list);
  1018. /* add this vdev into the pdev's list */
  1019. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1020. pdev->vdev_count++;
  1021. dp_tx_vdev_attach(vdev);
  1022. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1023. "Created vdev %p (%02x:%02x:%02x:%02x:%02x:%02x)\n", vdev,
  1024. vdev->mac_addr.raw[0], vdev->mac_addr.raw[1],
  1025. vdev->mac_addr.raw[2], vdev->mac_addr.raw[3],
  1026. vdev->mac_addr.raw[4], vdev->mac_addr.raw[5]);
  1027. return (void *)vdev;
  1028. fail0:
  1029. return NULL;
  1030. }
  1031. /**
  1032. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1033. * @vdev: Datapath VDEV handle
  1034. * @osif_vdev: OSIF vdev handle
  1035. * @txrx_ops: Tx and Rx operations
  1036. *
  1037. * Return: DP VDEV handle on success, NULL on failure
  1038. */
  1039. void dp_vdev_register_wifi3(void *vdev_handle, void *osif_vdev,
  1040. struct ol_txrx_ops *txrx_ops)
  1041. {
  1042. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1043. vdev->osif_vdev = osif_vdev;
  1044. vdev->osif_rx = txrx_ops->rx.rx;
  1045. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1046. #ifdef notyet
  1047. #if ATH_SUPPORT_WAPI
  1048. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1049. #endif
  1050. #if UMAC_SUPPORT_PROXY_ARP
  1051. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1052. #endif
  1053. #endif
  1054. /* TODO: Enable the following once Tx code is integrated */
  1055. txrx_ops->tx.tx = dp_tx_send;
  1056. DP_TRACE(ERROR, "DP Vdev Register success");
  1057. }
  1058. /*
  1059. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1060. * @txrx_vdev: Datapath VDEV handle
  1061. * @callback: Callback OL_IF on completion of detach
  1062. * @cb_context: Callback context
  1063. *
  1064. */
  1065. void dp_vdev_detach_wifi3(void *vdev_handle,
  1066. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1067. {
  1068. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1069. struct dp_pdev *pdev = vdev->pdev;
  1070. struct dp_soc *soc = pdev->soc;
  1071. /* preconditions */
  1072. qdf_assert(vdev);
  1073. /* remove the vdev from its parent pdev's list */
  1074. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1075. /*
  1076. * Use peer_ref_mutex while accessing peer_list, in case
  1077. * a peer is in the process of being removed from the list.
  1078. */
  1079. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1080. /* check that the vdev has no peers allocated */
  1081. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1082. /* debug print - will be removed later */
  1083. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1084. "%s: not deleting vdev object %p (%02x:%02x:%02x:%02x:%02x:%02x)"
  1085. "until deletion finishes for all its peers\n",
  1086. __func__, vdev,
  1087. vdev->mac_addr.raw[0], vdev->mac_addr.raw[1],
  1088. vdev->mac_addr.raw[2], vdev->mac_addr.raw[3],
  1089. vdev->mac_addr.raw[4], vdev->mac_addr.raw[5]);
  1090. /* indicate that the vdev needs to be deleted */
  1091. vdev->delete.pending = 1;
  1092. vdev->delete.callback = callback;
  1093. vdev->delete.context = cb_context;
  1094. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1095. return;
  1096. }
  1097. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1098. dp_tx_vdev_detach(vdev);
  1099. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1100. "%s: deleting vdev object %p (%02x:%02x:%02x:%02x:%02x:%02x)\n",
  1101. __func__, vdev,
  1102. vdev->mac_addr.raw[0], vdev->mac_addr.raw[1],
  1103. vdev->mac_addr.raw[2], vdev->mac_addr.raw[3],
  1104. vdev->mac_addr.raw[4], vdev->mac_addr.raw[5]);
  1105. qdf_mem_free(vdev);
  1106. if (callback)
  1107. callback(cb_context);
  1108. }
  1109. /*
  1110. * dp_peer_attach_wifi3() - attach txrx peer
  1111. * @txrx_vdev: Datapath VDEV handle
  1112. * @peer_mac_addr: Peer MAC address
  1113. *
  1114. * Return: DP peeer handle on success, NULL on failure
  1115. */
  1116. void *dp_peer_attach_wifi3(void *vdev_handle, uint8_t *peer_mac_addr)
  1117. {
  1118. struct dp_peer *peer;
  1119. int i;
  1120. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1121. struct dp_pdev *pdev;
  1122. struct dp_soc *soc;
  1123. /* preconditions */
  1124. qdf_assert(vdev);
  1125. qdf_assert(peer_mac_addr);
  1126. pdev = vdev->pdev;
  1127. soc = pdev->soc;
  1128. #ifdef notyet
  1129. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1130. soc->mempool_ol_ath_peer);
  1131. #else
  1132. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1133. #endif
  1134. if (!peer)
  1135. return NULL; /* failure */
  1136. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1137. qdf_spinlock_create(&peer->peer_info_lock);
  1138. /* store provided params */
  1139. peer->vdev = vdev;
  1140. qdf_mem_copy(
  1141. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1142. /* TODO: See of rx_opt_proc is really required */
  1143. peer->rx_opt_proc = soc->rx_opt_proc;
  1144. dp_peer_rx_init(pdev, peer);
  1145. /* initialize the peer_id */
  1146. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1147. peer->peer_ids[i] = HTT_INVALID_PEER;
  1148. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1149. qdf_atomic_init(&peer->ref_cnt);
  1150. /* keep one reference for attach */
  1151. qdf_atomic_inc(&peer->ref_cnt);
  1152. /* add this peer into the vdev's list */
  1153. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1154. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1155. /* TODO: See if hash based search is required */
  1156. dp_peer_find_hash_add(soc, peer);
  1157. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1158. /* TODO: Check on the destination ring number to be passed to FW */
  1159. soc->cdp_soc.ol_ops->peer_set_default_routing(soc->osif_soc, peer->mac_addr.raw,
  1160. peer->vdev->vdev_id, 0, 1);
  1161. }
  1162. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1163. "vdev %p created peer %p (%02x:%02x:%02x:%02x:%02x:%02x)\n",
  1164. vdev, peer,
  1165. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  1166. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  1167. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  1168. /*
  1169. * For every peer MAp message search and set if bss_peer
  1170. */
  1171. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1172. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1173. "vdev bss_peer!!!!\n");
  1174. peer->bss_peer = 1;
  1175. vdev->vap_bss_peer = peer;
  1176. }
  1177. #ifndef CONFIG_WIN
  1178. dp_local_peer_id_alloc(pdev, peer);
  1179. #endif
  1180. return (void *)peer;
  1181. }
  1182. /*
  1183. * dp_peer_authorize() - authorize txrx peer
  1184. * @peer_handle: Datapath peer handle
  1185. * @authorize
  1186. *
  1187. */
  1188. void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1189. {
  1190. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1191. struct dp_soc *soc;
  1192. if (peer != NULL) {
  1193. soc = peer->vdev->pdev->soc;
  1194. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1195. peer->authorize = authorize ? 1 : 0;
  1196. #ifdef notyet /* ATH_BAND_STEERING */
  1197. peer->peer_bs_inact_flag = 0;
  1198. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1199. #endif
  1200. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1201. }
  1202. }
  1203. /*
  1204. * dp_peer_unref_delete() - unref and delete peer
  1205. * @peer_handle: Datapath peer handle
  1206. *
  1207. */
  1208. void dp_peer_unref_delete(void *peer_handle)
  1209. {
  1210. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1211. struct dp_vdev *vdev = peer->vdev;
  1212. struct dp_soc *soc = vdev->pdev->soc;
  1213. struct dp_peer *tmppeer;
  1214. int found = 0;
  1215. uint16_t peer_id;
  1216. /*
  1217. * Hold the lock all the way from checking if the peer ref count
  1218. * is zero until the peer references are removed from the hash
  1219. * table and vdev list (if the peer ref count is zero).
  1220. * This protects against a new HL tx operation starting to use the
  1221. * peer object just after this function concludes it's done being used.
  1222. * Furthermore, the lock needs to be held while checking whether the
  1223. * vdev's list of peers is empty, to make sure that list is not modified
  1224. * concurrently with the empty check.
  1225. */
  1226. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1227. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1228. peer_id = peer->peer_ids[0];
  1229. /*
  1230. * Make sure that the reference to the peer in
  1231. * peer object map is removed
  1232. */
  1233. if (peer_id != HTT_INVALID_PEER)
  1234. soc->peer_id_to_obj_map[peer_id] = NULL;
  1235. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1236. "Deleting peer %p (%02x:%02x:%02x:%02x:%02x:%02x)\n",
  1237. peer, peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  1238. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  1239. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  1240. /* remove the reference to the peer from the hash table */
  1241. dp_peer_find_hash_remove(soc, peer);
  1242. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1243. if (tmppeer == peer) {
  1244. found = 1;
  1245. break;
  1246. }
  1247. }
  1248. if (found) {
  1249. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1250. peer_list_elem);
  1251. } else {
  1252. /*Ignoring the remove operation as peer not found*/
  1253. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1254. "WARN peer %p not found in vdev (%p)->peer_list:%p\n",
  1255. peer, vdev, &peer->vdev->peer_list);
  1256. }
  1257. /* cleanup the Rx reorder queues for this peer */
  1258. dp_peer_rx_cleanup(vdev, peer);
  1259. /* check whether the parent vdev has no peers left */
  1260. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1261. /*
  1262. * Now that there are no references to the peer, we can
  1263. * release the peer reference lock.
  1264. */
  1265. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1266. /*
  1267. * Check if the parent vdev was waiting for its peers
  1268. * to be deleted, in order for it to be deleted too.
  1269. */
  1270. if (vdev->delete.pending) {
  1271. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1272. vdev->delete.callback;
  1273. void *vdev_delete_context =
  1274. vdev->delete.context;
  1275. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1276. QDF_TRACE_LEVEL_INFO_HIGH,
  1277. "%s: deleting vdev object %p "
  1278. "(%02x:%02x:%02x:%02x:%02x:%02x)"
  1279. " - its last peer is done\n",
  1280. __func__, vdev,
  1281. vdev->mac_addr.raw[0],
  1282. vdev->mac_addr.raw[1],
  1283. vdev->mac_addr.raw[2],
  1284. vdev->mac_addr.raw[3],
  1285. vdev->mac_addr.raw[4],
  1286. vdev->mac_addr.raw[5]);
  1287. /* all peers are gone, go ahead and delete it */
  1288. qdf_mem_free(vdev);
  1289. if (vdev_delete_cb)
  1290. vdev_delete_cb(vdev_delete_context);
  1291. }
  1292. } else {
  1293. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1294. }
  1295. #ifdef notyet
  1296. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1297. #else
  1298. qdf_mem_free(peer);
  1299. #endif
  1300. #ifdef notyet /* See why this should be done in DP layer */
  1301. qdf_atomic_inc(&soc->peer_count);
  1302. #endif
  1303. } else {
  1304. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1305. }
  1306. }
  1307. /*
  1308. * dp_peer_detach_wifi3() – Detach txrx peer
  1309. * @peer_handle: Datapath peer handle
  1310. *
  1311. */
  1312. void dp_peer_detach_wifi3(void *peer_handle)
  1313. {
  1314. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1315. /* redirect the peer's rx delivery function to point to a
  1316. * discard func
  1317. */
  1318. peer->rx_opt_proc = dp_rx_discard;
  1319. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1320. "%s:peer %p (%02x:%02x:%02x:%02x:%02x:%02x)\n", __func__, peer,
  1321. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  1322. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  1323. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  1324. /*
  1325. * Remove the reference added during peer_attach.
  1326. * The peer will still be left allocated until the
  1327. * PEER_UNMAP message arrives to remove the other
  1328. * reference, added by the PEER_MAP message.
  1329. */
  1330. dp_peer_unref_delete(peer_handle);
  1331. #ifndef CONFIG_WIN
  1332. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1333. #endif
  1334. qdf_spinlock_destroy(&peer->peer_info_lock);
  1335. }
  1336. /*
  1337. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1338. * @peer_handle: Datapath peer handle
  1339. *
  1340. */
  1341. uint8 *dp_get_vdev_mac_addr_wifi3(void *pvdev)
  1342. {
  1343. struct dp_vdev *vdev = pvdev;
  1344. return vdev->mac_addr.raw;
  1345. }
  1346. /*
  1347. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1348. * @peer_handle: Datapath peer handle
  1349. *
  1350. */
  1351. void *dp_get_vdev_from_vdev_id_wifi3(void *dev, uint8_t vdev_id)
  1352. {
  1353. struct dp_pdev *pdev = dev;
  1354. struct dp_vdev *vdev = NULL;
  1355. if (qdf_unlikely(!pdev))
  1356. return NULL;
  1357. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1358. if (vdev->vdev_id == vdev_id)
  1359. break;
  1360. }
  1361. return vdev;
  1362. }
  1363. int dp_get_opmode(void *vdev_handle)
  1364. {
  1365. struct dp_vdev *vdev = vdev_handle;
  1366. return vdev->opmode;
  1367. }
  1368. void *dp_get_ctrl_pdev_from_vdev_wifi3(void *pvdev)
  1369. {
  1370. struct dp_vdev *vdev = pvdev;
  1371. struct dp_pdev *pdev = vdev->pdev;
  1372. return (void *)pdev->wlan_cfg_ctx;
  1373. }
  1374. static struct cdp_cmn_ops dp_ops_cmn = {
  1375. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  1376. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  1377. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  1378. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  1379. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  1380. .txrx_peer_attach = dp_peer_attach_wifi3,
  1381. .txrx_peer_detach = dp_peer_detach_wifi3,
  1382. .txrx_vdev_register = dp_vdev_register_wifi3,
  1383. .txrx_soc_detach = dp_soc_detach_wifi3,
  1384. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  1385. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  1386. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  1387. /* TODO: Add other functions */
  1388. };
  1389. static struct cdp_ctrl_ops dp_ops_ctrl = {
  1390. .txrx_peer_authorize = dp_peer_authorize,
  1391. /* TODO: Add other functions */
  1392. };
  1393. static struct cdp_me_ops dp_ops_me = {
  1394. /* TODO */
  1395. };
  1396. static struct cdp_mon_ops dp_ops_mon = {
  1397. /* TODO */
  1398. };
  1399. static struct cdp_host_stats_ops dp_ops_host_stats = {
  1400. /* TODO */
  1401. };
  1402. static struct cdp_wds_ops dp_ops_wds = {
  1403. /* TODO */
  1404. };
  1405. static struct cdp_raw_ops dp_ops_raw = {
  1406. /* TODO */
  1407. };
  1408. #ifdef CONFIG_WIN
  1409. static struct cdp_pflow_ops dp_ops_pflow = {
  1410. /* TODO */
  1411. };
  1412. #endif /* CONFIG_WIN */
  1413. #ifndef CONFIG_WIN
  1414. static struct cdp_misc_ops dp_ops_misc = {
  1415. .get_opmode = dp_get_opmode,
  1416. };
  1417. static struct cdp_flowctl_ops dp_ops_flowctl = {
  1418. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1419. };
  1420. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  1421. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1422. };
  1423. static struct cdp_ipa_ops dp_ops_ipa = {
  1424. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1425. };
  1426. static struct cdp_lro_ops dp_ops_lro = {
  1427. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1428. };
  1429. static struct cdp_bus_ops dp_ops_bus = {
  1430. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1431. };
  1432. static struct cdp_ocb_ops dp_ops_ocb = {
  1433. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1434. };
  1435. static struct cdp_throttle_ops dp_ops_throttle = {
  1436. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1437. };
  1438. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  1439. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1440. };
  1441. static struct cdp_cfg_ops dp_ops_cfg = {
  1442. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1443. };
  1444. static struct cdp_peer_ops dp_ops_peer = {
  1445. .register_peer = dp_register_peer,
  1446. .clear_peer = dp_clear_peer,
  1447. .find_peer_by_addr = dp_find_peer_by_addr,
  1448. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  1449. .local_peer_id = dp_local_peer_id,
  1450. .peer_find_by_local_id = dp_peer_find_by_local_id,
  1451. .peer_state_update = dp_peer_state_update,
  1452. .get_vdevid = dp_get_vdevid,
  1453. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  1454. .get_vdev_for_peer = dp_get_vdev_for_peer,
  1455. .get_peer_state = dp_get_peer_state,
  1456. };
  1457. #endif
  1458. static struct cdp_ops dp_txrx_ops = {
  1459. .cmn_drv_ops = &dp_ops_cmn,
  1460. .ctrl_ops = &dp_ops_ctrl,
  1461. .me_ops = &dp_ops_me,
  1462. .mon_ops = &dp_ops_mon,
  1463. .host_stats_ops = &dp_ops_host_stats,
  1464. .wds_ops = &dp_ops_wds,
  1465. .raw_ops = &dp_ops_raw,
  1466. #ifdef CONFIG_WIN
  1467. .pflow_ops = &dp_ops_pflow,
  1468. #endif /* CONFIG_WIN */
  1469. #ifndef CONFIG_WIN
  1470. .misc_ops = &dp_ops_misc,
  1471. .cfg_ops = &dp_ops_cfg,
  1472. .flowctl_ops = &dp_ops_flowctl,
  1473. .l_flowctl_ops = &dp_ops_l_flowctl,
  1474. .ipa_ops = &dp_ops_ipa,
  1475. .lro_ops = &dp_ops_lro,
  1476. .bus_ops = &dp_ops_bus,
  1477. .ocb_ops = &dp_ops_ocb,
  1478. .peer_ops = &dp_ops_peer,
  1479. .throttle_ops = &dp_ops_throttle,
  1480. .mob_stats_ops = &dp_ops_mob_stats,
  1481. #endif
  1482. };
  1483. /*
  1484. * dp_soc_attach_wifi3() - Attach txrx SOC
  1485. * @osif_soc: Opaque SOC handle from OSIF/HDD
  1486. * @htc_handle: Opaque HTC handle
  1487. * @hif_handle: Opaque HIF handle
  1488. * @qdf_osdev: QDF device
  1489. *
  1490. * Return: DP SOC handle on success, NULL on failure
  1491. */
  1492. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1493. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1494. struct ol_if_ops *ol_ops)
  1495. {
  1496. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  1497. if (!soc) {
  1498. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1499. "%s: DP SOC memory allocation failed\n", __func__);
  1500. goto fail0;
  1501. }
  1502. soc->cdp_soc.ops = &dp_txrx_ops;
  1503. soc->cdp_soc.ol_ops = ol_ops;
  1504. soc->osif_soc = osif_soc;
  1505. soc->osdev = qdf_osdev;
  1506. soc->hif_handle = hif_handle;
  1507. soc->hal_soc = hif_get_hal_handle(hif_handle);
  1508. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  1509. soc->hal_soc, qdf_osdev);
  1510. if (soc->htt_handle == NULL) {
  1511. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1512. "%s: HTT attach failed\n", __func__);
  1513. goto fail1;
  1514. }
  1515. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  1516. if (!soc->wlan_cfg_ctx) {
  1517. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1518. "%s: wlan_cfg_soc_attach failed\n", __func__);
  1519. goto fail2;
  1520. }
  1521. qdf_spinlock_create(&soc->peer_ref_mutex);
  1522. #ifdef notyet
  1523. if (wdi_event_attach(soc)) {
  1524. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1525. "%s: WDI event attach failed\n", __func__);
  1526. goto fail2;
  1527. }
  1528. #endif
  1529. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  1530. goto fail2;
  1531. }
  1532. return (void *)soc;
  1533. fail2:
  1534. htt_soc_detach(soc->htt_handle);
  1535. fail1:
  1536. qdf_mem_free(soc);
  1537. fail0:
  1538. return NULL;
  1539. }