dp_rx.h 33 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #ifndef RX_DATA_BUFFER_ALIGNMENT
  26. #define RX_DATA_BUFFER_ALIGNMENT 128
  27. #endif
  28. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  29. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  30. #endif
  31. #else /* RXDMA_OPTIMIZATION */
  32. #define RX_DATA_BUFFER_ALIGNMENT 4
  33. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  34. #endif /* RXDMA_OPTIMIZATION */
  35. #ifdef QCA_HOST2FW_RXBUF_RING
  36. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  37. /* RBM value used for re-injecting defragmented packets into REO */
  38. #define DP_DEFRAG_RBM HAL_RX_BUF_RBM_SW3_BM
  39. #else
  40. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  41. #define DP_DEFRAG_RBM DP_WBM2SW_RBM
  42. #endif /* QCA_HOST2FW_RXBUF_RING */
  43. #define RX_BUFFER_RESERVATION 0
  44. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  45. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  46. #define DP_PEER_METADATA_VDEV_ID_MASK 0x003f0000
  47. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  48. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  49. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  50. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  51. #define DP_PEER_METADATA_VDEV_ID_GET(_peer_metadata) \
  52. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  53. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  54. #define DP_RX_DESC_MAGIC 0xdec0de
  55. /**
  56. * struct dp_rx_desc
  57. *
  58. * @nbuf : VA of the "skb" posted
  59. * @rx_buf_start : VA of the original Rx buffer, before
  60. * movement of any skb->data pointer
  61. * @cookie : index into the sw array which holds
  62. * the sw Rx descriptors
  63. * Cookie space is 21 bits:
  64. * lower 18 bits -- index
  65. * upper 3 bits -- pool_id
  66. * @pool_id : pool Id for which this allocated.
  67. * Can only be used if there is no flow
  68. * steering
  69. * @in_use rx_desc is in use
  70. * @unmapped used to mark rx_desc an unmapped if the corresponding
  71. * nbuf is already unmapped
  72. */
  73. struct dp_rx_desc {
  74. qdf_nbuf_t nbuf;
  75. uint8_t *rx_buf_start;
  76. uint32_t cookie;
  77. uint8_t pool_id;
  78. #ifdef RX_DESC_DEBUG_CHECK
  79. uint32_t magic;
  80. #endif
  81. uint8_t in_use:1,
  82. unmapped:1;
  83. };
  84. /* RX Descriptor Multi Page memory alloc related */
  85. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  86. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  87. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  88. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  89. #define DP_RX_DESC_POOL_ID_SHIFT \
  90. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  91. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  92. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  93. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  94. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  95. DP_RX_DESC_PAGE_ID_SHIFT)
  96. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  97. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  98. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  99. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  100. DP_RX_DESC_POOL_ID_SHIFT)
  101. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  102. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  103. DP_RX_DESC_PAGE_ID_SHIFT)
  104. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  105. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  106. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  107. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  108. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  109. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  110. #define DP_RX_DESC_COOKIE_MAX \
  111. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  112. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  113. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  114. RX_DESC_COOKIE_POOL_ID_SHIFT)
  115. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  116. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  117. RX_DESC_COOKIE_INDEX_SHIFT)
  118. /* DOC: Offset to obtain LLC hdr
  119. *
  120. * In the case of Wifi parse error
  121. * to reach LLC header from beginning
  122. * of VLAN tag we need to skip 8 bytes.
  123. * Vlan_tag(4)+length(2)+length added
  124. * by HW(2) = 8 bytes.
  125. */
  126. #define DP_SKIP_VLAN 8
  127. /**
  128. * struct dp_rx_cached_buf - rx cached buffer
  129. * @list: linked list node
  130. * @buf: skb buffer
  131. */
  132. struct dp_rx_cached_buf {
  133. qdf_list_node_t node;
  134. qdf_nbuf_t buf;
  135. };
  136. /*
  137. *dp_rx_xor_block() - xor block of data
  138. *@b: destination data block
  139. *@a: source data block
  140. *@len: length of the data to process
  141. *
  142. *Returns: None
  143. */
  144. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  145. {
  146. qdf_size_t i;
  147. for (i = 0; i < len; i++)
  148. b[i] ^= a[i];
  149. }
  150. /*
  151. *dp_rx_rotl() - rotate the bits left
  152. *@val: unsigned integer input value
  153. *@bits: number of bits
  154. *
  155. *Returns: Integer with left rotated by number of 'bits'
  156. */
  157. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  158. {
  159. return (val << bits) | (val >> (32 - bits));
  160. }
  161. /*
  162. *dp_rx_rotr() - rotate the bits right
  163. *@val: unsigned integer input value
  164. *@bits: number of bits
  165. *
  166. *Returns: Integer with right rotated by number of 'bits'
  167. */
  168. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  169. {
  170. return (val >> bits) | (val << (32 - bits));
  171. }
  172. /*
  173. * dp_set_rx_queue() - set queue_mapping in skb
  174. * @nbuf: skb
  175. * @queue_id: rx queue_id
  176. *
  177. * Return: void
  178. */
  179. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  180. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  181. {
  182. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  183. return;
  184. }
  185. #else
  186. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  187. {
  188. }
  189. #endif
  190. /*
  191. *dp_rx_xswap() - swap the bits left
  192. *@val: unsigned integer input value
  193. *
  194. *Returns: Integer with bits swapped
  195. */
  196. static inline uint32_t dp_rx_xswap(uint32_t val)
  197. {
  198. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  199. }
  200. /*
  201. *dp_rx_get_le32_split() - get little endian 32 bits split
  202. *@b0: byte 0
  203. *@b1: byte 1
  204. *@b2: byte 2
  205. *@b3: byte 3
  206. *
  207. *Returns: Integer with split little endian 32 bits
  208. */
  209. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  210. uint8_t b3)
  211. {
  212. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  213. }
  214. /*
  215. *dp_rx_get_le32() - get little endian 32 bits
  216. *@b0: byte 0
  217. *@b1: byte 1
  218. *@b2: byte 2
  219. *@b3: byte 3
  220. *
  221. *Returns: Integer with little endian 32 bits
  222. */
  223. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  224. {
  225. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  226. }
  227. /*
  228. * dp_rx_put_le32() - put little endian 32 bits
  229. * @p: destination char array
  230. * @v: source 32-bit integer
  231. *
  232. * Returns: None
  233. */
  234. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  235. {
  236. p[0] = (v) & 0xff;
  237. p[1] = (v >> 8) & 0xff;
  238. p[2] = (v >> 16) & 0xff;
  239. p[3] = (v >> 24) & 0xff;
  240. }
  241. /* Extract michal mic block of data */
  242. #define dp_rx_michael_block(l, r) \
  243. do { \
  244. r ^= dp_rx_rotl(l, 17); \
  245. l += r; \
  246. r ^= dp_rx_xswap(l); \
  247. l += r; \
  248. r ^= dp_rx_rotl(l, 3); \
  249. l += r; \
  250. r ^= dp_rx_rotr(l, 2); \
  251. l += r; \
  252. } while (0)
  253. /**
  254. * struct dp_rx_desc_list_elem_t
  255. *
  256. * @next : Next pointer to form free list
  257. * @rx_desc : DP Rx descriptor
  258. */
  259. union dp_rx_desc_list_elem_t {
  260. union dp_rx_desc_list_elem_t *next;
  261. struct dp_rx_desc rx_desc;
  262. };
  263. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  264. /**
  265. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  266. * @page_id: Page ID
  267. * @offset: Offset of the descriptor element
  268. *
  269. * Return: RX descriptor element
  270. */
  271. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  272. struct rx_desc_pool *rx_pool);
  273. static inline
  274. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  275. struct rx_desc_pool *pool,
  276. uint32_t cookie)
  277. {
  278. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  279. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  280. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  281. struct rx_desc_pool *rx_desc_pool;
  282. union dp_rx_desc_list_elem_t *rx_desc_elem;
  283. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  284. return NULL;
  285. rx_desc_pool = &pool[pool_id];
  286. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  287. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  288. rx_desc_pool->elem_size * offset);
  289. return &rx_desc_elem->rx_desc;
  290. }
  291. /**
  292. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  293. * the Rx descriptor on Rx DMA source ring buffer
  294. * @soc: core txrx main context
  295. * @cookie: cookie used to lookup virtual address
  296. *
  297. * Return: Pointer to the Rx descriptor
  298. */
  299. static inline
  300. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  301. uint32_t cookie)
  302. {
  303. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  304. }
  305. /**
  306. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  307. * the Rx descriptor on monitor ring buffer
  308. * @soc: core txrx main context
  309. * @cookie: cookie used to lookup virtual address
  310. *
  311. * Return: Pointer to the Rx descriptor
  312. */
  313. static inline
  314. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  315. uint32_t cookie)
  316. {
  317. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  318. }
  319. /**
  320. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  321. * the Rx descriptor on monitor status ring buffer
  322. * @soc: core txrx main context
  323. * @cookie: cookie used to lookup virtual address
  324. *
  325. * Return: Pointer to the Rx descriptor
  326. */
  327. static inline
  328. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  329. uint32_t cookie)
  330. {
  331. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  332. }
  333. #else
  334. /**
  335. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  336. * the Rx descriptor on Rx DMA source ring buffer
  337. * @soc: core txrx main context
  338. * @cookie: cookie used to lookup virtual address
  339. *
  340. * Return: void *: Virtual Address of the Rx descriptor
  341. */
  342. static inline
  343. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  344. {
  345. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  346. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  347. struct rx_desc_pool *rx_desc_pool;
  348. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  349. return NULL;
  350. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  351. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  352. return NULL;
  353. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  354. }
  355. /**
  356. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  357. * the Rx descriptor on monitor ring buffer
  358. * @soc: core txrx main context
  359. * @cookie: cookie used to lookup virtual address
  360. *
  361. * Return: void *: Virtual Address of the Rx descriptor
  362. */
  363. static inline
  364. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  365. {
  366. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  367. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  368. /* TODO */
  369. /* Add sanity for pool_id & index */
  370. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  371. }
  372. /**
  373. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  374. * the Rx descriptor on monitor status ring buffer
  375. * @soc: core txrx main context
  376. * @cookie: cookie used to lookup virtual address
  377. *
  378. * Return: void *: Virtual Address of the Rx descriptor
  379. */
  380. static inline
  381. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  382. {
  383. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  384. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  385. /* TODO */
  386. /* Add sanity for pool_id & index */
  387. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  388. }
  389. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  390. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  391. union dp_rx_desc_list_elem_t **local_desc_list,
  392. union dp_rx_desc_list_elem_t **tail,
  393. uint16_t pool_id,
  394. struct rx_desc_pool *rx_desc_pool);
  395. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  396. struct rx_desc_pool *rx_desc_pool,
  397. uint16_t num_descs,
  398. union dp_rx_desc_list_elem_t **desc_list,
  399. union dp_rx_desc_list_elem_t **tail);
  400. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  401. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  402. void dp_print_napi_stats(struct dp_soc *soc);
  403. /**
  404. * dp_rx_vdev_detach() - detach vdev from dp rx
  405. * @vdev: virtual device instance
  406. *
  407. * Return: QDF_STATUS_SUCCESS: success
  408. * QDF_STATUS_E_RESOURCES: Error return
  409. */
  410. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  411. uint32_t
  412. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  413. uint8_t reo_ring_num,
  414. uint32_t quota);
  415. /**
  416. * dp_rx_err_process() - Processes error frames routed to REO error ring
  417. * @int_ctx: pointer to DP interrupt context
  418. * @soc: core txrx main context
  419. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  420. * @quota: No. of units (packets) that can be serviced in one shot.
  421. *
  422. * This function implements error processing and top level demultiplexer
  423. * for all the frames routed to REO error ring.
  424. *
  425. * Return: uint32_t: No. of elements processed
  426. */
  427. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  428. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  429. /**
  430. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  431. * @int_ctx: pointer to DP interrupt context
  432. * @soc: core txrx main context
  433. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  434. * @quota: No. of units (packets) that can be serviced in one shot.
  435. *
  436. * This function implements error processing and top level demultiplexer
  437. * for all the frames routed to WBM2HOST sw release ring.
  438. *
  439. * Return: uint32_t: No. of elements processed
  440. */
  441. uint32_t
  442. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  443. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  444. /**
  445. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  446. * multiple nbufs.
  447. * @nbuf: pointer to the first msdu of an amsdu.
  448. *
  449. * This function implements the creation of RX frag_list for cases
  450. * where an MSDU is spread across multiple nbufs.
  451. *
  452. * Return: returns the head nbuf which contains complete frag_list.
  453. */
  454. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf);
  455. /*
  456. * dp_rx_desc_pool_alloc() - create a pool of software rx_descs
  457. * at the time of dp rx initialization
  458. *
  459. * @soc: core txrx main context
  460. * @pool_id: pool_id which is one of 3 mac_ids
  461. * @pool_size: number of Rx descriptor in the pool
  462. * @rx_desc_pool: rx descriptor pool pointer
  463. *
  464. * Return: QDF status
  465. */
  466. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc, uint32_t pool_id,
  467. uint32_t pool_size, struct rx_desc_pool *pool);
  468. /*
  469. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  470. * de-initialization of wifi module.
  471. *
  472. * @soc: core txrx main context
  473. * @pool_id: pool_id which is one of 3 mac_ids
  474. * @rx_desc_pool: rx descriptor pool pointer
  475. *
  476. * Return: None
  477. */
  478. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  479. struct rx_desc_pool *rx_desc_pool);
  480. /*
  481. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  482. * de-initialization of wifi module.
  483. *
  484. * @soc: core txrx main context
  485. * @pool_id: pool_id which is one of 3 mac_ids
  486. * @rx_desc_pool: rx descriptor pool pointer
  487. *
  488. * Return: None
  489. */
  490. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  491. struct rx_desc_pool *rx_desc_pool);
  492. /*
  493. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  494. * de-initialization of wifi module.
  495. *
  496. * @soc: core txrx main context
  497. * @rx_desc_pool: rx descriptor pool pointer
  498. *
  499. * Return: None
  500. */
  501. void dp_rx_desc_pool_free(struct dp_soc *soc,
  502. struct rx_desc_pool *rx_desc_pool);
  503. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  504. struct dp_peer *peer);
  505. /**
  506. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  507. *
  508. * @head: pointer to the head of local free list
  509. * @tail: pointer to the tail of local free list
  510. * @new: new descriptor that is added to the free list
  511. *
  512. * Return: void:
  513. */
  514. static inline
  515. void dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  516. union dp_rx_desc_list_elem_t **tail,
  517. struct dp_rx_desc *new)
  518. {
  519. qdf_assert(head && new);
  520. new->nbuf = NULL;
  521. new->in_use = 0;
  522. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  523. *head = (union dp_rx_desc_list_elem_t *)new;
  524. /* reset tail if head->next is NULL */
  525. if (!*tail || !(*head)->next)
  526. *tail = *head;
  527. }
  528. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  529. uint8_t mac_id);
  530. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  531. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  532. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  533. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  534. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  535. uint16_t peer_id, uint8_t tid);
  536. #define DP_RX_LIST_APPEND(head, tail, elem) \
  537. do { \
  538. if (!(head)) { \
  539. (head) = (elem); \
  540. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  541. } else { \
  542. qdf_nbuf_set_next((tail), (elem)); \
  543. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  544. } \
  545. (tail) = (elem); \
  546. qdf_nbuf_set_next((tail), NULL); \
  547. } while (0)
  548. /*for qcn9000 emulation the pcie is complete phy and no address restrictions*/
  549. #if !defined(BUILD_X86) || defined(QCA_WIFI_QCN9000)
  550. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  551. qdf_dma_addr_t *paddr, struct rx_desc_pool *rx_desc_pool)
  552. {
  553. return QDF_STATUS_SUCCESS;
  554. }
  555. #else
  556. #define MAX_RETRY 100
  557. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  558. qdf_dma_addr_t *paddr, struct rx_desc_pool *rx_desc_pool)
  559. {
  560. uint32_t nbuf_retry = 0;
  561. int32_t ret;
  562. const uint32_t x86_phy_addr = 0x50000000;
  563. /*
  564. * in M2M emulation platforms (x86) the memory below 0x50000000
  565. * is reserved for target use, so any memory allocated in this
  566. * region should not be used by host
  567. */
  568. do {
  569. if (qdf_likely(*paddr > x86_phy_addr))
  570. return QDF_STATUS_SUCCESS;
  571. else {
  572. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  573. "phy addr %pK exceeded 0x50000000 trying again",
  574. paddr);
  575. nbuf_retry++;
  576. if ((*rx_netbuf)) {
  577. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  578. QDF_DMA_FROM_DEVICE);
  579. /* Not freeing buffer intentionally.
  580. * Observed that same buffer is getting
  581. * re-allocated resulting in longer load time
  582. * WMI init timeout.
  583. * This buffer is anyway not useful so skip it.
  584. **/
  585. }
  586. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  587. rx_desc_pool->buf_size,
  588. RX_BUFFER_RESERVATION,
  589. rx_desc_pool->buf_alignment,
  590. FALSE);
  591. if (qdf_unlikely(!(*rx_netbuf)))
  592. return QDF_STATUS_E_FAILURE;
  593. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  594. QDF_DMA_FROM_DEVICE);
  595. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  596. qdf_nbuf_free(*rx_netbuf);
  597. *rx_netbuf = NULL;
  598. continue;
  599. }
  600. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  601. }
  602. } while (nbuf_retry < MAX_RETRY);
  603. if ((*rx_netbuf)) {
  604. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  605. QDF_DMA_FROM_DEVICE);
  606. qdf_nbuf_free(*rx_netbuf);
  607. }
  608. return QDF_STATUS_E_FAILURE;
  609. }
  610. #endif
  611. /**
  612. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  613. * the MSDU Link Descriptor
  614. * @soc: core txrx main context
  615. * @buf_info: buf_info include cookie that used to lookup virtual address of
  616. * link descriptor Normally this is just an index into a per SOC array.
  617. *
  618. * This is the VA of the link descriptor, that HAL layer later uses to
  619. * retrieve the list of MSDU's for a given MPDU.
  620. *
  621. * Return: void *: Virtual Address of the Rx descriptor
  622. */
  623. static inline
  624. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  625. struct hal_buf_info *buf_info)
  626. {
  627. void *link_desc_va;
  628. uint32_t bank_id = LINK_DESC_COOKIE_BANK_ID(buf_info->sw_cookie);
  629. /* TODO */
  630. /* Add sanity for cookie */
  631. link_desc_va = soc->link_desc_banks[bank_id].base_vaddr +
  632. (buf_info->paddr -
  633. soc->link_desc_banks[bank_id].base_paddr);
  634. return link_desc_va;
  635. }
  636. /**
  637. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  638. * the MSDU Link Descriptor
  639. * @pdev: core txrx pdev context
  640. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  641. * link descriptor. Normally this is just an index into a per pdev array.
  642. *
  643. * This is the VA of the link descriptor in monitor mode destination ring,
  644. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  645. *
  646. * Return: void *: Virtual Address of the Rx descriptor
  647. */
  648. static inline
  649. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  650. struct hal_buf_info *buf_info,
  651. int mac_id)
  652. {
  653. void *link_desc_va;
  654. /* TODO */
  655. /* Add sanity for cookie */
  656. link_desc_va =
  657. pdev->soc->mon_link_desc_banks[mac_id][buf_info->sw_cookie]
  658. .base_vaddr +
  659. (buf_info->paddr -
  660. pdev->soc->mon_link_desc_banks[mac_id][buf_info->sw_cookie]
  661. .base_paddr);
  662. return link_desc_va;
  663. }
  664. /**
  665. * dp_rx_defrag_concat() - Concatenate the fragments
  666. *
  667. * @dst: destination pointer to the buffer
  668. * @src: source pointer from where the fragment payload is to be copied
  669. *
  670. * Return: QDF_STATUS
  671. */
  672. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  673. {
  674. /*
  675. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  676. * to provide space for src, the headroom portion is copied from
  677. * the original dst buffer to the larger new dst buffer.
  678. * (This is needed, because the headroom of the dst buffer
  679. * contains the rx desc.)
  680. */
  681. if (!qdf_nbuf_cat(dst, src)) {
  682. /*
  683. * qdf_nbuf_cat does not free the src memory.
  684. * Free src nbuf before returning
  685. * For failure case the caller takes of freeing the nbuf
  686. */
  687. qdf_nbuf_free(src);
  688. return QDF_STATUS_SUCCESS;
  689. }
  690. return QDF_STATUS_E_DEFRAG_ERROR;
  691. }
  692. #ifndef FEATURE_WDS
  693. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  694. {
  695. return QDF_STATUS_SUCCESS;
  696. }
  697. static inline void
  698. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  699. uint8_t *rx_tlv_hdr,
  700. struct dp_peer *ta_peer,
  701. qdf_nbuf_t nbuf)
  702. {
  703. }
  704. #endif
  705. /*
  706. * dp_rx_desc_dump() - dump the sw rx descriptor
  707. *
  708. * @rx_desc: sw rx descriptor
  709. */
  710. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  711. {
  712. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  713. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  714. rx_desc->in_use, rx_desc->unmapped);
  715. }
  716. /*
  717. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  718. * In qwrap mode, packets originated from
  719. * any vdev should not loopback and
  720. * should be dropped.
  721. * @vdev: vdev on which rx packet is received
  722. * @nbuf: rx pkt
  723. *
  724. */
  725. #if ATH_SUPPORT_WRAP
  726. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  727. qdf_nbuf_t nbuf)
  728. {
  729. struct dp_vdev *psta_vdev;
  730. struct dp_pdev *pdev = vdev->pdev;
  731. uint8_t *data = qdf_nbuf_data(nbuf);
  732. if (qdf_unlikely(vdev->proxysta_vdev)) {
  733. /* In qwrap isolation mode, allow loopback packets as all
  734. * packets go to RootAP and Loopback on the mpsta.
  735. */
  736. if (vdev->isolation_vdev)
  737. return false;
  738. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  739. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  740. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  741. &data[QDF_MAC_ADDR_SIZE],
  742. QDF_MAC_ADDR_SIZE))) {
  743. /* Drop packet if source address is equal to
  744. * any of the vdev addresses.
  745. */
  746. return true;
  747. }
  748. }
  749. }
  750. return false;
  751. }
  752. #else
  753. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  754. qdf_nbuf_t nbuf)
  755. {
  756. return false;
  757. }
  758. #endif
  759. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  760. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  761. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  762. #include "dp_rx_tag.h"
  763. #endif
  764. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  765. /**
  766. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  767. * and set the corresponding tag in QDF packet
  768. * @soc: core txrx main context
  769. * @vdev: vdev on which the packet is received
  770. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  771. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  772. * @ring_index: REO ring number, not used for error & monitor ring
  773. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  774. * @is_update_stats: flag to indicate whether to update stats or not
  775. * Return: void
  776. */
  777. static inline void
  778. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  779. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  780. uint16_t ring_index,
  781. bool is_reo_exception, bool is_update_stats)
  782. {
  783. }
  784. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  785. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  786. /**
  787. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  788. * and set the corresponding tag in QDF packet
  789. * @soc: core txrx main context
  790. * @vdev: vdev on which the packet is received
  791. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  792. * @rx_tlv_hdr: base address where the RX TLVs starts
  793. * @is_update_stats: flag to indicate whether to update stats or not
  794. *
  795. * Return: void
  796. */
  797. static inline void
  798. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  799. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  800. {
  801. }
  802. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  803. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  804. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  805. /**
  806. * dp_rx_mon_update_protocol_flow_tag() - Performs necessary checks for monitor
  807. * mode and then tags appropriate packets
  808. * @soc: core txrx main context
  809. * @vdev: pdev on which packet is received
  810. * @msdu: QDF packet buffer on which the protocol tag should be set
  811. * @rx_desc: base address where the RX TLVs start
  812. * Return: void
  813. */
  814. static inline
  815. void dp_rx_mon_update_protocol_flow_tag(struct dp_soc *soc,
  816. struct dp_pdev *dp_pdev,
  817. qdf_nbuf_t msdu, void *rx_desc)
  818. {
  819. }
  820. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG || WLAN_SUPPORT_RX_FLOW_TAG */
  821. /*
  822. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  823. * called during dp rx initialization
  824. * and at the end of dp_rx_process.
  825. *
  826. * @soc: core txrx main context
  827. * @mac_id: mac_id which is one of 3 mac_ids
  828. * @dp_rxdma_srng: dp rxdma circular ring
  829. * @rx_desc_pool: Pointer to free Rx descriptor pool
  830. * @num_req_buffers: number of buffer to be replenished
  831. * @desc_list: list of descs if called from dp_rx_process
  832. * or NULL during dp rx initialization or out of buffer
  833. * interrupt.
  834. * @tail: tail of descs list
  835. * Return: return success or failure
  836. */
  837. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  838. struct dp_srng *dp_rxdma_srng,
  839. struct rx_desc_pool *rx_desc_pool,
  840. uint32_t num_req_buffers,
  841. union dp_rx_desc_list_elem_t **desc_list,
  842. union dp_rx_desc_list_elem_t **tail);
  843. /*
  844. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  845. * called during dp rx initialization
  846. *
  847. * @soc: core txrx main context
  848. * @mac_id: mac_id which is one of 3 mac_ids
  849. * @dp_rxdma_srng: dp rxdma circular ring
  850. * @rx_desc_pool: Pointer to free Rx descriptor pool
  851. * @num_req_buffers: number of buffer to be replenished
  852. *
  853. * Return: return success or failure
  854. */
  855. QDF_STATUS
  856. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  857. struct dp_srng *dp_rxdma_srng,
  858. struct rx_desc_pool *rx_desc_pool,
  859. uint32_t num_req_buffers);
  860. /**
  861. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  862. * (WBM), following error handling
  863. *
  864. * @soc: core DP main context
  865. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  866. * @buf_addr_info: void pointer to the buffer_addr_info
  867. * @bm_action: put to idle_list or release to msdu_list
  868. *
  869. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  870. */
  871. QDF_STATUS
  872. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  873. uint8_t bm_action);
  874. /**
  875. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  876. * (WBM) by address
  877. *
  878. * @soc: core DP main context
  879. * @link_desc_addr: link descriptor addr
  880. *
  881. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  882. */
  883. QDF_STATUS
  884. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  885. hal_buff_addrinfo_t link_desc_addr,
  886. uint8_t bm_action);
  887. /**
  888. * dp_rxdma_err_process() - RxDMA error processing functionality
  889. * @soc: core txrx main contex
  890. * @mac_id: mac id which is one of 3 mac_ids
  891. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  892. * @quota: No. of units (packets) that can be serviced in one shot.
  893. *
  894. * Return: num of buffers processed
  895. */
  896. uint32_t
  897. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  898. uint32_t mac_id, uint32_t quota);
  899. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  900. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  901. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  902. uint8_t *rx_tlv_hdr);
  903. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  904. struct dp_peer *peer);
  905. qdf_nbuf_t
  906. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev);
  907. /*
  908. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  909. *
  910. * @soc: core txrx main context
  911. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  912. * @ring_desc: opaque pointer to the RX ring descriptor
  913. * @rx_desc: host rs descriptor
  914. *
  915. * Return: void
  916. */
  917. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  918. hal_ring_handle_t hal_ring_hdl,
  919. hal_ring_desc_t ring_desc,
  920. struct dp_rx_desc *rx_desc);
  921. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  922. #ifdef RX_DESC_DEBUG_CHECK
  923. /**
  924. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  925. * @rx_desc: rx descriptor pointer
  926. *
  927. * Return: true, if magic is correct, else false.
  928. */
  929. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  930. {
  931. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  932. return false;
  933. rx_desc->magic = 0;
  934. return true;
  935. }
  936. /**
  937. * dp_rx_desc_prep() - prepare rx desc
  938. * @rx_desc: rx descriptor pointer to be prepared
  939. * @nbuf: nbuf to be associated with rx_desc
  940. *
  941. * Note: assumption is that we are associating a nbuf which is mapped
  942. *
  943. * Return: none
  944. */
  945. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  946. {
  947. rx_desc->magic = DP_RX_DESC_MAGIC;
  948. rx_desc->nbuf = nbuf;
  949. rx_desc->unmapped = 0;
  950. }
  951. #else
  952. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  953. {
  954. return true;
  955. }
  956. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  957. {
  958. rx_desc->nbuf = nbuf;
  959. rx_desc->unmapped = 0;
  960. }
  961. #endif /* RX_DESC_DEBUG_CHECK */
  962. #ifdef RXDMA_ERR_PKT_DROP
  963. /**
  964. * dp_rxdma_err_nbuf_drop(): Function to drop rxdma err frame
  965. * @nbuf: buffer pointer
  966. *
  967. * return: bool: true if RXDMA_ERR_PKT_DROP is enabled
  968. */
  969. static inline bool dp_rxdma_err_nbuf_drop(void)
  970. {
  971. return true;
  972. }
  973. #else
  974. static inline bool dp_rxdma_err_nbuf_drop(void)
  975. {
  976. return false;
  977. }
  978. #endif
  979. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  980. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  981. uint8_t err_code, uint8_t mac_id);
  982. #ifdef PEER_CACHE_RX_PKTS
  983. /**
  984. * dp_rx_flush_rx_cached() - flush cached rx frames
  985. * @peer: peer
  986. * @drop: set flag to drop frames
  987. *
  988. * Return: None
  989. */
  990. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop);
  991. #else
  992. static inline void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  993. {
  994. }
  995. #endif
  996. #ifndef QCA_MULTIPASS_SUPPORT
  997. static inline
  998. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf, uint8_t tid)
  999. {
  1000. return false;
  1001. }
  1002. #else
  1003. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf,
  1004. uint8_t tid);
  1005. #endif
  1006. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1007. static inline
  1008. void dp_peer_set_rx_capture_enabled(struct dp_peer *peer_handle, bool value)
  1009. {
  1010. }
  1011. #endif
  1012. /**
  1013. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1014. * Caller to hold peer refcount and check for valid peer
  1015. * @soc: soc
  1016. * @vdev: vdev
  1017. * @peer: peer
  1018. * @nbuf_head: skb list head
  1019. * @nbuf_tail: skb list tail
  1020. *
  1021. * Return: None
  1022. */
  1023. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1024. struct dp_vdev *vdev,
  1025. struct dp_peer *peer,
  1026. qdf_nbuf_t nbuf_head,
  1027. qdf_nbuf_t nbuf_tail);
  1028. #endif /* _DP_RX_H */