rouleur.c 71 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <sound/tlv.h>
  17. #include <soc/soundwire.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include "internal.h"
  21. #include "rouleur.h"
  22. #include <asoc/wcdcal-hwdep.h>
  23. #include "rouleur-registers.h"
  24. #include "pm2250-spmi.h"
  25. #include <asoc/msm-cdc-pinctrl.h>
  26. #include <dt-bindings/sound/audio-codec-port-types.h>
  27. #include <asoc/msm-cdc-supply.h>
  28. #define DRV_NAME "rouleur_codec"
  29. #define NUM_SWRS_DT_PARAMS 5
  30. #define ROULEUR_VERSION_1_0 1
  31. #define ROULEUR_VERSION_ENTRY_SIZE 32
  32. #define NUM_ATTEMPTS 5
  33. enum {
  34. CODEC_TX = 0,
  35. CODEC_RX,
  36. };
  37. enum {
  38. ALLOW_VPOS_DISABLE,
  39. HPH_COMP_DELAY,
  40. HPH_PA_DELAY,
  41. AMIC2_BCS_ENABLE,
  42. WCD_SUPPLIES_LPM_MODE,
  43. };
  44. /* TODO: Check on the step values */
  45. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  46. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  47. static int rouleur_handle_post_irq(void *data);
  48. static int rouleur_reset(struct device *dev, int val);
  49. static const struct regmap_irq ROULEUR_IRQs[ROULEUR_NUM_IRQS] = {
  50. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  51. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  52. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  53. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  54. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_SW_DET, 0, 0x10),
  55. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_OCP_INT, 0, 0x20),
  56. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_CNP_INT, 0, 0x40),
  57. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_OCP_INT, 0, 0x80),
  58. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_CNP_INT, 1, 0x01),
  59. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_CNP_INT, 1, 0x02),
  60. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_OCP_INT, 1, 0x04),
  61. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_CNP_INT, 1, 0x08),
  62. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_OCP_INT, 1, 0x10),
  63. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  64. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  65. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  66. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  67. };
  68. static struct regmap_irq_chip rouleur_regmap_irq_chip = {
  69. .name = "rouleur",
  70. .irqs = ROULEUR_IRQs,
  71. .num_irqs = ARRAY_SIZE(ROULEUR_IRQs),
  72. .num_regs = 3,
  73. .status_base = ROULEUR_DIG_SWR_INTR_STATUS_0,
  74. .mask_base = ROULEUR_DIG_SWR_INTR_MASK_0,
  75. .ack_base = ROULEUR_DIG_SWR_INTR_CLEAR_0,
  76. .use_ack = 1,
  77. .type_base = ROULEUR_DIG_SWR_INTR_LEVEL_0,
  78. .runtime_pm = false,
  79. .handle_post_irq = rouleur_handle_post_irq,
  80. .irq_drv_data = NULL,
  81. };
  82. static int rouleur_handle_post_irq(void *data)
  83. {
  84. struct rouleur_priv *rouleur = data;
  85. u32 status1 = 0, status2 = 0, status3 = 0;
  86. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_0, &status1);
  87. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_1, &status2);
  88. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_2, &status3);
  89. rouleur->tx_swr_dev->slave_irq_pending =
  90. ((status1 || status2 || status3) ? true : false);
  91. return IRQ_HANDLED;
  92. }
  93. static int rouleur_init_reg(struct snd_soc_component *component)
  94. {
  95. /* Disable HPH OCP */
  96. snd_soc_component_update_bits(component, ROULEUR_ANA_HPHPA_CNP_CTL_2,
  97. 0x03, 0x00);
  98. /* Enable surge protection */
  99. snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
  100. 0xC0, 0xC0);
  101. /* Disable mic bias pull down */
  102. snd_soc_component_update_bits(component, ROULEUR_ANA_MICBIAS_MICB_1_2_EN,
  103. 0x01, 0x00);
  104. return 0;
  105. }
  106. static int rouleur_set_port_params(struct snd_soc_component *component,
  107. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  108. u8 *ch_mask, u32 *ch_rate,
  109. u8 *port_type, u8 path)
  110. {
  111. int i, j;
  112. u8 num_ports = 0;
  113. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  114. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  115. switch (path) {
  116. case CODEC_RX:
  117. map = &rouleur->rx_port_mapping;
  118. num_ports = rouleur->num_rx_ports;
  119. break;
  120. case CODEC_TX:
  121. map = &rouleur->tx_port_mapping;
  122. num_ports = rouleur->num_tx_ports;
  123. break;
  124. default:
  125. dev_err(component->dev, "%s Invalid path: %d\n",
  126. __func__, path);
  127. return -EINVAL;
  128. }
  129. for (i = 0; i <= num_ports; i++) {
  130. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  131. if ((*map)[i][j].slave_port_type == slv_prt_type)
  132. goto found;
  133. }
  134. }
  135. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  136. __func__, slv_prt_type);
  137. return -EINVAL;
  138. found:
  139. *port_id = i;
  140. *num_ch = (*map)[i][j].num_ch;
  141. *ch_mask = (*map)[i][j].ch_mask;
  142. *ch_rate = (*map)[i][j].ch_rate;
  143. *port_type = (*map)[i][j].master_port_type;
  144. return 0;
  145. }
  146. static int rouleur_parse_port_mapping(struct device *dev,
  147. char *prop, u8 path)
  148. {
  149. u32 *dt_array, map_size, map_length;
  150. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  151. u32 slave_port_type, master_port_type;
  152. u32 i, ch_iter = 0;
  153. int ret = 0;
  154. u8 *num_ports = NULL;
  155. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  156. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  157. switch (path) {
  158. case CODEC_RX:
  159. map = &rouleur->rx_port_mapping;
  160. num_ports = &rouleur->num_rx_ports;
  161. break;
  162. case CODEC_TX:
  163. map = &rouleur->tx_port_mapping;
  164. num_ports = &rouleur->num_tx_ports;
  165. break;
  166. default:
  167. dev_err(dev, "%s Invalid path: %d\n",
  168. __func__, path);
  169. return -EINVAL;
  170. }
  171. if (!of_find_property(dev->of_node, prop,
  172. &map_size)) {
  173. dev_err(dev, "missing port mapping prop %s\n", prop);
  174. ret = -EINVAL;
  175. goto err;
  176. }
  177. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  178. dt_array = kzalloc(map_size, GFP_KERNEL);
  179. if (!dt_array) {
  180. ret = -ENOMEM;
  181. goto err;
  182. }
  183. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  184. NUM_SWRS_DT_PARAMS * map_length);
  185. if (ret) {
  186. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  187. __func__, prop);
  188. ret = -EINVAL;
  189. goto err_pdata_fail;
  190. }
  191. for (i = 0; i < map_length; i++) {
  192. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  193. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  194. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  195. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  196. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  197. if (port_num != old_port_num)
  198. ch_iter = 0;
  199. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  200. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  201. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  202. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  203. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  204. old_port_num = port_num;
  205. }
  206. *num_ports = port_num;
  207. err_pdata_fail:
  208. kfree(dt_array);
  209. err:
  210. return ret;
  211. }
  212. static int rouleur_tx_connect_port(struct snd_soc_component *component,
  213. u8 slv_port_type, u8 enable)
  214. {
  215. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  216. u8 port_id;
  217. u8 num_ch;
  218. u8 ch_mask;
  219. u32 ch_rate;
  220. u8 port_type;
  221. u8 num_port = 1;
  222. int ret = 0;
  223. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  224. &num_ch, &ch_mask, &ch_rate,
  225. &port_type, CODEC_TX);
  226. if (ret) {
  227. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  228. __func__, ret);
  229. return ret;
  230. }
  231. if (enable)
  232. ret = swr_connect_port(rouleur->tx_swr_dev, &port_id,
  233. num_port, &ch_mask, &ch_rate,
  234. &num_ch, &port_type);
  235. else
  236. ret = swr_disconnect_port(rouleur->tx_swr_dev, &port_id,
  237. num_port, &ch_mask, &port_type);
  238. return ret;
  239. }
  240. static int rouleur_rx_connect_port(struct snd_soc_component *component,
  241. u8 slv_port_type, u8 enable)
  242. {
  243. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  244. u8 port_id;
  245. u8 num_ch;
  246. u8 ch_mask;
  247. u32 ch_rate;
  248. u8 port_type;
  249. u8 num_port = 1;
  250. int ret = 0;
  251. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  252. &num_ch, &ch_mask, &ch_rate,
  253. &port_type, CODEC_RX);
  254. if (ret) {
  255. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  256. __func__, ret);
  257. return ret;
  258. }
  259. if (enable)
  260. ret = swr_connect_port(rouleur->rx_swr_dev, &port_id,
  261. num_port, &ch_mask, &ch_rate,
  262. &num_ch, &port_type);
  263. else
  264. ret = swr_disconnect_port(rouleur->rx_swr_dev, &port_id,
  265. num_port, &ch_mask, &port_type);
  266. return ret;
  267. }
  268. int rouleur_global_mbias_enable(struct snd_soc_component *component)
  269. {
  270. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  271. mutex_lock(&rouleur->main_bias_lock);
  272. if (rouleur->mbias_cnt == 0) {
  273. snd_soc_component_update_bits(component,
  274. ROULEUR_ANA_MBIAS_EN, 0x20, 0x20);
  275. snd_soc_component_update_bits(component,
  276. ROULEUR_ANA_MBIAS_EN, 0x10, 0x10);
  277. usleep_range(1000, 1100);
  278. }
  279. rouleur->mbias_cnt++;
  280. mutex_unlock(&rouleur->main_bias_lock);
  281. return 0;
  282. }
  283. int rouleur_global_mbias_disable(struct snd_soc_component *component)
  284. {
  285. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  286. mutex_lock(&rouleur->main_bias_lock);
  287. if (rouleur->mbias_cnt == 0) {
  288. dev_dbg(rouleur->dev, "%s:mbias already disabled\n", __func__);
  289. mutex_unlock(&rouleur->main_bias_lock);
  290. return 0;
  291. }
  292. rouleur->mbias_cnt--;
  293. if (rouleur->mbias_cnt == 0) {
  294. snd_soc_component_update_bits(component,
  295. ROULEUR_ANA_MBIAS_EN, 0x10, 0x00);
  296. snd_soc_component_update_bits(component,
  297. ROULEUR_ANA_MBIAS_EN, 0x20, 0x00);
  298. }
  299. mutex_unlock(&rouleur->main_bias_lock);
  300. return 0;
  301. }
  302. static int rouleur_rx_clk_enable(struct snd_soc_component *component)
  303. {
  304. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  305. mutex_lock(&rouleur->rx_clk_lock);
  306. if (rouleur->rx_clk_cnt == 0) {
  307. snd_soc_component_update_bits(component,
  308. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x10);
  309. snd_soc_component_update_bits(component,
  310. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x20);
  311. usleep_range(5000, 5100);
  312. rouleur_global_mbias_enable(component);
  313. snd_soc_component_update_bits(component,
  314. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x11);
  315. snd_soc_component_update_bits(component,
  316. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
  317. snd_soc_component_update_bits(component,
  318. ROULEUR_ANA_NCP_EN, 0x01, 0x01);
  319. usleep_range(500, 510);
  320. }
  321. rouleur->rx_clk_cnt++;
  322. mutex_unlock(&rouleur->rx_clk_lock);
  323. return 0;
  324. }
  325. static int rouleur_rx_clk_disable(struct snd_soc_component *component)
  326. {
  327. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  328. mutex_lock(&rouleur->rx_clk_lock);
  329. if (rouleur->rx_clk_cnt == 0) {
  330. dev_dbg(rouleur->dev, "%s:clk already disabled\n", __func__);
  331. mutex_unlock(&rouleur->rx_clk_lock);
  332. return 0;
  333. }
  334. rouleur->rx_clk_cnt--;
  335. if (rouleur->rx_clk_cnt == 0) {
  336. snd_soc_component_update_bits(component,
  337. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
  338. snd_soc_component_update_bits(component,
  339. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x00);
  340. snd_soc_component_update_bits(component,
  341. ROULEUR_ANA_NCP_EN, 0x01, 0x00);
  342. snd_soc_component_update_bits(component,
  343. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
  344. snd_soc_component_update_bits(component,
  345. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
  346. rouleur_global_mbias_disable(component);
  347. }
  348. mutex_unlock(&rouleur->rx_clk_lock);
  349. return 0;
  350. }
  351. /*
  352. * rouleur_soc_get_mbhc: get rouleur_mbhc handle of corresponding component
  353. * @component: handle to snd_soc_component *
  354. *
  355. * return rouleur_mbhc handle or error code in case of failure
  356. */
  357. struct rouleur_mbhc *rouleur_soc_get_mbhc(struct snd_soc_component *component)
  358. {
  359. struct rouleur_priv *rouleur;
  360. if (!component) {
  361. pr_err("%s: Invalid params, NULL component\n", __func__);
  362. return NULL;
  363. }
  364. rouleur = snd_soc_component_get_drvdata(component);
  365. if (!rouleur) {
  366. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  367. return NULL;
  368. }
  369. return rouleur->mbhc;
  370. }
  371. EXPORT_SYMBOL(rouleur_soc_get_mbhc);
  372. static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  373. struct snd_kcontrol *kcontrol,
  374. int event)
  375. {
  376. struct snd_soc_component *component =
  377. snd_soc_dapm_to_component(w->dapm);
  378. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  379. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  380. w->name, event);
  381. switch (event) {
  382. case SND_SOC_DAPM_PRE_PMU:
  383. rouleur_rx_clk_enable(component);
  384. snd_soc_component_update_bits(component,
  385. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  386. 0x02, 0x02);
  387. snd_soc_component_update_bits(component,
  388. ROULEUR_SWR_HPHPA_HD2,
  389. 0x38, 0x38);
  390. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  391. break;
  392. case SND_SOC_DAPM_POST_PMU:
  393. if (rouleur->comp1_enable) {
  394. snd_soc_component_update_bits(component,
  395. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  396. 0x02, 0x02);
  397. if (rouleur->comp2_enable)
  398. snd_soc_component_update_bits(component,
  399. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  400. 0x01, 0x01);
  401. /*
  402. * 5ms sleep is required after COMP is enabled as per
  403. * HW requirement
  404. */
  405. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  406. usleep_range(5000, 5100);
  407. clear_bit(HPH_COMP_DELAY,
  408. &rouleur->status_mask);
  409. }
  410. } else {
  411. snd_soc_component_update_bits(component,
  412. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  413. 0x02, 0x00);
  414. }
  415. snd_soc_component_update_bits(component,
  416. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  417. 0x80, 0x00);
  418. snd_soc_component_update_bits(component,
  419. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  420. 0x04, 0x04);
  421. snd_soc_component_update_bits(component,
  422. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x01, 0x01);
  423. break;
  424. case SND_SOC_DAPM_POST_PMD:
  425. snd_soc_component_update_bits(component,
  426. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  427. 0x01, 0x00);
  428. snd_soc_component_update_bits(component,
  429. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  430. 0x04, 0x00);
  431. snd_soc_component_update_bits(component,
  432. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  433. 0x80, 0x80);
  434. if (rouleur->comp1_enable)
  435. snd_soc_component_update_bits(component,
  436. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  437. 0x02, 0x00);
  438. break;
  439. }
  440. return 0;
  441. }
  442. static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  443. struct snd_kcontrol *kcontrol,
  444. int event)
  445. {
  446. struct snd_soc_component *component =
  447. snd_soc_dapm_to_component(w->dapm);
  448. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  449. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  450. w->name, event);
  451. switch (event) {
  452. case SND_SOC_DAPM_PRE_PMU:
  453. rouleur_rx_clk_enable(component);
  454. snd_soc_component_update_bits(component,
  455. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  456. 0x02, 0x02);
  457. snd_soc_component_update_bits(component,
  458. ROULEUR_SWR_HPHPA_HD2,
  459. 0x07, 0x07);
  460. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  461. break;
  462. case SND_SOC_DAPM_POST_PMU:
  463. if (rouleur->comp2_enable) {
  464. snd_soc_component_update_bits(component,
  465. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  466. 0x01, 0x01);
  467. if (rouleur->comp1_enable)
  468. snd_soc_component_update_bits(component,
  469. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  470. 0x02, 0x02);
  471. /*
  472. * 5ms sleep is required after COMP is enabled as per
  473. * HW requirement
  474. */
  475. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  476. usleep_range(5000, 5100);
  477. clear_bit(HPH_COMP_DELAY,
  478. &rouleur->status_mask);
  479. }
  480. } else {
  481. snd_soc_component_update_bits(component,
  482. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  483. 0x01, 0x00);
  484. }
  485. snd_soc_component_update_bits(component,
  486. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  487. 0x80, 0x00);
  488. snd_soc_component_update_bits(component,
  489. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  490. 0x08, 0x08);
  491. snd_soc_component_update_bits(component,
  492. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x02);
  493. break;
  494. case SND_SOC_DAPM_POST_PMD:
  495. snd_soc_component_update_bits(component,
  496. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
  497. snd_soc_component_update_bits(component,
  498. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  499. 0x08, 0x00);
  500. snd_soc_component_update_bits(component,
  501. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  502. 0x80, 0x80);
  503. if (rouleur->comp2_enable)
  504. snd_soc_component_update_bits(component,
  505. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  506. 0x01, 0x00);
  507. break;
  508. }
  509. return 0;
  510. }
  511. static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
  512. struct snd_kcontrol *kcontrol,
  513. int event)
  514. {
  515. struct snd_soc_component *component =
  516. snd_soc_dapm_to_component(w->dapm);
  517. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  518. w->name, event);
  519. switch (event) {
  520. case SND_SOC_DAPM_PRE_PMU:
  521. rouleur_rx_clk_enable(component);
  522. snd_soc_component_update_bits(component,
  523. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  524. 0x80, 0x00);
  525. snd_soc_component_update_bits(component,
  526. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  527. 0x04, 0x04);
  528. snd_soc_component_update_bits(component,
  529. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  530. 0x01, 0x01);
  531. break;
  532. case SND_SOC_DAPM_POST_PMD:
  533. snd_soc_component_update_bits(component,
  534. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  535. 0x01, 0x00);
  536. snd_soc_component_update_bits(component,
  537. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  538. 0x04, 0x00);
  539. snd_soc_component_update_bits(component,
  540. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  541. 0x80, 0x80);
  542. break;
  543. };
  544. return 0;
  545. }
  546. static int rouleur_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  547. struct snd_kcontrol *kcontrol,
  548. int event)
  549. {
  550. struct snd_soc_component *component =
  551. snd_soc_dapm_to_component(w->dapm);
  552. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  553. int ret = 0;
  554. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  555. w->name, event);
  556. switch (event) {
  557. case SND_SOC_DAPM_PRE_PMU:
  558. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  559. rouleur->rx_swr_dev->dev_num,
  560. true);
  561. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  562. usleep_range(5000, 5100);
  563. snd_soc_component_update_bits(component,
  564. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  565. 0x03, 0x03);
  566. break;
  567. case SND_SOC_DAPM_POST_PMU:
  568. /*
  569. * 5ms sleep is required after PA is enabled as per
  570. * HW requirement.
  571. */
  572. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  573. usleep_range(5000, 5100);
  574. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  575. }
  576. if (rouleur->update_wcd_event)
  577. rouleur->update_wcd_event(rouleur->handle,
  578. WCD_BOLERO_EVT_RX_MUTE,
  579. (WCD_RX2 << 0x10));
  580. wcd_enable_irq(&rouleur->irq_info,
  581. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  582. break;
  583. case SND_SOC_DAPM_PRE_PMD:
  584. wcd_disable_irq(&rouleur->irq_info,
  585. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  586. if (rouleur->update_wcd_event)
  587. rouleur->update_wcd_event(rouleur->handle,
  588. WCD_BOLERO_EVT_RX_MUTE,
  589. (WCD_RX2 << 0x10 | 0x1));
  590. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  591. WCD_EVENT_PRE_HPHR_PA_OFF,
  592. &rouleur->mbhc->wcd_mbhc);
  593. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  594. break;
  595. case SND_SOC_DAPM_POST_PMD:
  596. /*
  597. * 7ms sleep is required after PA is disabled as per
  598. * HW requirement. If compander is disabled, then
  599. * 20ms delay is required.
  600. */
  601. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  602. usleep_range(5000, 5100);
  603. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  604. }
  605. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  606. WCD_EVENT_POST_HPHR_PA_OFF,
  607. &rouleur->mbhc->wcd_mbhc);
  608. snd_soc_component_update_bits(component,
  609. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  610. 0x03, 0x00);
  611. break;
  612. };
  613. return ret;
  614. }
  615. static int rouleur_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  616. struct snd_kcontrol *kcontrol,
  617. int event)
  618. {
  619. struct snd_soc_component *component =
  620. snd_soc_dapm_to_component(w->dapm);
  621. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  622. int ret = 0;
  623. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  624. w->name, event);
  625. switch (event) {
  626. case SND_SOC_DAPM_PRE_PMU:
  627. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  628. rouleur->rx_swr_dev->dev_num,
  629. true);
  630. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  631. usleep_range(5000, 5100);
  632. snd_soc_component_update_bits(component,
  633. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  634. 0x03, 0x03);
  635. break;
  636. case SND_SOC_DAPM_POST_PMU:
  637. /*
  638. * 5ms sleep is required after PA is enabled as per
  639. * HW requirement.
  640. */
  641. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  642. usleep_range(5000, 5100);
  643. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  644. }
  645. if (rouleur->update_wcd_event)
  646. rouleur->update_wcd_event(rouleur->handle,
  647. WCD_BOLERO_EVT_RX_MUTE,
  648. (WCD_RX1 << 0x10));
  649. wcd_enable_irq(&rouleur->irq_info,
  650. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  651. break;
  652. case SND_SOC_DAPM_PRE_PMD:
  653. wcd_disable_irq(&rouleur->irq_info,
  654. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  655. if (rouleur->update_wcd_event)
  656. rouleur->update_wcd_event(rouleur->handle,
  657. WCD_BOLERO_EVT_RX_MUTE,
  658. (WCD_RX1 << 0x10 | 0x1));
  659. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  660. WCD_EVENT_PRE_HPHL_PA_OFF,
  661. &rouleur->mbhc->wcd_mbhc);
  662. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  663. break;
  664. case SND_SOC_DAPM_POST_PMD:
  665. /*
  666. * 5ms sleep is required after PA is disabled as per
  667. * HW requirement.
  668. */
  669. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  670. usleep_range(5000, 5100);
  671. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  672. }
  673. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  674. WCD_EVENT_POST_HPHL_PA_OFF,
  675. &rouleur->mbhc->wcd_mbhc);
  676. snd_soc_component_update_bits(component,
  677. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  678. 0x03, 0x00);
  679. break;
  680. };
  681. return ret;
  682. }
  683. static int rouleur_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  684. struct snd_kcontrol *kcontrol,
  685. int event)
  686. {
  687. struct snd_soc_component *component =
  688. snd_soc_dapm_to_component(w->dapm);
  689. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  690. int ret = 0;
  691. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  692. w->name, event);
  693. switch (event) {
  694. case SND_SOC_DAPM_PRE_PMU:
  695. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  696. rouleur->rx_swr_dev->dev_num,
  697. true);
  698. snd_soc_component_update_bits(component,
  699. ROULEUR_ANA_COMBOPA_CTL,
  700. 0x40, 0x00);
  701. usleep_range(5000, 5100);
  702. snd_soc_component_update_bits(component,
  703. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  704. 0x03, 0x03);
  705. break;
  706. case SND_SOC_DAPM_POST_PMU:
  707. if (rouleur->update_wcd_event)
  708. rouleur->update_wcd_event(rouleur->handle,
  709. WCD_BOLERO_EVT_RX_MUTE,
  710. (WCD_RX1 << 0x10));
  711. wcd_enable_irq(&rouleur->irq_info,
  712. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  713. break;
  714. case SND_SOC_DAPM_PRE_PMD:
  715. wcd_disable_irq(&rouleur->irq_info,
  716. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  717. if (rouleur->update_wcd_event)
  718. rouleur->update_wcd_event(rouleur->handle,
  719. WCD_BOLERO_EVT_RX_MUTE,
  720. (WCD_RX1 << 0x10 | 0x1));
  721. break;
  722. case SND_SOC_DAPM_POST_PMD:
  723. usleep_range(5000, 5100);
  724. snd_soc_component_update_bits(component,
  725. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  726. 0x03, 0x00);
  727. };
  728. return ret;
  729. }
  730. static int rouleur_codec_enable_lo_pa(struct snd_soc_dapm_widget *w,
  731. struct snd_kcontrol *kcontrol,
  732. int event)
  733. {
  734. struct snd_soc_component *component =
  735. snd_soc_dapm_to_component(w->dapm);
  736. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  737. int ret = 0;
  738. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  739. w->name, event);
  740. switch (event) {
  741. case SND_SOC_DAPM_PRE_PMU:
  742. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  743. rouleur->rx_swr_dev->dev_num,
  744. true);
  745. snd_soc_component_update_bits(component,
  746. ROULEUR_ANA_COMBOPA_CTL,
  747. 0x40, 0x40);
  748. usleep_range(5000, 5100);
  749. snd_soc_component_update_bits(component,
  750. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  751. 0x03, 0x03);
  752. break;
  753. case SND_SOC_DAPM_POST_PMU:
  754. if (rouleur->update_wcd_event)
  755. rouleur->update_wcd_event(rouleur->handle,
  756. WCD_BOLERO_EVT_RX_MUTE,
  757. (WCD_RX1 << 0x10));
  758. wcd_enable_irq(&rouleur->irq_info,
  759. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  760. break;
  761. case SND_SOC_DAPM_PRE_PMD:
  762. wcd_disable_irq(&rouleur->irq_info,
  763. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  764. if (rouleur->update_wcd_event)
  765. rouleur->update_wcd_event(rouleur->handle,
  766. WCD_BOLERO_EVT_RX_MUTE,
  767. (WCD_RX1 << 0x10 | 0x1));
  768. break;
  769. case SND_SOC_DAPM_POST_PMD:
  770. snd_soc_component_update_bits(component,
  771. ROULEUR_ANA_COMBOPA_CTL,
  772. 0x40, 0x00);
  773. usleep_range(5000, 5100);
  774. snd_soc_component_update_bits(component,
  775. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  776. 0x03, 0x00);
  777. };
  778. return ret;
  779. }
  780. static int rouleur_enable_rx1(struct snd_soc_dapm_widget *w,
  781. struct snd_kcontrol *kcontrol,
  782. int event)
  783. {
  784. struct snd_soc_component *component =
  785. snd_soc_dapm_to_component(w->dapm);
  786. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  787. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  788. w->name, event);
  789. switch (event) {
  790. case SND_SOC_DAPM_PRE_PMU:
  791. rouleur_rx_connect_port(component, HPH_L, true);
  792. if (rouleur->comp1_enable)
  793. rouleur_rx_connect_port(component, COMP_L, true);
  794. break;
  795. case SND_SOC_DAPM_POST_PMD:
  796. rouleur_rx_connect_port(component, HPH_L, false);
  797. if (rouleur->comp1_enable)
  798. rouleur_rx_connect_port(component, COMP_L, false);
  799. rouleur_rx_clk_disable(component);
  800. break;
  801. };
  802. return 0;
  803. }
  804. static int rouleur_enable_rx2(struct snd_soc_dapm_widget *w,
  805. struct snd_kcontrol *kcontrol, int event)
  806. {
  807. struct snd_soc_component *component =
  808. snd_soc_dapm_to_component(w->dapm);
  809. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  810. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  811. w->name, event);
  812. switch (event) {
  813. case SND_SOC_DAPM_PRE_PMU:
  814. rouleur_rx_connect_port(component, HPH_R, true);
  815. if (rouleur->comp2_enable)
  816. rouleur_rx_connect_port(component, COMP_R, true);
  817. break;
  818. case SND_SOC_DAPM_POST_PMD:
  819. rouleur_rx_connect_port(component, HPH_R, false);
  820. if (rouleur->comp2_enable)
  821. rouleur_rx_connect_port(component, COMP_R, false);
  822. rouleur_rx_clk_disable(component);
  823. break;
  824. };
  825. return 0;
  826. }
  827. static int rouleur_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  828. struct snd_kcontrol *kcontrol,
  829. int event)
  830. {
  831. struct snd_soc_component *component =
  832. snd_soc_dapm_to_component(w->dapm);
  833. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  834. u16 dmic_clk_reg;
  835. s32 *dmic_clk_cnt;
  836. unsigned int dmic;
  837. char *wname;
  838. int ret = 0;
  839. wname = strpbrk(w->name, "01");
  840. if (!wname) {
  841. dev_err(component->dev, "%s: widget not found\n", __func__);
  842. return -EINVAL;
  843. }
  844. ret = kstrtouint(wname, 10, &dmic);
  845. if (ret < 0) {
  846. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  847. __func__);
  848. return -EINVAL;
  849. }
  850. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  851. w->name, event);
  852. switch (dmic) {
  853. case 0:
  854. case 1:
  855. dmic_clk_cnt = &(rouleur->dmic_0_1_clk_cnt);
  856. dmic_clk_reg = ROULEUR_DIG_SWR_CDC_DMIC1_CTL;
  857. break;
  858. default:
  859. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  860. __func__);
  861. return -EINVAL;
  862. };
  863. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  864. __func__, event, dmic, *dmic_clk_cnt);
  865. switch (event) {
  866. case SND_SOC_DAPM_PRE_PMU:
  867. snd_soc_component_update_bits(component,
  868. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x00);
  869. snd_soc_component_update_bits(component,
  870. dmic_clk_reg, 0x08, 0x08);
  871. rouleur_tx_connect_port(component, DMIC0 + (w->shift), true);
  872. break;
  873. case SND_SOC_DAPM_POST_PMD:
  874. rouleur_tx_connect_port(component, DMIC0 + (w->shift), false);
  875. snd_soc_component_update_bits(component,
  876. dmic_clk_reg, 0x08, 0x00);
  877. snd_soc_component_update_bits(component,
  878. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x02);
  879. break;
  880. };
  881. return 0;
  882. }
  883. static int rouleur_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  884. struct snd_kcontrol *kcontrol,
  885. int event)
  886. {
  887. struct snd_soc_component *component =
  888. snd_soc_dapm_to_component(w->dapm);
  889. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  890. int ret = 0;
  891. switch (event) {
  892. case SND_SOC_DAPM_PRE_PMU:
  893. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  894. rouleur->tx_swr_dev->dev_num,
  895. true);
  896. break;
  897. case SND_SOC_DAPM_POST_PMD:
  898. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  899. rouleur->tx_swr_dev->dev_num,
  900. false);
  901. break;
  902. };
  903. return ret;
  904. }
  905. static int rouleur_codec_enable_adc(struct snd_soc_dapm_widget *w,
  906. struct snd_kcontrol *kcontrol,
  907. int event)
  908. {
  909. struct snd_soc_component *component =
  910. snd_soc_dapm_to_component(w->dapm);
  911. struct rouleur_priv *rouleur =
  912. snd_soc_component_get_drvdata(component);
  913. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  914. w->name, event);
  915. switch (event) {
  916. case SND_SOC_DAPM_PRE_PMU:
  917. /* Enable BCS for Headset mic */
  918. if (w->shift == 1 && !(snd_soc_component_read32(component,
  919. ROULEUR_ANA_TX_AMIC2) & 0x10)) {
  920. rouleur_tx_connect_port(component, MBHC, true);
  921. set_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  922. }
  923. rouleur_tx_connect_port(component, ADC1 + (w->shift), true);
  924. rouleur_global_mbias_enable(component);
  925. if (w->shift)
  926. snd_soc_component_update_bits(component,
  927. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  928. 0x30, 0x30);
  929. else
  930. snd_soc_component_update_bits(component,
  931. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  932. 0x03, 0x03);
  933. break;
  934. case SND_SOC_DAPM_POST_PMD:
  935. rouleur_tx_connect_port(component, ADC1 + (w->shift), false);
  936. if (w->shift == 1 &&
  937. test_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask)) {
  938. rouleur_tx_connect_port(component, MBHC, false);
  939. clear_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  940. }
  941. if (w->shift)
  942. snd_soc_component_update_bits(component,
  943. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  944. 0x30, 0x00);
  945. else
  946. snd_soc_component_update_bits(component,
  947. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  948. 0x03, 0x00);
  949. rouleur_global_mbias_disable(component);
  950. break;
  951. };
  952. return 0;
  953. }
  954. /*
  955. * rouleur_get_micb_vout_ctl_val: converts micbias from volts to register value
  956. * @micb_mv: micbias in mv
  957. *
  958. * return register value converted
  959. */
  960. int rouleur_get_micb_vout_ctl_val(u32 micb_mv)
  961. {
  962. /* min micbias voltage is 1.6V and maximum is 2.85V */
  963. if (micb_mv < 1600 || micb_mv > 2850) {
  964. pr_err("%s: unsupported micbias voltage\n", __func__);
  965. return -EINVAL;
  966. }
  967. return (micb_mv - 1600) / 50;
  968. }
  969. EXPORT_SYMBOL(rouleur_get_micb_vout_ctl_val);
  970. /*
  971. * rouleur_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  972. * @component: handle to snd_soc_component *
  973. * @req_volt: micbias voltage to be set
  974. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  975. *
  976. * return 0 if adjustment is success or error code in case of failure
  977. */
  978. int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  979. int req_volt, int micb_num)
  980. {
  981. struct rouleur_priv *rouleur =
  982. snd_soc_component_get_drvdata(component);
  983. int cur_vout_ctl, req_vout_ctl;
  984. int micb_reg, micb_val, micb_en;
  985. int ret = 0;
  986. int pullup_mask;
  987. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  988. switch (micb_num) {
  989. case MIC_BIAS_1:
  990. micb_val = snd_soc_component_read32(component, micb_reg);
  991. micb_en = (micb_val & 0x40) >> 6;
  992. pullup_mask = 0x20;
  993. break;
  994. case MIC_BIAS_2:
  995. micb_val = snd_soc_component_read32(component, micb_reg);
  996. micb_en = (micb_val & 0x04) >> 2;
  997. pullup_mask = 0x02;
  998. break;
  999. case MIC_BIAS_3:
  1000. default:
  1001. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1002. __func__, micb_num);
  1003. return -EINVAL;
  1004. }
  1005. mutex_lock(&rouleur->micb_lock);
  1006. /*
  1007. * If requested micbias voltage is same as current micbias
  1008. * voltage, then just return. Otherwise, adjust voltage as
  1009. * per requested value. If micbias is already enabled, then
  1010. * to avoid slow micbias ramp-up or down enable pull-up
  1011. * momentarily, change the micbias value and then re-enable
  1012. * micbias.
  1013. */
  1014. cur_vout_ctl = (snd_soc_component_read32(component,
  1015. ROULEUR_ANA_MICBIAS_LDO_1_SETTING)) & 0xF8;
  1016. cur_vout_ctl = cur_vout_ctl >> 3;
  1017. req_vout_ctl = rouleur_get_micb_vout_ctl_val(req_volt);
  1018. if (req_vout_ctl < 0) {
  1019. ret = -EINVAL;
  1020. goto exit;
  1021. }
  1022. if (cur_vout_ctl == req_vout_ctl) {
  1023. ret = 0;
  1024. goto exit;
  1025. }
  1026. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1027. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1028. req_volt, micb_en);
  1029. if (micb_en == 0x1)
  1030. snd_soc_component_update_bits(component, micb_reg, pullup_mask,
  1031. pullup_mask);
  1032. snd_soc_component_update_bits(component,
  1033. ROULEUR_ANA_MICBIAS_LDO_1_SETTING, 0xF8, req_vout_ctl << 3);
  1034. if (micb_en == 0x1) {
  1035. snd_soc_component_update_bits(component, micb_reg,
  1036. pullup_mask, 0x00);
  1037. /*
  1038. * Add 2ms delay as per HW requirement after enabling
  1039. * micbias
  1040. */
  1041. usleep_range(2000, 2100);
  1042. }
  1043. exit:
  1044. mutex_unlock(&rouleur->micb_lock);
  1045. return ret;
  1046. }
  1047. EXPORT_SYMBOL(rouleur_mbhc_micb_adjust_voltage);
  1048. int rouleur_micbias_control(struct snd_soc_component *component,
  1049. int micb_num, int req, bool is_dapm)
  1050. {
  1051. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1052. int micb_index = micb_num - 1;
  1053. u16 micb_reg;
  1054. int pre_off_event = 0, post_off_event = 0;
  1055. int post_on_event = 0, post_dapm_off = 0;
  1056. int post_dapm_on = 0;
  1057. u8 pullup_mask = 0, enable_mask = 0;
  1058. int ret = 0;
  1059. if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
  1060. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1061. __func__, micb_index);
  1062. return -EINVAL;
  1063. }
  1064. switch (micb_num) {
  1065. case MIC_BIAS_1:
  1066. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1067. pullup_mask = 0x20;
  1068. enable_mask = 0x40;
  1069. break;
  1070. case MIC_BIAS_2:
  1071. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1072. pullup_mask = 0x02;
  1073. enable_mask = 0x04;
  1074. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1075. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1076. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1077. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1078. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1079. break;
  1080. case MIC_BIAS_3:
  1081. micb_reg = ROULEUR_ANA_MICBIAS_MICB_3_EN;
  1082. pullup_mask = 0x02;
  1083. break;
  1084. default:
  1085. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1086. __func__, micb_num);
  1087. return -EINVAL;
  1088. };
  1089. mutex_lock(&rouleur->micb_lock);
  1090. switch (req) {
  1091. case MICB_PULLUP_ENABLE:
  1092. if (!rouleur->dev_up) {
  1093. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1094. __func__, req);
  1095. ret = -ENODEV;
  1096. goto done;
  1097. }
  1098. rouleur->pullup_ref[micb_index]++;
  1099. if ((rouleur->pullup_ref[micb_index] == 1) &&
  1100. (rouleur->micb_ref[micb_index] == 0))
  1101. snd_soc_component_update_bits(component, micb_reg,
  1102. pullup_mask, pullup_mask);
  1103. break;
  1104. case MICB_PULLUP_DISABLE:
  1105. if (!rouleur->dev_up) {
  1106. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1107. __func__, req);
  1108. ret = -ENODEV;
  1109. goto done;
  1110. }
  1111. if (rouleur->pullup_ref[micb_index] > 0)
  1112. rouleur->pullup_ref[micb_index]--;
  1113. if ((rouleur->pullup_ref[micb_index] == 0) &&
  1114. (rouleur->micb_ref[micb_index] == 0))
  1115. snd_soc_component_update_bits(component, micb_reg,
  1116. pullup_mask, 0x00);
  1117. break;
  1118. case MICB_ENABLE:
  1119. if (!rouleur->dev_up) {
  1120. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1121. __func__, req);
  1122. ret = -ENODEV;
  1123. goto done;
  1124. }
  1125. rouleur->micb_ref[micb_index]++;
  1126. if (rouleur->micb_ref[micb_index] == 1) {
  1127. rouleur_global_mbias_enable(component);
  1128. snd_soc_component_update_bits(component,
  1129. micb_reg, enable_mask, enable_mask);
  1130. if (post_on_event)
  1131. blocking_notifier_call_chain(
  1132. &rouleur->mbhc->notifier, post_on_event,
  1133. &rouleur->mbhc->wcd_mbhc);
  1134. }
  1135. if (is_dapm && post_dapm_on && rouleur->mbhc)
  1136. blocking_notifier_call_chain(
  1137. &rouleur->mbhc->notifier, post_dapm_on,
  1138. &rouleur->mbhc->wcd_mbhc);
  1139. break;
  1140. case MICB_DISABLE:
  1141. if (rouleur->micb_ref[micb_index] > 0)
  1142. rouleur->micb_ref[micb_index]--;
  1143. if (!rouleur->dev_up) {
  1144. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1145. __func__, req);
  1146. ret = -ENODEV;
  1147. goto done;
  1148. }
  1149. if ((rouleur->micb_ref[micb_index] == 0) &&
  1150. (rouleur->pullup_ref[micb_index] > 0)) {
  1151. snd_soc_component_update_bits(component, micb_reg,
  1152. pullup_mask, pullup_mask);
  1153. snd_soc_component_update_bits(component, micb_reg,
  1154. enable_mask, 0x00);
  1155. rouleur_global_mbias_disable(component);
  1156. } else if ((rouleur->micb_ref[micb_index] == 0) &&
  1157. (rouleur->pullup_ref[micb_index] == 0)) {
  1158. if (pre_off_event && rouleur->mbhc)
  1159. blocking_notifier_call_chain(
  1160. &rouleur->mbhc->notifier, pre_off_event,
  1161. &rouleur->mbhc->wcd_mbhc);
  1162. snd_soc_component_update_bits(component, micb_reg,
  1163. enable_mask, 0x00);
  1164. rouleur_global_mbias_disable(component);
  1165. if (post_off_event && rouleur->mbhc)
  1166. blocking_notifier_call_chain(
  1167. &rouleur->mbhc->notifier,
  1168. post_off_event,
  1169. &rouleur->mbhc->wcd_mbhc);
  1170. }
  1171. if (is_dapm && post_dapm_off && rouleur->mbhc)
  1172. blocking_notifier_call_chain(
  1173. &rouleur->mbhc->notifier, post_dapm_off,
  1174. &rouleur->mbhc->wcd_mbhc);
  1175. break;
  1176. };
  1177. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1178. __func__, micb_num, rouleur->micb_ref[micb_index],
  1179. rouleur->pullup_ref[micb_index]);
  1180. done:
  1181. mutex_unlock(&rouleur->micb_lock);
  1182. return 0;
  1183. }
  1184. EXPORT_SYMBOL(rouleur_micbias_control);
  1185. void rouleur_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1186. bool bcs_disable)
  1187. {
  1188. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1189. if (rouleur->update_wcd_event) {
  1190. if (bcs_disable)
  1191. rouleur->update_wcd_event(rouleur->handle,
  1192. WCD_BOLERO_EVT_BCS_CLK_OFF, 0);
  1193. else
  1194. rouleur->update_wcd_event(rouleur->handle,
  1195. WCD_BOLERO_EVT_BCS_CLK_OFF, 1);
  1196. }
  1197. }
  1198. static int rouleur_get_logical_addr(struct swr_device *swr_dev)
  1199. {
  1200. int ret = 0;
  1201. uint8_t devnum = 0;
  1202. int num_retry = NUM_ATTEMPTS;
  1203. do {
  1204. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1205. if (ret) {
  1206. dev_err(&swr_dev->dev,
  1207. "%s get devnum %d for dev addr %lx failed\n",
  1208. __func__, devnum, swr_dev->addr);
  1209. /* retry after 1ms */
  1210. usleep_range(1000, 1010);
  1211. }
  1212. } while (ret && --num_retry);
  1213. swr_dev->dev_num = devnum;
  1214. return 0;
  1215. }
  1216. static bool get_usbc_hs_status(struct snd_soc_component *component,
  1217. struct wcd_mbhc_config *mbhc_cfg)
  1218. {
  1219. if (mbhc_cfg->enable_usbc_analog) {
  1220. if (!(snd_soc_component_read32(component, ROULEUR_ANA_MBHC_MECH)
  1221. & 0x20))
  1222. return true;
  1223. }
  1224. return false;
  1225. }
  1226. static int rouleur_event_notify(struct notifier_block *block,
  1227. unsigned long val,
  1228. void *data)
  1229. {
  1230. u16 event = (val & 0xffff);
  1231. int ret = 0;
  1232. struct rouleur_priv *rouleur = dev_get_drvdata((struct device *)data);
  1233. struct snd_soc_component *component = rouleur->component;
  1234. struct wcd_mbhc *mbhc;
  1235. switch (event) {
  1236. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1237. snd_soc_component_update_bits(component,
  1238. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  1239. 0xC0, 0x00);
  1240. snd_soc_component_update_bits(component,
  1241. ROULEUR_ANA_COMBOPA_CTL,
  1242. 0x40, 0x00);
  1243. snd_soc_component_update_bits(component,
  1244. ROULEUR_ANA_COMBOPA_CTL,
  1245. 0x80, 0x00);
  1246. snd_soc_component_update_bits(component,
  1247. ROULEUR_ANA_COMBOPA_CTL,
  1248. 0x40, 0x40);
  1249. snd_soc_component_update_bits(component,
  1250. ROULEUR_ANA_COMBOPA_CTL,
  1251. 0x80, 0x00);
  1252. break;
  1253. case BOLERO_WCD_EVT_SSR_DOWN:
  1254. rouleur->dev_up = false;
  1255. rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
  1256. mbhc = &rouleur->mbhc->wcd_mbhc;
  1257. rouleur->usbc_hs_status = get_usbc_hs_status(component,
  1258. mbhc->mbhc_cfg);
  1259. rouleur_mbhc_ssr_down(rouleur->mbhc, component);
  1260. rouleur_reset(rouleur->dev, 0x01);
  1261. break;
  1262. case BOLERO_WCD_EVT_SSR_UP:
  1263. rouleur_reset(rouleur->dev, 0x00);
  1264. /* allow reset to take effect */
  1265. usleep_range(10000, 10010);
  1266. rouleur_get_logical_addr(rouleur->tx_swr_dev);
  1267. rouleur_get_logical_addr(rouleur->rx_swr_dev);
  1268. rouleur_init_reg(component);
  1269. regcache_mark_dirty(rouleur->regmap);
  1270. regcache_sync(rouleur->regmap);
  1271. rouleur->dev_up = true;
  1272. /* Initialize MBHC module */
  1273. mbhc = &rouleur->mbhc->wcd_mbhc;
  1274. ret = rouleur_mbhc_post_ssr_init(rouleur->mbhc, component);
  1275. if (ret) {
  1276. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1277. __func__);
  1278. } else {
  1279. rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1280. if (rouleur->usbc_hs_status)
  1281. mdelay(500);
  1282. }
  1283. rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
  1284. break;
  1285. default:
  1286. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1287. event);
  1288. break;
  1289. }
  1290. return 0;
  1291. }
  1292. static int __rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1293. int event)
  1294. {
  1295. struct snd_soc_component *component =
  1296. snd_soc_dapm_to_component(w->dapm);
  1297. int micb_num;
  1298. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1299. __func__, w->name, event);
  1300. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1301. micb_num = MIC_BIAS_1;
  1302. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1303. micb_num = MIC_BIAS_2;
  1304. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1305. micb_num = MIC_BIAS_3;
  1306. else
  1307. return -EINVAL;
  1308. switch (event) {
  1309. case SND_SOC_DAPM_PRE_PMU:
  1310. /* Micbias LD0 enable not supported for MicBias 3*/
  1311. if (micb_num == MIC_BIAS_3)
  1312. rouleur_micbias_control(component, micb_num,
  1313. MICB_PULLUP_ENABLE, true);
  1314. else
  1315. rouleur_micbias_control(component, micb_num,
  1316. MICB_ENABLE, true);
  1317. break;
  1318. case SND_SOC_DAPM_POST_PMU:
  1319. usleep_range(1000, 1100);
  1320. break;
  1321. case SND_SOC_DAPM_POST_PMD:
  1322. if (micb_num == MIC_BIAS_3)
  1323. rouleur_micbias_control(component, micb_num,
  1324. MICB_PULLUP_DISABLE, true);
  1325. else
  1326. rouleur_micbias_control(component, micb_num,
  1327. MICB_DISABLE, true);
  1328. break;
  1329. };
  1330. return 0;
  1331. }
  1332. static int rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1333. struct snd_kcontrol *kcontrol,
  1334. int event)
  1335. {
  1336. return __rouleur_codec_enable_micbias(w, event);
  1337. }
  1338. static int __rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1339. int event)
  1340. {
  1341. struct snd_soc_component *component =
  1342. snd_soc_dapm_to_component(w->dapm);
  1343. int micb_num;
  1344. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1345. __func__, w->name, event);
  1346. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1347. micb_num = MIC_BIAS_1;
  1348. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1349. micb_num = MIC_BIAS_2;
  1350. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1351. micb_num = MIC_BIAS_3;
  1352. else
  1353. return -EINVAL;
  1354. switch (event) {
  1355. case SND_SOC_DAPM_PRE_PMU:
  1356. rouleur_micbias_control(component, micb_num,
  1357. MICB_PULLUP_ENABLE, true);
  1358. break;
  1359. case SND_SOC_DAPM_POST_PMU:
  1360. /* 1 msec delay as per HW requirement */
  1361. usleep_range(1000, 1100);
  1362. break;
  1363. case SND_SOC_DAPM_POST_PMD:
  1364. rouleur_micbias_control(component, micb_num,
  1365. MICB_PULLUP_DISABLE, true);
  1366. break;
  1367. };
  1368. return 0;
  1369. }
  1370. static int rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1371. struct snd_kcontrol *kcontrol,
  1372. int event)
  1373. {
  1374. return __rouleur_codec_enable_micbias_pullup(w, event);
  1375. }
  1376. static int rouleur_get_compander(struct snd_kcontrol *kcontrol,
  1377. struct snd_ctl_elem_value *ucontrol)
  1378. {
  1379. struct snd_soc_component *component =
  1380. snd_soc_kcontrol_component(kcontrol);
  1381. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1382. bool hphr;
  1383. struct soc_multi_mixer_control *mc;
  1384. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1385. hphr = mc->shift;
  1386. ucontrol->value.integer.value[0] = hphr ? rouleur->comp2_enable :
  1387. rouleur->comp1_enable;
  1388. return 0;
  1389. }
  1390. static int rouleur_set_compander(struct snd_kcontrol *kcontrol,
  1391. struct snd_ctl_elem_value *ucontrol)
  1392. {
  1393. struct snd_soc_component *component =
  1394. snd_soc_kcontrol_component(kcontrol);
  1395. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1396. int value = ucontrol->value.integer.value[0];
  1397. bool hphr;
  1398. struct soc_multi_mixer_control *mc;
  1399. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1400. hphr = mc->shift;
  1401. if (hphr)
  1402. rouleur->comp2_enable = value;
  1403. else
  1404. rouleur->comp1_enable = value;
  1405. return 0;
  1406. }
  1407. static int rouleur_codec_enable_pa_vpos(struct snd_soc_dapm_widget *w,
  1408. struct snd_kcontrol *kcontrol,
  1409. int event)
  1410. {
  1411. struct snd_soc_component *component =
  1412. snd_soc_dapm_to_component(w->dapm);
  1413. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1414. struct rouleur_pdata *pdata = NULL;
  1415. int ret = 0;
  1416. pdata = dev_get_platdata(rouleur->dev);
  1417. if (!pdata) {
  1418. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1419. return -EINVAL;
  1420. }
  1421. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1422. w->name, event);
  1423. switch (event) {
  1424. case SND_SOC_DAPM_PRE_PMU:
  1425. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1426. dev_dbg(component->dev,
  1427. "%s: vpos already in enabled state\n",
  1428. __func__);
  1429. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1430. return 0;
  1431. }
  1432. ret = msm_cdc_enable_ondemand_supply(rouleur->dev,
  1433. rouleur->supplies,
  1434. pdata->regulator,
  1435. pdata->num_supplies,
  1436. "cdc-pa-vpos");
  1437. if (ret == -EINVAL) {
  1438. dev_err(component->dev, "%s: pa vpos is not enabled\n",
  1439. __func__);
  1440. return ret;
  1441. }
  1442. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1443. /*
  1444. * 200us sleep is required after LDO15 is enabled as per
  1445. * HW requirement
  1446. */
  1447. usleep_range(200, 250);
  1448. break;
  1449. case SND_SOC_DAPM_POST_PMD:
  1450. set_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1451. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  1452. rouleur->rx_swr_dev->dev_num,
  1453. false);
  1454. break;
  1455. }
  1456. return 0;
  1457. }
  1458. static const struct snd_kcontrol_new rouleur_snd_controls[] = {
  1459. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1460. rouleur_get_compander, rouleur_set_compander),
  1461. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1462. rouleur_get_compander, rouleur_set_compander),
  1463. SOC_SINGLE_TLV("HPHL Volume", ROULEUR_ANA_HPHPA_L_GAIN, 0, 20, 1,
  1464. line_gain),
  1465. SOC_SINGLE_TLV("HPHR Volume", ROULEUR_ANA_HPHPA_R_GAIN, 0, 20, 1,
  1466. line_gain),
  1467. SOC_SINGLE_TLV("ADC1 Volume", ROULEUR_ANA_TX_AMIC1, 0, 8, 0,
  1468. analog_gain),
  1469. SOC_SINGLE_TLV("ADC2 Volume", ROULEUR_ANA_TX_AMIC2, 0, 8, 0,
  1470. analog_gain),
  1471. };
  1472. static const struct snd_kcontrol_new adc1_switch[] = {
  1473. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1474. };
  1475. static const struct snd_kcontrol_new adc2_switch[] = {
  1476. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1477. };
  1478. static const struct snd_kcontrol_new dmic1_switch[] = {
  1479. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1480. };
  1481. static const struct snd_kcontrol_new dmic2_switch[] = {
  1482. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1483. };
  1484. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1485. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1486. };
  1487. static const struct snd_kcontrol_new lo_rdac_switch[] = {
  1488. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1489. };
  1490. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1491. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1492. };
  1493. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1494. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1495. };
  1496. static const char * const adc2_mux_text[] = {
  1497. "INP2", "INP3"
  1498. };
  1499. static const struct soc_enum adc2_enum =
  1500. SOC_ENUM_SINGLE(ROULEUR_ANA_TX_AMIC2, 4,
  1501. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1502. static const struct snd_kcontrol_new tx_adc2_mux =
  1503. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1504. static const struct snd_soc_dapm_widget rouleur_dapm_widgets[] = {
  1505. /*input widgets*/
  1506. SND_SOC_DAPM_INPUT("AMIC1"),
  1507. SND_SOC_DAPM_INPUT("AMIC2"),
  1508. SND_SOC_DAPM_INPUT("AMIC3"),
  1509. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1510. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1511. /*tx widgets*/
  1512. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1513. rouleur_codec_enable_adc,
  1514. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1515. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1516. rouleur_codec_enable_adc,
  1517. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1518. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1519. &tx_adc2_mux),
  1520. /*tx mixers*/
  1521. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1522. adc1_switch, ARRAY_SIZE(adc1_switch),
  1523. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1524. SND_SOC_DAPM_POST_PMD),
  1525. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1526. adc2_switch, ARRAY_SIZE(adc2_switch),
  1527. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1528. SND_SOC_DAPM_POST_PMD),
  1529. /* micbias widgets*/
  1530. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1531. rouleur_codec_enable_micbias,
  1532. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1533. SND_SOC_DAPM_POST_PMD),
  1534. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1535. rouleur_codec_enable_micbias,
  1536. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1537. SND_SOC_DAPM_POST_PMD),
  1538. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1539. rouleur_codec_enable_micbias,
  1540. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1541. SND_SOC_DAPM_POST_PMD),
  1542. SND_SOC_DAPM_SUPPLY("PA_VPOS", SND_SOC_NOPM, 0, 0,
  1543. rouleur_codec_enable_pa_vpos,
  1544. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1545. /*rx widgets*/
  1546. SND_SOC_DAPM_PGA_E("EAR PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1547. rouleur_codec_enable_ear_pa,
  1548. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1549. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1550. SND_SOC_DAPM_PGA_E("LO PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1551. rouleur_codec_enable_lo_pa,
  1552. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1553. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1554. SND_SOC_DAPM_PGA_E("HPHL PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 7, 0, NULL,
  1555. 0, rouleur_codec_enable_hphl_pa,
  1556. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1557. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1558. SND_SOC_DAPM_PGA_E("HPHR PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 6, 0, NULL,
  1559. 0, rouleur_codec_enable_hphr_pa,
  1560. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1561. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1562. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1563. rouleur_codec_hphl_dac_event,
  1564. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1565. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1566. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1567. rouleur_codec_hphr_dac_event,
  1568. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1569. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1570. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1571. rouleur_codec_ear_lo_dac_event,
  1572. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1573. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1574. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1575. rouleur_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1576. SND_SOC_DAPM_POST_PMD),
  1577. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1578. rouleur_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1579. SND_SOC_DAPM_POST_PMD),
  1580. /* rx mixer widgets*/
  1581. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1582. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1583. SND_SOC_DAPM_MIXER("LO_RDAC", SND_SOC_NOPM, 0, 0,
  1584. lo_rdac_switch, ARRAY_SIZE(lo_rdac_switch)),
  1585. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1586. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1587. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1588. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1589. /*output widgets tx*/
  1590. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1591. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1592. /*output widgets rx*/
  1593. SND_SOC_DAPM_OUTPUT("EAR"),
  1594. SND_SOC_DAPM_OUTPUT("LO"),
  1595. SND_SOC_DAPM_OUTPUT("HPHL"),
  1596. SND_SOC_DAPM_OUTPUT("HPHR"),
  1597. /* micbias pull up widgets*/
  1598. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1599. rouleur_codec_enable_micbias_pullup,
  1600. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1601. SND_SOC_DAPM_POST_PMD),
  1602. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1603. rouleur_codec_enable_micbias_pullup,
  1604. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1605. SND_SOC_DAPM_POST_PMD),
  1606. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1607. rouleur_codec_enable_micbias_pullup,
  1608. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1609. SND_SOC_DAPM_POST_PMD),
  1610. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1611. rouleur_codec_enable_dmic,
  1612. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1613. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1614. rouleur_codec_enable_dmic,
  1615. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1616. /*tx mixer widgets*/
  1617. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1618. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1619. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1620. SND_SOC_DAPM_POST_PMD),
  1621. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1622. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1623. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1624. SND_SOC_DAPM_POST_PMD),
  1625. /*output widgets*/
  1626. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1627. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1628. };
  1629. static const struct snd_soc_dapm_route rouleur_audio_map[] = {
  1630. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1631. {"ADC1_MIXER", "Switch", "ADC1"},
  1632. {"ADC1", NULL, "AMIC1"},
  1633. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1634. {"ADC2_MIXER", "Switch", "ADC2"},
  1635. {"ADC2", NULL, "ADC2 MUX"},
  1636. {"ADC2 MUX", "INP3", "AMIC3"},
  1637. {"ADC2 MUX", "INP2", "AMIC2"},
  1638. {"IN1_HPHL", NULL, "PA_VPOS"},
  1639. {"RX1", NULL, "IN1_HPHL"},
  1640. {"RDAC1", NULL, "RX1"},
  1641. {"HPHL_RDAC", "Switch", "RDAC1"},
  1642. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1643. {"HPHL", NULL, "HPHL PGA"},
  1644. {"IN2_HPHR", NULL, "PA_VPOS"},
  1645. {"RX2", NULL, "IN2_HPHR"},
  1646. {"RDAC2", NULL, "RX2"},
  1647. {"HPHR_RDAC", "Switch", "RDAC2"},
  1648. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1649. {"HPHR", NULL, "HPHR PGA"},
  1650. {"RDAC3", NULL, "RX1"},
  1651. {"EAR_RDAC", "Switch", "RDAC3"},
  1652. {"EAR PGA", NULL, "EAR_RDAC"},
  1653. {"EAR", NULL, "EAR PGA"},
  1654. {"RDAC3", NULL, "RX1"},
  1655. {"LO_RDAC", "Switch", "RDAC3"},
  1656. {"LO PGA", NULL, "LO_RDAC"},
  1657. {"LO", NULL, "LO PGA"},
  1658. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1659. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1660. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1661. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1662. };
  1663. static ssize_t rouleur_version_read(struct snd_info_entry *entry,
  1664. void *file_private_data,
  1665. struct file *file,
  1666. char __user *buf, size_t count,
  1667. loff_t pos)
  1668. {
  1669. struct rouleur_priv *priv;
  1670. char buffer[ROULEUR_VERSION_ENTRY_SIZE];
  1671. int len = 0;
  1672. priv = (struct rouleur_priv *) entry->private_data;
  1673. if (!priv) {
  1674. pr_err("%s: rouleur priv is null\n", __func__);
  1675. return -EINVAL;
  1676. }
  1677. switch (priv->version) {
  1678. case ROULEUR_VERSION_1_0:
  1679. len = snprintf(buffer, sizeof(buffer), "ROULEUR_1_0\n");
  1680. break;
  1681. default:
  1682. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1683. }
  1684. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1685. }
  1686. static struct snd_info_entry_ops rouleur_info_ops = {
  1687. .read = rouleur_version_read,
  1688. };
  1689. /*
  1690. * rouleur_info_create_codec_entry - creates rouleur module
  1691. * @codec_root: The parent directory
  1692. * @component: component instance
  1693. *
  1694. * Creates rouleur module and version entry under the given
  1695. * parent directory.
  1696. *
  1697. * Return: 0 on success or negative error code on failure.
  1698. */
  1699. int rouleur_info_create_codec_entry(struct snd_info_entry *codec_root,
  1700. struct snd_soc_component *component)
  1701. {
  1702. struct snd_info_entry *version_entry;
  1703. struct rouleur_priv *priv;
  1704. struct snd_soc_card *card;
  1705. if (!codec_root || !component)
  1706. return -EINVAL;
  1707. priv = snd_soc_component_get_drvdata(component);
  1708. if (priv->entry) {
  1709. dev_dbg(priv->dev,
  1710. "%s:rouleur module already created\n", __func__);
  1711. return 0;
  1712. }
  1713. card = component->card;
  1714. priv->entry = snd_info_create_subdir(codec_root->module,
  1715. "rouleur", codec_root);
  1716. if (!priv->entry) {
  1717. dev_dbg(component->dev, "%s: failed to create rouleur entry\n",
  1718. __func__);
  1719. return -ENOMEM;
  1720. }
  1721. version_entry = snd_info_create_card_entry(card->snd_card,
  1722. "version",
  1723. priv->entry);
  1724. if (!version_entry) {
  1725. dev_dbg(component->dev, "%s: failed to create rouleur version entry\n",
  1726. __func__);
  1727. return -ENOMEM;
  1728. }
  1729. version_entry->private_data = priv;
  1730. version_entry->size = ROULEUR_VERSION_ENTRY_SIZE;
  1731. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1732. version_entry->c.ops = &rouleur_info_ops;
  1733. if (snd_info_register(version_entry) < 0) {
  1734. snd_info_free_entry(version_entry);
  1735. return -ENOMEM;
  1736. }
  1737. priv->version_entry = version_entry;
  1738. return 0;
  1739. }
  1740. EXPORT_SYMBOL(rouleur_info_create_codec_entry);
  1741. static int rouleur_set_micbias_data(struct rouleur_priv *rouleur,
  1742. struct rouleur_pdata *pdata)
  1743. {
  1744. int vout_ctl = 0;
  1745. int rc = 0;
  1746. if (!pdata) {
  1747. dev_err(rouleur->dev, "%s: NULL pdata\n", __func__);
  1748. return -ENODEV;
  1749. }
  1750. /* set micbias voltage */
  1751. vout_ctl = rouleur_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  1752. if (vout_ctl < 0) {
  1753. rc = -EINVAL;
  1754. goto done;
  1755. }
  1756. regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MICBIAS_LDO_1_SETTING,
  1757. 0xF8, vout_ctl << 3);
  1758. done:
  1759. return rc;
  1760. }
  1761. static int rouleur_soc_codec_probe(struct snd_soc_component *component)
  1762. {
  1763. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1764. struct snd_soc_dapm_context *dapm =
  1765. snd_soc_component_get_dapm(component);
  1766. int ret = -EINVAL;
  1767. dev_info(component->dev, "%s()\n", __func__);
  1768. rouleur = snd_soc_component_get_drvdata(component);
  1769. if (!rouleur)
  1770. return -EINVAL;
  1771. rouleur->component = component;
  1772. snd_soc_component_init_regmap(component, rouleur->regmap);
  1773. rouleur->fw_data = devm_kzalloc(component->dev,
  1774. sizeof(*(rouleur->fw_data)),
  1775. GFP_KERNEL);
  1776. if (!rouleur->fw_data) {
  1777. dev_err(component->dev, "Failed to allocate fw_data\n");
  1778. ret = -ENOMEM;
  1779. goto done;
  1780. }
  1781. set_bit(WCD9XXX_MBHC_CAL, rouleur->fw_data->cal_bit);
  1782. ret = wcd_cal_create_hwdep(rouleur->fw_data,
  1783. WCD9XXX_CODEC_HWDEP_NODE, component);
  1784. if (ret < 0) {
  1785. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1786. goto done;
  1787. }
  1788. ret = rouleur_mbhc_init(&rouleur->mbhc, component, rouleur->fw_data);
  1789. if (ret) {
  1790. pr_err("%s: mbhc initialization failed\n", __func__);
  1791. goto done;
  1792. }
  1793. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1794. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1795. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1796. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1797. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1798. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1799. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1800. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1801. snd_soc_dapm_ignore_suspend(dapm, "LO");
  1802. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1803. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1804. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1805. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1806. snd_soc_dapm_sync(dapm);
  1807. rouleur_init_reg(component);
  1808. rouleur->version = ROULEUR_VERSION_1_0;
  1809. /* Register event notifier */
  1810. rouleur->nblock.notifier_call = rouleur_event_notify;
  1811. if (rouleur->register_notifier) {
  1812. ret = rouleur->register_notifier(rouleur->handle,
  1813. &rouleur->nblock,
  1814. true);
  1815. if (ret) {
  1816. dev_err(component->dev,
  1817. "%s: Failed to register notifier %d\n",
  1818. __func__, ret);
  1819. return ret;
  1820. }
  1821. }
  1822. rouleur->dev_up = true;
  1823. done:
  1824. return ret;
  1825. }
  1826. static void rouleur_soc_codec_remove(struct snd_soc_component *component)
  1827. {
  1828. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1829. if (!rouleur)
  1830. return;
  1831. if (rouleur->register_notifier)
  1832. rouleur->register_notifier(rouleur->handle,
  1833. &rouleur->nblock,
  1834. false);
  1835. }
  1836. static int rouleur_soc_codec_suspend(struct snd_soc_component *component)
  1837. {
  1838. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1839. if (!rouleur)
  1840. return 0;
  1841. rouleur->dapm_bias_off = true;
  1842. return 0;
  1843. }
  1844. static int rouleur_soc_codec_resume(struct snd_soc_component *component)
  1845. {
  1846. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1847. if (!rouleur)
  1848. return 0;
  1849. rouleur->dapm_bias_off = false;
  1850. return 0;
  1851. }
  1852. static const struct snd_soc_component_driver soc_codec_dev_rouleur = {
  1853. .name = DRV_NAME,
  1854. .probe = rouleur_soc_codec_probe,
  1855. .remove = rouleur_soc_codec_remove,
  1856. .controls = rouleur_snd_controls,
  1857. .num_controls = ARRAY_SIZE(rouleur_snd_controls),
  1858. .dapm_widgets = rouleur_dapm_widgets,
  1859. .num_dapm_widgets = ARRAY_SIZE(rouleur_dapm_widgets),
  1860. .dapm_routes = rouleur_audio_map,
  1861. .num_dapm_routes = ARRAY_SIZE(rouleur_audio_map),
  1862. .suspend = rouleur_soc_codec_suspend,
  1863. .resume = rouleur_soc_codec_resume,
  1864. };
  1865. #ifdef CONFIG_PM_SLEEP
  1866. static int rouleur_suspend(struct device *dev)
  1867. {
  1868. struct rouleur_priv *rouleur = NULL;
  1869. int ret = 0;
  1870. struct rouleur_pdata *pdata = NULL;
  1871. if (!dev)
  1872. return -ENODEV;
  1873. rouleur = dev_get_drvdata(dev);
  1874. if (!rouleur)
  1875. return -EINVAL;
  1876. pdata = dev_get_platdata(rouleur->dev);
  1877. if (!pdata) {
  1878. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1879. return -EINVAL;
  1880. }
  1881. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1882. ret = msm_cdc_disable_ondemand_supply(rouleur->dev,
  1883. rouleur->supplies,
  1884. pdata->regulator,
  1885. pdata->num_supplies,
  1886. "cdc-pa-vpos");
  1887. if (ret == -EINVAL) {
  1888. dev_err(dev, "%s: pa vpos is not disabled\n",
  1889. __func__);
  1890. return 0;
  1891. }
  1892. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1893. }
  1894. if (rouleur->dapm_bias_off) {
  1895. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  1896. rouleur->supplies,
  1897. pdata->regulator,
  1898. pdata->num_supplies,
  1899. true);
  1900. set_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  1901. }
  1902. return 0;
  1903. }
  1904. static int rouleur_resume(struct device *dev)
  1905. {
  1906. struct rouleur_priv *rouleur = NULL;
  1907. struct rouleur_pdata *pdata = NULL;
  1908. if (!dev)
  1909. return -ENODEV;
  1910. rouleur = dev_get_drvdata(dev);
  1911. if (!rouleur)
  1912. return -EINVAL;
  1913. pdata = dev_get_platdata(rouleur->dev);
  1914. if (!pdata) {
  1915. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1916. return -EINVAL;
  1917. }
  1918. if (test_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask)) {
  1919. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  1920. rouleur->supplies,
  1921. pdata->regulator,
  1922. pdata->num_supplies,
  1923. false);
  1924. clear_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  1925. }
  1926. return 0;
  1927. }
  1928. #endif
  1929. static int rouleur_reset(struct device *dev, int reset_val)
  1930. {
  1931. struct rouleur_priv *rouleur = NULL;
  1932. if (!dev)
  1933. return -ENODEV;
  1934. rouleur = dev_get_drvdata(dev);
  1935. if (!rouleur)
  1936. return -EINVAL;
  1937. pm2250_spmi_write(rouleur->spmi_dev, rouleur->reset_reg, reset_val);
  1938. return 0;
  1939. }
  1940. static int rouleur_read_of_property_u32(struct device *dev, const char *name,
  1941. u32 *val)
  1942. {
  1943. int rc = 0;
  1944. rc = of_property_read_u32(dev->of_node, name, val);
  1945. if (rc)
  1946. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1947. __func__, name, dev->of_node->full_name);
  1948. return rc;
  1949. }
  1950. static void rouleur_dt_parse_micbias_info(struct device *dev,
  1951. struct rouleur_micbias_setting *mb)
  1952. {
  1953. u32 prop_val = 0;
  1954. int rc = 0;
  1955. /* MB1 */
  1956. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1957. NULL)) {
  1958. rc = rouleur_read_of_property_u32(dev,
  1959. "qcom,cdc-micbias1-mv",
  1960. &prop_val);
  1961. if (!rc)
  1962. mb->micb1_mv = prop_val;
  1963. } else {
  1964. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1965. __func__);
  1966. }
  1967. /* MB2 */
  1968. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1969. NULL)) {
  1970. rc = rouleur_read_of_property_u32(dev,
  1971. "qcom,cdc-micbias2-mv",
  1972. &prop_val);
  1973. if (!rc)
  1974. mb->micb2_mv = prop_val;
  1975. } else {
  1976. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1977. __func__);
  1978. }
  1979. /* MB3 */
  1980. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1981. NULL)) {
  1982. rc = rouleur_read_of_property_u32(dev,
  1983. "qcom,cdc-micbias3-mv",
  1984. &prop_val);
  1985. if (!rc)
  1986. mb->micb3_mv = prop_val;
  1987. } else {
  1988. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1989. __func__);
  1990. }
  1991. }
  1992. struct rouleur_pdata *rouleur_populate_dt_data(struct device *dev)
  1993. {
  1994. struct rouleur_pdata *pdata = NULL;
  1995. u32 reg;
  1996. int ret = 0;
  1997. pdata = kzalloc(sizeof(struct rouleur_pdata),
  1998. GFP_KERNEL);
  1999. if (!pdata)
  2000. return NULL;
  2001. pdata->spmi_np = of_parse_phandle(dev->of_node,
  2002. "qcom,pmic-spmi-node", 0);
  2003. if (!pdata->spmi_np) {
  2004. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2005. __func__, "qcom,pmic-spmi-node",
  2006. dev->of_node->full_name);
  2007. kfree(pdata);
  2008. return NULL;
  2009. }
  2010. ret = of_property_read_u32(dev->of_node, "qcom,wcd-reset-reg", &reg);
  2011. if (ret) {
  2012. dev_err(dev, "%s: Failed to obtain reset reg value %d\n",
  2013. __func__, ret);
  2014. kfree(pdata);
  2015. return NULL;
  2016. }
  2017. pdata->reset_reg = reg;
  2018. /* Parse power supplies */
  2019. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  2020. &pdata->num_supplies);
  2021. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  2022. dev_err(dev, "%s: no power supplies defined for codec\n",
  2023. __func__);
  2024. kfree(pdata);
  2025. return NULL;
  2026. }
  2027. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  2028. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  2029. rouleur_dt_parse_micbias_info(dev, &pdata->micbias);
  2030. return pdata;
  2031. }
  2032. static int rouleur_wakeup(void *handle, bool enable)
  2033. {
  2034. struct rouleur_priv *priv;
  2035. if (!handle) {
  2036. pr_err("%s: NULL handle\n", __func__);
  2037. return -EINVAL;
  2038. }
  2039. priv = (struct rouleur_priv *)handle;
  2040. if (!priv->tx_swr_dev) {
  2041. pr_err("%s: tx swr dev is NULL\n", __func__);
  2042. return -EINVAL;
  2043. }
  2044. if (enable)
  2045. return swr_device_wakeup_vote(priv->tx_swr_dev);
  2046. else
  2047. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  2048. }
  2049. static irqreturn_t rouleur_wd_handle_irq(int irq, void *data)
  2050. {
  2051. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  2052. __func__, irq);
  2053. return IRQ_HANDLED;
  2054. }
  2055. static int rouleur_bind(struct device *dev)
  2056. {
  2057. int ret = 0, i = 0;
  2058. struct rouleur_priv *rouleur = NULL;
  2059. struct rouleur_pdata *pdata = NULL;
  2060. struct wcd_ctrl_platform_data *plat_data = NULL;
  2061. struct platform_device *pdev = NULL;
  2062. rouleur = kzalloc(sizeof(struct rouleur_priv), GFP_KERNEL);
  2063. if (!rouleur)
  2064. return -ENOMEM;
  2065. dev_set_drvdata(dev, rouleur);
  2066. pdata = rouleur_populate_dt_data(dev);
  2067. if (!pdata) {
  2068. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  2069. kfree(rouleur);
  2070. return -EINVAL;
  2071. }
  2072. rouleur->dev = dev;
  2073. rouleur->dev->platform_data = pdata;
  2074. pdev = of_find_device_by_node(pdata->spmi_np);
  2075. if (!pdev) {
  2076. dev_err(dev, "%s: platform device from SPMI node is NULL\n",
  2077. __func__);
  2078. ret = -EINVAL;
  2079. goto err_bind_all;
  2080. }
  2081. rouleur->spmi_dev = &pdev->dev;
  2082. rouleur->reset_reg = pdata->reset_reg;
  2083. ret = msm_cdc_init_supplies(dev, &rouleur->supplies,
  2084. pdata->regulator, pdata->num_supplies);
  2085. if (!rouleur->supplies) {
  2086. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2087. __func__);
  2088. goto err_bind_all;
  2089. }
  2090. plat_data = dev_get_platdata(dev->parent);
  2091. if (!plat_data) {
  2092. dev_err(dev, "%s: platform data from parent is NULL\n",
  2093. __func__);
  2094. ret = -EINVAL;
  2095. goto err_bind_all;
  2096. }
  2097. rouleur->handle = (void *)plat_data->handle;
  2098. if (!rouleur->handle) {
  2099. dev_err(dev, "%s: handle is NULL\n", __func__);
  2100. ret = -EINVAL;
  2101. goto err_bind_all;
  2102. }
  2103. rouleur->update_wcd_event = plat_data->update_wcd_event;
  2104. if (!rouleur->update_wcd_event) {
  2105. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2106. __func__);
  2107. ret = -EINVAL;
  2108. goto err_bind_all;
  2109. }
  2110. rouleur->register_notifier = plat_data->register_notifier;
  2111. if (!rouleur->register_notifier) {
  2112. dev_err(dev, "%s: register_notifier api is null!\n",
  2113. __func__);
  2114. ret = -EINVAL;
  2115. goto err_bind_all;
  2116. }
  2117. ret = msm_cdc_enable_static_supplies(dev, rouleur->supplies,
  2118. pdata->regulator,
  2119. pdata->num_supplies);
  2120. if (ret) {
  2121. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2122. __func__);
  2123. goto err_bind_all;
  2124. }
  2125. rouleur_reset(dev, 0x01);
  2126. usleep_range(20, 30);
  2127. rouleur_reset(dev, 0x00);
  2128. /*
  2129. * Add 5msec delay to provide sufficient time for
  2130. * soundwire auto enumeration of slave devices as
  2131. * as per HW requirement.
  2132. */
  2133. usleep_range(5000, 5010);
  2134. rouleur->wakeup = rouleur_wakeup;
  2135. ret = component_bind_all(dev, rouleur);
  2136. if (ret) {
  2137. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2138. __func__, ret);
  2139. goto err_bind_all;
  2140. }
  2141. ret = rouleur_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2142. ret |= rouleur_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2143. if (ret) {
  2144. dev_err(dev, "Failed to read port mapping\n");
  2145. goto err;
  2146. }
  2147. rouleur->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2148. if (!rouleur->rx_swr_dev) {
  2149. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2150. __func__);
  2151. ret = -ENODEV;
  2152. goto err;
  2153. }
  2154. rouleur->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2155. if (!rouleur->tx_swr_dev) {
  2156. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2157. __func__);
  2158. ret = -ENODEV;
  2159. goto err;
  2160. }
  2161. rouleur->regmap = devm_regmap_init_swr(rouleur->tx_swr_dev,
  2162. &rouleur_regmap_config);
  2163. if (!rouleur->regmap) {
  2164. dev_err(dev, "%s: Regmap init failed\n",
  2165. __func__);
  2166. goto err;
  2167. }
  2168. /* Set all interupts as edge triggered */
  2169. for (i = 0; i < rouleur_regmap_irq_chip.num_regs; i++)
  2170. regmap_write(rouleur->regmap,
  2171. (ROULEUR_DIG_SWR_INTR_LEVEL_0 + i), 0);
  2172. rouleur_regmap_irq_chip.irq_drv_data = rouleur;
  2173. rouleur->irq_info.wcd_regmap_irq_chip = &rouleur_regmap_irq_chip;
  2174. rouleur->irq_info.codec_name = "rouleur";
  2175. rouleur->irq_info.regmap = rouleur->regmap;
  2176. rouleur->irq_info.dev = dev;
  2177. ret = wcd_irq_init(&rouleur->irq_info, &rouleur->virq);
  2178. if (ret) {
  2179. dev_err(dev, "%s: IRQ init failed: %d\n",
  2180. __func__, ret);
  2181. goto err;
  2182. }
  2183. rouleur->tx_swr_dev->slave_irq = rouleur->virq;
  2184. mutex_init(&rouleur->micb_lock);
  2185. mutex_init(&rouleur->main_bias_lock);
  2186. mutex_init(&rouleur->rx_clk_lock);
  2187. ret = rouleur_set_micbias_data(rouleur, pdata);
  2188. if (ret < 0) {
  2189. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2190. goto err_irq;
  2191. }
  2192. /* Request for watchdog interrupt */
  2193. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT,
  2194. "HPHR PDM WD INT", rouleur_wd_handle_irq, NULL);
  2195. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT,
  2196. "HPHL PDM WD INT", rouleur_wd_handle_irq, NULL);
  2197. /* Disable watchdog interrupt for HPH */
  2198. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT);
  2199. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT);
  2200. ret = snd_soc_register_component(dev, &soc_codec_dev_rouleur,
  2201. NULL, 0);
  2202. if (ret) {
  2203. dev_err(dev, "%s: Codec registration failed\n",
  2204. __func__);
  2205. goto err_irq;
  2206. }
  2207. return ret;
  2208. err_irq:
  2209. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2210. mutex_destroy(&rouleur->micb_lock);
  2211. mutex_destroy(&rouleur->main_bias_lock);
  2212. mutex_destroy(&rouleur->rx_clk_lock);
  2213. err:
  2214. component_unbind_all(dev, rouleur);
  2215. err_bind_all:
  2216. dev_set_drvdata(dev, NULL);
  2217. kfree(pdata);
  2218. kfree(rouleur);
  2219. return ret;
  2220. }
  2221. static void rouleur_unbind(struct device *dev)
  2222. {
  2223. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  2224. struct rouleur_pdata *pdata = dev_get_platdata(rouleur->dev);
  2225. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2226. snd_soc_unregister_component(dev);
  2227. component_unbind_all(dev, rouleur);
  2228. mutex_destroy(&rouleur->micb_lock);
  2229. mutex_destroy(&rouleur->main_bias_lock);
  2230. mutex_destroy(&rouleur->rx_clk_lock);
  2231. dev_set_drvdata(dev, NULL);
  2232. kfree(pdata);
  2233. kfree(rouleur);
  2234. }
  2235. static const struct of_device_id rouleur_dt_match[] = {
  2236. { .compatible = "qcom,rouleur-codec" , .data = "rouleur" },
  2237. {}
  2238. };
  2239. static const struct component_master_ops rouleur_comp_ops = {
  2240. .bind = rouleur_bind,
  2241. .unbind = rouleur_unbind,
  2242. };
  2243. static int rouleur_compare_of(struct device *dev, void *data)
  2244. {
  2245. return dev->of_node == data;
  2246. }
  2247. static void rouleur_release_of(struct device *dev, void *data)
  2248. {
  2249. of_node_put(data);
  2250. }
  2251. static int rouleur_add_slave_components(struct device *dev,
  2252. struct component_match **matchptr)
  2253. {
  2254. struct device_node *np, *rx_node, *tx_node;
  2255. np = dev->of_node;
  2256. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2257. if (!rx_node) {
  2258. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2259. return -ENODEV;
  2260. }
  2261. of_node_get(rx_node);
  2262. component_match_add_release(dev, matchptr,
  2263. rouleur_release_of,
  2264. rouleur_compare_of,
  2265. rx_node);
  2266. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2267. if (!tx_node) {
  2268. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2269. return -ENODEV;
  2270. }
  2271. of_node_get(tx_node);
  2272. component_match_add_release(dev, matchptr,
  2273. rouleur_release_of,
  2274. rouleur_compare_of,
  2275. tx_node);
  2276. return 0;
  2277. }
  2278. static int rouleur_probe(struct platform_device *pdev)
  2279. {
  2280. struct component_match *match = NULL;
  2281. int ret;
  2282. ret = rouleur_add_slave_components(&pdev->dev, &match);
  2283. if (ret)
  2284. return ret;
  2285. return component_master_add_with_match(&pdev->dev,
  2286. &rouleur_comp_ops, match);
  2287. }
  2288. static int rouleur_remove(struct platform_device *pdev)
  2289. {
  2290. component_master_del(&pdev->dev, &rouleur_comp_ops);
  2291. dev_set_drvdata(&pdev->dev, NULL);
  2292. return 0;
  2293. }
  2294. #ifdef CONFIG_PM_SLEEP
  2295. static const struct dev_pm_ops rouleur_dev_pm_ops = {
  2296. .suspend_late = rouleur_suspend,
  2297. .resume_early = rouleur_resume
  2298. };
  2299. #endif
  2300. static struct platform_driver rouleur_codec_driver = {
  2301. .probe = rouleur_probe,
  2302. .remove = rouleur_remove,
  2303. .driver = {
  2304. .name = "rouleur_codec",
  2305. .owner = THIS_MODULE,
  2306. .of_match_table = of_match_ptr(rouleur_dt_match),
  2307. #ifdef CONFIG_PM_SLEEP
  2308. .pm = &rouleur_dev_pm_ops,
  2309. #endif
  2310. .suppress_bind_attrs = true,
  2311. },
  2312. };
  2313. module_platform_driver(rouleur_codec_driver);
  2314. MODULE_DESCRIPTION("Rouleur Codec driver");
  2315. MODULE_LICENSE("GPL v2");