main.c 110 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  34. #include "smcinvoke.h"
  35. #include "smcinvoke_object.h"
  36. #include "IClientEnv.h"
  37. #define HW_STATE_UID 0x108
  38. #define HW_OP_GET_STATE 1
  39. #define HW_WIFI_UID 0x508
  40. #define FEATURE_NOT_SUPPORTED 12
  41. #define PERIPHERAL_NOT_FOUND 10
  42. #endif
  43. #define CNSS_DUMP_FORMAT_VER 0x11
  44. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  45. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  46. #define CNSS_DUMP_NAME "CNSS_WLAN"
  47. #define CNSS_DUMP_DESC_SIZE 0x1000
  48. #define CNSS_DUMP_SEG_VER 0x1
  49. #define FILE_SYSTEM_READY 1
  50. #define FW_READY_TIMEOUT 20000
  51. #define FW_ASSERT_TIMEOUT 5000
  52. #define CNSS_EVENT_PENDING 2989
  53. #define POWER_RESET_MIN_DELAY_MS 100
  54. #define CNSS_QUIRKS_DEFAULT 0
  55. #ifdef CONFIG_CNSS_EMULATION
  56. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  57. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  58. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  59. #else
  60. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  61. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  62. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  63. #endif
  64. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  65. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  66. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  67. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  69. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  70. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  71. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  72. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  73. enum cnss_cal_db_op {
  74. CNSS_CAL_DB_UPLOAD,
  75. CNSS_CAL_DB_DOWNLOAD,
  76. CNSS_CAL_DB_INVALID_OP,
  77. };
  78. enum cnss_recovery_type {
  79. CNSS_WLAN_RECOVERY = 0x1,
  80. CNSS_PCSS_RECOVERY = 0x2,
  81. };
  82. static struct cnss_plat_data *plat_env;
  83. static bool cnss_allow_driver_loading;
  84. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  85. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  86. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  87. };
  88. static struct cnss_fw_files FW_FILES_DEFAULT = {
  89. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  90. "utfbd.bin", "epping.bin", "evicted.bin"
  91. };
  92. struct cnss_driver_event {
  93. struct list_head list;
  94. enum cnss_driver_event_type type;
  95. bool sync;
  96. struct completion complete;
  97. int ret;
  98. void *data;
  99. };
  100. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  101. struct cnss_plat_data *plat_priv)
  102. {
  103. plat_env = plat_priv;
  104. }
  105. bool cnss_check_driver_loading_allowed(void)
  106. {
  107. return cnss_allow_driver_loading;
  108. }
  109. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  110. {
  111. return plat_env;
  112. }
  113. /**
  114. * cnss_get_mem_seg_count - Get segment count of memory
  115. * @type: memory type
  116. * @seg: segment count
  117. *
  118. * Return: 0 on success, negative value on failure
  119. */
  120. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  121. {
  122. struct cnss_plat_data *plat_priv;
  123. plat_priv = cnss_get_plat_priv(NULL);
  124. if (!plat_priv)
  125. return -ENODEV;
  126. switch (type) {
  127. case CNSS_REMOTE_MEM_TYPE_FW:
  128. *seg = plat_priv->fw_mem_seg_len;
  129. break;
  130. case CNSS_REMOTE_MEM_TYPE_QDSS:
  131. *seg = plat_priv->qdss_mem_seg_len;
  132. break;
  133. default:
  134. return -EINVAL;
  135. }
  136. return 0;
  137. }
  138. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  139. /**
  140. * cnss_get_wifi_kobject -return wifi kobject
  141. * Return: Null, to maintain driver comnpatibilty
  142. */
  143. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  144. {
  145. struct cnss_plat_data *plat_priv;
  146. plat_priv = cnss_get_plat_priv(NULL);
  147. if (!plat_priv)
  148. return NULL;
  149. return plat_priv->wifi_kobj;
  150. }
  151. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  152. /**
  153. * cnss_get_mem_segment_info - Get memory info of different type
  154. * @type: memory type
  155. * @segment: array to save the segment info
  156. * @seg: segment count
  157. *
  158. * Return: 0 on success, negative value on failure
  159. */
  160. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  161. struct cnss_mem_segment segment[],
  162. u32 segment_count)
  163. {
  164. struct cnss_plat_data *plat_priv;
  165. u32 i;
  166. plat_priv = cnss_get_plat_priv(NULL);
  167. if (!plat_priv)
  168. return -ENODEV;
  169. switch (type) {
  170. case CNSS_REMOTE_MEM_TYPE_FW:
  171. if (segment_count > plat_priv->fw_mem_seg_len)
  172. segment_count = plat_priv->fw_mem_seg_len;
  173. for (i = 0; i < segment_count; i++) {
  174. segment[i].size = plat_priv->fw_mem[i].size;
  175. segment[i].va = plat_priv->fw_mem[i].va;
  176. segment[i].pa = plat_priv->fw_mem[i].pa;
  177. }
  178. break;
  179. case CNSS_REMOTE_MEM_TYPE_QDSS:
  180. if (segment_count > plat_priv->qdss_mem_seg_len)
  181. segment_count = plat_priv->qdss_mem_seg_len;
  182. for (i = 0; i < segment_count; i++) {
  183. segment[i].size = plat_priv->qdss_mem[i].size;
  184. segment[i].va = plat_priv->qdss_mem[i].va;
  185. segment[i].pa = plat_priv->qdss_mem[i].pa;
  186. }
  187. break;
  188. default:
  189. return -EINVAL;
  190. }
  191. return 0;
  192. }
  193. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  194. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  195. enum cnss_feature_v01 feature)
  196. {
  197. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  198. return -EINVAL;
  199. plat_priv->feature_list |= 1 << feature;
  200. return 0;
  201. }
  202. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  203. enum cnss_feature_v01 feature)
  204. {
  205. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  206. return -EINVAL;
  207. plat_priv->feature_list &= ~(1 << feature);
  208. return 0;
  209. }
  210. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  211. u64 *feature_list)
  212. {
  213. if (unlikely(!plat_priv))
  214. return -EINVAL;
  215. *feature_list = plat_priv->feature_list;
  216. return 0;
  217. }
  218. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  219. {
  220. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  221. return;
  222. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  223. plat_priv->driver_state,
  224. atomic_read(&plat_priv->pm_count));
  225. pm_stay_awake(&plat_priv->plat_dev->dev);
  226. }
  227. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  228. {
  229. int r = atomic_dec_return(&plat_priv->pm_count);
  230. WARN_ON(r < 0);
  231. if (r != 0)
  232. return;
  233. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  234. plat_priv->driver_state,
  235. atomic_read(&plat_priv->pm_count));
  236. pm_relax(&plat_priv->plat_dev->dev);
  237. }
  238. int cnss_get_fw_files_for_target(struct device *dev,
  239. struct cnss_fw_files *pfw_files,
  240. u32 target_type, u32 target_version)
  241. {
  242. if (!pfw_files)
  243. return -ENODEV;
  244. switch (target_version) {
  245. case QCA6174_REV3_VERSION:
  246. case QCA6174_REV3_2_VERSION:
  247. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  248. break;
  249. default:
  250. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  251. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  252. target_type, target_version);
  253. break;
  254. }
  255. return 0;
  256. }
  257. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  258. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  259. {
  260. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  261. if (!plat_priv)
  262. return -ENODEV;
  263. if (!cap)
  264. return -EINVAL;
  265. *cap = plat_priv->cap;
  266. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  267. return 0;
  268. }
  269. EXPORT_SYMBOL(cnss_get_platform_cap);
  270. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  271. {
  272. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  273. if (!plat_priv)
  274. return;
  275. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  276. }
  277. EXPORT_SYMBOL(cnss_request_pm_qos);
  278. void cnss_remove_pm_qos(struct device *dev)
  279. {
  280. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  281. if (!plat_priv)
  282. return;
  283. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  284. }
  285. EXPORT_SYMBOL(cnss_remove_pm_qos);
  286. int cnss_wlan_enable(struct device *dev,
  287. struct cnss_wlan_enable_cfg *config,
  288. enum cnss_driver_mode mode,
  289. const char *host_version)
  290. {
  291. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  292. int ret = 0;
  293. if (!plat_priv)
  294. return -ENODEV;
  295. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  296. return 0;
  297. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  298. return 0;
  299. if (!config || !host_version) {
  300. cnss_pr_err("Invalid config or host_version pointer\n");
  301. return -EINVAL;
  302. }
  303. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  304. mode, config, host_version);
  305. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  306. goto skip_cfg;
  307. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  308. if (ret)
  309. goto out;
  310. skip_cfg:
  311. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  312. out:
  313. return ret;
  314. }
  315. EXPORT_SYMBOL(cnss_wlan_enable);
  316. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  317. {
  318. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  319. int ret = 0;
  320. if (!plat_priv)
  321. return -ENODEV;
  322. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  323. return 0;
  324. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  325. return 0;
  326. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  327. cnss_bus_free_qdss_mem(plat_priv);
  328. return ret;
  329. }
  330. EXPORT_SYMBOL(cnss_wlan_disable);
  331. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  332. u32 data_len, u8 *output)
  333. {
  334. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  335. int ret = 0;
  336. if (!plat_priv) {
  337. cnss_pr_err("plat_priv is NULL!\n");
  338. return -EINVAL;
  339. }
  340. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  341. return 0;
  342. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  343. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  344. plat_priv->driver_state);
  345. ret = -EINVAL;
  346. goto out;
  347. }
  348. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  349. data_len, output);
  350. out:
  351. return ret;
  352. }
  353. EXPORT_SYMBOL(cnss_athdiag_read);
  354. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  355. u32 data_len, u8 *input)
  356. {
  357. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  358. int ret = 0;
  359. if (!plat_priv) {
  360. cnss_pr_err("plat_priv is NULL!\n");
  361. return -EINVAL;
  362. }
  363. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  364. return 0;
  365. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  366. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  367. plat_priv->driver_state);
  368. ret = -EINVAL;
  369. goto out;
  370. }
  371. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  372. data_len, input);
  373. out:
  374. return ret;
  375. }
  376. EXPORT_SYMBOL(cnss_athdiag_write);
  377. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  378. {
  379. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  380. if (!plat_priv)
  381. return -ENODEV;
  382. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  383. return 0;
  384. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  385. }
  386. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  387. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  388. {
  389. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  390. if (!plat_priv)
  391. return -EINVAL;
  392. if (!plat_priv->fw_pcie_gen_switch) {
  393. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  394. return -EOPNOTSUPP;
  395. }
  396. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  397. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  398. return -EINVAL;
  399. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  400. plat_priv->pcie_gen_speed = pcie_gen_speed;
  401. return 0;
  402. }
  403. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  404. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  405. {
  406. int ret = 0;
  407. if (!plat_priv)
  408. return -ENODEV;
  409. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  410. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  411. if (ret)
  412. goto out;
  413. if (plat_priv->hds_enabled)
  414. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  415. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  416. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  417. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  418. plat_priv->ctrl_params.bdf_type);
  419. if (ret)
  420. goto out;
  421. ret = cnss_bus_load_m3(plat_priv);
  422. if (ret)
  423. goto out;
  424. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  425. if (ret)
  426. goto out;
  427. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  428. return 0;
  429. out:
  430. return ret;
  431. }
  432. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  433. {
  434. int ret = 0;
  435. if (!plat_priv->antenna) {
  436. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  437. if (ret)
  438. goto out;
  439. }
  440. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  441. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  442. if (ret)
  443. goto out;
  444. }
  445. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  446. if (ret)
  447. goto out;
  448. return 0;
  449. out:
  450. return ret;
  451. }
  452. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  453. {
  454. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  455. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  456. }
  457. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  458. {
  459. u32 i;
  460. int ret = 0;
  461. struct cnss_plat_ipc_daemon_config *cfg;
  462. ret = cnss_qmi_get_dms_mac(plat_priv);
  463. if (ret == 0 && plat_priv->dms.mac_valid)
  464. goto qmi_send;
  465. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  466. * Thus assert on failure to get MAC from DMS even after retries
  467. */
  468. if (plat_priv->use_nv_mac) {
  469. /* Check if Daemon says platform support DMS MAC provisioning */
  470. cfg = cnss_plat_ipc_qmi_daemon_config();
  471. if (cfg) {
  472. if (!cfg->dms_mac_addr_supported) {
  473. cnss_pr_err("DMS MAC address not supported\n");
  474. CNSS_ASSERT(0);
  475. return -EINVAL;
  476. }
  477. }
  478. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  479. if (plat_priv->dms.mac_valid)
  480. break;
  481. ret = cnss_qmi_get_dms_mac(plat_priv);
  482. if (ret == 0)
  483. break;
  484. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  485. }
  486. if (!plat_priv->dms.mac_valid) {
  487. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  488. CNSS_ASSERT(0);
  489. return -EINVAL;
  490. }
  491. }
  492. qmi_send:
  493. if (plat_priv->dms.mac_valid)
  494. ret =
  495. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  496. ARRAY_SIZE(plat_priv->dms.mac));
  497. return ret;
  498. }
  499. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  500. enum cnss_cal_db_op op, u32 *size)
  501. {
  502. int ret = 0;
  503. u32 timeout = cnss_get_timeout(plat_priv,
  504. CNSS_TIMEOUT_DAEMON_CONNECTION);
  505. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  506. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  507. if (op >= CNSS_CAL_DB_INVALID_OP)
  508. return -EINVAL;
  509. if (!plat_priv->cbc_file_download) {
  510. cnss_pr_info("CAL DB file not required as per BDF\n");
  511. return 0;
  512. }
  513. if (*size == 0) {
  514. cnss_pr_err("Invalid cal file size\n");
  515. return -EINVAL;
  516. }
  517. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  518. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  519. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  520. msecs_to_jiffies(timeout));
  521. if (!ret) {
  522. cnss_pr_err("Daemon not yet connected\n");
  523. CNSS_ASSERT(0);
  524. return ret;
  525. }
  526. }
  527. if (!plat_priv->cal_mem->va) {
  528. cnss_pr_err("CAL DB Memory not setup for FW\n");
  529. return -EINVAL;
  530. }
  531. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  532. if (op == CNSS_CAL_DB_DOWNLOAD) {
  533. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  534. ret = cnss_plat_ipc_qmi_file_download(client_id,
  535. CNSS_CAL_DB_FILE_NAME,
  536. plat_priv->cal_mem->va,
  537. size);
  538. } else {
  539. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  540. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  541. CNSS_CAL_DB_FILE_NAME,
  542. plat_priv->cal_mem->va,
  543. *size);
  544. }
  545. if (ret)
  546. cnss_pr_err("Cal DB file %s %s failure\n",
  547. CNSS_CAL_DB_FILE_NAME,
  548. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  549. else
  550. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  551. CNSS_CAL_DB_FILE_NAME,
  552. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  553. *size);
  554. return ret;
  555. }
  556. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  557. {
  558. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  559. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  560. return -EINVAL;
  561. }
  562. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  563. &plat_priv->cal_file_size);
  564. }
  565. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  566. u32 *cal_file_size)
  567. {
  568. /* To download pass the total size of cal DB mem allocated.
  569. * After cal file is download to mem, its size is updated in
  570. * return pointer
  571. */
  572. *cal_file_size = plat_priv->cal_mem->size;
  573. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  574. cal_file_size);
  575. }
  576. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  577. {
  578. int ret = 0;
  579. u32 cal_file_size = 0;
  580. if (!plat_priv)
  581. return -ENODEV;
  582. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  583. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  584. return -EINVAL;
  585. }
  586. cnss_pr_dbg("Processing FW Init Done..\n");
  587. del_timer(&plat_priv->fw_boot_timer);
  588. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  589. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  590. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  591. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  592. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  593. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  594. }
  595. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  596. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  597. CNSS_WALTEST);
  598. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  599. cnss_request_antenna_sharing(plat_priv);
  600. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  601. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  602. plat_priv->cal_time = jiffies;
  603. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  604. CNSS_CALIBRATION);
  605. } else {
  606. ret = cnss_setup_dms_mac(plat_priv);
  607. ret = cnss_bus_call_driver_probe(plat_priv);
  608. }
  609. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  610. goto out;
  611. else if (ret)
  612. goto shutdown;
  613. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  614. return 0;
  615. shutdown:
  616. cnss_bus_dev_shutdown(plat_priv);
  617. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  618. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  619. out:
  620. return ret;
  621. }
  622. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  623. {
  624. switch (type) {
  625. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  626. return "SERVER_ARRIVE";
  627. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  628. return "SERVER_EXIT";
  629. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  630. return "REQUEST_MEM";
  631. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  632. return "FW_MEM_READY";
  633. case CNSS_DRIVER_EVENT_FW_READY:
  634. return "FW_READY";
  635. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  636. return "COLD_BOOT_CAL_START";
  637. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  638. return "COLD_BOOT_CAL_DONE";
  639. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  640. return "REGISTER_DRIVER";
  641. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  642. return "UNREGISTER_DRIVER";
  643. case CNSS_DRIVER_EVENT_RECOVERY:
  644. return "RECOVERY";
  645. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  646. return "FORCE_FW_ASSERT";
  647. case CNSS_DRIVER_EVENT_POWER_UP:
  648. return "POWER_UP";
  649. case CNSS_DRIVER_EVENT_POWER_DOWN:
  650. return "POWER_DOWN";
  651. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  652. return "IDLE_RESTART";
  653. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  654. return "IDLE_SHUTDOWN";
  655. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  656. return "IMS_WFC_CALL_IND";
  657. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  658. return "WLFW_TWC_CFG_IND";
  659. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  660. return "QDSS_TRACE_REQ_MEM";
  661. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  662. return "FW_MEM_FILE_SAVE";
  663. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  664. return "QDSS_TRACE_FREE";
  665. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  666. return "QDSS_TRACE_REQ_DATA";
  667. case CNSS_DRIVER_EVENT_MAX:
  668. return "EVENT_MAX";
  669. }
  670. return "UNKNOWN";
  671. };
  672. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  673. enum cnss_driver_event_type type,
  674. u32 flags, void *data)
  675. {
  676. struct cnss_driver_event *event;
  677. unsigned long irq_flags;
  678. int gfp = GFP_KERNEL;
  679. int ret = 0;
  680. if (!plat_priv)
  681. return -ENODEV;
  682. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  683. cnss_driver_event_to_str(type), type,
  684. flags ? "-sync" : "", plat_priv->driver_state, flags);
  685. if (type >= CNSS_DRIVER_EVENT_MAX) {
  686. cnss_pr_err("Invalid Event type: %d, can't post", type);
  687. return -EINVAL;
  688. }
  689. if (in_interrupt() || irqs_disabled())
  690. gfp = GFP_ATOMIC;
  691. event = kzalloc(sizeof(*event), gfp);
  692. if (!event)
  693. return -ENOMEM;
  694. cnss_pm_stay_awake(plat_priv);
  695. event->type = type;
  696. event->data = data;
  697. init_completion(&event->complete);
  698. event->ret = CNSS_EVENT_PENDING;
  699. event->sync = !!(flags & CNSS_EVENT_SYNC);
  700. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  701. list_add_tail(&event->list, &plat_priv->event_list);
  702. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  703. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  704. if (!(flags & CNSS_EVENT_SYNC))
  705. goto out;
  706. if (flags & CNSS_EVENT_UNKILLABLE)
  707. wait_for_completion(&event->complete);
  708. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  709. ret = wait_for_completion_killable(&event->complete);
  710. else
  711. ret = wait_for_completion_interruptible(&event->complete);
  712. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  713. cnss_driver_event_to_str(type), type,
  714. plat_priv->driver_state, ret, event->ret);
  715. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  716. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  717. event->sync = false;
  718. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  719. ret = -EINTR;
  720. goto out;
  721. }
  722. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  723. ret = event->ret;
  724. kfree(event);
  725. out:
  726. cnss_pm_relax(plat_priv);
  727. return ret;
  728. }
  729. /**
  730. * cnss_get_timeout - Get timeout for corresponding type.
  731. * @plat_priv: Pointer to platform driver context.
  732. * @cnss_timeout_type: Timeout type.
  733. *
  734. * Return: Timeout in milliseconds.
  735. */
  736. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  737. enum cnss_timeout_type timeout_type)
  738. {
  739. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  740. switch (timeout_type) {
  741. case CNSS_TIMEOUT_QMI:
  742. return qmi_timeout;
  743. case CNSS_TIMEOUT_POWER_UP:
  744. return (qmi_timeout << 2);
  745. case CNSS_TIMEOUT_IDLE_RESTART:
  746. /* In idle restart power up sequence, we have fw_boot_timer to
  747. * handle FW initialization failure.
  748. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  749. * account for FW dump collection and FW re-initialization on
  750. * retry.
  751. */
  752. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  753. case CNSS_TIMEOUT_CALIBRATION:
  754. /* Similar to mission mode, in CBC if FW init fails
  755. * fw recovery is tried. Thus return 2x the CBC timeout.
  756. */
  757. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  758. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  759. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  760. case CNSS_TIMEOUT_RDDM:
  761. return CNSS_RDDM_TIMEOUT_MS;
  762. case CNSS_TIMEOUT_RECOVERY:
  763. return RECOVERY_TIMEOUT;
  764. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  765. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  766. default:
  767. return qmi_timeout;
  768. }
  769. }
  770. unsigned int cnss_get_boot_timeout(struct device *dev)
  771. {
  772. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  773. if (!plat_priv) {
  774. cnss_pr_err("plat_priv is NULL\n");
  775. return 0;
  776. }
  777. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  778. }
  779. EXPORT_SYMBOL(cnss_get_boot_timeout);
  780. int cnss_power_up(struct device *dev)
  781. {
  782. int ret = 0;
  783. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  784. unsigned int timeout;
  785. if (!plat_priv) {
  786. cnss_pr_err("plat_priv is NULL\n");
  787. return -ENODEV;
  788. }
  789. cnss_pr_dbg("Powering up device\n");
  790. ret = cnss_driver_event_post(plat_priv,
  791. CNSS_DRIVER_EVENT_POWER_UP,
  792. CNSS_EVENT_SYNC, NULL);
  793. if (ret)
  794. goto out;
  795. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  796. goto out;
  797. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  798. reinit_completion(&plat_priv->power_up_complete);
  799. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  800. msecs_to_jiffies(timeout));
  801. if (!ret) {
  802. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  803. timeout);
  804. ret = -EAGAIN;
  805. goto out;
  806. }
  807. return 0;
  808. out:
  809. return ret;
  810. }
  811. EXPORT_SYMBOL(cnss_power_up);
  812. int cnss_power_down(struct device *dev)
  813. {
  814. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  815. if (!plat_priv) {
  816. cnss_pr_err("plat_priv is NULL\n");
  817. return -ENODEV;
  818. }
  819. cnss_pr_dbg("Powering down device\n");
  820. return cnss_driver_event_post(plat_priv,
  821. CNSS_DRIVER_EVENT_POWER_DOWN,
  822. CNSS_EVENT_SYNC, NULL);
  823. }
  824. EXPORT_SYMBOL(cnss_power_down);
  825. int cnss_idle_restart(struct device *dev)
  826. {
  827. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  828. unsigned int timeout;
  829. int ret = 0;
  830. if (!plat_priv) {
  831. cnss_pr_err("plat_priv is NULL\n");
  832. return -ENODEV;
  833. }
  834. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  835. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  836. return -EBUSY;
  837. }
  838. cnss_pr_dbg("Doing idle restart\n");
  839. reinit_completion(&plat_priv->power_up_complete);
  840. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  841. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  842. ret = -EINVAL;
  843. goto out;
  844. }
  845. ret = cnss_driver_event_post(plat_priv,
  846. CNSS_DRIVER_EVENT_IDLE_RESTART,
  847. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  848. if (ret)
  849. goto out;
  850. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  851. ret = cnss_bus_call_driver_probe(plat_priv);
  852. goto out;
  853. }
  854. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  855. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  856. msecs_to_jiffies(timeout));
  857. if (plat_priv->power_up_error) {
  858. ret = plat_priv->power_up_error;
  859. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  860. cnss_pr_dbg("Power up error:%d, exiting\n",
  861. plat_priv->power_up_error);
  862. goto out;
  863. }
  864. if (!ret) {
  865. /* This exception occurs after attempting retry of FW recovery.
  866. * Thus we can safely power off the device.
  867. */
  868. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  869. timeout);
  870. ret = -ETIMEDOUT;
  871. cnss_power_down(dev);
  872. CNSS_ASSERT(0);
  873. goto out;
  874. }
  875. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  876. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  877. del_timer(&plat_priv->fw_boot_timer);
  878. ret = -EINVAL;
  879. goto out;
  880. }
  881. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  882. * non-DRV is supported only once after device reboots and before wifi
  883. * is turned on. We do not allow switching back to DRV.
  884. * To bring device back into DRV, user needs to reboot device.
  885. */
  886. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  887. cnss_pr_dbg("DRV is disabled\n");
  888. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  889. }
  890. mutex_unlock(&plat_priv->driver_ops_lock);
  891. return 0;
  892. out:
  893. mutex_unlock(&plat_priv->driver_ops_lock);
  894. return ret;
  895. }
  896. EXPORT_SYMBOL(cnss_idle_restart);
  897. int cnss_idle_shutdown(struct device *dev)
  898. {
  899. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  900. unsigned int timeout;
  901. int ret;
  902. if (!plat_priv) {
  903. cnss_pr_err("plat_priv is NULL\n");
  904. return -ENODEV;
  905. }
  906. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  907. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  908. return -EAGAIN;
  909. }
  910. cnss_pr_dbg("Doing idle shutdown\n");
  911. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  912. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  913. goto skip_wait;
  914. reinit_completion(&plat_priv->recovery_complete);
  915. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  916. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  917. msecs_to_jiffies(timeout));
  918. if (!ret) {
  919. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  920. timeout);
  921. CNSS_ASSERT(0);
  922. }
  923. skip_wait:
  924. return cnss_driver_event_post(plat_priv,
  925. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  926. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  927. }
  928. EXPORT_SYMBOL(cnss_idle_shutdown);
  929. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  930. {
  931. int ret = 0;
  932. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  933. if (ret) {
  934. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  935. goto out;
  936. }
  937. ret = cnss_get_clk(plat_priv);
  938. if (ret) {
  939. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  940. goto put_vreg;
  941. }
  942. ret = cnss_get_pinctrl(plat_priv);
  943. if (ret) {
  944. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  945. goto put_clk;
  946. }
  947. return 0;
  948. put_clk:
  949. cnss_put_clk(plat_priv);
  950. put_vreg:
  951. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  952. out:
  953. return ret;
  954. }
  955. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  956. {
  957. cnss_put_clk(plat_priv);
  958. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  959. }
  960. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  961. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  962. unsigned long code,
  963. void *ss_handle)
  964. {
  965. struct cnss_plat_data *plat_priv =
  966. container_of(nb, struct cnss_plat_data, modem_nb);
  967. struct cnss_esoc_info *esoc_info;
  968. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  969. if (!plat_priv)
  970. return NOTIFY_DONE;
  971. esoc_info = &plat_priv->esoc_info;
  972. if (code == SUBSYS_AFTER_POWERUP)
  973. esoc_info->modem_current_status = 1;
  974. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  975. esoc_info->modem_current_status = 0;
  976. else
  977. return NOTIFY_DONE;
  978. if (!cnss_bus_call_driver_modem_status(plat_priv,
  979. esoc_info->modem_current_status))
  980. return NOTIFY_DONE;
  981. return NOTIFY_OK;
  982. }
  983. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  984. {
  985. int ret = 0;
  986. struct device *dev;
  987. struct cnss_esoc_info *esoc_info;
  988. struct esoc_desc *esoc_desc;
  989. const char *client_desc;
  990. dev = &plat_priv->plat_dev->dev;
  991. esoc_info = &plat_priv->esoc_info;
  992. esoc_info->notify_modem_status =
  993. of_property_read_bool(dev->of_node,
  994. "qcom,notify-modem-status");
  995. if (!esoc_info->notify_modem_status)
  996. goto out;
  997. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  998. &client_desc);
  999. if (ret) {
  1000. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1001. } else {
  1002. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1003. if (IS_ERR_OR_NULL(esoc_desc)) {
  1004. ret = PTR_RET(esoc_desc);
  1005. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1006. ret);
  1007. goto out;
  1008. }
  1009. esoc_info->esoc_desc = esoc_desc;
  1010. }
  1011. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1012. esoc_info->modem_current_status = 0;
  1013. esoc_info->modem_notify_handler =
  1014. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1015. esoc_info->esoc_desc->name :
  1016. "modem", &plat_priv->modem_nb);
  1017. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1018. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1019. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1020. ret);
  1021. goto unreg_esoc;
  1022. }
  1023. return 0;
  1024. unreg_esoc:
  1025. if (esoc_info->esoc_desc)
  1026. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1027. out:
  1028. return ret;
  1029. }
  1030. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1031. {
  1032. struct device *dev;
  1033. struct cnss_esoc_info *esoc_info;
  1034. dev = &plat_priv->plat_dev->dev;
  1035. esoc_info = &plat_priv->esoc_info;
  1036. if (esoc_info->notify_modem_status)
  1037. subsys_notif_unregister_notifier
  1038. (esoc_info->modem_notify_handler,
  1039. &plat_priv->modem_nb);
  1040. if (esoc_info->esoc_desc)
  1041. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1042. }
  1043. #else
  1044. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1045. {
  1046. return 0;
  1047. }
  1048. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1049. #endif
  1050. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1051. {
  1052. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1053. int ret = 0;
  1054. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1055. return 0;
  1056. enable_irq(sol_gpio->dev_sol_irq);
  1057. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1058. if (ret)
  1059. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1060. ret);
  1061. return ret;
  1062. }
  1063. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1064. {
  1065. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1066. int ret = 0;
  1067. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1068. return 0;
  1069. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1070. if (ret)
  1071. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1072. ret);
  1073. disable_irq(sol_gpio->dev_sol_irq);
  1074. return ret;
  1075. }
  1076. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1077. {
  1078. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1079. if (sol_gpio->dev_sol_gpio < 0)
  1080. return -EINVAL;
  1081. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1082. }
  1083. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1084. {
  1085. struct cnss_plat_data *plat_priv = data;
  1086. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1087. sol_gpio->dev_sol_counter++;
  1088. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1089. irq, sol_gpio->dev_sol_counter);
  1090. /* Make sure abort current suspend */
  1091. cnss_pm_stay_awake(plat_priv);
  1092. cnss_pm_relax(plat_priv);
  1093. pm_system_wakeup();
  1094. cnss_bus_handle_dev_sol_irq(plat_priv);
  1095. return IRQ_HANDLED;
  1096. }
  1097. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1098. {
  1099. struct device *dev = &plat_priv->plat_dev->dev;
  1100. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1101. int ret = 0;
  1102. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1103. "wlan-dev-sol-gpio", 0);
  1104. if (sol_gpio->dev_sol_gpio < 0)
  1105. goto out;
  1106. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1107. sol_gpio->dev_sol_gpio);
  1108. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1109. if (ret) {
  1110. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1111. ret);
  1112. goto out;
  1113. }
  1114. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1115. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1116. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1117. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1118. if (ret) {
  1119. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1120. goto free_gpio;
  1121. }
  1122. return 0;
  1123. free_gpio:
  1124. gpio_free(sol_gpio->dev_sol_gpio);
  1125. out:
  1126. return ret;
  1127. }
  1128. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1129. {
  1130. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1131. if (sol_gpio->dev_sol_gpio < 0)
  1132. return;
  1133. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1134. gpio_free(sol_gpio->dev_sol_gpio);
  1135. }
  1136. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1137. {
  1138. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1139. if (sol_gpio->host_sol_gpio < 0)
  1140. return -EINVAL;
  1141. if (value)
  1142. cnss_pr_dbg("Assert host SOL GPIO\n");
  1143. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1144. return 0;
  1145. }
  1146. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1147. {
  1148. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1149. if (sol_gpio->host_sol_gpio < 0)
  1150. return -EINVAL;
  1151. return gpio_get_value(sol_gpio->host_sol_gpio);
  1152. }
  1153. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1154. {
  1155. struct device *dev = &plat_priv->plat_dev->dev;
  1156. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1157. int ret = 0;
  1158. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1159. "wlan-host-sol-gpio", 0);
  1160. if (sol_gpio->host_sol_gpio < 0)
  1161. goto out;
  1162. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1163. sol_gpio->host_sol_gpio);
  1164. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1165. if (ret) {
  1166. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1167. ret);
  1168. goto out;
  1169. }
  1170. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1171. return 0;
  1172. out:
  1173. return ret;
  1174. }
  1175. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1176. {
  1177. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1178. if (sol_gpio->host_sol_gpio < 0)
  1179. return;
  1180. gpio_free(sol_gpio->host_sol_gpio);
  1181. }
  1182. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1183. {
  1184. int ret;
  1185. ret = cnss_init_dev_sol_gpio(plat_priv);
  1186. if (ret)
  1187. goto out;
  1188. ret = cnss_init_host_sol_gpio(plat_priv);
  1189. if (ret)
  1190. goto deinit_dev_sol;
  1191. return 0;
  1192. deinit_dev_sol:
  1193. cnss_deinit_dev_sol_gpio(plat_priv);
  1194. out:
  1195. return ret;
  1196. }
  1197. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1198. {
  1199. cnss_deinit_host_sol_gpio(plat_priv);
  1200. cnss_deinit_dev_sol_gpio(plat_priv);
  1201. }
  1202. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1203. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1204. {
  1205. struct cnss_plat_data *plat_priv;
  1206. int ret = 0;
  1207. if (!subsys_desc->dev) {
  1208. cnss_pr_err("dev from subsys_desc is NULL\n");
  1209. return -ENODEV;
  1210. }
  1211. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1212. if (!plat_priv) {
  1213. cnss_pr_err("plat_priv is NULL\n");
  1214. return -ENODEV;
  1215. }
  1216. if (!plat_priv->driver_state) {
  1217. cnss_pr_dbg("subsys powerup is ignored\n");
  1218. return 0;
  1219. }
  1220. ret = cnss_bus_dev_powerup(plat_priv);
  1221. if (ret)
  1222. __pm_relax(plat_priv->recovery_ws);
  1223. return ret;
  1224. }
  1225. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1226. bool force_stop)
  1227. {
  1228. struct cnss_plat_data *plat_priv;
  1229. if (!subsys_desc->dev) {
  1230. cnss_pr_err("dev from subsys_desc is NULL\n");
  1231. return -ENODEV;
  1232. }
  1233. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1234. if (!plat_priv) {
  1235. cnss_pr_err("plat_priv is NULL\n");
  1236. return -ENODEV;
  1237. }
  1238. if (!plat_priv->driver_state) {
  1239. cnss_pr_dbg("subsys shutdown is ignored\n");
  1240. return 0;
  1241. }
  1242. return cnss_bus_dev_shutdown(plat_priv);
  1243. }
  1244. void cnss_device_crashed(struct device *dev)
  1245. {
  1246. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1247. struct cnss_subsys_info *subsys_info;
  1248. if (!plat_priv)
  1249. return;
  1250. subsys_info = &plat_priv->subsys_info;
  1251. if (subsys_info->subsys_device) {
  1252. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1253. subsys_set_crash_status(subsys_info->subsys_device, true);
  1254. subsystem_restart_dev(subsys_info->subsys_device);
  1255. }
  1256. }
  1257. EXPORT_SYMBOL(cnss_device_crashed);
  1258. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1259. {
  1260. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1261. if (!plat_priv) {
  1262. cnss_pr_err("plat_priv is NULL\n");
  1263. return;
  1264. }
  1265. cnss_bus_dev_crash_shutdown(plat_priv);
  1266. }
  1267. static int cnss_subsys_ramdump(int enable,
  1268. const struct subsys_desc *subsys_desc)
  1269. {
  1270. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1271. if (!plat_priv) {
  1272. cnss_pr_err("plat_priv is NULL\n");
  1273. return -ENODEV;
  1274. }
  1275. if (!enable)
  1276. return 0;
  1277. return cnss_bus_dev_ramdump(plat_priv);
  1278. }
  1279. static void cnss_recovery_work_handler(struct work_struct *work)
  1280. {
  1281. }
  1282. #else
  1283. static void cnss_recovery_work_handler(struct work_struct *work)
  1284. {
  1285. int ret;
  1286. struct cnss_plat_data *plat_priv =
  1287. container_of(work, struct cnss_plat_data, recovery_work);
  1288. if (!plat_priv->recovery_enabled)
  1289. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1290. cnss_bus_dev_shutdown(plat_priv);
  1291. cnss_bus_dev_ramdump(plat_priv);
  1292. msleep(POWER_RESET_MIN_DELAY_MS);
  1293. ret = cnss_bus_dev_powerup(plat_priv);
  1294. if (ret)
  1295. __pm_relax(plat_priv->recovery_ws);
  1296. return;
  1297. }
  1298. void cnss_device_crashed(struct device *dev)
  1299. {
  1300. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1301. if (!plat_priv)
  1302. return;
  1303. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1304. schedule_work(&plat_priv->recovery_work);
  1305. }
  1306. EXPORT_SYMBOL(cnss_device_crashed);
  1307. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1308. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1309. {
  1310. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1311. struct cnss_ramdump_info *ramdump_info;
  1312. if (!plat_priv)
  1313. return NULL;
  1314. ramdump_info = &plat_priv->ramdump_info;
  1315. *size = ramdump_info->ramdump_size;
  1316. return ramdump_info->ramdump_va;
  1317. }
  1318. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1319. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1320. {
  1321. switch (reason) {
  1322. case CNSS_REASON_DEFAULT:
  1323. return "DEFAULT";
  1324. case CNSS_REASON_LINK_DOWN:
  1325. return "LINK_DOWN";
  1326. case CNSS_REASON_RDDM:
  1327. return "RDDM";
  1328. case CNSS_REASON_TIMEOUT:
  1329. return "TIMEOUT";
  1330. }
  1331. return "UNKNOWN";
  1332. };
  1333. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1334. enum cnss_recovery_reason reason)
  1335. {
  1336. plat_priv->recovery_count++;
  1337. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1338. goto self_recovery;
  1339. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1340. cnss_pr_dbg("Skip device recovery\n");
  1341. return 0;
  1342. }
  1343. /* FW recovery sequence has multiple steps and firmware load requires
  1344. * linux PM in awake state. Thus hold the cnss wake source until
  1345. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1346. * time taken in this process.
  1347. */
  1348. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1349. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1350. true);
  1351. switch (reason) {
  1352. case CNSS_REASON_LINK_DOWN:
  1353. if (!cnss_bus_check_link_status(plat_priv)) {
  1354. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1355. return 0;
  1356. }
  1357. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1358. &plat_priv->ctrl_params.quirks))
  1359. goto self_recovery;
  1360. if (!cnss_bus_recover_link_down(plat_priv)) {
  1361. /* clear recovery bit here to avoid skipping
  1362. * the recovery work for RDDM later
  1363. */
  1364. clear_bit(CNSS_DRIVER_RECOVERY,
  1365. &plat_priv->driver_state);
  1366. return 0;
  1367. }
  1368. break;
  1369. case CNSS_REASON_RDDM:
  1370. cnss_bus_collect_dump_info(plat_priv, false);
  1371. break;
  1372. case CNSS_REASON_DEFAULT:
  1373. case CNSS_REASON_TIMEOUT:
  1374. break;
  1375. default:
  1376. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1377. cnss_recovery_reason_to_str(reason), reason);
  1378. break;
  1379. }
  1380. cnss_bus_device_crashed(plat_priv);
  1381. return 0;
  1382. self_recovery:
  1383. cnss_pr_dbg("Going for self recovery\n");
  1384. cnss_bus_dev_shutdown(plat_priv);
  1385. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1386. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1387. &plat_priv->ctrl_params.quirks);
  1388. cnss_bus_dev_powerup(plat_priv);
  1389. return 0;
  1390. }
  1391. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1392. void *data)
  1393. {
  1394. struct cnss_recovery_data *recovery_data = data;
  1395. int ret = 0;
  1396. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1397. cnss_recovery_reason_to_str(recovery_data->reason),
  1398. recovery_data->reason);
  1399. if (!plat_priv->driver_state) {
  1400. cnss_pr_err("Improper driver state, ignore recovery\n");
  1401. ret = -EINVAL;
  1402. goto out;
  1403. }
  1404. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1405. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1406. ret = -EINVAL;
  1407. goto out;
  1408. }
  1409. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1410. cnss_pr_err("Recovery is already in progress\n");
  1411. CNSS_ASSERT(0);
  1412. ret = -EINVAL;
  1413. goto out;
  1414. }
  1415. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1416. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1417. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1418. ret = -EINVAL;
  1419. goto out;
  1420. }
  1421. switch (plat_priv->device_id) {
  1422. case QCA6174_DEVICE_ID:
  1423. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1424. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1425. &plat_priv->driver_state)) {
  1426. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1427. ret = -EINVAL;
  1428. goto out;
  1429. }
  1430. break;
  1431. default:
  1432. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1433. set_bit(CNSS_FW_BOOT_RECOVERY,
  1434. &plat_priv->driver_state);
  1435. }
  1436. break;
  1437. }
  1438. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1439. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1440. out:
  1441. kfree(data);
  1442. return ret;
  1443. }
  1444. int cnss_self_recovery(struct device *dev,
  1445. enum cnss_recovery_reason reason)
  1446. {
  1447. cnss_schedule_recovery(dev, reason);
  1448. return 0;
  1449. }
  1450. EXPORT_SYMBOL(cnss_self_recovery);
  1451. void cnss_schedule_recovery(struct device *dev,
  1452. enum cnss_recovery_reason reason)
  1453. {
  1454. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1455. struct cnss_recovery_data *data;
  1456. int gfp = GFP_KERNEL;
  1457. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1458. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1459. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1460. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1461. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1462. return;
  1463. }
  1464. if (in_interrupt() || irqs_disabled())
  1465. gfp = GFP_ATOMIC;
  1466. data = kzalloc(sizeof(*data), gfp);
  1467. if (!data)
  1468. return;
  1469. data->reason = reason;
  1470. cnss_driver_event_post(plat_priv,
  1471. CNSS_DRIVER_EVENT_RECOVERY,
  1472. 0, data);
  1473. }
  1474. EXPORT_SYMBOL(cnss_schedule_recovery);
  1475. int cnss_force_fw_assert(struct device *dev)
  1476. {
  1477. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1478. if (!plat_priv) {
  1479. cnss_pr_err("plat_priv is NULL\n");
  1480. return -ENODEV;
  1481. }
  1482. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1483. cnss_pr_info("Forced FW assert is not supported\n");
  1484. return -EOPNOTSUPP;
  1485. }
  1486. if (cnss_bus_is_device_down(plat_priv)) {
  1487. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1488. return 0;
  1489. }
  1490. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1491. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1492. return 0;
  1493. }
  1494. if (in_interrupt() || irqs_disabled())
  1495. cnss_driver_event_post(plat_priv,
  1496. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1497. 0, NULL);
  1498. else
  1499. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1500. return 0;
  1501. }
  1502. EXPORT_SYMBOL(cnss_force_fw_assert);
  1503. int cnss_force_collect_rddm(struct device *dev)
  1504. {
  1505. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1506. unsigned int timeout;
  1507. int ret = 0;
  1508. if (!plat_priv) {
  1509. cnss_pr_err("plat_priv is NULL\n");
  1510. return -ENODEV;
  1511. }
  1512. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1513. cnss_pr_info("Force collect rddm is not supported\n");
  1514. return -EOPNOTSUPP;
  1515. }
  1516. if (cnss_bus_is_device_down(plat_priv)) {
  1517. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1518. goto wait_rddm;
  1519. }
  1520. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1521. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1522. goto wait_rddm;
  1523. }
  1524. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1525. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1526. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1527. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1528. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1529. return 0;
  1530. }
  1531. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1532. if (ret)
  1533. return ret;
  1534. wait_rddm:
  1535. reinit_completion(&plat_priv->rddm_complete);
  1536. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1537. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1538. msecs_to_jiffies(timeout));
  1539. if (!ret) {
  1540. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1541. timeout);
  1542. ret = -ETIMEDOUT;
  1543. } else if (ret > 0) {
  1544. ret = 0;
  1545. }
  1546. return ret;
  1547. }
  1548. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1549. int cnss_qmi_send_get(struct device *dev)
  1550. {
  1551. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1552. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1553. return 0;
  1554. return cnss_bus_qmi_send_get(plat_priv);
  1555. }
  1556. EXPORT_SYMBOL(cnss_qmi_send_get);
  1557. int cnss_qmi_send_put(struct device *dev)
  1558. {
  1559. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1560. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1561. return 0;
  1562. return cnss_bus_qmi_send_put(plat_priv);
  1563. }
  1564. EXPORT_SYMBOL(cnss_qmi_send_put);
  1565. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1566. int cmd_len, void *cb_ctx,
  1567. int (*cb)(void *ctx, void *event, int event_len))
  1568. {
  1569. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1570. int ret;
  1571. if (!plat_priv)
  1572. return -ENODEV;
  1573. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1574. return -EINVAL;
  1575. plat_priv->get_info_cb = cb;
  1576. plat_priv->get_info_cb_ctx = cb_ctx;
  1577. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1578. if (ret) {
  1579. plat_priv->get_info_cb = NULL;
  1580. plat_priv->get_info_cb_ctx = NULL;
  1581. }
  1582. return ret;
  1583. }
  1584. EXPORT_SYMBOL(cnss_qmi_send);
  1585. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1586. {
  1587. int ret = 0;
  1588. u32 retry = 0, timeout;
  1589. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1590. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1591. goto out;
  1592. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1593. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1594. goto out;
  1595. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1596. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1597. goto out;
  1598. }
  1599. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1600. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1601. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1602. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1603. CNSS_ASSERT(0);
  1604. return -EINVAL;
  1605. }
  1606. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1607. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1608. break;
  1609. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1610. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1611. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1612. CNSS_ASSERT(0);
  1613. ret = -EINVAL;
  1614. goto mark_cal_fail;
  1615. }
  1616. }
  1617. switch (plat_priv->device_id) {
  1618. case QCA6290_DEVICE_ID:
  1619. case QCA6390_DEVICE_ID:
  1620. case QCA6490_DEVICE_ID:
  1621. case KIWI_DEVICE_ID:
  1622. case MANGO_DEVICE_ID:
  1623. break;
  1624. default:
  1625. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1626. plat_priv->device_id);
  1627. ret = -EINVAL;
  1628. goto mark_cal_fail;
  1629. }
  1630. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1631. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1632. timeout = cnss_get_timeout(plat_priv,
  1633. CNSS_TIMEOUT_CALIBRATION);
  1634. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1635. timeout / 1000);
  1636. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1637. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1638. msecs_to_jiffies(timeout));
  1639. }
  1640. reinit_completion(&plat_priv->cal_complete);
  1641. ret = cnss_bus_dev_powerup(plat_priv);
  1642. mark_cal_fail:
  1643. if (ret) {
  1644. complete(&plat_priv->cal_complete);
  1645. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1646. /* Set CBC done in driver state to mark attempt and note error
  1647. * since calibration cannot be retried at boot.
  1648. */
  1649. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1650. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1651. }
  1652. out:
  1653. return ret;
  1654. }
  1655. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1656. void *data)
  1657. {
  1658. struct cnss_cal_info *cal_info = data;
  1659. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1660. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1661. goto out;
  1662. switch (cal_info->cal_status) {
  1663. case CNSS_CAL_DONE:
  1664. cnss_pr_dbg("Calibration completed successfully\n");
  1665. plat_priv->cal_done = true;
  1666. break;
  1667. case CNSS_CAL_TIMEOUT:
  1668. case CNSS_CAL_FAILURE:
  1669. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1670. cal_info->cal_status);
  1671. break;
  1672. default:
  1673. cnss_pr_err("Unknown calibration status: %u\n",
  1674. cal_info->cal_status);
  1675. break;
  1676. }
  1677. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1678. cnss_bus_free_qdss_mem(plat_priv);
  1679. cnss_release_antenna_sharing(plat_priv);
  1680. cnss_bus_dev_shutdown(plat_priv);
  1681. msleep(POWER_RESET_MIN_DELAY_MS);
  1682. complete(&plat_priv->cal_complete);
  1683. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1684. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1685. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1686. cnss_cal_mem_upload_to_file(plat_priv);
  1687. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1688. goto out;
  1689. cnss_pr_dbg("Schedule WLAN driver load\n");
  1690. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1691. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1692. 0);
  1693. }
  1694. out:
  1695. kfree(data);
  1696. return 0;
  1697. }
  1698. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1699. {
  1700. int ret;
  1701. ret = cnss_bus_dev_powerup(plat_priv);
  1702. if (ret)
  1703. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1704. return ret;
  1705. }
  1706. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1707. {
  1708. cnss_bus_dev_shutdown(plat_priv);
  1709. return 0;
  1710. }
  1711. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1712. {
  1713. int ret = 0;
  1714. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1715. if (ret < 0)
  1716. return ret;
  1717. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1718. }
  1719. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1720. u32 mem_seg_len, u64 pa, u32 size)
  1721. {
  1722. int i = 0;
  1723. u64 offset = 0;
  1724. void *va = NULL;
  1725. u64 local_pa;
  1726. u32 local_size;
  1727. for (i = 0; i < mem_seg_len; i++) {
  1728. local_pa = (u64)fw_mem[i].pa;
  1729. local_size = (u32)fw_mem[i].size;
  1730. if (pa == local_pa && size <= local_size) {
  1731. va = fw_mem[i].va;
  1732. break;
  1733. }
  1734. if (pa > local_pa &&
  1735. pa < local_pa + local_size &&
  1736. pa + size <= local_pa + local_size) {
  1737. offset = pa - local_pa;
  1738. va = fw_mem[i].va + offset;
  1739. break;
  1740. }
  1741. }
  1742. return va;
  1743. }
  1744. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1745. void *data)
  1746. {
  1747. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1748. struct cnss_fw_mem *fw_mem_seg;
  1749. int ret = 0L;
  1750. void *va = NULL;
  1751. u32 i, fw_mem_seg_len;
  1752. switch (event_data->mem_type) {
  1753. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1754. if (!plat_priv->fw_mem_seg_len)
  1755. goto invalid_mem_save;
  1756. fw_mem_seg = plat_priv->fw_mem;
  1757. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1758. break;
  1759. case QMI_WLFW_MEM_QDSS_V01:
  1760. if (!plat_priv->qdss_mem_seg_len)
  1761. goto invalid_mem_save;
  1762. fw_mem_seg = plat_priv->qdss_mem;
  1763. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1764. break;
  1765. default:
  1766. goto invalid_mem_save;
  1767. }
  1768. for (i = 0; i < event_data->mem_seg_len; i++) {
  1769. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1770. event_data->mem_seg[i].addr,
  1771. event_data->mem_seg[i].size);
  1772. if (!va) {
  1773. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1774. &event_data->mem_seg[i].addr,
  1775. event_data->mem_type);
  1776. ret = -EINVAL;
  1777. break;
  1778. }
  1779. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1780. event_data->file_name,
  1781. event_data->mem_seg[i].size);
  1782. if (ret < 0) {
  1783. cnss_pr_err("Fail to save fw mem data: %d\n",
  1784. ret);
  1785. break;
  1786. }
  1787. }
  1788. kfree(data);
  1789. return ret;
  1790. invalid_mem_save:
  1791. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1792. event_data->mem_type);
  1793. kfree(data);
  1794. return -EINVAL;
  1795. }
  1796. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1797. {
  1798. cnss_bus_free_qdss_mem(plat_priv);
  1799. return 0;
  1800. }
  1801. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1802. void *data)
  1803. {
  1804. int ret = 0;
  1805. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1806. if (!plat_priv)
  1807. return -ENODEV;
  1808. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1809. event_data->total_size);
  1810. kfree(data);
  1811. return ret;
  1812. }
  1813. static void cnss_driver_event_work(struct work_struct *work)
  1814. {
  1815. struct cnss_plat_data *plat_priv =
  1816. container_of(work, struct cnss_plat_data, event_work);
  1817. struct cnss_driver_event *event;
  1818. unsigned long flags;
  1819. int ret = 0;
  1820. if (!plat_priv) {
  1821. cnss_pr_err("plat_priv is NULL!\n");
  1822. return;
  1823. }
  1824. cnss_pm_stay_awake(plat_priv);
  1825. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1826. while (!list_empty(&plat_priv->event_list)) {
  1827. event = list_first_entry(&plat_priv->event_list,
  1828. struct cnss_driver_event, list);
  1829. list_del(&event->list);
  1830. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1831. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1832. cnss_driver_event_to_str(event->type),
  1833. event->sync ? "-sync" : "", event->type,
  1834. plat_priv->driver_state);
  1835. switch (event->type) {
  1836. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1837. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1838. break;
  1839. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1840. ret = cnss_wlfw_server_exit(plat_priv);
  1841. break;
  1842. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1843. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1844. if (ret)
  1845. break;
  1846. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1847. break;
  1848. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1849. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1850. break;
  1851. case CNSS_DRIVER_EVENT_FW_READY:
  1852. ret = cnss_fw_ready_hdlr(plat_priv);
  1853. break;
  1854. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1855. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1856. break;
  1857. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1858. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1859. event->data);
  1860. break;
  1861. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1862. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1863. event->data);
  1864. break;
  1865. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1866. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1867. break;
  1868. case CNSS_DRIVER_EVENT_RECOVERY:
  1869. ret = cnss_driver_recovery_hdlr(plat_priv,
  1870. event->data);
  1871. break;
  1872. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1873. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1874. break;
  1875. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1876. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1877. &plat_priv->driver_state);
  1878. fallthrough;
  1879. case CNSS_DRIVER_EVENT_POWER_UP:
  1880. ret = cnss_power_up_hdlr(plat_priv);
  1881. break;
  1882. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1883. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1884. &plat_priv->driver_state);
  1885. fallthrough;
  1886. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1887. ret = cnss_power_down_hdlr(plat_priv);
  1888. break;
  1889. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1890. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1891. event->data);
  1892. break;
  1893. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1894. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1895. event->data);
  1896. break;
  1897. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1898. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1899. break;
  1900. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1901. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1902. event->data);
  1903. break;
  1904. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1905. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1906. break;
  1907. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1908. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1909. event->data);
  1910. break;
  1911. default:
  1912. cnss_pr_err("Invalid driver event type: %d",
  1913. event->type);
  1914. kfree(event);
  1915. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1916. continue;
  1917. }
  1918. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1919. if (event->sync) {
  1920. event->ret = ret;
  1921. complete(&event->complete);
  1922. continue;
  1923. }
  1924. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1925. kfree(event);
  1926. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1927. }
  1928. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1929. cnss_pm_relax(plat_priv);
  1930. }
  1931. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1932. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1933. {
  1934. int ret = 0;
  1935. struct cnss_subsys_info *subsys_info;
  1936. subsys_info = &plat_priv->subsys_info;
  1937. subsys_info->subsys_desc.name = "wlan";
  1938. subsys_info->subsys_desc.owner = THIS_MODULE;
  1939. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1940. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1941. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1942. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1943. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1944. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1945. if (IS_ERR(subsys_info->subsys_device)) {
  1946. ret = PTR_ERR(subsys_info->subsys_device);
  1947. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1948. goto out;
  1949. }
  1950. subsys_info->subsys_handle =
  1951. subsystem_get(subsys_info->subsys_desc.name);
  1952. if (!subsys_info->subsys_handle) {
  1953. cnss_pr_err("Failed to get subsys_handle!\n");
  1954. ret = -EINVAL;
  1955. goto unregister_subsys;
  1956. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1957. ret = PTR_ERR(subsys_info->subsys_handle);
  1958. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1959. goto unregister_subsys;
  1960. }
  1961. return 0;
  1962. unregister_subsys:
  1963. subsys_unregister(subsys_info->subsys_device);
  1964. out:
  1965. return ret;
  1966. }
  1967. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1968. {
  1969. struct cnss_subsys_info *subsys_info;
  1970. subsys_info = &plat_priv->subsys_info;
  1971. subsystem_put(subsys_info->subsys_handle);
  1972. subsys_unregister(subsys_info->subsys_device);
  1973. }
  1974. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1975. {
  1976. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1977. return create_ramdump_device(subsys_info->subsys_desc.name,
  1978. subsys_info->subsys_desc.dev);
  1979. }
  1980. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1981. void *ramdump_dev)
  1982. {
  1983. destroy_ramdump_device(ramdump_dev);
  1984. }
  1985. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1986. {
  1987. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1988. struct ramdump_segment segment;
  1989. memset(&segment, 0, sizeof(segment));
  1990. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  1991. segment.size = ramdump_info->ramdump_size;
  1992. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  1993. }
  1994. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1995. {
  1996. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1997. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1998. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1999. struct ramdump_segment *ramdump_segs, *s;
  2000. struct cnss_dump_meta_info meta_info = {0};
  2001. int i, ret = 0;
  2002. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2003. sizeof(*ramdump_segs),
  2004. GFP_KERNEL);
  2005. if (!ramdump_segs)
  2006. return -ENOMEM;
  2007. s = ramdump_segs + 1;
  2008. for (i = 0; i < dump_data->nentries; i++) {
  2009. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2010. cnss_pr_err("Unsupported dump type: %d",
  2011. dump_seg->type);
  2012. continue;
  2013. }
  2014. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2015. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2016. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2017. }
  2018. meta_info.entry[dump_seg->type].entry_num++;
  2019. s->address = dump_seg->address;
  2020. s->v_address = (void __iomem *)dump_seg->v_address;
  2021. s->size = dump_seg->size;
  2022. s++;
  2023. dump_seg++;
  2024. }
  2025. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2026. meta_info.version = CNSS_RAMDUMP_VERSION;
  2027. meta_info.chipset = plat_priv->device_id;
  2028. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2029. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2030. ramdump_segs->size = sizeof(meta_info);
  2031. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2032. dump_data->nentries + 1);
  2033. kfree(ramdump_segs);
  2034. return ret;
  2035. }
  2036. #else
  2037. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2038. void *data)
  2039. {
  2040. struct cnss_plat_data *plat_priv =
  2041. container_of(nb, struct cnss_plat_data, panic_nb);
  2042. cnss_bus_dev_crash_shutdown(plat_priv);
  2043. return NOTIFY_DONE;
  2044. }
  2045. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2046. {
  2047. int ret;
  2048. if (!plat_priv)
  2049. return -ENODEV;
  2050. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2051. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2052. &plat_priv->panic_nb);
  2053. if (ret) {
  2054. cnss_pr_err("Failed to register panic handler\n");
  2055. return -EINVAL;
  2056. }
  2057. return 0;
  2058. }
  2059. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2060. {
  2061. int ret;
  2062. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2063. &plat_priv->panic_nb);
  2064. if (ret)
  2065. cnss_pr_err("Failed to unregister panic handler\n");
  2066. }
  2067. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2068. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2069. {
  2070. return &plat_priv->plat_dev->dev;
  2071. }
  2072. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2073. void *ramdump_dev)
  2074. {
  2075. }
  2076. #endif
  2077. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2078. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2079. {
  2080. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2081. struct qcom_dump_segment segment;
  2082. struct list_head head;
  2083. INIT_LIST_HEAD(&head);
  2084. memset(&segment, 0, sizeof(segment));
  2085. segment.va = ramdump_info->ramdump_va;
  2086. segment.size = ramdump_info->ramdump_size;
  2087. list_add(&segment.node, &head);
  2088. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2089. }
  2090. #else
  2091. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2092. {
  2093. return 0;
  2094. }
  2095. /* Using completion event inside dynamically allocated ramdump_desc
  2096. * may result a race between freeing the event after setting it to
  2097. * complete inside dev coredump free callback and the thread that is
  2098. * waiting for completion.
  2099. */
  2100. DECLARE_COMPLETION(dump_done);
  2101. #define TIMEOUT_SAVE_DUMP_MS 30000
  2102. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2103. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2104. { \
  2105. if (class == ELFCLASS32) \
  2106. return sizeof(struct elf32_##__xhdr); \
  2107. else \
  2108. return sizeof(struct elf64_##__xhdr); \
  2109. }
  2110. SIZEOF_ELF_STRUCT(phdr)
  2111. SIZEOF_ELF_STRUCT(hdr)
  2112. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2113. do { \
  2114. if (class == ELFCLASS32) \
  2115. ((struct elf32_##__xhdr *)arg)->member = value; \
  2116. else \
  2117. ((struct elf64_##__xhdr *)arg)->member = value; \
  2118. } while (0)
  2119. #define set_ehdr_property(arg, class, member, value) \
  2120. set_xhdr_property(hdr, arg, class, member, value)
  2121. #define set_phdr_property(arg, class, member, value) \
  2122. set_xhdr_property(phdr, arg, class, member, value)
  2123. /* These replace qcom_ramdump driver APIs called from common API
  2124. * cnss_do_elf_dump() by the ones defined here.
  2125. */
  2126. #define qcom_dump_segment cnss_qcom_dump_segment
  2127. #define qcom_elf_dump cnss_qcom_elf_dump
  2128. #define dump_enabled cnss_dump_enabled
  2129. struct cnss_qcom_dump_segment {
  2130. struct list_head node;
  2131. dma_addr_t da;
  2132. void *va;
  2133. size_t size;
  2134. };
  2135. struct cnss_qcom_ramdump_desc {
  2136. void *data;
  2137. struct completion dump_done;
  2138. };
  2139. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2140. void *data, size_t datalen)
  2141. {
  2142. struct cnss_qcom_ramdump_desc *desc = data;
  2143. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2144. datalen);
  2145. }
  2146. static void cnss_qcom_devcd_freev(void *data)
  2147. {
  2148. struct cnss_qcom_ramdump_desc *desc = data;
  2149. cnss_pr_dbg("Free dump data for dev coredump\n");
  2150. complete(&dump_done);
  2151. vfree(desc->data);
  2152. kfree(desc);
  2153. }
  2154. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2155. gfp_t gfp)
  2156. {
  2157. struct cnss_qcom_ramdump_desc *desc;
  2158. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2159. int ret;
  2160. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2161. if (!desc)
  2162. return -ENOMEM;
  2163. desc->data = data;
  2164. reinit_completion(&dump_done);
  2165. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2166. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2167. ret = wait_for_completion_timeout(&dump_done,
  2168. msecs_to_jiffies(timeout));
  2169. if (!ret)
  2170. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2171. timeout);
  2172. return ret ? 0 : -ETIMEDOUT;
  2173. }
  2174. /* Since the elf32 and elf64 identification is identical apart from
  2175. * the class, use elf32 by default.
  2176. */
  2177. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2178. {
  2179. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2180. ehdr->e_ident[EI_CLASS] = class;
  2181. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2182. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2183. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2184. }
  2185. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2186. unsigned char class)
  2187. {
  2188. struct cnss_qcom_dump_segment *segment;
  2189. void *phdr, *ehdr;
  2190. size_t data_size, offset;
  2191. int phnum = 0;
  2192. void *data;
  2193. void __iomem *ptr;
  2194. if (!segs || list_empty(segs))
  2195. return -EINVAL;
  2196. data_size = sizeof_elf_hdr(class);
  2197. list_for_each_entry(segment, segs, node) {
  2198. data_size += sizeof_elf_phdr(class) + segment->size;
  2199. phnum++;
  2200. }
  2201. data = vmalloc(data_size);
  2202. if (!data)
  2203. return -ENOMEM;
  2204. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2205. ehdr = data;
  2206. memset(ehdr, 0, sizeof_elf_hdr(class));
  2207. init_elf_identification(ehdr, class);
  2208. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2209. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2210. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2211. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2212. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2213. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2214. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2215. phdr = data + sizeof_elf_hdr(class);
  2216. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2217. list_for_each_entry(segment, segs, node) {
  2218. memset(phdr, 0, sizeof_elf_phdr(class));
  2219. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2220. set_phdr_property(phdr, class, p_offset, offset);
  2221. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2222. set_phdr_property(phdr, class, p_paddr, segment->da);
  2223. set_phdr_property(phdr, class, p_filesz, segment->size);
  2224. set_phdr_property(phdr, class, p_memsz, segment->size);
  2225. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2226. set_phdr_property(phdr, class, p_align, 0);
  2227. if (segment->va) {
  2228. memcpy(data + offset, segment->va, segment->size);
  2229. } else {
  2230. ptr = devm_ioremap(dev, segment->da, segment->size);
  2231. if (!ptr) {
  2232. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2233. &segment->da, segment->size);
  2234. memset(data + offset, 0xff, segment->size);
  2235. } else {
  2236. memcpy_fromio(data + offset, ptr,
  2237. segment->size);
  2238. }
  2239. }
  2240. offset += segment->size;
  2241. phdr += sizeof_elf_phdr(class);
  2242. }
  2243. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2244. }
  2245. /* Saving dump to file system is always needed in this case. */
  2246. static bool cnss_dump_enabled(void)
  2247. {
  2248. return true;
  2249. }
  2250. #endif /* CONFIG_QCOM_RAMDUMP */
  2251. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2252. {
  2253. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2254. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2255. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2256. struct qcom_dump_segment *seg;
  2257. struct cnss_dump_meta_info meta_info = {0};
  2258. struct list_head head;
  2259. int i, ret = 0;
  2260. if (!dump_enabled()) {
  2261. cnss_pr_info("Dump collection is not enabled\n");
  2262. return ret;
  2263. }
  2264. INIT_LIST_HEAD(&head);
  2265. for (i = 0; i < dump_data->nentries; i++) {
  2266. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2267. cnss_pr_err("Unsupported dump type: %d",
  2268. dump_seg->type);
  2269. continue;
  2270. }
  2271. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2272. if (!seg)
  2273. continue;
  2274. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2275. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2276. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2277. }
  2278. meta_info.entry[dump_seg->type].entry_num++;
  2279. seg->da = dump_seg->address;
  2280. seg->va = dump_seg->v_address;
  2281. seg->size = dump_seg->size;
  2282. list_add_tail(&seg->node, &head);
  2283. dump_seg++;
  2284. }
  2285. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2286. if (!seg)
  2287. goto do_elf_dump;
  2288. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2289. meta_info.version = CNSS_RAMDUMP_VERSION;
  2290. meta_info.chipset = plat_priv->device_id;
  2291. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2292. seg->va = &meta_info;
  2293. seg->size = sizeof(meta_info);
  2294. list_add(&seg->node, &head);
  2295. do_elf_dump:
  2296. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2297. while (!list_empty(&head)) {
  2298. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2299. list_del(&seg->node);
  2300. kfree(seg);
  2301. }
  2302. return ret;
  2303. }
  2304. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2305. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2306. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2307. {
  2308. struct cnss_ramdump_info *ramdump_info;
  2309. struct msm_dump_entry dump_entry;
  2310. ramdump_info = &plat_priv->ramdump_info;
  2311. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2312. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2313. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2314. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2315. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2316. sizeof(ramdump_info->dump_data.name));
  2317. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2318. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2319. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2320. &dump_entry);
  2321. }
  2322. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2323. {
  2324. int ret = 0;
  2325. struct device *dev;
  2326. struct cnss_ramdump_info *ramdump_info;
  2327. u32 ramdump_size = 0;
  2328. dev = &plat_priv->plat_dev->dev;
  2329. ramdump_info = &plat_priv->ramdump_info;
  2330. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2331. /* dt type: legacy or converged */
  2332. ret = of_property_read_u32(dev->of_node,
  2333. "qcom,wlan-ramdump-dynamic",
  2334. &ramdump_size);
  2335. } else {
  2336. ret = of_property_read_u32(plat_priv->dev_node,
  2337. "qcom,wlan-ramdump-dynamic",
  2338. &ramdump_size);
  2339. }
  2340. if (ret == 0) {
  2341. ramdump_info->ramdump_va =
  2342. dma_alloc_coherent(dev, ramdump_size,
  2343. &ramdump_info->ramdump_pa,
  2344. GFP_KERNEL);
  2345. if (ramdump_info->ramdump_va)
  2346. ramdump_info->ramdump_size = ramdump_size;
  2347. }
  2348. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2349. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2350. if (ramdump_info->ramdump_size == 0) {
  2351. cnss_pr_info("Ramdump will not be collected");
  2352. goto out;
  2353. }
  2354. ret = cnss_init_dump_entry(plat_priv);
  2355. if (ret) {
  2356. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2357. goto free_ramdump;
  2358. }
  2359. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2360. if (!ramdump_info->ramdump_dev) {
  2361. cnss_pr_err("Failed to create ramdump device!");
  2362. ret = -ENOMEM;
  2363. goto free_ramdump;
  2364. }
  2365. return 0;
  2366. free_ramdump:
  2367. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2368. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2369. out:
  2370. return ret;
  2371. }
  2372. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2373. {
  2374. struct device *dev;
  2375. struct cnss_ramdump_info *ramdump_info;
  2376. dev = &plat_priv->plat_dev->dev;
  2377. ramdump_info = &plat_priv->ramdump_info;
  2378. if (ramdump_info->ramdump_dev)
  2379. cnss_destroy_ramdump_device(plat_priv,
  2380. ramdump_info->ramdump_dev);
  2381. if (ramdump_info->ramdump_va)
  2382. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2383. ramdump_info->ramdump_va,
  2384. ramdump_info->ramdump_pa);
  2385. }
  2386. /**
  2387. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2388. * @ret: Error returned by msm_dump_data_register_nominidump
  2389. *
  2390. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2391. * ignore failure.
  2392. *
  2393. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2394. */
  2395. static int cnss_ignore_dump_data_reg_fail(int ret)
  2396. {
  2397. return ret;
  2398. }
  2399. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2400. {
  2401. int ret = 0;
  2402. struct cnss_ramdump_info_v2 *info_v2;
  2403. struct cnss_dump_data *dump_data;
  2404. struct msm_dump_entry dump_entry;
  2405. struct device *dev = &plat_priv->plat_dev->dev;
  2406. u32 ramdump_size = 0;
  2407. info_v2 = &plat_priv->ramdump_info_v2;
  2408. dump_data = &info_v2->dump_data;
  2409. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2410. /* dt type: legacy or converged */
  2411. ret = of_property_read_u32(dev->of_node,
  2412. "qcom,wlan-ramdump-dynamic",
  2413. &ramdump_size);
  2414. } else {
  2415. ret = of_property_read_u32(plat_priv->dev_node,
  2416. "qcom,wlan-ramdump-dynamic",
  2417. &ramdump_size);
  2418. }
  2419. if (ret == 0)
  2420. info_v2->ramdump_size = ramdump_size;
  2421. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2422. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2423. if (!info_v2->dump_data_vaddr)
  2424. return -ENOMEM;
  2425. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2426. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2427. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2428. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2429. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2430. sizeof(dump_data->name));
  2431. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2432. dump_entry.addr = virt_to_phys(dump_data);
  2433. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2434. &dump_entry);
  2435. if (ret) {
  2436. ret = cnss_ignore_dump_data_reg_fail(ret);
  2437. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2438. ret ? "Error" : "Ignoring", ret);
  2439. goto free_ramdump;
  2440. }
  2441. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2442. if (!info_v2->ramdump_dev) {
  2443. cnss_pr_err("Failed to create ramdump device!\n");
  2444. ret = -ENOMEM;
  2445. goto free_ramdump;
  2446. }
  2447. return 0;
  2448. free_ramdump:
  2449. kfree(info_v2->dump_data_vaddr);
  2450. info_v2->dump_data_vaddr = NULL;
  2451. return ret;
  2452. }
  2453. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2454. {
  2455. struct cnss_ramdump_info_v2 *info_v2;
  2456. info_v2 = &plat_priv->ramdump_info_v2;
  2457. if (info_v2->ramdump_dev)
  2458. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2459. kfree(info_v2->dump_data_vaddr);
  2460. info_v2->dump_data_vaddr = NULL;
  2461. info_v2->dump_data_valid = false;
  2462. }
  2463. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2464. {
  2465. int ret = 0;
  2466. switch (plat_priv->device_id) {
  2467. case QCA6174_DEVICE_ID:
  2468. ret = cnss_register_ramdump_v1(plat_priv);
  2469. break;
  2470. case QCA6290_DEVICE_ID:
  2471. case QCA6390_DEVICE_ID:
  2472. case QCA6490_DEVICE_ID:
  2473. case KIWI_DEVICE_ID:
  2474. case MANGO_DEVICE_ID:
  2475. ret = cnss_register_ramdump_v2(plat_priv);
  2476. break;
  2477. default:
  2478. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2479. ret = -ENODEV;
  2480. break;
  2481. }
  2482. return ret;
  2483. }
  2484. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2485. {
  2486. switch (plat_priv->device_id) {
  2487. case QCA6174_DEVICE_ID:
  2488. cnss_unregister_ramdump_v1(plat_priv);
  2489. break;
  2490. case QCA6290_DEVICE_ID:
  2491. case QCA6390_DEVICE_ID:
  2492. case QCA6490_DEVICE_ID:
  2493. case KIWI_DEVICE_ID:
  2494. case MANGO_DEVICE_ID:
  2495. cnss_unregister_ramdump_v2(plat_priv);
  2496. break;
  2497. default:
  2498. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2499. break;
  2500. }
  2501. }
  2502. #else
  2503. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2504. {
  2505. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2506. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2507. struct device *dev = &plat_priv->plat_dev->dev;
  2508. u32 ramdump_size = 0;
  2509. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2510. &ramdump_size) == 0)
  2511. info_v2->ramdump_size = ramdump_size;
  2512. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2513. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2514. if (!info_v2->dump_data_vaddr)
  2515. return -ENOMEM;
  2516. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2517. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2518. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2519. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2520. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2521. sizeof(dump_data->name));
  2522. info_v2->ramdump_dev = dev;
  2523. return 0;
  2524. }
  2525. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2526. {
  2527. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2528. info_v2->ramdump_dev = NULL;
  2529. kfree(info_v2->dump_data_vaddr);
  2530. info_v2->dump_data_vaddr = NULL;
  2531. info_v2->dump_data_valid = false;
  2532. }
  2533. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2534. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2535. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2536. phys_addr_t *pa, unsigned long attrs)
  2537. {
  2538. struct sg_table sgt;
  2539. int ret;
  2540. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2541. if (ret) {
  2542. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2543. va, &dma, size, attrs);
  2544. return -EINVAL;
  2545. }
  2546. *pa = page_to_phys(sg_page(sgt.sgl));
  2547. sg_free_table(&sgt);
  2548. return 0;
  2549. }
  2550. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2551. enum cnss_fw_dump_type type, int seg_no,
  2552. void *va, phys_addr_t pa, size_t size)
  2553. {
  2554. struct md_region md_entry;
  2555. int ret;
  2556. switch (type) {
  2557. case CNSS_FW_IMAGE:
  2558. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2559. seg_no);
  2560. break;
  2561. case CNSS_FW_RDDM:
  2562. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2563. seg_no);
  2564. break;
  2565. case CNSS_FW_REMOTE_HEAP:
  2566. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2567. seg_no);
  2568. break;
  2569. default:
  2570. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2571. return -EINVAL;
  2572. }
  2573. md_entry.phys_addr = pa;
  2574. md_entry.virt_addr = (uintptr_t)va;
  2575. md_entry.size = size;
  2576. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2577. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2578. md_entry.name, va, &pa, size);
  2579. ret = msm_minidump_add_region(&md_entry);
  2580. if (ret < 0)
  2581. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2582. return ret;
  2583. }
  2584. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2585. enum cnss_fw_dump_type type, int seg_no,
  2586. void *va, phys_addr_t pa, size_t size)
  2587. {
  2588. struct md_region md_entry;
  2589. int ret;
  2590. switch (type) {
  2591. case CNSS_FW_IMAGE:
  2592. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2593. seg_no);
  2594. break;
  2595. case CNSS_FW_RDDM:
  2596. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2597. seg_no);
  2598. break;
  2599. case CNSS_FW_REMOTE_HEAP:
  2600. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2601. seg_no);
  2602. break;
  2603. default:
  2604. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2605. return -EINVAL;
  2606. }
  2607. md_entry.phys_addr = pa;
  2608. md_entry.virt_addr = (uintptr_t)va;
  2609. md_entry.size = size;
  2610. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2611. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2612. md_entry.name, va, &pa, size);
  2613. ret = msm_minidump_remove_region(&md_entry);
  2614. if (ret)
  2615. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2616. ret);
  2617. return ret;
  2618. }
  2619. #else
  2620. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2621. phys_addr_t *pa, unsigned long attrs)
  2622. {
  2623. return 0;
  2624. }
  2625. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2626. enum cnss_fw_dump_type type, int seg_no,
  2627. void *va, phys_addr_t pa, size_t size)
  2628. {
  2629. return 0;
  2630. }
  2631. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2632. enum cnss_fw_dump_type type, int seg_no,
  2633. void *va, phys_addr_t pa, size_t size)
  2634. {
  2635. return 0;
  2636. }
  2637. #endif /* CONFIG_QCOM_MINIDUMP */
  2638. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2639. const struct firmware **fw_entry,
  2640. const char *filename)
  2641. {
  2642. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2643. return request_firmware_direct(fw_entry, filename,
  2644. &plat_priv->plat_dev->dev);
  2645. else
  2646. return firmware_request_nowarn(fw_entry, filename,
  2647. &plat_priv->plat_dev->dev);
  2648. }
  2649. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2650. /**
  2651. * cnss_register_bus_scale() - Setup interconnect voting data
  2652. * @plat_priv: Platform data structure
  2653. *
  2654. * For different interconnect path configured in device tree setup voting data
  2655. * for list of bandwidth requirements.
  2656. *
  2657. * Result: 0 for success. -EINVAL if not configured
  2658. */
  2659. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2660. {
  2661. int ret = -EINVAL;
  2662. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2663. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2664. struct device *dev = &plat_priv->plat_dev->dev;
  2665. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2666. ret = of_property_read_u32(dev->of_node,
  2667. "qcom,icc-path-count",
  2668. &plat_priv->icc.path_count);
  2669. if (ret) {
  2670. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  2671. return 0;
  2672. }
  2673. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2674. "qcom,bus-bw-cfg-count",
  2675. &plat_priv->icc.bus_bw_cfg_count);
  2676. if (ret) {
  2677. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2678. goto cleanup;
  2679. }
  2680. cfg_arr_size = plat_priv->icc.path_count *
  2681. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2682. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2683. if (!cfg_arr) {
  2684. cnss_pr_err("Failed to alloc cfg table mem\n");
  2685. ret = -ENOMEM;
  2686. goto cleanup;
  2687. }
  2688. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2689. "qcom,bus-bw-cfg", cfg_arr,
  2690. cfg_arr_size);
  2691. if (ret) {
  2692. cnss_pr_err("Invalid Bus BW Config Table\n");
  2693. goto cleanup;
  2694. }
  2695. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2696. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2697. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2698. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2699. GFP_KERNEL);
  2700. if (!bus_bw_info) {
  2701. ret = -ENOMEM;
  2702. goto out;
  2703. }
  2704. ret = of_property_read_string_index(dev->of_node,
  2705. "interconnect-names", idx,
  2706. &bus_bw_info->icc_name);
  2707. if (ret)
  2708. goto out;
  2709. bus_bw_info->icc_path =
  2710. of_icc_get(&plat_priv->plat_dev->dev,
  2711. bus_bw_info->icc_name);
  2712. if (IS_ERR(bus_bw_info->icc_path)) {
  2713. ret = PTR_ERR(bus_bw_info->icc_path);
  2714. if (ret != -EPROBE_DEFER) {
  2715. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2716. bus_bw_info->icc_name, ret);
  2717. goto out;
  2718. }
  2719. }
  2720. bus_bw_info->cfg_table =
  2721. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2722. sizeof(*bus_bw_info->cfg_table),
  2723. GFP_KERNEL);
  2724. if (!bus_bw_info->cfg_table) {
  2725. ret = -ENOMEM;
  2726. goto out;
  2727. }
  2728. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2729. bus_bw_info->icc_name);
  2730. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2731. CNSS_ICC_VOTE_MAX);
  2732. i < plat_priv->icc.bus_bw_cfg_count;
  2733. i++, j += 2) {
  2734. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2735. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2736. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2737. i, bus_bw_info->cfg_table[i].avg_bw,
  2738. bus_bw_info->cfg_table[i].peak_bw);
  2739. }
  2740. list_add_tail(&bus_bw_info->list,
  2741. &plat_priv->icc.list_head);
  2742. }
  2743. kfree(cfg_arr);
  2744. return 0;
  2745. out:
  2746. list_for_each_entry_safe(bus_bw_info, tmp,
  2747. &plat_priv->icc.list_head, list) {
  2748. list_del(&bus_bw_info->list);
  2749. }
  2750. cleanup:
  2751. kfree(cfg_arr);
  2752. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2753. return ret;
  2754. }
  2755. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2756. {
  2757. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2758. list_for_each_entry_safe(bus_bw_info, tmp,
  2759. &plat_priv->icc.list_head, list) {
  2760. list_del(&bus_bw_info->list);
  2761. if (bus_bw_info->icc_path)
  2762. icc_put(bus_bw_info->icc_path);
  2763. }
  2764. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2765. }
  2766. #else
  2767. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2768. {
  2769. return 0;
  2770. }
  2771. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2772. #endif /* CONFIG_INTERCONNECT */
  2773. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2774. {
  2775. struct cnss_plat_data *plat_priv = cb_ctx;
  2776. if (!plat_priv) {
  2777. cnss_pr_err("%s: Invalid context\n", __func__);
  2778. return;
  2779. }
  2780. if (status) {
  2781. cnss_pr_info("CNSS Daemon connected\n");
  2782. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2783. complete(&plat_priv->daemon_connected);
  2784. } else {
  2785. cnss_pr_info("CNSS Daemon disconnected\n");
  2786. reinit_completion(&plat_priv->daemon_connected);
  2787. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2788. }
  2789. }
  2790. static ssize_t enable_hds_store(struct device *dev,
  2791. struct device_attribute *attr,
  2792. const char *buf, size_t count)
  2793. {
  2794. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2795. unsigned int enable_hds = 0;
  2796. if (!plat_priv)
  2797. return -ENODEV;
  2798. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2799. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2800. return -EINVAL;
  2801. }
  2802. if (enable_hds)
  2803. plat_priv->hds_enabled = true;
  2804. else
  2805. plat_priv->hds_enabled = false;
  2806. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2807. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2808. return count;
  2809. }
  2810. static ssize_t recovery_show(struct device *dev,
  2811. struct device_attribute *attr,
  2812. char *buf)
  2813. {
  2814. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2815. u32 buf_size = PAGE_SIZE;
  2816. u32 curr_len = 0;
  2817. u32 buf_written = 0;
  2818. if (!plat_priv)
  2819. return -ENODEV;
  2820. buf_written = scnprintf(buf, buf_size,
  2821. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  2822. "BIT0 -- wlan fw recovery\n"
  2823. "BIT1 -- wlan pcss recovery\n"
  2824. "---------------------------------\n");
  2825. curr_len += buf_written;
  2826. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2827. "WLAN recovery %s[%d]\n",
  2828. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  2829. plat_priv->recovery_enabled);
  2830. curr_len += buf_written;
  2831. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  2832. "WLAN PCSS recovery %s[%d]\n",
  2833. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  2834. plat_priv->recovery_pcss_enabled);
  2835. curr_len += buf_written;
  2836. /*
  2837. * Now size of curr_len is not over page size for sure,
  2838. * later if new item or none-fixed size item added, need
  2839. * add check to make sure curr_len is not over page size.
  2840. */
  2841. return curr_len;
  2842. }
  2843. static ssize_t time_sync_period_show(struct device *dev,
  2844. struct device_attribute *attr,
  2845. char *buf)
  2846. {
  2847. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2848. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  2849. plat_priv->ctrl_params.time_sync_period);
  2850. }
  2851. static ssize_t time_sync_period_store(struct device *dev,
  2852. struct device_attribute *attr,
  2853. const char *buf, size_t count)
  2854. {
  2855. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2856. unsigned int time_sync_period = 0;
  2857. if (!plat_priv)
  2858. return -ENODEV;
  2859. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  2860. cnss_pr_err("Invalid time sync sysfs command\n");
  2861. return -EINVAL;
  2862. }
  2863. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  2864. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  2865. return count;
  2866. }
  2867. static ssize_t recovery_store(struct device *dev,
  2868. struct device_attribute *attr,
  2869. const char *buf, size_t count)
  2870. {
  2871. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2872. unsigned int recovery = 0;
  2873. int ret;
  2874. if (!plat_priv)
  2875. return -ENODEV;
  2876. if (sscanf(buf, "%du", &recovery) != 1) {
  2877. cnss_pr_err("Invalid recovery sysfs command\n");
  2878. return -EINVAL;
  2879. }
  2880. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  2881. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  2882. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2883. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2884. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  2885. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  2886. ret = cnss_send_subsys_restart_level_msg(plat_priv);
  2887. if (ret < 0) {
  2888. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  2889. plat_priv->recovery_pcss_enabled = false;
  2890. return -EINVAL;
  2891. }
  2892. return count;
  2893. }
  2894. static ssize_t shutdown_store(struct device *dev,
  2895. struct device_attribute *attr,
  2896. const char *buf, size_t count)
  2897. {
  2898. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2899. if (plat_priv) {
  2900. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2901. del_timer(&plat_priv->fw_boot_timer);
  2902. complete_all(&plat_priv->power_up_complete);
  2903. complete_all(&plat_priv->cal_complete);
  2904. }
  2905. cnss_pr_dbg("Received shutdown notification\n");
  2906. return count;
  2907. }
  2908. static ssize_t fs_ready_store(struct device *dev,
  2909. struct device_attribute *attr,
  2910. const char *buf, size_t count)
  2911. {
  2912. int fs_ready = 0;
  2913. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2914. if (sscanf(buf, "%du", &fs_ready) != 1)
  2915. return -EINVAL;
  2916. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2917. fs_ready, count);
  2918. if (!plat_priv) {
  2919. cnss_pr_err("plat_priv is NULL\n");
  2920. return count;
  2921. }
  2922. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2923. cnss_pr_dbg("QMI is bypassed\n");
  2924. return count;
  2925. }
  2926. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  2927. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2928. cnss_driver_event_post(plat_priv,
  2929. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2930. 0, NULL);
  2931. }
  2932. return count;
  2933. }
  2934. static ssize_t qdss_trace_start_store(struct device *dev,
  2935. struct device_attribute *attr,
  2936. const char *buf, size_t count)
  2937. {
  2938. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2939. wlfw_qdss_trace_start(plat_priv);
  2940. cnss_pr_dbg("Received QDSS start command\n");
  2941. return count;
  2942. }
  2943. static ssize_t qdss_trace_stop_store(struct device *dev,
  2944. struct device_attribute *attr,
  2945. const char *buf, size_t count)
  2946. {
  2947. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2948. u32 option = 0;
  2949. if (sscanf(buf, "%du", &option) != 1)
  2950. return -EINVAL;
  2951. wlfw_qdss_trace_stop(plat_priv, option);
  2952. cnss_pr_dbg("Received QDSS stop command\n");
  2953. return count;
  2954. }
  2955. static ssize_t qdss_conf_download_store(struct device *dev,
  2956. struct device_attribute *attr,
  2957. const char *buf, size_t count)
  2958. {
  2959. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2960. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2961. cnss_pr_dbg("Received QDSS download config command\n");
  2962. return count;
  2963. }
  2964. static ssize_t hw_trace_override_store(struct device *dev,
  2965. struct device_attribute *attr,
  2966. const char *buf, size_t count)
  2967. {
  2968. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2969. int tmp = 0;
  2970. if (sscanf(buf, "%du", &tmp) != 1)
  2971. return -EINVAL;
  2972. plat_priv->hw_trc_override = tmp;
  2973. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2974. return count;
  2975. }
  2976. static ssize_t charger_mode_store(struct device *dev,
  2977. struct device_attribute *attr,
  2978. const char *buf, size_t count)
  2979. {
  2980. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2981. int tmp = 0;
  2982. if (sscanf(buf, "%du", &tmp) != 1)
  2983. return -EINVAL;
  2984. plat_priv->charger_mode = tmp;
  2985. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  2986. return count;
  2987. }
  2988. static DEVICE_ATTR_WO(fs_ready);
  2989. static DEVICE_ATTR_WO(shutdown);
  2990. static DEVICE_ATTR_RW(recovery);
  2991. static DEVICE_ATTR_WO(enable_hds);
  2992. static DEVICE_ATTR_WO(qdss_trace_start);
  2993. static DEVICE_ATTR_WO(qdss_trace_stop);
  2994. static DEVICE_ATTR_WO(qdss_conf_download);
  2995. static DEVICE_ATTR_WO(hw_trace_override);
  2996. static DEVICE_ATTR_WO(charger_mode);
  2997. static DEVICE_ATTR_RW(time_sync_period);
  2998. static struct attribute *cnss_attrs[] = {
  2999. &dev_attr_fs_ready.attr,
  3000. &dev_attr_shutdown.attr,
  3001. &dev_attr_recovery.attr,
  3002. &dev_attr_enable_hds.attr,
  3003. &dev_attr_qdss_trace_start.attr,
  3004. &dev_attr_qdss_trace_stop.attr,
  3005. &dev_attr_qdss_conf_download.attr,
  3006. &dev_attr_hw_trace_override.attr,
  3007. &dev_attr_charger_mode.attr,
  3008. &dev_attr_time_sync_period.attr,
  3009. NULL,
  3010. };
  3011. static struct attribute_group cnss_attr_group = {
  3012. .attrs = cnss_attrs,
  3013. };
  3014. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3015. {
  3016. struct device *dev = &plat_priv->plat_dev->dev;
  3017. int ret;
  3018. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  3019. if (ret) {
  3020. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3021. ret);
  3022. goto out;
  3023. }
  3024. /* This is only for backward compatibility. */
  3025. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  3026. if (ret) {
  3027. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3028. ret);
  3029. goto rm_cnss_link;
  3030. }
  3031. return 0;
  3032. rm_cnss_link:
  3033. sysfs_remove_link(kernel_kobj, "cnss");
  3034. out:
  3035. return ret;
  3036. }
  3037. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3038. {
  3039. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  3040. sysfs_remove_link(kernel_kobj, "cnss");
  3041. }
  3042. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3043. {
  3044. int ret = 0;
  3045. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3046. &cnss_attr_group);
  3047. if (ret) {
  3048. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3049. ret);
  3050. goto out;
  3051. }
  3052. cnss_create_sysfs_link(plat_priv);
  3053. return 0;
  3054. out:
  3055. return ret;
  3056. }
  3057. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3058. {
  3059. cnss_remove_sysfs_link(plat_priv);
  3060. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3061. }
  3062. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3063. {
  3064. spin_lock_init(&plat_priv->event_lock);
  3065. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3066. WQ_UNBOUND, 1);
  3067. if (!plat_priv->event_wq) {
  3068. cnss_pr_err("Failed to create event workqueue!\n");
  3069. return -EFAULT;
  3070. }
  3071. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3072. INIT_LIST_HEAD(&plat_priv->event_list);
  3073. return 0;
  3074. }
  3075. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3076. {
  3077. destroy_workqueue(plat_priv->event_wq);
  3078. }
  3079. static int cnss_reboot_notifier(struct notifier_block *nb,
  3080. unsigned long action,
  3081. void *data)
  3082. {
  3083. struct cnss_plat_data *plat_priv =
  3084. container_of(nb, struct cnss_plat_data, reboot_nb);
  3085. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3086. del_timer(&plat_priv->fw_boot_timer);
  3087. complete_all(&plat_priv->power_up_complete);
  3088. complete_all(&plat_priv->cal_complete);
  3089. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3090. return NOTIFY_DONE;
  3091. }
  3092. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3093. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3094. {
  3095. struct Object client_env;
  3096. struct Object app_object;
  3097. u32 wifi_uid = HW_WIFI_UID;
  3098. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3099. int ret;
  3100. u8 state = 0;
  3101. /* Once this flag is set, secure peripheral feature
  3102. * will not be supported till next reboot
  3103. */
  3104. if (plat_priv->sec_peri_feature_disable)
  3105. return 0;
  3106. /* get rootObj */
  3107. ret = get_client_env_object(&client_env);
  3108. if (ret) {
  3109. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3110. goto end;
  3111. }
  3112. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3113. if (ret) {
  3114. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3115. if (ret == FEATURE_NOT_SUPPORTED) {
  3116. ret = 0; /* Do not Assert */
  3117. plat_priv->sec_peri_feature_disable = true;
  3118. cnss_pr_dbg("Secure HW feature not supported\n");
  3119. }
  3120. goto exit_release_clientenv;
  3121. }
  3122. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3123. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3124. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3125. ObjectCounts_pack(1, 1, 0, 0));
  3126. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3127. if (ret) {
  3128. if (ret == PERIPHERAL_NOT_FOUND) {
  3129. ret = 0; /* Do not Assert */
  3130. plat_priv->sec_peri_feature_disable = true;
  3131. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3132. }
  3133. goto exit_release_app_obj;
  3134. }
  3135. if (state == 1)
  3136. set_bit(CNSS_WLAN_HW_DISABLED,
  3137. &plat_priv->driver_state);
  3138. else
  3139. clear_bit(CNSS_WLAN_HW_DISABLED,
  3140. &plat_priv->driver_state);
  3141. exit_release_app_obj:
  3142. Object_release(app_object);
  3143. exit_release_clientenv:
  3144. Object_release(client_env);
  3145. end:
  3146. if (ret) {
  3147. cnss_pr_err("Unable to get HW disable status\n");
  3148. CNSS_ASSERT(0);
  3149. }
  3150. return ret;
  3151. }
  3152. #else
  3153. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3154. {
  3155. return 0;
  3156. }
  3157. #endif
  3158. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3159. {
  3160. int ret;
  3161. ret = cnss_init_sol_gpio(plat_priv);
  3162. if (ret)
  3163. return ret;
  3164. timer_setup(&plat_priv->fw_boot_timer,
  3165. cnss_bus_fw_boot_timeout_hdlr, 0);
  3166. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3167. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3168. if (ret)
  3169. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3170. ret);
  3171. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3172. if (ret)
  3173. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3174. ret);
  3175. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3176. init_completion(&plat_priv->power_up_complete);
  3177. init_completion(&plat_priv->cal_complete);
  3178. init_completion(&plat_priv->rddm_complete);
  3179. init_completion(&plat_priv->recovery_complete);
  3180. init_completion(&plat_priv->daemon_connected);
  3181. mutex_init(&plat_priv->dev_lock);
  3182. mutex_init(&plat_priv->driver_ops_lock);
  3183. plat_priv->recovery_ws =
  3184. wakeup_source_register(&plat_priv->plat_dev->dev,
  3185. "CNSS_FW_RECOVERY");
  3186. if (!plat_priv->recovery_ws)
  3187. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3188. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3189. cnss_daemon_connection_update_cb,
  3190. plat_priv);
  3191. if (ret)
  3192. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3193. ret);
  3194. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3195. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3196. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3197. return 0;
  3198. }
  3199. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3200. {
  3201. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3202. plat_priv);
  3203. complete_all(&plat_priv->recovery_complete);
  3204. complete_all(&plat_priv->rddm_complete);
  3205. complete_all(&plat_priv->cal_complete);
  3206. complete_all(&plat_priv->power_up_complete);
  3207. complete_all(&plat_priv->daemon_connected);
  3208. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3209. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3210. del_timer(&plat_priv->fw_boot_timer);
  3211. wakeup_source_unregister(plat_priv->recovery_ws);
  3212. cnss_deinit_sol_gpio(plat_priv);
  3213. kfree(plat_priv->sram_dump);
  3214. }
  3215. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3216. {
  3217. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3218. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3219. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3220. "qcom,wlan-cbc-enabled");
  3221. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3222. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3223. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3224. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3225. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3226. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3227. * enabled by default
  3228. */
  3229. plat_priv->adsp_pc_enabled = true;
  3230. }
  3231. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3232. {
  3233. struct device *dev = &plat_priv->plat_dev->dev;
  3234. plat_priv->use_pm_domain =
  3235. of_property_read_bool(dev->of_node, "use-pm-domain");
  3236. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3237. }
  3238. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3239. {
  3240. struct device *dev = &plat_priv->plat_dev->dev;
  3241. plat_priv->set_wlaon_pwr_ctrl =
  3242. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3243. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3244. plat_priv->set_wlaon_pwr_ctrl);
  3245. }
  3246. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3247. {
  3248. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3249. "qcom,converged-dt") ||
  3250. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3251. "qcom,same-dt-multi-dev") ||
  3252. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3253. "qcom,multi-wlan-exchg"));
  3254. }
  3255. static const struct platform_device_id cnss_platform_id_table[] = {
  3256. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3257. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3258. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3259. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3260. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3261. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3262. { .name = "qcaconv", .driver_data = 0, },
  3263. { },
  3264. };
  3265. static const struct of_device_id cnss_of_match_table[] = {
  3266. {
  3267. .compatible = "qcom,cnss",
  3268. .data = (void *)&cnss_platform_id_table[0]},
  3269. {
  3270. .compatible = "qcom,cnss-qca6290",
  3271. .data = (void *)&cnss_platform_id_table[1]},
  3272. {
  3273. .compatible = "qcom,cnss-qca6390",
  3274. .data = (void *)&cnss_platform_id_table[2]},
  3275. {
  3276. .compatible = "qcom,cnss-qca6490",
  3277. .data = (void *)&cnss_platform_id_table[3]},
  3278. {
  3279. .compatible = "qcom,cnss-kiwi",
  3280. .data = (void *)&cnss_platform_id_table[4]},
  3281. {
  3282. .compatible = "qcom,cnss-mango",
  3283. .data = (void *)&cnss_platform_id_table[5]},
  3284. {
  3285. .compatible = "qcom,cnss-qca-converged",
  3286. .data = (void *)&cnss_platform_id_table[6]},
  3287. { },
  3288. };
  3289. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3290. static inline bool
  3291. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3292. {
  3293. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3294. "use-nv-mac");
  3295. }
  3296. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3297. {
  3298. struct device_node *child;
  3299. u32 id, i;
  3300. int id_n, device_identifier_gpio, ret;
  3301. u8 gpio_value;
  3302. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3303. return 0;
  3304. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3305. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3306. if (ret) {
  3307. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3308. return ret;
  3309. }
  3310. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3311. gpio_value = gpio_get_value(device_identifier_gpio);
  3312. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3313. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3314. child) {
  3315. if (strcmp(child->name, "chip_cfg"))
  3316. continue;
  3317. id_n = of_property_count_u32_elems(child, "supported-ids");
  3318. if (id_n <= 0) {
  3319. cnss_pr_err("Device id is NOT set\n");
  3320. return -EINVAL;
  3321. }
  3322. for (i = 0; i < id_n; i++) {
  3323. ret = of_property_read_u32_index(child,
  3324. "supported-ids",
  3325. i, &id);
  3326. if (ret) {
  3327. cnss_pr_err("Failed to read supported ids\n");
  3328. return -EINVAL;
  3329. }
  3330. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3331. plat_priv->plat_dev->dev.of_node = child;
  3332. plat_priv->device_id = QCA6490_DEVICE_ID;
  3333. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3334. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3335. child->name, i, id);
  3336. return 0;
  3337. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3338. plat_priv->plat_dev->dev.of_node = child;
  3339. plat_priv->device_id = KIWI_DEVICE_ID;
  3340. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3341. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3342. child->name, i, id);
  3343. return 0;
  3344. }
  3345. }
  3346. }
  3347. return -EINVAL;
  3348. }
  3349. static inline u32
  3350. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3351. {
  3352. bool is_converged_dt = of_property_read_bool(
  3353. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3354. bool is_multi_wlan_xchg;
  3355. if (is_converged_dt)
  3356. return CNSS_DTT_CONVERGED;
  3357. is_multi_wlan_xchg = of_property_read_bool(
  3358. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3359. if (is_multi_wlan_xchg)
  3360. return CNSS_DTT_MULTIEXCHG;
  3361. return CNSS_DTT_LEGACY;
  3362. }
  3363. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3364. {
  3365. int ret = 0;
  3366. int retry = 0;
  3367. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3368. return 0;
  3369. retry:
  3370. ret = cnss_power_on_device(plat_priv);
  3371. if (ret)
  3372. goto end;
  3373. ret = cnss_bus_init(plat_priv);
  3374. if (ret) {
  3375. if ((ret != -EPROBE_DEFER) &&
  3376. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3377. cnss_power_off_device(plat_priv);
  3378. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3379. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3380. goto retry;
  3381. }
  3382. goto power_off;
  3383. }
  3384. return 0;
  3385. power_off:
  3386. cnss_power_off_device(plat_priv);
  3387. end:
  3388. return ret;
  3389. }
  3390. int cnss_wlan_hw_enable(void)
  3391. {
  3392. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3393. int ret = 0;
  3394. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3395. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3396. goto register_driver;
  3397. ret = cnss_wlan_device_init(plat_priv);
  3398. if (ret) {
  3399. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3400. CNSS_ASSERT(0);
  3401. return ret;
  3402. }
  3403. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3404. cnss_driver_event_post(plat_priv,
  3405. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3406. 0, NULL);
  3407. register_driver:
  3408. if (plat_priv->driver_ops)
  3409. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3410. return ret;
  3411. }
  3412. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3413. static int cnss_probe(struct platform_device *plat_dev)
  3414. {
  3415. int ret = 0;
  3416. struct cnss_plat_data *plat_priv;
  3417. const struct of_device_id *of_id;
  3418. const struct platform_device_id *device_id;
  3419. if (cnss_get_plat_priv(plat_dev)) {
  3420. cnss_pr_err("Driver is already initialized!\n");
  3421. ret = -EEXIST;
  3422. goto out;
  3423. }
  3424. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3425. if (!of_id || !of_id->data) {
  3426. cnss_pr_err("Failed to find of match device!\n");
  3427. ret = -ENODEV;
  3428. goto out;
  3429. }
  3430. device_id = of_id->data;
  3431. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3432. GFP_KERNEL);
  3433. if (!plat_priv) {
  3434. ret = -ENOMEM;
  3435. goto out;
  3436. }
  3437. plat_priv->plat_dev = plat_dev;
  3438. plat_priv->dev_node = NULL;
  3439. plat_priv->device_id = device_id->driver_data;
  3440. plat_priv->dt_type = cnss_dt_type(plat_priv);
  3441. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  3442. plat_priv->dt_type);
  3443. plat_priv->use_fw_path_with_prefix =
  3444. cnss_use_fw_path_with_prefix(plat_priv);
  3445. ret = cnss_get_dev_cfg_node(plat_priv);
  3446. if (ret) {
  3447. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3448. goto reset_plat_dev;
  3449. }
  3450. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  3451. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3452. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3453. cnss_set_plat_priv(plat_dev, plat_priv);
  3454. platform_set_drvdata(plat_dev, plat_priv);
  3455. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3456. INIT_LIST_HEAD(&plat_priv->clk_list);
  3457. cnss_get_pm_domain_info(plat_priv);
  3458. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3459. cnss_power_misc_params_init(plat_priv);
  3460. cnss_get_tcs_info(plat_priv);
  3461. cnss_get_cpr_info(plat_priv);
  3462. cnss_aop_mbox_init(plat_priv);
  3463. cnss_init_control_params(plat_priv);
  3464. ret = cnss_get_resources(plat_priv);
  3465. if (ret)
  3466. goto reset_ctx;
  3467. ret = cnss_register_esoc(plat_priv);
  3468. if (ret)
  3469. goto free_res;
  3470. ret = cnss_register_bus_scale(plat_priv);
  3471. if (ret)
  3472. goto unreg_esoc;
  3473. ret = cnss_create_sysfs(plat_priv);
  3474. if (ret)
  3475. goto unreg_bus_scale;
  3476. ret = cnss_event_work_init(plat_priv);
  3477. if (ret)
  3478. goto remove_sysfs;
  3479. ret = cnss_qmi_init(plat_priv);
  3480. if (ret)
  3481. goto deinit_event_work;
  3482. ret = cnss_dms_init(plat_priv);
  3483. if (ret)
  3484. goto deinit_qmi;
  3485. ret = cnss_debugfs_create(plat_priv);
  3486. if (ret)
  3487. goto deinit_dms;
  3488. ret = cnss_misc_init(plat_priv);
  3489. if (ret)
  3490. goto destroy_debugfs;
  3491. ret = cnss_wlan_hw_disable_check(plat_priv);
  3492. if (ret)
  3493. goto deinit_misc;
  3494. /* Make sure all platform related init are done before
  3495. * device power on and bus init.
  3496. */
  3497. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  3498. ret = cnss_wlan_device_init(plat_priv);
  3499. if (ret)
  3500. goto deinit_misc;
  3501. } else {
  3502. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  3503. }
  3504. cnss_register_coex_service(plat_priv);
  3505. cnss_register_ims_service(plat_priv);
  3506. ret = cnss_genl_init();
  3507. if (ret < 0)
  3508. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3509. cnss_pr_info("Platform driver probed successfully.\n");
  3510. return 0;
  3511. deinit_misc:
  3512. cnss_misc_deinit(plat_priv);
  3513. destroy_debugfs:
  3514. cnss_debugfs_destroy(plat_priv);
  3515. deinit_dms:
  3516. cnss_dms_deinit(plat_priv);
  3517. deinit_qmi:
  3518. cnss_qmi_deinit(plat_priv);
  3519. deinit_event_work:
  3520. cnss_event_work_deinit(plat_priv);
  3521. remove_sysfs:
  3522. cnss_remove_sysfs(plat_priv);
  3523. unreg_bus_scale:
  3524. cnss_unregister_bus_scale(plat_priv);
  3525. unreg_esoc:
  3526. cnss_unregister_esoc(plat_priv);
  3527. free_res:
  3528. cnss_put_resources(plat_priv);
  3529. reset_ctx:
  3530. platform_set_drvdata(plat_dev, NULL);
  3531. reset_plat_dev:
  3532. cnss_set_plat_priv(plat_dev, NULL);
  3533. out:
  3534. return ret;
  3535. }
  3536. static int cnss_remove(struct platform_device *plat_dev)
  3537. {
  3538. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3539. cnss_genl_exit();
  3540. cnss_unregister_ims_service(plat_priv);
  3541. cnss_unregister_coex_service(plat_priv);
  3542. cnss_bus_deinit(plat_priv);
  3543. cnss_misc_deinit(plat_priv);
  3544. cnss_debugfs_destroy(plat_priv);
  3545. cnss_dms_deinit(plat_priv);
  3546. cnss_qmi_deinit(plat_priv);
  3547. cnss_event_work_deinit(plat_priv);
  3548. cnss_cancel_dms_work();
  3549. cnss_remove_sysfs(plat_priv);
  3550. cnss_unregister_bus_scale(plat_priv);
  3551. cnss_unregister_esoc(plat_priv);
  3552. cnss_put_resources(plat_priv);
  3553. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3554. mbox_free_channel(plat_priv->mbox_chan);
  3555. platform_set_drvdata(plat_dev, NULL);
  3556. plat_env = NULL;
  3557. return 0;
  3558. }
  3559. static struct platform_driver cnss_platform_driver = {
  3560. .probe = cnss_probe,
  3561. .remove = cnss_remove,
  3562. .driver = {
  3563. .name = "cnss2",
  3564. .of_match_table = cnss_of_match_table,
  3565. #ifdef CONFIG_CNSS_ASYNC
  3566. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3567. #endif
  3568. },
  3569. };
  3570. static bool cnss_check_compatible_node(void)
  3571. {
  3572. struct device_node *dn = NULL;
  3573. for_each_matching_node(dn, cnss_of_match_table) {
  3574. if (of_device_is_available(dn)) {
  3575. cnss_allow_driver_loading = true;
  3576. return true;
  3577. }
  3578. }
  3579. return false;
  3580. }
  3581. /**
  3582. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3583. *
  3584. * Valid device tree node means a node with "compatible" property from the
  3585. * device match table and "status" property is not disabled.
  3586. *
  3587. * Return: true if valid device tree node found, false if not found
  3588. */
  3589. static bool cnss_is_valid_dt_node_found(void)
  3590. {
  3591. struct device_node *dn = NULL;
  3592. for_each_matching_node(dn, cnss_of_match_table) {
  3593. if (of_device_is_available(dn))
  3594. break;
  3595. }
  3596. if (dn)
  3597. return true;
  3598. return false;
  3599. }
  3600. static int __init cnss_initialize(void)
  3601. {
  3602. int ret = 0;
  3603. if (!cnss_is_valid_dt_node_found())
  3604. return -ENODEV;
  3605. if (!cnss_check_compatible_node())
  3606. return ret;
  3607. cnss_debug_init();
  3608. ret = platform_driver_register(&cnss_platform_driver);
  3609. if (ret)
  3610. cnss_debug_deinit();
  3611. return ret;
  3612. }
  3613. static void __exit cnss_exit(void)
  3614. {
  3615. platform_driver_unregister(&cnss_platform_driver);
  3616. cnss_debug_deinit();
  3617. }
  3618. module_init(cnss_initialize);
  3619. module_exit(cnss_exit);
  3620. MODULE_LICENSE("GPL v2");
  3621. MODULE_DESCRIPTION("CNSS2 Platform Driver");