dsi_panel.c 112 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  31. #define MIN_PREFILL_LINES 35
  32. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  33. {
  34. char *bp;
  35. bp = buf;
  36. /* First 7 bytes are cmd header */
  37. *bp++ = 0x0A;
  38. *bp++ = 1;
  39. *bp++ = 0;
  40. *bp++ = 0;
  41. *bp++ = pps_delay_ms;
  42. *bp++ = 0;
  43. *bp++ = 128;
  44. }
  45. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  46. char *buf, int pps_id, u32 size)
  47. {
  48. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  49. buf += DSI_CMD_PPS_HDR_SIZE;
  50. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  51. size);
  52. }
  53. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  54. char *buf, int pps_id, u32 size)
  55. {
  56. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  57. buf += DSI_CMD_PPS_HDR_SIZE;
  58. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  59. size);
  60. }
  61. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  62. {
  63. int rc = 0;
  64. int i;
  65. struct regulator *vreg = NULL;
  66. for (i = 0; i < panel->power_info.count; i++) {
  67. vreg = devm_regulator_get(panel->parent,
  68. panel->power_info.vregs[i].vreg_name);
  69. rc = PTR_RET(vreg);
  70. if (rc) {
  71. DSI_ERR("failed to get %s regulator\n",
  72. panel->power_info.vregs[i].vreg_name);
  73. goto error_put;
  74. }
  75. panel->power_info.vregs[i].vreg = vreg;
  76. }
  77. return rc;
  78. error_put:
  79. for (i = i - 1; i >= 0; i--) {
  80. devm_regulator_put(panel->power_info.vregs[i].vreg);
  81. panel->power_info.vregs[i].vreg = NULL;
  82. }
  83. return rc;
  84. }
  85. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  86. {
  87. int rc = 0;
  88. int i;
  89. for (i = panel->power_info.count - 1; i >= 0; i--)
  90. devm_regulator_put(panel->power_info.vregs[i].vreg);
  91. return rc;
  92. }
  93. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  94. {
  95. int rc = 0;
  96. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  97. if (gpio_is_valid(r_config->reset_gpio)) {
  98. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  99. if (rc) {
  100. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  101. goto error;
  102. }
  103. }
  104. if (gpio_is_valid(r_config->disp_en_gpio)) {
  105. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  106. if (rc) {
  107. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  108. goto error_release_reset;
  109. }
  110. }
  111. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  112. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  113. if (rc) {
  114. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  115. goto error_release_disp_en;
  116. }
  117. }
  118. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  119. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  120. if (rc) {
  121. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  122. goto error_release_mode_sel;
  123. }
  124. }
  125. if (gpio_is_valid(panel->panel_test_gpio)) {
  126. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  127. if (rc) {
  128. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  129. rc);
  130. panel->panel_test_gpio = -1;
  131. rc = 0;
  132. }
  133. }
  134. goto error;
  135. error_release_mode_sel:
  136. if (gpio_is_valid(panel->bl_config.en_gpio))
  137. gpio_free(panel->bl_config.en_gpio);
  138. error_release_disp_en:
  139. if (gpio_is_valid(r_config->disp_en_gpio))
  140. gpio_free(r_config->disp_en_gpio);
  141. error_release_reset:
  142. if (gpio_is_valid(r_config->reset_gpio))
  143. gpio_free(r_config->reset_gpio);
  144. error:
  145. return rc;
  146. }
  147. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  148. {
  149. int rc = 0;
  150. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  151. if (gpio_is_valid(r_config->reset_gpio))
  152. gpio_free(r_config->reset_gpio);
  153. if (gpio_is_valid(r_config->disp_en_gpio))
  154. gpio_free(r_config->disp_en_gpio);
  155. if (gpio_is_valid(panel->bl_config.en_gpio))
  156. gpio_free(panel->bl_config.en_gpio);
  157. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  158. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  159. if (gpio_is_valid(panel->panel_test_gpio))
  160. gpio_free(panel->panel_test_gpio);
  161. return rc;
  162. }
  163. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  164. {
  165. struct dsi_panel_reset_config *r_config;
  166. if (!panel) {
  167. DSI_ERR("Invalid panel param\n");
  168. return -EINVAL;
  169. }
  170. r_config = &panel->reset_config;
  171. if (!r_config) {
  172. DSI_ERR("Invalid panel reset configuration\n");
  173. return -EINVAL;
  174. }
  175. if (gpio_is_valid(r_config->reset_gpio)) {
  176. gpio_set_value(r_config->reset_gpio, 0);
  177. DSI_INFO("GPIO pulled low to simulate ESD\n");
  178. return 0;
  179. }
  180. DSI_ERR("failed to pull down gpio\n");
  181. return -EINVAL;
  182. }
  183. static int dsi_panel_reset(struct dsi_panel *panel)
  184. {
  185. int rc = 0;
  186. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  187. int i;
  188. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  189. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  190. if (rc) {
  191. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  192. goto exit;
  193. }
  194. }
  195. if (r_config->count) {
  196. rc = gpio_direction_output(r_config->reset_gpio,
  197. r_config->sequence[0].level);
  198. if (rc) {
  199. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  200. goto exit;
  201. }
  202. }
  203. for (i = 0; i < r_config->count; i++) {
  204. gpio_set_value(r_config->reset_gpio,
  205. r_config->sequence[i].level);
  206. if (r_config->sequence[i].sleep_ms)
  207. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  208. (r_config->sequence[i].sleep_ms * 1000) + 100);
  209. }
  210. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  211. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  212. if (rc)
  213. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  214. }
  215. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  216. bool out = true;
  217. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  218. || (panel->reset_config.mode_sel_state
  219. == MODE_GPIO_LOW))
  220. out = false;
  221. else if ((panel->reset_config.mode_sel_state
  222. == MODE_SEL_SINGLE_PORT) ||
  223. (panel->reset_config.mode_sel_state
  224. == MODE_GPIO_HIGH))
  225. out = true;
  226. rc = gpio_direction_output(
  227. panel->reset_config.lcd_mode_sel_gpio, out);
  228. if (rc)
  229. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  230. }
  231. if (gpio_is_valid(panel->panel_test_gpio)) {
  232. rc = gpio_direction_input(panel->panel_test_gpio);
  233. if (rc)
  234. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  235. rc);
  236. }
  237. exit:
  238. return rc;
  239. }
  240. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  241. {
  242. int rc = 0;
  243. struct pinctrl_state *state;
  244. if (panel->host_config.ext_bridge_mode)
  245. return 0;
  246. if (!panel->pinctrl.pinctrl)
  247. return 0;
  248. if (enable)
  249. state = panel->pinctrl.active;
  250. else
  251. state = panel->pinctrl.suspend;
  252. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  253. if (rc)
  254. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  255. panel->name, rc);
  256. return rc;
  257. }
  258. static int dsi_panel_power_on(struct dsi_panel *panel)
  259. {
  260. int rc = 0;
  261. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  262. if (rc) {
  263. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  264. panel->name, rc);
  265. goto exit;
  266. }
  267. rc = dsi_panel_set_pinctrl_state(panel, true);
  268. if (rc) {
  269. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  270. goto error_disable_vregs;
  271. }
  272. rc = dsi_panel_reset(panel);
  273. if (rc) {
  274. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  275. goto error_disable_gpio;
  276. }
  277. goto exit;
  278. error_disable_gpio:
  279. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  280. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  281. if (gpio_is_valid(panel->bl_config.en_gpio))
  282. gpio_set_value(panel->bl_config.en_gpio, 0);
  283. (void)dsi_panel_set_pinctrl_state(panel, false);
  284. error_disable_vregs:
  285. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  286. exit:
  287. return rc;
  288. }
  289. static int dsi_panel_power_off(struct dsi_panel *panel)
  290. {
  291. int rc = 0;
  292. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  293. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  294. if (gpio_is_valid(panel->reset_config.reset_gpio))
  295. gpio_set_value(panel->reset_config.reset_gpio, 0);
  296. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  297. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  298. if (gpio_is_valid(panel->panel_test_gpio)) {
  299. rc = gpio_direction_input(panel->panel_test_gpio);
  300. if (rc)
  301. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  302. rc);
  303. }
  304. rc = dsi_panel_set_pinctrl_state(panel, false);
  305. if (rc) {
  306. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  307. rc);
  308. }
  309. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  310. if (rc)
  311. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  312. panel->name, rc);
  313. return rc;
  314. }
  315. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  316. enum dsi_cmd_set_type type)
  317. {
  318. int rc = 0, i = 0;
  319. ssize_t len;
  320. struct dsi_cmd_desc *cmds;
  321. u32 count;
  322. enum dsi_cmd_set_state state;
  323. struct dsi_display_mode *mode;
  324. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  325. if (!panel || !panel->cur_mode)
  326. return -EINVAL;
  327. mode = panel->cur_mode;
  328. cmds = mode->priv_info->cmd_sets[type].cmds;
  329. count = mode->priv_info->cmd_sets[type].count;
  330. state = mode->priv_info->cmd_sets[type].state;
  331. if (count == 0) {
  332. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  333. panel->name, type);
  334. goto error;
  335. }
  336. for (i = 0; i < count; i++) {
  337. if (state == DSI_CMD_SET_STATE_LP)
  338. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  339. if (cmds->last_command)
  340. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  341. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  342. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  343. len = ops->transfer(panel->host, &cmds->msg);
  344. if (len < 0) {
  345. rc = len;
  346. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  347. goto error;
  348. }
  349. if (cmds->post_wait_ms)
  350. usleep_range(cmds->post_wait_ms*1000,
  351. ((cmds->post_wait_ms*1000)+10));
  352. cmds++;
  353. }
  354. error:
  355. return rc;
  356. }
  357. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  358. {
  359. int rc = 0;
  360. if (panel->host_config.ext_bridge_mode)
  361. return 0;
  362. devm_pinctrl_put(panel->pinctrl.pinctrl);
  363. return rc;
  364. }
  365. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  366. {
  367. int rc = 0;
  368. if (panel->host_config.ext_bridge_mode)
  369. return 0;
  370. /* TODO: pinctrl is defined in dsi dt node */
  371. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  372. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  373. rc = PTR_ERR(panel->pinctrl.pinctrl);
  374. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  375. goto error;
  376. }
  377. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  378. "panel_active");
  379. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  380. rc = PTR_ERR(panel->pinctrl.active);
  381. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  382. goto error;
  383. }
  384. panel->pinctrl.suspend =
  385. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  386. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  387. rc = PTR_ERR(panel->pinctrl.suspend);
  388. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  389. goto error;
  390. }
  391. panel->pinctrl.pwm_pin =
  392. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  393. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  394. panel->pinctrl.pwm_pin = NULL;
  395. DSI_DEBUG("failed to get pinctrl pwm_pin");
  396. }
  397. error:
  398. return rc;
  399. }
  400. static int dsi_panel_wled_register(struct dsi_panel *panel,
  401. struct dsi_backlight_config *bl)
  402. {
  403. struct backlight_device *bd;
  404. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  405. if (!bd) {
  406. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  407. panel->name, -EPROBE_DEFER);
  408. return -EPROBE_DEFER;
  409. }
  410. bl->raw_bd = bd;
  411. return 0;
  412. }
  413. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  414. u32 bl_lvl)
  415. {
  416. int rc = 0;
  417. struct mipi_dsi_device *dsi;
  418. if (!panel || (bl_lvl > 0xffff)) {
  419. DSI_ERR("invalid params\n");
  420. return -EINVAL;
  421. }
  422. dsi = &panel->mipi_device;
  423. if (panel->bl_config.bl_inverted_dbv)
  424. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  425. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  426. if (rc < 0)
  427. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  428. return rc;
  429. }
  430. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  431. u32 bl_lvl)
  432. {
  433. int rc = 0;
  434. u32 duty = 0;
  435. u32 period_ns = 0;
  436. struct dsi_backlight_config *bl;
  437. if (!panel) {
  438. DSI_ERR("Invalid Params\n");
  439. return -EINVAL;
  440. }
  441. bl = &panel->bl_config;
  442. if (!bl->pwm_bl) {
  443. DSI_ERR("pwm device not found\n");
  444. return -EINVAL;
  445. }
  446. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  447. duty = bl_lvl * period_ns;
  448. duty /= bl->bl_max_level;
  449. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  450. if (rc) {
  451. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  452. rc);
  453. goto error;
  454. }
  455. if (bl_lvl == 0 && bl->pwm_enabled) {
  456. pwm_disable(bl->pwm_bl);
  457. bl->pwm_enabled = false;
  458. return 0;
  459. }
  460. if (!bl->pwm_enabled) {
  461. rc = pwm_enable(bl->pwm_bl);
  462. if (rc) {
  463. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  464. rc);
  465. goto error;
  466. }
  467. bl->pwm_enabled = true;
  468. }
  469. error:
  470. return rc;
  471. }
  472. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  473. {
  474. int rc = 0;
  475. struct dsi_backlight_config *bl = &panel->bl_config;
  476. if (panel->host_config.ext_bridge_mode)
  477. return 0;
  478. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  479. switch (bl->type) {
  480. case DSI_BACKLIGHT_WLED:
  481. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  482. break;
  483. case DSI_BACKLIGHT_DCS:
  484. rc = dsi_panel_update_backlight(panel, bl_lvl);
  485. break;
  486. case DSI_BACKLIGHT_EXTERNAL:
  487. break;
  488. case DSI_BACKLIGHT_PWM:
  489. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  490. break;
  491. default:
  492. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  493. rc = -ENOTSUPP;
  494. }
  495. return rc;
  496. }
  497. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  498. {
  499. u32 cur_bl_level;
  500. struct backlight_device *bd = bl->raw_bd;
  501. /* default the brightness level to 50% */
  502. cur_bl_level = bl->bl_max_level >> 1;
  503. switch (bl->type) {
  504. case DSI_BACKLIGHT_WLED:
  505. /* Try to query the backlight level from the backlight device */
  506. if (bd->ops && bd->ops->get_brightness)
  507. cur_bl_level = bd->ops->get_brightness(bd);
  508. break;
  509. case DSI_BACKLIGHT_DCS:
  510. case DSI_BACKLIGHT_EXTERNAL:
  511. case DSI_BACKLIGHT_PWM:
  512. default:
  513. /*
  514. * Ideally, we should read the backlight level from the
  515. * panel. For now, just set it default value.
  516. */
  517. break;
  518. }
  519. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  520. return cur_bl_level;
  521. }
  522. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  523. {
  524. struct dsi_backlight_config *bl = &panel->bl_config;
  525. bl->bl_level = dsi_panel_get_brightness(bl);
  526. }
  527. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  528. {
  529. int rc = 0;
  530. struct dsi_backlight_config *bl = &panel->bl_config;
  531. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  532. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  533. rc = PTR_ERR(bl->pwm_bl);
  534. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  535. rc);
  536. return rc;
  537. }
  538. if (panel->pinctrl.pwm_pin) {
  539. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  540. panel->pinctrl.pwm_pin);
  541. if (rc)
  542. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  543. panel->name, rc);
  544. }
  545. return 0;
  546. }
  547. static int dsi_panel_bl_register(struct dsi_panel *panel)
  548. {
  549. int rc = 0;
  550. struct dsi_backlight_config *bl = &panel->bl_config;
  551. if (panel->host_config.ext_bridge_mode)
  552. return 0;
  553. switch (bl->type) {
  554. case DSI_BACKLIGHT_WLED:
  555. rc = dsi_panel_wled_register(panel, bl);
  556. break;
  557. case DSI_BACKLIGHT_DCS:
  558. break;
  559. case DSI_BACKLIGHT_EXTERNAL:
  560. break;
  561. case DSI_BACKLIGHT_PWM:
  562. rc = dsi_panel_pwm_register(panel);
  563. break;
  564. default:
  565. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  566. rc = -ENOTSUPP;
  567. goto error;
  568. }
  569. error:
  570. return rc;
  571. }
  572. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  573. {
  574. struct dsi_backlight_config *bl = &panel->bl_config;
  575. devm_pwm_put(panel->parent, bl->pwm_bl);
  576. }
  577. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  578. {
  579. int rc = 0;
  580. struct dsi_backlight_config *bl = &panel->bl_config;
  581. if (panel->host_config.ext_bridge_mode)
  582. return 0;
  583. switch (bl->type) {
  584. case DSI_BACKLIGHT_WLED:
  585. break;
  586. case DSI_BACKLIGHT_DCS:
  587. break;
  588. case DSI_BACKLIGHT_EXTERNAL:
  589. break;
  590. case DSI_BACKLIGHT_PWM:
  591. dsi_panel_pwm_unregister(panel);
  592. break;
  593. default:
  594. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  595. rc = -ENOTSUPP;
  596. goto error;
  597. }
  598. error:
  599. return rc;
  600. }
  601. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  602. struct dsi_parser_utils *utils)
  603. {
  604. int rc = 0;
  605. u64 tmp64 = 0;
  606. struct dsi_display_mode *display_mode;
  607. struct dsi_display_mode_priv_info *priv_info;
  608. display_mode = container_of(mode, struct dsi_display_mode, timing);
  609. priv_info = display_mode->priv_info;
  610. rc = utils->read_u64(utils->data,
  611. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  612. if (rc == -EOVERFLOW) {
  613. tmp64 = 0;
  614. rc = utils->read_u32(utils->data,
  615. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  616. }
  617. mode->clk_rate_hz = !rc ? tmp64 : 0;
  618. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  619. mode->pclk_scale.numer = 1;
  620. mode->pclk_scale.denom = 1;
  621. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  622. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  623. &mode->mdp_transfer_time_us);
  624. if (!rc)
  625. display_mode->priv_info->mdp_transfer_time_us =
  626. mode->mdp_transfer_time_us;
  627. else
  628. display_mode->priv_info->mdp_transfer_time_us = 0;
  629. rc = utils->read_u32(utils->data,
  630. "qcom,mdss-dsi-panel-framerate",
  631. &mode->refresh_rate);
  632. if (rc) {
  633. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  634. rc);
  635. goto error;
  636. }
  637. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  638. &mode->h_active);
  639. if (rc) {
  640. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  641. rc);
  642. goto error;
  643. }
  644. rc = utils->read_u32(utils->data,
  645. "qcom,mdss-dsi-h-front-porch",
  646. &mode->h_front_porch);
  647. if (rc) {
  648. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  649. rc);
  650. goto error;
  651. }
  652. rc = utils->read_u32(utils->data,
  653. "qcom,mdss-dsi-h-back-porch",
  654. &mode->h_back_porch);
  655. if (rc) {
  656. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  657. rc);
  658. goto error;
  659. }
  660. rc = utils->read_u32(utils->data,
  661. "qcom,mdss-dsi-h-pulse-width",
  662. &mode->h_sync_width);
  663. if (rc) {
  664. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  665. rc);
  666. goto error;
  667. }
  668. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  669. &mode->h_skew);
  670. if (rc)
  671. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  672. rc);
  673. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  674. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  675. mode->h_sync_width);
  676. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  677. &mode->v_active);
  678. if (rc) {
  679. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  680. rc);
  681. goto error;
  682. }
  683. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  684. &mode->v_back_porch);
  685. if (rc) {
  686. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  687. rc);
  688. goto error;
  689. }
  690. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  691. &mode->v_front_porch);
  692. if (rc) {
  693. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  694. rc);
  695. goto error;
  696. }
  697. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  698. &mode->v_sync_width);
  699. if (rc) {
  700. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  701. rc);
  702. goto error;
  703. }
  704. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  705. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  706. mode->v_sync_width);
  707. error:
  708. return rc;
  709. }
  710. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  711. struct dsi_parser_utils *utils,
  712. const char *name)
  713. {
  714. int rc = 0;
  715. u32 bpp = 0;
  716. enum dsi_pixel_format fmt;
  717. const char *packing;
  718. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  719. if (rc) {
  720. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  721. name, rc);
  722. return rc;
  723. }
  724. host->bpp = bpp;
  725. switch (bpp) {
  726. case 3:
  727. fmt = DSI_PIXEL_FORMAT_RGB111;
  728. break;
  729. case 8:
  730. fmt = DSI_PIXEL_FORMAT_RGB332;
  731. break;
  732. case 12:
  733. fmt = DSI_PIXEL_FORMAT_RGB444;
  734. break;
  735. case 16:
  736. fmt = DSI_PIXEL_FORMAT_RGB565;
  737. break;
  738. case 18:
  739. fmt = DSI_PIXEL_FORMAT_RGB666;
  740. break;
  741. case 24:
  742. default:
  743. fmt = DSI_PIXEL_FORMAT_RGB888;
  744. break;
  745. }
  746. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  747. packing = utils->get_property(utils->data,
  748. "qcom,mdss-dsi-pixel-packing",
  749. NULL);
  750. if (packing && !strcmp(packing, "loose"))
  751. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  752. }
  753. host->dst_format = fmt;
  754. return rc;
  755. }
  756. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  757. struct dsi_parser_utils *utils,
  758. const char *name)
  759. {
  760. int rc = 0;
  761. bool lane_enabled;
  762. u32 num_of_lanes = 0;
  763. lane_enabled = utils->read_bool(utils->data,
  764. "qcom,mdss-dsi-lane-0-state");
  765. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  766. lane_enabled = utils->read_bool(utils->data,
  767. "qcom,mdss-dsi-lane-1-state");
  768. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  769. lane_enabled = utils->read_bool(utils->data,
  770. "qcom,mdss-dsi-lane-2-state");
  771. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  772. lane_enabled = utils->read_bool(utils->data,
  773. "qcom,mdss-dsi-lane-3-state");
  774. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  775. if (host->data_lanes & DSI_DATA_LANE_0)
  776. num_of_lanes++;
  777. if (host->data_lanes & DSI_DATA_LANE_1)
  778. num_of_lanes++;
  779. if (host->data_lanes & DSI_DATA_LANE_2)
  780. num_of_lanes++;
  781. if (host->data_lanes & DSI_DATA_LANE_3)
  782. num_of_lanes++;
  783. host->num_data_lanes = num_of_lanes;
  784. if (host->data_lanes == 0) {
  785. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  786. rc = -EINVAL;
  787. }
  788. return rc;
  789. }
  790. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  791. struct dsi_parser_utils *utils,
  792. const char *name)
  793. {
  794. int rc = 0;
  795. const char *swap_mode;
  796. swap_mode = utils->get_property(utils->data,
  797. "qcom,mdss-dsi-color-order", NULL);
  798. if (swap_mode) {
  799. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  800. host->swap_mode = DSI_COLOR_SWAP_RGB;
  801. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  802. host->swap_mode = DSI_COLOR_SWAP_RBG;
  803. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  804. host->swap_mode = DSI_COLOR_SWAP_BRG;
  805. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  806. host->swap_mode = DSI_COLOR_SWAP_GRB;
  807. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  808. host->swap_mode = DSI_COLOR_SWAP_GBR;
  809. } else {
  810. DSI_ERR("[%s] Unrecognized color order-%s\n",
  811. name, swap_mode);
  812. rc = -EINVAL;
  813. }
  814. } else {
  815. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  816. host->swap_mode = DSI_COLOR_SWAP_RGB;
  817. }
  818. /* bit swap on color channel is not defined in dt */
  819. host->bit_swap_red = false;
  820. host->bit_swap_green = false;
  821. host->bit_swap_blue = false;
  822. return rc;
  823. }
  824. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  825. struct dsi_parser_utils *utils,
  826. const char *name)
  827. {
  828. const char *trig;
  829. int rc = 0;
  830. trig = utils->get_property(utils->data,
  831. "qcom,mdss-dsi-mdp-trigger", NULL);
  832. if (trig) {
  833. if (!strcmp(trig, "none")) {
  834. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  835. } else if (!strcmp(trig, "trigger_te")) {
  836. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  837. } else if (!strcmp(trig, "trigger_sw")) {
  838. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  839. } else if (!strcmp(trig, "trigger_sw_te")) {
  840. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  841. } else {
  842. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  843. name, trig);
  844. rc = -EINVAL;
  845. }
  846. } else {
  847. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  848. name);
  849. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  850. }
  851. trig = utils->get_property(utils->data,
  852. "qcom,mdss-dsi-dma-trigger", NULL);
  853. if (trig) {
  854. if (!strcmp(trig, "none")) {
  855. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  856. } else if (!strcmp(trig, "trigger_te")) {
  857. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  858. } else if (!strcmp(trig, "trigger_sw")) {
  859. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  860. } else if (!strcmp(trig, "trigger_sw_seof")) {
  861. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  862. } else if (!strcmp(trig, "trigger_sw_te")) {
  863. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  864. } else {
  865. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  866. name, trig);
  867. rc = -EINVAL;
  868. }
  869. } else {
  870. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  871. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  872. }
  873. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  874. &host->te_mode);
  875. if (rc) {
  876. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  877. host->te_mode = 1;
  878. rc = 0;
  879. }
  880. return rc;
  881. }
  882. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  883. struct dsi_parser_utils *utils,
  884. const char *name)
  885. {
  886. u32 val = 0, line_no = 0, window = 0;
  887. int rc = 0;
  888. bool panel_cphy_mode = false;
  889. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  890. if (!rc) {
  891. host->t_clk_post = val;
  892. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  893. }
  894. val = 0;
  895. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  896. if (!rc) {
  897. host->t_clk_pre = val;
  898. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  899. }
  900. host->ignore_rx_eot = utils->read_bool(utils->data,
  901. "qcom,mdss-dsi-rx-eot-ignore");
  902. host->append_tx_eot = utils->read_bool(utils->data,
  903. "qcom,mdss-dsi-tx-eot-append");
  904. host->ext_bridge_mode = utils->read_bool(utils->data,
  905. "qcom,mdss-dsi-ext-bridge-mode");
  906. host->force_hs_clk_lane = utils->read_bool(utils->data,
  907. "qcom,mdss-dsi-force-clock-lane-hs");
  908. panel_cphy_mode = utils->read_bool(utils->data,
  909. "qcom,panel-cphy-mode");
  910. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  911. : DSI_PHY_TYPE_DPHY;
  912. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  913. &line_no);
  914. if (rc)
  915. host->dma_sched_line = 0;
  916. else
  917. host->dma_sched_line = line_no;
  918. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  919. &window);
  920. if (rc)
  921. host->dma_sched_window = 0;
  922. else
  923. host->dma_sched_window = window;
  924. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  925. host->dma_sched_line, host->dma_sched_window);
  926. return 0;
  927. }
  928. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  929. struct dsi_parser_utils *utils,
  930. const char *name)
  931. {
  932. int rc = 0;
  933. u32 val = 0;
  934. bool supported = false;
  935. struct dsi_split_link_config *split_link = &host->split_link;
  936. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  937. if (!supported) {
  938. DSI_DEBUG("[%s] Split link is not supported\n", name);
  939. split_link->split_link_enabled = false;
  940. return;
  941. }
  942. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  943. if (rc || val < 1) {
  944. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  945. split_link->num_sublinks = 2;
  946. } else {
  947. split_link->num_sublinks = val;
  948. }
  949. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  950. if (rc || val < 1) {
  951. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  952. split_link->lanes_per_sublink = 2;
  953. } else {
  954. split_link->lanes_per_sublink = val;
  955. }
  956. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  957. split_link->num_sublinks, split_link->lanes_per_sublink);
  958. split_link->split_link_enabled = true;
  959. }
  960. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  961. {
  962. int rc = 0;
  963. struct dsi_parser_utils *utils = &panel->utils;
  964. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  965. panel->name);
  966. if (rc) {
  967. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  968. panel->name, rc);
  969. goto error;
  970. }
  971. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  972. panel->name);
  973. if (rc) {
  974. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  975. panel->name, rc);
  976. goto error;
  977. }
  978. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  979. panel->name);
  980. if (rc) {
  981. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  982. panel->name, rc);
  983. goto error;
  984. }
  985. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  986. panel->name);
  987. if (rc) {
  988. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  989. panel->name, rc);
  990. goto error;
  991. }
  992. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  993. panel->name);
  994. if (rc) {
  995. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  996. panel->name, rc);
  997. goto error;
  998. }
  999. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1000. panel->name);
  1001. error:
  1002. return rc;
  1003. }
  1004. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1005. struct device_node *of_node)
  1006. {
  1007. int rc = 0;
  1008. u32 val = 0;
  1009. rc = of_property_read_u32(of_node,
  1010. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1011. &val);
  1012. if (rc)
  1013. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1014. panel->name, rc);
  1015. panel->qsync_min_fps = val;
  1016. return rc;
  1017. }
  1018. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1019. {
  1020. int rc = 0;
  1021. bool supported = false;
  1022. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1023. struct dsi_parser_utils *utils = &panel->utils;
  1024. const char *name = panel->name;
  1025. const char *type;
  1026. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1027. if (!supported) {
  1028. dyn_clk_caps->dyn_clk_support = false;
  1029. return rc;
  1030. }
  1031. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1032. "qcom,dsi-dyn-clk-list");
  1033. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1034. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1035. return -EINVAL;
  1036. }
  1037. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1038. sizeof(u32), GFP_KERNEL);
  1039. if (!dyn_clk_caps->bit_clk_list)
  1040. return -ENOMEM;
  1041. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1042. dyn_clk_caps->bit_clk_list,
  1043. dyn_clk_caps->bit_clk_list_len);
  1044. if (rc) {
  1045. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1046. return -EINVAL;
  1047. }
  1048. dyn_clk_caps->dyn_clk_support = true;
  1049. type = utils->get_property(utils->data,
  1050. "qcom,dsi-dyn-clk-type", NULL);
  1051. if (!type) {
  1052. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1053. dyn_clk_caps->maintain_const_fps = false;
  1054. return 0;
  1055. }
  1056. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1057. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1058. dyn_clk_caps->maintain_const_fps = true;
  1059. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1060. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1061. dyn_clk_caps->maintain_const_fps = true;
  1062. } else {
  1063. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1064. dyn_clk_caps->maintain_const_fps = false;
  1065. }
  1066. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1067. return 0;
  1068. }
  1069. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1070. {
  1071. int rc = 0;
  1072. bool supported = false;
  1073. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1074. struct dsi_parser_utils *utils = &panel->utils;
  1075. const char *name = panel->name;
  1076. const char *type;
  1077. u32 i;
  1078. supported = utils->read_bool(utils->data,
  1079. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1080. if (!supported) {
  1081. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1082. dfps_caps->dfps_support = false;
  1083. return rc;
  1084. }
  1085. type = utils->get_property(utils->data,
  1086. "qcom,mdss-dsi-pan-fps-update", NULL);
  1087. if (!type) {
  1088. DSI_ERR("[%s] dfps type not defined\n", name);
  1089. rc = -EINVAL;
  1090. goto error;
  1091. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1092. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1093. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1094. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1095. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1096. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1097. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1098. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1099. } else {
  1100. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1101. rc = -EINVAL;
  1102. goto error;
  1103. }
  1104. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1105. "qcom,dsi-supported-dfps-list");
  1106. if (dfps_caps->dfps_list_len < 1) {
  1107. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1108. rc = -EINVAL;
  1109. goto error;
  1110. }
  1111. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1112. GFP_KERNEL);
  1113. if (!dfps_caps->dfps_list) {
  1114. rc = -ENOMEM;
  1115. goto error;
  1116. }
  1117. rc = utils->read_u32_array(utils->data,
  1118. "qcom,dsi-supported-dfps-list",
  1119. dfps_caps->dfps_list,
  1120. dfps_caps->dfps_list_len);
  1121. if (rc) {
  1122. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1123. rc = -EINVAL;
  1124. goto error;
  1125. }
  1126. dfps_caps->dfps_support = true;
  1127. /* calculate max and min fps */
  1128. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1129. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1130. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1131. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1132. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1133. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1134. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1135. }
  1136. error:
  1137. return rc;
  1138. }
  1139. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1140. struct dsi_parser_utils *utils,
  1141. const char *name)
  1142. {
  1143. int rc = 0;
  1144. const char *traffic_mode;
  1145. u32 vc_id = 0;
  1146. u32 val = 0;
  1147. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1148. if (rc) {
  1149. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1150. cfg->pulse_mode_hsa_he = false;
  1151. } else if (val == 1) {
  1152. cfg->pulse_mode_hsa_he = true;
  1153. } else if (val == 0) {
  1154. cfg->pulse_mode_hsa_he = false;
  1155. } else {
  1156. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1157. name);
  1158. rc = -EINVAL;
  1159. goto error;
  1160. }
  1161. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1162. "qcom,mdss-dsi-hfp-power-mode");
  1163. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1164. "qcom,mdss-dsi-hbp-power-mode");
  1165. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1166. "qcom,mdss-dsi-hsa-power-mode");
  1167. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1168. "qcom,mdss-dsi-last-line-interleave");
  1169. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1170. "qcom,mdss-dsi-bllp-eof-power-mode");
  1171. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1172. "qcom,mdss-dsi-bllp-power-mode");
  1173. traffic_mode = utils->get_property(utils->data,
  1174. "qcom,mdss-dsi-traffic-mode",
  1175. NULL);
  1176. if (!traffic_mode) {
  1177. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1178. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1179. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1180. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1181. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1182. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1183. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1184. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1185. } else {
  1186. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1187. traffic_mode);
  1188. rc = -EINVAL;
  1189. goto error;
  1190. }
  1191. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1192. &vc_id);
  1193. if (rc) {
  1194. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1195. cfg->vc_id = 0;
  1196. } else {
  1197. cfg->vc_id = vc_id;
  1198. }
  1199. error:
  1200. return rc;
  1201. }
  1202. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1203. struct dsi_parser_utils *utils,
  1204. const char *name)
  1205. {
  1206. u32 val = 0;
  1207. int rc = 0;
  1208. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1209. if (rc) {
  1210. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1211. cfg->wr_mem_start = 0x2C;
  1212. } else {
  1213. cfg->wr_mem_start = val;
  1214. }
  1215. val = 0;
  1216. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1217. &val);
  1218. if (rc) {
  1219. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1220. cfg->wr_mem_continue = 0x3C;
  1221. } else {
  1222. cfg->wr_mem_continue = val;
  1223. }
  1224. /* TODO: fix following */
  1225. cfg->max_cmd_packets_interleave = 0;
  1226. val = 0;
  1227. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1228. &val);
  1229. if (rc) {
  1230. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1231. cfg->insert_dcs_command = true;
  1232. } else if (val == 1) {
  1233. cfg->insert_dcs_command = true;
  1234. } else if (val == 0) {
  1235. cfg->insert_dcs_command = false;
  1236. } else {
  1237. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1238. name);
  1239. rc = -EINVAL;
  1240. goto error;
  1241. }
  1242. error:
  1243. return rc;
  1244. }
  1245. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1246. {
  1247. int rc = 0;
  1248. struct dsi_parser_utils *utils = &panel->utils;
  1249. bool panel_mode_switch_enabled;
  1250. enum dsi_op_mode panel_mode;
  1251. const char *mode;
  1252. mode = utils->get_property(utils->data,
  1253. "qcom,mdss-dsi-panel-type", NULL);
  1254. if (!mode) {
  1255. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1256. panel_mode = DSI_OP_VIDEO_MODE;
  1257. } else if (!strcmp(mode, "dsi_video_mode")) {
  1258. panel_mode = DSI_OP_VIDEO_MODE;
  1259. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1260. panel_mode = DSI_OP_CMD_MODE;
  1261. } else {
  1262. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1263. rc = -EINVAL;
  1264. goto error;
  1265. }
  1266. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1267. "qcom,mdss-dsi-panel-mode-switch");
  1268. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1269. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1270. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1271. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1272. utils,
  1273. panel->name);
  1274. if (rc) {
  1275. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1276. panel->name, rc);
  1277. goto error;
  1278. }
  1279. }
  1280. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1281. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1282. utils,
  1283. panel->name);
  1284. if (rc) {
  1285. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1286. panel->name, rc);
  1287. goto error;
  1288. }
  1289. }
  1290. panel->poms_align_vsync = utils->read_bool(utils->data,
  1291. "qcom,poms-align-panel-vsync");
  1292. panel->panel_mode = panel_mode;
  1293. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1294. error:
  1295. return rc;
  1296. }
  1297. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1298. {
  1299. int rc = 0;
  1300. u32 val = 0;
  1301. const char *str;
  1302. struct dsi_panel_phy_props *props = &panel->phy_props;
  1303. struct dsi_parser_utils *utils = &panel->utils;
  1304. const char *name = panel->name;
  1305. rc = utils->read_u32(utils->data,
  1306. "qcom,mdss-pan-physical-width-dimension", &val);
  1307. if (rc) {
  1308. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1309. props->panel_width_mm = 0;
  1310. rc = 0;
  1311. } else {
  1312. props->panel_width_mm = val;
  1313. }
  1314. rc = utils->read_u32(utils->data,
  1315. "qcom,mdss-pan-physical-height-dimension",
  1316. &val);
  1317. if (rc) {
  1318. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1319. props->panel_height_mm = 0;
  1320. rc = 0;
  1321. } else {
  1322. props->panel_height_mm = val;
  1323. }
  1324. str = utils->get_property(utils->data,
  1325. "qcom,mdss-dsi-panel-orientation", NULL);
  1326. if (!str) {
  1327. props->rotation = DSI_PANEL_ROTATE_NONE;
  1328. } else if (!strcmp(str, "180")) {
  1329. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1330. } else if (!strcmp(str, "hflip")) {
  1331. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1332. } else if (!strcmp(str, "vflip")) {
  1333. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1334. } else {
  1335. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1336. rc = -EINVAL;
  1337. goto error;
  1338. }
  1339. error:
  1340. return rc;
  1341. }
  1342. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1343. "qcom,mdss-dsi-pre-on-command",
  1344. "qcom,mdss-dsi-on-command",
  1345. "qcom,mdss-dsi-post-panel-on-command",
  1346. "qcom,mdss-dsi-pre-off-command",
  1347. "qcom,mdss-dsi-off-command",
  1348. "qcom,mdss-dsi-post-off-command",
  1349. "qcom,mdss-dsi-pre-res-switch",
  1350. "qcom,mdss-dsi-res-switch",
  1351. "qcom,mdss-dsi-post-res-switch",
  1352. "qcom,cmd-to-video-mode-switch-commands",
  1353. "qcom,cmd-to-video-mode-post-switch-commands",
  1354. "qcom,video-to-cmd-mode-switch-commands",
  1355. "qcom,video-to-cmd-mode-post-switch-commands",
  1356. "qcom,mdss-dsi-panel-status-command",
  1357. "qcom,mdss-dsi-lp1-command",
  1358. "qcom,mdss-dsi-lp2-command",
  1359. "qcom,mdss-dsi-nolp-command",
  1360. "PPS not parsed from DTSI, generated dynamically",
  1361. "ROI not parsed from DTSI, generated dynamically",
  1362. "qcom,mdss-dsi-timing-switch-command",
  1363. "qcom,mdss-dsi-post-mode-switch-on-command",
  1364. "qcom,mdss-dsi-qsync-on-commands",
  1365. "qcom,mdss-dsi-qsync-off-commands",
  1366. };
  1367. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1368. "qcom,mdss-dsi-pre-on-command-state",
  1369. "qcom,mdss-dsi-on-command-state",
  1370. "qcom,mdss-dsi-post-on-command-state",
  1371. "qcom,mdss-dsi-pre-off-command-state",
  1372. "qcom,mdss-dsi-off-command-state",
  1373. "qcom,mdss-dsi-post-off-command-state",
  1374. "qcom,mdss-dsi-pre-res-switch-state",
  1375. "qcom,mdss-dsi-res-switch-state",
  1376. "qcom,mdss-dsi-post-res-switch-state",
  1377. "qcom,cmd-to-video-mode-switch-commands-state",
  1378. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1379. "qcom,video-to-cmd-mode-switch-commands-state",
  1380. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1381. "qcom,mdss-dsi-panel-status-command-state",
  1382. "qcom,mdss-dsi-lp1-command-state",
  1383. "qcom,mdss-dsi-lp2-command-state",
  1384. "qcom,mdss-dsi-nolp-command-state",
  1385. "PPS not parsed from DTSI, generated dynamically",
  1386. "ROI not parsed from DTSI, generated dynamically",
  1387. "qcom,mdss-dsi-timing-switch-command-state",
  1388. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1389. "qcom,mdss-dsi-qsync-on-commands-state",
  1390. "qcom,mdss-dsi-qsync-off-commands-state",
  1391. };
  1392. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1393. {
  1394. const u32 cmd_set_min_size = 7;
  1395. u32 count = 0;
  1396. u32 packet_length;
  1397. u32 tmp;
  1398. while (length >= cmd_set_min_size) {
  1399. packet_length = cmd_set_min_size;
  1400. tmp = ((data[5] << 8) | (data[6]));
  1401. packet_length += tmp;
  1402. if (packet_length > length) {
  1403. DSI_ERR("format error\n");
  1404. return -EINVAL;
  1405. }
  1406. length -= packet_length;
  1407. data += packet_length;
  1408. count++;
  1409. }
  1410. *cnt = count;
  1411. return 0;
  1412. }
  1413. static int dsi_panel_create_cmd_packets(const char *data,
  1414. u32 length,
  1415. u32 count,
  1416. struct dsi_cmd_desc *cmd)
  1417. {
  1418. int rc = 0;
  1419. int i, j;
  1420. u8 *payload;
  1421. for (i = 0; i < count; i++) {
  1422. u32 size;
  1423. cmd[i].msg.type = data[0];
  1424. cmd[i].last_command = (data[1] == 1);
  1425. cmd[i].msg.channel = data[2];
  1426. cmd[i].msg.flags |= data[3];
  1427. cmd[i].msg.ctrl = 0;
  1428. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1429. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1430. size = cmd[i].msg.tx_len * sizeof(u8);
  1431. payload = kzalloc(size, GFP_KERNEL);
  1432. if (!payload) {
  1433. rc = -ENOMEM;
  1434. goto error_free_payloads;
  1435. }
  1436. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1437. payload[j] = data[7 + j];
  1438. cmd[i].msg.tx_buf = payload;
  1439. data += (7 + cmd[i].msg.tx_len);
  1440. }
  1441. return rc;
  1442. error_free_payloads:
  1443. for (i = i - 1; i >= 0; i--) {
  1444. cmd--;
  1445. kfree(cmd->msg.tx_buf);
  1446. }
  1447. return rc;
  1448. }
  1449. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1450. {
  1451. u32 i = 0;
  1452. struct dsi_cmd_desc *cmd;
  1453. for (i = 0; i < set->count; i++) {
  1454. cmd = &set->cmds[i];
  1455. kfree(cmd->msg.tx_buf);
  1456. }
  1457. }
  1458. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1459. {
  1460. kfree(set->cmds);
  1461. }
  1462. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1463. u32 packet_count)
  1464. {
  1465. u32 size;
  1466. size = packet_count * sizeof(*cmd->cmds);
  1467. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1468. if (!cmd->cmds)
  1469. return -ENOMEM;
  1470. cmd->count = packet_count;
  1471. return 0;
  1472. }
  1473. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1474. enum dsi_cmd_set_type type,
  1475. struct dsi_parser_utils *utils)
  1476. {
  1477. int rc = 0;
  1478. u32 length = 0;
  1479. const char *data;
  1480. const char *state;
  1481. u32 packet_count = 0;
  1482. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1483. &length);
  1484. if (!data) {
  1485. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1486. rc = -ENOTSUPP;
  1487. goto error;
  1488. }
  1489. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1490. cmd_set_prop_map[type], length);
  1491. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1492. 8, 1, data, length, false);
  1493. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1494. if (rc) {
  1495. DSI_ERR("commands failed, rc=%d\n", rc);
  1496. goto error;
  1497. }
  1498. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1499. packet_count, length);
  1500. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1501. if (rc) {
  1502. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1503. goto error;
  1504. }
  1505. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1506. cmd->cmds);
  1507. if (rc) {
  1508. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1509. goto error_free_mem;
  1510. }
  1511. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1512. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1513. cmd->state = DSI_CMD_SET_STATE_LP;
  1514. } else if (!strcmp(state, "dsi_hs_mode")) {
  1515. cmd->state = DSI_CMD_SET_STATE_HS;
  1516. } else {
  1517. DSI_ERR("[%s] command state unrecognized-%s\n",
  1518. cmd_set_state_map[type], state);
  1519. goto error_free_mem;
  1520. }
  1521. return rc;
  1522. error_free_mem:
  1523. kfree(cmd->cmds);
  1524. cmd->cmds = NULL;
  1525. error:
  1526. return rc;
  1527. }
  1528. static int dsi_panel_parse_cmd_sets(
  1529. struct dsi_display_mode_priv_info *priv_info,
  1530. struct dsi_parser_utils *utils)
  1531. {
  1532. int rc = 0;
  1533. struct dsi_panel_cmd_set *set;
  1534. u32 i;
  1535. if (!priv_info) {
  1536. DSI_ERR("invalid mode priv info\n");
  1537. return -EINVAL;
  1538. }
  1539. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1540. set = &priv_info->cmd_sets[i];
  1541. set->type = i;
  1542. set->count = 0;
  1543. if (i == DSI_CMD_SET_PPS) {
  1544. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1545. if (rc)
  1546. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1547. i, rc);
  1548. set->state = DSI_CMD_SET_STATE_LP;
  1549. } else {
  1550. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1551. if (rc)
  1552. DSI_DEBUG("failed to parse set %d\n", i);
  1553. }
  1554. }
  1555. rc = 0;
  1556. return rc;
  1557. }
  1558. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1559. {
  1560. int rc = 0;
  1561. int i;
  1562. u32 length = 0;
  1563. u32 count = 0;
  1564. u32 size = 0;
  1565. u32 *arr_32 = NULL;
  1566. const u32 *arr;
  1567. struct dsi_parser_utils *utils = &panel->utils;
  1568. struct dsi_reset_seq *seq;
  1569. if (panel->host_config.ext_bridge_mode)
  1570. return 0;
  1571. arr = utils->get_property(utils->data,
  1572. "qcom,mdss-dsi-reset-sequence", &length);
  1573. if (!arr) {
  1574. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1575. rc = -EINVAL;
  1576. goto error;
  1577. }
  1578. if (length & 0x1) {
  1579. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1580. panel->name);
  1581. rc = -EINVAL;
  1582. goto error;
  1583. }
  1584. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1585. length = length / sizeof(u32);
  1586. size = length * sizeof(u32);
  1587. arr_32 = kzalloc(size, GFP_KERNEL);
  1588. if (!arr_32) {
  1589. rc = -ENOMEM;
  1590. goto error;
  1591. }
  1592. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1593. arr_32, length);
  1594. if (rc) {
  1595. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1596. goto error_free_arr_32;
  1597. }
  1598. count = length / 2;
  1599. size = count * sizeof(*seq);
  1600. seq = kzalloc(size, GFP_KERNEL);
  1601. if (!seq) {
  1602. rc = -ENOMEM;
  1603. goto error_free_arr_32;
  1604. }
  1605. panel->reset_config.sequence = seq;
  1606. panel->reset_config.count = count;
  1607. for (i = 0; i < length; i += 2) {
  1608. seq->level = arr_32[i];
  1609. seq->sleep_ms = arr_32[i + 1];
  1610. seq++;
  1611. }
  1612. error_free_arr_32:
  1613. kfree(arr_32);
  1614. error:
  1615. return rc;
  1616. }
  1617. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1618. {
  1619. struct dsi_parser_utils *utils = &panel->utils;
  1620. const char *string;
  1621. int i, rc = 0;
  1622. panel->ulps_feature_enabled =
  1623. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1624. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1625. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1626. panel->ulps_suspend_enabled =
  1627. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1628. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1629. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1630. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1631. "qcom,mdss-dsi-te-using-wd");
  1632. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1633. "qcom,cmd-sync-wait-broadcast");
  1634. panel->lp11_init = utils->read_bool(utils->data,
  1635. "qcom,mdss-dsi-lp11-init");
  1636. panel->spr_info.enable = false;
  1637. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1638. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1639. if (!rc) {
  1640. // find match for pack-type string
  1641. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1642. if (msm_spr_pack_type_str[i] &&
  1643. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1644. panel->spr_info.enable = true;
  1645. panel->spr_info.pack_type = i;
  1646. break;
  1647. }
  1648. }
  1649. }
  1650. pr_debug("%s source side spr packing, pack-type %s\n",
  1651. panel->spr_info.enable ? "enable" : "disable",
  1652. panel->spr_info.enable ?
  1653. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1654. return 0;
  1655. }
  1656. static int dsi_panel_parse_jitter_config(
  1657. struct dsi_display_mode *mode,
  1658. struct dsi_parser_utils *utils)
  1659. {
  1660. int rc;
  1661. struct dsi_display_mode_priv_info *priv_info;
  1662. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1663. u64 jitter_val = 0;
  1664. priv_info = mode->priv_info;
  1665. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1666. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1667. if (rc) {
  1668. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1669. } else {
  1670. jitter_val = jitter[0];
  1671. jitter_val = div_u64(jitter_val, jitter[1]);
  1672. }
  1673. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1674. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1675. priv_info->panel_jitter_denom =
  1676. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1677. } else {
  1678. priv_info->panel_jitter_numer = jitter[0];
  1679. priv_info->panel_jitter_denom = jitter[1];
  1680. }
  1681. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1682. &priv_info->panel_prefill_lines);
  1683. if (rc) {
  1684. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1685. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1686. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1687. } else if (priv_info->panel_prefill_lines >=
  1688. DSI_V_TOTAL(&mode->timing)) {
  1689. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1690. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1691. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1692. }
  1693. return 0;
  1694. }
  1695. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1696. {
  1697. int rc = 0;
  1698. char *supply_name;
  1699. if (panel->host_config.ext_bridge_mode)
  1700. return 0;
  1701. if (!strcmp(panel->type, "primary"))
  1702. supply_name = "qcom,panel-supply-entries";
  1703. else
  1704. supply_name = "qcom,panel-sec-supply-entries";
  1705. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1706. &panel->power_info, supply_name);
  1707. if (rc) {
  1708. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1709. goto error;
  1710. }
  1711. error:
  1712. return rc;
  1713. }
  1714. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1715. {
  1716. int rc = 0;
  1717. const char *data;
  1718. struct dsi_parser_utils *utils = &panel->utils;
  1719. char *reset_gpio_name, *mode_set_gpio_name;
  1720. if (!strcmp(panel->type, "primary")) {
  1721. reset_gpio_name = "qcom,platform-reset-gpio";
  1722. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1723. } else {
  1724. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1725. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1726. }
  1727. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1728. reset_gpio_name, 0);
  1729. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1730. !panel->host_config.ext_bridge_mode) {
  1731. rc = panel->reset_config.reset_gpio;
  1732. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1733. goto error;
  1734. }
  1735. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1736. "qcom,5v-boost-gpio",
  1737. 0);
  1738. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1739. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1740. panel->name, rc);
  1741. panel->reset_config.disp_en_gpio =
  1742. utils->get_named_gpio(utils->data,
  1743. "qcom,platform-en-gpio", 0);
  1744. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1745. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1746. panel->name, rc);
  1747. }
  1748. }
  1749. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1750. utils->data, mode_set_gpio_name, 0);
  1751. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1752. DSI_DEBUG("mode gpio not specified\n");
  1753. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1754. data = utils->get_property(utils->data,
  1755. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1756. if (data) {
  1757. if (!strcmp(data, "single_port"))
  1758. panel->reset_config.mode_sel_state =
  1759. MODE_SEL_SINGLE_PORT;
  1760. else if (!strcmp(data, "dual_port"))
  1761. panel->reset_config.mode_sel_state =
  1762. MODE_SEL_DUAL_PORT;
  1763. else if (!strcmp(data, "high"))
  1764. panel->reset_config.mode_sel_state =
  1765. MODE_GPIO_HIGH;
  1766. else if (!strcmp(data, "low"))
  1767. panel->reset_config.mode_sel_state =
  1768. MODE_GPIO_LOW;
  1769. } else {
  1770. /* Set default mode as SPLIT mode */
  1771. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1772. }
  1773. /* TODO: release memory */
  1774. rc = dsi_panel_parse_reset_sequence(panel);
  1775. if (rc) {
  1776. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1777. panel->name, rc);
  1778. goto error;
  1779. }
  1780. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1781. "qcom,mdss-dsi-panel-test-pin",
  1782. 0);
  1783. if (!gpio_is_valid(panel->panel_test_gpio))
  1784. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1785. __LINE__);
  1786. error:
  1787. return rc;
  1788. }
  1789. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1790. {
  1791. int rc = 0;
  1792. u32 val;
  1793. struct dsi_backlight_config *config = &panel->bl_config;
  1794. struct dsi_parser_utils *utils = &panel->utils;
  1795. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1796. &val);
  1797. if (rc) {
  1798. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1799. goto error;
  1800. }
  1801. config->pwm_period_usecs = val;
  1802. error:
  1803. return rc;
  1804. }
  1805. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1806. {
  1807. int rc = 0;
  1808. u32 val = 0;
  1809. const char *bl_type;
  1810. const char *data;
  1811. struct dsi_parser_utils *utils = &panel->utils;
  1812. char *bl_name;
  1813. if (!strcmp(panel->type, "primary"))
  1814. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1815. else
  1816. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1817. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1818. if (!bl_type) {
  1819. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1820. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1821. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1822. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1823. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1824. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1825. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1826. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1827. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1828. } else {
  1829. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1830. panel->name, bl_type);
  1831. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1832. }
  1833. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1834. if (!data) {
  1835. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1836. } else if (!strcmp(data, "delay_until_first_frame")) {
  1837. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1838. } else {
  1839. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1840. panel->name, data);
  1841. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1842. }
  1843. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1844. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1845. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1846. if (rc) {
  1847. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1848. panel->name);
  1849. panel->bl_config.bl_min_level = 0;
  1850. } else {
  1851. panel->bl_config.bl_min_level = val;
  1852. }
  1853. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1854. if (rc) {
  1855. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1856. panel->name);
  1857. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1858. } else {
  1859. panel->bl_config.bl_max_level = val;
  1860. }
  1861. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1862. &val);
  1863. if (rc) {
  1864. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1865. panel->name);
  1866. panel->bl_config.brightness_max_level = 255;
  1867. rc = 0;
  1868. } else {
  1869. panel->bl_config.brightness_max_level = val;
  1870. }
  1871. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  1872. "qcom,mdss-dsi-bl-inverted-dbv");
  1873. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1874. rc = dsi_panel_parse_bl_pwm_config(panel);
  1875. if (rc) {
  1876. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1877. panel->name, rc);
  1878. goto error;
  1879. }
  1880. }
  1881. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1882. "qcom,platform-bklight-en-gpio",
  1883. 0);
  1884. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1885. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1886. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1887. panel->name, rc);
  1888. rc = -EPROBE_DEFER;
  1889. goto error;
  1890. } else {
  1891. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1892. panel->name, rc);
  1893. rc = 0;
  1894. goto error;
  1895. }
  1896. }
  1897. error:
  1898. return rc;
  1899. }
  1900. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1901. struct dsi_parser_utils *utils)
  1902. {
  1903. const char *data;
  1904. u32 len, i;
  1905. int rc = 0;
  1906. struct dsi_display_mode_priv_info *priv_info;
  1907. u64 pixel_clk_khz;
  1908. if (!mode || !mode->priv_info)
  1909. return -EINVAL;
  1910. priv_info = mode->priv_info;
  1911. data = utils->get_property(utils->data,
  1912. "qcom,mdss-dsi-panel-phy-timings", &len);
  1913. if (!data) {
  1914. DSI_DEBUG("Unable to read Phy timing settings\n");
  1915. } else {
  1916. priv_info->phy_timing_val =
  1917. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1918. if (!priv_info->phy_timing_val)
  1919. return -EINVAL;
  1920. for (i = 0; i < len; i++)
  1921. priv_info->phy_timing_val[i] = data[i];
  1922. priv_info->phy_timing_len = len;
  1923. }
  1924. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  1925. /*
  1926. * For command mode we update the pclk as part of
  1927. * function dsi_panel_calc_dsi_transfer_time( )
  1928. * as we set it based on dsi clock or mdp transfer time.
  1929. */
  1930. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  1931. DSI_V_TOTAL(&mode->timing) *
  1932. mode->timing.refresh_rate);
  1933. do_div(pixel_clk_khz, 1000);
  1934. mode->pixel_clk_khz = pixel_clk_khz;
  1935. }
  1936. return rc;
  1937. }
  1938. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1939. struct dsi_parser_utils *utils)
  1940. {
  1941. u32 data;
  1942. int rc = -EINVAL;
  1943. int intf_width;
  1944. const char *compression;
  1945. struct dsi_display_mode_priv_info *priv_info;
  1946. if (!mode || !mode->priv_info)
  1947. return -EINVAL;
  1948. priv_info = mode->priv_info;
  1949. priv_info->dsc_enabled = false;
  1950. compression = utils->get_property(utils->data,
  1951. "qcom,compression-mode", NULL);
  1952. if (compression && !strcmp(compression, "dsc"))
  1953. priv_info->dsc_enabled = true;
  1954. if (!priv_info->dsc_enabled) {
  1955. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  1956. return 0;
  1957. }
  1958. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1959. if (rc) {
  1960. priv_info->dsc.config.dsc_version_major = 0x1;
  1961. priv_info->dsc.config.dsc_version_minor = 0x1;
  1962. rc = 0;
  1963. } else {
  1964. /* BITS[0..3] provides minor version and BITS[4..7] provide
  1965. * major version information
  1966. */
  1967. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  1968. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  1969. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  1970. ((priv_info->dsc.config.dsc_version_minor
  1971. != 0x1) ||
  1972. (priv_info->dsc.config.dsc_version_minor
  1973. != 0x2))) {
  1974. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  1975. __func__,
  1976. priv_info->dsc.config.dsc_version_major,
  1977. priv_info->dsc.config.dsc_version_minor
  1978. );
  1979. rc = -EINVAL;
  1980. goto error;
  1981. }
  1982. }
  1983. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1984. if (rc) {
  1985. priv_info->dsc.scr_rev = 0x0;
  1986. rc = 0;
  1987. } else {
  1988. priv_info->dsc.scr_rev = data & 0xff;
  1989. /* only one scr rev supported */
  1990. if (priv_info->dsc.scr_rev > 0x1) {
  1991. DSI_ERR("%s: DSC scr version:%d not supported\n",
  1992. __func__, priv_info->dsc.scr_rev);
  1993. rc = -EINVAL;
  1994. goto error;
  1995. }
  1996. }
  1997. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1998. if (rc) {
  1999. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2000. goto error;
  2001. }
  2002. priv_info->dsc.config.slice_height = data;
  2003. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2004. if (rc) {
  2005. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2006. goto error;
  2007. }
  2008. priv_info->dsc.config.slice_width = data;
  2009. intf_width = mode->timing.h_active;
  2010. if (intf_width % priv_info->dsc.config.slice_width) {
  2011. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2012. intf_width, priv_info->dsc.config.slice_width);
  2013. rc = -EINVAL;
  2014. goto error;
  2015. }
  2016. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2017. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2018. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2019. if (rc) {
  2020. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2021. goto error;
  2022. } else if (!data || (data > 2)) {
  2023. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2024. goto error;
  2025. }
  2026. priv_info->dsc.slice_per_pkt = data;
  2027. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2028. &data);
  2029. if (rc) {
  2030. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2031. goto error;
  2032. }
  2033. priv_info->dsc.config.bits_per_component = data;
  2034. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2035. if (rc) {
  2036. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2037. data = 0;
  2038. }
  2039. priv_info->dsc.pps_delay_ms = data;
  2040. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2041. &data);
  2042. if (rc) {
  2043. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2044. goto error;
  2045. }
  2046. priv_info->dsc.config.bits_per_pixel = data << 4;
  2047. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2048. &data);
  2049. if (rc) {
  2050. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2051. rc = 0;
  2052. data = MSM_CHROMA_444;
  2053. }
  2054. priv_info->dsc.chroma_format = data;
  2055. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2056. &data);
  2057. if (rc) {
  2058. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2059. rc = 0;
  2060. data = MSM_RGB;
  2061. }
  2062. priv_info->dsc.source_color_space = data;
  2063. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2064. "qcom,mdss-dsc-block-prediction-enable");
  2065. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2066. priv_info->dsc.config.slice_width);
  2067. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2068. priv_info->dsc.scr_rev);
  2069. if (rc) {
  2070. DSI_DEBUG("failed populating dsc params\n");
  2071. rc = -EINVAL;
  2072. goto error;
  2073. }
  2074. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2075. if (rc) {
  2076. DSI_DEBUG("failed populating other dsc params\n");
  2077. rc = -EINVAL;
  2078. goto error;
  2079. }
  2080. priv_info->pclk_scale.numer =
  2081. priv_info->dsc.config.bits_per_pixel >> 4;
  2082. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2083. priv_info->dsc.chroma_format,
  2084. priv_info->dsc.config.bits_per_component);
  2085. mode->timing.dsc_enabled = true;
  2086. mode->timing.dsc = &priv_info->dsc;
  2087. mode->timing.pclk_scale = priv_info->pclk_scale;
  2088. error:
  2089. return rc;
  2090. }
  2091. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2092. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2093. {
  2094. u32 data;
  2095. int rc = -EINVAL;
  2096. const char *compression;
  2097. struct dsi_display_mode_priv_info *priv_info;
  2098. int intf_width;
  2099. if (!mode || !mode->priv_info)
  2100. return -EINVAL;
  2101. priv_info = mode->priv_info;
  2102. priv_info->vdc_enabled = false;
  2103. compression = utils->get_property(utils->data,
  2104. "qcom,compression-mode", NULL);
  2105. if (compression && !strcmp(compression, "vdc"))
  2106. priv_info->vdc_enabled = true;
  2107. if (!priv_info->vdc_enabled) {
  2108. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2109. return 0;
  2110. }
  2111. priv_info->vdc.panel_mode = panel_mode;
  2112. priv_info->vdc.traffic_mode = traffic_mode;
  2113. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2114. if (rc) {
  2115. priv_info->vdc.version_major = 0x1;
  2116. priv_info->vdc.version_minor = 0x2;
  2117. priv_info->vdc.version_release = 0x0;
  2118. rc = 0;
  2119. } else {
  2120. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2121. * major version information
  2122. */
  2123. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2124. priv_info->vdc.version_minor = data & 0x0F;
  2125. if ((priv_info->vdc.version_major != 0x1) &&
  2126. ((priv_info->vdc.version_minor
  2127. != 0x2))) {
  2128. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2129. __func__,
  2130. priv_info->vdc.version_major,
  2131. priv_info->vdc.version_minor
  2132. );
  2133. rc = -EINVAL;
  2134. goto error;
  2135. }
  2136. }
  2137. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2138. if (rc) {
  2139. priv_info->vdc.version_release = 0x0;
  2140. rc = 0;
  2141. } else {
  2142. priv_info->vdc.version_release = data & 0xff;
  2143. /* only one release version is supported */
  2144. if (priv_info->vdc.version_release != 0x0) {
  2145. DSI_ERR("unsupported vdc release version %d\n",
  2146. priv_info->vdc.version_release);
  2147. rc = -EINVAL;
  2148. goto error;
  2149. }
  2150. }
  2151. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2152. priv_info->vdc.version_major,
  2153. priv_info->vdc.version_minor,
  2154. priv_info->vdc.version_release);
  2155. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2156. if (rc) {
  2157. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2158. goto error;
  2159. }
  2160. priv_info->vdc.slice_height = data;
  2161. /* slice height should be atleast 16 lines */
  2162. if (priv_info->vdc.slice_height < 16) {
  2163. DSI_ERR("invalid slice height %d\n",
  2164. priv_info->vdc.slice_height);
  2165. rc = -EINVAL;
  2166. goto error;
  2167. }
  2168. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2169. if (rc) {
  2170. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2171. goto error;
  2172. }
  2173. priv_info->vdc.slice_width = data;
  2174. /*
  2175. * slide-width should be multiple of 8
  2176. * slice-width should be atlease 64 pixels
  2177. */
  2178. if ((priv_info->vdc.slice_width & 7) ||
  2179. (priv_info->vdc.slice_width < 64)) {
  2180. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2181. rc = -EINVAL;
  2182. goto error;
  2183. }
  2184. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2185. if (rc) {
  2186. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2187. goto error;
  2188. } else if (!data || (data > 2)) {
  2189. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2190. rc = -EINVAL;
  2191. goto error;
  2192. }
  2193. intf_width = mode->timing.h_active;
  2194. priv_info->vdc.slice_per_pkt = data;
  2195. priv_info->vdc.frame_width = mode->timing.h_active;
  2196. priv_info->vdc.frame_height = mode->timing.v_active;
  2197. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2198. &data);
  2199. if (rc) {
  2200. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2201. goto error;
  2202. }
  2203. priv_info->vdc.bits_per_component = data;
  2204. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2205. if (rc) {
  2206. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2207. data = 0;
  2208. }
  2209. priv_info->vdc.pps_delay_ms = data;
  2210. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2211. &data);
  2212. if (rc) {
  2213. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2214. goto error;
  2215. }
  2216. priv_info->vdc.bits_per_pixel = data << 4;
  2217. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2218. &data);
  2219. if (rc) {
  2220. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2221. rc = 0;
  2222. data = MSM_CHROMA_444;
  2223. }
  2224. priv_info->vdc.chroma_format = data;
  2225. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2226. &data);
  2227. if (rc) {
  2228. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2229. rc = 0;
  2230. data = MSM_RGB;
  2231. }
  2232. priv_info->vdc.source_color_space = data;
  2233. rc = sde_vdc_populate_config(&priv_info->vdc,
  2234. intf_width, traffic_mode);
  2235. if (rc) {
  2236. DSI_DEBUG("failed populating vdc config\n");
  2237. rc = -EINVAL;
  2238. goto error;
  2239. }
  2240. priv_info->pclk_scale.numer =
  2241. priv_info->vdc.bits_per_pixel >> 4;
  2242. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2243. priv_info->vdc.chroma_format,
  2244. priv_info->vdc.bits_per_component);
  2245. mode->timing.vdc_enabled = true;
  2246. mode->timing.vdc = &priv_info->vdc;
  2247. mode->timing.pclk_scale = priv_info->pclk_scale;
  2248. error:
  2249. return rc;
  2250. }
  2251. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2252. {
  2253. int rc = 0;
  2254. struct drm_panel_hdr_properties *hdr_prop;
  2255. struct dsi_parser_utils *utils = &panel->utils;
  2256. hdr_prop = &panel->hdr_props;
  2257. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2258. "qcom,mdss-dsi-panel-hdr-enabled");
  2259. if (hdr_prop->hdr_enabled) {
  2260. rc = utils->read_u32_array(utils->data,
  2261. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2262. hdr_prop->display_primaries,
  2263. DISPLAY_PRIMARIES_MAX);
  2264. if (rc) {
  2265. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2266. __func__, __LINE__, rc);
  2267. hdr_prop->hdr_enabled = false;
  2268. return rc;
  2269. }
  2270. rc = utils->read_u32(utils->data,
  2271. "qcom,mdss-dsi-panel-peak-brightness",
  2272. &(hdr_prop->peak_brightness));
  2273. if (rc) {
  2274. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2275. __func__, __LINE__, rc);
  2276. hdr_prop->hdr_enabled = false;
  2277. return rc;
  2278. }
  2279. rc = utils->read_u32(utils->data,
  2280. "qcom,mdss-dsi-panel-blackness-level",
  2281. &(hdr_prop->blackness_level));
  2282. if (rc) {
  2283. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2284. __func__, __LINE__, rc);
  2285. hdr_prop->hdr_enabled = false;
  2286. return rc;
  2287. }
  2288. }
  2289. return 0;
  2290. }
  2291. static int dsi_panel_parse_topology(
  2292. struct dsi_display_mode_priv_info *priv_info,
  2293. struct dsi_parser_utils *utils,
  2294. int topology_override)
  2295. {
  2296. struct msm_display_topology *topology;
  2297. u32 top_count, top_sel, *array = NULL;
  2298. int i, len = 0;
  2299. int rc = -EINVAL;
  2300. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2301. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2302. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2303. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2304. return rc;
  2305. }
  2306. top_count = len / TOPOLOGY_SET_LEN;
  2307. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2308. if (!array)
  2309. return -ENOMEM;
  2310. rc = utils->read_u32_array(utils->data,
  2311. "qcom,display-topology", array, len);
  2312. if (rc) {
  2313. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2314. goto read_fail;
  2315. }
  2316. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2317. if (!topology) {
  2318. rc = -ENOMEM;
  2319. goto read_fail;
  2320. }
  2321. for (i = 0; i < top_count; i++) {
  2322. struct msm_display_topology *top = &topology[i];
  2323. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2324. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2325. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2326. }
  2327. if (topology_override >= 0 && topology_override < top_count) {
  2328. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2329. topology_override,
  2330. topology[topology_override].num_lm,
  2331. topology[topology_override].num_enc,
  2332. topology[topology_override].num_intf);
  2333. top_sel = topology_override;
  2334. goto parse_done;
  2335. }
  2336. rc = utils->read_u32(utils->data,
  2337. "qcom,default-topology-index", &top_sel);
  2338. if (rc) {
  2339. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2340. goto parse_fail;
  2341. }
  2342. if (top_sel >= top_count) {
  2343. rc = -EINVAL;
  2344. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2345. rc);
  2346. goto parse_fail;
  2347. }
  2348. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2349. topology[top_sel].num_lm,
  2350. topology[top_sel].num_enc,
  2351. topology[top_sel].num_intf);
  2352. parse_done:
  2353. memcpy(&priv_info->topology, &topology[top_sel],
  2354. sizeof(struct msm_display_topology));
  2355. parse_fail:
  2356. kfree(topology);
  2357. read_fail:
  2358. kfree(array);
  2359. return rc;
  2360. }
  2361. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2362. struct msm_roi_alignment *align)
  2363. {
  2364. int len = 0, rc = 0;
  2365. u32 value[6];
  2366. struct property *data;
  2367. if (!align)
  2368. return -EINVAL;
  2369. memset(align, 0, sizeof(*align));
  2370. data = utils->find_property(utils->data,
  2371. "qcom,panel-roi-alignment", &len);
  2372. len /= sizeof(u32);
  2373. if (!data) {
  2374. DSI_ERR("panel roi alignment not found\n");
  2375. rc = -EINVAL;
  2376. } else if (len != 6) {
  2377. DSI_ERR("incorrect roi alignment len %d\n", len);
  2378. rc = -EINVAL;
  2379. } else {
  2380. rc = utils->read_u32_array(utils->data,
  2381. "qcom,panel-roi-alignment", value, len);
  2382. if (rc)
  2383. DSI_DEBUG("error reading panel roi alignment values\n");
  2384. else {
  2385. align->xstart_pix_align = value[0];
  2386. align->ystart_pix_align = value[1];
  2387. align->width_pix_align = value[2];
  2388. align->height_pix_align = value[3];
  2389. align->min_width = value[4];
  2390. align->min_height = value[5];
  2391. }
  2392. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2393. align->xstart_pix_align,
  2394. align->width_pix_align,
  2395. align->ystart_pix_align,
  2396. align->height_pix_align,
  2397. align->min_width,
  2398. align->min_height);
  2399. }
  2400. return rc;
  2401. }
  2402. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2403. struct dsi_parser_utils *utils)
  2404. {
  2405. struct msm_roi_caps *roi_caps = NULL;
  2406. const char *data;
  2407. int rc = 0;
  2408. if (!mode || !mode->priv_info) {
  2409. DSI_ERR("invalid arguments\n");
  2410. return -EINVAL;
  2411. }
  2412. roi_caps = &mode->priv_info->roi_caps;
  2413. memset(roi_caps, 0, sizeof(*roi_caps));
  2414. data = utils->get_property(utils->data,
  2415. "qcom,partial-update-enabled", NULL);
  2416. if (data) {
  2417. if (!strcmp(data, "dual_roi"))
  2418. roi_caps->num_roi = 2;
  2419. else if (!strcmp(data, "single_roi"))
  2420. roi_caps->num_roi = 1;
  2421. else {
  2422. DSI_INFO(
  2423. "invalid value for qcom,partial-update-enabled: %s\n",
  2424. data);
  2425. return 0;
  2426. }
  2427. } else {
  2428. DSI_DEBUG("partial update disabled as the property is not set\n");
  2429. return 0;
  2430. }
  2431. roi_caps->merge_rois = utils->read_bool(utils->data,
  2432. "qcom,partial-update-roi-merge");
  2433. roi_caps->enabled = roi_caps->num_roi > 0;
  2434. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2435. roi_caps->enabled);
  2436. if (roi_caps->enabled)
  2437. rc = dsi_panel_parse_roi_alignment(utils,
  2438. &roi_caps->align);
  2439. if (rc)
  2440. memset(roi_caps, 0, sizeof(*roi_caps));
  2441. return rc;
  2442. }
  2443. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2444. struct dsi_parser_utils *utils)
  2445. {
  2446. bool vid_mode_support, cmd_mode_support;
  2447. if (!mode || !mode->priv_info) {
  2448. DSI_ERR("invalid arguments\n");
  2449. return -EINVAL;
  2450. }
  2451. vid_mode_support = utils->read_bool(utils->data,
  2452. "qcom,mdss-dsi-video-mode");
  2453. cmd_mode_support = utils->read_bool(utils->data,
  2454. "qcom,mdss-dsi-cmd-mode");
  2455. if (cmd_mode_support)
  2456. mode->panel_mode = DSI_OP_CMD_MODE;
  2457. else if (vid_mode_support)
  2458. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2459. else
  2460. return -EINVAL;
  2461. return 0;
  2462. };
  2463. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2464. {
  2465. int dms_enabled;
  2466. const char *data;
  2467. struct dsi_parser_utils *utils = &panel->utils;
  2468. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2469. dms_enabled = utils->read_bool(utils->data,
  2470. "qcom,dynamic-mode-switch-enabled");
  2471. if (!dms_enabled)
  2472. return 0;
  2473. data = utils->get_property(utils->data,
  2474. "qcom,dynamic-mode-switch-type", NULL);
  2475. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2476. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2477. } else {
  2478. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2479. panel->name, data);
  2480. return -EINVAL;
  2481. }
  2482. return 0;
  2483. };
  2484. /*
  2485. * The length of all the valid values to be checked should not be greater
  2486. * than the length of returned data from read command.
  2487. */
  2488. static bool
  2489. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2490. {
  2491. int i;
  2492. struct drm_panel_esd_config *config = &panel->esd_config;
  2493. for (i = 0; i < count; ++i) {
  2494. if (config->status_valid_params[i] >
  2495. config->status_cmds_rlen[i]) {
  2496. DSI_DEBUG("ignore valid params\n");
  2497. return false;
  2498. }
  2499. }
  2500. return true;
  2501. }
  2502. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2503. char *prop_key, u32 **target, u32 cmd_cnt)
  2504. {
  2505. int tmp;
  2506. if (!utils->find_property(utils->data, prop_key, &tmp))
  2507. return false;
  2508. tmp /= sizeof(u32);
  2509. if (tmp != cmd_cnt) {
  2510. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2511. tmp, cmd_cnt);
  2512. return false;
  2513. }
  2514. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2515. if (IS_ERR_OR_NULL(*target)) {
  2516. DSI_ERR("Error allocating memory for property\n");
  2517. return false;
  2518. }
  2519. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2520. DSI_ERR("cannot get values from dts\n");
  2521. kfree(*target);
  2522. *target = NULL;
  2523. return false;
  2524. }
  2525. return true;
  2526. }
  2527. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2528. {
  2529. kfree(esd_config->status_buf);
  2530. kfree(esd_config->return_buf);
  2531. kfree(esd_config->status_value);
  2532. kfree(esd_config->status_valid_params);
  2533. kfree(esd_config->status_cmds_rlen);
  2534. kfree(esd_config->status_cmd.cmds);
  2535. }
  2536. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2537. {
  2538. struct drm_panel_esd_config *esd_config;
  2539. int rc = 0;
  2540. u32 tmp;
  2541. u32 i, status_len, *lenp;
  2542. struct property *data;
  2543. struct dsi_parser_utils *utils = &panel->utils;
  2544. if (!panel) {
  2545. DSI_ERR("Invalid Params\n");
  2546. return -EINVAL;
  2547. }
  2548. esd_config = &panel->esd_config;
  2549. if (!esd_config)
  2550. return -EINVAL;
  2551. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2552. DSI_CMD_SET_PANEL_STATUS, utils);
  2553. if (!esd_config->status_cmd.count) {
  2554. DSI_ERR("panel status command parsing failed\n");
  2555. rc = -EINVAL;
  2556. goto error;
  2557. }
  2558. if (!dsi_panel_parse_esd_status_len(utils,
  2559. "qcom,mdss-dsi-panel-status-read-length",
  2560. &panel->esd_config.status_cmds_rlen,
  2561. esd_config->status_cmd.count)) {
  2562. DSI_ERR("Invalid status read length\n");
  2563. rc = -EINVAL;
  2564. goto error1;
  2565. }
  2566. if (dsi_panel_parse_esd_status_len(utils,
  2567. "qcom,mdss-dsi-panel-status-valid-params",
  2568. &panel->esd_config.status_valid_params,
  2569. esd_config->status_cmd.count)) {
  2570. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2571. esd_config->status_cmd.count)) {
  2572. rc = -EINVAL;
  2573. goto error2;
  2574. }
  2575. }
  2576. status_len = 0;
  2577. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2578. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2579. status_len += lenp[i];
  2580. if (!status_len) {
  2581. rc = -EINVAL;
  2582. goto error2;
  2583. }
  2584. /*
  2585. * Some panel may need multiple read commands to properly
  2586. * check panel status. Do a sanity check for proper status
  2587. * value which will be compared with the value read by dsi
  2588. * controller during ESD check. Also check if multiple read
  2589. * commands are there then, there should be corresponding
  2590. * status check values for each read command.
  2591. */
  2592. data = utils->find_property(utils->data,
  2593. "qcom,mdss-dsi-panel-status-value", &tmp);
  2594. tmp /= sizeof(u32);
  2595. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2596. esd_config->groups = tmp / status_len;
  2597. } else {
  2598. DSI_ERR("error parse panel-status-value\n");
  2599. rc = -EINVAL;
  2600. goto error2;
  2601. }
  2602. esd_config->status_value =
  2603. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2604. GFP_KERNEL);
  2605. if (!esd_config->status_value) {
  2606. rc = -ENOMEM;
  2607. goto error2;
  2608. }
  2609. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2610. sizeof(unsigned char), GFP_KERNEL);
  2611. if (!esd_config->return_buf) {
  2612. rc = -ENOMEM;
  2613. goto error3;
  2614. }
  2615. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2616. if (!esd_config->status_buf) {
  2617. rc = -ENOMEM;
  2618. goto error4;
  2619. }
  2620. rc = utils->read_u32_array(utils->data,
  2621. "qcom,mdss-dsi-panel-status-value",
  2622. esd_config->status_value, esd_config->groups * status_len);
  2623. if (rc) {
  2624. DSI_DEBUG("error reading panel status values\n");
  2625. memset(esd_config->status_value, 0,
  2626. esd_config->groups * status_len);
  2627. }
  2628. return 0;
  2629. error4:
  2630. kfree(esd_config->return_buf);
  2631. error3:
  2632. kfree(esd_config->status_value);
  2633. error2:
  2634. kfree(esd_config->status_valid_params);
  2635. kfree(esd_config->status_cmds_rlen);
  2636. error1:
  2637. kfree(esd_config->status_cmd.cmds);
  2638. error:
  2639. return rc;
  2640. }
  2641. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2642. {
  2643. int rc = 0;
  2644. const char *string;
  2645. struct drm_panel_esd_config *esd_config;
  2646. struct dsi_parser_utils *utils = &panel->utils;
  2647. u8 *esd_mode = NULL;
  2648. esd_config = &panel->esd_config;
  2649. esd_config->status_mode = ESD_MODE_MAX;
  2650. esd_config->esd_enabled = utils->read_bool(utils->data,
  2651. "qcom,esd-check-enabled");
  2652. if (!esd_config->esd_enabled)
  2653. return 0;
  2654. rc = utils->read_string(utils->data,
  2655. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2656. if (!rc) {
  2657. if (!strcmp(string, "bta_check")) {
  2658. esd_config->status_mode = ESD_MODE_SW_BTA;
  2659. } else if (!strcmp(string, "reg_read")) {
  2660. esd_config->status_mode = ESD_MODE_REG_READ;
  2661. } else if (!strcmp(string, "te_signal_check")) {
  2662. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2663. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2664. } else {
  2665. DSI_ERR("TE-ESD not valid for video mode\n");
  2666. rc = -EINVAL;
  2667. goto error;
  2668. }
  2669. } else {
  2670. DSI_ERR("No valid panel-status-check-mode string\n");
  2671. rc = -EINVAL;
  2672. goto error;
  2673. }
  2674. } else {
  2675. DSI_DEBUG("status check method not defined!\n");
  2676. rc = -EINVAL;
  2677. goto error;
  2678. }
  2679. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2680. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2681. if (rc) {
  2682. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2683. rc);
  2684. goto error;
  2685. }
  2686. esd_mode = "register_read";
  2687. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2688. esd_mode = "bta_trigger";
  2689. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2690. esd_mode = "te_check";
  2691. }
  2692. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2693. return 0;
  2694. error:
  2695. panel->esd_config.esd_enabled = false;
  2696. return rc;
  2697. }
  2698. static void dsi_panel_update_util(struct dsi_panel *panel,
  2699. struct device_node *parser_node)
  2700. {
  2701. struct dsi_parser_utils *utils = &panel->utils;
  2702. if (parser_node) {
  2703. *utils = *dsi_parser_get_parser_utils();
  2704. utils->data = parser_node;
  2705. DSI_DEBUG("switching to parser APIs\n");
  2706. goto end;
  2707. }
  2708. *utils = *dsi_parser_get_of_utils();
  2709. utils->data = panel->panel_of_node;
  2710. end:
  2711. utils->node = panel->panel_of_node;
  2712. }
  2713. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2714. {
  2715. return 0;
  2716. }
  2717. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2718. {
  2719. if (trusted_vm_env) {
  2720. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2721. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2722. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2723. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2724. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2725. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2726. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2727. } else {
  2728. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2729. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2730. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2731. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2732. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2733. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2734. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2735. }
  2736. }
  2737. struct dsi_panel *dsi_panel_get(struct device *parent,
  2738. struct device_node *of_node,
  2739. struct device_node *parser_node,
  2740. const char *type,
  2741. int topology_override,
  2742. bool trusted_vm_env)
  2743. {
  2744. struct dsi_panel *panel;
  2745. struct dsi_parser_utils *utils;
  2746. const char *panel_physical_type;
  2747. int rc = 0;
  2748. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2749. if (!panel)
  2750. return ERR_PTR(-ENOMEM);
  2751. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2752. panel->panel_of_node = of_node;
  2753. panel->parent = parent;
  2754. panel->type = type;
  2755. dsi_panel_update_util(panel, parser_node);
  2756. utils = &panel->utils;
  2757. panel->name = utils->get_property(utils->data,
  2758. "qcom,mdss-dsi-panel-name", NULL);
  2759. if (!panel->name)
  2760. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2761. /*
  2762. * Set panel type to LCD as default.
  2763. */
  2764. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2765. panel_physical_type = utils->get_property(utils->data,
  2766. "qcom,mdss-dsi-panel-physical-type", NULL);
  2767. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2768. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2769. rc = dsi_panel_parse_host_config(panel);
  2770. if (rc) {
  2771. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2772. rc);
  2773. goto error;
  2774. }
  2775. rc = dsi_panel_parse_panel_mode(panel);
  2776. if (rc) {
  2777. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2778. rc);
  2779. goto error;
  2780. }
  2781. rc = dsi_panel_parse_dfps_caps(panel);
  2782. if (rc)
  2783. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2784. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2785. if (rc)
  2786. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2787. /* allow qsync support only if DFPS is with VFP approach */
  2788. if ((panel->dfps_caps.dfps_support) &&
  2789. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2790. panel->qsync_min_fps = 0;
  2791. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2792. if (rc)
  2793. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2794. rc = dsi_panel_parse_phy_props(panel);
  2795. if (rc) {
  2796. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2797. rc);
  2798. goto error;
  2799. }
  2800. rc = panel->panel_ops.parse_gpios(panel);
  2801. if (rc) {
  2802. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2803. goto error;
  2804. }
  2805. rc = dsi_panel_parse_power_cfg(panel);
  2806. if (rc)
  2807. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2808. rc = dsi_panel_parse_bl_config(panel);
  2809. if (rc) {
  2810. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2811. if (rc == -EPROBE_DEFER)
  2812. goto error;
  2813. }
  2814. rc = dsi_panel_parse_misc_features(panel);
  2815. if (rc)
  2816. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2817. rc = dsi_panel_parse_hdr_config(panel);
  2818. if (rc)
  2819. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2820. rc = dsi_panel_get_mode_count(panel);
  2821. if (rc) {
  2822. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2823. goto error;
  2824. }
  2825. rc = dsi_panel_parse_dms_info(panel);
  2826. if (rc)
  2827. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2828. rc = dsi_panel_parse_esd_config(panel);
  2829. if (rc)
  2830. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2831. rc = dsi_panel_vreg_get(panel);
  2832. if (rc) {
  2833. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2834. panel->name, rc);
  2835. goto error;
  2836. }
  2837. panel->power_mode = SDE_MODE_DPMS_OFF;
  2838. drm_panel_init(&panel->drm_panel);
  2839. panel->drm_panel.dev = &panel->mipi_device.dev;
  2840. panel->mipi_device.dev.of_node = of_node;
  2841. rc = drm_panel_add(&panel->drm_panel);
  2842. if (rc)
  2843. goto error_vreg_put;
  2844. mutex_init(&panel->panel_lock);
  2845. return panel;
  2846. error_vreg_put:
  2847. (void)dsi_panel_vreg_put(panel);
  2848. error:
  2849. kfree(panel);
  2850. return ERR_PTR(rc);
  2851. }
  2852. void dsi_panel_put(struct dsi_panel *panel)
  2853. {
  2854. drm_panel_remove(&panel->drm_panel);
  2855. /* free resources allocated for ESD check */
  2856. dsi_panel_esd_config_deinit(&panel->esd_config);
  2857. kfree(panel);
  2858. }
  2859. int dsi_panel_drv_init(struct dsi_panel *panel,
  2860. struct mipi_dsi_host *host)
  2861. {
  2862. int rc = 0;
  2863. struct mipi_dsi_device *dev;
  2864. if (!panel || !host) {
  2865. DSI_ERR("invalid params\n");
  2866. return -EINVAL;
  2867. }
  2868. mutex_lock(&panel->panel_lock);
  2869. dev = &panel->mipi_device;
  2870. dev->host = host;
  2871. /*
  2872. * We dont have device structure since panel is not a device node.
  2873. * When using drm panel framework, the device is probed when the host is
  2874. * create.
  2875. */
  2876. dev->channel = 0;
  2877. dev->lanes = 4;
  2878. panel->host = host;
  2879. rc = panel->panel_ops.pinctrl_init(panel);
  2880. if (rc) {
  2881. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2882. panel->name, rc);
  2883. goto exit;
  2884. }
  2885. rc = panel->panel_ops.gpio_request(panel);
  2886. if (rc) {
  2887. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2888. rc);
  2889. goto error_pinctrl_deinit;
  2890. }
  2891. rc = panel->panel_ops.bl_register(panel);
  2892. if (rc) {
  2893. if (rc != -EPROBE_DEFER)
  2894. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2895. panel->name, rc);
  2896. goto error_gpio_release;
  2897. }
  2898. goto exit;
  2899. error_gpio_release:
  2900. (void)dsi_panel_gpio_release(panel);
  2901. error_pinctrl_deinit:
  2902. (void)dsi_panel_pinctrl_deinit(panel);
  2903. exit:
  2904. mutex_unlock(&panel->panel_lock);
  2905. return rc;
  2906. }
  2907. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2908. {
  2909. int rc = 0;
  2910. if (!panel) {
  2911. DSI_ERR("invalid params\n");
  2912. return -EINVAL;
  2913. }
  2914. mutex_lock(&panel->panel_lock);
  2915. rc = panel->panel_ops.bl_unregister(panel);
  2916. if (rc)
  2917. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2918. panel->name, rc);
  2919. rc = panel->panel_ops.gpio_release(panel);
  2920. if (rc)
  2921. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2922. rc);
  2923. rc = panel->panel_ops.pinctrl_deinit(panel);
  2924. if (rc)
  2925. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2926. rc);
  2927. rc = dsi_panel_vreg_put(panel);
  2928. if (rc)
  2929. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2930. panel->host = NULL;
  2931. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2932. mutex_unlock(&panel->panel_lock);
  2933. return rc;
  2934. }
  2935. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2936. struct dsi_display_mode *mode)
  2937. {
  2938. return 0;
  2939. }
  2940. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  2941. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  2942. {
  2943. const char *compression;
  2944. u32 *array = NULL, top_count, len, i;
  2945. int rc = -EINVAL;
  2946. bool dsc_enable = false;
  2947. *dsc_count = 0;
  2948. *lm_count = 0;
  2949. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  2950. if (compression && !strcmp(compression, "dsc"))
  2951. dsc_enable = true;
  2952. len = utils->count_u32_elems(node, "qcom,display-topology");
  2953. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2954. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  2955. return rc;
  2956. top_count = len / TOPOLOGY_SET_LEN;
  2957. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2958. if (!array)
  2959. return -ENOMEM;
  2960. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  2961. if (rc) {
  2962. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2963. goto read_fail;
  2964. }
  2965. for (i = 0; i < top_count; i++) {
  2966. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  2967. if (dsc_enable)
  2968. *dsc_count = max(*dsc_count,
  2969. array[i * TOPOLOGY_SET_LEN + 1]);
  2970. }
  2971. read_fail:
  2972. kfree(array);
  2973. return 0;
  2974. }
  2975. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2976. {
  2977. const u32 SINGLE_MODE_SUPPORT = 1;
  2978. struct dsi_parser_utils *utils;
  2979. struct device_node *timings_np, *child_np;
  2980. int num_dfps_rates, num_bit_clks;
  2981. int num_video_modes = 0, num_cmd_modes = 0;
  2982. int count, rc = 0;
  2983. u32 dsc_count = 0, lm_count = 0;
  2984. if (!panel) {
  2985. DSI_ERR("invalid params\n");
  2986. return -EINVAL;
  2987. }
  2988. utils = &panel->utils;
  2989. panel->num_timing_nodes = 0;
  2990. timings_np = utils->get_child_by_name(utils->data,
  2991. "qcom,mdss-dsi-display-timings");
  2992. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2993. DSI_ERR("no display timing nodes defined\n");
  2994. rc = -EINVAL;
  2995. goto error;
  2996. }
  2997. count = utils->get_child_count(timings_np);
  2998. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2999. count > DSI_MODE_MAX) {
  3000. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3001. rc = -EINVAL;
  3002. goto error;
  3003. }
  3004. /* No multiresolution support is available for video mode panels.
  3005. * Multi-mode is supported for video mode during POMS is enabled.
  3006. */
  3007. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3008. !panel->host_config.ext_bridge_mode &&
  3009. !panel->panel_mode_switch_enabled)
  3010. count = SINGLE_MODE_SUPPORT;
  3011. panel->num_timing_nodes = count;
  3012. dsi_for_each_child_node(timings_np, child_np) {
  3013. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3014. num_video_modes++;
  3015. else if (utils->read_bool(child_np,
  3016. "qcom,mdss-dsi-cmd-mode"))
  3017. num_cmd_modes++;
  3018. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3019. num_video_modes++;
  3020. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3021. num_cmd_modes++;
  3022. dsi_panel_get_max_res_count(utils, child_np,
  3023. &dsc_count, &lm_count);
  3024. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3025. panel->lm_count = max(lm_count, panel->lm_count);
  3026. }
  3027. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3028. panel->dfps_caps.dfps_list_len;
  3029. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  3030. panel->dyn_clk_caps.bit_clk_list_len;
  3031. /*
  3032. * Inflate num_of_modes by fps and bit clks in dfps.
  3033. * Single command mode for video mode panels supporting
  3034. * panel operating mode switch.
  3035. */
  3036. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  3037. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3038. (panel->panel_mode_switch_enabled))
  3039. num_cmd_modes = 1;
  3040. else
  3041. num_cmd_modes = num_cmd_modes * num_bit_clks;
  3042. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3043. error:
  3044. return rc;
  3045. }
  3046. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3047. struct dsi_panel_phy_props *phy_props)
  3048. {
  3049. int rc = 0;
  3050. if (!panel || !phy_props) {
  3051. DSI_ERR("invalid params\n");
  3052. return -EINVAL;
  3053. }
  3054. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3055. return rc;
  3056. }
  3057. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3058. struct dsi_dfps_capabilities *dfps_caps)
  3059. {
  3060. int rc = 0;
  3061. if (!panel || !dfps_caps) {
  3062. DSI_ERR("invalid params\n");
  3063. return -EINVAL;
  3064. }
  3065. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3066. return rc;
  3067. }
  3068. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3069. {
  3070. int i;
  3071. if (!mode->priv_info)
  3072. return;
  3073. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3074. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3075. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3076. }
  3077. kfree(mode->priv_info);
  3078. }
  3079. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3080. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3081. {
  3082. u32 frame_time_us, nslices;
  3083. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3084. dsi_transfer_time_us, pixel_clk_khz;
  3085. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3086. struct dsi_mode_info *timing = &mode->timing;
  3087. struct dsi_display_mode *display_mode;
  3088. u32 jitter_numer, jitter_denom, prefill_lines;
  3089. u32 min_threshold_us, prefill_time_us, max_transfer_us;
  3090. u16 bpp;
  3091. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3092. * + 1 byte dcs data command.
  3093. */
  3094. const u32 packet_overhead = 56;
  3095. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3096. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3097. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3098. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3099. if (timing->refresh_rate >= 120)
  3100. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3101. if (timing->dsc_enabled) {
  3102. nslices = (timing->h_active)/(dsc->config.slice_width);
  3103. /* (slice width x bit-per-pixel + packet overhead) x
  3104. * number of slices x height x fps / lane
  3105. */
  3106. bpp = DSC_BPP(dsc->config);
  3107. bits_per_line = ((dsc->config.slice_width * bpp) +
  3108. packet_overhead) * nslices;
  3109. bits_per_line = bits_per_line / (config->num_data_lanes);
  3110. min_bitclk_hz = (bits_per_line * timing->v_active *
  3111. timing->refresh_rate);
  3112. } else {
  3113. total_active_pixels = ((dsi_h_active_dce(timing)
  3114. * timing->v_active));
  3115. /* calculate the actual bitclk needed to transfer the frame */
  3116. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3117. (config->bpp));
  3118. do_div(min_bitclk_hz, config->num_data_lanes);
  3119. }
  3120. timing->min_dsi_clk_hz = min_bitclk_hz;
  3121. min_threshold_us = mult_frac(frame_time_us,
  3122. jitter_numer, (jitter_denom * 100));
  3123. /*
  3124. * Increase the prefill_lines proportionately as recommended
  3125. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3126. */
  3127. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3128. timing->refresh_rate, 60);
  3129. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3130. (timing->v_active));
  3131. /*
  3132. * Threshold is sum of panel jitter time, prefill line time
  3133. * plus 64usec buffer time.
  3134. */
  3135. min_threshold_us = min_threshold_us + 64 + prefill_time_us;
  3136. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3137. if (timing->clk_rate_hz) {
  3138. /* adjust the transfer time proportionately for bit clk*/
  3139. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3140. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3141. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3142. } else if (mode->priv_info->mdp_transfer_time_us) {
  3143. max_transfer_us = frame_time_us - min_threshold_us;
  3144. mode->priv_info->mdp_transfer_time_us = min(
  3145. mode->priv_info->mdp_transfer_time_us,
  3146. max_transfer_us);
  3147. timing->dsi_transfer_time_us =
  3148. mode->priv_info->mdp_transfer_time_us;
  3149. } else {
  3150. if (min_threshold_us > frame_threshold_us)
  3151. frame_threshold_us = min_threshold_us;
  3152. timing->dsi_transfer_time_us = frame_time_us -
  3153. frame_threshold_us;
  3154. }
  3155. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3156. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3157. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3158. timing->mdp_transfer_time_us =
  3159. mode->priv_info->mdp_transfer_time_us;
  3160. }
  3161. /* Calculate pclk_khz to update modeinfo */
  3162. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3163. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3164. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3165. do_div(pixel_clk_khz, config->bpp);
  3166. display_mode->pixel_clk_khz = pixel_clk_khz;
  3167. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3168. }
  3169. int dsi_panel_get_mode(struct dsi_panel *panel,
  3170. u32 index, struct dsi_display_mode *mode,
  3171. int topology_override)
  3172. {
  3173. struct device_node *timings_np, *child_np;
  3174. struct dsi_parser_utils *utils;
  3175. struct dsi_display_mode_priv_info *prv_info;
  3176. u32 child_idx = 0;
  3177. int rc = 0, num_timings;
  3178. int traffic_mode;
  3179. int panel_mode;
  3180. void *utils_data = NULL;
  3181. if (!panel || !mode) {
  3182. DSI_ERR("invalid params\n");
  3183. return -EINVAL;
  3184. }
  3185. mutex_lock(&panel->panel_lock);
  3186. utils = &panel->utils;
  3187. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3188. if (!mode->priv_info) {
  3189. rc = -ENOMEM;
  3190. goto done;
  3191. }
  3192. prv_info = mode->priv_info;
  3193. timings_np = utils->get_child_by_name(utils->data,
  3194. "qcom,mdss-dsi-display-timings");
  3195. if (!timings_np) {
  3196. DSI_ERR("no display timing nodes defined\n");
  3197. rc = -EINVAL;
  3198. goto parse_fail;
  3199. }
  3200. num_timings = utils->get_child_count(timings_np);
  3201. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3202. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3203. rc = -EINVAL;
  3204. goto parse_fail;
  3205. }
  3206. utils_data = utils->data;
  3207. traffic_mode = panel->video_config.traffic_mode;
  3208. panel_mode = panel->panel_mode;
  3209. dsi_for_each_child_node(timings_np, child_np) {
  3210. if (index != child_idx++)
  3211. continue;
  3212. utils->data = child_np;
  3213. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3214. if (rc) {
  3215. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3216. goto parse_fail;
  3217. }
  3218. rc = dsi_panel_parse_dsc_params(mode, utils);
  3219. if (rc) {
  3220. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3221. goto parse_fail;
  3222. }
  3223. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3224. panel_mode);
  3225. if (rc) {
  3226. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3227. goto parse_fail;
  3228. }
  3229. rc = dsi_panel_parse_topology(prv_info, utils,
  3230. topology_override);
  3231. if (rc) {
  3232. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3233. goto parse_fail;
  3234. }
  3235. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3236. if (rc) {
  3237. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3238. goto parse_fail;
  3239. }
  3240. rc = dsi_panel_parse_jitter_config(mode, utils);
  3241. if (rc)
  3242. DSI_ERR(
  3243. "failed to parse panel jitter config, rc=%d\n", rc);
  3244. rc = dsi_panel_parse_phy_timing(mode, utils);
  3245. if (rc) {
  3246. DSI_ERR(
  3247. "failed to parse panel phy timings, rc=%d\n", rc);
  3248. goto parse_fail;
  3249. }
  3250. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3251. if (rc)
  3252. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3253. if (panel->panel_mode_switch_enabled) {
  3254. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3255. if (rc) {
  3256. rc = 0;
  3257. mode->panel_mode = panel->panel_mode;
  3258. DSI_INFO(
  3259. "POMS: panel mode isn't specified in timing[%d]\n",
  3260. child_idx);
  3261. }
  3262. } else {
  3263. mode->panel_mode = panel->panel_mode;
  3264. }
  3265. }
  3266. goto done;
  3267. parse_fail:
  3268. kfree(mode->priv_info);
  3269. mode->priv_info = NULL;
  3270. done:
  3271. utils->data = utils_data;
  3272. mutex_unlock(&panel->panel_lock);
  3273. return rc;
  3274. }
  3275. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3276. struct dsi_display_mode *mode,
  3277. struct dsi_host_config *config)
  3278. {
  3279. int rc = 0;
  3280. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3281. if (!panel || !mode || !config) {
  3282. DSI_ERR("invalid params\n");
  3283. return -EINVAL;
  3284. }
  3285. mutex_lock(&panel->panel_lock);
  3286. config->panel_mode = panel->panel_mode;
  3287. memcpy(&config->common_config, &panel->host_config,
  3288. sizeof(config->common_config));
  3289. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3290. memcpy(&config->u.video_engine, &panel->video_config,
  3291. sizeof(config->u.video_engine));
  3292. } else {
  3293. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3294. sizeof(config->u.cmd_engine));
  3295. }
  3296. memcpy(&config->video_timing, &mode->timing,
  3297. sizeof(config->video_timing));
  3298. config->video_timing.mdp_transfer_time_us =
  3299. mode->priv_info->mdp_transfer_time_us;
  3300. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3301. config->video_timing.dsc = &mode->priv_info->dsc;
  3302. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3303. config->video_timing.vdc = &mode->priv_info->vdc;
  3304. if (dyn_clk_caps->dyn_clk_support)
  3305. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3306. else
  3307. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3308. config->esc_clk_rate_hz = 19200000;
  3309. mutex_unlock(&panel->panel_lock);
  3310. return rc;
  3311. }
  3312. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3313. {
  3314. int rc = 0;
  3315. if (!panel) {
  3316. DSI_ERR("invalid params\n");
  3317. return -EINVAL;
  3318. }
  3319. mutex_lock(&panel->panel_lock);
  3320. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3321. if (panel->lp11_init)
  3322. goto error;
  3323. rc = dsi_panel_power_on(panel);
  3324. if (rc) {
  3325. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3326. goto error;
  3327. }
  3328. error:
  3329. mutex_unlock(&panel->panel_lock);
  3330. return rc;
  3331. }
  3332. int dsi_panel_update_pps(struct dsi_panel *panel)
  3333. {
  3334. int rc = 0;
  3335. struct dsi_panel_cmd_set *set = NULL;
  3336. struct dsi_display_mode_priv_info *priv_info = NULL;
  3337. if (!panel || !panel->cur_mode) {
  3338. DSI_ERR("invalid params\n");
  3339. return -EINVAL;
  3340. }
  3341. mutex_lock(&panel->panel_lock);
  3342. priv_info = panel->cur_mode->priv_info;
  3343. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3344. if (priv_info->dsc_enabled)
  3345. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3346. panel->dce_pps_cmd, 0,
  3347. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3348. else if (priv_info->vdc_enabled)
  3349. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3350. panel->dce_pps_cmd, 0,
  3351. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3352. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3353. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3354. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3355. if (rc) {
  3356. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3357. goto error;
  3358. }
  3359. }
  3360. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3361. if (rc) {
  3362. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3363. panel->name, rc);
  3364. }
  3365. dsi_panel_destroy_cmd_packets(set);
  3366. error:
  3367. mutex_unlock(&panel->panel_lock);
  3368. return rc;
  3369. }
  3370. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3371. {
  3372. int rc = 0;
  3373. if (!panel) {
  3374. DSI_ERR("invalid params\n");
  3375. return -EINVAL;
  3376. }
  3377. mutex_lock(&panel->panel_lock);
  3378. if (!panel->panel_initialized)
  3379. goto exit;
  3380. /*
  3381. * Consider LP1->LP2->LP1.
  3382. * If the panel is already in LP mode, do not need to
  3383. * set the regulator.
  3384. * IBB and AB power mode would be set at the same time
  3385. * in PMIC driver, so we only call ibb setting that is enough.
  3386. */
  3387. if (dsi_panel_is_type_oled(panel) &&
  3388. panel->power_mode != SDE_MODE_DPMS_LP2)
  3389. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3390. "ibb", REGULATOR_MODE_IDLE);
  3391. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3392. if (rc)
  3393. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3394. panel->name, rc);
  3395. exit:
  3396. mutex_unlock(&panel->panel_lock);
  3397. return rc;
  3398. }
  3399. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3400. {
  3401. int rc = 0;
  3402. if (!panel) {
  3403. DSI_ERR("invalid params\n");
  3404. return -EINVAL;
  3405. }
  3406. mutex_lock(&panel->panel_lock);
  3407. if (!panel->panel_initialized)
  3408. goto exit;
  3409. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3410. if (rc)
  3411. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3412. panel->name, rc);
  3413. exit:
  3414. mutex_unlock(&panel->panel_lock);
  3415. return rc;
  3416. }
  3417. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3418. {
  3419. int rc = 0;
  3420. if (!panel) {
  3421. DSI_ERR("invalid params\n");
  3422. return -EINVAL;
  3423. }
  3424. mutex_lock(&panel->panel_lock);
  3425. if (!panel->panel_initialized)
  3426. goto exit;
  3427. /*
  3428. * Consider about LP1->LP2->NOLP.
  3429. */
  3430. if (dsi_panel_is_type_oled(panel) &&
  3431. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3432. panel->power_mode == SDE_MODE_DPMS_LP2))
  3433. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3434. "ibb", REGULATOR_MODE_NORMAL);
  3435. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3436. if (rc)
  3437. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3438. panel->name, rc);
  3439. exit:
  3440. mutex_unlock(&panel->panel_lock);
  3441. return rc;
  3442. }
  3443. int dsi_panel_prepare(struct dsi_panel *panel)
  3444. {
  3445. int rc = 0;
  3446. if (!panel) {
  3447. DSI_ERR("invalid params\n");
  3448. return -EINVAL;
  3449. }
  3450. mutex_lock(&panel->panel_lock);
  3451. if (panel->lp11_init) {
  3452. rc = dsi_panel_power_on(panel);
  3453. if (rc) {
  3454. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3455. panel->name, rc);
  3456. goto error;
  3457. }
  3458. }
  3459. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3460. if (rc) {
  3461. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3462. panel->name, rc);
  3463. goto error;
  3464. }
  3465. error:
  3466. mutex_unlock(&panel->panel_lock);
  3467. return rc;
  3468. }
  3469. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3470. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3471. {
  3472. static const int ROI_CMD_LEN = 5;
  3473. int rc = 0;
  3474. /* DTYPE_DCS_LWRITE */
  3475. char *caset, *paset;
  3476. set->cmds = NULL;
  3477. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3478. if (!caset) {
  3479. rc = -ENOMEM;
  3480. goto exit;
  3481. }
  3482. caset[0] = 0x2a;
  3483. caset[1] = (roi->x & 0xFF00) >> 8;
  3484. caset[2] = roi->x & 0xFF;
  3485. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3486. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3487. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3488. if (!paset) {
  3489. rc = -ENOMEM;
  3490. goto error_free_mem;
  3491. }
  3492. paset[0] = 0x2b;
  3493. paset[1] = (roi->y & 0xFF00) >> 8;
  3494. paset[2] = roi->y & 0xFF;
  3495. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3496. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3497. set->type = DSI_CMD_SET_ROI;
  3498. set->state = DSI_CMD_SET_STATE_LP;
  3499. set->count = 2; /* send caset + paset together */
  3500. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3501. if (!set->cmds) {
  3502. rc = -ENOMEM;
  3503. goto error_free_mem;
  3504. }
  3505. set->cmds[0].msg.channel = 0;
  3506. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3507. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3508. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3509. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3510. set->cmds[0].msg.tx_buf = caset;
  3511. set->cmds[0].msg.rx_len = 0;
  3512. set->cmds[0].msg.rx_buf = 0;
  3513. set->cmds[0].msg.wait_ms = 0;
  3514. set->cmds[0].last_command = 0;
  3515. set->cmds[0].post_wait_ms = 0;
  3516. set->cmds[1].msg.channel = 0;
  3517. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3518. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3519. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3520. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3521. set->cmds[1].msg.tx_buf = paset;
  3522. set->cmds[1].msg.rx_len = 0;
  3523. set->cmds[1].msg.rx_buf = 0;
  3524. set->cmds[1].msg.wait_ms = 0;
  3525. set->cmds[1].last_command = 1;
  3526. set->cmds[1].post_wait_ms = 0;
  3527. goto exit;
  3528. error_free_mem:
  3529. kfree(caset);
  3530. kfree(paset);
  3531. kfree(set->cmds);
  3532. exit:
  3533. return rc;
  3534. }
  3535. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3536. int ctrl_idx)
  3537. {
  3538. int rc = 0;
  3539. if (!panel) {
  3540. DSI_ERR("invalid params\n");
  3541. return -EINVAL;
  3542. }
  3543. mutex_lock(&panel->panel_lock);
  3544. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3545. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3546. if (rc)
  3547. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3548. panel->name, rc);
  3549. mutex_unlock(&panel->panel_lock);
  3550. return rc;
  3551. }
  3552. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3553. int ctrl_idx)
  3554. {
  3555. int rc = 0;
  3556. if (!panel) {
  3557. DSI_ERR("invalid params\n");
  3558. return -EINVAL;
  3559. }
  3560. mutex_lock(&panel->panel_lock);
  3561. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3562. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3563. if (rc)
  3564. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3565. panel->name, rc);
  3566. mutex_unlock(&panel->panel_lock);
  3567. return rc;
  3568. }
  3569. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3570. struct dsi_rect *roi)
  3571. {
  3572. int rc = 0;
  3573. struct dsi_panel_cmd_set *set;
  3574. struct dsi_display_mode_priv_info *priv_info;
  3575. if (!panel || !panel->cur_mode) {
  3576. DSI_ERR("Invalid params\n");
  3577. return -EINVAL;
  3578. }
  3579. priv_info = panel->cur_mode->priv_info;
  3580. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3581. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3582. if (rc) {
  3583. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3584. panel->name, rc);
  3585. return rc;
  3586. }
  3587. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3588. roi->x, roi->y, roi->w, roi->h);
  3589. mutex_lock(&panel->panel_lock);
  3590. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3591. if (rc)
  3592. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3593. panel->name, rc);
  3594. mutex_unlock(&panel->panel_lock);
  3595. dsi_panel_destroy_cmd_packets(set);
  3596. dsi_panel_dealloc_cmd_packets(set);
  3597. return rc;
  3598. }
  3599. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3600. {
  3601. int rc = 0;
  3602. if (!panel) {
  3603. DSI_ERR("Invalid params\n");
  3604. return -EINVAL;
  3605. }
  3606. mutex_lock(&panel->panel_lock);
  3607. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3608. if (rc)
  3609. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3610. panel->name, rc);
  3611. mutex_unlock(&panel->panel_lock);
  3612. return rc;
  3613. }
  3614. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3615. {
  3616. int rc = 0;
  3617. if (!panel) {
  3618. DSI_ERR("Invalid params\n");
  3619. return -EINVAL;
  3620. }
  3621. mutex_lock(&panel->panel_lock);
  3622. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3623. if (rc)
  3624. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3625. panel->name, rc);
  3626. mutex_unlock(&panel->panel_lock);
  3627. return rc;
  3628. }
  3629. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3630. {
  3631. int rc = 0;
  3632. if (!panel) {
  3633. DSI_ERR("Invalid params\n");
  3634. return -EINVAL;
  3635. }
  3636. mutex_lock(&panel->panel_lock);
  3637. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3638. if (rc)
  3639. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3640. panel->name, rc);
  3641. mutex_unlock(&panel->panel_lock);
  3642. return rc;
  3643. }
  3644. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3645. {
  3646. int rc = 0;
  3647. if (!panel) {
  3648. DSI_ERR("Invalid params\n");
  3649. return -EINVAL;
  3650. }
  3651. mutex_lock(&panel->panel_lock);
  3652. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3653. if (rc)
  3654. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3655. panel->name, rc);
  3656. mutex_unlock(&panel->panel_lock);
  3657. return rc;
  3658. }
  3659. int dsi_panel_switch(struct dsi_panel *panel)
  3660. {
  3661. int rc = 0;
  3662. if (!panel) {
  3663. DSI_ERR("Invalid params\n");
  3664. return -EINVAL;
  3665. }
  3666. mutex_lock(&panel->panel_lock);
  3667. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3668. if (rc)
  3669. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3670. panel->name, rc);
  3671. mutex_unlock(&panel->panel_lock);
  3672. return rc;
  3673. }
  3674. int dsi_panel_post_switch(struct dsi_panel *panel)
  3675. {
  3676. int rc = 0;
  3677. if (!panel) {
  3678. DSI_ERR("Invalid params\n");
  3679. return -EINVAL;
  3680. }
  3681. mutex_lock(&panel->panel_lock);
  3682. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3683. if (rc)
  3684. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3685. panel->name, rc);
  3686. mutex_unlock(&panel->panel_lock);
  3687. return rc;
  3688. }
  3689. int dsi_panel_enable(struct dsi_panel *panel)
  3690. {
  3691. int rc = 0;
  3692. if (!panel) {
  3693. DSI_ERR("Invalid params\n");
  3694. return -EINVAL;
  3695. }
  3696. mutex_lock(&panel->panel_lock);
  3697. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3698. if (rc)
  3699. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3700. panel->name, rc);
  3701. else
  3702. panel->panel_initialized = true;
  3703. mutex_unlock(&panel->panel_lock);
  3704. return rc;
  3705. }
  3706. int dsi_panel_post_enable(struct dsi_panel *panel)
  3707. {
  3708. int rc = 0;
  3709. if (!panel) {
  3710. DSI_ERR("invalid params\n");
  3711. return -EINVAL;
  3712. }
  3713. mutex_lock(&panel->panel_lock);
  3714. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3715. if (rc) {
  3716. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3717. panel->name, rc);
  3718. goto error;
  3719. }
  3720. error:
  3721. mutex_unlock(&panel->panel_lock);
  3722. return rc;
  3723. }
  3724. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3725. {
  3726. int rc = 0;
  3727. if (!panel) {
  3728. DSI_ERR("invalid params\n");
  3729. return -EINVAL;
  3730. }
  3731. mutex_lock(&panel->panel_lock);
  3732. if (gpio_is_valid(panel->bl_config.en_gpio))
  3733. gpio_set_value(panel->bl_config.en_gpio, 0);
  3734. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3735. if (rc) {
  3736. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3737. panel->name, rc);
  3738. goto error;
  3739. }
  3740. error:
  3741. mutex_unlock(&panel->panel_lock);
  3742. return rc;
  3743. }
  3744. int dsi_panel_disable(struct dsi_panel *panel)
  3745. {
  3746. int rc = 0;
  3747. if (!panel) {
  3748. DSI_ERR("invalid params\n");
  3749. return -EINVAL;
  3750. }
  3751. mutex_lock(&panel->panel_lock);
  3752. /* Avoid sending panel off commands when ESD recovery is underway */
  3753. if (!atomic_read(&panel->esd_recovery_pending)) {
  3754. /*
  3755. * Need to set IBB/AB regulator mode to STANDBY,
  3756. * if panel is going off from AOD mode.
  3757. */
  3758. if (dsi_panel_is_type_oled(panel) &&
  3759. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3760. panel->power_mode == SDE_MODE_DPMS_LP2))
  3761. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3762. "ibb", REGULATOR_MODE_STANDBY);
  3763. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3764. if (rc) {
  3765. /*
  3766. * Sending panel off commands may fail when DSI
  3767. * controller is in a bad state. These failures can be
  3768. * ignored since controller will go for full reset on
  3769. * subsequent display enable anyway.
  3770. */
  3771. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3772. panel->name, rc);
  3773. rc = 0;
  3774. }
  3775. }
  3776. panel->panel_initialized = false;
  3777. panel->power_mode = SDE_MODE_DPMS_OFF;
  3778. mutex_unlock(&panel->panel_lock);
  3779. return rc;
  3780. }
  3781. int dsi_panel_unprepare(struct dsi_panel *panel)
  3782. {
  3783. int rc = 0;
  3784. if (!panel) {
  3785. DSI_ERR("invalid params\n");
  3786. return -EINVAL;
  3787. }
  3788. mutex_lock(&panel->panel_lock);
  3789. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3790. if (rc) {
  3791. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3792. panel->name, rc);
  3793. goto error;
  3794. }
  3795. error:
  3796. mutex_unlock(&panel->panel_lock);
  3797. return rc;
  3798. }
  3799. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3800. {
  3801. int rc = 0;
  3802. if (!panel) {
  3803. DSI_ERR("invalid params\n");
  3804. return -EINVAL;
  3805. }
  3806. mutex_lock(&panel->panel_lock);
  3807. rc = dsi_panel_power_off(panel);
  3808. if (rc) {
  3809. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3810. panel->name, rc);
  3811. goto error;
  3812. }
  3813. error:
  3814. mutex_unlock(&panel->panel_lock);
  3815. return rc;
  3816. }