dsi_panel.c 108 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define MIN_PREFILL_LINES 35
  31. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  32. {
  33. char *bp;
  34. bp = buf;
  35. /* First 7 bytes are cmd header */
  36. *bp++ = 0x0A;
  37. *bp++ = 1;
  38. *bp++ = 0;
  39. *bp++ = 0;
  40. *bp++ = pps_delay_ms;
  41. *bp++ = 0;
  42. *bp++ = 128;
  43. }
  44. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  45. char *buf, int pps_id, u32 size)
  46. {
  47. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  48. buf += DSI_CMD_PPS_HDR_SIZE;
  49. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  50. size);
  51. }
  52. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  53. char *buf, int pps_id, u32 size)
  54. {
  55. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  56. buf += DSI_CMD_PPS_HDR_SIZE;
  57. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  58. size);
  59. }
  60. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  61. {
  62. int rc = 0;
  63. int i;
  64. struct regulator *vreg = NULL;
  65. for (i = 0; i < panel->power_info.count; i++) {
  66. vreg = devm_regulator_get(panel->parent,
  67. panel->power_info.vregs[i].vreg_name);
  68. rc = PTR_RET(vreg);
  69. if (rc) {
  70. DSI_ERR("failed to get %s regulator\n",
  71. panel->power_info.vregs[i].vreg_name);
  72. goto error_put;
  73. }
  74. panel->power_info.vregs[i].vreg = vreg;
  75. }
  76. return rc;
  77. error_put:
  78. for (i = i - 1; i >= 0; i--) {
  79. devm_regulator_put(panel->power_info.vregs[i].vreg);
  80. panel->power_info.vregs[i].vreg = NULL;
  81. }
  82. return rc;
  83. }
  84. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  85. {
  86. int rc = 0;
  87. int i;
  88. for (i = panel->power_info.count - 1; i >= 0; i--)
  89. devm_regulator_put(panel->power_info.vregs[i].vreg);
  90. return rc;
  91. }
  92. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  93. {
  94. int rc = 0;
  95. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  96. if (gpio_is_valid(r_config->reset_gpio)) {
  97. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  98. if (rc) {
  99. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  100. goto error;
  101. }
  102. }
  103. if (gpio_is_valid(r_config->disp_en_gpio)) {
  104. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  105. if (rc) {
  106. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  107. goto error_release_reset;
  108. }
  109. }
  110. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  111. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  112. if (rc) {
  113. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  114. goto error_release_disp_en;
  115. }
  116. }
  117. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  118. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  119. if (rc) {
  120. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  121. goto error_release_mode_sel;
  122. }
  123. }
  124. if (gpio_is_valid(panel->panel_test_gpio)) {
  125. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  126. if (rc) {
  127. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  128. rc);
  129. panel->panel_test_gpio = -1;
  130. rc = 0;
  131. }
  132. }
  133. goto error;
  134. error_release_mode_sel:
  135. if (gpio_is_valid(panel->bl_config.en_gpio))
  136. gpio_free(panel->bl_config.en_gpio);
  137. error_release_disp_en:
  138. if (gpio_is_valid(r_config->disp_en_gpio))
  139. gpio_free(r_config->disp_en_gpio);
  140. error_release_reset:
  141. if (gpio_is_valid(r_config->reset_gpio))
  142. gpio_free(r_config->reset_gpio);
  143. error:
  144. return rc;
  145. }
  146. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  147. {
  148. int rc = 0;
  149. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  150. if (gpio_is_valid(r_config->reset_gpio))
  151. gpio_free(r_config->reset_gpio);
  152. if (gpio_is_valid(r_config->disp_en_gpio))
  153. gpio_free(r_config->disp_en_gpio);
  154. if (gpio_is_valid(panel->bl_config.en_gpio))
  155. gpio_free(panel->bl_config.en_gpio);
  156. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  157. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  158. if (gpio_is_valid(panel->panel_test_gpio))
  159. gpio_free(panel->panel_test_gpio);
  160. return rc;
  161. }
  162. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  163. {
  164. struct dsi_panel_reset_config *r_config;
  165. if (!panel) {
  166. DSI_ERR("Invalid panel param\n");
  167. return -EINVAL;
  168. }
  169. r_config = &panel->reset_config;
  170. if (!r_config) {
  171. DSI_ERR("Invalid panel reset configuration\n");
  172. return -EINVAL;
  173. }
  174. if (gpio_is_valid(r_config->reset_gpio)) {
  175. gpio_set_value(r_config->reset_gpio, 0);
  176. DSI_INFO("GPIO pulled low to simulate ESD\n");
  177. return 0;
  178. }
  179. DSI_ERR("failed to pull down gpio\n");
  180. return -EINVAL;
  181. }
  182. static int dsi_panel_reset(struct dsi_panel *panel)
  183. {
  184. int rc = 0;
  185. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  186. int i;
  187. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  188. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  189. if (rc) {
  190. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  191. goto exit;
  192. }
  193. }
  194. if (r_config->count) {
  195. rc = gpio_direction_output(r_config->reset_gpio,
  196. r_config->sequence[0].level);
  197. if (rc) {
  198. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  199. goto exit;
  200. }
  201. }
  202. for (i = 0; i < r_config->count; i++) {
  203. gpio_set_value(r_config->reset_gpio,
  204. r_config->sequence[i].level);
  205. if (r_config->sequence[i].sleep_ms)
  206. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  207. (r_config->sequence[i].sleep_ms * 1000) + 100);
  208. }
  209. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  210. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  211. if (rc)
  212. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  213. }
  214. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  215. bool out = true;
  216. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  217. || (panel->reset_config.mode_sel_state
  218. == MODE_GPIO_LOW))
  219. out = false;
  220. else if ((panel->reset_config.mode_sel_state
  221. == MODE_SEL_SINGLE_PORT) ||
  222. (panel->reset_config.mode_sel_state
  223. == MODE_GPIO_HIGH))
  224. out = true;
  225. rc = gpio_direction_output(
  226. panel->reset_config.lcd_mode_sel_gpio, out);
  227. if (rc)
  228. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  229. }
  230. if (gpio_is_valid(panel->panel_test_gpio)) {
  231. rc = gpio_direction_input(panel->panel_test_gpio);
  232. if (rc)
  233. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  234. rc);
  235. }
  236. exit:
  237. return rc;
  238. }
  239. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  240. {
  241. int rc = 0;
  242. struct pinctrl_state *state;
  243. if (panel->host_config.ext_bridge_mode)
  244. return 0;
  245. if (enable)
  246. state = panel->pinctrl.active;
  247. else
  248. state = panel->pinctrl.suspend;
  249. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  250. if (rc)
  251. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  252. panel->name, rc);
  253. return rc;
  254. }
  255. static int dsi_panel_power_on(struct dsi_panel *panel)
  256. {
  257. int rc = 0;
  258. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  259. if (rc) {
  260. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  261. panel->name, rc);
  262. goto exit;
  263. }
  264. rc = dsi_panel_set_pinctrl_state(panel, true);
  265. if (rc) {
  266. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  267. goto error_disable_vregs;
  268. }
  269. rc = dsi_panel_reset(panel);
  270. if (rc) {
  271. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  272. goto error_disable_gpio;
  273. }
  274. goto exit;
  275. error_disable_gpio:
  276. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  277. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  278. if (gpio_is_valid(panel->bl_config.en_gpio))
  279. gpio_set_value(panel->bl_config.en_gpio, 0);
  280. (void)dsi_panel_set_pinctrl_state(panel, false);
  281. error_disable_vregs:
  282. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  283. exit:
  284. return rc;
  285. }
  286. static int dsi_panel_power_off(struct dsi_panel *panel)
  287. {
  288. int rc = 0;
  289. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  290. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  291. if (gpio_is_valid(panel->reset_config.reset_gpio))
  292. gpio_set_value(panel->reset_config.reset_gpio, 0);
  293. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  294. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  295. if (gpio_is_valid(panel->panel_test_gpio)) {
  296. rc = gpio_direction_input(panel->panel_test_gpio);
  297. if (rc)
  298. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  299. rc);
  300. }
  301. rc = dsi_panel_set_pinctrl_state(panel, false);
  302. if (rc) {
  303. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  304. rc);
  305. }
  306. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  307. if (rc)
  308. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  309. panel->name, rc);
  310. return rc;
  311. }
  312. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  313. enum dsi_cmd_set_type type)
  314. {
  315. int rc = 0, i = 0;
  316. ssize_t len;
  317. struct dsi_cmd_desc *cmds;
  318. u32 count;
  319. enum dsi_cmd_set_state state;
  320. struct dsi_display_mode *mode;
  321. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  322. if (!panel || !panel->cur_mode)
  323. return -EINVAL;
  324. mode = panel->cur_mode;
  325. cmds = mode->priv_info->cmd_sets[type].cmds;
  326. count = mode->priv_info->cmd_sets[type].count;
  327. state = mode->priv_info->cmd_sets[type].state;
  328. if (count == 0) {
  329. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  330. panel->name, type);
  331. goto error;
  332. }
  333. for (i = 0; i < count; i++) {
  334. if (state == DSI_CMD_SET_STATE_LP)
  335. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  336. if (cmds->last_command)
  337. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  338. len = ops->transfer(panel->host, &cmds->msg);
  339. if (len < 0) {
  340. rc = len;
  341. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  342. goto error;
  343. }
  344. if (cmds->post_wait_ms)
  345. usleep_range(cmds->post_wait_ms*1000,
  346. ((cmds->post_wait_ms*1000)+10));
  347. cmds++;
  348. }
  349. error:
  350. return rc;
  351. }
  352. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  353. {
  354. int rc = 0;
  355. if (panel->host_config.ext_bridge_mode)
  356. return 0;
  357. devm_pinctrl_put(panel->pinctrl.pinctrl);
  358. return rc;
  359. }
  360. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  361. {
  362. int rc = 0;
  363. if (panel->host_config.ext_bridge_mode)
  364. return 0;
  365. /* TODO: pinctrl is defined in dsi dt node */
  366. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  367. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  368. rc = PTR_ERR(panel->pinctrl.pinctrl);
  369. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  370. goto error;
  371. }
  372. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  373. "panel_active");
  374. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  375. rc = PTR_ERR(panel->pinctrl.active);
  376. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  377. goto error;
  378. }
  379. panel->pinctrl.suspend =
  380. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  381. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  382. rc = PTR_ERR(panel->pinctrl.suspend);
  383. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  384. goto error;
  385. }
  386. error:
  387. return rc;
  388. }
  389. static int dsi_panel_wled_register(struct dsi_panel *panel,
  390. struct dsi_backlight_config *bl)
  391. {
  392. struct backlight_device *bd;
  393. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  394. if (!bd) {
  395. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  396. panel->name, -EPROBE_DEFER);
  397. return -EPROBE_DEFER;
  398. }
  399. bl->raw_bd = bd;
  400. return 0;
  401. }
  402. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  403. u32 bl_lvl)
  404. {
  405. int rc = 0;
  406. struct mipi_dsi_device *dsi;
  407. if (!panel || (bl_lvl > 0xffff)) {
  408. DSI_ERR("invalid params\n");
  409. return -EINVAL;
  410. }
  411. dsi = &panel->mipi_device;
  412. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  413. if (rc < 0)
  414. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  415. return rc;
  416. }
  417. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  418. u32 bl_lvl)
  419. {
  420. int rc = 0;
  421. u32 duty = 0;
  422. u32 period_ns = 0;
  423. struct dsi_backlight_config *bl;
  424. if (!panel) {
  425. DSI_ERR("Invalid Params\n");
  426. return -EINVAL;
  427. }
  428. bl = &panel->bl_config;
  429. if (!bl->pwm_bl) {
  430. DSI_ERR("pwm device not found\n");
  431. return -EINVAL;
  432. }
  433. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  434. duty = bl_lvl * period_ns;
  435. duty /= bl->bl_max_level;
  436. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  437. if (rc) {
  438. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  439. rc);
  440. goto error;
  441. }
  442. if (bl_lvl == 0 && bl->pwm_enabled) {
  443. pwm_disable(bl->pwm_bl);
  444. bl->pwm_enabled = false;
  445. return 0;
  446. }
  447. if (!bl->pwm_enabled) {
  448. rc = pwm_enable(bl->pwm_bl);
  449. if (rc) {
  450. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  451. rc);
  452. goto error;
  453. }
  454. bl->pwm_enabled = true;
  455. }
  456. error:
  457. return rc;
  458. }
  459. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  460. {
  461. int rc = 0;
  462. struct dsi_backlight_config *bl = &panel->bl_config;
  463. if (panel->host_config.ext_bridge_mode)
  464. return 0;
  465. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  466. switch (bl->type) {
  467. case DSI_BACKLIGHT_WLED:
  468. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  469. break;
  470. case DSI_BACKLIGHT_DCS:
  471. rc = dsi_panel_update_backlight(panel, bl_lvl);
  472. break;
  473. case DSI_BACKLIGHT_EXTERNAL:
  474. break;
  475. case DSI_BACKLIGHT_PWM:
  476. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  477. break;
  478. default:
  479. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  480. rc = -ENOTSUPP;
  481. }
  482. return rc;
  483. }
  484. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  485. {
  486. u32 cur_bl_level;
  487. struct backlight_device *bd = bl->raw_bd;
  488. /* default the brightness level to 50% */
  489. cur_bl_level = bl->bl_max_level >> 1;
  490. switch (bl->type) {
  491. case DSI_BACKLIGHT_WLED:
  492. /* Try to query the backlight level from the backlight device */
  493. if (bd->ops && bd->ops->get_brightness)
  494. cur_bl_level = bd->ops->get_brightness(bd);
  495. break;
  496. case DSI_BACKLIGHT_DCS:
  497. case DSI_BACKLIGHT_EXTERNAL:
  498. case DSI_BACKLIGHT_PWM:
  499. default:
  500. /*
  501. * Ideally, we should read the backlight level from the
  502. * panel. For now, just set it default value.
  503. */
  504. break;
  505. }
  506. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  507. return cur_bl_level;
  508. }
  509. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  510. {
  511. struct dsi_backlight_config *bl = &panel->bl_config;
  512. bl->bl_level = dsi_panel_get_brightness(bl);
  513. }
  514. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  515. {
  516. int rc = 0;
  517. struct dsi_backlight_config *bl = &panel->bl_config;
  518. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  519. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  520. rc = PTR_ERR(bl->pwm_bl);
  521. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  522. rc);
  523. return rc;
  524. }
  525. return 0;
  526. }
  527. static int dsi_panel_bl_register(struct dsi_panel *panel)
  528. {
  529. int rc = 0;
  530. struct dsi_backlight_config *bl = &panel->bl_config;
  531. if (panel->host_config.ext_bridge_mode)
  532. return 0;
  533. switch (bl->type) {
  534. case DSI_BACKLIGHT_WLED:
  535. rc = dsi_panel_wled_register(panel, bl);
  536. break;
  537. case DSI_BACKLIGHT_DCS:
  538. break;
  539. case DSI_BACKLIGHT_EXTERNAL:
  540. break;
  541. case DSI_BACKLIGHT_PWM:
  542. rc = dsi_panel_pwm_register(panel);
  543. break;
  544. default:
  545. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  546. rc = -ENOTSUPP;
  547. goto error;
  548. }
  549. error:
  550. return rc;
  551. }
  552. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  553. {
  554. struct dsi_backlight_config *bl = &panel->bl_config;
  555. devm_pwm_put(panel->parent, bl->pwm_bl);
  556. }
  557. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  558. {
  559. int rc = 0;
  560. struct dsi_backlight_config *bl = &panel->bl_config;
  561. if (panel->host_config.ext_bridge_mode)
  562. return 0;
  563. switch (bl->type) {
  564. case DSI_BACKLIGHT_WLED:
  565. break;
  566. case DSI_BACKLIGHT_DCS:
  567. break;
  568. case DSI_BACKLIGHT_EXTERNAL:
  569. break;
  570. case DSI_BACKLIGHT_PWM:
  571. dsi_panel_pwm_unregister(panel);
  572. break;
  573. default:
  574. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  575. rc = -ENOTSUPP;
  576. goto error;
  577. }
  578. error:
  579. return rc;
  580. }
  581. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  582. struct dsi_parser_utils *utils)
  583. {
  584. int rc = 0;
  585. u64 tmp64 = 0;
  586. struct dsi_display_mode *display_mode;
  587. struct dsi_display_mode_priv_info *priv_info;
  588. display_mode = container_of(mode, struct dsi_display_mode, timing);
  589. priv_info = display_mode->priv_info;
  590. rc = utils->read_u64(utils->data,
  591. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  592. if (rc == -EOVERFLOW) {
  593. tmp64 = 0;
  594. rc = utils->read_u32(utils->data,
  595. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  596. }
  597. mode->clk_rate_hz = !rc ? tmp64 : 0;
  598. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  599. mode->pclk_scale.numer = 1;
  600. mode->pclk_scale.denom = 1;
  601. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  602. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  603. &mode->mdp_transfer_time_us);
  604. if (!rc)
  605. display_mode->priv_info->mdp_transfer_time_us =
  606. mode->mdp_transfer_time_us;
  607. else
  608. display_mode->priv_info->mdp_transfer_time_us = 0;
  609. rc = utils->read_u32(utils->data,
  610. "qcom,mdss-dsi-panel-framerate",
  611. &mode->refresh_rate);
  612. if (rc) {
  613. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  614. rc);
  615. goto error;
  616. }
  617. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  618. &mode->h_active);
  619. if (rc) {
  620. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  621. rc);
  622. goto error;
  623. }
  624. rc = utils->read_u32(utils->data,
  625. "qcom,mdss-dsi-h-front-porch",
  626. &mode->h_front_porch);
  627. if (rc) {
  628. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  629. rc);
  630. goto error;
  631. }
  632. rc = utils->read_u32(utils->data,
  633. "qcom,mdss-dsi-h-back-porch",
  634. &mode->h_back_porch);
  635. if (rc) {
  636. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  637. rc);
  638. goto error;
  639. }
  640. rc = utils->read_u32(utils->data,
  641. "qcom,mdss-dsi-h-pulse-width",
  642. &mode->h_sync_width);
  643. if (rc) {
  644. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  645. rc);
  646. goto error;
  647. }
  648. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  649. &mode->h_skew);
  650. if (rc)
  651. DSI_ERR("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  652. rc);
  653. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  654. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  655. mode->h_sync_width);
  656. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  657. &mode->v_active);
  658. if (rc) {
  659. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  660. rc);
  661. goto error;
  662. }
  663. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  664. &mode->v_back_porch);
  665. if (rc) {
  666. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  667. rc);
  668. goto error;
  669. }
  670. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  671. &mode->v_front_porch);
  672. if (rc) {
  673. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  674. rc);
  675. goto error;
  676. }
  677. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  678. &mode->v_sync_width);
  679. if (rc) {
  680. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  681. rc);
  682. goto error;
  683. }
  684. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  685. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  686. mode->v_sync_width);
  687. error:
  688. return rc;
  689. }
  690. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  691. struct dsi_parser_utils *utils,
  692. const char *name)
  693. {
  694. int rc = 0;
  695. u32 bpp = 0;
  696. enum dsi_pixel_format fmt;
  697. const char *packing;
  698. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  699. if (rc) {
  700. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  701. name, rc);
  702. return rc;
  703. }
  704. host->bpp = bpp;
  705. switch (bpp) {
  706. case 3:
  707. fmt = DSI_PIXEL_FORMAT_RGB111;
  708. break;
  709. case 8:
  710. fmt = DSI_PIXEL_FORMAT_RGB332;
  711. break;
  712. case 12:
  713. fmt = DSI_PIXEL_FORMAT_RGB444;
  714. break;
  715. case 16:
  716. fmt = DSI_PIXEL_FORMAT_RGB565;
  717. break;
  718. case 18:
  719. fmt = DSI_PIXEL_FORMAT_RGB666;
  720. break;
  721. case 24:
  722. default:
  723. fmt = DSI_PIXEL_FORMAT_RGB888;
  724. break;
  725. }
  726. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  727. packing = utils->get_property(utils->data,
  728. "qcom,mdss-dsi-pixel-packing",
  729. NULL);
  730. if (packing && !strcmp(packing, "loose"))
  731. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  732. }
  733. host->dst_format = fmt;
  734. return rc;
  735. }
  736. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  737. struct dsi_parser_utils *utils,
  738. const char *name)
  739. {
  740. int rc = 0;
  741. bool lane_enabled;
  742. u32 num_of_lanes = 0;
  743. lane_enabled = utils->read_bool(utils->data,
  744. "qcom,mdss-dsi-lane-0-state");
  745. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  746. lane_enabled = utils->read_bool(utils->data,
  747. "qcom,mdss-dsi-lane-1-state");
  748. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  749. lane_enabled = utils->read_bool(utils->data,
  750. "qcom,mdss-dsi-lane-2-state");
  751. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  752. lane_enabled = utils->read_bool(utils->data,
  753. "qcom,mdss-dsi-lane-3-state");
  754. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  755. if (host->data_lanes & DSI_DATA_LANE_0)
  756. num_of_lanes++;
  757. if (host->data_lanes & DSI_DATA_LANE_1)
  758. num_of_lanes++;
  759. if (host->data_lanes & DSI_DATA_LANE_2)
  760. num_of_lanes++;
  761. if (host->data_lanes & DSI_DATA_LANE_3)
  762. num_of_lanes++;
  763. host->num_data_lanes = num_of_lanes;
  764. if (host->data_lanes == 0) {
  765. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  766. rc = -EINVAL;
  767. }
  768. return rc;
  769. }
  770. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  771. struct dsi_parser_utils *utils,
  772. const char *name)
  773. {
  774. int rc = 0;
  775. const char *swap_mode;
  776. swap_mode = utils->get_property(utils->data,
  777. "qcom,mdss-dsi-color-order", NULL);
  778. if (swap_mode) {
  779. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  780. host->swap_mode = DSI_COLOR_SWAP_RGB;
  781. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  782. host->swap_mode = DSI_COLOR_SWAP_RBG;
  783. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  784. host->swap_mode = DSI_COLOR_SWAP_BRG;
  785. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  786. host->swap_mode = DSI_COLOR_SWAP_GRB;
  787. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  788. host->swap_mode = DSI_COLOR_SWAP_GBR;
  789. } else {
  790. DSI_ERR("[%s] Unrecognized color order-%s\n",
  791. name, swap_mode);
  792. rc = -EINVAL;
  793. }
  794. } else {
  795. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  796. host->swap_mode = DSI_COLOR_SWAP_RGB;
  797. }
  798. /* bit swap on color channel is not defined in dt */
  799. host->bit_swap_red = false;
  800. host->bit_swap_green = false;
  801. host->bit_swap_blue = false;
  802. return rc;
  803. }
  804. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  805. struct dsi_parser_utils *utils,
  806. const char *name)
  807. {
  808. const char *trig;
  809. int rc = 0;
  810. trig = utils->get_property(utils->data,
  811. "qcom,mdss-dsi-mdp-trigger", NULL);
  812. if (trig) {
  813. if (!strcmp(trig, "none")) {
  814. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  815. } else if (!strcmp(trig, "trigger_te")) {
  816. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  817. } else if (!strcmp(trig, "trigger_sw")) {
  818. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  819. } else if (!strcmp(trig, "trigger_sw_te")) {
  820. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  821. } else {
  822. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  823. name, trig);
  824. rc = -EINVAL;
  825. }
  826. } else {
  827. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  828. name);
  829. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  830. }
  831. trig = utils->get_property(utils->data,
  832. "qcom,mdss-dsi-dma-trigger", NULL);
  833. if (trig) {
  834. if (!strcmp(trig, "none")) {
  835. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  836. } else if (!strcmp(trig, "trigger_te")) {
  837. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  838. } else if (!strcmp(trig, "trigger_sw")) {
  839. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  840. } else if (!strcmp(trig, "trigger_sw_seof")) {
  841. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  842. } else if (!strcmp(trig, "trigger_sw_te")) {
  843. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  844. } else {
  845. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  846. name, trig);
  847. rc = -EINVAL;
  848. }
  849. } else {
  850. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  851. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  852. }
  853. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  854. &host->te_mode);
  855. if (rc) {
  856. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  857. host->te_mode = 1;
  858. rc = 0;
  859. }
  860. return rc;
  861. }
  862. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  863. struct dsi_parser_utils *utils,
  864. const char *name)
  865. {
  866. u32 val = 0;
  867. int rc = 0;
  868. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  869. if (!rc) {
  870. host->t_clk_post = val;
  871. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  872. }
  873. val = 0;
  874. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  875. if (!rc) {
  876. host->t_clk_pre = val;
  877. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  878. }
  879. host->ignore_rx_eot = utils->read_bool(utils->data,
  880. "qcom,mdss-dsi-rx-eot-ignore");
  881. host->append_tx_eot = utils->read_bool(utils->data,
  882. "qcom,mdss-dsi-tx-eot-append");
  883. host->ext_bridge_mode = utils->read_bool(utils->data,
  884. "qcom,mdss-dsi-ext-bridge-mode");
  885. host->force_hs_clk_lane = utils->read_bool(utils->data,
  886. "qcom,mdss-dsi-force-clock-lane-hs");
  887. return 0;
  888. }
  889. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  890. struct dsi_parser_utils *utils,
  891. const char *name)
  892. {
  893. int rc = 0;
  894. u32 val = 0;
  895. bool supported = false;
  896. struct dsi_split_link_config *split_link = &host->split_link;
  897. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  898. if (!supported) {
  899. DSI_DEBUG("[%s] Split link is not supported\n", name);
  900. split_link->split_link_enabled = false;
  901. return;
  902. }
  903. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  904. if (rc || val < 1) {
  905. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  906. split_link->num_sublinks = 2;
  907. } else {
  908. split_link->num_sublinks = val;
  909. }
  910. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  911. if (rc || val < 1) {
  912. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  913. split_link->lanes_per_sublink = 2;
  914. } else {
  915. split_link->lanes_per_sublink = val;
  916. }
  917. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  918. split_link->num_sublinks, split_link->lanes_per_sublink);
  919. split_link->split_link_enabled = true;
  920. }
  921. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  922. {
  923. int rc = 0;
  924. struct dsi_parser_utils *utils = &panel->utils;
  925. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  926. panel->name);
  927. if (rc) {
  928. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  929. panel->name, rc);
  930. goto error;
  931. }
  932. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  933. panel->name);
  934. if (rc) {
  935. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  936. panel->name, rc);
  937. goto error;
  938. }
  939. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  940. panel->name);
  941. if (rc) {
  942. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  943. panel->name, rc);
  944. goto error;
  945. }
  946. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  947. panel->name);
  948. if (rc) {
  949. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  950. panel->name, rc);
  951. goto error;
  952. }
  953. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  954. panel->name);
  955. if (rc) {
  956. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  957. panel->name, rc);
  958. goto error;
  959. }
  960. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  961. panel->name);
  962. error:
  963. return rc;
  964. }
  965. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  966. struct device_node *of_node)
  967. {
  968. int rc = 0;
  969. u32 val = 0;
  970. rc = of_property_read_u32(of_node,
  971. "qcom,mdss-dsi-qsync-min-refresh-rate",
  972. &val);
  973. if (rc)
  974. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  975. panel->name, rc);
  976. panel->qsync_min_fps = val;
  977. return rc;
  978. }
  979. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  980. {
  981. int rc = 0;
  982. bool supported = false;
  983. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  984. struct dsi_parser_utils *utils = &panel->utils;
  985. const char *name = panel->name;
  986. const char *type;
  987. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  988. if (!supported) {
  989. dyn_clk_caps->dyn_clk_support = false;
  990. return rc;
  991. }
  992. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  993. "qcom,dsi-dyn-clk-list");
  994. if (dyn_clk_caps->bit_clk_list_len < 1) {
  995. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  996. return -EINVAL;
  997. }
  998. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  999. sizeof(u32), GFP_KERNEL);
  1000. if (!dyn_clk_caps->bit_clk_list)
  1001. return -ENOMEM;
  1002. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1003. dyn_clk_caps->bit_clk_list,
  1004. dyn_clk_caps->bit_clk_list_len);
  1005. if (rc) {
  1006. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1007. return -EINVAL;
  1008. }
  1009. dyn_clk_caps->dyn_clk_support = true;
  1010. type = utils->get_property(utils->data,
  1011. "qcom,dsi-dyn-clk-type", NULL);
  1012. if (!type) {
  1013. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1014. dyn_clk_caps->maintain_const_fps = false;
  1015. return 0;
  1016. }
  1017. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1018. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1019. dyn_clk_caps->maintain_const_fps = true;
  1020. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1021. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1022. dyn_clk_caps->maintain_const_fps = true;
  1023. } else {
  1024. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1025. dyn_clk_caps->maintain_const_fps = false;
  1026. }
  1027. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1028. return 0;
  1029. }
  1030. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1031. {
  1032. int rc = 0;
  1033. bool supported = false;
  1034. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1035. struct dsi_parser_utils *utils = &panel->utils;
  1036. const char *name = panel->name;
  1037. const char *type;
  1038. u32 i;
  1039. supported = utils->read_bool(utils->data,
  1040. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1041. if (!supported) {
  1042. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1043. dfps_caps->dfps_support = false;
  1044. return rc;
  1045. }
  1046. type = utils->get_property(utils->data,
  1047. "qcom,mdss-dsi-pan-fps-update", NULL);
  1048. if (!type) {
  1049. DSI_ERR("[%s] dfps type not defined\n", name);
  1050. rc = -EINVAL;
  1051. goto error;
  1052. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1053. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1054. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1055. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1056. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1057. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1058. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1059. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1060. } else {
  1061. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1062. rc = -EINVAL;
  1063. goto error;
  1064. }
  1065. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1066. "qcom,dsi-supported-dfps-list");
  1067. if (dfps_caps->dfps_list_len < 1) {
  1068. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1069. rc = -EINVAL;
  1070. goto error;
  1071. }
  1072. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1073. GFP_KERNEL);
  1074. if (!dfps_caps->dfps_list) {
  1075. rc = -ENOMEM;
  1076. goto error;
  1077. }
  1078. rc = utils->read_u32_array(utils->data,
  1079. "qcom,dsi-supported-dfps-list",
  1080. dfps_caps->dfps_list,
  1081. dfps_caps->dfps_list_len);
  1082. if (rc) {
  1083. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1084. rc = -EINVAL;
  1085. goto error;
  1086. }
  1087. dfps_caps->dfps_support = true;
  1088. /* calculate max and min fps */
  1089. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1090. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1091. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1092. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1093. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1094. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1095. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1096. }
  1097. error:
  1098. return rc;
  1099. }
  1100. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1101. struct dsi_parser_utils *utils,
  1102. const char *name)
  1103. {
  1104. int rc = 0;
  1105. const char *traffic_mode;
  1106. u32 vc_id = 0;
  1107. u32 val = 0;
  1108. u32 line_no = 0;
  1109. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1110. if (rc) {
  1111. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1112. cfg->pulse_mode_hsa_he = false;
  1113. } else if (val == 1) {
  1114. cfg->pulse_mode_hsa_he = true;
  1115. } else if (val == 0) {
  1116. cfg->pulse_mode_hsa_he = false;
  1117. } else {
  1118. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1119. name);
  1120. rc = -EINVAL;
  1121. goto error;
  1122. }
  1123. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1124. "qcom,mdss-dsi-hfp-power-mode");
  1125. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1126. "qcom,mdss-dsi-hbp-power-mode");
  1127. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1128. "qcom,mdss-dsi-hsa-power-mode");
  1129. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1130. "qcom,mdss-dsi-last-line-interleave");
  1131. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1132. "qcom,mdss-dsi-bllp-eof-power-mode");
  1133. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1134. "qcom,mdss-dsi-bllp-power-mode");
  1135. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1136. "qcom,mdss-dsi-force-clock-lane-hs");
  1137. traffic_mode = utils->get_property(utils->data,
  1138. "qcom,mdss-dsi-traffic-mode",
  1139. NULL);
  1140. if (!traffic_mode) {
  1141. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1142. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1143. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1144. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1145. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1146. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1147. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1148. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1149. } else {
  1150. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1151. traffic_mode);
  1152. rc = -EINVAL;
  1153. goto error;
  1154. }
  1155. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1156. &vc_id);
  1157. if (rc) {
  1158. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1159. cfg->vc_id = 0;
  1160. } else {
  1161. cfg->vc_id = vc_id;
  1162. }
  1163. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1164. &line_no);
  1165. if (rc) {
  1166. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1167. cfg->dma_sched_line = 0x1;
  1168. /* do not fail since we have default value */
  1169. rc = 0;
  1170. } else {
  1171. cfg->dma_sched_line = line_no;
  1172. }
  1173. error:
  1174. return rc;
  1175. }
  1176. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1177. struct dsi_parser_utils *utils,
  1178. const char *name)
  1179. {
  1180. u32 val = 0;
  1181. int rc = 0;
  1182. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1183. if (rc) {
  1184. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1185. cfg->wr_mem_start = 0x2C;
  1186. } else {
  1187. cfg->wr_mem_start = val;
  1188. }
  1189. val = 0;
  1190. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1191. &val);
  1192. if (rc) {
  1193. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1194. cfg->wr_mem_continue = 0x3C;
  1195. } else {
  1196. cfg->wr_mem_continue = val;
  1197. }
  1198. /* TODO: fix following */
  1199. cfg->max_cmd_packets_interleave = 0;
  1200. val = 0;
  1201. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1202. &val);
  1203. if (rc) {
  1204. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1205. cfg->insert_dcs_command = true;
  1206. } else if (val == 1) {
  1207. cfg->insert_dcs_command = true;
  1208. } else if (val == 0) {
  1209. cfg->insert_dcs_command = false;
  1210. } else {
  1211. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1212. name);
  1213. rc = -EINVAL;
  1214. goto error;
  1215. }
  1216. error:
  1217. return rc;
  1218. }
  1219. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1220. {
  1221. int rc = 0;
  1222. struct dsi_parser_utils *utils = &panel->utils;
  1223. bool panel_mode_switch_enabled;
  1224. enum dsi_op_mode panel_mode;
  1225. const char *mode;
  1226. mode = utils->get_property(utils->data,
  1227. "qcom,mdss-dsi-panel-type", NULL);
  1228. if (!mode) {
  1229. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1230. panel_mode = DSI_OP_VIDEO_MODE;
  1231. } else if (!strcmp(mode, "dsi_video_mode")) {
  1232. panel_mode = DSI_OP_VIDEO_MODE;
  1233. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1234. panel_mode = DSI_OP_CMD_MODE;
  1235. } else {
  1236. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1237. rc = -EINVAL;
  1238. goto error;
  1239. }
  1240. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1241. "qcom,mdss-dsi-panel-mode-switch");
  1242. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1243. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1244. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1245. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1246. utils,
  1247. panel->name);
  1248. if (rc) {
  1249. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1250. panel->name, rc);
  1251. goto error;
  1252. }
  1253. }
  1254. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1255. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1256. utils,
  1257. panel->name);
  1258. if (rc) {
  1259. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1260. panel->name, rc);
  1261. goto error;
  1262. }
  1263. }
  1264. panel->poms_align_vsync = utils->read_bool(utils->data,
  1265. "qcom,poms-align-panel-vsync");
  1266. panel->panel_mode = panel_mode;
  1267. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1268. error:
  1269. return rc;
  1270. }
  1271. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1272. {
  1273. int rc = 0;
  1274. u32 val = 0;
  1275. const char *str;
  1276. struct dsi_panel_phy_props *props = &panel->phy_props;
  1277. struct dsi_parser_utils *utils = &panel->utils;
  1278. const char *name = panel->name;
  1279. rc = utils->read_u32(utils->data,
  1280. "qcom,mdss-pan-physical-width-dimension", &val);
  1281. if (rc) {
  1282. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1283. props->panel_width_mm = 0;
  1284. rc = 0;
  1285. } else {
  1286. props->panel_width_mm = val;
  1287. }
  1288. rc = utils->read_u32(utils->data,
  1289. "qcom,mdss-pan-physical-height-dimension",
  1290. &val);
  1291. if (rc) {
  1292. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1293. props->panel_height_mm = 0;
  1294. rc = 0;
  1295. } else {
  1296. props->panel_height_mm = val;
  1297. }
  1298. str = utils->get_property(utils->data,
  1299. "qcom,mdss-dsi-panel-orientation", NULL);
  1300. if (!str) {
  1301. props->rotation = DSI_PANEL_ROTATE_NONE;
  1302. } else if (!strcmp(str, "180")) {
  1303. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1304. } else if (!strcmp(str, "hflip")) {
  1305. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1306. } else if (!strcmp(str, "vflip")) {
  1307. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1308. } else {
  1309. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1310. rc = -EINVAL;
  1311. goto error;
  1312. }
  1313. error:
  1314. return rc;
  1315. }
  1316. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1317. "qcom,mdss-dsi-pre-on-command",
  1318. "qcom,mdss-dsi-on-command",
  1319. "qcom,mdss-dsi-post-panel-on-command",
  1320. "qcom,mdss-dsi-pre-off-command",
  1321. "qcom,mdss-dsi-off-command",
  1322. "qcom,mdss-dsi-post-off-command",
  1323. "qcom,mdss-dsi-pre-res-switch",
  1324. "qcom,mdss-dsi-res-switch",
  1325. "qcom,mdss-dsi-post-res-switch",
  1326. "qcom,cmd-to-video-mode-switch-commands",
  1327. "qcom,cmd-to-video-mode-post-switch-commands",
  1328. "qcom,video-to-cmd-mode-switch-commands",
  1329. "qcom,video-to-cmd-mode-post-switch-commands",
  1330. "qcom,mdss-dsi-panel-status-command",
  1331. "qcom,mdss-dsi-lp1-command",
  1332. "qcom,mdss-dsi-lp2-command",
  1333. "qcom,mdss-dsi-nolp-command",
  1334. "PPS not parsed from DTSI, generated dynamically",
  1335. "ROI not parsed from DTSI, generated dynamically",
  1336. "qcom,mdss-dsi-timing-switch-command",
  1337. "qcom,mdss-dsi-post-mode-switch-on-command",
  1338. "qcom,mdss-dsi-qsync-on-commands",
  1339. "qcom,mdss-dsi-qsync-off-commands",
  1340. };
  1341. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1342. "qcom,mdss-dsi-pre-on-command-state",
  1343. "qcom,mdss-dsi-on-command-state",
  1344. "qcom,mdss-dsi-post-on-command-state",
  1345. "qcom,mdss-dsi-pre-off-command-state",
  1346. "qcom,mdss-dsi-off-command-state",
  1347. "qcom,mdss-dsi-post-off-command-state",
  1348. "qcom,mdss-dsi-pre-res-switch-state",
  1349. "qcom,mdss-dsi-res-switch-state",
  1350. "qcom,mdss-dsi-post-res-switch-state",
  1351. "qcom,cmd-to-video-mode-switch-commands-state",
  1352. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1353. "qcom,video-to-cmd-mode-switch-commands-state",
  1354. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1355. "qcom,mdss-dsi-panel-status-command-state",
  1356. "qcom,mdss-dsi-lp1-command-state",
  1357. "qcom,mdss-dsi-lp2-command-state",
  1358. "qcom,mdss-dsi-nolp-command-state",
  1359. "PPS not parsed from DTSI, generated dynamically",
  1360. "ROI not parsed from DTSI, generated dynamically",
  1361. "qcom,mdss-dsi-timing-switch-command-state",
  1362. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1363. "qcom,mdss-dsi-qsync-on-commands-state",
  1364. "qcom,mdss-dsi-qsync-off-commands-state",
  1365. };
  1366. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1367. {
  1368. const u32 cmd_set_min_size = 7;
  1369. u32 count = 0;
  1370. u32 packet_length;
  1371. u32 tmp;
  1372. while (length >= cmd_set_min_size) {
  1373. packet_length = cmd_set_min_size;
  1374. tmp = ((data[5] << 8) | (data[6]));
  1375. packet_length += tmp;
  1376. if (packet_length > length) {
  1377. DSI_ERR("format error\n");
  1378. return -EINVAL;
  1379. }
  1380. length -= packet_length;
  1381. data += packet_length;
  1382. count++;
  1383. }
  1384. *cnt = count;
  1385. return 0;
  1386. }
  1387. static int dsi_panel_create_cmd_packets(const char *data,
  1388. u32 length,
  1389. u32 count,
  1390. struct dsi_cmd_desc *cmd)
  1391. {
  1392. int rc = 0;
  1393. int i, j;
  1394. u8 *payload;
  1395. for (i = 0; i < count; i++) {
  1396. u32 size;
  1397. cmd[i].msg.type = data[0];
  1398. cmd[i].last_command = (data[1] == 1);
  1399. cmd[i].msg.channel = data[2];
  1400. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1401. cmd[i].msg.ctrl = 0;
  1402. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1403. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1404. size = cmd[i].msg.tx_len * sizeof(u8);
  1405. payload = kzalloc(size, GFP_KERNEL);
  1406. if (!payload) {
  1407. rc = -ENOMEM;
  1408. goto error_free_payloads;
  1409. }
  1410. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1411. payload[j] = data[7 + j];
  1412. cmd[i].msg.tx_buf = payload;
  1413. data += (7 + cmd[i].msg.tx_len);
  1414. }
  1415. return rc;
  1416. error_free_payloads:
  1417. for (i = i - 1; i >= 0; i--) {
  1418. cmd--;
  1419. kfree(cmd->msg.tx_buf);
  1420. }
  1421. return rc;
  1422. }
  1423. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1424. {
  1425. u32 i = 0;
  1426. struct dsi_cmd_desc *cmd;
  1427. for (i = 0; i < set->count; i++) {
  1428. cmd = &set->cmds[i];
  1429. kfree(cmd->msg.tx_buf);
  1430. }
  1431. }
  1432. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1433. {
  1434. kfree(set->cmds);
  1435. }
  1436. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1437. u32 packet_count)
  1438. {
  1439. u32 size;
  1440. size = packet_count * sizeof(*cmd->cmds);
  1441. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1442. if (!cmd->cmds)
  1443. return -ENOMEM;
  1444. cmd->count = packet_count;
  1445. return 0;
  1446. }
  1447. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1448. enum dsi_cmd_set_type type,
  1449. struct dsi_parser_utils *utils)
  1450. {
  1451. int rc = 0;
  1452. u32 length = 0;
  1453. const char *data;
  1454. const char *state;
  1455. u32 packet_count = 0;
  1456. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1457. &length);
  1458. if (!data) {
  1459. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1460. rc = -ENOTSUPP;
  1461. goto error;
  1462. }
  1463. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1464. cmd_set_prop_map[type], length);
  1465. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1466. 8, 1, data, length, false);
  1467. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1468. if (rc) {
  1469. DSI_ERR("commands failed, rc=%d\n", rc);
  1470. goto error;
  1471. }
  1472. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1473. packet_count, length);
  1474. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1475. if (rc) {
  1476. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1477. goto error;
  1478. }
  1479. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1480. cmd->cmds);
  1481. if (rc) {
  1482. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1483. goto error_free_mem;
  1484. }
  1485. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1486. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1487. cmd->state = DSI_CMD_SET_STATE_LP;
  1488. } else if (!strcmp(state, "dsi_hs_mode")) {
  1489. cmd->state = DSI_CMD_SET_STATE_HS;
  1490. } else {
  1491. DSI_ERR("[%s] command state unrecognized-%s\n",
  1492. cmd_set_state_map[type], state);
  1493. goto error_free_mem;
  1494. }
  1495. return rc;
  1496. error_free_mem:
  1497. kfree(cmd->cmds);
  1498. cmd->cmds = NULL;
  1499. error:
  1500. return rc;
  1501. }
  1502. static int dsi_panel_parse_cmd_sets(
  1503. struct dsi_display_mode_priv_info *priv_info,
  1504. struct dsi_parser_utils *utils)
  1505. {
  1506. int rc = 0;
  1507. struct dsi_panel_cmd_set *set;
  1508. u32 i;
  1509. if (!priv_info) {
  1510. DSI_ERR("invalid mode priv info\n");
  1511. return -EINVAL;
  1512. }
  1513. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1514. set = &priv_info->cmd_sets[i];
  1515. set->type = i;
  1516. set->count = 0;
  1517. if (i == DSI_CMD_SET_PPS) {
  1518. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1519. if (rc)
  1520. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1521. i, rc);
  1522. set->state = DSI_CMD_SET_STATE_LP;
  1523. } else {
  1524. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1525. if (rc)
  1526. DSI_DEBUG("failed to parse set %d\n", i);
  1527. }
  1528. }
  1529. rc = 0;
  1530. return rc;
  1531. }
  1532. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1533. {
  1534. int rc = 0;
  1535. int i;
  1536. u32 length = 0;
  1537. u32 count = 0;
  1538. u32 size = 0;
  1539. u32 *arr_32 = NULL;
  1540. const u32 *arr;
  1541. struct dsi_parser_utils *utils = &panel->utils;
  1542. struct dsi_reset_seq *seq;
  1543. if (panel->host_config.ext_bridge_mode)
  1544. return 0;
  1545. arr = utils->get_property(utils->data,
  1546. "qcom,mdss-dsi-reset-sequence", &length);
  1547. if (!arr) {
  1548. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1549. rc = -EINVAL;
  1550. goto error;
  1551. }
  1552. if (length & 0x1) {
  1553. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1554. panel->name);
  1555. rc = -EINVAL;
  1556. goto error;
  1557. }
  1558. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1559. length = length / sizeof(u32);
  1560. size = length * sizeof(u32);
  1561. arr_32 = kzalloc(size, GFP_KERNEL);
  1562. if (!arr_32) {
  1563. rc = -ENOMEM;
  1564. goto error;
  1565. }
  1566. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1567. arr_32, length);
  1568. if (rc) {
  1569. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1570. goto error_free_arr_32;
  1571. }
  1572. count = length / 2;
  1573. size = count * sizeof(*seq);
  1574. seq = kzalloc(size, GFP_KERNEL);
  1575. if (!seq) {
  1576. rc = -ENOMEM;
  1577. goto error_free_arr_32;
  1578. }
  1579. panel->reset_config.sequence = seq;
  1580. panel->reset_config.count = count;
  1581. for (i = 0; i < length; i += 2) {
  1582. seq->level = arr_32[i];
  1583. seq->sleep_ms = arr_32[i + 1];
  1584. seq++;
  1585. }
  1586. error_free_arr_32:
  1587. kfree(arr_32);
  1588. error:
  1589. return rc;
  1590. }
  1591. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1592. {
  1593. struct dsi_parser_utils *utils = &panel->utils;
  1594. const char *string;
  1595. int i, rc = 0;
  1596. panel->ulps_feature_enabled =
  1597. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1598. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1599. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1600. panel->ulps_suspend_enabled =
  1601. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1602. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1603. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1604. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1605. "qcom,mdss-dsi-te-using-wd");
  1606. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1607. "qcom,cmd-sync-wait-broadcast");
  1608. panel->lp11_init = utils->read_bool(utils->data,
  1609. "qcom,mdss-dsi-lp11-init");
  1610. panel->spr_info.enable = false;
  1611. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1612. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1613. if (!rc) {
  1614. // find match for pack-type string
  1615. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1616. if (msm_spr_pack_type_str[i] &&
  1617. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1618. panel->spr_info.enable = true;
  1619. panel->spr_info.pack_type = i;
  1620. break;
  1621. }
  1622. }
  1623. }
  1624. pr_debug("%s source side spr packing, pack-type %s\n",
  1625. panel->spr_info.enable ? "enable" : "disable",
  1626. panel->spr_info.enable ?
  1627. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1628. return 0;
  1629. }
  1630. static int dsi_panel_parse_jitter_config(
  1631. struct dsi_display_mode *mode,
  1632. struct dsi_parser_utils *utils)
  1633. {
  1634. int rc;
  1635. struct dsi_display_mode_priv_info *priv_info;
  1636. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1637. u64 jitter_val = 0;
  1638. priv_info = mode->priv_info;
  1639. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1640. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1641. if (rc) {
  1642. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1643. } else {
  1644. jitter_val = jitter[0];
  1645. jitter_val = div_u64(jitter_val, jitter[1]);
  1646. }
  1647. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1648. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1649. priv_info->panel_jitter_denom =
  1650. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1651. } else {
  1652. priv_info->panel_jitter_numer = jitter[0];
  1653. priv_info->panel_jitter_denom = jitter[1];
  1654. }
  1655. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1656. &priv_info->panel_prefill_lines);
  1657. if (rc) {
  1658. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1659. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1660. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1661. } else if (priv_info->panel_prefill_lines >=
  1662. DSI_V_TOTAL(&mode->timing)) {
  1663. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1664. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1665. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1666. }
  1667. return 0;
  1668. }
  1669. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1670. {
  1671. int rc = 0;
  1672. char *supply_name;
  1673. if (panel->host_config.ext_bridge_mode)
  1674. return 0;
  1675. if (!strcmp(panel->type, "primary"))
  1676. supply_name = "qcom,panel-supply-entries";
  1677. else
  1678. supply_name = "qcom,panel-sec-supply-entries";
  1679. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1680. &panel->power_info, supply_name);
  1681. if (rc) {
  1682. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1683. goto error;
  1684. }
  1685. error:
  1686. return rc;
  1687. }
  1688. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1689. {
  1690. int rc = 0;
  1691. const char *data;
  1692. struct dsi_parser_utils *utils = &panel->utils;
  1693. char *reset_gpio_name, *mode_set_gpio_name;
  1694. if (!strcmp(panel->type, "primary")) {
  1695. reset_gpio_name = "qcom,platform-reset-gpio";
  1696. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1697. } else {
  1698. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1699. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1700. }
  1701. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1702. reset_gpio_name, 0);
  1703. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1704. !panel->host_config.ext_bridge_mode) {
  1705. rc = panel->reset_config.reset_gpio;
  1706. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1707. goto error;
  1708. }
  1709. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1710. "qcom,5v-boost-gpio",
  1711. 0);
  1712. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1713. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1714. panel->name, rc);
  1715. panel->reset_config.disp_en_gpio =
  1716. utils->get_named_gpio(utils->data,
  1717. "qcom,platform-en-gpio", 0);
  1718. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1719. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1720. panel->name, rc);
  1721. }
  1722. }
  1723. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1724. utils->data, mode_set_gpio_name, 0);
  1725. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1726. DSI_DEBUG("mode gpio not specified\n");
  1727. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1728. data = utils->get_property(utils->data,
  1729. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1730. if (data) {
  1731. if (!strcmp(data, "single_port"))
  1732. panel->reset_config.mode_sel_state =
  1733. MODE_SEL_SINGLE_PORT;
  1734. else if (!strcmp(data, "dual_port"))
  1735. panel->reset_config.mode_sel_state =
  1736. MODE_SEL_DUAL_PORT;
  1737. else if (!strcmp(data, "high"))
  1738. panel->reset_config.mode_sel_state =
  1739. MODE_GPIO_HIGH;
  1740. else if (!strcmp(data, "low"))
  1741. panel->reset_config.mode_sel_state =
  1742. MODE_GPIO_LOW;
  1743. } else {
  1744. /* Set default mode as SPLIT mode */
  1745. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1746. }
  1747. /* TODO: release memory */
  1748. rc = dsi_panel_parse_reset_sequence(panel);
  1749. if (rc) {
  1750. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1751. panel->name, rc);
  1752. goto error;
  1753. }
  1754. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1755. "qcom,mdss-dsi-panel-test-pin",
  1756. 0);
  1757. if (!gpio_is_valid(panel->panel_test_gpio))
  1758. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1759. __LINE__);
  1760. error:
  1761. return rc;
  1762. }
  1763. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1764. {
  1765. int rc = 0;
  1766. u32 val;
  1767. struct dsi_backlight_config *config = &panel->bl_config;
  1768. struct dsi_parser_utils *utils = &panel->utils;
  1769. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1770. &val);
  1771. if (rc) {
  1772. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1773. goto error;
  1774. }
  1775. config->pwm_period_usecs = val;
  1776. error:
  1777. return rc;
  1778. }
  1779. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1780. {
  1781. int rc = 0;
  1782. u32 val = 0;
  1783. const char *bl_type;
  1784. const char *data;
  1785. struct dsi_parser_utils *utils = &panel->utils;
  1786. char *bl_name;
  1787. if (!strcmp(panel->type, "primary"))
  1788. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1789. else
  1790. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1791. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1792. if (!bl_type) {
  1793. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1794. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1795. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1796. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1797. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1798. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1799. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1800. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1801. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1802. } else {
  1803. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1804. panel->name, bl_type);
  1805. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1806. }
  1807. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1808. if (!data) {
  1809. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1810. } else if (!strcmp(data, "delay_until_first_frame")) {
  1811. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1812. } else {
  1813. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1814. panel->name, data);
  1815. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1816. }
  1817. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1818. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1819. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1820. if (rc) {
  1821. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1822. panel->name);
  1823. panel->bl_config.bl_min_level = 0;
  1824. } else {
  1825. panel->bl_config.bl_min_level = val;
  1826. }
  1827. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1828. if (rc) {
  1829. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1830. panel->name);
  1831. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1832. } else {
  1833. panel->bl_config.bl_max_level = val;
  1834. }
  1835. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1836. &val);
  1837. if (rc) {
  1838. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1839. panel->name);
  1840. panel->bl_config.brightness_max_level = 255;
  1841. } else {
  1842. panel->bl_config.brightness_max_level = val;
  1843. }
  1844. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1845. rc = dsi_panel_parse_bl_pwm_config(panel);
  1846. if (rc) {
  1847. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1848. panel->name, rc);
  1849. goto error;
  1850. }
  1851. }
  1852. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1853. "qcom,platform-bklight-en-gpio",
  1854. 0);
  1855. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1856. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1857. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1858. panel->name, rc);
  1859. rc = -EPROBE_DEFER;
  1860. goto error;
  1861. } else {
  1862. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1863. panel->name, rc);
  1864. rc = 0;
  1865. goto error;
  1866. }
  1867. }
  1868. error:
  1869. return rc;
  1870. }
  1871. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1872. struct dsi_parser_utils *utils)
  1873. {
  1874. const char *data;
  1875. u32 len, i;
  1876. int rc = 0;
  1877. struct dsi_display_mode_priv_info *priv_info;
  1878. u64 pixel_clk_khz;
  1879. if (!mode || !mode->priv_info)
  1880. return -EINVAL;
  1881. priv_info = mode->priv_info;
  1882. data = utils->get_property(utils->data,
  1883. "qcom,mdss-dsi-panel-phy-timings", &len);
  1884. if (!data) {
  1885. DSI_DEBUG("Unable to read Phy timing settings\n");
  1886. } else {
  1887. priv_info->phy_timing_val =
  1888. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1889. if (!priv_info->phy_timing_val)
  1890. return -EINVAL;
  1891. for (i = 0; i < len; i++)
  1892. priv_info->phy_timing_val[i] = data[i];
  1893. priv_info->phy_timing_len = len;
  1894. }
  1895. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  1896. /*
  1897. * For command mode we update the pclk as part of
  1898. * function dsi_panel_calc_dsi_transfer_time( )
  1899. * as we set it based on dsi clock or mdp transfer time.
  1900. */
  1901. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  1902. DSI_V_TOTAL(&mode->timing) *
  1903. mode->timing.refresh_rate);
  1904. do_div(pixel_clk_khz, 1000);
  1905. mode->pixel_clk_khz = pixel_clk_khz;
  1906. }
  1907. return rc;
  1908. }
  1909. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1910. struct dsi_parser_utils *utils)
  1911. {
  1912. u32 data;
  1913. int rc = -EINVAL;
  1914. int intf_width;
  1915. const char *compression;
  1916. struct dsi_display_mode_priv_info *priv_info;
  1917. if (!mode || !mode->priv_info)
  1918. return -EINVAL;
  1919. priv_info = mode->priv_info;
  1920. priv_info->dsc_enabled = false;
  1921. compression = utils->get_property(utils->data,
  1922. "qcom,compression-mode", NULL);
  1923. if (compression && !strcmp(compression, "dsc"))
  1924. priv_info->dsc_enabled = true;
  1925. if (!priv_info->dsc_enabled) {
  1926. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  1927. return 0;
  1928. }
  1929. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1930. if (rc) {
  1931. priv_info->dsc.config.dsc_version_major = 0x1;
  1932. priv_info->dsc.config.dsc_version_minor = 0x1;
  1933. rc = 0;
  1934. } else {
  1935. /* BITS[0..3] provides minor version and BITS[4..7] provide
  1936. * major version information
  1937. */
  1938. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  1939. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  1940. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  1941. ((priv_info->dsc.config.dsc_version_minor
  1942. != 0x1) ||
  1943. (priv_info->dsc.config.dsc_version_minor
  1944. != 0x2))) {
  1945. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  1946. __func__,
  1947. priv_info->dsc.config.dsc_version_major,
  1948. priv_info->dsc.config.dsc_version_minor
  1949. );
  1950. rc = -EINVAL;
  1951. goto error;
  1952. }
  1953. }
  1954. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1955. if (rc) {
  1956. priv_info->dsc.scr_rev = 0x0;
  1957. rc = 0;
  1958. } else {
  1959. priv_info->dsc.scr_rev = data & 0xff;
  1960. /* only one scr rev supported */
  1961. if (priv_info->dsc.scr_rev > 0x1) {
  1962. DSI_ERR("%s: DSC scr version:%d not supported\n",
  1963. __func__, priv_info->dsc.scr_rev);
  1964. rc = -EINVAL;
  1965. goto error;
  1966. }
  1967. }
  1968. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1969. if (rc) {
  1970. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  1971. goto error;
  1972. }
  1973. priv_info->dsc.config.slice_height = data;
  1974. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  1975. if (rc) {
  1976. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  1977. goto error;
  1978. }
  1979. priv_info->dsc.config.slice_width = data;
  1980. intf_width = mode->timing.h_active;
  1981. if (intf_width % priv_info->dsc.config.slice_width) {
  1982. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  1983. intf_width, priv_info->dsc.config.slice_width);
  1984. rc = -EINVAL;
  1985. goto error;
  1986. }
  1987. priv_info->dsc.config.pic_width = mode->timing.h_active;
  1988. priv_info->dsc.config.pic_height = mode->timing.v_active;
  1989. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  1990. if (rc) {
  1991. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  1992. goto error;
  1993. } else if (!data || (data > 2)) {
  1994. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  1995. goto error;
  1996. }
  1997. priv_info->dsc.slice_per_pkt = data;
  1998. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  1999. &data);
  2000. if (rc) {
  2001. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2002. goto error;
  2003. }
  2004. priv_info->dsc.config.bits_per_component = data;
  2005. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2006. if (rc) {
  2007. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2008. data = 0;
  2009. }
  2010. priv_info->dsc.pps_delay_ms = data;
  2011. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2012. &data);
  2013. if (rc) {
  2014. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2015. goto error;
  2016. }
  2017. priv_info->dsc.config.bits_per_pixel = data << 4;
  2018. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2019. &data);
  2020. if (rc) {
  2021. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2022. rc = 0;
  2023. data = MSM_CHROMA_444;
  2024. }
  2025. priv_info->dsc.chroma_format = data;
  2026. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2027. &data);
  2028. if (rc) {
  2029. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2030. rc = 0;
  2031. data = MSM_RGB;
  2032. }
  2033. priv_info->dsc.source_color_space = data;
  2034. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2035. "qcom,mdss-dsc-block-prediction-enable");
  2036. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2037. priv_info->dsc.config.slice_width);
  2038. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2039. priv_info->dsc.scr_rev);
  2040. if (rc) {
  2041. DSI_DEBUG("failed populating dsc params \n");
  2042. rc = -EINVAL;
  2043. goto error;
  2044. }
  2045. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2046. if (rc) {
  2047. DSI_DEBUG("failed populating other dsc params \n");
  2048. rc = -EINVAL;
  2049. goto error;
  2050. }
  2051. priv_info->pclk_scale.numer =
  2052. priv_info->dsc.config.bits_per_pixel >> 4;
  2053. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2054. priv_info->dsc.chroma_format,
  2055. priv_info->dsc.config.bits_per_component);
  2056. mode->timing.dsc_enabled = true;
  2057. mode->timing.dsc = &priv_info->dsc;
  2058. mode->timing.pclk_scale = priv_info->pclk_scale;
  2059. error:
  2060. return rc;
  2061. }
  2062. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2063. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2064. {
  2065. u32 data;
  2066. int rc = -EINVAL;
  2067. const char *compression;
  2068. struct dsi_display_mode_priv_info *priv_info;
  2069. int intf_width;
  2070. if (!mode || !mode->priv_info)
  2071. return -EINVAL;
  2072. priv_info = mode->priv_info;
  2073. priv_info->vdc_enabled = false;
  2074. compression = utils->get_property(utils->data,
  2075. "qcom,compression-mode", NULL);
  2076. if (compression && !strcmp(compression, "vdc"))
  2077. priv_info->vdc_enabled = true;
  2078. if (!priv_info->vdc_enabled) {
  2079. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2080. return 0;
  2081. }
  2082. priv_info->vdc.panel_mode = panel_mode;
  2083. priv_info->vdc.traffic_mode = traffic_mode;
  2084. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2085. if (rc) {
  2086. priv_info->vdc.version_major = 0x1;
  2087. priv_info->vdc.version_minor = 0x1;
  2088. priv_info->vdc.version_release = 0x0;
  2089. rc = 0;
  2090. } else {
  2091. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2092. * major version information
  2093. */
  2094. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2095. priv_info->vdc.version_minor = data & 0x0F;
  2096. if ((priv_info->vdc.version_major != 0x1) &&
  2097. ((priv_info->vdc.version_minor
  2098. != 0x1))) {
  2099. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2100. __func__,
  2101. priv_info->vdc.version_major,
  2102. priv_info->vdc.version_minor
  2103. );
  2104. rc = -EINVAL;
  2105. goto error;
  2106. }
  2107. }
  2108. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2109. if (rc) {
  2110. priv_info->vdc.version_release = 0x0;
  2111. rc = 0;
  2112. } else {
  2113. priv_info->vdc.version_release = data & 0xff;
  2114. /* only one release version is supported */
  2115. if (priv_info->vdc.version_release != 0x0) {
  2116. DSI_ERR("unsupported vdc release version %d\n",
  2117. priv_info->vdc.version_release);
  2118. rc = -EINVAL;
  2119. goto error;
  2120. }
  2121. }
  2122. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2123. priv_info->vdc.version_major,
  2124. priv_info->vdc.version_minor,
  2125. priv_info->vdc.version_release);
  2126. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2127. if (rc) {
  2128. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2129. goto error;
  2130. }
  2131. priv_info->vdc.slice_height = data;
  2132. /* slice height should be atleast 16 lines */
  2133. if (priv_info->vdc.slice_height < 16) {
  2134. DSI_ERR("invalid slice height %d\n",
  2135. priv_info->vdc.slice_height);
  2136. rc = -EINVAL;
  2137. goto error;
  2138. }
  2139. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2140. if (rc) {
  2141. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2142. goto error;
  2143. }
  2144. priv_info->vdc.slice_width = data;
  2145. /*
  2146. * slide-width should be multiple of 8
  2147. * slice-width should be atlease 64 pixels
  2148. */
  2149. if ((priv_info->vdc.slice_width & 7) ||
  2150. (priv_info->vdc.slice_width < 64)) {
  2151. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2152. rc = -EINVAL;
  2153. goto error;
  2154. }
  2155. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2156. if (rc) {
  2157. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2158. goto error;
  2159. } else if (!data || (data > 2)) {
  2160. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2161. rc = -EINVAL;
  2162. goto error;
  2163. }
  2164. intf_width = mode->timing.h_active;
  2165. priv_info->vdc.slice_per_pkt = data;
  2166. priv_info->vdc.frame_width = mode->timing.h_active;
  2167. priv_info->vdc.frame_height = mode->timing.v_active;
  2168. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2169. &data);
  2170. if (rc) {
  2171. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2172. goto error;
  2173. }
  2174. priv_info->vdc.bits_per_component = data;
  2175. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2176. if (rc) {
  2177. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2178. data = 0;
  2179. }
  2180. priv_info->vdc.pps_delay_ms = data;
  2181. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2182. &data);
  2183. if (rc) {
  2184. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2185. goto error;
  2186. }
  2187. priv_info->vdc.bits_per_pixel = data << 4;
  2188. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2189. &data);
  2190. if (rc) {
  2191. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2192. rc = 0;
  2193. data = MSM_CHROMA_444;
  2194. }
  2195. priv_info->vdc.chroma_format = data;
  2196. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2197. &data);
  2198. if (rc) {
  2199. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2200. rc = 0;
  2201. data = MSM_RGB;
  2202. }
  2203. priv_info->vdc.source_color_space = data;
  2204. rc = sde_vdc_populate_config(&priv_info->vdc,
  2205. intf_width, traffic_mode);
  2206. if (rc) {
  2207. DSI_DEBUG("failed populating vdc config\n");
  2208. rc = -EINVAL;
  2209. goto error;
  2210. }
  2211. priv_info->pclk_scale.numer =
  2212. priv_info->vdc.bits_per_pixel >> 4;
  2213. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2214. priv_info->vdc.chroma_format,
  2215. priv_info->vdc.bits_per_component);
  2216. mode->timing.vdc_enabled = true;
  2217. mode->timing.vdc = &priv_info->vdc;
  2218. mode->timing.pclk_scale = priv_info->pclk_scale;
  2219. error:
  2220. return rc;
  2221. }
  2222. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2223. {
  2224. int rc = 0;
  2225. struct drm_panel_hdr_properties *hdr_prop;
  2226. struct dsi_parser_utils *utils = &panel->utils;
  2227. hdr_prop = &panel->hdr_props;
  2228. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2229. "qcom,mdss-dsi-panel-hdr-enabled");
  2230. if (hdr_prop->hdr_enabled) {
  2231. rc = utils->read_u32_array(utils->data,
  2232. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2233. hdr_prop->display_primaries,
  2234. DISPLAY_PRIMARIES_MAX);
  2235. if (rc) {
  2236. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2237. __func__, __LINE__, rc);
  2238. hdr_prop->hdr_enabled = false;
  2239. return rc;
  2240. }
  2241. rc = utils->read_u32(utils->data,
  2242. "qcom,mdss-dsi-panel-peak-brightness",
  2243. &(hdr_prop->peak_brightness));
  2244. if (rc) {
  2245. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2246. __func__, __LINE__, rc);
  2247. hdr_prop->hdr_enabled = false;
  2248. return rc;
  2249. }
  2250. rc = utils->read_u32(utils->data,
  2251. "qcom,mdss-dsi-panel-blackness-level",
  2252. &(hdr_prop->blackness_level));
  2253. if (rc) {
  2254. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2255. __func__, __LINE__, rc);
  2256. hdr_prop->hdr_enabled = false;
  2257. return rc;
  2258. }
  2259. }
  2260. return 0;
  2261. }
  2262. static int dsi_panel_parse_topology(
  2263. struct dsi_display_mode_priv_info *priv_info,
  2264. struct dsi_parser_utils *utils,
  2265. int topology_override)
  2266. {
  2267. struct msm_display_topology *topology;
  2268. u32 top_count, top_sel, *array = NULL;
  2269. int i, len = 0;
  2270. int rc = -EINVAL;
  2271. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2272. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2273. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2274. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2275. return rc;
  2276. }
  2277. top_count = len / TOPOLOGY_SET_LEN;
  2278. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2279. if (!array)
  2280. return -ENOMEM;
  2281. rc = utils->read_u32_array(utils->data,
  2282. "qcom,display-topology", array, len);
  2283. if (rc) {
  2284. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2285. goto read_fail;
  2286. }
  2287. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2288. if (!topology) {
  2289. rc = -ENOMEM;
  2290. goto read_fail;
  2291. }
  2292. for (i = 0; i < top_count; i++) {
  2293. struct msm_display_topology *top = &topology[i];
  2294. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2295. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2296. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2297. }
  2298. if (topology_override >= 0 && topology_override < top_count) {
  2299. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2300. topology_override,
  2301. topology[topology_override].num_lm,
  2302. topology[topology_override].num_enc,
  2303. topology[topology_override].num_intf);
  2304. top_sel = topology_override;
  2305. goto parse_done;
  2306. }
  2307. rc = utils->read_u32(utils->data,
  2308. "qcom,default-topology-index", &top_sel);
  2309. if (rc) {
  2310. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2311. goto parse_fail;
  2312. }
  2313. if (top_sel >= top_count) {
  2314. rc = -EINVAL;
  2315. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2316. rc);
  2317. goto parse_fail;
  2318. }
  2319. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2320. topology[top_sel].num_lm,
  2321. topology[top_sel].num_enc,
  2322. topology[top_sel].num_intf);
  2323. parse_done:
  2324. memcpy(&priv_info->topology, &topology[top_sel],
  2325. sizeof(struct msm_display_topology));
  2326. parse_fail:
  2327. kfree(topology);
  2328. read_fail:
  2329. kfree(array);
  2330. return rc;
  2331. }
  2332. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2333. struct msm_roi_alignment *align)
  2334. {
  2335. int len = 0, rc = 0;
  2336. u32 value[6];
  2337. struct property *data;
  2338. if (!align)
  2339. return -EINVAL;
  2340. memset(align, 0, sizeof(*align));
  2341. data = utils->find_property(utils->data,
  2342. "qcom,panel-roi-alignment", &len);
  2343. len /= sizeof(u32);
  2344. if (!data) {
  2345. DSI_ERR("panel roi alignment not found\n");
  2346. rc = -EINVAL;
  2347. } else if (len != 6) {
  2348. DSI_ERR("incorrect roi alignment len %d\n", len);
  2349. rc = -EINVAL;
  2350. } else {
  2351. rc = utils->read_u32_array(utils->data,
  2352. "qcom,panel-roi-alignment", value, len);
  2353. if (rc)
  2354. DSI_DEBUG("error reading panel roi alignment values\n");
  2355. else {
  2356. align->xstart_pix_align = value[0];
  2357. align->ystart_pix_align = value[1];
  2358. align->width_pix_align = value[2];
  2359. align->height_pix_align = value[3];
  2360. align->min_width = value[4];
  2361. align->min_height = value[5];
  2362. }
  2363. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2364. align->xstart_pix_align,
  2365. align->width_pix_align,
  2366. align->ystart_pix_align,
  2367. align->height_pix_align,
  2368. align->min_width,
  2369. align->min_height);
  2370. }
  2371. return rc;
  2372. }
  2373. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2374. struct dsi_parser_utils *utils)
  2375. {
  2376. struct msm_roi_caps *roi_caps = NULL;
  2377. const char *data;
  2378. int rc = 0;
  2379. if (!mode || !mode->priv_info) {
  2380. DSI_ERR("invalid arguments\n");
  2381. return -EINVAL;
  2382. }
  2383. roi_caps = &mode->priv_info->roi_caps;
  2384. memset(roi_caps, 0, sizeof(*roi_caps));
  2385. data = utils->get_property(utils->data,
  2386. "qcom,partial-update-enabled", NULL);
  2387. if (data) {
  2388. if (!strcmp(data, "dual_roi"))
  2389. roi_caps->num_roi = 2;
  2390. else if (!strcmp(data, "single_roi"))
  2391. roi_caps->num_roi = 1;
  2392. else {
  2393. DSI_INFO(
  2394. "invalid value for qcom,partial-update-enabled: %s\n",
  2395. data);
  2396. return 0;
  2397. }
  2398. } else {
  2399. DSI_DEBUG("partial update disabled as the property is not set\n");
  2400. return 0;
  2401. }
  2402. roi_caps->merge_rois = utils->read_bool(utils->data,
  2403. "qcom,partial-update-roi-merge");
  2404. roi_caps->enabled = roi_caps->num_roi > 0;
  2405. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2406. roi_caps->enabled);
  2407. if (roi_caps->enabled)
  2408. rc = dsi_panel_parse_roi_alignment(utils,
  2409. &roi_caps->align);
  2410. if (rc)
  2411. memset(roi_caps, 0, sizeof(*roi_caps));
  2412. return rc;
  2413. }
  2414. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2415. struct dsi_parser_utils *utils)
  2416. {
  2417. bool vid_mode_support, cmd_mode_support;
  2418. if (!mode || !mode->priv_info) {
  2419. DSI_ERR("invalid arguments\n");
  2420. return -EINVAL;
  2421. }
  2422. vid_mode_support = utils->read_bool(utils->data,
  2423. "qcom,mdss-dsi-video-mode");
  2424. cmd_mode_support = utils->read_bool(utils->data,
  2425. "qcom,mdss-dsi-cmd-mode");
  2426. if (cmd_mode_support)
  2427. mode->panel_mode = DSI_OP_CMD_MODE;
  2428. else if (vid_mode_support)
  2429. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2430. else
  2431. return -EINVAL;
  2432. return 0;
  2433. };
  2434. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2435. {
  2436. int dms_enabled;
  2437. const char *data;
  2438. struct dsi_parser_utils *utils = &panel->utils;
  2439. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2440. dms_enabled = utils->read_bool(utils->data,
  2441. "qcom,dynamic-mode-switch-enabled");
  2442. if (!dms_enabled)
  2443. return 0;
  2444. data = utils->get_property(utils->data,
  2445. "qcom,dynamic-mode-switch-type", NULL);
  2446. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2447. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2448. } else {
  2449. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2450. panel->name, data);
  2451. return -EINVAL;
  2452. }
  2453. return 0;
  2454. };
  2455. /*
  2456. * The length of all the valid values to be checked should not be greater
  2457. * than the length of returned data from read command.
  2458. */
  2459. static bool
  2460. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2461. {
  2462. int i;
  2463. struct drm_panel_esd_config *config = &panel->esd_config;
  2464. for (i = 0; i < count; ++i) {
  2465. if (config->status_valid_params[i] >
  2466. config->status_cmds_rlen[i]) {
  2467. DSI_DEBUG("ignore valid params\n");
  2468. return false;
  2469. }
  2470. }
  2471. return true;
  2472. }
  2473. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2474. char *prop_key, u32 **target, u32 cmd_cnt)
  2475. {
  2476. int tmp;
  2477. if (!utils->find_property(utils->data, prop_key, &tmp))
  2478. return false;
  2479. tmp /= sizeof(u32);
  2480. if (tmp != cmd_cnt) {
  2481. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2482. tmp, cmd_cnt);
  2483. return false;
  2484. }
  2485. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2486. if (IS_ERR_OR_NULL(*target)) {
  2487. DSI_ERR("Error allocating memory for property\n");
  2488. return false;
  2489. }
  2490. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2491. DSI_ERR("cannot get values from dts\n");
  2492. kfree(*target);
  2493. *target = NULL;
  2494. return false;
  2495. }
  2496. return true;
  2497. }
  2498. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2499. {
  2500. kfree(esd_config->status_buf);
  2501. kfree(esd_config->return_buf);
  2502. kfree(esd_config->status_value);
  2503. kfree(esd_config->status_valid_params);
  2504. kfree(esd_config->status_cmds_rlen);
  2505. kfree(esd_config->status_cmd.cmds);
  2506. }
  2507. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2508. {
  2509. struct drm_panel_esd_config *esd_config;
  2510. int rc = 0;
  2511. u32 tmp;
  2512. u32 i, status_len, *lenp;
  2513. struct property *data;
  2514. struct dsi_parser_utils *utils = &panel->utils;
  2515. if (!panel) {
  2516. DSI_ERR("Invalid Params\n");
  2517. return -EINVAL;
  2518. }
  2519. esd_config = &panel->esd_config;
  2520. if (!esd_config)
  2521. return -EINVAL;
  2522. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2523. DSI_CMD_SET_PANEL_STATUS, utils);
  2524. if (!esd_config->status_cmd.count) {
  2525. DSI_ERR("panel status command parsing failed\n");
  2526. rc = -EINVAL;
  2527. goto error;
  2528. }
  2529. if (!dsi_panel_parse_esd_status_len(utils,
  2530. "qcom,mdss-dsi-panel-status-read-length",
  2531. &panel->esd_config.status_cmds_rlen,
  2532. esd_config->status_cmd.count)) {
  2533. DSI_ERR("Invalid status read length\n");
  2534. rc = -EINVAL;
  2535. goto error1;
  2536. }
  2537. if (dsi_panel_parse_esd_status_len(utils,
  2538. "qcom,mdss-dsi-panel-status-valid-params",
  2539. &panel->esd_config.status_valid_params,
  2540. esd_config->status_cmd.count)) {
  2541. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2542. esd_config->status_cmd.count)) {
  2543. rc = -EINVAL;
  2544. goto error2;
  2545. }
  2546. }
  2547. status_len = 0;
  2548. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2549. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2550. status_len += lenp[i];
  2551. if (!status_len) {
  2552. rc = -EINVAL;
  2553. goto error2;
  2554. }
  2555. /*
  2556. * Some panel may need multiple read commands to properly
  2557. * check panel status. Do a sanity check for proper status
  2558. * value which will be compared with the value read by dsi
  2559. * controller during ESD check. Also check if multiple read
  2560. * commands are there then, there should be corresponding
  2561. * status check values for each read command.
  2562. */
  2563. data = utils->find_property(utils->data,
  2564. "qcom,mdss-dsi-panel-status-value", &tmp);
  2565. tmp /= sizeof(u32);
  2566. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2567. esd_config->groups = tmp / status_len;
  2568. } else {
  2569. DSI_ERR("error parse panel-status-value\n");
  2570. rc = -EINVAL;
  2571. goto error2;
  2572. }
  2573. esd_config->status_value =
  2574. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2575. GFP_KERNEL);
  2576. if (!esd_config->status_value) {
  2577. rc = -ENOMEM;
  2578. goto error2;
  2579. }
  2580. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2581. sizeof(unsigned char), GFP_KERNEL);
  2582. if (!esd_config->return_buf) {
  2583. rc = -ENOMEM;
  2584. goto error3;
  2585. }
  2586. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2587. if (!esd_config->status_buf) {
  2588. rc = -ENOMEM;
  2589. goto error4;
  2590. }
  2591. rc = utils->read_u32_array(utils->data,
  2592. "qcom,mdss-dsi-panel-status-value",
  2593. esd_config->status_value, esd_config->groups * status_len);
  2594. if (rc) {
  2595. DSI_DEBUG("error reading panel status values\n");
  2596. memset(esd_config->status_value, 0,
  2597. esd_config->groups * status_len);
  2598. }
  2599. return 0;
  2600. error4:
  2601. kfree(esd_config->return_buf);
  2602. error3:
  2603. kfree(esd_config->status_value);
  2604. error2:
  2605. kfree(esd_config->status_valid_params);
  2606. kfree(esd_config->status_cmds_rlen);
  2607. error1:
  2608. kfree(esd_config->status_cmd.cmds);
  2609. error:
  2610. return rc;
  2611. }
  2612. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2613. {
  2614. int rc = 0;
  2615. const char *string;
  2616. struct drm_panel_esd_config *esd_config;
  2617. struct dsi_parser_utils *utils = &panel->utils;
  2618. u8 *esd_mode = NULL;
  2619. esd_config = &panel->esd_config;
  2620. esd_config->status_mode = ESD_MODE_MAX;
  2621. esd_config->esd_enabled = utils->read_bool(utils->data,
  2622. "qcom,esd-check-enabled");
  2623. if (!esd_config->esd_enabled)
  2624. return 0;
  2625. rc = utils->read_string(utils->data,
  2626. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2627. if (!rc) {
  2628. if (!strcmp(string, "bta_check")) {
  2629. esd_config->status_mode = ESD_MODE_SW_BTA;
  2630. } else if (!strcmp(string, "reg_read")) {
  2631. esd_config->status_mode = ESD_MODE_REG_READ;
  2632. } else if (!strcmp(string, "te_signal_check")) {
  2633. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2634. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2635. } else {
  2636. DSI_ERR("TE-ESD not valid for video mode\n");
  2637. rc = -EINVAL;
  2638. goto error;
  2639. }
  2640. } else {
  2641. DSI_ERR("No valid panel-status-check-mode string\n");
  2642. rc = -EINVAL;
  2643. goto error;
  2644. }
  2645. } else {
  2646. DSI_DEBUG("status check method not defined!\n");
  2647. rc = -EINVAL;
  2648. goto error;
  2649. }
  2650. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2651. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2652. if (rc) {
  2653. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2654. rc);
  2655. goto error;
  2656. }
  2657. esd_mode = "register_read";
  2658. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2659. esd_mode = "bta_trigger";
  2660. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2661. esd_mode = "te_check";
  2662. }
  2663. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2664. return 0;
  2665. error:
  2666. panel->esd_config.esd_enabled = false;
  2667. return rc;
  2668. }
  2669. static void dsi_panel_update_util(struct dsi_panel *panel,
  2670. struct device_node *parser_node)
  2671. {
  2672. struct dsi_parser_utils *utils = &panel->utils;
  2673. if (parser_node) {
  2674. *utils = *dsi_parser_get_parser_utils();
  2675. utils->data = parser_node;
  2676. DSI_DEBUG("switching to parser APIs\n");
  2677. goto end;
  2678. }
  2679. *utils = *dsi_parser_get_of_utils();
  2680. utils->data = panel->panel_of_node;
  2681. end:
  2682. utils->node = panel->panel_of_node;
  2683. }
  2684. struct dsi_panel *dsi_panel_get(struct device *parent,
  2685. struct device_node *of_node,
  2686. struct device_node *parser_node,
  2687. const char *type,
  2688. int topology_override)
  2689. {
  2690. struct dsi_panel *panel;
  2691. struct dsi_parser_utils *utils;
  2692. const char *panel_physical_type;
  2693. int rc = 0;
  2694. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2695. if (!panel)
  2696. return ERR_PTR(-ENOMEM);
  2697. panel->panel_of_node = of_node;
  2698. panel->parent = parent;
  2699. panel->type = type;
  2700. dsi_panel_update_util(panel, parser_node);
  2701. utils = &panel->utils;
  2702. panel->name = utils->get_property(utils->data,
  2703. "qcom,mdss-dsi-panel-name", NULL);
  2704. if (!panel->name)
  2705. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2706. /*
  2707. * Set panel type to LCD as default.
  2708. */
  2709. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2710. panel_physical_type = utils->get_property(utils->data,
  2711. "qcom,mdss-dsi-panel-physical-type", NULL);
  2712. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2713. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2714. rc = dsi_panel_parse_host_config(panel);
  2715. if (rc) {
  2716. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2717. rc);
  2718. goto error;
  2719. }
  2720. rc = dsi_panel_parse_panel_mode(panel);
  2721. if (rc) {
  2722. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2723. rc);
  2724. goto error;
  2725. }
  2726. rc = dsi_panel_parse_dfps_caps(panel);
  2727. if (rc)
  2728. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2729. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2730. if (rc)
  2731. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2732. /* allow qsync support only if DFPS is with VFP approach */
  2733. if ((panel->dfps_caps.dfps_support) &&
  2734. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2735. panel->qsync_min_fps = 0;
  2736. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2737. if (rc)
  2738. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2739. rc = dsi_panel_parse_phy_props(panel);
  2740. if (rc) {
  2741. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2742. rc);
  2743. goto error;
  2744. }
  2745. rc = dsi_panel_parse_gpios(panel);
  2746. if (rc) {
  2747. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2748. goto error;
  2749. }
  2750. rc = dsi_panel_parse_power_cfg(panel);
  2751. if (rc)
  2752. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2753. rc = dsi_panel_parse_bl_config(panel);
  2754. if (rc) {
  2755. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2756. if (rc == -EPROBE_DEFER)
  2757. goto error;
  2758. }
  2759. rc = dsi_panel_parse_misc_features(panel);
  2760. if (rc)
  2761. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2762. rc = dsi_panel_parse_hdr_config(panel);
  2763. if (rc)
  2764. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2765. rc = dsi_panel_get_mode_count(panel);
  2766. if (rc) {
  2767. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2768. goto error;
  2769. }
  2770. rc = dsi_panel_parse_dms_info(panel);
  2771. if (rc)
  2772. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2773. rc = dsi_panel_parse_esd_config(panel);
  2774. if (rc)
  2775. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2776. rc = dsi_panel_vreg_get(panel);
  2777. if (rc) {
  2778. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2779. panel->name, rc);
  2780. goto error;
  2781. }
  2782. panel->power_mode = SDE_MODE_DPMS_OFF;
  2783. drm_panel_init(&panel->drm_panel);
  2784. panel->drm_panel.dev = &panel->mipi_device.dev;
  2785. panel->mipi_device.dev.of_node = of_node;
  2786. rc = drm_panel_add(&panel->drm_panel);
  2787. if (rc)
  2788. goto error_vreg_put;
  2789. mutex_init(&panel->panel_lock);
  2790. return panel;
  2791. error_vreg_put:
  2792. (void)dsi_panel_vreg_put(panel);
  2793. error:
  2794. kfree(panel);
  2795. return ERR_PTR(rc);
  2796. }
  2797. void dsi_panel_put(struct dsi_panel *panel)
  2798. {
  2799. drm_panel_remove(&panel->drm_panel);
  2800. /* free resources allocated for ESD check */
  2801. dsi_panel_esd_config_deinit(&panel->esd_config);
  2802. kfree(panel);
  2803. }
  2804. int dsi_panel_drv_init(struct dsi_panel *panel,
  2805. struct mipi_dsi_host *host)
  2806. {
  2807. int rc = 0;
  2808. struct mipi_dsi_device *dev;
  2809. if (!panel || !host) {
  2810. DSI_ERR("invalid params\n");
  2811. return -EINVAL;
  2812. }
  2813. mutex_lock(&panel->panel_lock);
  2814. dev = &panel->mipi_device;
  2815. dev->host = host;
  2816. /*
  2817. * We dont have device structure since panel is not a device node.
  2818. * When using drm panel framework, the device is probed when the host is
  2819. * create.
  2820. */
  2821. dev->channel = 0;
  2822. dev->lanes = 4;
  2823. panel->host = host;
  2824. rc = dsi_panel_pinctrl_init(panel);
  2825. if (rc) {
  2826. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2827. panel->name, rc);
  2828. goto exit;
  2829. }
  2830. rc = dsi_panel_gpio_request(panel);
  2831. if (rc) {
  2832. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2833. rc);
  2834. goto error_pinctrl_deinit;
  2835. }
  2836. rc = dsi_panel_bl_register(panel);
  2837. if (rc) {
  2838. if (rc != -EPROBE_DEFER)
  2839. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2840. panel->name, rc);
  2841. goto error_gpio_release;
  2842. }
  2843. goto exit;
  2844. error_gpio_release:
  2845. (void)dsi_panel_gpio_release(panel);
  2846. error_pinctrl_deinit:
  2847. (void)dsi_panel_pinctrl_deinit(panel);
  2848. exit:
  2849. mutex_unlock(&panel->panel_lock);
  2850. return rc;
  2851. }
  2852. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2853. {
  2854. int rc = 0;
  2855. if (!panel) {
  2856. DSI_ERR("invalid params\n");
  2857. return -EINVAL;
  2858. }
  2859. mutex_lock(&panel->panel_lock);
  2860. rc = dsi_panel_bl_unregister(panel);
  2861. if (rc)
  2862. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2863. panel->name, rc);
  2864. rc = dsi_panel_gpio_release(panel);
  2865. if (rc)
  2866. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2867. rc);
  2868. rc = dsi_panel_pinctrl_deinit(panel);
  2869. if (rc)
  2870. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2871. rc);
  2872. rc = dsi_panel_vreg_put(panel);
  2873. if (rc)
  2874. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2875. panel->host = NULL;
  2876. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2877. mutex_unlock(&panel->panel_lock);
  2878. return rc;
  2879. }
  2880. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2881. struct dsi_display_mode *mode)
  2882. {
  2883. return 0;
  2884. }
  2885. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2886. {
  2887. const u32 SINGLE_MODE_SUPPORT = 1;
  2888. struct dsi_parser_utils *utils;
  2889. struct device_node *timings_np, *child_np;
  2890. int num_dfps_rates, num_bit_clks;
  2891. int num_video_modes = 0, num_cmd_modes = 0;
  2892. int count, rc = 0;
  2893. void *utils_data = NULL;
  2894. if (!panel) {
  2895. DSI_ERR("invalid params\n");
  2896. return -EINVAL;
  2897. }
  2898. utils = &panel->utils;
  2899. panel->num_timing_nodes = 0;
  2900. timings_np = utils->get_child_by_name(utils->data,
  2901. "qcom,mdss-dsi-display-timings");
  2902. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2903. DSI_ERR("no display timing nodes defined\n");
  2904. rc = -EINVAL;
  2905. goto error;
  2906. }
  2907. count = utils->get_child_count(timings_np);
  2908. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2909. count > DSI_MODE_MAX) {
  2910. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2911. rc = -EINVAL;
  2912. goto error;
  2913. }
  2914. /* No multiresolution support is available for video mode panels.
  2915. * Multi-mode is supported for video mode during POMS is enabled.
  2916. */
  2917. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2918. !panel->host_config.ext_bridge_mode &&
  2919. !panel->panel_mode_switch_enabled)
  2920. count = SINGLE_MODE_SUPPORT;
  2921. panel->num_timing_nodes = count;
  2922. dsi_for_each_child_node(timings_np, child_np) {
  2923. utils_data = child_np;
  2924. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2925. num_video_modes++;
  2926. else if (utils->read_bool(utils->data,
  2927. "qcom,mdss-dsi-cmd-mode"))
  2928. num_cmd_modes++;
  2929. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  2930. num_video_modes++;
  2931. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  2932. num_cmd_modes++;
  2933. }
  2934. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  2935. panel->dfps_caps.dfps_list_len;
  2936. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  2937. panel->dyn_clk_caps.bit_clk_list_len;
  2938. /* Inflate num_of_modes by fps and bit clks in dfps */
  2939. panel->num_display_modes = (num_cmd_modes * num_bit_clks) +
  2940. (num_video_modes * num_bit_clks * num_dfps_rates);
  2941. error:
  2942. return rc;
  2943. }
  2944. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2945. struct dsi_panel_phy_props *phy_props)
  2946. {
  2947. int rc = 0;
  2948. if (!panel || !phy_props) {
  2949. DSI_ERR("invalid params\n");
  2950. return -EINVAL;
  2951. }
  2952. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2953. return rc;
  2954. }
  2955. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2956. struct dsi_dfps_capabilities *dfps_caps)
  2957. {
  2958. int rc = 0;
  2959. if (!panel || !dfps_caps) {
  2960. DSI_ERR("invalid params\n");
  2961. return -EINVAL;
  2962. }
  2963. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2964. return rc;
  2965. }
  2966. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2967. {
  2968. int i;
  2969. if (!mode->priv_info)
  2970. return;
  2971. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2972. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2973. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2974. }
  2975. kfree(mode->priv_info);
  2976. }
  2977. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2978. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2979. {
  2980. u32 frame_time_us,nslices;
  2981. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  2982. dsi_transfer_time_us, pixel_clk_khz;
  2983. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2984. struct dsi_mode_info *timing = &mode->timing;
  2985. struct dsi_display_mode *display_mode;
  2986. u32 jitter_numer, jitter_denom, prefill_lines;
  2987. u32 min_threshold_us, prefill_time_us;
  2988. u16 bpp;
  2989. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  2990. * + 1 byte dcs data command.
  2991. */
  2992. const u32 packet_overhead = 56;
  2993. display_mode = container_of(timing, struct dsi_display_mode, timing);
  2994. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  2995. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  2996. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  2997. if (timing->dsc_enabled) {
  2998. nslices = (timing->h_active)/(dsc->config.slice_width);
  2999. /* (slice width x bit-per-pixel + packet overhead) x
  3000. * number of slices x height x fps / lane
  3001. */
  3002. bpp = DSC_BPP(dsc->config);
  3003. bits_per_line = ((dsc->config.slice_width * bpp) +
  3004. packet_overhead) * nslices;
  3005. bits_per_line = bits_per_line / (config->num_data_lanes);
  3006. min_bitclk_hz = (bits_per_line * timing->v_active *
  3007. timing->refresh_rate);
  3008. } else {
  3009. total_active_pixels = ((dsi_h_active_dce(timing)
  3010. * timing->v_active));
  3011. /* calculate the actual bitclk needed to transfer the frame */
  3012. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3013. (config->bpp));
  3014. do_div(min_bitclk_hz, config->num_data_lanes);
  3015. }
  3016. timing->min_dsi_clk_hz = min_bitclk_hz;
  3017. if (timing->clk_rate_hz) {
  3018. /* adjust the transfer time proportionately for bit clk*/
  3019. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3020. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3021. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3022. } else if (mode->priv_info->mdp_transfer_time_us) {
  3023. timing->dsi_transfer_time_us =
  3024. mode->priv_info->mdp_transfer_time_us;
  3025. } else {
  3026. min_threshold_us = mult_frac(frame_time_us,
  3027. jitter_numer, (jitter_denom * 100));
  3028. /*
  3029. * Increase the prefill_lines proportionately as recommended
  3030. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3031. */
  3032. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3033. timing->refresh_rate, 60);
  3034. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3035. (timing->v_active));
  3036. /*
  3037. * Threshold is sum of panel jitter time, prefill line time
  3038. * plus 100usec buffer time.
  3039. */
  3040. min_threshold_us = min_threshold_us + 100 + prefill_time_us;
  3041. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3042. if (min_threshold_us > frame_threshold_us)
  3043. frame_threshold_us = min_threshold_us;
  3044. timing->dsi_transfer_time_us = frame_time_us -
  3045. frame_threshold_us;
  3046. }
  3047. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3048. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3049. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3050. timing->mdp_transfer_time_us =
  3051. mode->priv_info->mdp_transfer_time_us;
  3052. }
  3053. /* Calculate pclk_khz to update modeinfo */
  3054. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3055. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3056. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3057. do_div(pixel_clk_khz, config->bpp);
  3058. display_mode->pixel_clk_khz = pixel_clk_khz;
  3059. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3060. }
  3061. int dsi_panel_get_mode(struct dsi_panel *panel,
  3062. u32 index, struct dsi_display_mode *mode,
  3063. int topology_override)
  3064. {
  3065. struct device_node *timings_np, *child_np;
  3066. struct dsi_parser_utils *utils;
  3067. struct dsi_display_mode_priv_info *prv_info;
  3068. u32 child_idx = 0;
  3069. int rc = 0, num_timings;
  3070. int traffic_mode;
  3071. int panel_mode;
  3072. void *utils_data = NULL;
  3073. if (!panel || !mode) {
  3074. DSI_ERR("invalid params\n");
  3075. return -EINVAL;
  3076. }
  3077. mutex_lock(&panel->panel_lock);
  3078. utils = &panel->utils;
  3079. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3080. if (!mode->priv_info) {
  3081. rc = -ENOMEM;
  3082. goto done;
  3083. }
  3084. prv_info = mode->priv_info;
  3085. timings_np = utils->get_child_by_name(utils->data,
  3086. "qcom,mdss-dsi-display-timings");
  3087. if (!timings_np) {
  3088. DSI_ERR("no display timing nodes defined\n");
  3089. rc = -EINVAL;
  3090. goto parse_fail;
  3091. }
  3092. num_timings = utils->get_child_count(timings_np);
  3093. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3094. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3095. rc = -EINVAL;
  3096. goto parse_fail;
  3097. }
  3098. utils_data = utils->data;
  3099. traffic_mode = panel->video_config.traffic_mode;
  3100. panel_mode = panel->panel_mode;
  3101. dsi_for_each_child_node(timings_np, child_np) {
  3102. if (index != child_idx++)
  3103. continue;
  3104. utils->data = child_np;
  3105. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3106. if (rc) {
  3107. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3108. goto parse_fail;
  3109. }
  3110. rc = dsi_panel_parse_dsc_params(mode, utils);
  3111. if (rc) {
  3112. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3113. goto parse_fail;
  3114. }
  3115. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3116. panel_mode);
  3117. if (rc) {
  3118. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3119. goto parse_fail;
  3120. }
  3121. rc = dsi_panel_parse_topology(prv_info, utils,
  3122. topology_override);
  3123. if (rc) {
  3124. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3125. goto parse_fail;
  3126. }
  3127. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3128. if (rc) {
  3129. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3130. goto parse_fail;
  3131. }
  3132. rc = dsi_panel_parse_jitter_config(mode, utils);
  3133. if (rc)
  3134. DSI_ERR(
  3135. "failed to parse panel jitter config, rc=%d\n", rc);
  3136. rc = dsi_panel_parse_phy_timing(mode, utils);
  3137. if (rc) {
  3138. DSI_ERR(
  3139. "failed to parse panel phy timings, rc=%d\n", rc);
  3140. goto parse_fail;
  3141. }
  3142. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3143. if (rc)
  3144. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3145. if (panel->panel_mode_switch_enabled) {
  3146. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3147. if (rc) {
  3148. rc = 0;
  3149. mode->panel_mode = panel->panel_mode;
  3150. DSI_INFO(
  3151. "POMS: panel mode isn't specified in timing[%d]\n",
  3152. child_idx);
  3153. }
  3154. } else {
  3155. mode->panel_mode = panel->panel_mode;
  3156. }
  3157. }
  3158. goto done;
  3159. parse_fail:
  3160. kfree(mode->priv_info);
  3161. mode->priv_info = NULL;
  3162. done:
  3163. utils->data = utils_data;
  3164. mutex_unlock(&panel->panel_lock);
  3165. return rc;
  3166. }
  3167. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3168. struct dsi_display_mode *mode,
  3169. struct dsi_host_config *config)
  3170. {
  3171. int rc = 0;
  3172. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3173. if (!panel || !mode || !config) {
  3174. DSI_ERR("invalid params\n");
  3175. return -EINVAL;
  3176. }
  3177. mutex_lock(&panel->panel_lock);
  3178. config->panel_mode = panel->panel_mode;
  3179. memcpy(&config->common_config, &panel->host_config,
  3180. sizeof(config->common_config));
  3181. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3182. memcpy(&config->u.video_engine, &panel->video_config,
  3183. sizeof(config->u.video_engine));
  3184. } else {
  3185. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3186. sizeof(config->u.cmd_engine));
  3187. }
  3188. memcpy(&config->video_timing, &mode->timing,
  3189. sizeof(config->video_timing));
  3190. config->video_timing.mdp_transfer_time_us =
  3191. mode->priv_info->mdp_transfer_time_us;
  3192. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3193. config->video_timing.dsc = &mode->priv_info->dsc;
  3194. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3195. config->video_timing.vdc = &mode->priv_info->vdc;
  3196. if (dyn_clk_caps->dyn_clk_support)
  3197. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3198. else
  3199. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3200. config->esc_clk_rate_hz = 19200000;
  3201. mutex_unlock(&panel->panel_lock);
  3202. return rc;
  3203. }
  3204. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3205. {
  3206. int rc = 0;
  3207. if (!panel) {
  3208. DSI_ERR("invalid params\n");
  3209. return -EINVAL;
  3210. }
  3211. mutex_lock(&panel->panel_lock);
  3212. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3213. if (panel->lp11_init)
  3214. goto error;
  3215. rc = dsi_panel_power_on(panel);
  3216. if (rc) {
  3217. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3218. goto error;
  3219. }
  3220. error:
  3221. mutex_unlock(&panel->panel_lock);
  3222. return rc;
  3223. }
  3224. int dsi_panel_update_pps(struct dsi_panel *panel)
  3225. {
  3226. int rc = 0;
  3227. struct dsi_panel_cmd_set *set = NULL;
  3228. struct dsi_display_mode_priv_info *priv_info = NULL;
  3229. if (!panel || !panel->cur_mode) {
  3230. DSI_ERR("invalid params\n");
  3231. return -EINVAL;
  3232. }
  3233. mutex_lock(&panel->panel_lock);
  3234. priv_info = panel->cur_mode->priv_info;
  3235. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3236. if (priv_info->dsc_enabled)
  3237. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3238. panel->dce_pps_cmd, 0,
  3239. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3240. else if (priv_info->vdc_enabled)
  3241. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3242. panel->dce_pps_cmd, 0,
  3243. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3244. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3245. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3246. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3247. if (rc) {
  3248. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3249. goto error;
  3250. }
  3251. }
  3252. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3253. if (rc) {
  3254. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3255. panel->name, rc);
  3256. }
  3257. dsi_panel_destroy_cmd_packets(set);
  3258. error:
  3259. mutex_unlock(&panel->panel_lock);
  3260. return rc;
  3261. }
  3262. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3263. {
  3264. int rc = 0;
  3265. if (!panel) {
  3266. DSI_ERR("invalid params\n");
  3267. return -EINVAL;
  3268. }
  3269. mutex_lock(&panel->panel_lock);
  3270. if (!panel->panel_initialized)
  3271. goto exit;
  3272. /*
  3273. * Consider LP1->LP2->LP1.
  3274. * If the panel is already in LP mode, do not need to
  3275. * set the regulator.
  3276. * IBB and AB power mode would be set at the same time
  3277. * in PMIC driver, so we only call ibb setting that is enough.
  3278. */
  3279. if (dsi_panel_is_type_oled(panel) &&
  3280. panel->power_mode != SDE_MODE_DPMS_LP2)
  3281. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3282. "ibb", REGULATOR_MODE_IDLE);
  3283. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3284. if (rc)
  3285. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3286. panel->name, rc);
  3287. exit:
  3288. mutex_unlock(&panel->panel_lock);
  3289. return rc;
  3290. }
  3291. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3292. {
  3293. int rc = 0;
  3294. if (!panel) {
  3295. DSI_ERR("invalid params\n");
  3296. return -EINVAL;
  3297. }
  3298. mutex_lock(&panel->panel_lock);
  3299. if (!panel->panel_initialized)
  3300. goto exit;
  3301. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3302. if (rc)
  3303. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3304. panel->name, rc);
  3305. exit:
  3306. mutex_unlock(&panel->panel_lock);
  3307. return rc;
  3308. }
  3309. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3310. {
  3311. int rc = 0;
  3312. if (!panel) {
  3313. DSI_ERR("invalid params\n");
  3314. return -EINVAL;
  3315. }
  3316. mutex_lock(&panel->panel_lock);
  3317. if (!panel->panel_initialized)
  3318. goto exit;
  3319. /*
  3320. * Consider about LP1->LP2->NOLP.
  3321. */
  3322. if (dsi_panel_is_type_oled(panel) &&
  3323. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3324. panel->power_mode == SDE_MODE_DPMS_LP2))
  3325. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3326. "ibb", REGULATOR_MODE_NORMAL);
  3327. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3328. if (rc)
  3329. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3330. panel->name, rc);
  3331. exit:
  3332. mutex_unlock(&panel->panel_lock);
  3333. return rc;
  3334. }
  3335. int dsi_panel_prepare(struct dsi_panel *panel)
  3336. {
  3337. int rc = 0;
  3338. if (!panel) {
  3339. DSI_ERR("invalid params\n");
  3340. return -EINVAL;
  3341. }
  3342. mutex_lock(&panel->panel_lock);
  3343. if (panel->lp11_init) {
  3344. rc = dsi_panel_power_on(panel);
  3345. if (rc) {
  3346. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3347. panel->name, rc);
  3348. goto error;
  3349. }
  3350. }
  3351. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3352. if (rc) {
  3353. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3354. panel->name, rc);
  3355. goto error;
  3356. }
  3357. error:
  3358. mutex_unlock(&panel->panel_lock);
  3359. return rc;
  3360. }
  3361. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3362. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3363. {
  3364. static const int ROI_CMD_LEN = 5;
  3365. int rc = 0;
  3366. /* DTYPE_DCS_LWRITE */
  3367. char *caset, *paset;
  3368. set->cmds = NULL;
  3369. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3370. if (!caset) {
  3371. rc = -ENOMEM;
  3372. goto exit;
  3373. }
  3374. caset[0] = 0x2a;
  3375. caset[1] = (roi->x & 0xFF00) >> 8;
  3376. caset[2] = roi->x & 0xFF;
  3377. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3378. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3379. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3380. if (!paset) {
  3381. rc = -ENOMEM;
  3382. goto error_free_mem;
  3383. }
  3384. paset[0] = 0x2b;
  3385. paset[1] = (roi->y & 0xFF00) >> 8;
  3386. paset[2] = roi->y & 0xFF;
  3387. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3388. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3389. set->type = DSI_CMD_SET_ROI;
  3390. set->state = DSI_CMD_SET_STATE_LP;
  3391. set->count = 2; /* send caset + paset together */
  3392. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3393. if (!set->cmds) {
  3394. rc = -ENOMEM;
  3395. goto error_free_mem;
  3396. }
  3397. set->cmds[0].msg.channel = 0;
  3398. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3399. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3400. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3401. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3402. set->cmds[0].msg.tx_buf = caset;
  3403. set->cmds[0].msg.rx_len = 0;
  3404. set->cmds[0].msg.rx_buf = 0;
  3405. set->cmds[0].msg.wait_ms = 0;
  3406. set->cmds[0].last_command = 0;
  3407. set->cmds[0].post_wait_ms = 0;
  3408. set->cmds[1].msg.channel = 0;
  3409. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3410. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3411. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3412. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3413. set->cmds[1].msg.tx_buf = paset;
  3414. set->cmds[1].msg.rx_len = 0;
  3415. set->cmds[1].msg.rx_buf = 0;
  3416. set->cmds[1].msg.wait_ms = 0;
  3417. set->cmds[1].last_command = 1;
  3418. set->cmds[1].post_wait_ms = 0;
  3419. goto exit;
  3420. error_free_mem:
  3421. kfree(caset);
  3422. kfree(paset);
  3423. kfree(set->cmds);
  3424. exit:
  3425. return rc;
  3426. }
  3427. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3428. int ctrl_idx)
  3429. {
  3430. int rc = 0;
  3431. if (!panel) {
  3432. DSI_ERR("invalid params\n");
  3433. return -EINVAL;
  3434. }
  3435. mutex_lock(&panel->panel_lock);
  3436. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3437. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3438. if (rc)
  3439. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3440. panel->name, rc);
  3441. mutex_unlock(&panel->panel_lock);
  3442. return rc;
  3443. }
  3444. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3445. int ctrl_idx)
  3446. {
  3447. int rc = 0;
  3448. if (!panel) {
  3449. DSI_ERR("invalid params\n");
  3450. return -EINVAL;
  3451. }
  3452. mutex_lock(&panel->panel_lock);
  3453. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3454. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3455. if (rc)
  3456. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3457. panel->name, rc);
  3458. mutex_unlock(&panel->panel_lock);
  3459. return rc;
  3460. }
  3461. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3462. struct dsi_rect *roi)
  3463. {
  3464. int rc = 0;
  3465. struct dsi_panel_cmd_set *set;
  3466. struct dsi_display_mode_priv_info *priv_info;
  3467. if (!panel || !panel->cur_mode) {
  3468. DSI_ERR("Invalid params\n");
  3469. return -EINVAL;
  3470. }
  3471. priv_info = panel->cur_mode->priv_info;
  3472. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3473. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3474. if (rc) {
  3475. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3476. panel->name, rc);
  3477. return rc;
  3478. }
  3479. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3480. roi->x, roi->y, roi->w, roi->h);
  3481. mutex_lock(&panel->panel_lock);
  3482. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3483. if (rc)
  3484. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3485. panel->name, rc);
  3486. mutex_unlock(&panel->panel_lock);
  3487. dsi_panel_destroy_cmd_packets(set);
  3488. dsi_panel_dealloc_cmd_packets(set);
  3489. return rc;
  3490. }
  3491. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3492. {
  3493. int rc = 0;
  3494. if (!panel) {
  3495. DSI_ERR("Invalid params\n");
  3496. return -EINVAL;
  3497. }
  3498. mutex_lock(&panel->panel_lock);
  3499. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3500. if (rc)
  3501. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3502. panel->name, rc);
  3503. mutex_unlock(&panel->panel_lock);
  3504. return rc;
  3505. }
  3506. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3507. {
  3508. int rc = 0;
  3509. if (!panel) {
  3510. DSI_ERR("Invalid params\n");
  3511. return -EINVAL;
  3512. }
  3513. mutex_lock(&panel->panel_lock);
  3514. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3515. if (rc)
  3516. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3517. panel->name, rc);
  3518. mutex_unlock(&panel->panel_lock);
  3519. return rc;
  3520. }
  3521. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3522. {
  3523. int rc = 0;
  3524. if (!panel) {
  3525. DSI_ERR("Invalid params\n");
  3526. return -EINVAL;
  3527. }
  3528. mutex_lock(&panel->panel_lock);
  3529. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3530. if (rc)
  3531. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3532. panel->name, rc);
  3533. mutex_unlock(&panel->panel_lock);
  3534. return rc;
  3535. }
  3536. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3537. {
  3538. int rc = 0;
  3539. if (!panel) {
  3540. DSI_ERR("Invalid params\n");
  3541. return -EINVAL;
  3542. }
  3543. mutex_lock(&panel->panel_lock);
  3544. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3545. if (rc)
  3546. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3547. panel->name, rc);
  3548. mutex_unlock(&panel->panel_lock);
  3549. return rc;
  3550. }
  3551. int dsi_panel_switch(struct dsi_panel *panel)
  3552. {
  3553. int rc = 0;
  3554. if (!panel) {
  3555. DSI_ERR("Invalid params\n");
  3556. return -EINVAL;
  3557. }
  3558. mutex_lock(&panel->panel_lock);
  3559. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3560. if (rc)
  3561. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3562. panel->name, rc);
  3563. mutex_unlock(&panel->panel_lock);
  3564. return rc;
  3565. }
  3566. int dsi_panel_post_switch(struct dsi_panel *panel)
  3567. {
  3568. int rc = 0;
  3569. if (!panel) {
  3570. DSI_ERR("Invalid params\n");
  3571. return -EINVAL;
  3572. }
  3573. mutex_lock(&panel->panel_lock);
  3574. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3575. if (rc)
  3576. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3577. panel->name, rc);
  3578. mutex_unlock(&panel->panel_lock);
  3579. return rc;
  3580. }
  3581. int dsi_panel_enable(struct dsi_panel *panel)
  3582. {
  3583. int rc = 0;
  3584. if (!panel) {
  3585. DSI_ERR("Invalid params\n");
  3586. return -EINVAL;
  3587. }
  3588. mutex_lock(&panel->panel_lock);
  3589. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3590. if (rc)
  3591. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3592. panel->name, rc);
  3593. else
  3594. panel->panel_initialized = true;
  3595. mutex_unlock(&panel->panel_lock);
  3596. return rc;
  3597. }
  3598. int dsi_panel_post_enable(struct dsi_panel *panel)
  3599. {
  3600. int rc = 0;
  3601. if (!panel) {
  3602. DSI_ERR("invalid params\n");
  3603. return -EINVAL;
  3604. }
  3605. mutex_lock(&panel->panel_lock);
  3606. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3607. if (rc) {
  3608. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3609. panel->name, rc);
  3610. goto error;
  3611. }
  3612. error:
  3613. mutex_unlock(&panel->panel_lock);
  3614. return rc;
  3615. }
  3616. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3617. {
  3618. int rc = 0;
  3619. if (!panel) {
  3620. DSI_ERR("invalid params\n");
  3621. return -EINVAL;
  3622. }
  3623. mutex_lock(&panel->panel_lock);
  3624. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3625. if (rc) {
  3626. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3627. panel->name, rc);
  3628. goto error;
  3629. }
  3630. error:
  3631. mutex_unlock(&panel->panel_lock);
  3632. return rc;
  3633. }
  3634. int dsi_panel_disable(struct dsi_panel *panel)
  3635. {
  3636. int rc = 0;
  3637. if (!panel) {
  3638. DSI_ERR("invalid params\n");
  3639. return -EINVAL;
  3640. }
  3641. mutex_lock(&panel->panel_lock);
  3642. /* Avoid sending panel off commands when ESD recovery is underway */
  3643. if (!atomic_read(&panel->esd_recovery_pending)) {
  3644. /*
  3645. * Need to set IBB/AB regulator mode to STANDBY,
  3646. * if panel is going off from AOD mode.
  3647. */
  3648. if (dsi_panel_is_type_oled(panel) &&
  3649. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3650. panel->power_mode == SDE_MODE_DPMS_LP2))
  3651. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3652. "ibb", REGULATOR_MODE_STANDBY);
  3653. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3654. if (rc) {
  3655. /*
  3656. * Sending panel off commands may fail when DSI
  3657. * controller is in a bad state. These failures can be
  3658. * ignored since controller will go for full reset on
  3659. * subsequent display enable anyway.
  3660. */
  3661. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3662. panel->name, rc);
  3663. rc = 0;
  3664. }
  3665. }
  3666. panel->panel_initialized = false;
  3667. panel->power_mode = SDE_MODE_DPMS_OFF;
  3668. mutex_unlock(&panel->panel_lock);
  3669. return rc;
  3670. }
  3671. int dsi_panel_unprepare(struct dsi_panel *panel)
  3672. {
  3673. int rc = 0;
  3674. if (!panel) {
  3675. DSI_ERR("invalid params\n");
  3676. return -EINVAL;
  3677. }
  3678. mutex_lock(&panel->panel_lock);
  3679. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3680. if (rc) {
  3681. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3682. panel->name, rc);
  3683. goto error;
  3684. }
  3685. error:
  3686. mutex_unlock(&panel->panel_lock);
  3687. return rc;
  3688. }
  3689. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3690. {
  3691. int rc = 0;
  3692. if (!panel) {
  3693. DSI_ERR("invalid params\n");
  3694. return -EINVAL;
  3695. }
  3696. mutex_lock(&panel->panel_lock);
  3697. rc = dsi_panel_power_off(panel);
  3698. if (rc) {
  3699. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3700. panel->name, rc);
  3701. goto error;
  3702. }
  3703. error:
  3704. mutex_unlock(&panel->panel_lock);
  3705. return rc;
  3706. }