sde_plane.c 124 KB

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  1. /*
  2. * Copyright (C) 2014-2019 The Linux Foundation. All rights reserved.
  3. * Copyright (C) 2013 Red Hat
  4. * Author: Rob Clark <[email protected]>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published by
  8. * the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
  19. #include <linux/debugfs.h>
  20. #include <linux/dma-buf.h>
  21. #include <uapi/drm/sde_drm.h>
  22. #include <uapi/drm/msm_drm_pp.h>
  23. #include "msm_prop.h"
  24. #include "msm_drv.h"
  25. #include "sde_kms.h"
  26. #include "sde_fence.h"
  27. #include "sde_formats.h"
  28. #include "sde_hw_sspp.h"
  29. #include "sde_hw_catalog_format.h"
  30. #include "sde_trace.h"
  31. #include "sde_crtc.h"
  32. #include "sde_vbif.h"
  33. #include "sde_plane.h"
  34. #include "sde_color_processing.h"
  35. #define SDE_DEBUG_PLANE(pl, fmt, ...) SDE_DEBUG("plane%d " fmt,\
  36. (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)
  37. #define SDE_ERROR_PLANE(pl, fmt, ...) SDE_ERROR("plane%d " fmt,\
  38. (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)
  39. #define DECIMATED_DIMENSION(dim, deci) (((dim) + ((1 << (deci)) - 1)) >> (deci))
  40. #define PHASE_STEP_SHIFT 21
  41. #define PHASE_STEP_UNIT_SCALE ((int) (1 << PHASE_STEP_SHIFT))
  42. #define PHASE_RESIDUAL 15
  43. #define SHARP_STRENGTH_DEFAULT 32
  44. #define SHARP_EDGE_THR_DEFAULT 112
  45. #define SHARP_SMOOTH_THR_DEFAULT 8
  46. #define SHARP_NOISE_THR_DEFAULT 2
  47. #define SDE_NAME_SIZE 12
  48. #define SDE_PLANE_COLOR_FILL_FLAG BIT(31)
  49. #define TIME_MULTIPLEX_RECT(r0, r1, buffer_lines) \
  50. ((r0).y >= ((r1).y + (r1).h + buffer_lines))
  51. /* multirect rect index */
  52. enum {
  53. R0,
  54. R1,
  55. R_MAX
  56. };
  57. #define SDE_QSEED_DEFAULT_DYN_EXP 0x0
  58. #define DEFAULT_REFRESH_RATE 60
  59. /**
  60. * enum sde_plane_qos - Different qos configurations for each pipe
  61. *
  62. * @SDE_PLANE_QOS_VBLANK_CTRL: Setup VBLANK qos for the pipe.
  63. * @SDE_PLANE_QOS_VBLANK_AMORTIZE: Enables Amortization within pipe.
  64. * this configuration is mutually exclusive from VBLANK_CTRL.
  65. * @SDE_PLANE_QOS_PANIC_CTRL: Setup panic for the pipe.
  66. */
  67. enum sde_plane_qos {
  68. SDE_PLANE_QOS_VBLANK_CTRL = BIT(0),
  69. SDE_PLANE_QOS_VBLANK_AMORTIZE = BIT(1),
  70. SDE_PLANE_QOS_PANIC_CTRL = BIT(2),
  71. };
  72. /*
  73. * struct sde_plane - local sde plane structure
  74. * @aspace: address space pointer
  75. * @csc_cfg: Decoded user configuration for csc
  76. * @csc_usr_ptr: Points to csc_cfg if valid user config available
  77. * @csc_ptr: Points to sde_csc_cfg structure to use for current
  78. * @mplane_list: List of multirect planes of the same pipe
  79. * @catalog: Points to sde catalog structure
  80. * @revalidate: force revalidation of all the plane properties
  81. * @xin_halt_forced_clk: whether or not clocks were forced on for xin halt
  82. * @blob_rot_caps: Pointer to rotator capability blob
  83. */
  84. struct sde_plane {
  85. struct drm_plane base;
  86. struct mutex lock;
  87. enum sde_sspp pipe;
  88. uint32_t features; /* capabilities from catalog */
  89. uint32_t perf_features; /* perf capabilities from catalog */
  90. uint32_t nformats;
  91. uint32_t formats[64];
  92. struct sde_hw_pipe *pipe_hw;
  93. struct sde_hw_pipe_cfg pipe_cfg;
  94. struct sde_hw_sharp_cfg sharp_cfg;
  95. struct sde_hw_pipe_qos_cfg pipe_qos_cfg;
  96. uint32_t color_fill;
  97. bool is_error;
  98. bool is_rt_pipe;
  99. bool is_virtual;
  100. struct list_head mplane_list;
  101. struct sde_mdss_cfg *catalog;
  102. bool revalidate;
  103. bool xin_halt_forced_clk;
  104. struct sde_csc_cfg csc_cfg;
  105. struct sde_csc_cfg *csc_usr_ptr;
  106. struct sde_csc_cfg *csc_ptr;
  107. const struct sde_sspp_sub_blks *pipe_sblk;
  108. char pipe_name[SDE_NAME_SIZE];
  109. struct msm_property_info property_info;
  110. struct msm_property_data property_data[PLANE_PROP_COUNT];
  111. struct drm_property_blob *blob_info;
  112. struct drm_property_blob *blob_rot_caps;
  113. /* debugfs related stuff */
  114. struct dentry *debugfs_root;
  115. bool debugfs_default_scale;
  116. };
  117. #define to_sde_plane(x) container_of(x, struct sde_plane, base)
  118. static int plane_prop_array[PLANE_PROP_COUNT] = {SDE_PLANE_DIRTY_ALL};
  119. static struct sde_kms *_sde_plane_get_kms(struct drm_plane *plane)
  120. {
  121. struct msm_drm_private *priv;
  122. if (!plane || !plane->dev)
  123. return NULL;
  124. priv = plane->dev->dev_private;
  125. if (!priv)
  126. return NULL;
  127. return to_sde_kms(priv->kms);
  128. }
  129. static struct sde_hw_ctl *_sde_plane_get_hw_ctl(const struct drm_plane *plane)
  130. {
  131. struct drm_plane_state *pstate = NULL;
  132. struct drm_crtc *drm_crtc = NULL;
  133. struct sde_crtc *sde_crtc = NULL;
  134. struct sde_crtc_mixer *mixer = NULL;
  135. struct sde_hw_ctl *ctl = NULL;
  136. if (!plane) {
  137. DRM_ERROR("Invalid plane %pK\n", plane);
  138. return NULL;
  139. }
  140. pstate = plane->state;
  141. if (!pstate) {
  142. DRM_ERROR("Invalid plane state %pK\n", pstate);
  143. return NULL;
  144. }
  145. drm_crtc = pstate->crtc;
  146. if (!drm_crtc) {
  147. DRM_ERROR("Invalid drm_crtc %pK\n", drm_crtc);
  148. return NULL;
  149. }
  150. sde_crtc = to_sde_crtc(drm_crtc);
  151. if (!sde_crtc) {
  152. DRM_ERROR("invalid sde_crtc %pK\n", sde_crtc);
  153. return NULL;
  154. }
  155. /* it will always return the first mixer and single CTL */
  156. mixer = sde_crtc->mixers;
  157. if (!mixer) {
  158. DRM_ERROR("invalid mixer %pK\n", mixer);
  159. return NULL;
  160. }
  161. ctl = mixer->hw_ctl;
  162. if (!mixer) {
  163. DRM_ERROR("invalid ctl %pK\n", ctl);
  164. return NULL;
  165. }
  166. return ctl;
  167. }
  168. static bool sde_plane_enabled(const struct drm_plane_state *state)
  169. {
  170. return state && state->fb && state->crtc;
  171. }
  172. bool sde_plane_is_sec_ui_allowed(struct drm_plane *plane)
  173. {
  174. struct sde_plane *psde;
  175. if (!plane)
  176. return false;
  177. psde = to_sde_plane(plane);
  178. return !(psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI));
  179. }
  180. void sde_plane_setup_src_split_order(struct drm_plane *plane,
  181. enum sde_sspp_multirect_index rect_mode, bool enable)
  182. {
  183. struct sde_plane *psde;
  184. if (!plane)
  185. return;
  186. psde = to_sde_plane(plane);
  187. if (psde->pipe_hw->ops.set_src_split_order)
  188. psde->pipe_hw->ops.set_src_split_order(psde->pipe_hw,
  189. rect_mode, enable);
  190. }
  191. /**
  192. * _sde_plane_calc_fill_level - calculate fill level of the given source format
  193. * @plane: Pointer to drm plane
  194. * @fmt: Pointer to source buffer format
  195. * @src_wdith: width of source buffer
  196. * Return: fill level corresponding to the source buffer/format or 0 if error
  197. */
  198. static inline int _sde_plane_calc_fill_level(struct drm_plane *plane,
  199. const struct sde_format *fmt, u32 src_width)
  200. {
  201. struct sde_plane *psde, *tmp;
  202. struct sde_plane_state *pstate;
  203. u32 fixed_buff_size;
  204. u32 total_fl;
  205. u32 hflip_bytes;
  206. u32 unused_space;
  207. if (!plane || !fmt || !plane->state || !src_width || !fmt->bpp) {
  208. SDE_ERROR("invalid arguments\n");
  209. return 0;
  210. }
  211. psde = to_sde_plane(plane);
  212. if (psde->perf_features & BIT(SDE_PERF_SSPP_QOS_FL_NOCALC))
  213. return 0;
  214. pstate = to_sde_plane_state(plane->state);
  215. fixed_buff_size = psde->pipe_sblk->pixel_ram_size;
  216. list_for_each_entry(tmp, &psde->mplane_list, mplane_list) {
  217. if (!sde_plane_enabled(tmp->base.state))
  218. continue;
  219. SDE_DEBUG("plane%d/%d src_width:%d/%d\n",
  220. psde->base.base.id, tmp->base.base.id,
  221. src_width, tmp->pipe_cfg.src_rect.w);
  222. src_width = max_t(u32, src_width, tmp->pipe_cfg.src_rect.w);
  223. }
  224. if ((pstate->rotation & DRM_MODE_REFLECT_X) &&
  225. SDE_FORMAT_IS_LINEAR(fmt))
  226. hflip_bytes = (src_width + 32) * fmt->bpp;
  227. else
  228. hflip_bytes = 0;
  229. if (fmt->fetch_planes == SDE_PLANE_PSEUDO_PLANAR) {
  230. unused_space = 23 * 128;
  231. if (fmt->chroma_sample == SDE_CHROMA_420) {
  232. /* NV12 */
  233. total_fl = (fixed_buff_size / 2 - hflip_bytes -
  234. unused_space) / ((src_width + 32) * fmt->bpp);
  235. } else {
  236. /* non NV12 */
  237. total_fl = (fixed_buff_size / 2 - hflip_bytes -
  238. unused_space) * 2 / ((src_width + 32) *
  239. fmt->bpp);
  240. }
  241. } else {
  242. unused_space = 6 * 128;
  243. if (pstate->multirect_mode == SDE_SSPP_MULTIRECT_PARALLEL) {
  244. total_fl = (fixed_buff_size / 2 - hflip_bytes -
  245. unused_space) * 2 / ((src_width + 32) *
  246. fmt->bpp);
  247. } else {
  248. total_fl = (fixed_buff_size - hflip_bytes -
  249. unused_space) * 2 / ((src_width + 32) *
  250. fmt->bpp);
  251. }
  252. }
  253. SDE_DEBUG("plane%u: pnum:%d fmt: %4.4s w:%u hf:%d us:%d fl:%u\n",
  254. plane->base.id, psde->pipe - SSPP_VIG0,
  255. (char *)&fmt->base.pixel_format,
  256. src_width, hflip_bytes, unused_space, total_fl);
  257. return total_fl;
  258. }
  259. /**
  260. * _sde_plane_get_qos_lut - get LUT mapping based on fill level
  261. * @tbl: Pointer to LUT table
  262. * @total_fl: fill level
  263. * Return: LUT setting corresponding to the fill level
  264. */
  265. static u64 _sde_plane_get_qos_lut(const struct sde_qos_lut_tbl *tbl,
  266. u32 total_fl)
  267. {
  268. int i;
  269. if (!tbl || !tbl->nentry || !tbl->entries)
  270. return 0;
  271. for (i = 0; i < tbl->nentry; i++)
  272. if (total_fl <= tbl->entries[i].fl)
  273. return tbl->entries[i].lut;
  274. /* if last fl is zero, use as default */
  275. if (!tbl->entries[i-1].fl)
  276. return tbl->entries[i-1].lut;
  277. return 0;
  278. }
  279. /**
  280. * _sde_plane_set_qos_lut - set QoS LUT of the given plane
  281. * @plane: Pointer to drm plane
  282. * @fb: Pointer to framebuffer associated with the given plane
  283. */
  284. static void _sde_plane_set_qos_lut(struct drm_plane *plane,
  285. struct drm_framebuffer *fb)
  286. {
  287. struct sde_plane *psde;
  288. const struct sde_format *fmt = NULL;
  289. u64 qos_lut;
  290. u32 total_fl = 0, lut_usage;
  291. if (!plane || !fb) {
  292. SDE_ERROR("invalid arguments plane %d fb %d\n",
  293. !plane, !fb);
  294. return;
  295. }
  296. psde = to_sde_plane(plane);
  297. if (!psde->pipe_hw || !psde->pipe_sblk || !psde->catalog) {
  298. SDE_ERROR("invalid arguments\n");
  299. return;
  300. } else if (!psde->pipe_hw->ops.setup_creq_lut) {
  301. return;
  302. }
  303. if (!psde->is_rt_pipe) {
  304. lut_usage = SDE_QOS_LUT_USAGE_NRT;
  305. } else {
  306. fmt = sde_get_sde_format_ext(
  307. fb->format->format,
  308. fb->modifier);
  309. total_fl = _sde_plane_calc_fill_level(plane, fmt,
  310. psde->pipe_cfg.src_rect.w);
  311. if (fmt && SDE_FORMAT_IS_LINEAR(fmt))
  312. lut_usage = SDE_QOS_LUT_USAGE_LINEAR;
  313. else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  314. psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE))
  315. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE_QSEED;
  316. else
  317. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE;
  318. }
  319. qos_lut = _sde_plane_get_qos_lut(
  320. &psde->catalog->perf.qos_lut_tbl[lut_usage], total_fl);
  321. psde->pipe_qos_cfg.creq_lut = qos_lut;
  322. trace_sde_perf_set_qos_luts(psde->pipe - SSPP_VIG0,
  323. (fmt) ? fmt->base.pixel_format : 0,
  324. psde->is_rt_pipe, total_fl, qos_lut, lut_usage);
  325. SDE_DEBUG("plane%u: pnum:%d fmt: %4.4s rt:%d fl:%u lut:0x%llx\n",
  326. plane->base.id,
  327. psde->pipe - SSPP_VIG0,
  328. fmt ? (char *)&fmt->base.pixel_format : NULL,
  329. psde->is_rt_pipe, total_fl, qos_lut);
  330. psde->pipe_hw->ops.setup_creq_lut(psde->pipe_hw, &psde->pipe_qos_cfg);
  331. }
  332. /**
  333. * _sde_plane_set_panic_lut - set danger/safe LUT of the given plane
  334. * @plane: Pointer to drm plane
  335. * @fb: Pointer to framebuffer associated with the given plane
  336. */
  337. static void _sde_plane_set_danger_lut(struct drm_plane *plane,
  338. struct drm_framebuffer *fb)
  339. {
  340. struct sde_plane *psde;
  341. const struct sde_format *fmt = NULL;
  342. u32 danger_lut, safe_lut;
  343. u32 total_fl = 0, lut_usage;
  344. if (!plane || !fb) {
  345. SDE_ERROR("invalid arguments\n");
  346. return;
  347. }
  348. psde = to_sde_plane(plane);
  349. if (!psde->pipe_hw || !psde->pipe_sblk || !psde->catalog) {
  350. SDE_ERROR("invalid arguments\n");
  351. return;
  352. } else if (!psde->pipe_hw->ops.setup_danger_safe_lut) {
  353. return;
  354. }
  355. if (!psde->is_rt_pipe) {
  356. danger_lut = psde->catalog->perf.danger_lut_tbl
  357. [SDE_QOS_LUT_USAGE_NRT];
  358. lut_usage = SDE_QOS_LUT_USAGE_NRT;
  359. } else {
  360. fmt = sde_get_sde_format_ext(
  361. fb->format->format,
  362. fb->modifier);
  363. total_fl = _sde_plane_calc_fill_level(plane, fmt,
  364. psde->pipe_cfg.src_rect.w);
  365. if (fmt && SDE_FORMAT_IS_LINEAR(fmt)) {
  366. danger_lut = psde->catalog->perf.danger_lut_tbl
  367. [SDE_QOS_LUT_USAGE_LINEAR];
  368. lut_usage = SDE_QOS_LUT_USAGE_LINEAR;
  369. } else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3)) {
  370. danger_lut = psde->catalog->perf.danger_lut_tbl
  371. [SDE_QOS_LUT_USAGE_MACROTILE_QSEED];
  372. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE_QSEED;
  373. } else {
  374. danger_lut = psde->catalog->perf.danger_lut_tbl
  375. [SDE_QOS_LUT_USAGE_MACROTILE];
  376. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE;
  377. }
  378. }
  379. safe_lut = (u32) _sde_plane_get_qos_lut(
  380. &psde->catalog->perf.sfe_lut_tbl[lut_usage], total_fl);
  381. psde->pipe_qos_cfg.danger_lut = danger_lut;
  382. psde->pipe_qos_cfg.safe_lut = safe_lut;
  383. trace_sde_perf_set_danger_luts(psde->pipe - SSPP_VIG0,
  384. (fmt) ? fmt->base.pixel_format : 0,
  385. (fmt) ? fmt->fetch_mode : 0,
  386. psde->pipe_qos_cfg.danger_lut,
  387. psde->pipe_qos_cfg.safe_lut);
  388. SDE_DEBUG("plane%u: pnum:%d fmt:%4.4s mode:%d fl:%d luts[0x%x,0x%x]\n",
  389. plane->base.id,
  390. psde->pipe - SSPP_VIG0,
  391. fmt ? (char *)&fmt->base.pixel_format : NULL,
  392. fmt ? fmt->fetch_mode : -1, total_fl,
  393. psde->pipe_qos_cfg.danger_lut,
  394. psde->pipe_qos_cfg.safe_lut);
  395. psde->pipe_hw->ops.setup_danger_safe_lut(psde->pipe_hw,
  396. &psde->pipe_qos_cfg);
  397. }
  398. /**
  399. * _sde_plane_set_qos_ctrl - set QoS control of the given plane
  400. * @plane: Pointer to drm plane
  401. * @enable: true to enable QoS control
  402. * @flags: QoS control mode (enum sde_plane_qos)
  403. */
  404. static void _sde_plane_set_qos_ctrl(struct drm_plane *plane,
  405. bool enable, u32 flags)
  406. {
  407. struct sde_plane *psde;
  408. if (!plane) {
  409. SDE_ERROR("invalid arguments\n");
  410. return;
  411. }
  412. psde = to_sde_plane(plane);
  413. if (!psde->pipe_hw || !psde->pipe_sblk) {
  414. SDE_ERROR("invalid arguments\n");
  415. return;
  416. } else if (!psde->pipe_hw->ops.setup_qos_ctrl) {
  417. return;
  418. }
  419. if (flags & SDE_PLANE_QOS_VBLANK_CTRL) {
  420. psde->pipe_qos_cfg.creq_vblank = psde->pipe_sblk->creq_vblank;
  421. psde->pipe_qos_cfg.danger_vblank =
  422. psde->pipe_sblk->danger_vblank;
  423. psde->pipe_qos_cfg.vblank_en = enable;
  424. }
  425. if (flags & SDE_PLANE_QOS_VBLANK_AMORTIZE) {
  426. /* this feature overrules previous VBLANK_CTRL */
  427. psde->pipe_qos_cfg.vblank_en = false;
  428. psde->pipe_qos_cfg.creq_vblank = 0; /* clear vblank bits */
  429. }
  430. if (flags & SDE_PLANE_QOS_PANIC_CTRL)
  431. psde->pipe_qos_cfg.danger_safe_en = enable;
  432. if (!psde->is_rt_pipe) {
  433. psde->pipe_qos_cfg.vblank_en = false;
  434. psde->pipe_qos_cfg.danger_safe_en = false;
  435. }
  436. SDE_DEBUG("plane%u: pnum:%d ds:%d vb:%d pri[0x%x, 0x%x] is_rt:%d\n",
  437. plane->base.id,
  438. psde->pipe - SSPP_VIG0,
  439. psde->pipe_qos_cfg.danger_safe_en,
  440. psde->pipe_qos_cfg.vblank_en,
  441. psde->pipe_qos_cfg.creq_vblank,
  442. psde->pipe_qos_cfg.danger_vblank,
  443. psde->is_rt_pipe);
  444. psde->pipe_hw->ops.setup_qos_ctrl(psde->pipe_hw,
  445. &psde->pipe_qos_cfg);
  446. }
  447. void sde_plane_set_revalidate(struct drm_plane *plane, bool enable)
  448. {
  449. struct sde_plane *psde;
  450. if (!plane)
  451. return;
  452. psde = to_sde_plane(plane);
  453. psde->revalidate = enable;
  454. }
  455. int sde_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
  456. {
  457. struct sde_plane *psde;
  458. int rc;
  459. if (!plane) {
  460. SDE_ERROR("invalid arguments\n");
  461. return -EINVAL;
  462. }
  463. psde = to_sde_plane(plane);
  464. if (!psde->is_rt_pipe)
  465. goto end;
  466. rc = pm_runtime_get_sync(plane->dev->dev);
  467. if (rc < 0) {
  468. SDE_ERROR("failed to enable power resource %d\n", rc);
  469. SDE_EVT32(rc, SDE_EVTLOG_ERROR);
  470. return rc;
  471. }
  472. _sde_plane_set_qos_ctrl(plane, enable, SDE_PLANE_QOS_PANIC_CTRL);
  473. pm_runtime_put_sync(plane->dev->dev);
  474. end:
  475. return 0;
  476. }
  477. /**
  478. * _sde_plane_set_ot_limit - set OT limit for the given plane
  479. * @plane: Pointer to drm plane
  480. * @crtc: Pointer to drm crtc
  481. */
  482. static void _sde_plane_set_ot_limit(struct drm_plane *plane,
  483. struct drm_crtc *crtc)
  484. {
  485. struct sde_plane *psde;
  486. struct sde_vbif_set_ot_params ot_params;
  487. struct msm_drm_private *priv;
  488. struct sde_kms *sde_kms;
  489. if (!plane || !plane->dev || !crtc) {
  490. SDE_ERROR("invalid arguments plane %d crtc %d\n",
  491. !plane, !crtc);
  492. return;
  493. }
  494. priv = plane->dev->dev_private;
  495. if (!priv || !priv->kms) {
  496. SDE_ERROR("invalid KMS reference\n");
  497. return;
  498. }
  499. sde_kms = to_sde_kms(priv->kms);
  500. psde = to_sde_plane(plane);
  501. if (!psde->pipe_hw) {
  502. SDE_ERROR("invalid pipe reference\n");
  503. return;
  504. }
  505. memset(&ot_params, 0, sizeof(ot_params));
  506. ot_params.xin_id = psde->pipe_hw->cap->xin_id;
  507. ot_params.num = psde->pipe_hw->idx - SSPP_NONE;
  508. ot_params.width = psde->pipe_cfg.src_rect.w;
  509. ot_params.height = psde->pipe_cfg.src_rect.h;
  510. ot_params.is_wfd = !psde->is_rt_pipe;
  511. ot_params.frame_rate = crtc->mode.vrefresh;
  512. ot_params.vbif_idx = VBIF_RT;
  513. ot_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  514. ot_params.rd = true;
  515. sde_vbif_set_ot_limit(sde_kms, &ot_params);
  516. }
  517. /**
  518. * _sde_plane_set_vbif_qos - set vbif QoS for the given plane
  519. * @plane: Pointer to drm plane
  520. */
  521. static void _sde_plane_set_qos_remap(struct drm_plane *plane)
  522. {
  523. struct sde_plane *psde;
  524. struct sde_vbif_set_qos_params qos_params;
  525. struct msm_drm_private *priv;
  526. struct sde_kms *sde_kms;
  527. if (!plane || !plane->dev) {
  528. SDE_ERROR("invalid arguments\n");
  529. return;
  530. }
  531. priv = plane->dev->dev_private;
  532. if (!priv || !priv->kms) {
  533. SDE_ERROR("invalid KMS reference\n");
  534. return;
  535. }
  536. sde_kms = to_sde_kms(priv->kms);
  537. psde = to_sde_plane(plane);
  538. if (!psde->pipe_hw) {
  539. SDE_ERROR("invalid pipe reference\n");
  540. return;
  541. }
  542. memset(&qos_params, 0, sizeof(qos_params));
  543. qos_params.vbif_idx = VBIF_RT;
  544. qos_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  545. qos_params.xin_id = psde->pipe_hw->cap->xin_id;
  546. qos_params.num = psde->pipe_hw->idx - SSPP_VIG0;
  547. qos_params.client_type = psde->is_rt_pipe ?
  548. VBIF_RT_CLIENT : VBIF_NRT_CLIENT;
  549. SDE_DEBUG("plane%d pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d\n",
  550. plane->base.id, qos_params.num,
  551. qos_params.vbif_idx,
  552. qos_params.xin_id, qos_params.client_type,
  553. qos_params.clk_ctrl);
  554. sde_vbif_set_qos_remap(sde_kms, &qos_params);
  555. }
  556. /**
  557. * _sde_plane_set_ts_prefill - set prefill with traffic shaper
  558. * @plane: Pointer to drm plane
  559. * @pstate: Pointer to sde plane state
  560. */
  561. static void _sde_plane_set_ts_prefill(struct drm_plane *plane,
  562. struct sde_plane_state *pstate)
  563. {
  564. struct sde_plane *psde;
  565. struct sde_hw_pipe_ts_cfg cfg;
  566. struct msm_drm_private *priv;
  567. struct sde_kms *sde_kms;
  568. if (!plane || !plane->dev) {
  569. SDE_ERROR("invalid arguments");
  570. return;
  571. }
  572. priv = plane->dev->dev_private;
  573. if (!priv || !priv->kms) {
  574. SDE_ERROR("invalid KMS reference\n");
  575. return;
  576. }
  577. sde_kms = to_sde_kms(priv->kms);
  578. psde = to_sde_plane(plane);
  579. if (!psde->pipe_hw) {
  580. SDE_ERROR("invalid pipe reference\n");
  581. return;
  582. }
  583. if (!psde->pipe_hw || !psde->pipe_hw->ops.setup_ts_prefill)
  584. return;
  585. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_VBLANK_AMORTIZE);
  586. memset(&cfg, 0, sizeof(cfg));
  587. cfg.size = sde_plane_get_property(pstate,
  588. PLANE_PROP_PREFILL_SIZE);
  589. cfg.time = sde_plane_get_property(pstate,
  590. PLANE_PROP_PREFILL_TIME);
  591. SDE_DEBUG("plane%d size:%llu time:%llu\n",
  592. plane->base.id, cfg.size, cfg.time);
  593. SDE_EVT32_VERBOSE(DRMID(plane), cfg.size, cfg.time);
  594. psde->pipe_hw->ops.setup_ts_prefill(psde->pipe_hw, &cfg,
  595. pstate->multirect_index);
  596. }
  597. /* helper to update a state's input fence pointer from the property */
  598. static void _sde_plane_set_input_fence(struct sde_plane *psde,
  599. struct sde_plane_state *pstate, uint64_t fd)
  600. {
  601. if (!psde || !pstate) {
  602. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  603. !psde, !pstate);
  604. return;
  605. }
  606. /* clear previous reference */
  607. if (pstate->input_fence)
  608. sde_sync_put(pstate->input_fence);
  609. /* get fence pointer for later */
  610. if (fd == 0)
  611. pstate->input_fence = NULL;
  612. else
  613. pstate->input_fence = sde_sync_get(fd);
  614. SDE_DEBUG_PLANE(psde, "0x%llX\n", fd);
  615. }
  616. int sde_plane_wait_input_fence(struct drm_plane *plane, uint32_t wait_ms)
  617. {
  618. struct sde_plane *psde;
  619. struct sde_plane_state *pstate;
  620. uint32_t prefix;
  621. void *input_fence;
  622. int ret = -EINVAL;
  623. signed long rc;
  624. if (!plane) {
  625. SDE_ERROR("invalid plane\n");
  626. } else if (!plane->state) {
  627. SDE_ERROR_PLANE(to_sde_plane(plane), "invalid state\n");
  628. } else {
  629. psde = to_sde_plane(plane);
  630. pstate = to_sde_plane_state(plane->state);
  631. input_fence = pstate->input_fence;
  632. if (input_fence) {
  633. prefix = sde_sync_get_name_prefix(input_fence);
  634. rc = sde_sync_wait(input_fence, wait_ms);
  635. switch (rc) {
  636. case 0:
  637. SDE_ERROR_PLANE(psde, "%ums timeout on %08X fd %d\n",
  638. wait_ms, prefix, sde_plane_get_property(pstate,
  639. PLANE_PROP_INPUT_FENCE));
  640. psde->is_error = true;
  641. sde_kms_timeline_status(plane->dev);
  642. ret = -ETIMEDOUT;
  643. break;
  644. case -ERESTARTSYS:
  645. SDE_ERROR_PLANE(psde,
  646. "%ums wait interrupted on %08X\n",
  647. wait_ms, prefix);
  648. psde->is_error = true;
  649. ret = -ERESTARTSYS;
  650. break;
  651. case -EINVAL:
  652. SDE_ERROR_PLANE(psde,
  653. "invalid fence param for %08X\n",
  654. prefix);
  655. psde->is_error = true;
  656. ret = -EINVAL;
  657. break;
  658. default:
  659. SDE_DEBUG_PLANE(psde, "signaled\n");
  660. ret = 0;
  661. break;
  662. }
  663. SDE_EVT32_VERBOSE(DRMID(plane), -ret, prefix);
  664. } else {
  665. ret = 0;
  666. }
  667. }
  668. return ret;
  669. }
  670. /**
  671. * _sde_plane_get_aspace: gets the address space based on the
  672. * fb_translation mode property
  673. */
  674. static int _sde_plane_get_aspace(
  675. struct sde_plane *psde,
  676. struct sde_plane_state *pstate,
  677. struct msm_gem_address_space **aspace)
  678. {
  679. struct sde_kms *kms;
  680. int mode;
  681. if (!psde || !pstate || !aspace) {
  682. SDE_ERROR("invalid parameters\n");
  683. return -EINVAL;
  684. }
  685. kms = _sde_plane_get_kms(&psde->base);
  686. if (!kms) {
  687. SDE_ERROR("invalid kms\n");
  688. return -EINVAL;
  689. }
  690. mode = sde_plane_get_property(pstate,
  691. PLANE_PROP_FB_TRANSLATION_MODE);
  692. switch (mode) {
  693. case SDE_DRM_FB_NON_SEC:
  694. *aspace = kms->aspace[MSM_SMMU_DOMAIN_UNSECURE];
  695. if (!aspace)
  696. return -EINVAL;
  697. break;
  698. case SDE_DRM_FB_SEC:
  699. *aspace = kms->aspace[MSM_SMMU_DOMAIN_SECURE];
  700. if (!aspace)
  701. return -EINVAL;
  702. break;
  703. case SDE_DRM_FB_SEC_DIR_TRANS:
  704. *aspace = NULL;
  705. break;
  706. default:
  707. SDE_ERROR("invalid fb_translation mode:%d\n", mode);
  708. return -EFAULT;
  709. }
  710. return 0;
  711. }
  712. static inline void _sde_plane_set_scanout(struct drm_plane *plane,
  713. struct sde_plane_state *pstate,
  714. struct sde_hw_pipe_cfg *pipe_cfg,
  715. struct drm_framebuffer *fb)
  716. {
  717. struct sde_plane *psde;
  718. struct msm_gem_address_space *aspace = NULL;
  719. int ret, mode;
  720. bool secure = false;
  721. if (!plane || !pstate || !pipe_cfg || !fb) {
  722. SDE_ERROR(
  723. "invalid arg(s), plane %d state %d cfg %d fb %d\n",
  724. !plane, !pstate, !pipe_cfg, !fb);
  725. return;
  726. }
  727. psde = to_sde_plane(plane);
  728. if (!psde->pipe_hw) {
  729. SDE_ERROR_PLANE(psde, "invalid pipe_hw\n");
  730. return;
  731. }
  732. ret = _sde_plane_get_aspace(psde, pstate, &aspace);
  733. if (ret) {
  734. SDE_ERROR_PLANE(psde, "Failed to get aspace %d\n", ret);
  735. return;
  736. }
  737. /*
  738. * framebuffer prepare is deferred for prepare_fb calls that
  739. * happen during the transition from secure to non-secure.
  740. * Handle the prepare at this point for such cases. This can be
  741. * expected for one or two frames during the transition.
  742. */
  743. if (aspace && pstate->defer_prepare_fb) {
  744. SDE_EVT32(DRMID(plane), psde->pipe, aspace->domain_attached);
  745. ret = msm_framebuffer_prepare(fb, pstate->aspace);
  746. if (ret) {
  747. SDE_ERROR_PLANE(psde,
  748. "failed to prepare framebuffer %d\n", ret);
  749. return;
  750. }
  751. pstate->defer_prepare_fb = false;
  752. }
  753. mode = sde_plane_get_property(pstate, PLANE_PROP_FB_TRANSLATION_MODE);
  754. if ((mode == SDE_DRM_FB_SEC) || (mode == SDE_DRM_FB_SEC_DIR_TRANS))
  755. secure = true;
  756. ret = sde_format_populate_layout(aspace, fb, &pipe_cfg->layout);
  757. if (ret == -EAGAIN)
  758. SDE_DEBUG_PLANE(psde, "not updating same src addrs\n");
  759. else if (ret) {
  760. SDE_ERROR_PLANE(psde, "failed to get format layout, %d\n", ret);
  761. /*
  762. * Force solid fill color on error. This is to prevent
  763. * smmu faults during secure session transition.
  764. */
  765. psde->is_error = true;
  766. } else if (psde->pipe_hw->ops.setup_sourceaddress) {
  767. SDE_EVT32_VERBOSE(psde->pipe_hw->idx,
  768. pipe_cfg->layout.width,
  769. pipe_cfg->layout.height,
  770. pipe_cfg->layout.plane_addr[0],
  771. pipe_cfg->layout.plane_size[0],
  772. pipe_cfg->layout.plane_addr[1],
  773. pipe_cfg->layout.plane_size[1],
  774. pipe_cfg->layout.plane_addr[2],
  775. pipe_cfg->layout.plane_size[2],
  776. pipe_cfg->layout.plane_addr[3],
  777. pipe_cfg->layout.plane_size[3],
  778. pstate->multirect_index,
  779. secure);
  780. psde->pipe_hw->ops.setup_sourceaddress(psde->pipe_hw, pipe_cfg,
  781. pstate->multirect_index);
  782. }
  783. }
  784. static int _sde_plane_setup_scaler3_lut(struct sde_plane *psde,
  785. struct sde_plane_state *pstate)
  786. {
  787. struct sde_hw_scaler3_cfg *cfg;
  788. int ret = 0;
  789. if (!psde || !pstate) {
  790. SDE_ERROR("invalid args\n");
  791. return -EINVAL;
  792. }
  793. cfg = &pstate->scaler3_cfg;
  794. cfg->dir_lut = msm_property_get_blob(
  795. &psde->property_info,
  796. &pstate->property_state, &cfg->dir_len,
  797. PLANE_PROP_SCALER_LUT_ED);
  798. cfg->cir_lut = msm_property_get_blob(
  799. &psde->property_info,
  800. &pstate->property_state, &cfg->cir_len,
  801. PLANE_PROP_SCALER_LUT_CIR);
  802. cfg->sep_lut = msm_property_get_blob(
  803. &psde->property_info,
  804. &pstate->property_state, &cfg->sep_len,
  805. PLANE_PROP_SCALER_LUT_SEP);
  806. if (!cfg->dir_lut || !cfg->cir_lut || !cfg->sep_lut)
  807. ret = -ENODATA;
  808. return ret;
  809. }
  810. static int _sde_plane_setup_scaler3lite_lut(struct sde_plane *psde,
  811. struct sde_plane_state *pstate)
  812. {
  813. struct sde_hw_scaler3_cfg *cfg;
  814. cfg = &pstate->scaler3_cfg;
  815. cfg->sep_lut = msm_property_get_blob(
  816. &psde->property_info,
  817. &pstate->property_state, &cfg->sep_len,
  818. PLANE_PROP_SCALER_LUT_SEP);
  819. return cfg->sep_lut ? 0 : -ENODATA;
  820. }
  821. static void _sde_plane_setup_scaler3(struct sde_plane *psde,
  822. struct sde_plane_state *pstate, const struct sde_format *fmt,
  823. uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v)
  824. {
  825. uint32_t decimated, i, src_w, src_h, dst_w, dst_h;
  826. struct sde_hw_scaler3_cfg *scale_cfg;
  827. if (!psde || !pstate || !fmt ||
  828. !chroma_subsmpl_h || !chroma_subsmpl_v) {
  829. SDE_ERROR("psde %d pstate %d fmt %d smp_h %d smp_v %d\n",
  830. !!psde, !!pstate, !!fmt, chroma_subsmpl_h,
  831. chroma_subsmpl_v);
  832. return;
  833. }
  834. scale_cfg = &pstate->scaler3_cfg;
  835. src_w = psde->pipe_cfg.src_rect.w;
  836. src_h = psde->pipe_cfg.src_rect.h;
  837. dst_w = psde->pipe_cfg.dst_rect.w;
  838. dst_h = psde->pipe_cfg.dst_rect.h;
  839. memset(scale_cfg, 0, sizeof(*scale_cfg));
  840. memset(&pstate->pixel_ext, 0, sizeof(struct sde_hw_pixel_ext));
  841. /*
  842. * For inline rotation cases, scaler config is post-rotation,
  843. * so swap the dimensions here. However, pixel extension will
  844. * need pre-rotation settings, this will be corrected below
  845. * when calculating pixel extension settings.
  846. */
  847. if (pstate->rotation & DRM_MODE_ROTATE_90)
  848. swap(src_w, src_h);
  849. decimated = DECIMATED_DIMENSION(src_w,
  850. psde->pipe_cfg.horz_decimation);
  851. scale_cfg->phase_step_x[SDE_SSPP_COMP_0] =
  852. mult_frac((1 << PHASE_STEP_SHIFT), decimated, dst_w);
  853. decimated = DECIMATED_DIMENSION(src_h,
  854. psde->pipe_cfg.vert_decimation);
  855. scale_cfg->phase_step_y[SDE_SSPP_COMP_0] =
  856. mult_frac((1 << PHASE_STEP_SHIFT), decimated, dst_h);
  857. scale_cfg->phase_step_y[SDE_SSPP_COMP_1_2] =
  858. scale_cfg->phase_step_y[SDE_SSPP_COMP_0] / chroma_subsmpl_v;
  859. scale_cfg->phase_step_x[SDE_SSPP_COMP_1_2] =
  860. scale_cfg->phase_step_x[SDE_SSPP_COMP_0] / chroma_subsmpl_h;
  861. scale_cfg->phase_step_x[SDE_SSPP_COMP_2] =
  862. scale_cfg->phase_step_x[SDE_SSPP_COMP_1_2];
  863. scale_cfg->phase_step_y[SDE_SSPP_COMP_2] =
  864. scale_cfg->phase_step_y[SDE_SSPP_COMP_1_2];
  865. scale_cfg->phase_step_x[SDE_SSPP_COMP_3] =
  866. scale_cfg->phase_step_x[SDE_SSPP_COMP_0];
  867. scale_cfg->phase_step_y[SDE_SSPP_COMP_3] =
  868. scale_cfg->phase_step_y[SDE_SSPP_COMP_0];
  869. for (i = 0; i < SDE_MAX_PLANES; i++) {
  870. scale_cfg->src_width[i] = DECIMATED_DIMENSION(src_w,
  871. psde->pipe_cfg.horz_decimation);
  872. scale_cfg->src_height[i] = DECIMATED_DIMENSION(src_h,
  873. psde->pipe_cfg.vert_decimation);
  874. if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2) {
  875. scale_cfg->src_width[i] /= chroma_subsmpl_h;
  876. scale_cfg->src_height[i] /= chroma_subsmpl_v;
  877. }
  878. scale_cfg->preload_x[i] = psde->pipe_sblk->scaler_blk.h_preload;
  879. scale_cfg->preload_y[i] = psde->pipe_sblk->scaler_blk.v_preload;
  880. /* For pixel extension we need the pre-rotated orientation */
  881. if (pstate->rotation & DRM_MODE_ROTATE_90) {
  882. pstate->pixel_ext.num_ext_pxls_top[i] =
  883. scale_cfg->src_width[i];
  884. pstate->pixel_ext.num_ext_pxls_left[i] =
  885. scale_cfg->src_height[i];
  886. } else {
  887. pstate->pixel_ext.num_ext_pxls_top[i] =
  888. scale_cfg->src_height[i];
  889. pstate->pixel_ext.num_ext_pxls_left[i] =
  890. scale_cfg->src_width[i];
  891. }
  892. }
  893. if ((!(SDE_FORMAT_IS_YUV(fmt)) && (src_h == dst_h)
  894. && (src_w == dst_w)) || pstate->multirect_mode)
  895. return;
  896. SDE_DEBUG_PLANE(psde,
  897. "setting bilinear: src:%dx%d dst:%dx%d chroma:%dx%d fmt:%x\n",
  898. src_w, src_h, dst_w, dst_h,
  899. chroma_subsmpl_v, chroma_subsmpl_h,
  900. fmt->base.pixel_format);
  901. scale_cfg->dst_width = dst_w;
  902. scale_cfg->dst_height = dst_h;
  903. scale_cfg->y_rgb_filter_cfg = SDE_SCALE_BIL;
  904. scale_cfg->uv_filter_cfg = SDE_SCALE_BIL;
  905. scale_cfg->alpha_filter_cfg = SDE_SCALE_ALPHA_BIL;
  906. scale_cfg->lut_flag = 0;
  907. scale_cfg->blend_cfg = 1;
  908. scale_cfg->enable = 1;
  909. scale_cfg->dyn_exp_disabled = SDE_QSEED_DEFAULT_DYN_EXP;
  910. }
  911. /**
  912. * _sde_plane_setup_scaler2 - determine default scaler phase steps/filter type
  913. * @psde: Pointer to SDE plane object
  914. * @src: Source size
  915. * @dst: Destination size
  916. * @phase_steps: Pointer to output array for phase steps
  917. * @filter: Pointer to output array for filter type
  918. * @fmt: Pointer to format definition
  919. * @chroma_subsampling: Subsampling amount for chroma channel
  920. *
  921. * Returns: 0 on success
  922. */
  923. static int _sde_plane_setup_scaler2(struct sde_plane *psde,
  924. uint32_t src, uint32_t dst, uint32_t *phase_steps,
  925. enum sde_hw_filter *filter, const struct sde_format *fmt,
  926. uint32_t chroma_subsampling)
  927. {
  928. if (!psde || !phase_steps || !filter || !fmt) {
  929. SDE_ERROR(
  930. "invalid arg(s), plane %d phase %d filter %d fmt %d\n",
  931. !psde, !phase_steps, !filter, !fmt);
  932. return -EINVAL;
  933. }
  934. /* calculate phase steps, leave init phase as zero */
  935. phase_steps[SDE_SSPP_COMP_0] =
  936. mult_frac(1 << PHASE_STEP_SHIFT, src, dst);
  937. phase_steps[SDE_SSPP_COMP_1_2] =
  938. phase_steps[SDE_SSPP_COMP_0] / chroma_subsampling;
  939. phase_steps[SDE_SSPP_COMP_2] = phase_steps[SDE_SSPP_COMP_1_2];
  940. phase_steps[SDE_SSPP_COMP_3] = phase_steps[SDE_SSPP_COMP_0];
  941. /* calculate scaler config, if necessary */
  942. if (SDE_FORMAT_IS_YUV(fmt) || src != dst) {
  943. filter[SDE_SSPP_COMP_3] =
  944. (src <= dst) ? SDE_SCALE_FILTER_BIL :
  945. SDE_SCALE_FILTER_PCMN;
  946. if (SDE_FORMAT_IS_YUV(fmt)) {
  947. filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_CA;
  948. filter[SDE_SSPP_COMP_1_2] = filter[SDE_SSPP_COMP_3];
  949. } else {
  950. filter[SDE_SSPP_COMP_0] = filter[SDE_SSPP_COMP_3];
  951. filter[SDE_SSPP_COMP_1_2] =
  952. SDE_SCALE_FILTER_NEAREST;
  953. }
  954. } else {
  955. /* disable scaler */
  956. filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_MAX;
  957. filter[SDE_SSPP_COMP_1_2] = SDE_SCALE_FILTER_MAX;
  958. filter[SDE_SSPP_COMP_3] = SDE_SCALE_FILTER_MAX;
  959. }
  960. return 0;
  961. }
  962. /**
  963. * _sde_plane_setup_pixel_ext - determine default pixel extension values
  964. * @psde: Pointer to SDE plane object
  965. * @src: Source size
  966. * @dst: Destination size
  967. * @decimated_src: Source size after decimation, if any
  968. * @phase_steps: Pointer to output array for phase steps
  969. * @out_src: Output array for pixel extension values
  970. * @out_edge1: Output array for pixel extension first edge
  971. * @out_edge2: Output array for pixel extension second edge
  972. * @filter: Pointer to array for filter type
  973. * @fmt: Pointer to format definition
  974. * @chroma_subsampling: Subsampling amount for chroma channel
  975. * @post_compare: Whether to chroma subsampled source size for comparisions
  976. */
  977. static void _sde_plane_setup_pixel_ext(struct sde_plane *psde,
  978. uint32_t src, uint32_t dst, uint32_t decimated_src,
  979. uint32_t *phase_steps, uint32_t *out_src, int *out_edge1,
  980. int *out_edge2, enum sde_hw_filter *filter,
  981. const struct sde_format *fmt, uint32_t chroma_subsampling,
  982. bool post_compare)
  983. {
  984. int64_t edge1, edge2, caf;
  985. uint32_t src_work;
  986. int i, tmp;
  987. if (psde && phase_steps && out_src && out_edge1 &&
  988. out_edge2 && filter && fmt) {
  989. /* handle CAF for YUV formats */
  990. if (SDE_FORMAT_IS_YUV(fmt) && *filter == SDE_SCALE_FILTER_CA)
  991. caf = PHASE_STEP_UNIT_SCALE;
  992. else
  993. caf = 0;
  994. for (i = 0; i < SDE_MAX_PLANES; i++) {
  995. src_work = decimated_src;
  996. if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2)
  997. src_work /= chroma_subsampling;
  998. if (post_compare)
  999. src = src_work;
  1000. if (!SDE_FORMAT_IS_YUV(fmt) && (src == dst)) {
  1001. /* unity */
  1002. edge1 = 0;
  1003. edge2 = 0;
  1004. } else if (dst >= src) {
  1005. /* upscale */
  1006. edge1 = (1 << PHASE_RESIDUAL);
  1007. edge1 -= caf;
  1008. edge2 = (1 << PHASE_RESIDUAL);
  1009. edge2 += (dst - 1) * *(phase_steps + i);
  1010. edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE;
  1011. edge2 += caf;
  1012. edge2 = -(edge2);
  1013. } else {
  1014. /* downscale */
  1015. edge1 = 0;
  1016. edge2 = (dst - 1) * *(phase_steps + i);
  1017. edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE;
  1018. edge2 += *(phase_steps + i);
  1019. edge2 = -(edge2);
  1020. }
  1021. /* only enable CAF for luma plane */
  1022. caf = 0;
  1023. /* populate output arrays */
  1024. *(out_src + i) = src_work;
  1025. /* edge updates taken from __pxl_extn_helper */
  1026. if (edge1 >= 0) {
  1027. tmp = (uint32_t)edge1;
  1028. tmp >>= PHASE_STEP_SHIFT;
  1029. *(out_edge1 + i) = -tmp;
  1030. } else {
  1031. tmp = (uint32_t)(-edge1);
  1032. *(out_edge1 + i) =
  1033. (tmp + PHASE_STEP_UNIT_SCALE - 1) >>
  1034. PHASE_STEP_SHIFT;
  1035. }
  1036. if (edge2 >= 0) {
  1037. tmp = (uint32_t)edge2;
  1038. tmp >>= PHASE_STEP_SHIFT;
  1039. *(out_edge2 + i) = -tmp;
  1040. } else {
  1041. tmp = (uint32_t)(-edge2);
  1042. *(out_edge2 + i) =
  1043. (tmp + PHASE_STEP_UNIT_SCALE - 1) >>
  1044. PHASE_STEP_SHIFT;
  1045. }
  1046. }
  1047. }
  1048. }
  1049. static inline void _sde_plane_setup_csc(struct sde_plane *psde)
  1050. {
  1051. static const struct sde_csc_cfg sde_csc_YUV2RGB_601L = {
  1052. {
  1053. /* S15.16 format */
  1054. 0x00012A00, 0x00000000, 0x00019880,
  1055. 0x00012A00, 0xFFFF9B80, 0xFFFF3000,
  1056. 0x00012A00, 0x00020480, 0x00000000,
  1057. },
  1058. /* signed bias */
  1059. { 0xfff0, 0xff80, 0xff80,},
  1060. { 0x0, 0x0, 0x0,},
  1061. /* unsigned clamp */
  1062. { 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0,},
  1063. { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff,},
  1064. };
  1065. static const struct sde_csc_cfg sde_csc10_YUV2RGB_601L = {
  1066. {
  1067. /* S15.16 format */
  1068. 0x00012A00, 0x00000000, 0x00019880,
  1069. 0x00012A00, 0xFFFF9B80, 0xFFFF3000,
  1070. 0x00012A00, 0x00020480, 0x00000000,
  1071. },
  1072. /* signed bias */
  1073. { 0xffc0, 0xfe00, 0xfe00,},
  1074. { 0x0, 0x0, 0x0,},
  1075. /* unsigned clamp */
  1076. { 0x40, 0x3ac, 0x40, 0x3c0, 0x40, 0x3c0,},
  1077. { 0x00, 0x3ff, 0x00, 0x3ff, 0x00, 0x3ff,},
  1078. };
  1079. if (!psde) {
  1080. SDE_ERROR("invalid plane\n");
  1081. return;
  1082. }
  1083. /* revert to kernel default if override not available */
  1084. if (psde->csc_usr_ptr)
  1085. psde->csc_ptr = psde->csc_usr_ptr;
  1086. else if (BIT(SDE_SSPP_CSC_10BIT) & psde->features)
  1087. psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc10_YUV2RGB_601L;
  1088. else
  1089. psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc_YUV2RGB_601L;
  1090. SDE_DEBUG_PLANE(psde, "using 0x%X 0x%X 0x%X...\n",
  1091. psde->csc_ptr->csc_mv[0],
  1092. psde->csc_ptr->csc_mv[1],
  1093. psde->csc_ptr->csc_mv[2]);
  1094. }
  1095. static void sde_color_process_plane_setup(struct drm_plane *plane)
  1096. {
  1097. struct sde_plane *psde;
  1098. struct sde_plane_state *pstate;
  1099. uint32_t hue, saturation, value, contrast;
  1100. struct drm_msm_memcol *memcol = NULL;
  1101. struct drm_msm_3d_gamut *vig_gamut = NULL;
  1102. struct drm_msm_igc_lut *igc = NULL;
  1103. struct drm_msm_pgc_lut *gc = NULL;
  1104. size_t memcol_sz = 0, size = 0;
  1105. struct sde_hw_cp_cfg hw_cfg = {};
  1106. struct sde_hw_ctl *ctl = _sde_plane_get_hw_ctl(plane);
  1107. psde = to_sde_plane(plane);
  1108. pstate = to_sde_plane_state(plane->state);
  1109. hue = (uint32_t) sde_plane_get_property(pstate, PLANE_PROP_HUE_ADJUST);
  1110. if (psde->pipe_hw->ops.setup_pa_hue)
  1111. psde->pipe_hw->ops.setup_pa_hue(psde->pipe_hw, &hue);
  1112. saturation = (uint32_t) sde_plane_get_property(pstate,
  1113. PLANE_PROP_SATURATION_ADJUST);
  1114. if (psde->pipe_hw->ops.setup_pa_sat)
  1115. psde->pipe_hw->ops.setup_pa_sat(psde->pipe_hw, &saturation);
  1116. value = (uint32_t) sde_plane_get_property(pstate,
  1117. PLANE_PROP_VALUE_ADJUST);
  1118. if (psde->pipe_hw->ops.setup_pa_val)
  1119. psde->pipe_hw->ops.setup_pa_val(psde->pipe_hw, &value);
  1120. contrast = (uint32_t) sde_plane_get_property(pstate,
  1121. PLANE_PROP_CONTRAST_ADJUST);
  1122. if (psde->pipe_hw->ops.setup_pa_cont)
  1123. psde->pipe_hw->ops.setup_pa_cont(psde->pipe_hw, &contrast);
  1124. if (psde->pipe_hw->ops.setup_pa_memcolor) {
  1125. /* Skin memory color setup */
  1126. memcol = msm_property_get_blob(&psde->property_info,
  1127. &pstate->property_state,
  1128. &memcol_sz,
  1129. PLANE_PROP_SKIN_COLOR);
  1130. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1131. MEMCOLOR_SKIN, memcol);
  1132. /* Sky memory color setup */
  1133. memcol = msm_property_get_blob(&psde->property_info,
  1134. &pstate->property_state,
  1135. &memcol_sz,
  1136. PLANE_PROP_SKY_COLOR);
  1137. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1138. MEMCOLOR_SKY, memcol);
  1139. /* Foliage memory color setup */
  1140. memcol = msm_property_get_blob(&psde->property_info,
  1141. &pstate->property_state,
  1142. &memcol_sz,
  1143. PLANE_PROP_FOLIAGE_COLOR);
  1144. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1145. MEMCOLOR_FOLIAGE, memcol);
  1146. }
  1147. if (pstate->dirty & SDE_PLANE_DIRTY_VIG_GAMUT &&
  1148. psde->pipe_hw->ops.setup_vig_gamut) {
  1149. vig_gamut = msm_property_get_blob(&psde->property_info,
  1150. &pstate->property_state,
  1151. &size,
  1152. PLANE_PROP_VIG_GAMUT);
  1153. hw_cfg.last_feature = 0;
  1154. hw_cfg.ctl = ctl;
  1155. hw_cfg.len = sizeof(struct drm_msm_3d_gamut);
  1156. hw_cfg.payload = vig_gamut;
  1157. psde->pipe_hw->ops.setup_vig_gamut(psde->pipe_hw, &hw_cfg);
  1158. }
  1159. if (pstate->dirty & SDE_PLANE_DIRTY_VIG_IGC &&
  1160. psde->pipe_hw->ops.setup_vig_igc) {
  1161. igc = msm_property_get_blob(&psde->property_info,
  1162. &pstate->property_state,
  1163. &size,
  1164. PLANE_PROP_VIG_IGC);
  1165. hw_cfg.last_feature = 0;
  1166. hw_cfg.ctl = ctl;
  1167. hw_cfg.len = sizeof(struct drm_msm_igc_lut);
  1168. hw_cfg.payload = igc;
  1169. psde->pipe_hw->ops.setup_vig_igc(psde->pipe_hw, &hw_cfg);
  1170. }
  1171. if (pstate->dirty & SDE_PLANE_DIRTY_DMA_IGC &&
  1172. psde->pipe_hw->ops.setup_dma_igc) {
  1173. igc = msm_property_get_blob(&psde->property_info,
  1174. &pstate->property_state,
  1175. &size,
  1176. PLANE_PROP_DMA_IGC);
  1177. hw_cfg.last_feature = 0;
  1178. hw_cfg.ctl = ctl;
  1179. hw_cfg.len = sizeof(struct drm_msm_igc_lut);
  1180. hw_cfg.payload = igc;
  1181. psde->pipe_hw->ops.setup_dma_igc(psde->pipe_hw, &hw_cfg,
  1182. pstate->multirect_index);
  1183. }
  1184. if (pstate->dirty & SDE_PLANE_DIRTY_DMA_GC &&
  1185. psde->pipe_hw->ops.setup_dma_gc) {
  1186. gc = msm_property_get_blob(&psde->property_info,
  1187. &pstate->property_state,
  1188. &size,
  1189. PLANE_PROP_DMA_GC);
  1190. hw_cfg.last_feature = 0;
  1191. hw_cfg.ctl = ctl;
  1192. hw_cfg.len = sizeof(struct drm_msm_pgc_lut);
  1193. hw_cfg.payload = gc;
  1194. psde->pipe_hw->ops.setup_dma_gc(psde->pipe_hw, &hw_cfg,
  1195. pstate->multirect_index);
  1196. }
  1197. }
  1198. static void _sde_plane_setup_scaler(struct sde_plane *psde,
  1199. struct sde_plane_state *pstate,
  1200. const struct sde_format *fmt, bool color_fill)
  1201. {
  1202. struct sde_hw_pixel_ext *pe;
  1203. uint32_t chroma_subsmpl_h, chroma_subsmpl_v;
  1204. if (!psde || !fmt || !pstate) {
  1205. SDE_ERROR("invalid arg(s), plane %d fmt %d state %d\n",
  1206. !psde, !fmt, !pstate);
  1207. return;
  1208. }
  1209. pe = &pstate->pixel_ext;
  1210. psde->pipe_cfg.horz_decimation =
  1211. sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE);
  1212. psde->pipe_cfg.vert_decimation =
  1213. sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE);
  1214. /* don't chroma subsample if decimating */
  1215. chroma_subsmpl_h = psde->pipe_cfg.horz_decimation ? 1 :
  1216. drm_format_horz_chroma_subsampling(fmt->base.pixel_format);
  1217. chroma_subsmpl_v = psde->pipe_cfg.vert_decimation ? 1 :
  1218. drm_format_vert_chroma_subsampling(fmt->base.pixel_format);
  1219. /* update scaler */
  1220. if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  1221. (psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE))) {
  1222. int rc = -EINVAL;
  1223. if (!color_fill && !psde->debugfs_default_scale)
  1224. rc = is_qseed3_rev_qseed3lite(psde->pipe_hw->catalog) ?
  1225. _sde_plane_setup_scaler3lite_lut(psde, pstate) :
  1226. _sde_plane_setup_scaler3_lut(psde, pstate);
  1227. if (rc || pstate->scaler_check_state !=
  1228. SDE_PLANE_SCLCHECK_SCALER_V2) {
  1229. SDE_EVT32_VERBOSE(DRMID(&psde->base), color_fill,
  1230. pstate->scaler_check_state,
  1231. psde->debugfs_default_scale, rc,
  1232. psde->pipe_cfg.src_rect.w,
  1233. psde->pipe_cfg.src_rect.h,
  1234. psde->pipe_cfg.dst_rect.w,
  1235. psde->pipe_cfg.dst_rect.h,
  1236. pstate->multirect_mode);
  1237. /* calculate default config for QSEED3 */
  1238. _sde_plane_setup_scaler3(psde, pstate, fmt,
  1239. chroma_subsmpl_h, chroma_subsmpl_v);
  1240. }
  1241. } else if (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V1 ||
  1242. color_fill || psde->debugfs_default_scale) {
  1243. uint32_t deci_dim, i;
  1244. /* calculate default configuration for QSEED2 */
  1245. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  1246. SDE_DEBUG_PLANE(psde, "default config\n");
  1247. deci_dim = DECIMATED_DIMENSION(psde->pipe_cfg.src_rect.w,
  1248. psde->pipe_cfg.horz_decimation);
  1249. _sde_plane_setup_scaler2(psde,
  1250. deci_dim,
  1251. psde->pipe_cfg.dst_rect.w,
  1252. pe->phase_step_x,
  1253. pe->horz_filter, fmt, chroma_subsmpl_h);
  1254. if (SDE_FORMAT_IS_YUV(fmt))
  1255. deci_dim &= ~0x1;
  1256. _sde_plane_setup_pixel_ext(psde, psde->pipe_cfg.src_rect.w,
  1257. psde->pipe_cfg.dst_rect.w, deci_dim,
  1258. pe->phase_step_x,
  1259. pe->roi_w,
  1260. pe->num_ext_pxls_left,
  1261. pe->num_ext_pxls_right, pe->horz_filter, fmt,
  1262. chroma_subsmpl_h, 0);
  1263. deci_dim = DECIMATED_DIMENSION(psde->pipe_cfg.src_rect.h,
  1264. psde->pipe_cfg.vert_decimation);
  1265. _sde_plane_setup_scaler2(psde,
  1266. deci_dim,
  1267. psde->pipe_cfg.dst_rect.h,
  1268. pe->phase_step_y,
  1269. pe->vert_filter, fmt, chroma_subsmpl_v);
  1270. _sde_plane_setup_pixel_ext(psde, psde->pipe_cfg.src_rect.h,
  1271. psde->pipe_cfg.dst_rect.h, deci_dim,
  1272. pe->phase_step_y,
  1273. pe->roi_h,
  1274. pe->num_ext_pxls_top,
  1275. pe->num_ext_pxls_btm, pe->vert_filter, fmt,
  1276. chroma_subsmpl_v, 1);
  1277. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1278. if (pe->num_ext_pxls_left[i] >= 0)
  1279. pe->left_rpt[i] = pe->num_ext_pxls_left[i];
  1280. else
  1281. pe->left_ftch[i] = pe->num_ext_pxls_left[i];
  1282. if (pe->num_ext_pxls_right[i] >= 0)
  1283. pe->right_rpt[i] = pe->num_ext_pxls_right[i];
  1284. else
  1285. pe->right_ftch[i] = pe->num_ext_pxls_right[i];
  1286. if (pe->num_ext_pxls_top[i] >= 0)
  1287. pe->top_rpt[i] = pe->num_ext_pxls_top[i];
  1288. else
  1289. pe->top_ftch[i] = pe->num_ext_pxls_top[i];
  1290. if (pe->num_ext_pxls_btm[i] >= 0)
  1291. pe->btm_rpt[i] = pe->num_ext_pxls_btm[i];
  1292. else
  1293. pe->btm_ftch[i] = pe->num_ext_pxls_btm[i];
  1294. }
  1295. }
  1296. }
  1297. /**
  1298. * _sde_plane_color_fill - enables color fill on plane
  1299. * @psde: Pointer to SDE plane object
  1300. * @color: RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
  1301. * @alpha: 8-bit fill alpha value, 255 selects 100% alpha
  1302. * Returns: 0 on success
  1303. */
  1304. static int _sde_plane_color_fill(struct sde_plane *psde,
  1305. uint32_t color, uint32_t alpha)
  1306. {
  1307. const struct sde_format *fmt;
  1308. const struct drm_plane *plane;
  1309. struct sde_plane_state *pstate;
  1310. bool blend_enable = true;
  1311. if (!psde || !psde->base.state) {
  1312. SDE_ERROR("invalid plane\n");
  1313. return -EINVAL;
  1314. }
  1315. if (!psde->pipe_hw) {
  1316. SDE_ERROR_PLANE(psde, "invalid plane h/w pointer\n");
  1317. return -EINVAL;
  1318. }
  1319. plane = &psde->base;
  1320. pstate = to_sde_plane_state(plane->state);
  1321. SDE_DEBUG_PLANE(psde, "\n");
  1322. /*
  1323. * select fill format to match user property expectation,
  1324. * h/w only supports RGB variants
  1325. */
  1326. fmt = sde_get_sde_format(DRM_FORMAT_ABGR8888);
  1327. blend_enable = (SDE_DRM_BLEND_OP_OPAQUE !=
  1328. sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP));
  1329. /* update sspp */
  1330. if (fmt && psde->pipe_hw->ops.setup_solidfill) {
  1331. psde->pipe_hw->ops.setup_solidfill(psde->pipe_hw,
  1332. (color & 0xFFFFFF) | ((alpha & 0xFF) << 24),
  1333. pstate->multirect_index);
  1334. /* override scaler/decimation if solid fill */
  1335. psde->pipe_cfg.src_rect.x = 0;
  1336. psde->pipe_cfg.src_rect.y = 0;
  1337. psde->pipe_cfg.src_rect.w = psde->pipe_cfg.dst_rect.w;
  1338. psde->pipe_cfg.src_rect.h = psde->pipe_cfg.dst_rect.h;
  1339. _sde_plane_setup_scaler(psde, pstate, fmt, true);
  1340. if (psde->pipe_hw->ops.setup_format)
  1341. psde->pipe_hw->ops.setup_format(psde->pipe_hw,
  1342. fmt, blend_enable,
  1343. SDE_SSPP_SOLID_FILL,
  1344. pstate->multirect_index);
  1345. if (psde->pipe_hw->ops.setup_rects)
  1346. psde->pipe_hw->ops.setup_rects(psde->pipe_hw,
  1347. &psde->pipe_cfg,
  1348. pstate->multirect_index);
  1349. if (psde->pipe_hw->ops.setup_pe)
  1350. psde->pipe_hw->ops.setup_pe(psde->pipe_hw,
  1351. &pstate->pixel_ext);
  1352. if (psde->pipe_hw->ops.setup_scaler &&
  1353. pstate->multirect_index != SDE_SSPP_RECT_1) {
  1354. psde->pipe_hw->ctl = _sde_plane_get_hw_ctl(plane);
  1355. psde->pipe_hw->ops.setup_scaler(psde->pipe_hw,
  1356. &psde->pipe_cfg, &pstate->pixel_ext,
  1357. &pstate->scaler3_cfg);
  1358. }
  1359. }
  1360. return 0;
  1361. }
  1362. /**
  1363. * sde_plane_rot_atomic_check - verify rotator update of the given state
  1364. * @plane: Pointer to drm plane
  1365. * @state: Pointer to drm plane state to be validated
  1366. * return: 0 if success; error code otherwise
  1367. */
  1368. static int sde_plane_rot_atomic_check(struct drm_plane *plane,
  1369. struct drm_plane_state *state)
  1370. {
  1371. struct sde_plane *psde;
  1372. struct sde_plane_state *pstate, *old_pstate;
  1373. int ret = 0;
  1374. u32 rotation;
  1375. if (!plane || !state) {
  1376. SDE_ERROR("invalid plane/state\n");
  1377. return -EINVAL;
  1378. }
  1379. psde = to_sde_plane(plane);
  1380. pstate = to_sde_plane_state(state);
  1381. old_pstate = to_sde_plane_state(plane->state);
  1382. /* check inline rotation and simplify the transform */
  1383. rotation = drm_rotation_simplify(
  1384. state->rotation,
  1385. DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |
  1386. DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y);
  1387. if ((rotation & DRM_MODE_ROTATE_180) ||
  1388. (rotation & DRM_MODE_ROTATE_270)) {
  1389. SDE_ERROR_PLANE(psde,
  1390. "invalid rotation transform must be simplified 0x%x\n",
  1391. rotation);
  1392. ret = -EINVAL;
  1393. goto exit;
  1394. }
  1395. if (rotation & DRM_MODE_ROTATE_90) {
  1396. struct msm_drm_private *priv = plane->dev->dev_private;
  1397. struct sde_kms *sde_kms;
  1398. const struct msm_format *msm_fmt;
  1399. const struct sde_format *fmt;
  1400. struct sde_rect src;
  1401. bool q16_data = true;
  1402. POPULATE_RECT(&src, state->src_x, state->src_y,
  1403. state->src_w, state->src_h, q16_data);
  1404. /*
  1405. * DRM framework expects rotation flag in counter-clockwise
  1406. * direction and the HW expects in clockwise direction.
  1407. * Flip the flags to match with HW.
  1408. */
  1409. rotation ^= (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y);
  1410. if (!psde->pipe_sblk->in_rot_maxdwnscale_rt_num ||
  1411. !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom ||
  1412. !psde->pipe_sblk->in_rot_maxdwnscale_nrt ||
  1413. !psde->pipe_sblk->in_rot_maxheight ||
  1414. !psde->pipe_sblk->in_rot_format_list ||
  1415. !(psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1))) {
  1416. SDE_ERROR_PLANE(psde,
  1417. "wrong config rt:%d/%d nrt:%d fmt:%d h:%d 0x%x\n",
  1418. !psde->pipe_sblk->in_rot_maxdwnscale_rt_num,
  1419. !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom,
  1420. !psde->pipe_sblk->in_rot_maxdwnscale_nrt,
  1421. !psde->pipe_sblk->in_rot_format_list,
  1422. !psde->pipe_sblk->in_rot_maxheight,
  1423. psde->features);
  1424. ret = -EINVAL;
  1425. goto exit;
  1426. }
  1427. /* check for valid height */
  1428. if (src.h > psde->pipe_sblk->in_rot_maxheight) {
  1429. SDE_ERROR_PLANE(psde,
  1430. "invalid height for inline rot:%d max:%d\n",
  1431. src.h, psde->pipe_sblk->in_rot_maxheight);
  1432. ret = -EINVAL;
  1433. goto exit;
  1434. }
  1435. if (!sde_plane_enabled(state))
  1436. goto exit;
  1437. /* check for valid formats supported by inline rot */
  1438. sde_kms = to_sde_kms(priv->kms);
  1439. msm_fmt = msm_framebuffer_format(state->fb);
  1440. fmt = to_sde_format(msm_fmt);
  1441. ret = sde_format_validate_fmt(&sde_kms->base, fmt,
  1442. psde->pipe_sblk->in_rot_format_list);
  1443. }
  1444. exit:
  1445. pstate->rotation = rotation;
  1446. return ret;
  1447. }
  1448. static bool _sde_plane_halt_requests(struct drm_plane *plane,
  1449. uint32_t xin_id, bool halt_forced_clk, bool enable)
  1450. {
  1451. struct sde_plane *psde;
  1452. struct msm_drm_private *priv;
  1453. struct sde_vbif_set_xin_halt_params halt_params;
  1454. if (!plane || !plane->dev) {
  1455. SDE_ERROR("invalid arguments\n");
  1456. return false;
  1457. }
  1458. psde = to_sde_plane(plane);
  1459. if (!psde->pipe_hw || !psde->pipe_hw->cap) {
  1460. SDE_ERROR("invalid pipe reference\n");
  1461. return false;
  1462. }
  1463. priv = plane->dev->dev_private;
  1464. if (!priv || !priv->kms) {
  1465. SDE_ERROR("invalid KMS reference\n");
  1466. return false;
  1467. }
  1468. memset(&halt_params, 0, sizeof(halt_params));
  1469. halt_params.vbif_idx = VBIF_RT;
  1470. halt_params.xin_id = xin_id;
  1471. halt_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  1472. halt_params.forced_on = halt_forced_clk;
  1473. halt_params.enable = enable;
  1474. return sde_vbif_set_xin_halt(to_sde_kms(priv->kms), &halt_params);
  1475. }
  1476. void sde_plane_halt_requests(struct drm_plane *plane, bool enable)
  1477. {
  1478. struct sde_plane *psde;
  1479. if (!plane) {
  1480. SDE_ERROR("invalid plane\n");
  1481. return;
  1482. }
  1483. psde = to_sde_plane(plane);
  1484. if (!psde->pipe_hw || !psde->pipe_hw->cap) {
  1485. SDE_ERROR("invalid pipe reference\n");
  1486. return;
  1487. }
  1488. SDE_EVT32(DRMID(plane), psde->xin_halt_forced_clk, enable);
  1489. psde->xin_halt_forced_clk =
  1490. _sde_plane_halt_requests(plane, psde->pipe_hw->cap->xin_id,
  1491. psde->xin_halt_forced_clk, enable);
  1492. }
  1493. void sde_plane_secure_ctrl_xin_client(struct drm_plane *plane,
  1494. struct drm_crtc *crtc)
  1495. {
  1496. struct sde_plane *psde;
  1497. if (!plane || !crtc) {
  1498. SDE_ERROR("invalid plane/crtc\n");
  1499. return;
  1500. }
  1501. psde = to_sde_plane(plane);
  1502. if (psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI))
  1503. return;
  1504. /* do all VBIF programming for the sec-ui allowed SSPP */
  1505. _sde_plane_set_qos_remap(plane);
  1506. _sde_plane_set_ot_limit(plane, crtc);
  1507. }
  1508. /**
  1509. * sde_plane_rot_install_properties - install plane rotator properties
  1510. * @plane: Pointer to drm plane
  1511. * @catalog: Pointer to mdss configuration
  1512. * return: none
  1513. */
  1514. static void sde_plane_rot_install_properties(struct drm_plane *plane,
  1515. struct sde_mdss_cfg *catalog)
  1516. {
  1517. struct sde_plane *psde = to_sde_plane(plane);
  1518. unsigned long supported_rotations = DRM_MODE_ROTATE_0 |
  1519. DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y;
  1520. int ret = 0;
  1521. if (!plane || !psde) {
  1522. SDE_ERROR("invalid plane\n");
  1523. return;
  1524. } else if (!catalog) {
  1525. SDE_ERROR("invalid catalog\n");
  1526. return;
  1527. }
  1528. if (psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1))
  1529. supported_rotations |= DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |
  1530. DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270;
  1531. ret = drm_plane_create_rotation_property(plane,
  1532. DRM_MODE_ROTATE_0, supported_rotations);
  1533. if (ret) {
  1534. DRM_ERROR("create rotation property failed: %d\n", ret);
  1535. return;
  1536. }
  1537. }
  1538. void sde_plane_clear_multirect(const struct drm_plane_state *drm_state)
  1539. {
  1540. struct sde_plane_state *pstate;
  1541. if (!drm_state)
  1542. return;
  1543. pstate = to_sde_plane_state(drm_state);
  1544. pstate->multirect_index = SDE_SSPP_RECT_SOLO;
  1545. pstate->multirect_mode = SDE_SSPP_MULTIRECT_NONE;
  1546. }
  1547. /**
  1548. * multi_rect validate API allows to validate only R0 and R1 RECT
  1549. * passing for each plane. Client of this API must not pass multiple
  1550. * plane which are not sharing same XIN client. Such calls will fail
  1551. * even though kernel client is passing valid multirect configuration.
  1552. */
  1553. int sde_plane_validate_multirect_v2(struct sde_multirect_plane_states *plane)
  1554. {
  1555. struct sde_plane_state *pstate[R_MAX];
  1556. const struct drm_plane_state *drm_state[R_MAX];
  1557. struct sde_rect src[R_MAX], dst[R_MAX];
  1558. struct sde_plane *sde_plane[R_MAX];
  1559. const struct sde_format *fmt[R_MAX];
  1560. int xin_id[R_MAX];
  1561. bool q16_data = true;
  1562. int i, j, buffer_lines, width_threshold[R_MAX];
  1563. unsigned int max_tile_height = 1;
  1564. bool parallel_fetch_qualified = true;
  1565. enum sde_sspp_multirect_mode mode = SDE_SSPP_MULTIRECT_NONE;
  1566. const struct msm_format *msm_fmt;
  1567. bool const_alpha_enable = true;
  1568. for (i = 0; i < R_MAX; i++) {
  1569. drm_state[i] = i ? plane->r1 : plane->r0;
  1570. if (!drm_state[i]) {
  1571. SDE_ERROR("drm plane state is NULL\n");
  1572. return -EINVAL;
  1573. }
  1574. pstate[i] = to_sde_plane_state(drm_state[i]);
  1575. sde_plane[i] = to_sde_plane(drm_state[i]->plane);
  1576. xin_id[i] = sde_plane[i]->pipe_hw->cap->xin_id;
  1577. for (j = 0; j < i; j++) {
  1578. if (xin_id[i] != xin_id[j]) {
  1579. SDE_ERROR_PLANE(sde_plane[i],
  1580. "invalid multirect validate call base:%d xin_id:%d curr:%d xin:%d\n",
  1581. j, xin_id[j], i, xin_id[i]);
  1582. return -EINVAL;
  1583. }
  1584. }
  1585. msm_fmt = msm_framebuffer_format(drm_state[i]->fb);
  1586. if (!msm_fmt) {
  1587. SDE_ERROR_PLANE(sde_plane[i], "null fb\n");
  1588. return -EINVAL;
  1589. }
  1590. fmt[i] = to_sde_format(msm_fmt);
  1591. if (SDE_FORMAT_IS_UBWC(fmt[i]) &&
  1592. (fmt[i]->tile_height > max_tile_height))
  1593. max_tile_height = fmt[i]->tile_height;
  1594. POPULATE_RECT(&src[i], drm_state[i]->src_x, drm_state[i]->src_y,
  1595. drm_state[i]->src_w, drm_state[i]->src_h, q16_data);
  1596. POPULATE_RECT(&dst[i], drm_state[i]->crtc_x,
  1597. drm_state[i]->crtc_y, drm_state[i]->crtc_w,
  1598. drm_state[i]->crtc_h, !q16_data);
  1599. if (src[i].w != dst[i].w || src[i].h != dst[i].h) {
  1600. SDE_ERROR_PLANE(sde_plane[i],
  1601. "scaling is not supported in multirect mode\n");
  1602. return -EINVAL;
  1603. }
  1604. if (SDE_FORMAT_IS_YUV(fmt[i])) {
  1605. SDE_ERROR_PLANE(sde_plane[i],
  1606. "Unsupported format for multirect mode\n");
  1607. return -EINVAL;
  1608. }
  1609. /**
  1610. * SSPP PD_MEM is split half - one for each RECT.
  1611. * Tiled formats need 5 lines of buffering while fetching
  1612. * whereas linear formats need only 2 lines.
  1613. * So we cannot support more than half of the supported SSPP
  1614. * width for tiled formats.
  1615. */
  1616. width_threshold[i] = sde_plane[i]->pipe_sblk->maxlinewidth;
  1617. if (SDE_FORMAT_IS_UBWC(fmt[i]))
  1618. width_threshold[i] /= 2;
  1619. if (parallel_fetch_qualified && src[i].w > width_threshold[i])
  1620. parallel_fetch_qualified = false;
  1621. if (sde_plane[i]->is_virtual)
  1622. mode = sde_plane_get_property(pstate[i],
  1623. PLANE_PROP_MULTIRECT_MODE);
  1624. if (pstate[i]->const_alpha_en != const_alpha_enable)
  1625. const_alpha_enable = false;
  1626. }
  1627. buffer_lines = 2 * max_tile_height;
  1628. /**
  1629. * fallback to driver mode selection logic if client is using
  1630. * multirect plane without setting property.
  1631. *
  1632. * validate multirect mode configuration based on rectangle
  1633. */
  1634. switch (mode) {
  1635. case SDE_SSPP_MULTIRECT_NONE:
  1636. if (parallel_fetch_qualified)
  1637. mode = SDE_SSPP_MULTIRECT_PARALLEL;
  1638. else if (TIME_MULTIPLEX_RECT(dst[R1], dst[R0], buffer_lines) ||
  1639. TIME_MULTIPLEX_RECT(dst[R0], dst[R1], buffer_lines))
  1640. mode = SDE_SSPP_MULTIRECT_TIME_MX;
  1641. else
  1642. SDE_ERROR(
  1643. "planes(%d - %d) multirect mode selection fail\n",
  1644. drm_state[R0]->plane->base.id,
  1645. drm_state[R1]->plane->base.id);
  1646. break;
  1647. case SDE_SSPP_MULTIRECT_PARALLEL:
  1648. if (!parallel_fetch_qualified) {
  1649. SDE_ERROR("R0 plane:%d width_threshold:%d src_w:%d\n",
  1650. drm_state[R0]->plane->base.id,
  1651. width_threshold[R0], src[R0].w);
  1652. SDE_ERROR("R1 plane:%d width_threshold:%d src_w:%d\n",
  1653. drm_state[R1]->plane->base.id,
  1654. width_threshold[R1], src[R1].w);
  1655. SDE_ERROR("parallel fetch not qualified\n");
  1656. mode = SDE_SSPP_MULTIRECT_NONE;
  1657. }
  1658. break;
  1659. case SDE_SSPP_MULTIRECT_TIME_MX:
  1660. if (!TIME_MULTIPLEX_RECT(dst[R1], dst[R0], buffer_lines) &&
  1661. !TIME_MULTIPLEX_RECT(dst[R0], dst[R1], buffer_lines)) {
  1662. SDE_ERROR(
  1663. "buffer_lines:%d R0 plane:%d dst_y:%d dst_h:%d\n",
  1664. buffer_lines, drm_state[R0]->plane->base.id,
  1665. dst[R0].y, dst[R0].h);
  1666. SDE_ERROR(
  1667. "buffer_lines:%d R1 plane:%d dst_y:%d dst_h:%d\n",
  1668. buffer_lines, drm_state[R1]->plane->base.id,
  1669. dst[R1].y, dst[R1].h);
  1670. SDE_ERROR("time multiplexed fetch not qualified\n");
  1671. mode = SDE_SSPP_MULTIRECT_NONE;
  1672. }
  1673. break;
  1674. default:
  1675. SDE_ERROR("bad mode:%d selection\n", mode);
  1676. mode = SDE_SSPP_MULTIRECT_NONE;
  1677. break;
  1678. }
  1679. for (i = 0; i < R_MAX; i++) {
  1680. pstate[i]->multirect_mode = mode;
  1681. pstate[i]->const_alpha_en = const_alpha_enable;
  1682. }
  1683. if (mode == SDE_SSPP_MULTIRECT_NONE)
  1684. return -EINVAL;
  1685. if (sde_plane[R0]->is_virtual) {
  1686. pstate[R0]->multirect_index = SDE_SSPP_RECT_1;
  1687. pstate[R1]->multirect_index = SDE_SSPP_RECT_0;
  1688. } else {
  1689. pstate[R0]->multirect_index = SDE_SSPP_RECT_0;
  1690. pstate[R1]->multirect_index = SDE_SSPP_RECT_1;
  1691. }
  1692. SDE_DEBUG_PLANE(sde_plane[R0], "R0: %d - %d\n",
  1693. pstate[R0]->multirect_mode, pstate[R0]->multirect_index);
  1694. SDE_DEBUG_PLANE(sde_plane[R1], "R1: %d - %d\n",
  1695. pstate[R1]->multirect_mode, pstate[R1]->multirect_index);
  1696. return 0;
  1697. }
  1698. /**
  1699. * sde_plane_ctl_flush - set/clear control flush bitmask for the given plane
  1700. * @plane: Pointer to drm plane structure
  1701. * @ctl: Pointer to hardware control driver
  1702. * @set: set if true else clear
  1703. */
  1704. void sde_plane_ctl_flush(struct drm_plane *plane, struct sde_hw_ctl *ctl,
  1705. bool set)
  1706. {
  1707. if (!plane || !ctl) {
  1708. SDE_ERROR("invalid parameters\n");
  1709. return;
  1710. }
  1711. if (!ctl->ops.update_bitmask_sspp) {
  1712. SDE_ERROR("invalid ops\n");
  1713. return;
  1714. }
  1715. ctl->ops.update_bitmask_sspp(ctl, sde_plane_pipe(plane), set);
  1716. }
  1717. static int sde_plane_prepare_fb(struct drm_plane *plane,
  1718. struct drm_plane_state *new_state)
  1719. {
  1720. struct drm_framebuffer *fb = new_state->fb;
  1721. struct sde_plane *psde = to_sde_plane(plane);
  1722. struct sde_plane_state *pstate = to_sde_plane_state(new_state);
  1723. struct sde_hw_fmt_layout layout;
  1724. struct msm_gem_address_space *aspace;
  1725. int ret;
  1726. if (!fb)
  1727. return 0;
  1728. SDE_DEBUG_PLANE(psde, "FB[%u]\n", fb->base.id);
  1729. ret = _sde_plane_get_aspace(psde, pstate, &aspace);
  1730. if (ret) {
  1731. SDE_ERROR_PLANE(psde, "Failed to get aspace\n");
  1732. return ret;
  1733. }
  1734. /* cache aspace */
  1735. pstate->aspace = aspace;
  1736. /*
  1737. * when transitioning from secure to non-secure,
  1738. * plane->prepare_fb happens before the commit. In such case,
  1739. * defer the prepare_fb and handled it late, during the commit
  1740. * after attaching the domains as part of the transition
  1741. */
  1742. pstate->defer_prepare_fb = (aspace && !aspace->domain_attached) ?
  1743. true : false;
  1744. if (pstate->defer_prepare_fb) {
  1745. SDE_EVT32(DRMID(plane), psde->pipe);
  1746. SDE_DEBUG_PLANE(psde,
  1747. "domain not attached, prepare_fb handled later\n");
  1748. return 0;
  1749. }
  1750. if (pstate->aspace && fb) {
  1751. ret = msm_framebuffer_prepare(fb,
  1752. pstate->aspace);
  1753. if (ret) {
  1754. SDE_ERROR("failed to prepare framebuffer\n");
  1755. return ret;
  1756. }
  1757. }
  1758. /* validate framebuffer layout before commit */
  1759. ret = sde_format_populate_layout(pstate->aspace,
  1760. fb, &layout);
  1761. if (ret) {
  1762. SDE_ERROR_PLANE(psde, "failed to get format layout, %d\n", ret);
  1763. return ret;
  1764. }
  1765. return 0;
  1766. }
  1767. /**
  1768. * _sde_plane_fetch_halt - halts vbif transactions for a plane
  1769. * @plane: Pointer to plane
  1770. * Returns: 0 on success
  1771. */
  1772. static int _sde_plane_fetch_halt(struct drm_plane *plane)
  1773. {
  1774. struct sde_plane *psde;
  1775. int xin_id;
  1776. enum sde_clk_ctrl_type clk_ctrl;
  1777. struct msm_drm_private *priv;
  1778. struct sde_kms *sde_kms;
  1779. psde = to_sde_plane(plane);
  1780. if (!plane || !plane->dev || !psde->pipe_hw) {
  1781. SDE_ERROR("invalid arguments\n");
  1782. return -EINVAL;
  1783. }
  1784. priv = plane->dev->dev_private;
  1785. if (!priv || !priv->kms) {
  1786. SDE_ERROR("invalid KMS reference\n");
  1787. return -EINVAL;
  1788. }
  1789. sde_kms = to_sde_kms(priv->kms);
  1790. clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  1791. xin_id = psde->pipe_hw->cap->xin_id;
  1792. SDE_DEBUG_PLANE(psde, "pipe:%d xin_id:%d clk_ctrl:%d\n",
  1793. psde->pipe - SSPP_VIG0, xin_id, clk_ctrl);
  1794. SDE_EVT32_VERBOSE(psde, psde->pipe - SSPP_VIG0, xin_id, clk_ctrl);
  1795. return sde_vbif_halt_plane_xin(sde_kms, xin_id, clk_ctrl);
  1796. }
  1797. static void sde_plane_cleanup_fb(struct drm_plane *plane,
  1798. struct drm_plane_state *old_state)
  1799. {
  1800. struct sde_plane *psde = to_sde_plane(plane);
  1801. struct sde_plane_state *old_pstate;
  1802. int ret;
  1803. if (!old_state || !old_state->fb || !plane || !plane->state)
  1804. return;
  1805. old_pstate = to_sde_plane_state(old_state);
  1806. SDE_DEBUG_PLANE(psde, "FB[%u]\n", old_state->fb->base.id);
  1807. /*
  1808. * plane->state gets populated for next frame after swap_state. If
  1809. * plane->state->crtc pointer is not populated then it is not used in
  1810. * the next frame, hence making it an unused plane.
  1811. */
  1812. if ((plane->state->crtc == NULL) && !psde->is_virtual) {
  1813. SDE_DEBUG_PLANE(psde, "unused pipe:%u\n",
  1814. psde->pipe - SSPP_VIG0);
  1815. /* halt this plane now */
  1816. ret = pm_runtime_get_sync(plane->dev->dev);
  1817. if (ret < 0) {
  1818. SDE_ERROR("power resource enable failed with %d", ret);
  1819. SDE_EVT32(ret, SDE_EVTLOG_ERROR);
  1820. return;
  1821. }
  1822. ret = _sde_plane_fetch_halt(plane);
  1823. if (ret) {
  1824. SDE_ERROR_PLANE(psde,
  1825. "unused pipe %u halt failed\n",
  1826. psde->pipe - SSPP_VIG0);
  1827. SDE_EVT32(DRMID(plane), psde->pipe - SSPP_VIG0,
  1828. ret, SDE_EVTLOG_ERROR);
  1829. }
  1830. pm_runtime_put_sync(plane->dev->dev);
  1831. }
  1832. msm_framebuffer_cleanup(old_state->fb, old_pstate->aspace);
  1833. }
  1834. static void _sde_plane_sspp_atomic_check_mode_changed(struct sde_plane *psde,
  1835. struct drm_plane_state *state,
  1836. struct drm_plane_state *old_state)
  1837. {
  1838. struct sde_plane_state *pstate = to_sde_plane_state(state);
  1839. struct sde_plane_state *old_pstate = to_sde_plane_state(old_state);
  1840. struct drm_framebuffer *fb, *old_fb;
  1841. /* no need to check it again */
  1842. if (pstate->dirty == SDE_PLANE_DIRTY_ALL)
  1843. return;
  1844. if (!sde_plane_enabled(state) || !sde_plane_enabled(old_state)
  1845. || psde->is_error) {
  1846. SDE_DEBUG_PLANE(psde,
  1847. "enabling/disabling full modeset required\n");
  1848. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1849. } else if (to_sde_plane_state(old_state)->pending) {
  1850. SDE_DEBUG_PLANE(psde, "still pending\n");
  1851. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1852. } else if (pstate->multirect_index != old_pstate->multirect_index ||
  1853. pstate->multirect_mode != old_pstate->multirect_mode) {
  1854. SDE_DEBUG_PLANE(psde, "multirect config updated\n");
  1855. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1856. } else if (state->src_w != old_state->src_w ||
  1857. state->src_h != old_state->src_h ||
  1858. state->src_x != old_state->src_x ||
  1859. state->src_y != old_state->src_y) {
  1860. SDE_DEBUG_PLANE(psde, "src rect updated\n");
  1861. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1862. } else if (state->crtc_w != old_state->crtc_w ||
  1863. state->crtc_h != old_state->crtc_h ||
  1864. state->crtc_x != old_state->crtc_x ||
  1865. state->crtc_y != old_state->crtc_y) {
  1866. SDE_DEBUG_PLANE(psde, "crtc rect updated\n");
  1867. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1868. } else if (pstate->excl_rect.w != old_pstate->excl_rect.w ||
  1869. pstate->excl_rect.h != old_pstate->excl_rect.h ||
  1870. pstate->excl_rect.x != old_pstate->excl_rect.x ||
  1871. pstate->excl_rect.y != old_pstate->excl_rect.y) {
  1872. SDE_DEBUG_PLANE(psde, "excl_rect updated\n");
  1873. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1874. } else if (pstate->rotation != old_pstate->rotation) {
  1875. SDE_DEBUG_PLANE(psde, "rotation updated 0x%x->0x%x\n",
  1876. pstate->rotation, old_pstate->rotation);
  1877. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT;
  1878. }
  1879. fb = state->fb;
  1880. old_fb = old_state->fb;
  1881. if (!fb || !old_fb) {
  1882. SDE_DEBUG_PLANE(psde, "can't compare fb handles\n");
  1883. } else if ((fb->format->format != old_fb->format->format) ||
  1884. pstate->const_alpha_en != old_pstate->const_alpha_en) {
  1885. SDE_DEBUG_PLANE(psde, "format change\n");
  1886. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT | SDE_PLANE_DIRTY_RECTS;
  1887. } else {
  1888. uint64_t new_mod = fb->modifier;
  1889. uint64_t old_mod = old_fb->modifier;
  1890. uint32_t *new_pitches = fb->pitches;
  1891. uint32_t *old_pitches = old_fb->pitches;
  1892. uint32_t *new_offset = fb->offsets;
  1893. uint32_t *old_offset = old_fb->offsets;
  1894. int i;
  1895. if (new_mod != old_mod) {
  1896. SDE_DEBUG_PLANE(psde,
  1897. "format modifiers change new_mode:%llu old_mode:%llu\n",
  1898. new_mod, old_mod);
  1899. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT |
  1900. SDE_PLANE_DIRTY_RECTS;
  1901. }
  1902. for (i = 0; i < ARRAY_SIZE(fb->pitches); i++) {
  1903. if (new_pitches[i] != old_pitches[i]) {
  1904. SDE_DEBUG_PLANE(psde,
  1905. "pitches change plane:%d old_pitches:%u new_pitches:%u\n",
  1906. i, old_pitches[i], new_pitches[i]);
  1907. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1908. break;
  1909. }
  1910. }
  1911. for (i = 0; i < ARRAY_SIZE(fb->offsets); i++) {
  1912. if (new_offset[i] != old_offset[i]) {
  1913. SDE_DEBUG_PLANE(psde,
  1914. "offset change plane:%d old_offset:%u new_offset:%u\n",
  1915. i, old_offset[i], new_offset[i]);
  1916. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT |
  1917. SDE_PLANE_DIRTY_RECTS;
  1918. break;
  1919. }
  1920. }
  1921. }
  1922. }
  1923. int sde_plane_validate_src_addr(struct drm_plane *plane,
  1924. unsigned long base_addr, u32 size)
  1925. {
  1926. int ret = -EINVAL;
  1927. u32 addr;
  1928. struct sde_plane *psde = to_sde_plane(plane);
  1929. if (!psde || !base_addr || !size) {
  1930. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  1931. return ret;
  1932. }
  1933. if (psde->pipe_hw && psde->pipe_hw->ops.get_sourceaddress) {
  1934. addr = psde->pipe_hw->ops.get_sourceaddress(psde->pipe_hw,
  1935. is_sde_plane_virtual(plane));
  1936. if ((addr >= base_addr) && (addr < (base_addr + size)))
  1937. ret = 0;
  1938. }
  1939. return ret;
  1940. }
  1941. static int _sde_plane_validate_scaler_v2(struct sde_plane *psde,
  1942. struct sde_plane_state *pstate,
  1943. const struct sde_format *fmt,
  1944. uint32_t img_w, uint32_t img_h,
  1945. uint32_t src_w, uint32_t src_h,
  1946. uint32_t deci_w, uint32_t deci_h)
  1947. {
  1948. int i;
  1949. if (!psde || !pstate || !fmt) {
  1950. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  1951. return -EINVAL;
  1952. }
  1953. if (psde->debugfs_default_scale ||
  1954. (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2 &&
  1955. pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2_CHECK))
  1956. return 0;
  1957. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_INVALID;
  1958. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1959. uint32_t hor_req_pixels, hor_fetch_pixels;
  1960. uint32_t vert_req_pixels, vert_fetch_pixels;
  1961. uint32_t src_w_tmp, src_h_tmp;
  1962. uint32_t scaler_w, scaler_h;
  1963. bool rot;
  1964. /* re-use color plane 1's config for plane 2 */
  1965. if (i == 2)
  1966. continue;
  1967. src_w_tmp = src_w;
  1968. src_h_tmp = src_h;
  1969. /*
  1970. * For chroma plane, width is half for the following sub sampled
  1971. * formats. Except in case of decimation, where hardware avoids
  1972. * 1 line of decimation instead of downsampling.
  1973. */
  1974. if (i == 1) {
  1975. if (!deci_w &&
  1976. (fmt->chroma_sample == SDE_CHROMA_420 ||
  1977. fmt->chroma_sample == SDE_CHROMA_H2V1))
  1978. src_w_tmp >>= 1;
  1979. if (!deci_h &&
  1980. (fmt->chroma_sample == SDE_CHROMA_420 ||
  1981. fmt->chroma_sample == SDE_CHROMA_H1V2))
  1982. src_h_tmp >>= 1;
  1983. }
  1984. hor_req_pixels = pstate->pixel_ext.roi_w[i];
  1985. vert_req_pixels = pstate->pixel_ext.roi_h[i];
  1986. hor_fetch_pixels = DECIMATED_DIMENSION(src_w_tmp +
  1987. (int8_t)(pstate->pixel_ext.left_ftch[i] & 0xFF) +
  1988. (int8_t)(pstate->pixel_ext.right_ftch[i] & 0xFF),
  1989. deci_w);
  1990. vert_fetch_pixels = DECIMATED_DIMENSION(src_h_tmp +
  1991. (int8_t)(pstate->pixel_ext.top_ftch[i] & 0xFF) +
  1992. (int8_t)(pstate->pixel_ext.btm_ftch[i] & 0xFF),
  1993. deci_h);
  1994. if ((hor_req_pixels != hor_fetch_pixels) ||
  1995. (hor_fetch_pixels > img_w) ||
  1996. (vert_req_pixels != vert_fetch_pixels) ||
  1997. (vert_fetch_pixels > img_h)) {
  1998. SDE_ERROR_PLANE(psde,
  1999. "req %d/%d, fetch %d/%d, src %dx%d\n",
  2000. hor_req_pixels, vert_req_pixels,
  2001. hor_fetch_pixels, vert_fetch_pixels,
  2002. img_w, img_h);
  2003. return -EINVAL;
  2004. }
  2005. /*
  2006. * swap the scaler src width & height for inline-rotation 90
  2007. * comparison with Pixel-Extension, as PE is based on
  2008. * pre-rotation and QSEED is based on post-rotation
  2009. */
  2010. rot = pstate->rotation & DRM_MODE_ROTATE_90;
  2011. scaler_w = rot ? pstate->scaler3_cfg.src_height[i]
  2012. : pstate->scaler3_cfg.src_width[i];
  2013. scaler_h = rot ? pstate->scaler3_cfg.src_width[i]
  2014. : pstate->scaler3_cfg.src_height[i];
  2015. /*
  2016. * Alpha plane can only be scaled using bilinear or pixel
  2017. * repeat/drop, src_width and src_height are only specified
  2018. * for Y and UV plane
  2019. */
  2020. if (i != 3 && (hor_req_pixels != scaler_w ||
  2021. vert_req_pixels != scaler_h)) {
  2022. SDE_ERROR_PLANE(psde,
  2023. "roi[%d] roi:%dx%d scaler:%dx%d src:%dx%d rot:%d\n",
  2024. i, pstate->pixel_ext.roi_w[i],
  2025. pstate->pixel_ext.roi_h[i],
  2026. scaler_w, scaler_h, src_w, src_h, rot);
  2027. return -EINVAL;
  2028. }
  2029. /*
  2030. * SSPP fetch , unpack output and QSEED3 input lines need
  2031. * to match for Y plane
  2032. */
  2033. if (i == 0 &&
  2034. (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) &
  2035. BIT(SDE_DRM_DEINTERLACE)) &&
  2036. ((pstate->scaler3_cfg.src_height[i] != (src_h/2)) ||
  2037. (pstate->pixel_ext.roi_h[i] != (src_h/2)))) {
  2038. SDE_ERROR_PLANE(psde,
  2039. "de-interlace fail roi[%d] %d/%d, src %dx%d, src %dx%d\n",
  2040. i, pstate->pixel_ext.roi_w[i],
  2041. pstate->pixel_ext.roi_h[i],
  2042. pstate->scaler3_cfg.src_width[i],
  2043. pstate->scaler3_cfg.src_height[i],
  2044. src_w, src_h);
  2045. return -EINVAL;
  2046. }
  2047. }
  2048. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V2;
  2049. return 0;
  2050. }
  2051. static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state,
  2052. struct sde_plane *psde, const struct sde_format *fmt,
  2053. struct sde_plane_state *pstate, struct sde_rect *src,
  2054. struct sde_rect *dst, u32 width, u32 height)
  2055. {
  2056. int ret = 0;
  2057. uint32_t deci_w, deci_h, src_deci_w, src_deci_h;
  2058. uint32_t scaler_src_w, scaler_src_h;
  2059. uint32_t max_downscale_num, max_downscale_denom;
  2060. uint32_t max_upscale, max_linewidth;
  2061. bool inline_rotation, rt_client;
  2062. struct drm_crtc *crtc;
  2063. deci_w = sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE);
  2064. deci_h = sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE);
  2065. src_deci_w = DECIMATED_DIMENSION(src->w, deci_w);
  2066. src_deci_h = DECIMATED_DIMENSION(src->h, deci_h);
  2067. /* with inline rotator, the source of the scaler is post-rotated */
  2068. inline_rotation = pstate->rotation & DRM_MODE_ROTATE_90 ? true : false;
  2069. if (inline_rotation) {
  2070. scaler_src_w = src_deci_h;
  2071. scaler_src_h = src_deci_w;
  2072. } else {
  2073. scaler_src_w = src_deci_w;
  2074. scaler_src_h = src_deci_h;
  2075. }
  2076. max_upscale = psde->pipe_sblk->maxupscale;
  2077. max_linewidth = psde->pipe_sblk->maxlinewidth;
  2078. crtc = state->crtc;
  2079. rt_client = sde_crtc_is_rt_client(crtc);
  2080. max_downscale_denom = 1;
  2081. /* inline rotation RT clients have a different max downscaling limit */
  2082. if (inline_rotation) {
  2083. if (rt_client) {
  2084. max_downscale_num =
  2085. psde->pipe_sblk->in_rot_maxdwnscale_rt_num;
  2086. max_downscale_denom =
  2087. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom;
  2088. } else {
  2089. max_downscale_num =
  2090. psde->pipe_sblk->in_rot_maxdwnscale_nrt;
  2091. }
  2092. } else {
  2093. max_downscale_num = psde->pipe_sblk->maxdwnscale;
  2094. }
  2095. /* decimation validation */
  2096. if ((deci_w || deci_h)
  2097. && ((deci_w > psde->pipe_sblk->maxhdeciexp)
  2098. || (deci_h > psde->pipe_sblk->maxvdeciexp))) {
  2099. SDE_ERROR_PLANE(psde, "too much decimation requested\n");
  2100. ret = -EINVAL;
  2101. } else if ((deci_w || deci_h)
  2102. && (fmt->fetch_mode != SDE_FETCH_LINEAR)) {
  2103. SDE_ERROR_PLANE(psde, "decimation requires linear fetch\n");
  2104. ret = -EINVAL;
  2105. } else if (!(psde->features & SDE_SSPP_SCALER) &&
  2106. ((src->w != dst->w) || (src->h != dst->h))) {
  2107. SDE_ERROR_PLANE(psde,
  2108. "pipe doesn't support scaling %ux%u->%ux%u\n",
  2109. src->w, src->h, dst->w, dst->h);
  2110. ret = -EINVAL;
  2111. /* check decimated source width */
  2112. } else if (src_deci_w > max_linewidth) {
  2113. SDE_ERROR_PLANE(psde,
  2114. "invalid src w:%u, deci w:%u, line w:%u\n",
  2115. src->w, src_deci_w, max_linewidth);
  2116. ret = -E2BIG;
  2117. }
  2118. /* check max scaler capability */
  2119. else if (((scaler_src_w * max_upscale) < dst->w) ||
  2120. ((scaler_src_h * max_upscale) < dst->h) ||
  2121. (((dst->w * max_downscale_num) / max_downscale_denom)
  2122. < scaler_src_w) ||
  2123. (((dst->h * max_downscale_num) / max_downscale_denom)
  2124. < scaler_src_h)) {
  2125. SDE_ERROR_PLANE(psde,
  2126. "too much scaling requested %ux%u->%ux%u rot:%d\n",
  2127. scaler_src_w, scaler_src_h, dst->w, dst->h,
  2128. inline_rotation);
  2129. ret = -E2BIG;
  2130. } else if (_sde_plane_validate_scaler_v2(psde, pstate, fmt,
  2131. width, height,
  2132. src->w, src->h, deci_w, deci_h)) {
  2133. ret = -EINVAL;
  2134. }
  2135. return ret;
  2136. }
  2137. static int _sde_atomic_check_excl_rect(struct sde_plane *psde,
  2138. struct sde_plane_state *pstate, struct sde_rect *src,
  2139. const struct sde_format *fmt, int ret)
  2140. {
  2141. /* check excl rect configs */
  2142. if (!ret && pstate->excl_rect.w && pstate->excl_rect.h) {
  2143. struct sde_rect intersect;
  2144. /*
  2145. * Check exclusion rect against src rect.
  2146. * it must intersect with source rect.
  2147. */
  2148. sde_kms_rect_intersect(src, &pstate->excl_rect, &intersect);
  2149. if (intersect.w != pstate->excl_rect.w ||
  2150. intersect.h != pstate->excl_rect.h ||
  2151. SDE_FORMAT_IS_YUV(fmt)) {
  2152. SDE_ERROR_PLANE(psde,
  2153. "invalid excl_rect:{%d,%d,%d,%d} src:{%d,%d,%d,%d}, fmt: %4.4s\n",
  2154. pstate->excl_rect.x, pstate->excl_rect.y,
  2155. pstate->excl_rect.w, pstate->excl_rect.h,
  2156. src->x, src->y, src->w, src->h,
  2157. (char *)&fmt->base.pixel_format);
  2158. ret = -EINVAL;
  2159. }
  2160. SDE_DEBUG_PLANE(psde, "excl_rect: {%d,%d,%d,%d}\n",
  2161. pstate->excl_rect.x, pstate->excl_rect.y,
  2162. pstate->excl_rect.w, pstate->excl_rect.h);
  2163. }
  2164. return ret;
  2165. }
  2166. static int sde_plane_sspp_atomic_check(struct drm_plane *plane,
  2167. struct drm_plane_state *state)
  2168. {
  2169. int ret = 0;
  2170. struct sde_plane *psde;
  2171. struct sde_plane_state *pstate;
  2172. const struct msm_format *msm_fmt;
  2173. const struct sde_format *fmt;
  2174. struct sde_rect src, dst;
  2175. uint32_t min_src_size;
  2176. bool q16_data = true;
  2177. struct drm_framebuffer *fb;
  2178. u32 width;
  2179. u32 height;
  2180. psde = to_sde_plane(plane);
  2181. pstate = to_sde_plane_state(state);
  2182. if (!psde->pipe_sblk) {
  2183. SDE_ERROR_PLANE(psde, "invalid catalog\n");
  2184. return -EINVAL;
  2185. }
  2186. /* src values are in Q16 fixed point, convert to integer */
  2187. POPULATE_RECT(&src, state->src_x, state->src_y,
  2188. state->src_w, state->src_h, q16_data);
  2189. POPULATE_RECT(&dst, state->crtc_x, state->crtc_y, state->crtc_w,
  2190. state->crtc_h, !q16_data);
  2191. SDE_DEBUG_PLANE(psde, "check %d -> %d\n",
  2192. sde_plane_enabled(plane->state), sde_plane_enabled(state));
  2193. if (!sde_plane_enabled(state))
  2194. goto modeset_update;
  2195. fb = state->fb;
  2196. width = fb ? state->fb->width : 0x0;
  2197. height = fb ? state->fb->height : 0x0;
  2198. SDE_DEBUG("plane%d sspp:%x/%dx%d/%4.4s/%llx\n",
  2199. plane->base.id,
  2200. pstate->rotation,
  2201. width, height,
  2202. fb ? (char *) &state->fb->format->format : 0x0,
  2203. fb ? state->fb->modifier : 0x0);
  2204. SDE_DEBUG("src:%dx%d %d,%d crtc:%dx%d+%d+%d\n",
  2205. state->src_w >> 16, state->src_h >> 16,
  2206. state->src_x >> 16, state->src_y >> 16,
  2207. state->crtc_w, state->crtc_h,
  2208. state->crtc_x, state->crtc_y);
  2209. msm_fmt = msm_framebuffer_format(fb);
  2210. fmt = to_sde_format(msm_fmt);
  2211. min_src_size = SDE_FORMAT_IS_YUV(fmt) ? 2 : 1;
  2212. if (SDE_FORMAT_IS_YUV(fmt) &&
  2213. (!(psde->features & SDE_SSPP_SCALER) ||
  2214. !(psde->features & (BIT(SDE_SSPP_CSC)
  2215. | BIT(SDE_SSPP_CSC_10BIT))))) {
  2216. SDE_ERROR_PLANE(psde,
  2217. "plane doesn't have scaler/csc for yuv\n");
  2218. ret = -EINVAL;
  2219. /* check src bounds */
  2220. } else if (width > MAX_IMG_WIDTH ||
  2221. height > MAX_IMG_HEIGHT ||
  2222. src.w < min_src_size || src.h < min_src_size ||
  2223. CHECK_LAYER_BOUNDS(src.x, src.w, width) ||
  2224. CHECK_LAYER_BOUNDS(src.y, src.h, height)) {
  2225. SDE_ERROR_PLANE(psde, "invalid source %u, %u, %ux%u\n",
  2226. src.x, src.y, src.w, src.h);
  2227. ret = -E2BIG;
  2228. /* valid yuv image */
  2229. } else if (SDE_FORMAT_IS_YUV(fmt) && ((src.x & 0x1) || (src.y & 0x1) ||
  2230. (src.w & 0x1) || (src.h & 0x1))) {
  2231. SDE_ERROR_PLANE(psde, "invalid yuv source %u, %u, %ux%u\n",
  2232. src.x, src.y, src.w, src.h);
  2233. ret = -EINVAL;
  2234. /* min dst support */
  2235. } else if (dst.w < 0x1 || dst.h < 0x1) {
  2236. SDE_ERROR_PLANE(psde, "invalid dest rect %u, %u, %ux%u\n",
  2237. dst.x, dst.y, dst.w, dst.h);
  2238. ret = -EINVAL;
  2239. }
  2240. if (ret)
  2241. return ret;
  2242. ret = _sde_atomic_check_decimation_scaler(state, psde, fmt, pstate,
  2243. &src, &dst, width, height);
  2244. if (ret)
  2245. return ret;
  2246. ret = _sde_atomic_check_excl_rect(psde, pstate,
  2247. &src, fmt, ret);
  2248. if (ret)
  2249. return ret;
  2250. pstate->const_alpha_en = fmt->alpha_enable &&
  2251. (SDE_DRM_BLEND_OP_OPAQUE !=
  2252. sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP)) &&
  2253. (pstate->stage != SDE_STAGE_0);
  2254. modeset_update:
  2255. if (!ret)
  2256. _sde_plane_sspp_atomic_check_mode_changed(psde,
  2257. state, plane->state);
  2258. return ret;
  2259. }
  2260. static int sde_plane_atomic_check(struct drm_plane *plane,
  2261. struct drm_plane_state *state)
  2262. {
  2263. int ret = 0;
  2264. struct sde_plane *psde;
  2265. struct sde_plane_state *pstate;
  2266. if (!plane || !state) {
  2267. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  2268. !plane, !state);
  2269. ret = -EINVAL;
  2270. goto exit;
  2271. }
  2272. psde = to_sde_plane(plane);
  2273. pstate = to_sde_plane_state(state);
  2274. SDE_DEBUG_PLANE(psde, "\n");
  2275. ret = sde_plane_rot_atomic_check(plane, state);
  2276. if (ret)
  2277. goto exit;
  2278. ret = sde_plane_sspp_atomic_check(plane, state);
  2279. exit:
  2280. return ret;
  2281. }
  2282. void sde_plane_flush(struct drm_plane *plane)
  2283. {
  2284. struct sde_plane *psde;
  2285. struct sde_plane_state *pstate;
  2286. if (!plane || !plane->state) {
  2287. SDE_ERROR("invalid plane\n");
  2288. return;
  2289. }
  2290. psde = to_sde_plane(plane);
  2291. pstate = to_sde_plane_state(plane->state);
  2292. /*
  2293. * These updates have to be done immediately before the plane flush
  2294. * timing, and may not be moved to the atomic_update/mode_set functions.
  2295. */
  2296. if (psde->is_error)
  2297. /* force white frame with 100% alpha pipe output on error */
  2298. _sde_plane_color_fill(psde, 0xFFFFFF, 0xFF);
  2299. else if (psde->color_fill & SDE_PLANE_COLOR_FILL_FLAG)
  2300. /* force 100% alpha */
  2301. _sde_plane_color_fill(psde, psde->color_fill, 0xFF);
  2302. else if (psde->pipe_hw && psde->csc_ptr && psde->pipe_hw->ops.setup_csc)
  2303. psde->pipe_hw->ops.setup_csc(psde->pipe_hw, psde->csc_ptr);
  2304. /* flag h/w flush complete */
  2305. if (plane->state)
  2306. pstate->pending = false;
  2307. }
  2308. /**
  2309. * sde_plane_set_error: enable/disable error condition
  2310. * @plane: pointer to drm_plane structure
  2311. */
  2312. void sde_plane_set_error(struct drm_plane *plane, bool error)
  2313. {
  2314. struct sde_plane *psde;
  2315. if (!plane)
  2316. return;
  2317. psde = to_sde_plane(plane);
  2318. psde->is_error = error;
  2319. }
  2320. static void _sde_plane_sspp_setup_sys_cache(struct sde_plane *psde,
  2321. struct sde_plane_state *pstate, const struct sde_format *fmt)
  2322. {
  2323. if (!psde->pipe_hw->ops.setup_sys_cache ||
  2324. !(psde->perf_features & BIT(SDE_PERF_SSPP_SYS_CACHE)))
  2325. return;
  2326. SDE_DEBUG("features:0x%x rotation:0x%x\n",
  2327. psde->features, pstate->rotation);
  2328. if ((pstate->rotation & DRM_MODE_ROTATE_90) &&
  2329. sde_format_is_tp10_ubwc(fmt)) {
  2330. pstate->sc_cfg.rd_en = true;
  2331. pstate->sc_cfg.rd_scid =
  2332. psde->pipe_sblk->llcc_scid;
  2333. pstate->sc_cfg.flags = SSPP_SYS_CACHE_EN_FLAG |
  2334. SSPP_SYS_CACHE_SCID;
  2335. } else {
  2336. pstate->sc_cfg.rd_en = false;
  2337. pstate->sc_cfg.rd_scid = 0x0;
  2338. pstate->sc_cfg.flags = SSPP_SYS_CACHE_EN_FLAG |
  2339. SSPP_SYS_CACHE_SCID;
  2340. }
  2341. psde->pipe_hw->ops.setup_sys_cache(
  2342. psde->pipe_hw, &pstate->sc_cfg);
  2343. }
  2344. static void _sde_plane_map_prop_to_dirty_bits(void)
  2345. {
  2346. plane_prop_array[PLANE_PROP_SCALER_V1] =
  2347. plane_prop_array[PLANE_PROP_SCALER_V2] =
  2348. plane_prop_array[PLANE_PROP_SCALER_LUT_ED] =
  2349. plane_prop_array[PLANE_PROP_SCALER_LUT_CIR] =
  2350. plane_prop_array[PLANE_PROP_SCALER_LUT_SEP] =
  2351. plane_prop_array[PLANE_PROP_H_DECIMATE] =
  2352. plane_prop_array[PLANE_PROP_V_DECIMATE] =
  2353. plane_prop_array[PLANE_PROP_SRC_CONFIG] =
  2354. plane_prop_array[PLANE_PROP_ZPOS] =
  2355. plane_prop_array[PLANE_PROP_EXCL_RECT_V1] =
  2356. SDE_PLANE_DIRTY_RECTS;
  2357. plane_prop_array[PLANE_PROP_CSC_V1] =
  2358. plane_prop_array[PLANE_PROP_CSC_DMA_V1] =
  2359. plane_prop_array[PLANE_PROP_INVERSE_PMA] =
  2360. SDE_PLANE_DIRTY_FORMAT;
  2361. plane_prop_array[PLANE_PROP_MULTIRECT_MODE] =
  2362. plane_prop_array[PLANE_PROP_COLOR_FILL] =
  2363. SDE_PLANE_DIRTY_ALL;
  2364. /* no special action required */
  2365. plane_prop_array[PLANE_PROP_INFO] =
  2366. plane_prop_array[PLANE_PROP_ALPHA] =
  2367. plane_prop_array[PLANE_PROP_INPUT_FENCE] =
  2368. plane_prop_array[PLANE_PROP_BLEND_OP] = 0;
  2369. plane_prop_array[PLANE_PROP_FB_TRANSLATION_MODE] =
  2370. SDE_PLANE_DIRTY_FB_TRANSLATION_MODE;
  2371. plane_prop_array[PLANE_PROP_PREFILL_SIZE] =
  2372. plane_prop_array[PLANE_PROP_PREFILL_TIME] =
  2373. SDE_PLANE_DIRTY_PERF;
  2374. plane_prop_array[PLANE_PROP_VIG_GAMUT] = SDE_PLANE_DIRTY_VIG_GAMUT;
  2375. plane_prop_array[PLANE_PROP_VIG_IGC] = SDE_PLANE_DIRTY_VIG_IGC;
  2376. plane_prop_array[PLANE_PROP_DMA_IGC] = SDE_PLANE_DIRTY_DMA_IGC;
  2377. plane_prop_array[PLANE_PROP_DMA_GC] = SDE_PLANE_DIRTY_DMA_GC;
  2378. plane_prop_array[PLANE_PROP_SKIN_COLOR] =
  2379. plane_prop_array[PLANE_PROP_SKY_COLOR] =
  2380. plane_prop_array[PLANE_PROP_FOLIAGE_COLOR] =
  2381. plane_prop_array[PLANE_PROP_HUE_ADJUST] =
  2382. plane_prop_array[PLANE_PROP_SATURATION_ADJUST] =
  2383. plane_prop_array[PLANE_PROP_VALUE_ADJUST] =
  2384. plane_prop_array[PLANE_PROP_CONTRAST_ADJUST] =
  2385. SDE_PLANE_DIRTY_ALL;
  2386. }
  2387. static inline bool _sde_plane_allow_uidle(struct sde_plane *psde,
  2388. struct sde_rect *src, struct sde_rect *dst)
  2389. {
  2390. u32 max_downscale = psde->catalog->uidle_cfg.max_dwnscale;
  2391. u32 downscale = (src->h * 1000)/dst->h;
  2392. return (downscale > max_downscale) ? false : true;
  2393. }
  2394. static void _sde_plane_setup_uidle(struct drm_crtc *crtc,
  2395. struct sde_plane *psde, struct sde_plane_state *pstate,
  2396. struct sde_rect *src, struct sde_rect *dst)
  2397. {
  2398. struct sde_hw_pipe_uidle_cfg cfg;
  2399. u32 line_time = sde_get_linetime(&crtc->mode); /* nS */
  2400. u32 fal1_target_idle_time_ns =
  2401. psde->catalog->uidle_cfg.fal1_target_idle_time * 1000; /* nS */
  2402. u32 fal10_target_idle_time_ns =
  2403. psde->catalog->uidle_cfg.fal10_target_idle_time * 1000; /* nS */
  2404. u32 fal10_threshold =
  2405. psde->catalog->uidle_cfg.fal10_threshold; /* uS */
  2406. if (line_time && fal10_threshold && fal10_target_idle_time_ns &&
  2407. fal1_target_idle_time_ns) {
  2408. cfg.enable = _sde_plane_allow_uidle(psde, src, dst);
  2409. cfg.fal10_threshold = fal10_threshold;
  2410. cfg.fal10_exit_threshold = fal10_threshold + 2;
  2411. cfg.fal1_threshold = 1 +
  2412. (fal1_target_idle_time_ns*1000/line_time*2)/1000;
  2413. cfg.fal_allowed_threshold = fal10_threshold +
  2414. (fal10_target_idle_time_ns*1000/line_time*2)/1000;
  2415. } else {
  2416. SDE_ERROR("invalid settings, will disable UIDLE %d %d %d %d\n",
  2417. line_time, fal10_threshold, fal10_target_idle_time_ns,
  2418. fal1_target_idle_time_ns);
  2419. memset(&cfg, 0, sizeof(struct sde_hw_pipe_uidle_cfg));
  2420. }
  2421. SDE_DEBUG_PLANE(psde,
  2422. "tholds: fal10=%d fal10_exit=%d fal1=%d fal_allowed=%d\n",
  2423. cfg.fal10_threshold, cfg.fal10_exit_threshold,
  2424. cfg.fal1_threshold, cfg.fal_allowed_threshold);
  2425. SDE_DEBUG_PLANE(psde,
  2426. "times: line:%d fal1_idle:%d fal10_idle:%d dwnscale:%d\n",
  2427. line_time, fal1_target_idle_time_ns,
  2428. fal10_target_idle_time_ns,
  2429. psde->catalog->uidle_cfg.max_dwnscale);
  2430. SDE_EVT32_VERBOSE(cfg.enable,
  2431. cfg.fal10_threshold, cfg.fal10_exit_threshold,
  2432. cfg.fal1_threshold, cfg.fal_allowed_threshold,
  2433. psde->catalog->uidle_cfg.max_dwnscale);
  2434. psde->pipe_hw->ops.setup_uidle(
  2435. psde->pipe_hw, &cfg,
  2436. pstate->multirect_index);
  2437. }
  2438. static void _sde_plane_update_secure_session(struct sde_plane *psde,
  2439. struct sde_plane_state *pstate)
  2440. {
  2441. bool enable = false;
  2442. int mode = sde_plane_get_property(pstate,
  2443. PLANE_PROP_FB_TRANSLATION_MODE);
  2444. if ((mode == SDE_DRM_FB_SEC) ||
  2445. (mode == SDE_DRM_FB_SEC_DIR_TRANS))
  2446. enable = true;
  2447. /* update secure session flag */
  2448. psde->pipe_hw->ops.setup_secure_address(psde->pipe_hw,
  2449. pstate->multirect_index,
  2450. enable);
  2451. }
  2452. static void _sde_plane_update_roi_config(struct drm_plane *plane,
  2453. struct drm_crtc *crtc, struct drm_framebuffer *fb)
  2454. {
  2455. const struct sde_format *fmt;
  2456. const struct msm_format *msm_fmt;
  2457. struct sde_plane *psde;
  2458. struct drm_plane_state *state;
  2459. struct sde_plane_state *pstate;
  2460. struct sde_rect src, dst;
  2461. const struct sde_rect *crtc_roi;
  2462. bool q16_data = true;
  2463. int idx;
  2464. psde = to_sde_plane(plane);
  2465. state = plane->state;
  2466. pstate = to_sde_plane_state(state);
  2467. msm_fmt = msm_framebuffer_format(fb);
  2468. if (!msm_fmt) {
  2469. SDE_ERROR("crtc%d plane%d: null format\n",
  2470. DRMID(crtc), DRMID(plane));
  2471. return;
  2472. }
  2473. fmt = to_sde_format(msm_fmt);
  2474. POPULATE_RECT(&src, state->src_x, state->src_y,
  2475. state->src_w, state->src_h, q16_data);
  2476. POPULATE_RECT(&dst, state->crtc_x, state->crtc_y,
  2477. state->crtc_w, state->crtc_h, !q16_data);
  2478. SDE_DEBUG_PLANE(psde,
  2479. "FB[%u] %u,%u,%ux%u->crtc%u %d,%d,%ux%u, %4.4s ubwc %d\n",
  2480. fb->base.id, src.x, src.y, src.w, src.h,
  2481. crtc->base.id, dst.x, dst.y, dst.w, dst.h,
  2482. (char *)&fmt->base.pixel_format,
  2483. SDE_FORMAT_IS_UBWC(fmt));
  2484. if (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) &
  2485. BIT(SDE_DRM_DEINTERLACE)) {
  2486. SDE_DEBUG_PLANE(psde, "deinterlace\n");
  2487. for (idx = 0; idx < SDE_MAX_PLANES; ++idx)
  2488. psde->pipe_cfg.layout.plane_pitch[idx] <<= 1;
  2489. src.h /= 2;
  2490. src.y = DIV_ROUND_UP(src.y, 2);
  2491. src.y &= ~0x1;
  2492. }
  2493. /*
  2494. * adjust layer mixer position of the sspp in the presence
  2495. * of a partial update to the active lm origin
  2496. */
  2497. sde_crtc_get_crtc_roi(crtc->state, &crtc_roi);
  2498. dst.x -= crtc_roi->x;
  2499. dst.y -= crtc_roi->y;
  2500. /* check for UIDLE */
  2501. if (psde->pipe_hw->ops.setup_uidle)
  2502. _sde_plane_setup_uidle(crtc, psde, pstate, &src, &dst);
  2503. psde->pipe_cfg.src_rect = src;
  2504. psde->pipe_cfg.dst_rect = dst;
  2505. _sde_plane_setup_scaler(psde, pstate, fmt, false);
  2506. /* check for color fill */
  2507. psde->color_fill = (uint32_t)sde_plane_get_property(pstate,
  2508. PLANE_PROP_COLOR_FILL);
  2509. if (psde->color_fill & SDE_PLANE_COLOR_FILL_FLAG) {
  2510. /* skip remaining processing on color fill */
  2511. pstate->dirty = 0x0;
  2512. } else if (psde->pipe_hw->ops.setup_rects) {
  2513. psde->pipe_hw->ops.setup_rects(psde->pipe_hw,
  2514. &psde->pipe_cfg,
  2515. pstate->multirect_index);
  2516. }
  2517. if (psde->pipe_hw->ops.setup_pe &&
  2518. (pstate->multirect_index != SDE_SSPP_RECT_1))
  2519. psde->pipe_hw->ops.setup_pe(psde->pipe_hw,
  2520. &pstate->pixel_ext);
  2521. /**
  2522. * when programmed in multirect mode, scalar block will be
  2523. * bypassed. Still we need to update alpha and bitwidth
  2524. * ONLY for RECT0
  2525. */
  2526. if (psde->pipe_hw->ops.setup_scaler &&
  2527. pstate->multirect_index != SDE_SSPP_RECT_1) {
  2528. psde->pipe_hw->ctl = _sde_plane_get_hw_ctl(plane);
  2529. psde->pipe_hw->ops.setup_scaler(psde->pipe_hw,
  2530. &psde->pipe_cfg, &pstate->pixel_ext,
  2531. &pstate->scaler3_cfg);
  2532. }
  2533. /* update excl rect */
  2534. if (psde->pipe_hw->ops.setup_excl_rect)
  2535. psde->pipe_hw->ops.setup_excl_rect(psde->pipe_hw,
  2536. &pstate->excl_rect,
  2537. pstate->multirect_index);
  2538. if (psde->pipe_hw->ops.setup_multirect)
  2539. psde->pipe_hw->ops.setup_multirect(
  2540. psde->pipe_hw,
  2541. pstate->multirect_index,
  2542. pstate->multirect_mode);
  2543. }
  2544. static void _sde_plane_update_format_and_rects(struct sde_plane *psde,
  2545. struct sde_plane_state *pstate, const struct sde_format *fmt)
  2546. {
  2547. uint32_t src_flags = 0;
  2548. SDE_DEBUG_PLANE(psde, "rotation 0x%X\n", pstate->rotation);
  2549. if (pstate->rotation & DRM_MODE_REFLECT_X)
  2550. src_flags |= SDE_SSPP_FLIP_LR;
  2551. if (pstate->rotation & DRM_MODE_REFLECT_Y)
  2552. src_flags |= SDE_SSPP_FLIP_UD;
  2553. if (pstate->rotation & DRM_MODE_ROTATE_90)
  2554. src_flags |= SDE_SSPP_ROT_90;
  2555. /* update format */
  2556. psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt,
  2557. pstate->const_alpha_en, src_flags,
  2558. pstate->multirect_index);
  2559. if (psde->pipe_hw->ops.setup_cdp) {
  2560. struct sde_hw_pipe_cdp_cfg *cdp_cfg = &pstate->cdp_cfg;
  2561. memset(cdp_cfg, 0, sizeof(struct sde_hw_pipe_cdp_cfg));
  2562. cdp_cfg->enable = psde->catalog->perf.cdp_cfg
  2563. [SDE_PERF_CDP_USAGE_RT].rd_enable;
  2564. cdp_cfg->ubwc_meta_enable =
  2565. SDE_FORMAT_IS_UBWC(fmt);
  2566. cdp_cfg->tile_amortize_enable =
  2567. SDE_FORMAT_IS_UBWC(fmt) ||
  2568. SDE_FORMAT_IS_TILE(fmt);
  2569. cdp_cfg->preload_ahead = SDE_WB_CDP_PRELOAD_AHEAD_64;
  2570. psde->pipe_hw->ops.setup_cdp(psde->pipe_hw, cdp_cfg,
  2571. pstate->multirect_index);
  2572. }
  2573. _sde_plane_sspp_setup_sys_cache(psde, pstate, fmt);
  2574. /* update csc */
  2575. if (SDE_FORMAT_IS_YUV(fmt))
  2576. _sde_plane_setup_csc(psde);
  2577. else
  2578. psde->csc_ptr = 0;
  2579. if (psde->pipe_hw->ops.setup_inverse_pma) {
  2580. uint32_t pma_mode = 0;
  2581. if (fmt->alpha_enable)
  2582. pma_mode = (uint32_t) sde_plane_get_property(
  2583. pstate, PLANE_PROP_INVERSE_PMA);
  2584. psde->pipe_hw->ops.setup_inverse_pma(psde->pipe_hw,
  2585. pstate->multirect_index, pma_mode);
  2586. }
  2587. if (psde->pipe_hw->ops.setup_dgm_csc)
  2588. psde->pipe_hw->ops.setup_dgm_csc(psde->pipe_hw,
  2589. pstate->multirect_index, psde->csc_usr_ptr);
  2590. }
  2591. static void _sde_plane_update_sharpening(struct sde_plane *psde)
  2592. {
  2593. psde->sharp_cfg.strength = SHARP_STRENGTH_DEFAULT;
  2594. psde->sharp_cfg.edge_thr = SHARP_EDGE_THR_DEFAULT;
  2595. psde->sharp_cfg.smooth_thr = SHARP_SMOOTH_THR_DEFAULT;
  2596. psde->sharp_cfg.noise_thr = SHARP_NOISE_THR_DEFAULT;
  2597. psde->pipe_hw->ops.setup_sharpening(psde->pipe_hw,
  2598. &psde->sharp_cfg);
  2599. }
  2600. static void _sde_plane_update_properties(struct drm_plane *plane,
  2601. struct drm_crtc *crtc, struct drm_framebuffer *fb)
  2602. {
  2603. uint32_t nplanes;
  2604. const struct msm_format *msm_fmt;
  2605. const struct sde_format *fmt;
  2606. struct sde_plane *psde;
  2607. struct drm_plane_state *state;
  2608. struct sde_plane_state *pstate;
  2609. psde = to_sde_plane(plane);
  2610. state = plane->state;
  2611. pstate = to_sde_plane_state(state);
  2612. if (!pstate) {
  2613. SDE_ERROR("invalid plane state for plane%d\n", DRMID(plane));
  2614. return;
  2615. }
  2616. msm_fmt = msm_framebuffer_format(fb);
  2617. if (!msm_fmt) {
  2618. SDE_ERROR("crtc%d plane%d: null format\n",
  2619. DRMID(crtc), DRMID(plane));
  2620. return;
  2621. }
  2622. fmt = to_sde_format(msm_fmt);
  2623. nplanes = fmt->num_planes;
  2624. /* update secure session flag */
  2625. if (pstate->dirty & SDE_PLANE_DIRTY_FB_TRANSLATION_MODE)
  2626. _sde_plane_update_secure_session(psde, pstate);
  2627. /* update roi config */
  2628. if (pstate->dirty & SDE_PLANE_DIRTY_RECTS)
  2629. _sde_plane_update_roi_config(plane, crtc, fb);
  2630. if ((pstate->dirty & SDE_PLANE_DIRTY_FORMAT ||
  2631. pstate->dirty & SDE_PLANE_DIRTY_RECTS) &&
  2632. psde->pipe_hw->ops.setup_format)
  2633. _sde_plane_update_format_and_rects(psde, pstate, fmt);
  2634. sde_color_process_plane_setup(plane);
  2635. /* update sharpening */
  2636. if ((pstate->dirty & SDE_PLANE_DIRTY_SHARPEN) &&
  2637. psde->pipe_hw->ops.setup_sharpening)
  2638. _sde_plane_update_sharpening(psde);
  2639. _sde_plane_set_qos_lut(plane, fb);
  2640. _sde_plane_set_danger_lut(plane, fb);
  2641. if (plane->type != DRM_PLANE_TYPE_CURSOR) {
  2642. _sde_plane_set_qos_ctrl(plane, true, SDE_PLANE_QOS_PANIC_CTRL);
  2643. _sde_plane_set_ot_limit(plane, crtc);
  2644. if (pstate->dirty & SDE_PLANE_DIRTY_PERF)
  2645. _sde_plane_set_ts_prefill(plane, pstate);
  2646. }
  2647. _sde_plane_set_qos_remap(plane);
  2648. /* clear dirty */
  2649. pstate->dirty = 0x0;
  2650. }
  2651. static int sde_plane_sspp_atomic_update(struct drm_plane *plane,
  2652. struct drm_plane_state *old_state)
  2653. {
  2654. struct sde_plane *psde;
  2655. struct drm_plane_state *state;
  2656. struct sde_plane_state *pstate;
  2657. struct sde_plane_state *old_pstate;
  2658. struct drm_crtc *crtc;
  2659. struct drm_framebuffer *fb;
  2660. int idx;
  2661. int dirty_prop_flag;
  2662. if (!plane) {
  2663. SDE_ERROR("invalid plane\n");
  2664. return -EINVAL;
  2665. } else if (!plane->state) {
  2666. SDE_ERROR("invalid plane state\n");
  2667. return -EINVAL;
  2668. } else if (!old_state) {
  2669. SDE_ERROR("invalid old state\n");
  2670. return -EINVAL;
  2671. }
  2672. psde = to_sde_plane(plane);
  2673. state = plane->state;
  2674. pstate = to_sde_plane_state(state);
  2675. old_pstate = to_sde_plane_state(old_state);
  2676. crtc = state->crtc;
  2677. fb = state->fb;
  2678. if (!crtc || !fb) {
  2679. SDE_ERROR_PLANE(psde, "invalid crtc %d or fb %d\n",
  2680. !crtc, !fb);
  2681. return -EINVAL;
  2682. }
  2683. SDE_DEBUG(
  2684. "plane%d sspp:%dx%d/%4.4s/%llx/%dx%d+%d+%d/%x crtc:%dx%d+%d+%d\n",
  2685. plane->base.id,
  2686. state->fb->width, state->fb->height,
  2687. (char *) &state->fb->format->format,
  2688. state->fb->modifier,
  2689. state->src_w >> 16, state->src_h >> 16,
  2690. state->src_x >> 16, state->src_y >> 16,
  2691. pstate->rotation,
  2692. state->crtc_w, state->crtc_h,
  2693. state->crtc_x, state->crtc_y);
  2694. /* force reprogramming of all the parameters, if the flag is set */
  2695. if (psde->revalidate) {
  2696. SDE_DEBUG("plane:%d - reconfigure all the parameters\n",
  2697. plane->base.id);
  2698. pstate->dirty = SDE_PLANE_DIRTY_ALL;
  2699. psde->revalidate = false;
  2700. }
  2701. /* determine what needs to be refreshed */
  2702. while ((idx = msm_property_pop_dirty(&psde->property_info,
  2703. &pstate->property_state)) >= 0) {
  2704. dirty_prop_flag = plane_prop_array[idx];
  2705. pstate->dirty |= dirty_prop_flag;
  2706. if (dirty_prop_flag == SDE_PLANE_DIRTY_ALL)
  2707. break;
  2708. }
  2709. /**
  2710. * since plane_atomic_check is invoked before crtc_atomic_check
  2711. * in the commit sequence, all the parameters for updating the
  2712. * plane dirty flag will not be available during
  2713. * plane_atomic_check as some features params are updated
  2714. * in crtc_atomic_check (eg.:sDMA). So check for mode_change
  2715. * before sspp update.
  2716. */
  2717. _sde_plane_sspp_atomic_check_mode_changed(psde, state,
  2718. old_state);
  2719. /* re-program the output rects always if partial update roi changed */
  2720. if (sde_crtc_is_crtc_roi_dirty(crtc->state))
  2721. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  2722. if (pstate->dirty & SDE_PLANE_DIRTY_RECTS)
  2723. memset(&(psde->pipe_cfg), 0, sizeof(struct sde_hw_pipe_cfg));
  2724. _sde_plane_set_scanout(plane, pstate, &psde->pipe_cfg, fb);
  2725. /* early out if nothing dirty */
  2726. if (!pstate->dirty)
  2727. return 0;
  2728. pstate->pending = true;
  2729. psde->is_rt_pipe = sde_crtc_is_rt_client(crtc);
  2730. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
  2731. _sde_plane_update_properties(plane, crtc, fb);
  2732. return 0;
  2733. }
  2734. static void _sde_plane_atomic_disable(struct drm_plane *plane,
  2735. struct drm_plane_state *old_state)
  2736. {
  2737. struct sde_plane *psde;
  2738. struct drm_plane_state *state;
  2739. struct sde_plane_state *pstate;
  2740. if (!plane) {
  2741. SDE_ERROR("invalid plane\n");
  2742. return;
  2743. } else if (!plane->state) {
  2744. SDE_ERROR("invalid plane state\n");
  2745. return;
  2746. } else if (!old_state) {
  2747. SDE_ERROR("invalid old state\n");
  2748. return;
  2749. }
  2750. psde = to_sde_plane(plane);
  2751. state = plane->state;
  2752. pstate = to_sde_plane_state(state);
  2753. SDE_EVT32(DRMID(plane), is_sde_plane_virtual(plane),
  2754. pstate->multirect_mode);
  2755. pstate->pending = true;
  2756. if (is_sde_plane_virtual(plane) &&
  2757. psde->pipe_hw && psde->pipe_hw->ops.setup_multirect)
  2758. psde->pipe_hw->ops.setup_multirect(psde->pipe_hw,
  2759. SDE_SSPP_RECT_SOLO, SDE_SSPP_MULTIRECT_NONE);
  2760. }
  2761. static void sde_plane_atomic_update(struct drm_plane *plane,
  2762. struct drm_plane_state *old_state)
  2763. {
  2764. struct sde_plane *psde;
  2765. struct drm_plane_state *state;
  2766. if (!plane) {
  2767. SDE_ERROR("invalid plane\n");
  2768. return;
  2769. } else if (!plane->state) {
  2770. SDE_ERROR("invalid plane state\n");
  2771. return;
  2772. }
  2773. psde = to_sde_plane(plane);
  2774. psde->is_error = false;
  2775. state = plane->state;
  2776. SDE_DEBUG_PLANE(psde, "\n");
  2777. if (!sde_plane_enabled(state)) {
  2778. _sde_plane_atomic_disable(plane, old_state);
  2779. } else {
  2780. int ret;
  2781. ret = sde_plane_sspp_atomic_update(plane, old_state);
  2782. /* atomic_check should have ensured that this doesn't fail */
  2783. WARN_ON(ret < 0);
  2784. }
  2785. }
  2786. void sde_plane_restore(struct drm_plane *plane)
  2787. {
  2788. struct sde_plane *psde;
  2789. if (!plane || !plane->state) {
  2790. SDE_ERROR("invalid plane\n");
  2791. return;
  2792. }
  2793. psde = to_sde_plane(plane);
  2794. /*
  2795. * Revalidate is only true here if idle PC occurred and
  2796. * there is no plane state update in current commit cycle.
  2797. */
  2798. if (!psde->revalidate)
  2799. return;
  2800. SDE_DEBUG_PLANE(psde, "\n");
  2801. /* last plane state is same as current state */
  2802. sde_plane_atomic_update(plane, plane->state);
  2803. }
  2804. bool sde_plane_is_cache_required(struct drm_plane *plane)
  2805. {
  2806. struct sde_plane_state *pstate;
  2807. if (!plane || !plane->state) {
  2808. SDE_ERROR("invalid plane\n");
  2809. return false;
  2810. }
  2811. pstate = to_sde_plane_state(plane->state);
  2812. /* check if llcc is required for the plane */
  2813. if (pstate->sc_cfg.rd_en)
  2814. return true;
  2815. else
  2816. return false;
  2817. }
  2818. static void _sde_plane_install_non_master_properties(struct sde_plane *psde)
  2819. {
  2820. char feature_name[256];
  2821. if (psde->pipe_sblk->maxhdeciexp) {
  2822. msm_property_install_range(&psde->property_info,
  2823. "h_decimate", 0x0, 0,
  2824. psde->pipe_sblk->maxhdeciexp, 0,
  2825. PLANE_PROP_H_DECIMATE);
  2826. }
  2827. if (psde->pipe_sblk->maxvdeciexp) {
  2828. msm_property_install_range(&psde->property_info,
  2829. "v_decimate", 0x0, 0,
  2830. psde->pipe_sblk->maxvdeciexp, 0,
  2831. PLANE_PROP_V_DECIMATE);
  2832. }
  2833. if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3)) {
  2834. msm_property_install_range(
  2835. &psde->property_info, "scaler_v2",
  2836. 0x0, 0, ~0, 0, PLANE_PROP_SCALER_V2);
  2837. msm_property_install_blob(&psde->property_info,
  2838. "lut_ed", 0, PLANE_PROP_SCALER_LUT_ED);
  2839. msm_property_install_blob(&psde->property_info,
  2840. "lut_cir", 0,
  2841. PLANE_PROP_SCALER_LUT_CIR);
  2842. msm_property_install_blob(&psde->property_info,
  2843. "lut_sep", 0,
  2844. PLANE_PROP_SCALER_LUT_SEP);
  2845. } else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE)) {
  2846. msm_property_install_range(
  2847. &psde->property_info, "scaler_v2",
  2848. 0x0, 0, ~0, 0, PLANE_PROP_SCALER_V2);
  2849. msm_property_install_blob(&psde->property_info,
  2850. "lut_sep", 0,
  2851. PLANE_PROP_SCALER_LUT_SEP);
  2852. } else if (psde->features & SDE_SSPP_SCALER) {
  2853. msm_property_install_range(
  2854. &psde->property_info, "scaler_v1", 0x0,
  2855. 0, ~0, 0, PLANE_PROP_SCALER_V1);
  2856. }
  2857. if (psde->features & BIT(SDE_SSPP_CSC) ||
  2858. psde->features & BIT(SDE_SSPP_CSC_10BIT))
  2859. msm_property_install_volatile_range(
  2860. &psde->property_info, "csc_v1", 0x0,
  2861. 0, ~0, 0, PLANE_PROP_CSC_V1);
  2862. if (psde->features & BIT(SDE_SSPP_HSIC)) {
  2863. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2864. "SDE_SSPP_HUE_V",
  2865. psde->pipe_sblk->hsic_blk.version >> 16);
  2866. msm_property_install_range(&psde->property_info,
  2867. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2868. PLANE_PROP_HUE_ADJUST);
  2869. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2870. "SDE_SSPP_SATURATION_V",
  2871. psde->pipe_sblk->hsic_blk.version >> 16);
  2872. msm_property_install_range(&psde->property_info,
  2873. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2874. PLANE_PROP_SATURATION_ADJUST);
  2875. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2876. "SDE_SSPP_VALUE_V",
  2877. psde->pipe_sblk->hsic_blk.version >> 16);
  2878. msm_property_install_range(&psde->property_info,
  2879. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2880. PLANE_PROP_VALUE_ADJUST);
  2881. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2882. "SDE_SSPP_CONTRAST_V",
  2883. psde->pipe_sblk->hsic_blk.version >> 16);
  2884. msm_property_install_range(&psde->property_info,
  2885. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2886. PLANE_PROP_CONTRAST_ADJUST);
  2887. }
  2888. }
  2889. /* helper to install properties which are common to planes and crtcs */
  2890. static void _sde_plane_install_properties(struct drm_plane *plane,
  2891. struct sde_mdss_cfg *catalog, u32 master_plane_id)
  2892. {
  2893. static const struct drm_prop_enum_list e_blend_op[] = {
  2894. {SDE_DRM_BLEND_OP_NOT_DEFINED, "not_defined"},
  2895. {SDE_DRM_BLEND_OP_OPAQUE, "opaque"},
  2896. {SDE_DRM_BLEND_OP_PREMULTIPLIED, "premultiplied"},
  2897. {SDE_DRM_BLEND_OP_COVERAGE, "coverage"}
  2898. };
  2899. static const struct drm_prop_enum_list e_src_config[] = {
  2900. {SDE_DRM_DEINTERLACE, "deinterlace"}
  2901. };
  2902. static const struct drm_prop_enum_list e_fb_translation_mode[] = {
  2903. {SDE_DRM_FB_NON_SEC, "non_sec"},
  2904. {SDE_DRM_FB_SEC, "sec"},
  2905. {SDE_DRM_FB_NON_SEC_DIR_TRANS, "non_sec_direct_translation"},
  2906. {SDE_DRM_FB_SEC_DIR_TRANS, "sec_direct_translation"},
  2907. };
  2908. static const struct drm_prop_enum_list e_multirect_mode[] = {
  2909. {SDE_SSPP_MULTIRECT_NONE, "none"},
  2910. {SDE_SSPP_MULTIRECT_PARALLEL, "parallel"},
  2911. {SDE_SSPP_MULTIRECT_TIME_MX, "serial"},
  2912. };
  2913. const struct sde_format_extended *format_list;
  2914. struct sde_kms_info *info;
  2915. struct sde_plane *psde = to_sde_plane(plane);
  2916. int zpos_max = 255;
  2917. int zpos_def = 0;
  2918. char feature_name[256];
  2919. if (!plane || !psde) {
  2920. SDE_ERROR("invalid plane\n");
  2921. return;
  2922. } else if (!psde->pipe_hw || !psde->pipe_sblk) {
  2923. SDE_ERROR("invalid plane, pipe_hw %d pipe_sblk %d\n",
  2924. !psde->pipe_hw, !psde->pipe_sblk);
  2925. return;
  2926. } else if (!catalog) {
  2927. SDE_ERROR("invalid catalog\n");
  2928. return;
  2929. }
  2930. psde->catalog = catalog;
  2931. if (sde_is_custom_client()) {
  2932. if (catalog->mixer_count &&
  2933. catalog->mixer[0].sblk->maxblendstages) {
  2934. zpos_max = catalog->mixer[0].sblk->maxblendstages - 1;
  2935. if (zpos_max > SDE_STAGE_MAX - SDE_STAGE_0 - 1)
  2936. zpos_max = SDE_STAGE_MAX - SDE_STAGE_0 - 1;
  2937. }
  2938. } else if (plane->type != DRM_PLANE_TYPE_PRIMARY) {
  2939. /* reserve zpos == 0 for primary planes */
  2940. zpos_def = drm_plane_index(plane) + 1;
  2941. }
  2942. msm_property_install_range(&psde->property_info, "zpos",
  2943. 0x0, 0, zpos_max, zpos_def, PLANE_PROP_ZPOS);
  2944. msm_property_install_range(&psde->property_info, "alpha",
  2945. 0x0, 0, 255, 255, PLANE_PROP_ALPHA);
  2946. /* linux default file descriptor range on each process */
  2947. msm_property_install_range(&psde->property_info, "input_fence",
  2948. 0x0, 0, INR_OPEN_MAX, 0, PLANE_PROP_INPUT_FENCE);
  2949. if (!master_plane_id)
  2950. _sde_plane_install_non_master_properties(psde);
  2951. if (psde->features & BIT(SDE_SSPP_EXCL_RECT))
  2952. msm_property_install_volatile_range(&psde->property_info,
  2953. "excl_rect_v1", 0x0, 0, ~0, 0, PLANE_PROP_EXCL_RECT_V1);
  2954. sde_plane_rot_install_properties(plane, catalog);
  2955. msm_property_install_enum(&psde->property_info, "blend_op", 0x0, 0,
  2956. e_blend_op, ARRAY_SIZE(e_blend_op), PLANE_PROP_BLEND_OP);
  2957. msm_property_install_enum(&psde->property_info, "src_config", 0x0, 1,
  2958. e_src_config, ARRAY_SIZE(e_src_config), PLANE_PROP_SRC_CONFIG);
  2959. if (psde->pipe_hw->ops.setup_solidfill)
  2960. msm_property_install_range(&psde->property_info, "color_fill",
  2961. 0, 0, 0xFFFFFFFF, 0, PLANE_PROP_COLOR_FILL);
  2962. msm_property_install_range(&psde->property_info,
  2963. "prefill_size", 0x0, 0, ~0, 0,
  2964. PLANE_PROP_PREFILL_SIZE);
  2965. msm_property_install_range(&psde->property_info,
  2966. "prefill_time", 0x0, 0, ~0, 0,
  2967. PLANE_PROP_PREFILL_TIME);
  2968. info = kzalloc(sizeof(struct sde_kms_info), GFP_KERNEL);
  2969. if (!info) {
  2970. SDE_ERROR("failed to allocate info memory\n");
  2971. return;
  2972. }
  2973. msm_property_install_blob(&psde->property_info, "capabilities",
  2974. DRM_MODE_PROP_IMMUTABLE, PLANE_PROP_INFO);
  2975. sde_kms_info_reset(info);
  2976. if (!master_plane_id) {
  2977. format_list = psde->pipe_sblk->format_list;
  2978. } else {
  2979. format_list = psde->pipe_sblk->virt_format_list;
  2980. sde_kms_info_add_keyint(info, "primary_smart_plane_id",
  2981. master_plane_id);
  2982. msm_property_install_enum(&psde->property_info,
  2983. "multirect_mode", 0x0, 0, e_multirect_mode,
  2984. ARRAY_SIZE(e_multirect_mode),
  2985. PLANE_PROP_MULTIRECT_MODE);
  2986. }
  2987. if (format_list) {
  2988. sde_kms_info_start(info, "pixel_formats");
  2989. while (format_list->fourcc_format) {
  2990. sde_kms_info_append_format(info,
  2991. format_list->fourcc_format,
  2992. format_list->modifier);
  2993. ++format_list;
  2994. }
  2995. sde_kms_info_stop(info);
  2996. }
  2997. if (psde->pipe_hw && psde->pipe_hw->ops.get_scaler_ver)
  2998. sde_kms_info_add_keyint(info, "scaler_step_ver",
  2999. psde->pipe_hw->ops.get_scaler_ver(psde->pipe_hw));
  3000. sde_kms_info_add_keyint(info, "max_linewidth",
  3001. psde->pipe_sblk->maxlinewidth);
  3002. sde_kms_info_add_keyint(info, "max_upscale",
  3003. psde->pipe_sblk->maxupscale);
  3004. sde_kms_info_add_keyint(info, "max_downscale",
  3005. psde->pipe_sblk->maxdwnscale);
  3006. sde_kms_info_add_keyint(info, "max_horizontal_deci",
  3007. psde->pipe_sblk->maxhdeciexp);
  3008. sde_kms_info_add_keyint(info, "max_vertical_deci",
  3009. psde->pipe_sblk->maxvdeciexp);
  3010. sde_kms_info_add_keyint(info, "max_per_pipe_bw",
  3011. psde->pipe_sblk->max_per_pipe_bw * 1000LL);
  3012. sde_kms_info_add_keyint(info, "max_per_pipe_bw_high",
  3013. psde->pipe_sblk->max_per_pipe_bw_high * 1000LL);
  3014. if ((!master_plane_id &&
  3015. (psde->features & BIT(SDE_SSPP_INVERSE_PMA))) ||
  3016. (psde->features & BIT(SDE_SSPP_DGM_INVERSE_PMA))) {
  3017. msm_property_install_range(&psde->property_info,
  3018. "inverse_pma", 0x0, 0, 1, 0, PLANE_PROP_INVERSE_PMA);
  3019. sde_kms_info_add_keyint(info, "inverse_pma", 1);
  3020. }
  3021. if (psde->features & BIT(SDE_SSPP_DGM_CSC)) {
  3022. msm_property_install_volatile_range(
  3023. &psde->property_info, "csc_dma_v1", 0x0,
  3024. 0, ~0, 0, PLANE_PROP_CSC_DMA_V1);
  3025. sde_kms_info_add_keyint(info, "csc_dma_v1", 1);
  3026. }
  3027. if (psde->features & BIT(SDE_SSPP_SEC_UI_ALLOWED))
  3028. sde_kms_info_add_keyint(info, "sec_ui_allowed", 1);
  3029. if (psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI))
  3030. sde_kms_info_add_keyint(info, "block_sec_ui", 1);
  3031. if (psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1)) {
  3032. const struct sde_format_extended *inline_rot_fmt_list;
  3033. sde_kms_info_add_keyint(info, "true_inline_rot_rev", 1);
  3034. sde_kms_info_add_keyint(info,
  3035. "true_inline_dwnscale_rt",
  3036. (int) (psde->pipe_sblk->in_rot_maxdwnscale_rt_num /
  3037. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom));
  3038. sde_kms_info_add_keyint(info,
  3039. "true_inline_dwnscale_rt_numerator",
  3040. psde->pipe_sblk->in_rot_maxdwnscale_rt_num);
  3041. sde_kms_info_add_keyint(info,
  3042. "true_inline_dwnscale_rt_denominator",
  3043. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom);
  3044. sde_kms_info_add_keyint(info, "true_inline_dwnscale_nrt",
  3045. psde->pipe_sblk->in_rot_maxdwnscale_nrt);
  3046. sde_kms_info_add_keyint(info, "true_inline_max_height",
  3047. psde->pipe_sblk->in_rot_maxheight);
  3048. sde_kms_info_add_keyint(info, "true_inline_prefill_fudge_lines",
  3049. psde->pipe_sblk->in_rot_prefill_fudge_lines);
  3050. sde_kms_info_add_keyint(info, "true_inline_prefill_lines_nv12",
  3051. psde->pipe_sblk->in_rot_prefill_lines_nv12);
  3052. sde_kms_info_add_keyint(info, "true_inline_prefill_lines",
  3053. psde->pipe_sblk->in_rot_prefill_lines);
  3054. inline_rot_fmt_list = psde->pipe_sblk->in_rot_format_list;
  3055. if (inline_rot_fmt_list) {
  3056. sde_kms_info_start(info, "inline_rot_pixel_formats");
  3057. while (inline_rot_fmt_list->fourcc_format) {
  3058. sde_kms_info_append_format(info,
  3059. inline_rot_fmt_list->fourcc_format,
  3060. inline_rot_fmt_list->modifier);
  3061. ++inline_rot_fmt_list;
  3062. }
  3063. sde_kms_info_stop(info);
  3064. }
  3065. }
  3066. msm_property_set_blob(&psde->property_info, &psde->blob_info,
  3067. info->data, SDE_KMS_INFO_DATALEN(info),
  3068. PLANE_PROP_INFO);
  3069. kfree(info);
  3070. if (psde->features & BIT(SDE_SSPP_MEMCOLOR)) {
  3071. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3072. "SDE_SSPP_SKIN_COLOR_V",
  3073. psde->pipe_sblk->memcolor_blk.version >> 16);
  3074. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3075. PLANE_PROP_SKIN_COLOR);
  3076. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3077. "SDE_SSPP_SKY_COLOR_V",
  3078. psde->pipe_sblk->memcolor_blk.version >> 16);
  3079. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3080. PLANE_PROP_SKY_COLOR);
  3081. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3082. "SDE_SSPP_FOLIAGE_COLOR_V",
  3083. psde->pipe_sblk->memcolor_blk.version >> 16);
  3084. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3085. PLANE_PROP_FOLIAGE_COLOR);
  3086. }
  3087. if (psde->features & BIT(SDE_SSPP_VIG_GAMUT)) {
  3088. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3089. "SDE_VIG_3D_LUT_GAMUT_V",
  3090. psde->pipe_sblk->gamut_blk.version >> 16);
  3091. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3092. PLANE_PROP_VIG_GAMUT);
  3093. }
  3094. if (psde->features & BIT(SDE_SSPP_VIG_IGC)) {
  3095. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3096. "SDE_VIG_1D_LUT_IGC_V",
  3097. psde->pipe_sblk->igc_blk[0].version >> 16);
  3098. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3099. PLANE_PROP_VIG_IGC);
  3100. }
  3101. if (psde->features & BIT(SDE_SSPP_DMA_IGC)) {
  3102. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3103. "SDE_DGM_1D_LUT_IGC_V",
  3104. psde->pipe_sblk->igc_blk[0].version >> 16);
  3105. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3106. PLANE_PROP_DMA_IGC);
  3107. }
  3108. if (psde->features & BIT(SDE_SSPP_DMA_GC)) {
  3109. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3110. "SDE_DGM_1D_LUT_GC_V",
  3111. psde->pipe_sblk->gc_blk[0].version >> 16);
  3112. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3113. PLANE_PROP_DMA_GC);
  3114. }
  3115. msm_property_install_enum(&psde->property_info, "fb_translation_mode",
  3116. 0x0,
  3117. 0, e_fb_translation_mode,
  3118. ARRAY_SIZE(e_fb_translation_mode),
  3119. PLANE_PROP_FB_TRANSLATION_MODE);
  3120. }
  3121. static inline void _sde_plane_set_csc_v1(struct sde_plane *psde,
  3122. void __user *usr_ptr)
  3123. {
  3124. struct sde_drm_csc_v1 csc_v1;
  3125. int i;
  3126. if (!psde) {
  3127. SDE_ERROR("invalid plane\n");
  3128. return;
  3129. }
  3130. psde->csc_usr_ptr = NULL;
  3131. if (!usr_ptr) {
  3132. SDE_DEBUG_PLANE(psde, "csc data removed\n");
  3133. return;
  3134. }
  3135. if (copy_from_user(&csc_v1, usr_ptr, sizeof(csc_v1))) {
  3136. SDE_ERROR_PLANE(psde, "failed to copy csc data\n");
  3137. return;
  3138. }
  3139. /* populate from user space */
  3140. for (i = 0; i < SDE_CSC_MATRIX_COEFF_SIZE; ++i)
  3141. psde->csc_cfg.csc_mv[i] = csc_v1.ctm_coeff[i] >> 16;
  3142. for (i = 0; i < SDE_CSC_BIAS_SIZE; ++i) {
  3143. psde->csc_cfg.csc_pre_bv[i] = csc_v1.pre_bias[i];
  3144. psde->csc_cfg.csc_post_bv[i] = csc_v1.post_bias[i];
  3145. }
  3146. for (i = 0; i < SDE_CSC_CLAMP_SIZE; ++i) {
  3147. psde->csc_cfg.csc_pre_lv[i] = csc_v1.pre_clamp[i];
  3148. psde->csc_cfg.csc_post_lv[i] = csc_v1.post_clamp[i];
  3149. }
  3150. psde->csc_usr_ptr = &psde->csc_cfg;
  3151. }
  3152. static inline void _sde_plane_set_scaler_v1(struct sde_plane *psde,
  3153. struct sde_plane_state *pstate, void __user *usr)
  3154. {
  3155. struct sde_drm_scaler_v1 scale_v1;
  3156. struct sde_hw_pixel_ext *pe;
  3157. int i;
  3158. if (!psde || !pstate) {
  3159. SDE_ERROR("invalid argument(s)\n");
  3160. return;
  3161. }
  3162. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_NONE;
  3163. if (!usr) {
  3164. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3165. return;
  3166. }
  3167. if (copy_from_user(&scale_v1, usr, sizeof(scale_v1))) {
  3168. SDE_ERROR_PLANE(psde, "failed to copy scale data\n");
  3169. return;
  3170. }
  3171. /* force property to be dirty, even if the pointer didn't change */
  3172. msm_property_set_dirty(&psde->property_info,
  3173. &pstate->property_state, PLANE_PROP_SCALER_V1);
  3174. /* populate from user space */
  3175. pe = &pstate->pixel_ext;
  3176. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  3177. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3178. pe->init_phase_x[i] = scale_v1.init_phase_x[i];
  3179. pe->phase_step_x[i] = scale_v1.phase_step_x[i];
  3180. pe->init_phase_y[i] = scale_v1.init_phase_y[i];
  3181. pe->phase_step_y[i] = scale_v1.phase_step_y[i];
  3182. pe->horz_filter[i] = scale_v1.horz_filter[i];
  3183. pe->vert_filter[i] = scale_v1.vert_filter[i];
  3184. }
  3185. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3186. pe->left_ftch[i] = scale_v1.pe.left_ftch[i];
  3187. pe->right_ftch[i] = scale_v1.pe.right_ftch[i];
  3188. pe->left_rpt[i] = scale_v1.pe.left_rpt[i];
  3189. pe->right_rpt[i] = scale_v1.pe.right_rpt[i];
  3190. pe->roi_w[i] = scale_v1.pe.num_ext_pxls_lr[i];
  3191. pe->top_ftch[i] = scale_v1.pe.top_ftch[i];
  3192. pe->btm_ftch[i] = scale_v1.pe.btm_ftch[i];
  3193. pe->top_rpt[i] = scale_v1.pe.top_rpt[i];
  3194. pe->btm_rpt[i] = scale_v1.pe.btm_rpt[i];
  3195. pe->roi_h[i] = scale_v1.pe.num_ext_pxls_tb[i];
  3196. }
  3197. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V1;
  3198. SDE_EVT32_VERBOSE(DRMID(&psde->base));
  3199. SDE_DEBUG_PLANE(psde, "user property data copied\n");
  3200. }
  3201. static inline void _sde_plane_set_scaler_v2(struct sde_plane *psde,
  3202. struct sde_plane_state *pstate, void __user *usr)
  3203. {
  3204. struct sde_drm_scaler_v2 scale_v2;
  3205. struct sde_hw_pixel_ext *pe;
  3206. int i;
  3207. struct sde_hw_scaler3_cfg *cfg;
  3208. if (!psde || !pstate) {
  3209. SDE_ERROR("invalid argument(s)\n");
  3210. return;
  3211. }
  3212. cfg = &pstate->scaler3_cfg;
  3213. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_NONE;
  3214. if (!usr) {
  3215. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3216. cfg->enable = 0;
  3217. goto end;
  3218. }
  3219. if (copy_from_user(&scale_v2, usr, sizeof(scale_v2))) {
  3220. SDE_ERROR_PLANE(psde, "failed to copy scale data\n");
  3221. return;
  3222. }
  3223. /* detach/ignore user data if 'disabled' */
  3224. if (!scale_v2.enable) {
  3225. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3226. cfg->enable = 0;
  3227. goto end;
  3228. }
  3229. /* populate from user space */
  3230. sde_set_scaler_v2(cfg, &scale_v2);
  3231. pe = &pstate->pixel_ext;
  3232. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  3233. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3234. pe->left_ftch[i] = scale_v2.pe.left_ftch[i];
  3235. pe->right_ftch[i] = scale_v2.pe.right_ftch[i];
  3236. pe->left_rpt[i] = scale_v2.pe.left_rpt[i];
  3237. pe->right_rpt[i] = scale_v2.pe.right_rpt[i];
  3238. pe->roi_w[i] = scale_v2.pe.num_ext_pxls_lr[i];
  3239. pe->top_ftch[i] = scale_v2.pe.top_ftch[i];
  3240. pe->btm_ftch[i] = scale_v2.pe.btm_ftch[i];
  3241. pe->top_rpt[i] = scale_v2.pe.top_rpt[i];
  3242. pe->btm_rpt[i] = scale_v2.pe.btm_rpt[i];
  3243. pe->roi_h[i] = scale_v2.pe.num_ext_pxls_tb[i];
  3244. }
  3245. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V2_CHECK;
  3246. end:
  3247. /* force property to be dirty, even if the pointer didn't change */
  3248. msm_property_set_dirty(&psde->property_info,
  3249. &pstate->property_state, PLANE_PROP_SCALER_V2);
  3250. SDE_EVT32_VERBOSE(DRMID(&psde->base), cfg->enable, cfg->de.enable,
  3251. cfg->src_width[0], cfg->src_height[0],
  3252. cfg->dst_width, cfg->dst_height);
  3253. SDE_DEBUG_PLANE(psde, "user property data copied\n");
  3254. }
  3255. static void _sde_plane_set_excl_rect_v1(struct sde_plane *psde,
  3256. struct sde_plane_state *pstate, void __user *usr_ptr)
  3257. {
  3258. struct drm_clip_rect excl_rect_v1;
  3259. if (!psde || !pstate) {
  3260. SDE_ERROR("invalid argument(s)\n");
  3261. return;
  3262. }
  3263. if (!usr_ptr) {
  3264. memset(&pstate->excl_rect, 0, sizeof(pstate->excl_rect));
  3265. SDE_DEBUG_PLANE(psde, "excl_rect data cleared\n");
  3266. return;
  3267. }
  3268. if (copy_from_user(&excl_rect_v1, usr_ptr, sizeof(excl_rect_v1))) {
  3269. SDE_ERROR_PLANE(psde, "failed to copy excl_rect data\n");
  3270. return;
  3271. }
  3272. /* populate from user space */
  3273. pstate->excl_rect.x = excl_rect_v1.x1;
  3274. pstate->excl_rect.y = excl_rect_v1.y1;
  3275. pstate->excl_rect.w = excl_rect_v1.x2 - excl_rect_v1.x1;
  3276. pstate->excl_rect.h = excl_rect_v1.y2 - excl_rect_v1.y1;
  3277. SDE_DEBUG_PLANE(psde, "excl_rect: {%d,%d,%d,%d}\n",
  3278. pstate->excl_rect.x, pstate->excl_rect.y,
  3279. pstate->excl_rect.w, pstate->excl_rect.h);
  3280. }
  3281. static int sde_plane_atomic_set_property(struct drm_plane *plane,
  3282. struct drm_plane_state *state, struct drm_property *property,
  3283. uint64_t val)
  3284. {
  3285. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3286. struct sde_plane_state *pstate;
  3287. int idx, ret = -EINVAL;
  3288. SDE_DEBUG_PLANE(psde, "\n");
  3289. if (!plane) {
  3290. SDE_ERROR("invalid plane\n");
  3291. } else if (!state) {
  3292. SDE_ERROR_PLANE(psde, "invalid state\n");
  3293. } else {
  3294. pstate = to_sde_plane_state(state);
  3295. ret = msm_property_atomic_set(&psde->property_info,
  3296. &pstate->property_state, property, val);
  3297. if (!ret) {
  3298. idx = msm_property_index(&psde->property_info,
  3299. property);
  3300. switch (idx) {
  3301. case PLANE_PROP_INPUT_FENCE:
  3302. _sde_plane_set_input_fence(psde, pstate, val);
  3303. break;
  3304. case PLANE_PROP_CSC_V1:
  3305. case PLANE_PROP_CSC_DMA_V1:
  3306. _sde_plane_set_csc_v1(psde, (void __user *)val);
  3307. break;
  3308. case PLANE_PROP_SCALER_V1:
  3309. _sde_plane_set_scaler_v1(psde, pstate,
  3310. (void *)(uintptr_t)val);
  3311. break;
  3312. case PLANE_PROP_SCALER_V2:
  3313. _sde_plane_set_scaler_v2(psde, pstate,
  3314. (void *)(uintptr_t)val);
  3315. break;
  3316. case PLANE_PROP_EXCL_RECT_V1:
  3317. _sde_plane_set_excl_rect_v1(psde, pstate,
  3318. (void *)(uintptr_t)val);
  3319. break;
  3320. default:
  3321. /* nothing to do */
  3322. break;
  3323. }
  3324. }
  3325. }
  3326. SDE_DEBUG_PLANE(psde, "%s[%d] <= 0x%llx ret=%d\n",
  3327. property->name, property->base.id, val, ret);
  3328. return ret;
  3329. }
  3330. static int sde_plane_atomic_get_property(struct drm_plane *plane,
  3331. const struct drm_plane_state *state,
  3332. struct drm_property *property, uint64_t *val)
  3333. {
  3334. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3335. struct sde_plane_state *pstate;
  3336. int ret = -EINVAL;
  3337. if (!plane) {
  3338. SDE_ERROR("invalid plane\n");
  3339. } else if (!state) {
  3340. SDE_ERROR("invalid state\n");
  3341. } else {
  3342. SDE_DEBUG_PLANE(psde, "\n");
  3343. pstate = to_sde_plane_state(state);
  3344. ret = msm_property_atomic_get(&psde->property_info,
  3345. &pstate->property_state, property, val);
  3346. }
  3347. return ret;
  3348. }
  3349. int sde_plane_helper_reset_custom_properties(struct drm_plane *plane,
  3350. struct drm_plane_state *plane_state)
  3351. {
  3352. struct sde_plane *psde;
  3353. struct sde_plane_state *pstate;
  3354. struct drm_property *drm_prop;
  3355. enum msm_mdp_plane_property prop_idx;
  3356. if (!plane || !plane_state) {
  3357. SDE_ERROR("invalid params\n");
  3358. return -EINVAL;
  3359. }
  3360. psde = to_sde_plane(plane);
  3361. pstate = to_sde_plane_state(plane_state);
  3362. for (prop_idx = 0; prop_idx < PLANE_PROP_COUNT; prop_idx++) {
  3363. uint64_t val = pstate->property_values[prop_idx].value;
  3364. uint64_t def;
  3365. int ret;
  3366. drm_prop = msm_property_index_to_drm_property(
  3367. &psde->property_info, prop_idx);
  3368. if (!drm_prop) {
  3369. /* not all props will be installed, based on caps */
  3370. SDE_DEBUG_PLANE(psde, "invalid property index %d\n",
  3371. prop_idx);
  3372. continue;
  3373. }
  3374. def = msm_property_get_default(&psde->property_info, prop_idx);
  3375. if (val == def)
  3376. continue;
  3377. SDE_DEBUG_PLANE(psde, "set prop %s idx %d from %llu to %llu\n",
  3378. drm_prop->name, prop_idx, val, def);
  3379. ret = sde_plane_atomic_set_property(plane, plane_state,
  3380. drm_prop, def);
  3381. if (ret) {
  3382. SDE_ERROR_PLANE(psde,
  3383. "set property failed, idx %d ret %d\n",
  3384. prop_idx, ret);
  3385. continue;
  3386. }
  3387. }
  3388. return 0;
  3389. }
  3390. static void sde_plane_destroy(struct drm_plane *plane)
  3391. {
  3392. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3393. SDE_DEBUG_PLANE(psde, "\n");
  3394. if (psde) {
  3395. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
  3396. if (psde->blob_info)
  3397. drm_property_blob_put(psde->blob_info);
  3398. msm_property_destroy(&psde->property_info);
  3399. mutex_destroy(&psde->lock);
  3400. drm_plane_helper_disable(plane, NULL);
  3401. /* this will destroy the states as well */
  3402. drm_plane_cleanup(plane);
  3403. if (psde->pipe_hw)
  3404. sde_hw_sspp_destroy(psde->pipe_hw);
  3405. kfree(psde);
  3406. }
  3407. }
  3408. static void sde_plane_destroy_state(struct drm_plane *plane,
  3409. struct drm_plane_state *state)
  3410. {
  3411. struct sde_plane *psde;
  3412. struct sde_plane_state *pstate;
  3413. if (!plane || !state) {
  3414. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  3415. !plane, !state);
  3416. return;
  3417. }
  3418. psde = to_sde_plane(plane);
  3419. pstate = to_sde_plane_state(state);
  3420. SDE_DEBUG_PLANE(psde, "\n");
  3421. /* remove ref count for frame buffers */
  3422. if (state->fb)
  3423. drm_framebuffer_put(state->fb);
  3424. /* remove ref count for fence */
  3425. if (pstate->input_fence)
  3426. sde_sync_put(pstate->input_fence);
  3427. /* destroy value helper */
  3428. msm_property_destroy_state(&psde->property_info, pstate,
  3429. &pstate->property_state);
  3430. }
  3431. static struct drm_plane_state *
  3432. sde_plane_duplicate_state(struct drm_plane *plane)
  3433. {
  3434. struct sde_plane *psde;
  3435. struct sde_plane_state *pstate;
  3436. struct sde_plane_state *old_state;
  3437. struct drm_property *drm_prop;
  3438. uint64_t input_fence_default;
  3439. if (!plane) {
  3440. SDE_ERROR("invalid plane\n");
  3441. return NULL;
  3442. } else if (!plane->state) {
  3443. SDE_ERROR("invalid plane state\n");
  3444. return NULL;
  3445. }
  3446. old_state = to_sde_plane_state(plane->state);
  3447. psde = to_sde_plane(plane);
  3448. pstate = msm_property_alloc_state(&psde->property_info);
  3449. if (!pstate) {
  3450. SDE_ERROR_PLANE(psde, "failed to allocate state\n");
  3451. return NULL;
  3452. }
  3453. SDE_DEBUG_PLANE(psde, "\n");
  3454. /* duplicate value helper */
  3455. msm_property_duplicate_state(&psde->property_info, old_state, pstate,
  3456. &pstate->property_state, pstate->property_values);
  3457. /* clear out any input fence */
  3458. pstate->input_fence = 0;
  3459. input_fence_default = msm_property_get_default(
  3460. &psde->property_info, PLANE_PROP_INPUT_FENCE);
  3461. drm_prop = msm_property_index_to_drm_property(
  3462. &psde->property_info, PLANE_PROP_INPUT_FENCE);
  3463. if (msm_property_atomic_set(&psde->property_info,
  3464. &pstate->property_state, drm_prop,
  3465. input_fence_default))
  3466. SDE_DEBUG_PLANE(psde,
  3467. "error clearing duplicated input fence\n");
  3468. pstate->dirty = 0x0;
  3469. pstate->pending = false;
  3470. __drm_atomic_helper_plane_duplicate_state(plane, &pstate->base);
  3471. return &pstate->base;
  3472. }
  3473. static void sde_plane_reset(struct drm_plane *plane)
  3474. {
  3475. struct sde_plane *psde;
  3476. struct sde_plane_state *pstate;
  3477. if (!plane) {
  3478. SDE_ERROR("invalid plane\n");
  3479. return;
  3480. }
  3481. psde = to_sde_plane(plane);
  3482. SDE_DEBUG_PLANE(psde, "\n");
  3483. if (plane->state && !sde_crtc_is_reset_required(plane->state->crtc)) {
  3484. SDE_DEBUG_PLANE(psde, "avoid reset for plane\n");
  3485. return;
  3486. }
  3487. /* remove previous state, if present */
  3488. if (plane->state) {
  3489. sde_plane_destroy_state(plane, plane->state);
  3490. plane->state = 0;
  3491. }
  3492. pstate = msm_property_alloc_state(&psde->property_info);
  3493. if (!pstate) {
  3494. SDE_ERROR_PLANE(psde, "failed to allocate state\n");
  3495. return;
  3496. }
  3497. /* reset value helper */
  3498. msm_property_reset_state(&psde->property_info, pstate,
  3499. &pstate->property_state,
  3500. pstate->property_values);
  3501. pstate->base.plane = plane;
  3502. plane->state = &pstate->base;
  3503. }
  3504. u32 sde_plane_get_ubwc_error(struct drm_plane *plane)
  3505. {
  3506. u32 ubwc_error = 0;
  3507. struct sde_plane *psde;
  3508. if (!plane) {
  3509. SDE_ERROR("invalid plane\n");
  3510. return 0;
  3511. }
  3512. psde = to_sde_plane(plane);
  3513. if (!psde->is_virtual && psde->pipe_hw->ops.get_ubwc_error)
  3514. ubwc_error = psde->pipe_hw->ops.get_ubwc_error(psde->pipe_hw);
  3515. return ubwc_error;
  3516. }
  3517. void sde_plane_clear_ubwc_error(struct drm_plane *plane)
  3518. {
  3519. struct sde_plane *psde;
  3520. if (!plane) {
  3521. SDE_ERROR("invalid plane\n");
  3522. return;
  3523. }
  3524. psde = to_sde_plane(plane);
  3525. if (psde->pipe_hw->ops.clear_ubwc_error)
  3526. psde->pipe_hw->ops.clear_ubwc_error(psde->pipe_hw);
  3527. }
  3528. #ifdef CONFIG_DEBUG_FS
  3529. static ssize_t _sde_plane_danger_read(struct file *file,
  3530. char __user *buff, size_t count, loff_t *ppos)
  3531. {
  3532. struct sde_kms *kms = file->private_data;
  3533. struct sde_mdss_cfg *cfg = kms->catalog;
  3534. int len = 0;
  3535. char buf[40] = {'\0'};
  3536. if (!cfg)
  3537. return -ENODEV;
  3538. if (*ppos)
  3539. return 0; /* the end */
  3540. len = snprintf(buf, sizeof(buf), "%d\n", !kms->has_danger_ctrl);
  3541. if (len < 0 || len >= sizeof(buf))
  3542. return 0;
  3543. if ((count < sizeof(buf)) || copy_to_user(buff, buf, len))
  3544. return -EFAULT;
  3545. *ppos += len; /* increase offset */
  3546. return len;
  3547. }
  3548. static void _sde_plane_set_danger_state(struct sde_kms *kms, bool enable)
  3549. {
  3550. struct drm_plane *plane;
  3551. drm_for_each_plane(plane, kms->dev) {
  3552. if (plane->fb && plane->state) {
  3553. sde_plane_danger_signal_ctrl(plane, enable);
  3554. SDE_DEBUG("plane:%d img:%dx%d ",
  3555. plane->base.id, plane->fb->width,
  3556. plane->fb->height);
  3557. SDE_DEBUG("src[%d,%d,%d,%d] dst[%d,%d,%d,%d]\n",
  3558. plane->state->src_x >> 16,
  3559. plane->state->src_y >> 16,
  3560. plane->state->src_w >> 16,
  3561. plane->state->src_h >> 16,
  3562. plane->state->crtc_x, plane->state->crtc_y,
  3563. plane->state->crtc_w, plane->state->crtc_h);
  3564. } else {
  3565. SDE_DEBUG("Inactive plane:%d\n", plane->base.id);
  3566. }
  3567. }
  3568. }
  3569. static ssize_t _sde_plane_danger_write(struct file *file,
  3570. const char __user *user_buf, size_t count, loff_t *ppos)
  3571. {
  3572. struct sde_kms *kms = file->private_data;
  3573. struct sde_mdss_cfg *cfg = kms->catalog;
  3574. int disable_panic;
  3575. char buf[10];
  3576. if (!cfg)
  3577. return -EFAULT;
  3578. if (count >= sizeof(buf))
  3579. return -EFAULT;
  3580. if (copy_from_user(buf, user_buf, count))
  3581. return -EFAULT;
  3582. buf[count] = 0; /* end of string */
  3583. if (kstrtoint(buf, 0, &disable_panic))
  3584. return -EFAULT;
  3585. if (disable_panic) {
  3586. /* Disable panic signal for all active pipes */
  3587. SDE_DEBUG("Disabling danger:\n");
  3588. _sde_plane_set_danger_state(kms, false);
  3589. kms->has_danger_ctrl = false;
  3590. } else {
  3591. /* Enable panic signal for all active pipes */
  3592. SDE_DEBUG("Enabling danger:\n");
  3593. kms->has_danger_ctrl = true;
  3594. _sde_plane_set_danger_state(kms, true);
  3595. }
  3596. return count;
  3597. }
  3598. static const struct file_operations sde_plane_danger_enable = {
  3599. .open = simple_open,
  3600. .read = _sde_plane_danger_read,
  3601. .write = _sde_plane_danger_write,
  3602. };
  3603. static int _sde_plane_init_debugfs(struct drm_plane *plane)
  3604. {
  3605. struct sde_plane *psde;
  3606. struct sde_kms *kms;
  3607. struct msm_drm_private *priv;
  3608. const struct sde_sspp_sub_blks *sblk = 0;
  3609. const struct sde_sspp_cfg *cfg = 0;
  3610. if (!plane || !plane->dev) {
  3611. SDE_ERROR("invalid arguments\n");
  3612. return -EINVAL;
  3613. }
  3614. priv = plane->dev->dev_private;
  3615. if (!priv || !priv->kms) {
  3616. SDE_ERROR("invalid KMS reference\n");
  3617. return -EINVAL;
  3618. }
  3619. kms = to_sde_kms(priv->kms);
  3620. psde = to_sde_plane(plane);
  3621. if (psde && psde->pipe_hw)
  3622. cfg = psde->pipe_hw->cap;
  3623. if (cfg)
  3624. sblk = cfg->sblk;
  3625. if (!sblk)
  3626. return 0;
  3627. /* create overall sub-directory for the pipe */
  3628. psde->debugfs_root =
  3629. debugfs_create_dir(psde->pipe_name,
  3630. plane->dev->primary->debugfs_root);
  3631. if (!psde->debugfs_root)
  3632. return -ENOMEM;
  3633. /* don't error check these */
  3634. debugfs_create_x32("features", 0400,
  3635. psde->debugfs_root, &psde->features);
  3636. if (cfg->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  3637. cfg->features & BIT(SDE_SSPP_SCALER_QSEED3LITE) ||
  3638. cfg->features & BIT(SDE_SSPP_SCALER_QSEED2))
  3639. debugfs_create_bool("default_scaling",
  3640. 0600,
  3641. psde->debugfs_root,
  3642. &psde->debugfs_default_scale);
  3643. if (cfg->features & BIT(SDE_SSPP_TRUE_INLINE_ROT_V1)) {
  3644. debugfs_create_u32("in_rot_max_downscale_rt_num",
  3645. 0600,
  3646. psde->debugfs_root,
  3647. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_num);
  3648. debugfs_create_u32("in_rot_max_downscale_rt_denom",
  3649. 0600,
  3650. psde->debugfs_root,
  3651. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_denom);
  3652. debugfs_create_u32("in_rot_max_downscale_nrt",
  3653. 0600,
  3654. psde->debugfs_root,
  3655. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_nrt);
  3656. debugfs_create_u32("in_rot_max_height",
  3657. 0600,
  3658. psde->debugfs_root,
  3659. (u32 *) &psde->pipe_sblk->in_rot_maxheight);
  3660. }
  3661. debugfs_create_u32("xin_id",
  3662. 0400,
  3663. psde->debugfs_root,
  3664. (u32 *) &cfg->xin_id);
  3665. debugfs_create_x32("creq_vblank",
  3666. 0600,
  3667. psde->debugfs_root,
  3668. (u32 *) &sblk->creq_vblank);
  3669. debugfs_create_x32("danger_vblank",
  3670. 0600,
  3671. psde->debugfs_root,
  3672. (u32 *) &sblk->danger_vblank);
  3673. debugfs_create_file("disable_danger",
  3674. 0600,
  3675. psde->debugfs_root,
  3676. kms, &sde_plane_danger_enable);
  3677. return 0;
  3678. }
  3679. static void _sde_plane_destroy_debugfs(struct drm_plane *plane)
  3680. {
  3681. struct sde_plane *psde;
  3682. if (!plane)
  3683. return;
  3684. psde = to_sde_plane(plane);
  3685. debugfs_remove_recursive(psde->debugfs_root);
  3686. }
  3687. #else
  3688. static int _sde_plane_init_debugfs(struct drm_plane *plane)
  3689. {
  3690. return 0;
  3691. }
  3692. static void _sde_plane_destroy_debugfs(struct drm_plane *plane)
  3693. {
  3694. }
  3695. #endif
  3696. static int sde_plane_late_register(struct drm_plane *plane)
  3697. {
  3698. return _sde_plane_init_debugfs(plane);
  3699. }
  3700. static void sde_plane_early_unregister(struct drm_plane *plane)
  3701. {
  3702. _sde_plane_destroy_debugfs(plane);
  3703. }
  3704. static const struct drm_plane_funcs sde_plane_funcs = {
  3705. .update_plane = drm_atomic_helper_update_plane,
  3706. .disable_plane = drm_atomic_helper_disable_plane,
  3707. .destroy = sde_plane_destroy,
  3708. .atomic_set_property = sde_plane_atomic_set_property,
  3709. .atomic_get_property = sde_plane_atomic_get_property,
  3710. .reset = sde_plane_reset,
  3711. .atomic_duplicate_state = sde_plane_duplicate_state,
  3712. .atomic_destroy_state = sde_plane_destroy_state,
  3713. .late_register = sde_plane_late_register,
  3714. .early_unregister = sde_plane_early_unregister,
  3715. };
  3716. static const struct drm_plane_helper_funcs sde_plane_helper_funcs = {
  3717. .prepare_fb = sde_plane_prepare_fb,
  3718. .cleanup_fb = sde_plane_cleanup_fb,
  3719. .atomic_check = sde_plane_atomic_check,
  3720. .atomic_update = sde_plane_atomic_update,
  3721. };
  3722. enum sde_sspp sde_plane_pipe(struct drm_plane *plane)
  3723. {
  3724. return plane ? to_sde_plane(plane)->pipe : SSPP_NONE;
  3725. }
  3726. bool is_sde_plane_virtual(struct drm_plane *plane)
  3727. {
  3728. return plane ? to_sde_plane(plane)->is_virtual : false;
  3729. }
  3730. /* initialize plane */
  3731. struct drm_plane *sde_plane_init(struct drm_device *dev,
  3732. uint32_t pipe, bool primary_plane,
  3733. unsigned long possible_crtcs, u32 master_plane_id)
  3734. {
  3735. struct drm_plane *plane = NULL, *master_plane = NULL;
  3736. const struct sde_format_extended *format_list;
  3737. struct sde_plane *psde;
  3738. struct msm_drm_private *priv;
  3739. struct sde_kms *kms;
  3740. enum drm_plane_type type;
  3741. int ret = -EINVAL;
  3742. if (!dev) {
  3743. SDE_ERROR("[%u]device is NULL\n", pipe);
  3744. goto exit;
  3745. }
  3746. priv = dev->dev_private;
  3747. if (!priv) {
  3748. SDE_ERROR("[%u]private data is NULL\n", pipe);
  3749. goto exit;
  3750. }
  3751. if (!priv->kms) {
  3752. SDE_ERROR("[%u]invalid KMS reference\n", pipe);
  3753. goto exit;
  3754. }
  3755. kms = to_sde_kms(priv->kms);
  3756. if (!kms->catalog) {
  3757. SDE_ERROR("[%u]invalid catalog reference\n", pipe);
  3758. goto exit;
  3759. }
  3760. /* create and zero local structure */
  3761. psde = kzalloc(sizeof(*psde), GFP_KERNEL);
  3762. if (!psde) {
  3763. SDE_ERROR("[%u]failed to allocate local plane struct\n", pipe);
  3764. ret = -ENOMEM;
  3765. goto exit;
  3766. }
  3767. /* cache local stuff for later */
  3768. plane = &psde->base;
  3769. psde->pipe = pipe;
  3770. psde->is_virtual = (master_plane_id != 0);
  3771. INIT_LIST_HEAD(&psde->mplane_list);
  3772. master_plane = drm_plane_find(dev, NULL, master_plane_id);
  3773. if (master_plane) {
  3774. struct sde_plane *mpsde = to_sde_plane(master_plane);
  3775. list_add_tail(&psde->mplane_list, &mpsde->mplane_list);
  3776. }
  3777. /* initialize underlying h/w driver */
  3778. psde->pipe_hw = sde_hw_sspp_init(pipe, kms->mmio, kms->catalog,
  3779. master_plane_id != 0);
  3780. if (IS_ERR(psde->pipe_hw)) {
  3781. SDE_ERROR("[%u]SSPP init failed\n", pipe);
  3782. ret = PTR_ERR(psde->pipe_hw);
  3783. goto clean_plane;
  3784. } else if (!psde->pipe_hw->cap || !psde->pipe_hw->cap->sblk) {
  3785. SDE_ERROR("[%u]SSPP init returned invalid cfg\n", pipe);
  3786. goto clean_sspp;
  3787. }
  3788. /* cache features mask for later */
  3789. psde->features = psde->pipe_hw->cap->features;
  3790. psde->perf_features = psde->pipe_hw->cap->perf_features;
  3791. psde->pipe_sblk = psde->pipe_hw->cap->sblk;
  3792. if (!psde->pipe_sblk) {
  3793. SDE_ERROR("[%u]invalid sblk\n", pipe);
  3794. goto clean_sspp;
  3795. }
  3796. if (!master_plane_id)
  3797. format_list = psde->pipe_sblk->format_list;
  3798. else
  3799. format_list = psde->pipe_sblk->virt_format_list;
  3800. psde->nformats = sde_populate_formats(format_list,
  3801. psde->formats,
  3802. 0,
  3803. ARRAY_SIZE(psde->formats));
  3804. if (!psde->nformats) {
  3805. SDE_ERROR("[%u]no valid formats for plane\n", pipe);
  3806. goto clean_sspp;
  3807. }
  3808. if (psde->features & BIT(SDE_SSPP_CURSOR))
  3809. type = DRM_PLANE_TYPE_CURSOR;
  3810. else if (primary_plane)
  3811. type = DRM_PLANE_TYPE_PRIMARY;
  3812. else
  3813. type = DRM_PLANE_TYPE_OVERLAY;
  3814. ret = drm_universal_plane_init(dev, plane, 0xff, &sde_plane_funcs,
  3815. psde->formats, psde->nformats,
  3816. NULL, type, NULL);
  3817. if (ret)
  3818. goto clean_sspp;
  3819. /* Populate static array of plane property flags */
  3820. _sde_plane_map_prop_to_dirty_bits();
  3821. /* success! finalize initialization */
  3822. drm_plane_helper_add(plane, &sde_plane_helper_funcs);
  3823. msm_property_init(&psde->property_info, &plane->base, dev,
  3824. priv->plane_property, psde->property_data,
  3825. PLANE_PROP_COUNT, PLANE_PROP_BLOBCOUNT,
  3826. sizeof(struct sde_plane_state));
  3827. _sde_plane_install_properties(plane, kms->catalog, master_plane_id);
  3828. /* save user friendly pipe name for later */
  3829. snprintf(psde->pipe_name, SDE_NAME_SIZE, "plane%u", plane->base.id);
  3830. mutex_init(&psde->lock);
  3831. SDE_DEBUG("%s created for pipe:%u id:%u virtual:%u\n", psde->pipe_name,
  3832. pipe, plane->base.id, master_plane_id);
  3833. return plane;
  3834. clean_sspp:
  3835. if (psde && psde->pipe_hw)
  3836. sde_hw_sspp_destroy(psde->pipe_hw);
  3837. clean_plane:
  3838. kfree(psde);
  3839. exit:
  3840. return ERR_PTR(ret);
  3841. }