qmi.c 102 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  39. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  40. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  41. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  43. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  44. #define DMS_QMI_MAX_MSG_LEN SZ_256
  45. #define MAX_SHADOW_REG_RESERVED 2
  46. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  47. MAX_SHADOW_REG_RESERVED)
  48. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  49. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  50. #ifdef CONFIG_CNSS2_DEBUG
  51. static bool ignore_qmi_failure;
  52. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  53. void cnss_ignore_qmi_failure(bool ignore)
  54. {
  55. ignore_qmi_failure = ignore;
  56. }
  57. #else
  58. #define CNSS_QMI_ASSERT() do { } while (0)
  59. void cnss_ignore_qmi_failure(bool ignore) { }
  60. #endif
  61. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  62. {
  63. switch (mode) {
  64. case CNSS_MISSION:
  65. return "MISSION";
  66. case CNSS_FTM:
  67. return "FTM";
  68. case CNSS_EPPING:
  69. return "EPPING";
  70. case CNSS_WALTEST:
  71. return "WALTEST";
  72. case CNSS_OFF:
  73. return "OFF";
  74. case CNSS_CCPM:
  75. return "CCPM";
  76. case CNSS_QVIT:
  77. return "QVIT";
  78. case CNSS_CALIBRATION:
  79. return "CALIBRATION";
  80. default:
  81. return "UNKNOWN";
  82. }
  83. }
  84. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  85. struct qmi_elem_info *req_ei,
  86. struct qmi_elem_info *rsp_ei,
  87. int req_id, size_t req_len,
  88. unsigned long timeout)
  89. {
  90. struct qmi_txn txn;
  91. int ret;
  92. char *err_msg;
  93. struct qmi_response_type_v01 *resp = rsp;
  94. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  95. if (ret < 0) {
  96. err_msg = "Qmi fail: fail to init txn,";
  97. goto out;
  98. }
  99. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  100. req_len, req_ei, req);
  101. if (ret < 0) {
  102. qmi_txn_cancel(&txn);
  103. err_msg = "Qmi fail: fail to send req,";
  104. goto out;
  105. }
  106. ret = qmi_txn_wait(&txn, timeout);
  107. if (ret < 0) {
  108. err_msg = "Qmi fail: wait timeout,";
  109. goto out;
  110. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  111. err_msg = "Qmi fail: request rejected,";
  112. cnss_pr_err("Qmi fail: respons with error:%d\n",
  113. resp->error);
  114. ret = -resp->result;
  115. goto out;
  116. }
  117. cnss_pr_dbg("req %x success\n", req_id);
  118. return 0;
  119. out:
  120. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  121. return ret;
  122. }
  123. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  124. {
  125. struct wlfw_ind_register_req_msg_v01 *req;
  126. struct wlfw_ind_register_resp_msg_v01 *resp;
  127. struct qmi_txn txn;
  128. int ret = 0;
  129. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  130. plat_priv->driver_state);
  131. req = kzalloc(sizeof(*req), GFP_KERNEL);
  132. if (!req)
  133. return -ENOMEM;
  134. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  135. if (!resp) {
  136. kfree(req);
  137. return -ENOMEM;
  138. }
  139. req->client_id_valid = 1;
  140. req->client_id = WLFW_CLIENT_ID;
  141. req->request_mem_enable_valid = 1;
  142. req->request_mem_enable = 1;
  143. req->fw_mem_ready_enable_valid = 1;
  144. req->fw_mem_ready_enable = 1;
  145. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  146. req->fw_init_done_enable_valid = 1;
  147. req->fw_init_done_enable = 1;
  148. req->pin_connect_result_enable_valid = 1;
  149. req->pin_connect_result_enable = 1;
  150. req->cal_done_enable_valid = 1;
  151. req->cal_done_enable = 1;
  152. req->qdss_trace_req_mem_enable_valid = 1;
  153. req->qdss_trace_req_mem_enable = 1;
  154. req->qdss_trace_save_enable_valid = 1;
  155. req->qdss_trace_save_enable = 1;
  156. req->qdss_trace_free_enable_valid = 1;
  157. req->qdss_trace_free_enable = 1;
  158. req->respond_get_info_enable_valid = 1;
  159. req->respond_get_info_enable = 1;
  160. req->wfc_call_twt_config_enable_valid = 1;
  161. req->wfc_call_twt_config_enable = 1;
  162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  163. wlfw_ind_register_resp_msg_v01_ei, resp);
  164. if (ret < 0) {
  165. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  166. ret);
  167. goto out;
  168. }
  169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  170. QMI_WLFW_IND_REGISTER_REQ_V01,
  171. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  172. wlfw_ind_register_req_msg_v01_ei, req);
  173. if (ret < 0) {
  174. qmi_txn_cancel(&txn);
  175. cnss_pr_err("Failed to send indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  180. if (ret < 0) {
  181. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  182. ret);
  183. goto out;
  184. }
  185. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  186. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  187. resp->resp.result, resp->resp.error);
  188. ret = -resp->resp.result;
  189. goto out;
  190. }
  191. if (resp->fw_status_valid) {
  192. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  193. ret = -EALREADY;
  194. goto qmi_registered;
  195. }
  196. }
  197. kfree(req);
  198. kfree(resp);
  199. return 0;
  200. out:
  201. CNSS_QMI_ASSERT();
  202. qmi_registered:
  203. kfree(req);
  204. kfree(resp);
  205. return ret;
  206. }
  207. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  208. struct wlfw_host_cap_req_msg_v01 *req)
  209. {
  210. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  211. plat_priv->device_id == MANGO_DEVICE_ID ||
  212. plat_priv->device_id == PEACH_DEVICE_ID) {
  213. req->mlo_capable_valid = 1;
  214. req->mlo_capable = 1;
  215. req->mlo_chip_id_valid = 1;
  216. req->mlo_chip_id = 0;
  217. req->mlo_group_id_valid = 1;
  218. req->mlo_group_id = 0;
  219. req->max_mlo_peer_valid = 1;
  220. /* Max peer number generally won't change for the same device
  221. * but needs to be synced with host driver.
  222. */
  223. req->max_mlo_peer = 32;
  224. req->mlo_num_chips_valid = 1;
  225. req->mlo_num_chips = 1;
  226. req->mlo_chip_info_valid = 1;
  227. req->mlo_chip_info[0].chip_id = 0;
  228. req->mlo_chip_info[0].num_local_links = 2;
  229. req->mlo_chip_info[0].hw_link_id[0] = 0;
  230. req->mlo_chip_info[0].hw_link_id[1] = 1;
  231. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  232. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  233. }
  234. }
  235. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  236. {
  237. struct wlfw_host_cap_req_msg_v01 *req;
  238. struct wlfw_host_cap_resp_msg_v01 *resp;
  239. struct qmi_txn txn;
  240. int ret = 0;
  241. u64 iova_start = 0, iova_size = 0,
  242. iova_ipa_start = 0, iova_ipa_size = 0;
  243. u64 feature_list = 0;
  244. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  245. plat_priv->driver_state);
  246. req = kzalloc(sizeof(*req), GFP_KERNEL);
  247. if (!req)
  248. return -ENOMEM;
  249. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  250. if (!resp) {
  251. kfree(req);
  252. return -ENOMEM;
  253. }
  254. req->num_clients_valid = 1;
  255. req->num_clients = 1;
  256. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  257. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  258. if (req->wake_msi) {
  259. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  260. req->wake_msi_valid = 1;
  261. }
  262. req->bdf_support_valid = 1;
  263. req->bdf_support = 1;
  264. req->m3_support_valid = 1;
  265. req->m3_support = 1;
  266. req->m3_cache_support_valid = 1;
  267. req->m3_cache_support = 1;
  268. req->cal_done_valid = 1;
  269. req->cal_done = plat_priv->cal_done;
  270. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  271. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  272. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  273. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  274. &iova_ipa_size)) {
  275. req->ddr_range_valid = 1;
  276. req->ddr_range[0].start = iova_start;
  277. req->ddr_range[0].size = iova_size + iova_ipa_size;
  278. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  279. req->ddr_range[0].start, req->ddr_range[0].size);
  280. }
  281. req->host_build_type_valid = 1;
  282. req->host_build_type = cnss_get_host_build_type();
  283. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  284. ret = cnss_get_feature_list(plat_priv, &feature_list);
  285. if (!ret) {
  286. req->feature_list_valid = 1;
  287. req->feature_list = feature_list;
  288. cnss_pr_dbg("Sending feature list 0x%llx\n",
  289. req->feature_list);
  290. }
  291. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  292. wlfw_host_cap_resp_msg_v01_ei, resp);
  293. if (ret < 0) {
  294. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  295. ret);
  296. goto out;
  297. }
  298. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  299. QMI_WLFW_HOST_CAP_REQ_V01,
  300. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  301. wlfw_host_cap_req_msg_v01_ei, req);
  302. if (ret < 0) {
  303. qmi_txn_cancel(&txn);
  304. cnss_pr_err("Failed to send host capability request, err: %d\n",
  305. ret);
  306. goto out;
  307. }
  308. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  309. if (ret < 0) {
  310. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  311. ret);
  312. goto out;
  313. }
  314. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  315. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  316. resp->resp.result, resp->resp.error);
  317. ret = -resp->resp.result;
  318. goto out;
  319. }
  320. kfree(req);
  321. kfree(resp);
  322. return 0;
  323. out:
  324. CNSS_QMI_ASSERT();
  325. kfree(req);
  326. kfree(resp);
  327. return ret;
  328. }
  329. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  330. {
  331. struct wlfw_respond_mem_req_msg_v01 *req;
  332. struct wlfw_respond_mem_resp_msg_v01 *resp;
  333. struct qmi_txn txn;
  334. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  335. int ret = 0, i;
  336. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  337. plat_priv->driver_state);
  338. req = kzalloc(sizeof(*req), GFP_KERNEL);
  339. if (!req)
  340. return -ENOMEM;
  341. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  342. if (!resp) {
  343. kfree(req);
  344. return -ENOMEM;
  345. }
  346. if (plat_priv->fw_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  347. cnss_pr_err("Invalid seg len %u\n", plat_priv->fw_mem_seg_len);
  348. ret = -EINVAL;
  349. goto out;
  350. }
  351. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  352. for (i = 0; i < req->mem_seg_len; i++) {
  353. if (!fw_mem[i].pa || !fw_mem[i].size) {
  354. if (fw_mem[i].type == 0) {
  355. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  356. i);
  357. ret = -EINVAL;
  358. goto out;
  359. }
  360. cnss_pr_err("Memory for FW is not available for type: %u\n",
  361. fw_mem[i].type);
  362. ret = -ENOMEM;
  363. goto out;
  364. }
  365. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  366. fw_mem[i].va, &fw_mem[i].pa,
  367. fw_mem[i].size, fw_mem[i].type);
  368. req->mem_seg[i].addr = fw_mem[i].pa;
  369. req->mem_seg[i].size = fw_mem[i].size;
  370. req->mem_seg[i].type = fw_mem[i].type;
  371. }
  372. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  373. wlfw_respond_mem_resp_msg_v01_ei, resp);
  374. if (ret < 0) {
  375. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  376. ret);
  377. goto out;
  378. }
  379. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  380. QMI_WLFW_RESPOND_MEM_REQ_V01,
  381. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  382. wlfw_respond_mem_req_msg_v01_ei, req);
  383. if (ret < 0) {
  384. qmi_txn_cancel(&txn);
  385. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  386. ret);
  387. goto out;
  388. }
  389. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  390. if (ret < 0) {
  391. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  392. ret);
  393. goto out;
  394. }
  395. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  396. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  397. resp->resp.result, resp->resp.error);
  398. ret = -resp->resp.result;
  399. goto out;
  400. }
  401. kfree(req);
  402. kfree(resp);
  403. return 0;
  404. out:
  405. CNSS_QMI_ASSERT();
  406. kfree(req);
  407. kfree(resp);
  408. return ret;
  409. }
  410. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  411. {
  412. struct wlfw_cap_req_msg_v01 *req;
  413. struct wlfw_cap_resp_msg_v01 *resp;
  414. struct qmi_txn txn;
  415. char *fw_build_timestamp;
  416. int ret = 0, i;
  417. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  418. plat_priv->driver_state);
  419. req = kzalloc(sizeof(*req), GFP_KERNEL);
  420. if (!req)
  421. return -ENOMEM;
  422. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  423. if (!resp) {
  424. kfree(req);
  425. return -ENOMEM;
  426. }
  427. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  428. wlfw_cap_resp_msg_v01_ei, resp);
  429. if (ret < 0) {
  430. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  431. ret);
  432. goto out;
  433. }
  434. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  435. QMI_WLFW_CAP_REQ_V01,
  436. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  437. wlfw_cap_req_msg_v01_ei, req);
  438. if (ret < 0) {
  439. qmi_txn_cancel(&txn);
  440. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  441. ret);
  442. goto out;
  443. }
  444. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  445. if (ret < 0) {
  446. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  447. ret);
  448. goto out;
  449. }
  450. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  451. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  452. resp->resp.result, resp->resp.error);
  453. ret = -resp->resp.result;
  454. goto out;
  455. }
  456. if (resp->chip_info_valid) {
  457. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  458. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  459. }
  460. if (resp->board_info_valid)
  461. plat_priv->board_info.board_id = resp->board_info.board_id;
  462. else
  463. plat_priv->board_info.board_id = 0xFF;
  464. if (resp->soc_info_valid)
  465. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  466. if (resp->fw_version_info_valid) {
  467. plat_priv->fw_version_info.fw_version =
  468. resp->fw_version_info.fw_version;
  469. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  470. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  471. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  472. resp->fw_version_info.fw_build_timestamp,
  473. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  474. }
  475. if (resp->fw_build_id_valid) {
  476. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  477. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  478. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  479. }
  480. /* FW will send aop retention volatage for qca6490 */
  481. if (resp->voltage_mv_valid) {
  482. plat_priv->cpr_info.voltage = resp->voltage_mv;
  483. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  484. plat_priv->cpr_info.voltage);
  485. cnss_update_cpr_info(plat_priv);
  486. }
  487. if (resp->time_freq_hz_valid) {
  488. plat_priv->device_freq_hz = resp->time_freq_hz;
  489. cnss_pr_dbg("Device frequency is %d HZ\n",
  490. plat_priv->device_freq_hz);
  491. }
  492. if (resp->otp_version_valid)
  493. plat_priv->otp_version = resp->otp_version;
  494. if (resp->dev_mem_info_valid) {
  495. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  496. plat_priv->dev_mem_info[i].start =
  497. resp->dev_mem_info[i].start;
  498. plat_priv->dev_mem_info[i].size =
  499. resp->dev_mem_info[i].size;
  500. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  501. i, plat_priv->dev_mem_info[i].start,
  502. plat_priv->dev_mem_info[i].size);
  503. }
  504. }
  505. if (resp->fw_caps_valid) {
  506. plat_priv->fw_pcie_gen_switch =
  507. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  508. plat_priv->fw_caps = resp->fw_caps;
  509. }
  510. if (resp->hang_data_length_valid &&
  511. resp->hang_data_length &&
  512. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  513. plat_priv->hang_event_data_len = resp->hang_data_length;
  514. else
  515. plat_priv->hang_event_data_len = 0;
  516. if (resp->hang_data_addr_offset_valid)
  517. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  518. else
  519. plat_priv->hang_data_addr_offset = 0;
  520. if (resp->hwid_bitmap_valid)
  521. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  522. if (resp->ol_cpr_cfg_valid)
  523. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  524. /* Disable WLAN PDC in AOP firmware for boards which support on chip PMIC
  525. * so AOP will ignore SW_CTRL changes and do not update regulator votes.
  526. **/
  527. for (i = 0; i < plat_priv->on_chip_pmic_devices_count; i++) {
  528. if (plat_priv->board_info.board_id ==
  529. plat_priv->on_chip_pmic_board_ids[i]) {
  530. cnss_pr_dbg("Disabling WLAN PDC for board_id: %02x\n",
  531. plat_priv->board_info.board_id);
  532. ret = cnss_aop_send_msg(plat_priv,
  533. "{class: wlan_pdc, ss: rf, res: pdc, enable: 0}");
  534. if (ret < 0)
  535. cnss_pr_dbg("Failed to Send AOP Msg");
  536. break;
  537. }
  538. }
  539. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  540. plat_priv->chip_info.chip_id,
  541. plat_priv->chip_info.chip_family,
  542. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  543. plat_priv->otp_version);
  544. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  545. plat_priv->fw_version_info.fw_version,
  546. plat_priv->fw_version_info.fw_build_timestamp,
  547. plat_priv->fw_build_id,
  548. plat_priv->hwid_bitmap);
  549. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  550. plat_priv->hang_event_data_len,
  551. plat_priv->hang_data_addr_offset);
  552. kfree(req);
  553. kfree(resp);
  554. return 0;
  555. out:
  556. CNSS_QMI_ASSERT();
  557. kfree(req);
  558. kfree(resp);
  559. return ret;
  560. }
  561. static char *cnss_bdf_type_to_str(enum cnss_bdf_type bdf_type)
  562. {
  563. switch (bdf_type) {
  564. case CNSS_BDF_BIN:
  565. case CNSS_BDF_ELF:
  566. return "BDF";
  567. case CNSS_BDF_REGDB:
  568. return "REGDB";
  569. case CNSS_BDF_HDS:
  570. return "HDS";
  571. default:
  572. return "UNKNOWN";
  573. }
  574. }
  575. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  576. u32 bdf_type, char *filename,
  577. u32 filename_len)
  578. {
  579. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  580. int ret = 0;
  581. switch (bdf_type) {
  582. case CNSS_BDF_ELF:
  583. /* Board ID will be equal or less than 0xFF in GF mask case */
  584. if (plat_priv->board_info.board_id == 0xFF) {
  585. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  586. snprintf(filename_tmp, filename_len,
  587. ELF_BDF_FILE_NAME_GF);
  588. else
  589. snprintf(filename_tmp, filename_len,
  590. ELF_BDF_FILE_NAME);
  591. } else if (plat_priv->board_info.board_id < 0xFF) {
  592. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  593. snprintf(filename_tmp, filename_len,
  594. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  595. plat_priv->board_info.board_id);
  596. else
  597. snprintf(filename_tmp, filename_len,
  598. ELF_BDF_FILE_NAME_PREFIX "%02x",
  599. plat_priv->board_info.board_id);
  600. } else {
  601. snprintf(filename_tmp, filename_len,
  602. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  603. plat_priv->board_info.board_id >> 8 & 0xFF,
  604. plat_priv->board_info.board_id & 0xFF);
  605. }
  606. break;
  607. case CNSS_BDF_BIN:
  608. if (plat_priv->board_info.board_id == 0xFF) {
  609. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  610. snprintf(filename_tmp, filename_len,
  611. BIN_BDF_FILE_NAME_GF);
  612. else
  613. snprintf(filename_tmp, filename_len,
  614. BIN_BDF_FILE_NAME);
  615. } else if (plat_priv->board_info.board_id < 0xFF) {
  616. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  617. snprintf(filename_tmp, filename_len,
  618. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  619. plat_priv->board_info.board_id);
  620. else
  621. snprintf(filename_tmp, filename_len,
  622. BIN_BDF_FILE_NAME_PREFIX "%02x",
  623. plat_priv->board_info.board_id);
  624. } else {
  625. snprintf(filename_tmp, filename_len,
  626. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  627. plat_priv->board_info.board_id >> 8 & 0xFF,
  628. plat_priv->board_info.board_id & 0xFF);
  629. }
  630. break;
  631. case CNSS_BDF_REGDB:
  632. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  633. break;
  634. case CNSS_BDF_HDS:
  635. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  636. break;
  637. default:
  638. cnss_pr_err("Invalid BDF type: %d\n",
  639. plat_priv->ctrl_params.bdf_type);
  640. ret = -EINVAL;
  641. break;
  642. }
  643. if (!ret)
  644. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  645. return ret;
  646. }
  647. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  648. enum wlfw_ini_file_type_v01 file_type)
  649. {
  650. struct wlfw_ini_file_download_req_msg_v01 *req;
  651. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  652. struct qmi_txn txn;
  653. int ret = 0;
  654. const struct firmware *fw;
  655. char filename[INI_FILE_NAME_LEN] = {0};
  656. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  657. const u8 *temp;
  658. unsigned int remaining;
  659. bool backup_supported = false;
  660. req = kzalloc(sizeof(*req), GFP_KERNEL);
  661. if (!req)
  662. return -ENOMEM;
  663. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  664. if (!resp) {
  665. kfree(req);
  666. return -ENOMEM;
  667. }
  668. switch (file_type) {
  669. case WLFW_CONN_ROAM_INI_V01:
  670. snprintf(tmp_filename, sizeof(tmp_filename),
  671. CONN_ROAM_FILE_NAME);
  672. backup_supported = true;
  673. break;
  674. default:
  675. cnss_pr_err("Invalid file type: %u\n", file_type);
  676. ret = -EINVAL;
  677. goto err_req_fw;
  678. }
  679. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  680. /* Fetch the file */
  681. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  682. if (ret) {
  683. if (!backup_supported)
  684. goto err_req_fw;
  685. snprintf(filename, sizeof(filename),
  686. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  687. ret = firmware_request_nowarn(&fw, filename,
  688. &plat_priv->plat_dev->dev);
  689. if (ret)
  690. goto err_req_fw;
  691. }
  692. temp = fw->data;
  693. remaining = fw->size;
  694. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  695. remaining);
  696. while (remaining) {
  697. req->file_type_valid = 1;
  698. req->file_type = file_type;
  699. req->total_size_valid = 1;
  700. req->total_size = remaining;
  701. req->seg_id_valid = 1;
  702. req->data_valid = 1;
  703. req->end_valid = 1;
  704. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  705. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  706. } else {
  707. req->data_len = remaining;
  708. req->end = 1;
  709. }
  710. memcpy(req->data, temp, req->data_len);
  711. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  712. wlfw_ini_file_download_resp_msg_v01_ei,
  713. resp);
  714. if (ret < 0) {
  715. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  716. ret);
  717. goto err;
  718. }
  719. ret = qmi_send_request
  720. (&plat_priv->qmi_wlfw, NULL, &txn,
  721. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  722. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  723. wlfw_ini_file_download_req_msg_v01_ei, req);
  724. if (ret < 0) {
  725. qmi_txn_cancel(&txn);
  726. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  727. ret);
  728. goto err;
  729. }
  730. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  731. if (ret < 0) {
  732. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  733. ret);
  734. goto err;
  735. }
  736. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  737. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  738. resp->resp.result, resp->resp.error);
  739. ret = -resp->resp.result;
  740. goto err;
  741. }
  742. remaining -= req->data_len;
  743. temp += req->data_len;
  744. req->seg_id++;
  745. }
  746. release_firmware(fw);
  747. kfree(req);
  748. kfree(resp);
  749. return 0;
  750. err:
  751. release_firmware(fw);
  752. err_req_fw:
  753. kfree(req);
  754. kfree(resp);
  755. return ret;
  756. }
  757. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  758. u32 bdf_type)
  759. {
  760. struct wlfw_bdf_download_req_msg_v01 *req;
  761. struct wlfw_bdf_download_resp_msg_v01 *resp;
  762. struct qmi_txn txn;
  763. char filename[MAX_FIRMWARE_NAME_LEN];
  764. const struct firmware *fw_entry = NULL;
  765. const u8 *temp;
  766. unsigned int remaining;
  767. int ret = 0;
  768. cnss_pr_dbg("Sending QMI_WLFW_BDF_DOWNLOAD_REQ_V01 message for bdf_type: %d (%s), state: 0x%lx\n",
  769. bdf_type, cnss_bdf_type_to_str(bdf_type), plat_priv->driver_state);
  770. req = kzalloc(sizeof(*req), GFP_KERNEL);
  771. if (!req)
  772. return -ENOMEM;
  773. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  774. if (!resp) {
  775. kfree(req);
  776. return -ENOMEM;
  777. }
  778. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  779. filename, sizeof(filename));
  780. if (ret)
  781. goto err_req_fw;
  782. if (bdf_type == CNSS_BDF_REGDB)
  783. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  784. filename);
  785. else
  786. ret = firmware_request_nowarn(&fw_entry, filename,
  787. &plat_priv->plat_dev->dev);
  788. if (ret) {
  789. cnss_pr_err("Failed to load %s: %s, ret: %d\n",
  790. cnss_bdf_type_to_str(bdf_type), filename, ret);
  791. goto err_req_fw;
  792. }
  793. temp = fw_entry->data;
  794. remaining = fw_entry->size;
  795. cnss_pr_dbg("Downloading %s: %s, size: %u\n",
  796. cnss_bdf_type_to_str(bdf_type), filename, remaining);
  797. while (remaining) {
  798. req->valid = 1;
  799. req->file_id_valid = 1;
  800. req->file_id = plat_priv->board_info.board_id;
  801. req->total_size_valid = 1;
  802. req->total_size = remaining;
  803. req->seg_id_valid = 1;
  804. req->data_valid = 1;
  805. req->end_valid = 1;
  806. req->bdf_type_valid = 1;
  807. req->bdf_type = bdf_type;
  808. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  809. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  810. } else {
  811. req->data_len = remaining;
  812. req->end = 1;
  813. }
  814. memcpy(req->data, temp, req->data_len);
  815. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  816. wlfw_bdf_download_resp_msg_v01_ei, resp);
  817. if (ret < 0) {
  818. cnss_pr_err("Failed to initialize txn for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  819. cnss_bdf_type_to_str(bdf_type), ret);
  820. goto err_send;
  821. }
  822. ret = qmi_send_request
  823. (&plat_priv->qmi_wlfw, NULL, &txn,
  824. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  825. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  826. wlfw_bdf_download_req_msg_v01_ei, req);
  827. if (ret < 0) {
  828. qmi_txn_cancel(&txn);
  829. cnss_pr_err("Failed to send QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  830. cnss_bdf_type_to_str(bdf_type), ret);
  831. goto err_send;
  832. }
  833. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  834. if (ret < 0) {
  835. cnss_pr_err("Timeout while waiting for FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, err: %d\n",
  836. cnss_bdf_type_to_str(bdf_type), ret);
  837. goto err_send;
  838. }
  839. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  840. cnss_pr_err("FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s failed, result: %d, err: %d\n",
  841. cnss_bdf_type_to_str(bdf_type), resp->resp.result,
  842. resp->resp.error);
  843. ret = -resp->resp.result;
  844. goto err_send;
  845. }
  846. remaining -= req->data_len;
  847. temp += req->data_len;
  848. req->seg_id++;
  849. }
  850. release_firmware(fw_entry);
  851. if (resp->host_bdf_data_valid) {
  852. /* QCA6490 enable S3E regulator for IPA configuration only */
  853. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  854. cnss_enable_int_pow_amp_vreg(plat_priv);
  855. plat_priv->cbc_file_download =
  856. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  857. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  858. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  859. plat_priv->cbc_file_download);
  860. }
  861. kfree(req);
  862. kfree(resp);
  863. return 0;
  864. err_send:
  865. release_firmware(fw_entry);
  866. err_req_fw:
  867. if (!(bdf_type == CNSS_BDF_REGDB ||
  868. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  869. ret == -EAGAIN))
  870. CNSS_QMI_ASSERT();
  871. kfree(req);
  872. kfree(resp);
  873. return ret;
  874. }
  875. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  876. {
  877. struct wlfw_m3_info_req_msg_v01 *req;
  878. struct wlfw_m3_info_resp_msg_v01 *resp;
  879. struct qmi_txn txn;
  880. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  881. int ret = 0;
  882. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  883. plat_priv->driver_state);
  884. req = kzalloc(sizeof(*req), GFP_KERNEL);
  885. if (!req)
  886. return -ENOMEM;
  887. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  888. if (!resp) {
  889. kfree(req);
  890. return -ENOMEM;
  891. }
  892. if (!m3_mem->pa || !m3_mem->size) {
  893. cnss_pr_err("Memory for M3 is not available\n");
  894. ret = -ENOMEM;
  895. goto out;
  896. }
  897. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  898. m3_mem->va, &m3_mem->pa, m3_mem->size);
  899. req->addr = plat_priv->m3_mem.pa;
  900. req->size = plat_priv->m3_mem.size;
  901. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  902. wlfw_m3_info_resp_msg_v01_ei, resp);
  903. if (ret < 0) {
  904. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  905. ret);
  906. goto out;
  907. }
  908. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  909. QMI_WLFW_M3_INFO_REQ_V01,
  910. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  911. wlfw_m3_info_req_msg_v01_ei, req);
  912. if (ret < 0) {
  913. qmi_txn_cancel(&txn);
  914. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  915. ret);
  916. goto out;
  917. }
  918. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  919. if (ret < 0) {
  920. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  921. ret);
  922. goto out;
  923. }
  924. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  925. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  926. resp->resp.result, resp->resp.error);
  927. ret = -resp->resp.result;
  928. goto out;
  929. }
  930. kfree(req);
  931. kfree(resp);
  932. return 0;
  933. out:
  934. CNSS_QMI_ASSERT();
  935. kfree(req);
  936. kfree(resp);
  937. return ret;
  938. }
  939. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  940. u8 *mac, u32 mac_len)
  941. {
  942. struct wlfw_mac_addr_req_msg_v01 req;
  943. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  944. struct qmi_txn txn;
  945. int ret;
  946. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  947. return -EINVAL;
  948. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  949. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  950. if (ret < 0) {
  951. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  952. ret);
  953. ret = -EIO;
  954. goto out;
  955. }
  956. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  957. mac, plat_priv->driver_state);
  958. memcpy(req.mac_addr, mac, mac_len);
  959. req.mac_addr_valid = 1;
  960. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  961. QMI_WLFW_MAC_ADDR_REQ_V01,
  962. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  963. wlfw_mac_addr_req_msg_v01_ei, &req);
  964. if (ret < 0) {
  965. qmi_txn_cancel(&txn);
  966. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  967. ret = -EIO;
  968. goto out;
  969. }
  970. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  971. if (ret < 0) {
  972. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  973. ret);
  974. ret = -EIO;
  975. goto out;
  976. }
  977. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  978. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  979. resp.resp.result);
  980. ret = -resp.resp.result;
  981. }
  982. out:
  983. return ret;
  984. }
  985. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  986. u32 total_size)
  987. {
  988. int ret = 0;
  989. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  990. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  991. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  992. unsigned int remaining;
  993. struct qmi_txn txn;
  994. cnss_pr_dbg("%s\n", __func__);
  995. req = kzalloc(sizeof(*req), GFP_KERNEL);
  996. if (!req)
  997. return -ENOMEM;
  998. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  999. if (!resp) {
  1000. kfree(req);
  1001. return -ENOMEM;
  1002. }
  1003. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  1004. if (!p_qdss_trace_data) {
  1005. ret = ENOMEM;
  1006. goto end;
  1007. }
  1008. remaining = total_size;
  1009. p_qdss_trace_data_temp = p_qdss_trace_data;
  1010. while (remaining && resp->end == 0) {
  1011. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1012. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  1013. if (ret < 0) {
  1014. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  1015. ret);
  1016. goto fail;
  1017. }
  1018. ret = qmi_send_request
  1019. (&plat_priv->qmi_wlfw, NULL, &txn,
  1020. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  1021. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  1022. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  1023. if (ret < 0) {
  1024. qmi_txn_cancel(&txn);
  1025. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  1026. ret);
  1027. goto fail;
  1028. }
  1029. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1030. if (ret < 0) {
  1031. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  1032. ret);
  1033. goto fail;
  1034. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1035. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1036. resp->resp.result, resp->resp.error);
  1037. ret = -resp->resp.result;
  1038. goto fail;
  1039. } else {
  1040. ret = 0;
  1041. }
  1042. cnss_pr_dbg("%s: response total size %d data len %d",
  1043. __func__, resp->total_size, resp->data_len);
  1044. if ((resp->total_size_valid == 1 &&
  1045. resp->total_size == total_size) &&
  1046. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1047. (resp->data_valid == 1 &&
  1048. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01) &&
  1049. resp->data_len <= remaining) {
  1050. memcpy(p_qdss_trace_data_temp,
  1051. resp->data, resp->data_len);
  1052. } else {
  1053. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1054. __func__,
  1055. total_size, req->seg_id,
  1056. resp->total_size_valid,
  1057. resp->total_size,
  1058. resp->seg_id_valid,
  1059. resp->seg_id,
  1060. resp->data_valid,
  1061. resp->data_len);
  1062. ret = -1;
  1063. goto fail;
  1064. }
  1065. remaining -= resp->data_len;
  1066. p_qdss_trace_data_temp += resp->data_len;
  1067. req->seg_id++;
  1068. }
  1069. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1070. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1071. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1072. total_size);
  1073. if (ret < 0) {
  1074. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1075. ret);
  1076. ret = -1;
  1077. goto fail;
  1078. }
  1079. } else {
  1080. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1081. __func__,
  1082. remaining, resp->end_valid, resp->end);
  1083. ret = -1;
  1084. goto fail;
  1085. }
  1086. fail:
  1087. kfree(p_qdss_trace_data);
  1088. end:
  1089. kfree(req);
  1090. kfree(resp);
  1091. return ret;
  1092. }
  1093. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1094. char *filename, u32 filename_len)
  1095. {
  1096. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1097. char *debug_str = QDSS_DEBUG_FILE_STR;
  1098. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1099. plat_priv->device_id == MANGO_DEVICE_ID ||
  1100. plat_priv->device_id == PEACH_DEVICE_ID)
  1101. debug_str = "";
  1102. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1103. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1104. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1105. else
  1106. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1107. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1108. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1109. }
  1110. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1111. {
  1112. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1113. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1114. struct qmi_txn txn;
  1115. const struct firmware *fw_entry = NULL;
  1116. const u8 *temp;
  1117. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1118. unsigned int remaining;
  1119. int ret = 0;
  1120. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1121. plat_priv->driver_state);
  1122. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1123. if (!req)
  1124. return -ENOMEM;
  1125. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1126. if (!resp) {
  1127. kfree(req);
  1128. return -ENOMEM;
  1129. }
  1130. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1131. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1132. qdss_cfg_filename);
  1133. if (ret) {
  1134. cnss_pr_dbg("Unable to load %s\n",
  1135. qdss_cfg_filename);
  1136. goto err_req_fw;
  1137. }
  1138. temp = fw_entry->data;
  1139. remaining = fw_entry->size;
  1140. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1141. qdss_cfg_filename, remaining);
  1142. while (remaining) {
  1143. req->total_size_valid = 1;
  1144. req->total_size = remaining;
  1145. req->seg_id_valid = 1;
  1146. req->data_valid = 1;
  1147. req->end_valid = 1;
  1148. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1149. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1150. } else {
  1151. req->data_len = remaining;
  1152. req->end = 1;
  1153. }
  1154. memcpy(req->data, temp, req->data_len);
  1155. ret = qmi_txn_init
  1156. (&plat_priv->qmi_wlfw, &txn,
  1157. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1158. resp);
  1159. if (ret < 0) {
  1160. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1161. ret);
  1162. goto err_send;
  1163. }
  1164. ret = qmi_send_request
  1165. (&plat_priv->qmi_wlfw, NULL, &txn,
  1166. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1167. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1168. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1169. if (ret < 0) {
  1170. qmi_txn_cancel(&txn);
  1171. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1172. ret);
  1173. goto err_send;
  1174. }
  1175. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1176. if (ret < 0) {
  1177. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1178. ret);
  1179. goto err_send;
  1180. }
  1181. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1182. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1183. resp->resp.result, resp->resp.error);
  1184. ret = -resp->resp.result;
  1185. goto err_send;
  1186. }
  1187. remaining -= req->data_len;
  1188. temp += req->data_len;
  1189. req->seg_id++;
  1190. }
  1191. release_firmware(fw_entry);
  1192. kfree(req);
  1193. kfree(resp);
  1194. return 0;
  1195. err_send:
  1196. release_firmware(fw_entry);
  1197. err_req_fw:
  1198. kfree(req);
  1199. kfree(resp);
  1200. return ret;
  1201. }
  1202. static int wlfw_send_qdss_trace_mode_req
  1203. (struct cnss_plat_data *plat_priv,
  1204. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1205. unsigned long long option)
  1206. {
  1207. int rc = 0;
  1208. int tmp = 0;
  1209. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1210. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1211. struct qmi_txn txn;
  1212. if (!plat_priv)
  1213. return -ENODEV;
  1214. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1215. if (!req)
  1216. return -ENOMEM;
  1217. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1218. if (!resp) {
  1219. kfree(req);
  1220. return -ENOMEM;
  1221. }
  1222. req->mode_valid = 1;
  1223. req->mode = mode;
  1224. req->option_valid = 1;
  1225. req->option = option;
  1226. tmp = plat_priv->hw_trc_override;
  1227. req->hw_trc_disable_override_valid = 1;
  1228. req->hw_trc_disable_override =
  1229. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1230. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1231. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1232. __func__, mode, option, req->hw_trc_disable_override);
  1233. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1234. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1235. if (rc < 0) {
  1236. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1237. rc);
  1238. goto out;
  1239. }
  1240. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1241. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1242. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1243. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1244. if (rc < 0) {
  1245. qmi_txn_cancel(&txn);
  1246. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1247. goto out;
  1248. }
  1249. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1250. if (rc < 0) {
  1251. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1252. rc);
  1253. goto out;
  1254. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1255. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1256. resp->resp.result, resp->resp.error);
  1257. rc = -resp->resp.result;
  1258. goto out;
  1259. }
  1260. kfree(resp);
  1261. kfree(req);
  1262. return rc;
  1263. out:
  1264. kfree(resp);
  1265. kfree(req);
  1266. CNSS_QMI_ASSERT();
  1267. return rc;
  1268. }
  1269. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1270. {
  1271. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1272. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1273. }
  1274. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1275. {
  1276. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1277. option);
  1278. }
  1279. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1280. enum cnss_driver_mode mode)
  1281. {
  1282. struct wlfw_wlan_mode_req_msg_v01 *req;
  1283. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1284. struct qmi_txn txn;
  1285. int ret = 0;
  1286. if (!plat_priv)
  1287. return -ENODEV;
  1288. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1289. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1290. if (mode == CNSS_OFF &&
  1291. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1292. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1293. return 0;
  1294. }
  1295. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1296. if (!req)
  1297. return -ENOMEM;
  1298. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1299. if (!resp) {
  1300. kfree(req);
  1301. return -ENOMEM;
  1302. }
  1303. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1304. req->hw_debug_valid = 1;
  1305. req->hw_debug = 0;
  1306. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1307. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1308. if (ret < 0) {
  1309. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1310. cnss_qmi_mode_to_str(mode), mode, ret);
  1311. goto out;
  1312. }
  1313. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1314. QMI_WLFW_WLAN_MODE_REQ_V01,
  1315. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1316. wlfw_wlan_mode_req_msg_v01_ei, req);
  1317. if (ret < 0) {
  1318. qmi_txn_cancel(&txn);
  1319. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1320. cnss_qmi_mode_to_str(mode), mode, ret);
  1321. goto out;
  1322. }
  1323. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1324. if (ret < 0) {
  1325. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1326. cnss_qmi_mode_to_str(mode), mode, ret);
  1327. goto out;
  1328. }
  1329. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1330. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1331. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1332. resp->resp.error);
  1333. ret = -resp->resp.result;
  1334. goto out;
  1335. }
  1336. kfree(req);
  1337. kfree(resp);
  1338. return 0;
  1339. out:
  1340. if (mode == CNSS_OFF) {
  1341. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1342. ret = 0;
  1343. } else {
  1344. CNSS_QMI_ASSERT();
  1345. }
  1346. kfree(req);
  1347. kfree(resp);
  1348. return ret;
  1349. }
  1350. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1351. struct cnss_wlan_enable_cfg *config,
  1352. const char *host_version)
  1353. {
  1354. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1355. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1356. struct qmi_txn txn;
  1357. u32 i;
  1358. int ret = 0;
  1359. if (!plat_priv)
  1360. return -ENODEV;
  1361. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1362. plat_priv->driver_state);
  1363. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1364. if (!req)
  1365. return -ENOMEM;
  1366. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1367. if (!resp) {
  1368. kfree(req);
  1369. return -ENOMEM;
  1370. }
  1371. req->host_version_valid = 1;
  1372. strlcpy(req->host_version, host_version,
  1373. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1374. req->tgt_cfg_valid = 1;
  1375. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1376. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1377. else
  1378. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1379. for (i = 0; i < req->tgt_cfg_len; i++) {
  1380. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1381. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1382. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1383. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1384. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1385. }
  1386. req->svc_cfg_valid = 1;
  1387. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1388. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1389. else
  1390. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1391. for (i = 0; i < req->svc_cfg_len; i++) {
  1392. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1393. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1394. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1395. }
  1396. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1397. plat_priv->device_id != MANGO_DEVICE_ID &&
  1398. plat_priv->device_id != PEACH_DEVICE_ID) {
  1399. req->shadow_reg_v2_valid = 1;
  1400. if (config->num_shadow_reg_v2_cfg >
  1401. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1402. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1403. else
  1404. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1405. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1406. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1407. * req->shadow_reg_v2_len);
  1408. } else {
  1409. req->shadow_reg_v3_valid = 1;
  1410. if (config->num_shadow_reg_v3_cfg >
  1411. MAX_NUM_SHADOW_REG_V3)
  1412. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1413. else
  1414. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1415. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1416. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1417. plat_priv->num_shadow_regs_v3);
  1418. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1419. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1420. * req->shadow_reg_v3_len);
  1421. }
  1422. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1423. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1424. if (ret < 0) {
  1425. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1426. ret);
  1427. goto out;
  1428. }
  1429. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1430. QMI_WLFW_WLAN_CFG_REQ_V01,
  1431. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1432. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1433. if (ret < 0) {
  1434. qmi_txn_cancel(&txn);
  1435. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1436. ret);
  1437. goto out;
  1438. }
  1439. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1440. if (ret < 0) {
  1441. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1442. ret);
  1443. goto out;
  1444. }
  1445. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1446. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1447. resp->resp.result, resp->resp.error);
  1448. ret = -resp->resp.result;
  1449. goto out;
  1450. }
  1451. kfree(req);
  1452. kfree(resp);
  1453. return 0;
  1454. out:
  1455. CNSS_QMI_ASSERT();
  1456. kfree(req);
  1457. kfree(resp);
  1458. return ret;
  1459. }
  1460. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1461. u32 offset, u32 mem_type,
  1462. u32 data_len, u8 *data)
  1463. {
  1464. struct wlfw_athdiag_read_req_msg_v01 *req;
  1465. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1466. struct qmi_txn txn;
  1467. int ret = 0;
  1468. if (!plat_priv)
  1469. return -ENODEV;
  1470. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1471. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1472. data, data_len);
  1473. return -EINVAL;
  1474. }
  1475. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1476. plat_priv->driver_state, offset, mem_type, data_len);
  1477. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1478. if (!req)
  1479. return -ENOMEM;
  1480. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1481. if (!resp) {
  1482. kfree(req);
  1483. return -ENOMEM;
  1484. }
  1485. req->offset = offset;
  1486. req->mem_type = mem_type;
  1487. req->data_len = data_len;
  1488. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1489. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1490. if (ret < 0) {
  1491. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1492. ret);
  1493. goto out;
  1494. }
  1495. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1496. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1497. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1498. wlfw_athdiag_read_req_msg_v01_ei, req);
  1499. if (ret < 0) {
  1500. qmi_txn_cancel(&txn);
  1501. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1502. ret);
  1503. goto out;
  1504. }
  1505. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1506. if (ret < 0) {
  1507. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1508. ret);
  1509. goto out;
  1510. }
  1511. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1512. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1513. resp->resp.result, resp->resp.error);
  1514. ret = -resp->resp.result;
  1515. goto out;
  1516. }
  1517. if (!resp->data_valid || resp->data_len != data_len) {
  1518. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1519. resp->data_valid, resp->data_len);
  1520. ret = -EINVAL;
  1521. goto out;
  1522. }
  1523. memcpy(data, resp->data, resp->data_len);
  1524. kfree(req);
  1525. kfree(resp);
  1526. return 0;
  1527. out:
  1528. kfree(req);
  1529. kfree(resp);
  1530. return ret;
  1531. }
  1532. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1533. u32 offset, u32 mem_type,
  1534. u32 data_len, u8 *data)
  1535. {
  1536. struct wlfw_athdiag_write_req_msg_v01 *req;
  1537. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1538. struct qmi_txn txn;
  1539. int ret = 0;
  1540. if (!plat_priv)
  1541. return -ENODEV;
  1542. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1543. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1544. data, data_len);
  1545. return -EINVAL;
  1546. }
  1547. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1548. plat_priv->driver_state, offset, mem_type, data_len, data);
  1549. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1550. if (!req)
  1551. return -ENOMEM;
  1552. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1553. if (!resp) {
  1554. kfree(req);
  1555. return -ENOMEM;
  1556. }
  1557. req->offset = offset;
  1558. req->mem_type = mem_type;
  1559. req->data_len = data_len;
  1560. memcpy(req->data, data, data_len);
  1561. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1562. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1563. if (ret < 0) {
  1564. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1565. ret);
  1566. goto out;
  1567. }
  1568. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1569. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1570. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1571. wlfw_athdiag_write_req_msg_v01_ei, req);
  1572. if (ret < 0) {
  1573. qmi_txn_cancel(&txn);
  1574. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1575. ret);
  1576. goto out;
  1577. }
  1578. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1579. if (ret < 0) {
  1580. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1581. ret);
  1582. goto out;
  1583. }
  1584. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1585. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1586. resp->resp.result, resp->resp.error);
  1587. ret = -resp->resp.result;
  1588. goto out;
  1589. }
  1590. kfree(req);
  1591. kfree(resp);
  1592. return 0;
  1593. out:
  1594. kfree(req);
  1595. kfree(resp);
  1596. return ret;
  1597. }
  1598. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1599. u8 fw_log_mode)
  1600. {
  1601. struct wlfw_ini_req_msg_v01 *req;
  1602. struct wlfw_ini_resp_msg_v01 *resp;
  1603. struct qmi_txn txn;
  1604. int ret = 0;
  1605. if (!plat_priv)
  1606. return -ENODEV;
  1607. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1608. plat_priv->driver_state, fw_log_mode);
  1609. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1610. if (!req)
  1611. return -ENOMEM;
  1612. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1613. if (!resp) {
  1614. kfree(req);
  1615. return -ENOMEM;
  1616. }
  1617. req->enablefwlog_valid = 1;
  1618. req->enablefwlog = fw_log_mode;
  1619. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1620. wlfw_ini_resp_msg_v01_ei, resp);
  1621. if (ret < 0) {
  1622. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1623. fw_log_mode, ret);
  1624. goto out;
  1625. }
  1626. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1627. QMI_WLFW_INI_REQ_V01,
  1628. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1629. wlfw_ini_req_msg_v01_ei, req);
  1630. if (ret < 0) {
  1631. qmi_txn_cancel(&txn);
  1632. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1633. fw_log_mode, ret);
  1634. goto out;
  1635. }
  1636. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1637. if (ret < 0) {
  1638. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1639. fw_log_mode, ret);
  1640. goto out;
  1641. }
  1642. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1643. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1644. fw_log_mode, resp->resp.result, resp->resp.error);
  1645. ret = -resp->resp.result;
  1646. goto out;
  1647. }
  1648. kfree(req);
  1649. kfree(resp);
  1650. return 0;
  1651. out:
  1652. kfree(req);
  1653. kfree(resp);
  1654. return ret;
  1655. }
  1656. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1657. {
  1658. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1659. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1660. struct qmi_txn txn;
  1661. int ret = 0;
  1662. if (!plat_priv)
  1663. return -ENODEV;
  1664. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1665. !plat_priv->fw_pcie_gen_switch) {
  1666. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1667. return 0;
  1668. }
  1669. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1670. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1671. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1672. plat_priv->pcie_gen_speed;
  1673. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1674. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1675. if (ret < 0) {
  1676. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1677. ret);
  1678. goto out;
  1679. }
  1680. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1681. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1682. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1683. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1684. if (ret < 0) {
  1685. qmi_txn_cancel(&txn);
  1686. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1687. goto out;
  1688. }
  1689. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1690. if (ret < 0) {
  1691. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1692. ret);
  1693. goto out;
  1694. }
  1695. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1696. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1697. plat_priv->pcie_gen_speed, resp.resp.result,
  1698. resp.resp.error);
  1699. ret = -resp.resp.result;
  1700. }
  1701. out:
  1702. /* Reset PCIE Gen speed after one time use */
  1703. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1704. return ret;
  1705. }
  1706. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1707. {
  1708. struct wlfw_antenna_switch_req_msg_v01 *req;
  1709. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1710. struct qmi_txn txn;
  1711. int ret = 0;
  1712. if (!plat_priv)
  1713. return -ENODEV;
  1714. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1715. plat_priv->driver_state);
  1716. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1717. if (!req)
  1718. return -ENOMEM;
  1719. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1720. if (!resp) {
  1721. kfree(req);
  1722. return -ENOMEM;
  1723. }
  1724. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1725. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1726. if (ret < 0) {
  1727. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1728. ret);
  1729. goto out;
  1730. }
  1731. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1732. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1733. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1734. wlfw_antenna_switch_req_msg_v01_ei, req);
  1735. if (ret < 0) {
  1736. qmi_txn_cancel(&txn);
  1737. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1738. ret);
  1739. goto out;
  1740. }
  1741. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1742. if (ret < 0) {
  1743. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1744. ret);
  1745. goto out;
  1746. }
  1747. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1748. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1749. resp->resp.result, resp->resp.error);
  1750. ret = -resp->resp.result;
  1751. goto out;
  1752. }
  1753. if (resp->antenna_valid)
  1754. plat_priv->antenna = resp->antenna;
  1755. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1756. resp->antenna_valid, resp->antenna);
  1757. kfree(req);
  1758. kfree(resp);
  1759. return 0;
  1760. out:
  1761. kfree(req);
  1762. kfree(resp);
  1763. return ret;
  1764. }
  1765. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1766. {
  1767. struct wlfw_antenna_grant_req_msg_v01 *req;
  1768. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1769. struct qmi_txn txn;
  1770. int ret = 0;
  1771. if (!plat_priv)
  1772. return -ENODEV;
  1773. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1774. plat_priv->driver_state, plat_priv->grant);
  1775. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1776. if (!req)
  1777. return -ENOMEM;
  1778. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1779. if (!resp) {
  1780. kfree(req);
  1781. return -ENOMEM;
  1782. }
  1783. req->grant_valid = 1;
  1784. req->grant = plat_priv->grant;
  1785. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1786. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1787. if (ret < 0) {
  1788. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1789. ret);
  1790. goto out;
  1791. }
  1792. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1793. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1794. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1795. wlfw_antenna_grant_req_msg_v01_ei, req);
  1796. if (ret < 0) {
  1797. qmi_txn_cancel(&txn);
  1798. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1799. ret);
  1800. goto out;
  1801. }
  1802. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1803. if (ret < 0) {
  1804. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1805. ret);
  1806. goto out;
  1807. }
  1808. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1809. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1810. resp->resp.result, resp->resp.error);
  1811. ret = -resp->resp.result;
  1812. goto out;
  1813. }
  1814. kfree(req);
  1815. kfree(resp);
  1816. return 0;
  1817. out:
  1818. kfree(req);
  1819. kfree(resp);
  1820. return ret;
  1821. }
  1822. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1823. {
  1824. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1825. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1826. struct qmi_txn txn;
  1827. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1828. int ret = 0;
  1829. int i;
  1830. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1831. plat_priv->driver_state);
  1832. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1833. if (!req)
  1834. return -ENOMEM;
  1835. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1836. if (!resp) {
  1837. kfree(req);
  1838. return -ENOMEM;
  1839. }
  1840. if (plat_priv->qdss_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  1841. cnss_pr_err("Invalid seg len %u\n", plat_priv->qdss_mem_seg_len);
  1842. ret = -EINVAL;
  1843. goto out;
  1844. }
  1845. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1846. for (i = 0; i < req->mem_seg_len; i++) {
  1847. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1848. qdss_mem[i].va, &qdss_mem[i].pa,
  1849. qdss_mem[i].size, qdss_mem[i].type);
  1850. req->mem_seg[i].addr = qdss_mem[i].pa;
  1851. req->mem_seg[i].size = qdss_mem[i].size;
  1852. req->mem_seg[i].type = qdss_mem[i].type;
  1853. }
  1854. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1855. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1856. if (ret < 0) {
  1857. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1858. ret);
  1859. goto out;
  1860. }
  1861. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1862. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1863. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1864. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1865. if (ret < 0) {
  1866. qmi_txn_cancel(&txn);
  1867. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1868. ret);
  1869. goto out;
  1870. }
  1871. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1872. if (ret < 0) {
  1873. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1874. ret);
  1875. goto out;
  1876. }
  1877. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1878. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1879. resp->resp.result, resp->resp.error);
  1880. ret = -resp->resp.result;
  1881. goto out;
  1882. }
  1883. kfree(req);
  1884. kfree(resp);
  1885. return 0;
  1886. out:
  1887. kfree(req);
  1888. kfree(resp);
  1889. return ret;
  1890. }
  1891. int cnss_wlfw_send_host_wfc_call_status(struct cnss_plat_data *plat_priv,
  1892. struct cnss_wfc_cfg cfg)
  1893. {
  1894. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1895. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1896. struct qmi_txn txn;
  1897. int ret = 0;
  1898. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1899. cnss_pr_err("Drop host WFC indication as FW not initialized\n");
  1900. return -EINVAL;
  1901. }
  1902. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1903. if (!req)
  1904. return -ENOMEM;
  1905. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1906. if (!resp) {
  1907. kfree(req);
  1908. return -ENOMEM;
  1909. }
  1910. req->wfc_call_active_valid = 1;
  1911. req->wfc_call_active = cfg.mode;
  1912. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1913. plat_priv->driver_state);
  1914. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1915. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1916. if (ret < 0) {
  1917. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1918. ret);
  1919. goto out;
  1920. }
  1921. cnss_pr_dbg("Send WFC Mode: %d\n", cfg.mode);
  1922. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1923. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1924. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1925. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1926. if (ret < 0) {
  1927. qmi_txn_cancel(&txn);
  1928. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1929. ret);
  1930. goto out;
  1931. }
  1932. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1933. if (ret < 0) {
  1934. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1935. ret);
  1936. goto out;
  1937. }
  1938. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1939. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1940. resp->resp.result, resp->resp.error);
  1941. ret = -EINVAL;
  1942. goto out;
  1943. }
  1944. ret = 0;
  1945. out:
  1946. kfree(req);
  1947. kfree(resp);
  1948. return ret;
  1949. }
  1950. static int cnss_wlfw_wfc_call_status_send_sync
  1951. (struct cnss_plat_data *plat_priv,
  1952. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1953. {
  1954. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1955. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1956. struct qmi_txn txn;
  1957. int ret = 0;
  1958. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1959. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1960. return -EINVAL;
  1961. }
  1962. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1963. if (!req)
  1964. return -ENOMEM;
  1965. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1966. if (!resp) {
  1967. kfree(req);
  1968. return -ENOMEM;
  1969. }
  1970. /**
  1971. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1972. * But in r2 update QMI structure is expanded and as an effect qmi
  1973. * decoded structures have padding. Thus we cannot use buffer design.
  1974. * For backward compatibility for r1 design copy only wfc_call_active
  1975. * value in hex buffer.
  1976. */
  1977. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1978. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1979. /* wfc_call_active is mandatory in IMS indication */
  1980. req->wfc_call_active_valid = 1;
  1981. req->wfc_call_active = ind_msg->wfc_call_active;
  1982. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1983. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1984. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1985. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1986. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1987. req->twt_ims_start = ind_msg->twt_ims_start;
  1988. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1989. req->twt_ims_int = ind_msg->twt_ims_int;
  1990. req->media_quality_valid = ind_msg->media_quality_valid;
  1991. req->media_quality =
  1992. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1993. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1994. plat_priv->driver_state);
  1995. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1996. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1997. if (ret < 0) {
  1998. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1999. ret);
  2000. goto out;
  2001. }
  2002. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2003. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  2004. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  2005. wlfw_wfc_call_status_req_msg_v01_ei, req);
  2006. if (ret < 0) {
  2007. qmi_txn_cancel(&txn);
  2008. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  2009. ret);
  2010. goto out;
  2011. }
  2012. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2013. if (ret < 0) {
  2014. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  2015. ret);
  2016. goto out;
  2017. }
  2018. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2019. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  2020. resp->resp.result, resp->resp.error);
  2021. ret = -resp->resp.result;
  2022. goto out;
  2023. }
  2024. ret = 0;
  2025. out:
  2026. kfree(req);
  2027. kfree(resp);
  2028. return ret;
  2029. }
  2030. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  2031. {
  2032. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  2033. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  2034. struct qmi_txn txn;
  2035. int ret = 0;
  2036. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  2037. plat_priv->dynamic_feature,
  2038. plat_priv->driver_state);
  2039. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2040. if (!req)
  2041. return -ENOMEM;
  2042. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2043. if (!resp) {
  2044. kfree(req);
  2045. return -ENOMEM;
  2046. }
  2047. req->mask_valid = 1;
  2048. req->mask = plat_priv->dynamic_feature;
  2049. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2050. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  2051. if (ret < 0) {
  2052. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  2053. ret);
  2054. goto out;
  2055. }
  2056. ret = qmi_send_request
  2057. (&plat_priv->qmi_wlfw, NULL, &txn,
  2058. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  2059. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  2060. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  2061. if (ret < 0) {
  2062. qmi_txn_cancel(&txn);
  2063. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  2064. ret);
  2065. goto out;
  2066. }
  2067. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2068. if (ret < 0) {
  2069. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  2070. ret);
  2071. goto out;
  2072. }
  2073. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2074. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  2075. resp->resp.result, resp->resp.error);
  2076. ret = -resp->resp.result;
  2077. goto out;
  2078. }
  2079. out:
  2080. kfree(req);
  2081. kfree(resp);
  2082. return ret;
  2083. }
  2084. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  2085. void *cmd, int cmd_len)
  2086. {
  2087. struct wlfw_get_info_req_msg_v01 *req;
  2088. struct wlfw_get_info_resp_msg_v01 *resp;
  2089. struct qmi_txn txn;
  2090. int ret = 0;
  2091. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  2092. type, cmd_len, plat_priv->driver_state);
  2093. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  2094. return -EINVAL;
  2095. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2096. if (!req)
  2097. return -ENOMEM;
  2098. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2099. if (!resp) {
  2100. kfree(req);
  2101. return -ENOMEM;
  2102. }
  2103. req->type = type;
  2104. req->data_len = cmd_len;
  2105. memcpy(req->data, cmd, req->data_len);
  2106. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2107. wlfw_get_info_resp_msg_v01_ei, resp);
  2108. if (ret < 0) {
  2109. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2110. ret);
  2111. goto out;
  2112. }
  2113. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2114. QMI_WLFW_GET_INFO_REQ_V01,
  2115. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2116. wlfw_get_info_req_msg_v01_ei, req);
  2117. if (ret < 0) {
  2118. qmi_txn_cancel(&txn);
  2119. cnss_pr_err("Failed to send get info request, err: %d\n",
  2120. ret);
  2121. goto out;
  2122. }
  2123. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2124. if (ret < 0) {
  2125. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2126. ret);
  2127. goto out;
  2128. }
  2129. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2130. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2131. resp->resp.result, resp->resp.error);
  2132. ret = -resp->resp.result;
  2133. goto out;
  2134. }
  2135. kfree(req);
  2136. kfree(resp);
  2137. return 0;
  2138. out:
  2139. kfree(req);
  2140. kfree(resp);
  2141. return ret;
  2142. }
  2143. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2144. {
  2145. return QMI_WLFW_TIMEOUT_MS;
  2146. }
  2147. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2148. struct sockaddr_qrtr *sq,
  2149. struct qmi_txn *txn, const void *data)
  2150. {
  2151. struct cnss_plat_data *plat_priv =
  2152. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2153. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2154. int i;
  2155. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2156. if (!txn) {
  2157. cnss_pr_err("Spurious indication\n");
  2158. return;
  2159. }
  2160. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2161. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2162. return;
  2163. }
  2164. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2165. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2166. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2167. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2168. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2169. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2170. if (!plat_priv->fw_mem[i].va &&
  2171. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2172. plat_priv->fw_mem[i].attrs |=
  2173. DMA_ATTR_FORCE_CONTIGUOUS;
  2174. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2175. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2176. }
  2177. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2178. 0, NULL);
  2179. }
  2180. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2181. struct sockaddr_qrtr *sq,
  2182. struct qmi_txn *txn, const void *data)
  2183. {
  2184. struct cnss_plat_data *plat_priv =
  2185. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2186. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2187. if (!txn) {
  2188. cnss_pr_err("Spurious indication\n");
  2189. return;
  2190. }
  2191. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2192. 0, NULL);
  2193. }
  2194. /**
  2195. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2196. *
  2197. * This event is not required for HST/ HSP as FW calibration done is
  2198. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2199. */
  2200. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2201. struct sockaddr_qrtr *sq,
  2202. struct qmi_txn *txn, const void *data)
  2203. {
  2204. struct cnss_plat_data *plat_priv =
  2205. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2206. struct cnss_cal_info *cal_info;
  2207. if (!txn) {
  2208. cnss_pr_err("Spurious indication\n");
  2209. return;
  2210. }
  2211. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2212. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2213. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2214. return;
  2215. }
  2216. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2217. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2218. if (!cal_info)
  2219. return;
  2220. cal_info->cal_status = CNSS_CAL_DONE;
  2221. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2222. 0, cal_info);
  2223. }
  2224. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2225. struct sockaddr_qrtr *sq,
  2226. struct qmi_txn *txn, const void *data)
  2227. {
  2228. struct cnss_plat_data *plat_priv =
  2229. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2230. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2231. if (!txn) {
  2232. cnss_pr_err("Spurious indication\n");
  2233. return;
  2234. }
  2235. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2236. }
  2237. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2238. struct sockaddr_qrtr *sq,
  2239. struct qmi_txn *txn, const void *data)
  2240. {
  2241. struct cnss_plat_data *plat_priv =
  2242. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2243. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2244. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2245. if (!txn) {
  2246. cnss_pr_err("Spurious indication\n");
  2247. return;
  2248. }
  2249. if (ind_msg->pwr_pin_result_valid)
  2250. plat_priv->pin_result.fw_pwr_pin_result =
  2251. ind_msg->pwr_pin_result;
  2252. if (ind_msg->phy_io_pin_result_valid)
  2253. plat_priv->pin_result.fw_phy_io_pin_result =
  2254. ind_msg->phy_io_pin_result;
  2255. if (ind_msg->rf_pin_result_valid)
  2256. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2257. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2258. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2259. ind_msg->rf_pin_result);
  2260. }
  2261. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2262. u32 cal_file_download_size)
  2263. {
  2264. struct wlfw_cal_report_req_msg_v01 req = {0};
  2265. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2266. struct qmi_txn txn;
  2267. int ret = 0;
  2268. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2269. cal_file_download_size, plat_priv->driver_state);
  2270. req.cal_file_download_size_valid = 1;
  2271. req.cal_file_download_size = cal_file_download_size;
  2272. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2273. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2274. if (ret < 0) {
  2275. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2276. ret);
  2277. goto out;
  2278. }
  2279. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2280. QMI_WLFW_CAL_REPORT_REQ_V01,
  2281. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2282. wlfw_cal_report_req_msg_v01_ei, &req);
  2283. if (ret < 0) {
  2284. qmi_txn_cancel(&txn);
  2285. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2286. ret);
  2287. goto out;
  2288. }
  2289. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2290. if (ret < 0) {
  2291. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2292. ret);
  2293. goto out;
  2294. }
  2295. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2296. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2297. resp.resp.result, resp.resp.error);
  2298. ret = -resp.resp.result;
  2299. goto out;
  2300. }
  2301. out:
  2302. return ret;
  2303. }
  2304. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2305. struct sockaddr_qrtr *sq,
  2306. struct qmi_txn *txn, const void *data)
  2307. {
  2308. struct cnss_plat_data *plat_priv =
  2309. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2310. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2311. struct cnss_cal_info *cal_info;
  2312. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2313. ind->cal_file_upload_size);
  2314. cnss_pr_info("Calibration took %d ms\n",
  2315. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2316. if (!txn) {
  2317. cnss_pr_err("Spurious indication\n");
  2318. return;
  2319. }
  2320. if (ind->cal_file_upload_size_valid)
  2321. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2322. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2323. if (!cal_info)
  2324. return;
  2325. cal_info->cal_status = CNSS_CAL_DONE;
  2326. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2327. 0, cal_info);
  2328. }
  2329. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2330. struct sockaddr_qrtr *sq,
  2331. struct qmi_txn *txn,
  2332. const void *data)
  2333. {
  2334. struct cnss_plat_data *plat_priv =
  2335. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2336. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2337. int i;
  2338. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2339. if (!txn) {
  2340. cnss_pr_err("Spurious indication\n");
  2341. return;
  2342. }
  2343. if (plat_priv->qdss_mem_seg_len) {
  2344. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2345. plat_priv->qdss_mem_seg_len);
  2346. return;
  2347. }
  2348. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2349. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2350. return;
  2351. }
  2352. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2353. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2354. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2355. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2356. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2357. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2358. }
  2359. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2360. 0, NULL);
  2361. }
  2362. /**
  2363. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2364. *
  2365. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2366. * fw memory segment for dumping to file system. Only one type of mem can be
  2367. * saved per indication and is provided in mem seg index 0.
  2368. *
  2369. * Return: None
  2370. */
  2371. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2372. struct sockaddr_qrtr *sq,
  2373. struct qmi_txn *txn,
  2374. const void *data)
  2375. {
  2376. struct cnss_plat_data *plat_priv =
  2377. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2378. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2379. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2380. int i = 0;
  2381. if (!txn || !data) {
  2382. cnss_pr_err("Spurious indication\n");
  2383. return;
  2384. }
  2385. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2386. ind_msg->source, ind_msg->mem_seg_valid,
  2387. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2388. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2389. if (!event_data)
  2390. return;
  2391. event_data->mem_type = ind_msg->mem_seg[0].type;
  2392. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2393. event_data->total_size = ind_msg->total_size;
  2394. if (ind_msg->mem_seg_valid) {
  2395. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2396. cnss_pr_err("Invalid seg len indication\n");
  2397. goto free_event_data;
  2398. }
  2399. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2400. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2401. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2402. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2403. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2404. goto free_event_data;
  2405. }
  2406. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2407. i, ind_msg->mem_seg[i].addr,
  2408. ind_msg->mem_seg[i].size);
  2409. }
  2410. }
  2411. if (ind_msg->file_name_valid)
  2412. strlcpy(event_data->file_name, ind_msg->file_name,
  2413. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2414. if (ind_msg->source == 1) {
  2415. if (!ind_msg->file_name_valid)
  2416. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2417. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2418. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2419. 0, event_data);
  2420. } else {
  2421. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2422. if (!ind_msg->file_name_valid)
  2423. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2424. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2425. } else {
  2426. if (!ind_msg->file_name_valid)
  2427. strlcpy(event_data->file_name, "fw_mem_dump",
  2428. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2429. }
  2430. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2431. 0, event_data);
  2432. }
  2433. return;
  2434. free_event_data:
  2435. kfree(event_data);
  2436. }
  2437. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2438. struct sockaddr_qrtr *sq,
  2439. struct qmi_txn *txn,
  2440. const void *data)
  2441. {
  2442. struct cnss_plat_data *plat_priv =
  2443. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2444. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2445. 0, NULL);
  2446. }
  2447. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2448. struct sockaddr_qrtr *sq,
  2449. struct qmi_txn *txn,
  2450. const void *data)
  2451. {
  2452. struct cnss_plat_data *plat_priv =
  2453. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2454. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2455. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2456. if (!txn) {
  2457. cnss_pr_err("Spurious indication\n");
  2458. return;
  2459. }
  2460. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2461. ind_msg->data_len, ind_msg->type,
  2462. ind_msg->is_last, ind_msg->seq_no);
  2463. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2464. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2465. (void *)ind_msg->data,
  2466. ind_msg->data_len);
  2467. }
  2468. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2469. (struct cnss_plat_data *plat_priv,
  2470. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2471. {
  2472. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2473. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2474. struct qmi_txn txn;
  2475. int ret = 0;
  2476. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2477. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2478. return -EINVAL;
  2479. }
  2480. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2481. if (!req)
  2482. return -ENOMEM;
  2483. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2484. if (!resp) {
  2485. kfree(req);
  2486. return -ENOMEM;
  2487. }
  2488. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2489. req->twt_sta_start = ind_msg->twt_sta_start;
  2490. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2491. req->twt_sta_int = ind_msg->twt_sta_int;
  2492. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2493. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2494. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2495. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2496. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2497. req->twt_sta_dl = req->twt_sta_dl;
  2498. req->twt_sta_config_changed_valid =
  2499. ind_msg->twt_sta_config_changed_valid;
  2500. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2501. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2502. plat_priv->driver_state);
  2503. ret =
  2504. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2505. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2506. resp);
  2507. if (ret < 0) {
  2508. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2509. ret);
  2510. goto out;
  2511. }
  2512. ret =
  2513. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2514. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2515. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2516. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2517. if (ret < 0) {
  2518. qmi_txn_cancel(&txn);
  2519. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2520. goto out;
  2521. }
  2522. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2523. if (ret < 0) {
  2524. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2525. goto out;
  2526. }
  2527. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2528. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2529. resp->resp.result, resp->resp.error);
  2530. ret = -resp->resp.result;
  2531. goto out;
  2532. }
  2533. ret = 0;
  2534. out:
  2535. kfree(req);
  2536. kfree(resp);
  2537. return ret;
  2538. }
  2539. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2540. void *data)
  2541. {
  2542. int ret;
  2543. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2544. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2545. kfree(data);
  2546. return ret;
  2547. }
  2548. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2549. struct sockaddr_qrtr *sq,
  2550. struct qmi_txn *txn,
  2551. const void *data)
  2552. {
  2553. struct cnss_plat_data *plat_priv =
  2554. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2555. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2556. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2557. if (!txn) {
  2558. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2559. return;
  2560. }
  2561. if (!ind_msg) {
  2562. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2563. return;
  2564. }
  2565. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2566. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2567. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2568. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2569. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2570. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2571. ind_msg->twt_sta_config_changed_valid,
  2572. ind_msg->twt_sta_config_changed);
  2573. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2574. if (!event_data)
  2575. return;
  2576. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2577. event_data);
  2578. }
  2579. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2580. {
  2581. .type = QMI_INDICATION,
  2582. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2583. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2584. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2585. .fn = cnss_wlfw_request_mem_ind_cb
  2586. },
  2587. {
  2588. .type = QMI_INDICATION,
  2589. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2590. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2591. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2592. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2593. },
  2594. {
  2595. .type = QMI_INDICATION,
  2596. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2597. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2598. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2599. .fn = cnss_wlfw_fw_ready_ind_cb
  2600. },
  2601. {
  2602. .type = QMI_INDICATION,
  2603. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2604. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2605. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2606. .fn = cnss_wlfw_fw_init_done_ind_cb
  2607. },
  2608. {
  2609. .type = QMI_INDICATION,
  2610. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2611. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2612. .decoded_size =
  2613. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2614. .fn = cnss_wlfw_pin_result_ind_cb
  2615. },
  2616. {
  2617. .type = QMI_INDICATION,
  2618. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2619. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2620. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2621. .fn = cnss_wlfw_cal_done_ind_cb
  2622. },
  2623. {
  2624. .type = QMI_INDICATION,
  2625. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2626. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2627. .decoded_size =
  2628. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2629. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2630. },
  2631. {
  2632. .type = QMI_INDICATION,
  2633. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2634. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2635. .decoded_size =
  2636. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2637. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2638. },
  2639. {
  2640. .type = QMI_INDICATION,
  2641. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2642. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2643. .decoded_size =
  2644. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2645. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2646. },
  2647. {
  2648. .type = QMI_INDICATION,
  2649. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2650. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2651. .decoded_size =
  2652. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2653. .fn = cnss_wlfw_respond_get_info_ind_cb
  2654. },
  2655. {
  2656. .type = QMI_INDICATION,
  2657. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2658. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2659. .decoded_size =
  2660. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2661. .fn = cnss_wlfw_process_twt_cfg_ind
  2662. },
  2663. {}
  2664. };
  2665. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2666. void *data)
  2667. {
  2668. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2669. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2670. struct sockaddr_qrtr sq = { 0 };
  2671. int ret = 0;
  2672. if (!event_data)
  2673. return -EINVAL;
  2674. sq.sq_family = AF_QIPCRTR;
  2675. sq.sq_node = event_data->node;
  2676. sq.sq_port = event_data->port;
  2677. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2678. sizeof(sq), 0);
  2679. if (ret < 0) {
  2680. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2681. goto out;
  2682. }
  2683. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2684. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2685. plat_priv->driver_state);
  2686. kfree(data);
  2687. return 0;
  2688. out:
  2689. CNSS_QMI_ASSERT();
  2690. kfree(data);
  2691. return ret;
  2692. }
  2693. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2694. {
  2695. int ret = 0;
  2696. if (!plat_priv)
  2697. return -ENODEV;
  2698. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2699. cnss_pr_err("Unexpected WLFW server arrive\n");
  2700. CNSS_ASSERT(0);
  2701. return -EINVAL;
  2702. }
  2703. cnss_ignore_qmi_failure(false);
  2704. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2705. if (ret < 0)
  2706. goto out;
  2707. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2708. if (ret < 0) {
  2709. if (ret == -EALREADY)
  2710. ret = 0;
  2711. goto out;
  2712. }
  2713. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2714. if (ret < 0)
  2715. goto out;
  2716. return 0;
  2717. out:
  2718. return ret;
  2719. }
  2720. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2721. {
  2722. int ret;
  2723. if (!plat_priv)
  2724. return -ENODEV;
  2725. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2726. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2727. plat_priv->driver_state);
  2728. cnss_qmi_deinit(plat_priv);
  2729. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2730. ret = cnss_qmi_init(plat_priv);
  2731. if (ret < 0) {
  2732. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2733. CNSS_ASSERT(0);
  2734. }
  2735. return 0;
  2736. }
  2737. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2738. struct qmi_service *service)
  2739. {
  2740. struct cnss_plat_data *plat_priv =
  2741. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2742. struct cnss_qmi_event_server_arrive_data *event_data;
  2743. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2744. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2745. plat_priv->driver_state);
  2746. return 0;
  2747. }
  2748. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2749. service->node, service->port);
  2750. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2751. if (!event_data)
  2752. return -ENOMEM;
  2753. event_data->node = service->node;
  2754. event_data->port = service->port;
  2755. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2756. 0, event_data);
  2757. return 0;
  2758. }
  2759. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2760. struct qmi_service *service)
  2761. {
  2762. struct cnss_plat_data *plat_priv =
  2763. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2764. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2765. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2766. plat_priv->driver_state);
  2767. return;
  2768. }
  2769. cnss_pr_dbg("WLFW server exiting\n");
  2770. if (plat_priv) {
  2771. cnss_ignore_qmi_failure(true);
  2772. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2773. }
  2774. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2775. 0, NULL);
  2776. }
  2777. static struct qmi_ops qmi_wlfw_ops = {
  2778. .new_server = wlfw_new_server,
  2779. .del_server = wlfw_del_server,
  2780. };
  2781. static int cnss_qmi_add_lookup(struct cnss_plat_data *plat_priv)
  2782. {
  2783. unsigned int id = WLFW_SERVICE_INS_ID_V01;
  2784. /* In order to support dual wlan card attach case,
  2785. * need separate qmi service instance id for each dev
  2786. */
  2787. if (cnss_is_dual_wlan_enabled() && plat_priv->qrtr_node_id != 0 &&
  2788. plat_priv->wlfw_service_instance_id != 0)
  2789. id = plat_priv->wlfw_service_instance_id;
  2790. return qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2791. WLFW_SERVICE_VERS_V01, id);
  2792. }
  2793. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2794. {
  2795. int ret = 0;
  2796. cnss_get_qrtr_info(plat_priv);
  2797. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2798. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2799. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2800. if (ret < 0) {
  2801. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2802. ret);
  2803. goto out;
  2804. }
  2805. ret = cnss_qmi_add_lookup(plat_priv);
  2806. if (ret < 0)
  2807. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2808. out:
  2809. return ret;
  2810. }
  2811. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2812. {
  2813. qmi_handle_release(&plat_priv->qmi_wlfw);
  2814. }
  2815. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2816. {
  2817. struct dms_get_mac_address_req_msg_v01 req;
  2818. struct dms_get_mac_address_resp_msg_v01 resp;
  2819. struct qmi_txn txn;
  2820. int ret = 0;
  2821. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2822. cnss_pr_err("DMS QMI connection not established\n");
  2823. return -EINVAL;
  2824. }
  2825. cnss_pr_dbg("Requesting DMS MAC address");
  2826. memset(&resp, 0, sizeof(resp));
  2827. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2828. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2829. if (ret < 0) {
  2830. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2831. ret);
  2832. goto out;
  2833. }
  2834. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2835. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2836. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2837. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2838. dms_get_mac_address_req_msg_v01_ei, &req);
  2839. if (ret < 0) {
  2840. qmi_txn_cancel(&txn);
  2841. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2842. ret);
  2843. goto out;
  2844. }
  2845. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2846. if (ret < 0) {
  2847. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2848. ret);
  2849. goto out;
  2850. }
  2851. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2852. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2853. resp.resp.result, resp.resp.error);
  2854. ret = -resp.resp.result;
  2855. goto out;
  2856. }
  2857. if (!resp.mac_address_valid ||
  2858. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2859. cnss_pr_err("Invalid MAC address received from DMS\n");
  2860. plat_priv->dms.mac_valid = false;
  2861. goto out;
  2862. }
  2863. plat_priv->dms.mac_valid = true;
  2864. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2865. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2866. out:
  2867. return ret;
  2868. }
  2869. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2870. unsigned int node, unsigned int port)
  2871. {
  2872. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2873. struct sockaddr_qrtr sq = {0};
  2874. int ret = 0;
  2875. sq.sq_family = AF_QIPCRTR;
  2876. sq.sq_node = node;
  2877. sq.sq_port = port;
  2878. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2879. sizeof(sq), 0);
  2880. if (ret < 0) {
  2881. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2882. node, port);
  2883. goto out;
  2884. }
  2885. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2886. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2887. plat_priv->driver_state);
  2888. out:
  2889. return ret;
  2890. }
  2891. static int dms_new_server(struct qmi_handle *qmi_dms,
  2892. struct qmi_service *service)
  2893. {
  2894. struct cnss_plat_data *plat_priv =
  2895. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2896. if (!service)
  2897. return -EINVAL;
  2898. return cnss_dms_connect_to_server(plat_priv, service->node,
  2899. service->port);
  2900. }
  2901. static void cnss_dms_server_exit_work(struct work_struct *work)
  2902. {
  2903. int ret;
  2904. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  2905. cnss_dms_deinit(plat_priv);
  2906. cnss_pr_info("QMI DMS Server Exit");
  2907. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2908. ret = cnss_dms_init(plat_priv);
  2909. if (ret < 0)
  2910. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  2911. }
  2912. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  2913. static void dms_del_server(struct qmi_handle *qmi_dms,
  2914. struct qmi_service *service)
  2915. {
  2916. struct cnss_plat_data *plat_priv =
  2917. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2918. if (!plat_priv)
  2919. return;
  2920. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  2921. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  2922. plat_priv->driver_state);
  2923. return;
  2924. }
  2925. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2926. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2927. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2928. plat_priv->driver_state);
  2929. schedule_work(&cnss_dms_del_work);
  2930. }
  2931. void cnss_cancel_dms_work(void)
  2932. {
  2933. cancel_work_sync(&cnss_dms_del_work);
  2934. }
  2935. static struct qmi_ops qmi_dms_ops = {
  2936. .new_server = dms_new_server,
  2937. .del_server = dms_del_server,
  2938. };
  2939. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2940. {
  2941. int ret = 0;
  2942. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2943. &qmi_dms_ops, NULL);
  2944. if (ret < 0) {
  2945. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2946. goto out;
  2947. }
  2948. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2949. DMS_SERVICE_VERS_V01, 0);
  2950. if (ret < 0)
  2951. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2952. out:
  2953. return ret;
  2954. }
  2955. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2956. {
  2957. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2958. qmi_handle_release(&plat_priv->qmi_dms);
  2959. }
  2960. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2961. {
  2962. int ret;
  2963. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2964. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2965. struct qmi_txn txn;
  2966. if (!plat_priv)
  2967. return -ENODEV;
  2968. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2969. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2970. if (!req)
  2971. return -ENOMEM;
  2972. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2973. if (!resp) {
  2974. kfree(req);
  2975. return -ENOMEM;
  2976. }
  2977. req->antenna = plat_priv->antenna;
  2978. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2979. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2980. if (ret < 0) {
  2981. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2982. ret);
  2983. goto out;
  2984. }
  2985. ret = qmi_send_request
  2986. (&plat_priv->coex_qmi, NULL, &txn,
  2987. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2988. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2989. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2990. if (ret < 0) {
  2991. qmi_txn_cancel(&txn);
  2992. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2993. ret);
  2994. goto out;
  2995. }
  2996. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2997. if (ret < 0) {
  2998. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2999. ret);
  3000. goto out;
  3001. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3002. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  3003. resp->resp.result, resp->resp.error);
  3004. ret = -resp->resp.result;
  3005. goto out;
  3006. }
  3007. if (resp->grant_valid)
  3008. plat_priv->grant = resp->grant;
  3009. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  3010. kfree(resp);
  3011. kfree(req);
  3012. return 0;
  3013. out:
  3014. kfree(resp);
  3015. kfree(req);
  3016. return ret;
  3017. }
  3018. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  3019. {
  3020. int ret;
  3021. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  3022. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  3023. struct qmi_txn txn;
  3024. if (!plat_priv)
  3025. return -ENODEV;
  3026. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  3027. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3028. if (!req)
  3029. return -ENOMEM;
  3030. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3031. if (!resp) {
  3032. kfree(req);
  3033. return -ENOMEM;
  3034. }
  3035. req->antenna = plat_priv->antenna;
  3036. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3037. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  3038. if (ret < 0) {
  3039. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  3040. ret);
  3041. goto out;
  3042. }
  3043. ret = qmi_send_request
  3044. (&plat_priv->coex_qmi, NULL, &txn,
  3045. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  3046. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  3047. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  3048. if (ret < 0) {
  3049. qmi_txn_cancel(&txn);
  3050. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  3051. ret);
  3052. goto out;
  3053. }
  3054. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3055. if (ret < 0) {
  3056. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  3057. ret);
  3058. goto out;
  3059. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3060. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  3061. resp->resp.result, resp->resp.error);
  3062. ret = -resp->resp.result;
  3063. goto out;
  3064. }
  3065. kfree(resp);
  3066. kfree(req);
  3067. return 0;
  3068. out:
  3069. kfree(resp);
  3070. kfree(req);
  3071. return ret;
  3072. }
  3073. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  3074. {
  3075. int ret;
  3076. struct wlfw_subsys_restart_level_req_msg_v01 req;
  3077. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  3078. u8 pcss_enabled;
  3079. if (!plat_priv)
  3080. return -ENODEV;
  3081. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3082. cnss_pr_dbg("Can't send pcss cmd before fw ready\n");
  3083. return 0;
  3084. }
  3085. pcss_enabled = plat_priv->recovery_pcss_enabled;
  3086. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  3087. req.restart_level_type_valid = 1;
  3088. req.restart_level_type = pcss_enabled;
  3089. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  3090. wlfw_subsys_restart_level_req_msg_v01_ei,
  3091. wlfw_subsys_restart_level_resp_msg_v01_ei,
  3092. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  3093. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  3094. QMI_WLFW_TIMEOUT_JF);
  3095. if (ret < 0)
  3096. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  3097. return ret;
  3098. }
  3099. static int coex_new_server(struct qmi_handle *qmi,
  3100. struct qmi_service *service)
  3101. {
  3102. struct cnss_plat_data *plat_priv =
  3103. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3104. struct sockaddr_qrtr sq = { 0 };
  3105. int ret = 0;
  3106. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  3107. service->node, service->port);
  3108. sq.sq_family = AF_QIPCRTR;
  3109. sq.sq_node = service->node;
  3110. sq.sq_port = service->port;
  3111. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3112. if (ret < 0) {
  3113. cnss_pr_err("Fail to connect to remote service port\n");
  3114. return ret;
  3115. }
  3116. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3117. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  3118. plat_priv->driver_state);
  3119. return 0;
  3120. }
  3121. static void coex_del_server(struct qmi_handle *qmi,
  3122. struct qmi_service *service)
  3123. {
  3124. struct cnss_plat_data *plat_priv =
  3125. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3126. cnss_pr_dbg("COEX server exit\n");
  3127. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3128. }
  3129. static struct qmi_ops coex_qmi_ops = {
  3130. .new_server = coex_new_server,
  3131. .del_server = coex_del_server,
  3132. };
  3133. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3134. { int ret;
  3135. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3136. COEX_SERVICE_MAX_MSG_LEN,
  3137. &coex_qmi_ops, NULL);
  3138. if (ret < 0)
  3139. return ret;
  3140. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3141. COEX_SERVICE_VERS_V01, 0);
  3142. return ret;
  3143. }
  3144. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3145. {
  3146. qmi_handle_release(&plat_priv->coex_qmi);
  3147. }
  3148. /* IMS Service */
  3149. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3150. {
  3151. int ret;
  3152. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3153. struct qmi_txn *txn;
  3154. if (!plat_priv)
  3155. return -ENODEV;
  3156. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3157. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3158. if (!req)
  3159. return -ENOMEM;
  3160. req->wfc_call_status_valid = 1;
  3161. req->wfc_call_status = 1;
  3162. txn = &plat_priv->txn;
  3163. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3164. if (ret < 0) {
  3165. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3166. ret);
  3167. goto out;
  3168. }
  3169. ret = qmi_send_request
  3170. (&plat_priv->ims_qmi, NULL, txn,
  3171. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3172. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3173. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3174. if (ret < 0) {
  3175. qmi_txn_cancel(txn);
  3176. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3177. ret);
  3178. goto out;
  3179. }
  3180. kfree(req);
  3181. return 0;
  3182. out:
  3183. kfree(req);
  3184. return ret;
  3185. }
  3186. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3187. struct sockaddr_qrtr *sq,
  3188. struct qmi_txn *txn,
  3189. const void *data)
  3190. {
  3191. const
  3192. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3193. data;
  3194. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3195. if (!txn) {
  3196. cnss_pr_err("spurious response\n");
  3197. return;
  3198. }
  3199. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3200. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3201. resp->resp.result, resp->resp.error);
  3202. txn->result = -resp->resp.result;
  3203. }
  3204. }
  3205. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3206. void *data)
  3207. {
  3208. int ret;
  3209. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3210. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3211. kfree(data);
  3212. return ret;
  3213. }
  3214. static void
  3215. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3216. struct sockaddr_qrtr *sq,
  3217. struct qmi_txn *txn, const void *data)
  3218. {
  3219. struct cnss_plat_data *plat_priv =
  3220. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3221. const
  3222. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3223. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3224. if (!txn) {
  3225. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3226. return;
  3227. }
  3228. if (!ind_msg) {
  3229. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3230. return;
  3231. }
  3232. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3233. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3234. ind_msg->all_wfc_calls_held,
  3235. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3236. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3237. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3238. ind_msg->media_quality_valid, ind_msg->media_quality);
  3239. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3240. if (!event_data)
  3241. return;
  3242. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3243. 0, event_data);
  3244. }
  3245. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3246. {
  3247. .type = QMI_RESPONSE,
  3248. .msg_id =
  3249. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3250. .ei =
  3251. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3252. .decoded_size = sizeof(struct
  3253. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3254. .fn = ims_subscribe_for_indication_resp_cb
  3255. },
  3256. {
  3257. .type = QMI_INDICATION,
  3258. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3259. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3260. .decoded_size =
  3261. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3262. .fn = cnss_ims_process_wfc_call_ind_cb
  3263. },
  3264. {}
  3265. };
  3266. static int ims_new_server(struct qmi_handle *qmi,
  3267. struct qmi_service *service)
  3268. {
  3269. struct cnss_plat_data *plat_priv =
  3270. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3271. struct sockaddr_qrtr sq = { 0 };
  3272. int ret = 0;
  3273. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3274. service->node, service->port);
  3275. sq.sq_family = AF_QIPCRTR;
  3276. sq.sq_node = service->node;
  3277. sq.sq_port = service->port;
  3278. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3279. if (ret < 0) {
  3280. cnss_pr_err("Fail to connect to remote service port\n");
  3281. return ret;
  3282. }
  3283. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3284. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3285. plat_priv->driver_state);
  3286. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3287. return ret;
  3288. }
  3289. static void ims_del_server(struct qmi_handle *qmi,
  3290. struct qmi_service *service)
  3291. {
  3292. struct cnss_plat_data *plat_priv =
  3293. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3294. cnss_pr_dbg("IMS server exit\n");
  3295. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3296. }
  3297. static struct qmi_ops ims_qmi_ops = {
  3298. .new_server = ims_new_server,
  3299. .del_server = ims_del_server,
  3300. };
  3301. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3302. { int ret;
  3303. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3304. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3305. &ims_qmi_ops, qmi_ims_msg_handlers);
  3306. if (ret < 0)
  3307. return ret;
  3308. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3309. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3310. return ret;
  3311. }
  3312. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3313. {
  3314. qmi_handle_release(&plat_priv->ims_qmi);
  3315. }