dsi_panel.c 108 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. /**
  15. * topology is currently defined by a set of following 3 values:
  16. * 1. num of layer mixers
  17. * 2. num of compression encoders
  18. * 3. num of interfaces
  19. */
  20. #define TOPOLOGY_SET_LEN 3
  21. #define MAX_TOPOLOGY 5
  22. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  23. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  24. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  25. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  26. #define MAX_PANEL_JITTER 10
  27. #define DEFAULT_PANEL_PREFILL_LINES 25
  28. #define MIN_PREFILL_LINES 35
  29. enum dsi_dsc_ratio_type {
  30. DSC_8BPC_8BPP,
  31. DSC_10BPC_8BPP,
  32. DSC_12BPC_8BPP,
  33. DSC_10BPC_10BPP,
  34. DSC_RATIO_TYPE_MAX
  35. };
  36. static u32 dsi_dsc_rc_buf_thresh[] = {0x0e, 0x1c, 0x2a, 0x38, 0x46, 0x54,
  37. 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b, 0x7d, 0x7e};
  38. /*
  39. * DSC 1.1
  40. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  41. */
  42. static char dsi_dsc_rc_range_min_qp_1_1[][15] = {
  43. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 12},
  44. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 17},
  45. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 15, 21},
  46. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  47. };
  48. /*
  49. * DSC 1.1 SCR
  50. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  51. */
  52. static char dsi_dsc_rc_range_min_qp_1_1_scr1[][15] = {
  53. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 9, 12},
  54. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 13, 16},
  55. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 17, 20},
  56. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  57. };
  58. /*
  59. * DSC 1.1
  60. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  61. */
  62. static char dsi_dsc_rc_range_max_qp_1_1[][15] = {
  63. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15},
  64. {4, 8, 9, 10, 11, 11, 11, 12, 13, 14, 15, 16, 17, 17, 19},
  65. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 19, 20, 21, 21, 23},
  66. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  67. };
  68. /*
  69. * DSC 1.1 SCR
  70. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  71. */
  72. static char dsi_dsc_rc_range_max_qp_1_1_scr1[][15] = {
  73. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 10, 11, 11, 12, 13},
  74. {8, 8, 9, 10, 11, 11, 11, 12, 13, 14, 14, 15, 15, 16, 17},
  75. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 20, 23},
  76. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  77. };
  78. /*
  79. * DSC 1.1 and DSC 1.1 SCR
  80. * Rate control - bpg offset values
  81. */
  82. static char dsi_dsc_rc_range_bpg_offset[] = {2, 0, 0, -2, -4, -6, -8, -8,
  83. -8, -10, -10, -12, -12, -12, -12};
  84. int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc, char *buf,
  85. int pps_id)
  86. {
  87. char *bp;
  88. char data;
  89. int i, bpp;
  90. char *dbgbp;
  91. dbgbp = buf;
  92. bp = buf;
  93. /* First 7 bytes are cmd header */
  94. *bp++ = 0x0A;
  95. *bp++ = 1;
  96. *bp++ = 0;
  97. *bp++ = 0;
  98. *bp++ = dsc->pps_delay_ms;
  99. *bp++ = 0;
  100. *bp++ = 128;
  101. *bp++ = (dsc->version & 0xff); /* pps0 */
  102. *bp++ = (pps_id & 0xff); /* pps1 */
  103. bp++; /* pps2, reserved */
  104. data = dsc->line_buf_depth & 0x0f;
  105. data |= ((dsc->bpc & 0xf) << 4);
  106. *bp++ = data; /* pps3 */
  107. bpp = dsc->bpp;
  108. bpp <<= 4; /* 4 fraction bits */
  109. data = (bpp >> 8);
  110. data &= 0x03; /* upper two bits */
  111. data |= ((dsc->block_pred_enable & 0x1) << 5);
  112. data |= ((dsc->convert_rgb & 0x1) << 4);
  113. data |= ((dsc->enable_422 & 0x1) << 3);
  114. data |= ((dsc->vbr_enable & 0x1) << 2);
  115. *bp++ = data; /* pps4 */
  116. *bp++ = (bpp & 0xff); /* pps5 */
  117. *bp++ = ((dsc->pic_height >> 8) & 0xff); /* pps6 */
  118. *bp++ = (dsc->pic_height & 0x0ff); /* pps7 */
  119. *bp++ = ((dsc->pic_width >> 8) & 0xff); /* pps8 */
  120. *bp++ = (dsc->pic_width & 0x0ff); /* pps9 */
  121. *bp++ = ((dsc->slice_height >> 8) & 0xff);/* pps10 */
  122. *bp++ = (dsc->slice_height & 0x0ff); /* pps11 */
  123. *bp++ = ((dsc->slice_width >> 8) & 0xff); /* pps12 */
  124. *bp++ = (dsc->slice_width & 0x0ff); /* pps13 */
  125. *bp++ = ((dsc->chunk_size >> 8) & 0xff);/* pps14 */
  126. *bp++ = (dsc->chunk_size & 0x0ff); /* pps15 */
  127. *bp++ = (dsc->initial_xmit_delay >> 8) & 0x3; /* pps16, bit 0, 1 */
  128. *bp++ = (dsc->initial_xmit_delay & 0xff);/* pps17 */
  129. *bp++ = ((dsc->initial_dec_delay >> 8) & 0xff); /* pps18 */
  130. *bp++ = (dsc->initial_dec_delay & 0xff);/* pps19 */
  131. bp++; /* pps20, reserved */
  132. *bp++ = (dsc->initial_scale_value & 0x3f); /* pps21 */
  133. *bp++ = ((dsc->scale_increment_interval >> 8) & 0xff); /* pps22 */
  134. *bp++ = (dsc->scale_increment_interval & 0xff); /* pps23 */
  135. *bp++ = ((dsc->scale_decrement_interval >> 8) & 0xf); /* pps24 */
  136. *bp++ = (dsc->scale_decrement_interval & 0x0ff);/* pps25 */
  137. bp++; /* pps26, reserved */
  138. *bp++ = (dsc->first_line_bpg_offset & 0x1f);/* pps27 */
  139. *bp++ = ((dsc->nfl_bpg_offset >> 8) & 0xff);/* pps28 */
  140. *bp++ = (dsc->nfl_bpg_offset & 0x0ff); /* pps29 */
  141. *bp++ = ((dsc->slice_bpg_offset >> 8) & 0xff);/* pps30 */
  142. *bp++ = (dsc->slice_bpg_offset & 0x0ff);/* pps31 */
  143. *bp++ = ((dsc->initial_offset >> 8) & 0xff);/* pps32 */
  144. *bp++ = (dsc->initial_offset & 0x0ff); /* pps33 */
  145. *bp++ = ((dsc->final_offset >> 8) & 0xff);/* pps34 */
  146. *bp++ = (dsc->final_offset & 0x0ff); /* pps35 */
  147. *bp++ = (dsc->min_qp_flatness & 0x1f); /* pps36 */
  148. *bp++ = (dsc->max_qp_flatness & 0x1f); /* pps37 */
  149. *bp++ = ((dsc->rc_model_size >> 8) & 0xff);/* pps38 */
  150. *bp++ = (dsc->rc_model_size & 0x0ff); /* pps39 */
  151. *bp++ = (dsc->edge_factor & 0x0f); /* pps40 */
  152. *bp++ = (dsc->quant_incr_limit0 & 0x1f); /* pps41 */
  153. *bp++ = (dsc->quant_incr_limit1 & 0x1f); /* pps42 */
  154. data = ((dsc->tgt_offset_hi & 0xf) << 4);
  155. data |= (dsc->tgt_offset_lo & 0x0f);
  156. *bp++ = data; /* pps43 */
  157. for (i = 0; i < 14; i++)
  158. *bp++ = (dsc->buf_thresh[i] & 0xff); /* pps44 - pps57 */
  159. for (i = 0; i < 15; i++) { /* pps58 - pps87 */
  160. data = (dsc->range_min_qp[i] & 0x1f);
  161. data <<= 3;
  162. data |= ((dsc->range_max_qp[i] >> 2) & 0x07);
  163. *bp++ = data;
  164. data = (dsc->range_max_qp[i] & 0x03);
  165. data <<= 6;
  166. data |= (dsc->range_bpg_offset[i] & 0x3f);
  167. *bp++ = data;
  168. }
  169. return 128;
  170. }
  171. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  172. {
  173. int rc = 0;
  174. int i;
  175. struct regulator *vreg = NULL;
  176. for (i = 0; i < panel->power_info.count; i++) {
  177. vreg = devm_regulator_get(panel->parent,
  178. panel->power_info.vregs[i].vreg_name);
  179. rc = PTR_RET(vreg);
  180. if (rc) {
  181. DSI_ERR("failed to get %s regulator\n",
  182. panel->power_info.vregs[i].vreg_name);
  183. goto error_put;
  184. }
  185. panel->power_info.vregs[i].vreg = vreg;
  186. }
  187. return rc;
  188. error_put:
  189. for (i = i - 1; i >= 0; i--) {
  190. devm_regulator_put(panel->power_info.vregs[i].vreg);
  191. panel->power_info.vregs[i].vreg = NULL;
  192. }
  193. return rc;
  194. }
  195. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  196. {
  197. int rc = 0;
  198. int i;
  199. for (i = panel->power_info.count - 1; i >= 0; i--)
  200. devm_regulator_put(panel->power_info.vregs[i].vreg);
  201. return rc;
  202. }
  203. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  204. {
  205. int rc = 0;
  206. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  207. if (gpio_is_valid(r_config->reset_gpio)) {
  208. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  209. if (rc) {
  210. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  211. goto error;
  212. }
  213. }
  214. if (gpio_is_valid(r_config->disp_en_gpio)) {
  215. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  216. if (rc) {
  217. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  218. goto error_release_reset;
  219. }
  220. }
  221. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  222. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  223. if (rc) {
  224. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  225. goto error_release_disp_en;
  226. }
  227. }
  228. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  229. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  230. if (rc) {
  231. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  232. goto error_release_mode_sel;
  233. }
  234. }
  235. if (gpio_is_valid(panel->panel_test_gpio)) {
  236. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  237. if (rc) {
  238. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  239. rc);
  240. panel->panel_test_gpio = -1;
  241. rc = 0;
  242. }
  243. }
  244. goto error;
  245. error_release_mode_sel:
  246. if (gpio_is_valid(panel->bl_config.en_gpio))
  247. gpio_free(panel->bl_config.en_gpio);
  248. error_release_disp_en:
  249. if (gpio_is_valid(r_config->disp_en_gpio))
  250. gpio_free(r_config->disp_en_gpio);
  251. error_release_reset:
  252. if (gpio_is_valid(r_config->reset_gpio))
  253. gpio_free(r_config->reset_gpio);
  254. error:
  255. return rc;
  256. }
  257. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  258. {
  259. int rc = 0;
  260. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  261. if (gpio_is_valid(r_config->reset_gpio))
  262. gpio_free(r_config->reset_gpio);
  263. if (gpio_is_valid(r_config->disp_en_gpio))
  264. gpio_free(r_config->disp_en_gpio);
  265. if (gpio_is_valid(panel->bl_config.en_gpio))
  266. gpio_free(panel->bl_config.en_gpio);
  267. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  268. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  269. if (gpio_is_valid(panel->panel_test_gpio))
  270. gpio_free(panel->panel_test_gpio);
  271. return rc;
  272. }
  273. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  274. {
  275. struct dsi_panel_reset_config *r_config;
  276. if (!panel) {
  277. DSI_ERR("Invalid panel param\n");
  278. return -EINVAL;
  279. }
  280. r_config = &panel->reset_config;
  281. if (!r_config) {
  282. DSI_ERR("Invalid panel reset configuration\n");
  283. return -EINVAL;
  284. }
  285. if (gpio_is_valid(r_config->reset_gpio)) {
  286. gpio_set_value(r_config->reset_gpio, 0);
  287. DSI_INFO("GPIO pulled low to simulate ESD\n");
  288. return 0;
  289. }
  290. DSI_ERR("failed to pull down gpio\n");
  291. return -EINVAL;
  292. }
  293. static int dsi_panel_reset(struct dsi_panel *panel)
  294. {
  295. int rc = 0;
  296. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  297. int i;
  298. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  299. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  300. if (rc) {
  301. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  302. goto exit;
  303. }
  304. }
  305. if (r_config->count) {
  306. rc = gpio_direction_output(r_config->reset_gpio,
  307. r_config->sequence[0].level);
  308. if (rc) {
  309. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  310. goto exit;
  311. }
  312. }
  313. for (i = 0; i < r_config->count; i++) {
  314. gpio_set_value(r_config->reset_gpio,
  315. r_config->sequence[i].level);
  316. if (r_config->sequence[i].sleep_ms)
  317. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  318. (r_config->sequence[i].sleep_ms * 1000) + 100);
  319. }
  320. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  321. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  322. if (rc)
  323. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  324. }
  325. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  326. bool out = true;
  327. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  328. || (panel->reset_config.mode_sel_state
  329. == MODE_GPIO_LOW))
  330. out = false;
  331. else if ((panel->reset_config.mode_sel_state
  332. == MODE_SEL_SINGLE_PORT) ||
  333. (panel->reset_config.mode_sel_state
  334. == MODE_GPIO_HIGH))
  335. out = true;
  336. rc = gpio_direction_output(
  337. panel->reset_config.lcd_mode_sel_gpio, out);
  338. if (rc)
  339. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  340. }
  341. if (gpio_is_valid(panel->panel_test_gpio)) {
  342. rc = gpio_direction_input(panel->panel_test_gpio);
  343. if (rc)
  344. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  345. rc);
  346. }
  347. exit:
  348. return rc;
  349. }
  350. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  351. {
  352. int rc = 0;
  353. struct pinctrl_state *state;
  354. if (panel->host_config.ext_bridge_mode)
  355. return 0;
  356. if (enable)
  357. state = panel->pinctrl.active;
  358. else
  359. state = panel->pinctrl.suspend;
  360. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  361. if (rc)
  362. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  363. panel->name, rc);
  364. return rc;
  365. }
  366. static int dsi_panel_power_on(struct dsi_panel *panel)
  367. {
  368. int rc = 0;
  369. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  370. if (rc) {
  371. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  372. panel->name, rc);
  373. goto exit;
  374. }
  375. rc = dsi_panel_set_pinctrl_state(panel, true);
  376. if (rc) {
  377. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  378. goto error_disable_vregs;
  379. }
  380. rc = dsi_panel_reset(panel);
  381. if (rc) {
  382. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  383. goto error_disable_gpio;
  384. }
  385. goto exit;
  386. error_disable_gpio:
  387. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  388. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  389. if (gpio_is_valid(panel->bl_config.en_gpio))
  390. gpio_set_value(panel->bl_config.en_gpio, 0);
  391. (void)dsi_panel_set_pinctrl_state(panel, false);
  392. error_disable_vregs:
  393. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  394. exit:
  395. return rc;
  396. }
  397. static int dsi_panel_power_off(struct dsi_panel *panel)
  398. {
  399. int rc = 0;
  400. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  401. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  402. if (gpio_is_valid(panel->reset_config.reset_gpio))
  403. gpio_set_value(panel->reset_config.reset_gpio, 0);
  404. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  405. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  406. rc = dsi_panel_set_pinctrl_state(panel, false);
  407. if (rc) {
  408. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  409. rc);
  410. }
  411. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  412. if (rc)
  413. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  414. panel->name, rc);
  415. return rc;
  416. }
  417. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  418. enum dsi_cmd_set_type type)
  419. {
  420. int rc = 0, i = 0;
  421. ssize_t len;
  422. struct dsi_cmd_desc *cmds;
  423. u32 count;
  424. enum dsi_cmd_set_state state;
  425. struct dsi_display_mode *mode;
  426. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  427. if (!panel || !panel->cur_mode)
  428. return -EINVAL;
  429. mode = panel->cur_mode;
  430. cmds = mode->priv_info->cmd_sets[type].cmds;
  431. count = mode->priv_info->cmd_sets[type].count;
  432. state = mode->priv_info->cmd_sets[type].state;
  433. if (count == 0) {
  434. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  435. panel->name, type);
  436. goto error;
  437. }
  438. for (i = 0; i < count; i++) {
  439. if (state == DSI_CMD_SET_STATE_LP)
  440. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  441. if (cmds->last_command)
  442. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  443. len = ops->transfer(panel->host, &cmds->msg);
  444. if (len < 0) {
  445. rc = len;
  446. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  447. goto error;
  448. }
  449. if (cmds->post_wait_ms)
  450. usleep_range(cmds->post_wait_ms*1000,
  451. ((cmds->post_wait_ms*1000)+10));
  452. cmds++;
  453. }
  454. error:
  455. return rc;
  456. }
  457. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  458. {
  459. int rc = 0;
  460. if (panel->host_config.ext_bridge_mode)
  461. return 0;
  462. devm_pinctrl_put(panel->pinctrl.pinctrl);
  463. return rc;
  464. }
  465. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  466. {
  467. int rc = 0;
  468. if (panel->host_config.ext_bridge_mode)
  469. return 0;
  470. /* TODO: pinctrl is defined in dsi dt node */
  471. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  472. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  473. rc = PTR_ERR(panel->pinctrl.pinctrl);
  474. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  475. goto error;
  476. }
  477. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  478. "panel_active");
  479. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  480. rc = PTR_ERR(panel->pinctrl.active);
  481. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  482. goto error;
  483. }
  484. panel->pinctrl.suspend =
  485. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  486. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  487. rc = PTR_ERR(panel->pinctrl.suspend);
  488. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  489. goto error;
  490. }
  491. error:
  492. return rc;
  493. }
  494. static int dsi_panel_wled_register(struct dsi_panel *panel,
  495. struct dsi_backlight_config *bl)
  496. {
  497. struct backlight_device *bd;
  498. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  499. if (!bd) {
  500. DSI_ERR("[%s] fail raw backlight register\n", panel->name);
  501. return -EPROBE_DEFER;
  502. }
  503. bl->raw_bd = bd;
  504. return 0;
  505. }
  506. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  507. u32 bl_lvl)
  508. {
  509. int rc = 0;
  510. struct mipi_dsi_device *dsi;
  511. if (!panel || (bl_lvl > 0xffff)) {
  512. DSI_ERR("invalid params\n");
  513. return -EINVAL;
  514. }
  515. dsi = &panel->mipi_device;
  516. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  517. if (rc < 0)
  518. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  519. return rc;
  520. }
  521. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  522. u32 bl_lvl)
  523. {
  524. int rc = 0;
  525. u32 duty = 0;
  526. u32 period_ns = 0;
  527. struct dsi_backlight_config *bl;
  528. if (!panel) {
  529. DSI_ERR("Invalid Params\n");
  530. return -EINVAL;
  531. }
  532. bl = &panel->bl_config;
  533. if (!bl->pwm_bl) {
  534. DSI_ERR("pwm device not found\n");
  535. return -EINVAL;
  536. }
  537. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  538. duty = bl_lvl * period_ns;
  539. duty /= bl->bl_max_level;
  540. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  541. if (rc) {
  542. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  543. rc);
  544. goto error;
  545. }
  546. if (bl_lvl == 0 && bl->pwm_enabled) {
  547. pwm_disable(bl->pwm_bl);
  548. bl->pwm_enabled = false;
  549. return 0;
  550. }
  551. if (!bl->pwm_enabled) {
  552. rc = pwm_enable(bl->pwm_bl);
  553. if (rc) {
  554. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  555. rc);
  556. goto error;
  557. }
  558. bl->pwm_enabled = true;
  559. }
  560. error:
  561. return rc;
  562. }
  563. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  564. {
  565. int rc = 0;
  566. struct dsi_backlight_config *bl = &panel->bl_config;
  567. if (panel->host_config.ext_bridge_mode)
  568. return 0;
  569. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  570. switch (bl->type) {
  571. case DSI_BACKLIGHT_WLED:
  572. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  573. break;
  574. case DSI_BACKLIGHT_DCS:
  575. rc = dsi_panel_update_backlight(panel, bl_lvl);
  576. break;
  577. case DSI_BACKLIGHT_EXTERNAL:
  578. break;
  579. case DSI_BACKLIGHT_PWM:
  580. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  581. break;
  582. default:
  583. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  584. rc = -ENOTSUPP;
  585. }
  586. return rc;
  587. }
  588. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  589. {
  590. u32 cur_bl_level;
  591. struct backlight_device *bd = bl->raw_bd;
  592. /* default the brightness level to 50% */
  593. cur_bl_level = bl->bl_max_level >> 1;
  594. switch (bl->type) {
  595. case DSI_BACKLIGHT_WLED:
  596. /* Try to query the backlight level from the backlight device */
  597. if (bd->ops && bd->ops->get_brightness)
  598. cur_bl_level = bd->ops->get_brightness(bd);
  599. break;
  600. case DSI_BACKLIGHT_DCS:
  601. case DSI_BACKLIGHT_EXTERNAL:
  602. case DSI_BACKLIGHT_PWM:
  603. default:
  604. /*
  605. * Ideally, we should read the backlight level from the
  606. * panel. For now, just set it default value.
  607. */
  608. break;
  609. }
  610. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  611. return cur_bl_level;
  612. }
  613. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  614. {
  615. struct dsi_backlight_config *bl = &panel->bl_config;
  616. bl->bl_level = dsi_panel_get_brightness(bl);
  617. }
  618. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  619. {
  620. int rc = 0;
  621. struct dsi_backlight_config *bl = &panel->bl_config;
  622. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  623. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  624. rc = PTR_ERR(bl->pwm_bl);
  625. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  626. rc);
  627. return rc;
  628. }
  629. return 0;
  630. }
  631. static int dsi_panel_bl_register(struct dsi_panel *panel)
  632. {
  633. int rc = 0;
  634. struct dsi_backlight_config *bl = &panel->bl_config;
  635. if (panel->host_config.ext_bridge_mode)
  636. return 0;
  637. switch (bl->type) {
  638. case DSI_BACKLIGHT_WLED:
  639. rc = dsi_panel_wled_register(panel, bl);
  640. break;
  641. case DSI_BACKLIGHT_DCS:
  642. break;
  643. case DSI_BACKLIGHT_EXTERNAL:
  644. break;
  645. case DSI_BACKLIGHT_PWM:
  646. rc = dsi_panel_pwm_register(panel);
  647. break;
  648. default:
  649. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  650. rc = -ENOTSUPP;
  651. goto error;
  652. }
  653. error:
  654. return rc;
  655. }
  656. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  657. {
  658. struct dsi_backlight_config *bl = &panel->bl_config;
  659. devm_pwm_put(panel->parent, bl->pwm_bl);
  660. }
  661. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  662. {
  663. int rc = 0;
  664. struct dsi_backlight_config *bl = &panel->bl_config;
  665. if (panel->host_config.ext_bridge_mode)
  666. return 0;
  667. switch (bl->type) {
  668. case DSI_BACKLIGHT_WLED:
  669. break;
  670. case DSI_BACKLIGHT_DCS:
  671. break;
  672. case DSI_BACKLIGHT_EXTERNAL:
  673. break;
  674. case DSI_BACKLIGHT_PWM:
  675. dsi_panel_pwm_unregister(panel);
  676. break;
  677. default:
  678. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  679. rc = -ENOTSUPP;
  680. goto error;
  681. }
  682. error:
  683. return rc;
  684. }
  685. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  686. struct dsi_parser_utils *utils)
  687. {
  688. int rc = 0;
  689. u64 tmp64 = 0;
  690. struct dsi_display_mode *display_mode;
  691. struct dsi_display_mode_priv_info *priv_info;
  692. display_mode = container_of(mode, struct dsi_display_mode, timing);
  693. priv_info = display_mode->priv_info;
  694. rc = utils->read_u64(utils->data,
  695. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  696. if (rc == -EOVERFLOW) {
  697. tmp64 = 0;
  698. rc = utils->read_u32(utils->data,
  699. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  700. }
  701. mode->clk_rate_hz = !rc ? tmp64 : 0;
  702. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  703. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  704. &mode->mdp_transfer_time_us);
  705. if (!rc)
  706. display_mode->priv_info->mdp_transfer_time_us =
  707. mode->mdp_transfer_time_us;
  708. else
  709. display_mode->priv_info->mdp_transfer_time_us = 0;
  710. rc = utils->read_u32(utils->data,
  711. "qcom,mdss-dsi-panel-framerate",
  712. &mode->refresh_rate);
  713. if (rc) {
  714. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  715. rc);
  716. goto error;
  717. }
  718. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  719. &mode->h_active);
  720. if (rc) {
  721. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  722. rc);
  723. goto error;
  724. }
  725. rc = utils->read_u32(utils->data,
  726. "qcom,mdss-dsi-h-front-porch",
  727. &mode->h_front_porch);
  728. if (rc) {
  729. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  730. rc);
  731. goto error;
  732. }
  733. rc = utils->read_u32(utils->data,
  734. "qcom,mdss-dsi-h-back-porch",
  735. &mode->h_back_porch);
  736. if (rc) {
  737. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  738. rc);
  739. goto error;
  740. }
  741. rc = utils->read_u32(utils->data,
  742. "qcom,mdss-dsi-h-pulse-width",
  743. &mode->h_sync_width);
  744. if (rc) {
  745. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  746. rc);
  747. goto error;
  748. }
  749. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  750. &mode->h_skew);
  751. if (rc)
  752. DSI_ERR("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  753. rc);
  754. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  755. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  756. mode->h_sync_width);
  757. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  758. &mode->v_active);
  759. if (rc) {
  760. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  761. rc);
  762. goto error;
  763. }
  764. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  765. &mode->v_back_porch);
  766. if (rc) {
  767. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  768. rc);
  769. goto error;
  770. }
  771. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  772. &mode->v_front_porch);
  773. if (rc) {
  774. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  775. rc);
  776. goto error;
  777. }
  778. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  779. &mode->v_sync_width);
  780. if (rc) {
  781. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  782. rc);
  783. goto error;
  784. }
  785. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  786. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  787. mode->v_sync_width);
  788. error:
  789. return rc;
  790. }
  791. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  792. struct dsi_parser_utils *utils,
  793. const char *name)
  794. {
  795. int rc = 0;
  796. u32 bpp = 0;
  797. enum dsi_pixel_format fmt;
  798. const char *packing;
  799. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  800. if (rc) {
  801. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  802. name, rc);
  803. return rc;
  804. }
  805. host->bpp = bpp;
  806. switch (bpp) {
  807. case 3:
  808. fmt = DSI_PIXEL_FORMAT_RGB111;
  809. break;
  810. case 8:
  811. fmt = DSI_PIXEL_FORMAT_RGB332;
  812. break;
  813. case 12:
  814. fmt = DSI_PIXEL_FORMAT_RGB444;
  815. break;
  816. case 16:
  817. fmt = DSI_PIXEL_FORMAT_RGB565;
  818. break;
  819. case 18:
  820. fmt = DSI_PIXEL_FORMAT_RGB666;
  821. break;
  822. case 24:
  823. default:
  824. fmt = DSI_PIXEL_FORMAT_RGB888;
  825. break;
  826. }
  827. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  828. packing = utils->get_property(utils->data,
  829. "qcom,mdss-dsi-pixel-packing",
  830. NULL);
  831. if (packing && !strcmp(packing, "loose"))
  832. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  833. }
  834. host->dst_format = fmt;
  835. return rc;
  836. }
  837. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  838. struct dsi_parser_utils *utils,
  839. const char *name)
  840. {
  841. int rc = 0;
  842. bool lane_enabled;
  843. u32 num_of_lanes = 0;
  844. lane_enabled = utils->read_bool(utils->data,
  845. "qcom,mdss-dsi-lane-0-state");
  846. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  847. lane_enabled = utils->read_bool(utils->data,
  848. "qcom,mdss-dsi-lane-1-state");
  849. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  850. lane_enabled = utils->read_bool(utils->data,
  851. "qcom,mdss-dsi-lane-2-state");
  852. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  853. lane_enabled = utils->read_bool(utils->data,
  854. "qcom,mdss-dsi-lane-3-state");
  855. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  856. if (host->data_lanes & DSI_DATA_LANE_0)
  857. num_of_lanes++;
  858. if (host->data_lanes & DSI_DATA_LANE_1)
  859. num_of_lanes++;
  860. if (host->data_lanes & DSI_DATA_LANE_2)
  861. num_of_lanes++;
  862. if (host->data_lanes & DSI_DATA_LANE_3)
  863. num_of_lanes++;
  864. host->num_data_lanes = num_of_lanes;
  865. if (host->data_lanes == 0) {
  866. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  867. rc = -EINVAL;
  868. }
  869. return rc;
  870. }
  871. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  872. struct dsi_parser_utils *utils,
  873. const char *name)
  874. {
  875. int rc = 0;
  876. const char *swap_mode;
  877. swap_mode = utils->get_property(utils->data,
  878. "qcom,mdss-dsi-color-order", NULL);
  879. if (swap_mode) {
  880. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  881. host->swap_mode = DSI_COLOR_SWAP_RGB;
  882. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  883. host->swap_mode = DSI_COLOR_SWAP_RBG;
  884. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  885. host->swap_mode = DSI_COLOR_SWAP_BRG;
  886. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  887. host->swap_mode = DSI_COLOR_SWAP_GRB;
  888. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  889. host->swap_mode = DSI_COLOR_SWAP_GBR;
  890. } else {
  891. DSI_ERR("[%s] Unrecognized color order-%s\n",
  892. name, swap_mode);
  893. rc = -EINVAL;
  894. }
  895. } else {
  896. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  897. host->swap_mode = DSI_COLOR_SWAP_RGB;
  898. }
  899. /* bit swap on color channel is not defined in dt */
  900. host->bit_swap_red = false;
  901. host->bit_swap_green = false;
  902. host->bit_swap_blue = false;
  903. return rc;
  904. }
  905. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  906. struct dsi_parser_utils *utils,
  907. const char *name)
  908. {
  909. const char *trig;
  910. int rc = 0;
  911. trig = utils->get_property(utils->data,
  912. "qcom,mdss-dsi-mdp-trigger", NULL);
  913. if (trig) {
  914. if (!strcmp(trig, "none")) {
  915. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  916. } else if (!strcmp(trig, "trigger_te")) {
  917. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  918. } else if (!strcmp(trig, "trigger_sw")) {
  919. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  920. } else if (!strcmp(trig, "trigger_sw_te")) {
  921. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  922. } else {
  923. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  924. name, trig);
  925. rc = -EINVAL;
  926. }
  927. } else {
  928. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  929. name);
  930. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  931. }
  932. trig = utils->get_property(utils->data,
  933. "qcom,mdss-dsi-dma-trigger", NULL);
  934. if (trig) {
  935. if (!strcmp(trig, "none")) {
  936. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  937. } else if (!strcmp(trig, "trigger_te")) {
  938. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  939. } else if (!strcmp(trig, "trigger_sw")) {
  940. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  941. } else if (!strcmp(trig, "trigger_sw_seof")) {
  942. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  943. } else if (!strcmp(trig, "trigger_sw_te")) {
  944. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  945. } else {
  946. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  947. name, trig);
  948. rc = -EINVAL;
  949. }
  950. } else {
  951. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  952. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  953. }
  954. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  955. &host->te_mode);
  956. if (rc) {
  957. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  958. host->te_mode = 1;
  959. rc = 0;
  960. }
  961. return rc;
  962. }
  963. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  964. struct dsi_parser_utils *utils,
  965. const char *name)
  966. {
  967. u32 val = 0;
  968. int rc = 0;
  969. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  970. if (!rc) {
  971. host->t_clk_post = val;
  972. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  973. }
  974. val = 0;
  975. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  976. if (!rc) {
  977. host->t_clk_pre = val;
  978. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  979. }
  980. host->ignore_rx_eot = utils->read_bool(utils->data,
  981. "qcom,mdss-dsi-rx-eot-ignore");
  982. host->append_tx_eot = utils->read_bool(utils->data,
  983. "qcom,mdss-dsi-tx-eot-append");
  984. host->ext_bridge_mode = utils->read_bool(utils->data,
  985. "qcom,mdss-dsi-ext-bridge-mode");
  986. host->force_hs_clk_lane = utils->read_bool(utils->data,
  987. "qcom,mdss-dsi-force-clock-lane-hs");
  988. return 0;
  989. }
  990. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  991. struct dsi_parser_utils *utils,
  992. const char *name)
  993. {
  994. int rc = 0;
  995. u32 val = 0;
  996. bool supported = false;
  997. struct dsi_split_link_config *split_link = &host->split_link;
  998. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  999. if (!supported) {
  1000. DSI_DEBUG("[%s] Split link is not supported\n", name);
  1001. split_link->split_link_enabled = false;
  1002. return;
  1003. }
  1004. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  1005. if (rc || val < 1) {
  1006. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  1007. split_link->num_sublinks = 2;
  1008. } else {
  1009. split_link->num_sublinks = val;
  1010. }
  1011. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  1012. if (rc || val < 1) {
  1013. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  1014. split_link->lanes_per_sublink = 2;
  1015. } else {
  1016. split_link->lanes_per_sublink = val;
  1017. }
  1018. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1019. split_link->num_sublinks, split_link->lanes_per_sublink);
  1020. split_link->split_link_enabled = true;
  1021. }
  1022. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1023. {
  1024. int rc = 0;
  1025. struct dsi_parser_utils *utils = &panel->utils;
  1026. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1027. panel->name);
  1028. if (rc) {
  1029. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1030. panel->name, rc);
  1031. goto error;
  1032. }
  1033. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1034. panel->name);
  1035. if (rc) {
  1036. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1037. panel->name, rc);
  1038. goto error;
  1039. }
  1040. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1041. panel->name);
  1042. if (rc) {
  1043. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1044. panel->name, rc);
  1045. goto error;
  1046. }
  1047. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1048. panel->name);
  1049. if (rc) {
  1050. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1051. panel->name, rc);
  1052. goto error;
  1053. }
  1054. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1055. panel->name);
  1056. if (rc) {
  1057. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1058. panel->name, rc);
  1059. goto error;
  1060. }
  1061. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1062. panel->name);
  1063. error:
  1064. return rc;
  1065. }
  1066. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1067. struct device_node *of_node)
  1068. {
  1069. int rc = 0;
  1070. u32 val = 0;
  1071. rc = of_property_read_u32(of_node,
  1072. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1073. &val);
  1074. if (rc)
  1075. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1076. panel->name, rc);
  1077. panel->qsync_min_fps = val;
  1078. return rc;
  1079. }
  1080. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1081. {
  1082. int rc = 0;
  1083. bool supported = false;
  1084. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1085. struct dsi_parser_utils *utils = &panel->utils;
  1086. const char *name = panel->name;
  1087. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1088. if (!supported) {
  1089. dyn_clk_caps->dyn_clk_support = false;
  1090. return rc;
  1091. }
  1092. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1093. "qcom,dsi-dyn-clk-list");
  1094. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1095. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1096. return -EINVAL;
  1097. }
  1098. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1099. sizeof(u32), GFP_KERNEL);
  1100. if (!dyn_clk_caps->bit_clk_list)
  1101. return -ENOMEM;
  1102. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1103. dyn_clk_caps->bit_clk_list,
  1104. dyn_clk_caps->bit_clk_list_len);
  1105. if (rc) {
  1106. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1107. return -EINVAL;
  1108. }
  1109. dyn_clk_caps->dyn_clk_support = true;
  1110. return 0;
  1111. }
  1112. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1113. {
  1114. int rc = 0;
  1115. bool supported = false;
  1116. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1117. struct dsi_parser_utils *utils = &panel->utils;
  1118. const char *name = panel->name;
  1119. const char *type;
  1120. u32 i;
  1121. supported = utils->read_bool(utils->data,
  1122. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1123. if (!supported) {
  1124. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1125. dfps_caps->dfps_support = false;
  1126. return rc;
  1127. }
  1128. type = utils->get_property(utils->data,
  1129. "qcom,mdss-dsi-pan-fps-update", NULL);
  1130. if (!type) {
  1131. DSI_ERR("[%s] dfps type not defined\n", name);
  1132. rc = -EINVAL;
  1133. goto error;
  1134. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1135. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1136. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1137. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1138. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1139. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1140. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1141. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1142. } else {
  1143. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1144. rc = -EINVAL;
  1145. goto error;
  1146. }
  1147. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1148. "qcom,dsi-supported-dfps-list");
  1149. if (dfps_caps->dfps_list_len < 1) {
  1150. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1151. rc = -EINVAL;
  1152. goto error;
  1153. }
  1154. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1155. GFP_KERNEL);
  1156. if (!dfps_caps->dfps_list) {
  1157. rc = -ENOMEM;
  1158. goto error;
  1159. }
  1160. rc = utils->read_u32_array(utils->data,
  1161. "qcom,dsi-supported-dfps-list",
  1162. dfps_caps->dfps_list,
  1163. dfps_caps->dfps_list_len);
  1164. if (rc) {
  1165. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1166. rc = -EINVAL;
  1167. goto error;
  1168. }
  1169. dfps_caps->dfps_support = true;
  1170. /* calculate max and min fps */
  1171. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1172. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1173. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1174. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1175. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1176. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1177. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1178. }
  1179. error:
  1180. return rc;
  1181. }
  1182. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1183. struct dsi_parser_utils *utils,
  1184. const char *name)
  1185. {
  1186. int rc = 0;
  1187. const char *traffic_mode;
  1188. u32 vc_id = 0;
  1189. u32 val = 0;
  1190. u32 line_no = 0;
  1191. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1192. if (rc) {
  1193. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1194. cfg->pulse_mode_hsa_he = false;
  1195. } else if (val == 1) {
  1196. cfg->pulse_mode_hsa_he = true;
  1197. } else if (val == 0) {
  1198. cfg->pulse_mode_hsa_he = false;
  1199. } else {
  1200. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1201. name);
  1202. rc = -EINVAL;
  1203. goto error;
  1204. }
  1205. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1206. "qcom,mdss-dsi-hfp-power-mode");
  1207. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1208. "qcom,mdss-dsi-hbp-power-mode");
  1209. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1210. "qcom,mdss-dsi-hsa-power-mode");
  1211. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1212. "qcom,mdss-dsi-last-line-interleave");
  1213. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1214. "qcom,mdss-dsi-bllp-eof-power-mode");
  1215. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1216. "qcom,mdss-dsi-bllp-power-mode");
  1217. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1218. "qcom,mdss-dsi-force-clock-lane-hs");
  1219. traffic_mode = utils->get_property(utils->data,
  1220. "qcom,mdss-dsi-traffic-mode",
  1221. NULL);
  1222. if (!traffic_mode) {
  1223. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1224. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1225. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1226. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1227. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1228. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1229. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1230. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1231. } else {
  1232. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1233. traffic_mode);
  1234. rc = -EINVAL;
  1235. goto error;
  1236. }
  1237. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1238. &vc_id);
  1239. if (rc) {
  1240. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1241. cfg->vc_id = 0;
  1242. } else {
  1243. cfg->vc_id = vc_id;
  1244. }
  1245. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1246. &line_no);
  1247. if (rc) {
  1248. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1249. cfg->dma_sched_line = 0x1;
  1250. /* do not fail since we have default value */
  1251. rc = 0;
  1252. } else {
  1253. cfg->dma_sched_line = line_no;
  1254. }
  1255. error:
  1256. return rc;
  1257. }
  1258. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1259. struct dsi_parser_utils *utils,
  1260. const char *name)
  1261. {
  1262. u32 val = 0;
  1263. int rc = 0;
  1264. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1265. if (rc) {
  1266. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1267. cfg->wr_mem_start = 0x2C;
  1268. } else {
  1269. cfg->wr_mem_start = val;
  1270. }
  1271. val = 0;
  1272. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1273. &val);
  1274. if (rc) {
  1275. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1276. cfg->wr_mem_continue = 0x3C;
  1277. } else {
  1278. cfg->wr_mem_continue = val;
  1279. }
  1280. /* TODO: fix following */
  1281. cfg->max_cmd_packets_interleave = 0;
  1282. val = 0;
  1283. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1284. &val);
  1285. if (rc) {
  1286. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1287. cfg->insert_dcs_command = true;
  1288. } else if (val == 1) {
  1289. cfg->insert_dcs_command = true;
  1290. } else if (val == 0) {
  1291. cfg->insert_dcs_command = false;
  1292. } else {
  1293. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1294. name);
  1295. rc = -EINVAL;
  1296. goto error;
  1297. }
  1298. error:
  1299. return rc;
  1300. }
  1301. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1302. {
  1303. int rc = 0;
  1304. struct dsi_parser_utils *utils = &panel->utils;
  1305. bool panel_mode_switch_enabled;
  1306. enum dsi_op_mode panel_mode;
  1307. const char *mode;
  1308. mode = utils->get_property(utils->data,
  1309. "qcom,mdss-dsi-panel-type", NULL);
  1310. if (!mode) {
  1311. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1312. panel_mode = DSI_OP_VIDEO_MODE;
  1313. } else if (!strcmp(mode, "dsi_video_mode")) {
  1314. panel_mode = DSI_OP_VIDEO_MODE;
  1315. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1316. panel_mode = DSI_OP_CMD_MODE;
  1317. } else {
  1318. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1319. rc = -EINVAL;
  1320. goto error;
  1321. }
  1322. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1323. "qcom,mdss-dsi-panel-mode-switch");
  1324. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1325. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1326. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1327. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1328. utils,
  1329. panel->name);
  1330. if (rc) {
  1331. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1332. panel->name, rc);
  1333. goto error;
  1334. }
  1335. }
  1336. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1337. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1338. utils,
  1339. panel->name);
  1340. if (rc) {
  1341. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1342. panel->name, rc);
  1343. goto error;
  1344. }
  1345. }
  1346. panel->panel_mode = panel_mode;
  1347. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1348. error:
  1349. return rc;
  1350. }
  1351. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1352. {
  1353. int rc = 0;
  1354. u32 val = 0;
  1355. const char *str;
  1356. struct dsi_panel_phy_props *props = &panel->phy_props;
  1357. struct dsi_parser_utils *utils = &panel->utils;
  1358. const char *name = panel->name;
  1359. rc = utils->read_u32(utils->data,
  1360. "qcom,mdss-pan-physical-width-dimension", &val);
  1361. if (rc) {
  1362. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1363. props->panel_width_mm = 0;
  1364. rc = 0;
  1365. } else {
  1366. props->panel_width_mm = val;
  1367. }
  1368. rc = utils->read_u32(utils->data,
  1369. "qcom,mdss-pan-physical-height-dimension",
  1370. &val);
  1371. if (rc) {
  1372. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1373. props->panel_height_mm = 0;
  1374. rc = 0;
  1375. } else {
  1376. props->panel_height_mm = val;
  1377. }
  1378. str = utils->get_property(utils->data,
  1379. "qcom,mdss-dsi-panel-orientation", NULL);
  1380. if (!str) {
  1381. props->rotation = DSI_PANEL_ROTATE_NONE;
  1382. } else if (!strcmp(str, "180")) {
  1383. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1384. } else if (!strcmp(str, "hflip")) {
  1385. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1386. } else if (!strcmp(str, "vflip")) {
  1387. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1388. } else {
  1389. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1390. rc = -EINVAL;
  1391. goto error;
  1392. }
  1393. error:
  1394. return rc;
  1395. }
  1396. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1397. "qcom,mdss-dsi-pre-on-command",
  1398. "qcom,mdss-dsi-on-command",
  1399. "qcom,mdss-dsi-post-panel-on-command",
  1400. "qcom,mdss-dsi-pre-off-command",
  1401. "qcom,mdss-dsi-off-command",
  1402. "qcom,mdss-dsi-post-off-command",
  1403. "qcom,mdss-dsi-pre-res-switch",
  1404. "qcom,mdss-dsi-res-switch",
  1405. "qcom,mdss-dsi-post-res-switch",
  1406. "qcom,cmd-to-video-mode-switch-commands",
  1407. "qcom,cmd-to-video-mode-post-switch-commands",
  1408. "qcom,video-to-cmd-mode-switch-commands",
  1409. "qcom,video-to-cmd-mode-post-switch-commands",
  1410. "qcom,mdss-dsi-panel-status-command",
  1411. "qcom,mdss-dsi-lp1-command",
  1412. "qcom,mdss-dsi-lp2-command",
  1413. "qcom,mdss-dsi-nolp-command",
  1414. "PPS not parsed from DTSI, generated dynamically",
  1415. "ROI not parsed from DTSI, generated dynamically",
  1416. "qcom,mdss-dsi-timing-switch-command",
  1417. "qcom,mdss-dsi-post-mode-switch-on-command",
  1418. "qcom,mdss-dsi-qsync-on-commands",
  1419. "qcom,mdss-dsi-qsync-off-commands",
  1420. };
  1421. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1422. "qcom,mdss-dsi-pre-on-command-state",
  1423. "qcom,mdss-dsi-on-command-state",
  1424. "qcom,mdss-dsi-post-on-command-state",
  1425. "qcom,mdss-dsi-pre-off-command-state",
  1426. "qcom,mdss-dsi-off-command-state",
  1427. "qcom,mdss-dsi-post-off-command-state",
  1428. "qcom,mdss-dsi-pre-res-switch-state",
  1429. "qcom,mdss-dsi-res-switch-state",
  1430. "qcom,mdss-dsi-post-res-switch-state",
  1431. "qcom,cmd-to-video-mode-switch-commands-state",
  1432. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1433. "qcom,video-to-cmd-mode-switch-commands-state",
  1434. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1435. "qcom,mdss-dsi-panel-status-command-state",
  1436. "qcom,mdss-dsi-lp1-command-state",
  1437. "qcom,mdss-dsi-lp2-command-state",
  1438. "qcom,mdss-dsi-nolp-command-state",
  1439. "PPS not parsed from DTSI, generated dynamically",
  1440. "ROI not parsed from DTSI, generated dynamically",
  1441. "qcom,mdss-dsi-timing-switch-command-state",
  1442. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1443. "qcom,mdss-dsi-qsync-on-commands-state",
  1444. "qcom,mdss-dsi-qsync-off-commands-state",
  1445. };
  1446. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1447. {
  1448. const u32 cmd_set_min_size = 7;
  1449. u32 count = 0;
  1450. u32 packet_length;
  1451. u32 tmp;
  1452. while (length >= cmd_set_min_size) {
  1453. packet_length = cmd_set_min_size;
  1454. tmp = ((data[5] << 8) | (data[6]));
  1455. packet_length += tmp;
  1456. if (packet_length > length) {
  1457. DSI_ERR("format error\n");
  1458. return -EINVAL;
  1459. }
  1460. length -= packet_length;
  1461. data += packet_length;
  1462. count++;
  1463. }
  1464. *cnt = count;
  1465. return 0;
  1466. }
  1467. static int dsi_panel_create_cmd_packets(const char *data,
  1468. u32 length,
  1469. u32 count,
  1470. struct dsi_cmd_desc *cmd)
  1471. {
  1472. int rc = 0;
  1473. int i, j;
  1474. u8 *payload;
  1475. for (i = 0; i < count; i++) {
  1476. u32 size;
  1477. cmd[i].msg.type = data[0];
  1478. cmd[i].last_command = (data[1] == 1);
  1479. cmd[i].msg.channel = data[2];
  1480. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1481. cmd[i].msg.ctrl = 0;
  1482. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1483. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1484. size = cmd[i].msg.tx_len * sizeof(u8);
  1485. payload = kzalloc(size, GFP_KERNEL);
  1486. if (!payload) {
  1487. rc = -ENOMEM;
  1488. goto error_free_payloads;
  1489. }
  1490. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1491. payload[j] = data[7 + j];
  1492. cmd[i].msg.tx_buf = payload;
  1493. data += (7 + cmd[i].msg.tx_len);
  1494. }
  1495. return rc;
  1496. error_free_payloads:
  1497. for (i = i - 1; i >= 0; i--) {
  1498. cmd--;
  1499. kfree(cmd->msg.tx_buf);
  1500. }
  1501. return rc;
  1502. }
  1503. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1504. {
  1505. u32 i = 0;
  1506. struct dsi_cmd_desc *cmd;
  1507. for (i = 0; i < set->count; i++) {
  1508. cmd = &set->cmds[i];
  1509. kfree(cmd->msg.tx_buf);
  1510. }
  1511. }
  1512. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1513. {
  1514. kfree(set->cmds);
  1515. }
  1516. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1517. u32 packet_count)
  1518. {
  1519. u32 size;
  1520. size = packet_count * sizeof(*cmd->cmds);
  1521. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1522. if (!cmd->cmds)
  1523. return -ENOMEM;
  1524. cmd->count = packet_count;
  1525. return 0;
  1526. }
  1527. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1528. enum dsi_cmd_set_type type,
  1529. struct dsi_parser_utils *utils)
  1530. {
  1531. int rc = 0;
  1532. u32 length = 0;
  1533. const char *data;
  1534. const char *state;
  1535. u32 packet_count = 0;
  1536. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1537. &length);
  1538. if (!data) {
  1539. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1540. rc = -ENOTSUPP;
  1541. goto error;
  1542. }
  1543. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1544. cmd_set_prop_map[type], length);
  1545. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1546. 8, 1, data, length, false);
  1547. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1548. if (rc) {
  1549. DSI_ERR("commands failed, rc=%d\n", rc);
  1550. goto error;
  1551. }
  1552. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1553. packet_count, length);
  1554. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1555. if (rc) {
  1556. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1557. goto error;
  1558. }
  1559. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1560. cmd->cmds);
  1561. if (rc) {
  1562. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1563. goto error_free_mem;
  1564. }
  1565. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1566. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1567. cmd->state = DSI_CMD_SET_STATE_LP;
  1568. } else if (!strcmp(state, "dsi_hs_mode")) {
  1569. cmd->state = DSI_CMD_SET_STATE_HS;
  1570. } else {
  1571. DSI_ERR("[%s] command state unrecognized-%s\n",
  1572. cmd_set_state_map[type], state);
  1573. goto error_free_mem;
  1574. }
  1575. return rc;
  1576. error_free_mem:
  1577. kfree(cmd->cmds);
  1578. cmd->cmds = NULL;
  1579. error:
  1580. return rc;
  1581. }
  1582. static int dsi_panel_parse_cmd_sets(
  1583. struct dsi_display_mode_priv_info *priv_info,
  1584. struct dsi_parser_utils *utils)
  1585. {
  1586. int rc = 0;
  1587. struct dsi_panel_cmd_set *set;
  1588. u32 i;
  1589. if (!priv_info) {
  1590. DSI_ERR("invalid mode priv info\n");
  1591. return -EINVAL;
  1592. }
  1593. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1594. set = &priv_info->cmd_sets[i];
  1595. set->type = i;
  1596. set->count = 0;
  1597. if (i == DSI_CMD_SET_PPS) {
  1598. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1599. if (rc)
  1600. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1601. i, rc);
  1602. set->state = DSI_CMD_SET_STATE_LP;
  1603. } else {
  1604. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1605. if (rc)
  1606. DSI_DEBUG("failed to parse set %d\n", i);
  1607. }
  1608. }
  1609. rc = 0;
  1610. return rc;
  1611. }
  1612. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1613. {
  1614. int rc = 0;
  1615. int i;
  1616. u32 length = 0;
  1617. u32 count = 0;
  1618. u32 size = 0;
  1619. u32 *arr_32 = NULL;
  1620. const u32 *arr;
  1621. struct dsi_parser_utils *utils = &panel->utils;
  1622. struct dsi_reset_seq *seq;
  1623. if (panel->host_config.ext_bridge_mode)
  1624. return 0;
  1625. arr = utils->get_property(utils->data,
  1626. "qcom,mdss-dsi-reset-sequence", &length);
  1627. if (!arr) {
  1628. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1629. rc = -EINVAL;
  1630. goto error;
  1631. }
  1632. if (length & 0x1) {
  1633. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1634. panel->name);
  1635. rc = -EINVAL;
  1636. goto error;
  1637. }
  1638. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1639. length = length / sizeof(u32);
  1640. size = length * sizeof(u32);
  1641. arr_32 = kzalloc(size, GFP_KERNEL);
  1642. if (!arr_32) {
  1643. rc = -ENOMEM;
  1644. goto error;
  1645. }
  1646. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1647. arr_32, length);
  1648. if (rc) {
  1649. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1650. goto error_free_arr_32;
  1651. }
  1652. count = length / 2;
  1653. size = count * sizeof(*seq);
  1654. seq = kzalloc(size, GFP_KERNEL);
  1655. if (!seq) {
  1656. rc = -ENOMEM;
  1657. goto error_free_arr_32;
  1658. }
  1659. panel->reset_config.sequence = seq;
  1660. panel->reset_config.count = count;
  1661. for (i = 0; i < length; i += 2) {
  1662. seq->level = arr_32[i];
  1663. seq->sleep_ms = arr_32[i + 1];
  1664. seq++;
  1665. }
  1666. error_free_arr_32:
  1667. kfree(arr_32);
  1668. error:
  1669. return rc;
  1670. }
  1671. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1672. {
  1673. struct dsi_parser_utils *utils = &panel->utils;
  1674. panel->ulps_feature_enabled =
  1675. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1676. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1677. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1678. panel->ulps_suspend_enabled =
  1679. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1680. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1681. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1682. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1683. "qcom,mdss-dsi-te-using-wd");
  1684. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1685. "qcom,cmd-sync-wait-broadcast");
  1686. panel->lp11_init = utils->read_bool(utils->data,
  1687. "qcom,mdss-dsi-lp11-init");
  1688. return 0;
  1689. }
  1690. static int dsi_panel_parse_jitter_config(
  1691. struct dsi_display_mode *mode,
  1692. struct dsi_parser_utils *utils)
  1693. {
  1694. int rc;
  1695. struct dsi_display_mode_priv_info *priv_info;
  1696. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1697. u64 jitter_val = 0;
  1698. priv_info = mode->priv_info;
  1699. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1700. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1701. if (rc) {
  1702. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1703. } else {
  1704. jitter_val = jitter[0];
  1705. jitter_val = div_u64(jitter_val, jitter[1]);
  1706. }
  1707. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1708. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1709. priv_info->panel_jitter_denom =
  1710. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1711. } else {
  1712. priv_info->panel_jitter_numer = jitter[0];
  1713. priv_info->panel_jitter_denom = jitter[1];
  1714. }
  1715. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1716. &priv_info->panel_prefill_lines);
  1717. if (rc) {
  1718. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1719. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1720. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1721. } else if (priv_info->panel_prefill_lines >=
  1722. DSI_V_TOTAL(&mode->timing)) {
  1723. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1724. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1725. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1726. }
  1727. return 0;
  1728. }
  1729. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1730. {
  1731. int rc = 0;
  1732. char *supply_name;
  1733. if (panel->host_config.ext_bridge_mode)
  1734. return 0;
  1735. if (!strcmp(panel->type, "primary"))
  1736. supply_name = "qcom,panel-supply-entries";
  1737. else
  1738. supply_name = "qcom,panel-sec-supply-entries";
  1739. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1740. &panel->power_info, supply_name);
  1741. if (rc) {
  1742. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1743. goto error;
  1744. }
  1745. error:
  1746. return rc;
  1747. }
  1748. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1749. {
  1750. int rc = 0;
  1751. const char *data;
  1752. struct dsi_parser_utils *utils = &panel->utils;
  1753. char *reset_gpio_name, *mode_set_gpio_name;
  1754. if (!strcmp(panel->type, "primary")) {
  1755. reset_gpio_name = "qcom,platform-reset-gpio";
  1756. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1757. } else {
  1758. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1759. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1760. }
  1761. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1762. reset_gpio_name, 0);
  1763. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1764. !panel->host_config.ext_bridge_mode) {
  1765. rc = panel->reset_config.reset_gpio;
  1766. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1767. goto error;
  1768. }
  1769. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1770. "qcom,5v-boost-gpio",
  1771. 0);
  1772. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1773. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1774. panel->name, rc);
  1775. panel->reset_config.disp_en_gpio =
  1776. utils->get_named_gpio(utils->data,
  1777. "qcom,platform-en-gpio", 0);
  1778. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1779. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1780. panel->name, rc);
  1781. }
  1782. }
  1783. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1784. utils->data, mode_set_gpio_name, 0);
  1785. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1786. DSI_DEBUG("mode gpio not specified\n");
  1787. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1788. data = utils->get_property(utils->data,
  1789. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1790. if (data) {
  1791. if (!strcmp(data, "single_port"))
  1792. panel->reset_config.mode_sel_state =
  1793. MODE_SEL_SINGLE_PORT;
  1794. else if (!strcmp(data, "dual_port"))
  1795. panel->reset_config.mode_sel_state =
  1796. MODE_SEL_DUAL_PORT;
  1797. else if (!strcmp(data, "high"))
  1798. panel->reset_config.mode_sel_state =
  1799. MODE_GPIO_HIGH;
  1800. else if (!strcmp(data, "low"))
  1801. panel->reset_config.mode_sel_state =
  1802. MODE_GPIO_LOW;
  1803. } else {
  1804. /* Set default mode as SPLIT mode */
  1805. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1806. }
  1807. /* TODO: release memory */
  1808. rc = dsi_panel_parse_reset_sequence(panel);
  1809. if (rc) {
  1810. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1811. panel->name, rc);
  1812. goto error;
  1813. }
  1814. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1815. "qcom,mdss-dsi-panel-test-pin",
  1816. 0);
  1817. if (!gpio_is_valid(panel->panel_test_gpio))
  1818. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1819. __LINE__);
  1820. error:
  1821. return rc;
  1822. }
  1823. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1824. {
  1825. int rc = 0;
  1826. u32 val;
  1827. struct dsi_backlight_config *config = &panel->bl_config;
  1828. struct dsi_parser_utils *utils = &panel->utils;
  1829. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1830. &val);
  1831. if (rc) {
  1832. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1833. goto error;
  1834. }
  1835. config->pwm_period_usecs = val;
  1836. error:
  1837. return rc;
  1838. }
  1839. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1840. {
  1841. int rc = 0;
  1842. u32 val = 0;
  1843. const char *bl_type;
  1844. const char *data;
  1845. struct dsi_parser_utils *utils = &panel->utils;
  1846. char *bl_name;
  1847. if (!strcmp(panel->type, "primary"))
  1848. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1849. else
  1850. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1851. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1852. if (!bl_type) {
  1853. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1854. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1855. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1856. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1857. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1858. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1859. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1860. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1861. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1862. } else {
  1863. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1864. panel->name, bl_type);
  1865. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1866. }
  1867. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1868. if (!data) {
  1869. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1870. } else if (!strcmp(data, "delay_until_first_frame")) {
  1871. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1872. } else {
  1873. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1874. panel->name, data);
  1875. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1876. }
  1877. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1878. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1879. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1880. if (rc) {
  1881. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1882. panel->name);
  1883. panel->bl_config.bl_min_level = 0;
  1884. } else {
  1885. panel->bl_config.bl_min_level = val;
  1886. }
  1887. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1888. if (rc) {
  1889. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1890. panel->name);
  1891. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1892. } else {
  1893. panel->bl_config.bl_max_level = val;
  1894. }
  1895. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1896. &val);
  1897. if (rc) {
  1898. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1899. panel->name);
  1900. panel->bl_config.brightness_max_level = 255;
  1901. } else {
  1902. panel->bl_config.brightness_max_level = val;
  1903. }
  1904. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1905. rc = dsi_panel_parse_bl_pwm_config(panel);
  1906. if (rc) {
  1907. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1908. panel->name, rc);
  1909. goto error;
  1910. }
  1911. }
  1912. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1913. "qcom,platform-bklight-en-gpio",
  1914. 0);
  1915. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1916. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1917. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1918. panel->name, rc);
  1919. rc = -EPROBE_DEFER;
  1920. goto error;
  1921. } else {
  1922. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1923. panel->name, rc);
  1924. rc = 0;
  1925. goto error;
  1926. }
  1927. }
  1928. error:
  1929. return rc;
  1930. }
  1931. void dsi_dsc_pclk_param_calc(struct msm_display_dsc_info *dsc, int intf_width)
  1932. {
  1933. int slice_per_pkt, slice_per_intf;
  1934. int bytes_in_slice, total_bytes_per_intf;
  1935. if (!dsc || !dsc->slice_width || !dsc->slice_per_pkt ||
  1936. (intf_width < dsc->slice_width)) {
  1937. DSI_ERR("invalid input, intf_width=%d slice_width=%d\n",
  1938. intf_width, dsc ? dsc->slice_width : -1);
  1939. return;
  1940. }
  1941. slice_per_pkt = dsc->slice_per_pkt;
  1942. slice_per_intf = DIV_ROUND_UP(intf_width, dsc->slice_width);
  1943. /*
  1944. * If slice_per_pkt is greater than slice_per_intf then default to 1.
  1945. * This can happen during partial update.
  1946. */
  1947. if (slice_per_pkt > slice_per_intf)
  1948. slice_per_pkt = 1;
  1949. bytes_in_slice = DIV_ROUND_UP(dsc->slice_width * dsc->bpp, 8);
  1950. total_bytes_per_intf = bytes_in_slice * slice_per_intf;
  1951. dsc->eol_byte_num = total_bytes_per_intf % 3;
  1952. dsc->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf, 3);
  1953. dsc->bytes_in_slice = bytes_in_slice;
  1954. dsc->bytes_per_pkt = bytes_in_slice * slice_per_pkt;
  1955. dsc->pkt_per_line = slice_per_intf / slice_per_pkt;
  1956. }
  1957. int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
  1958. {
  1959. int bpp, bpc;
  1960. int mux_words_size;
  1961. int groups_per_line, groups_total;
  1962. int min_rate_buffer_size;
  1963. int hrd_delay;
  1964. int pre_num_extra_mux_bits, num_extra_mux_bits;
  1965. int slice_bits;
  1966. int data;
  1967. int final_value, final_scale;
  1968. int ratio_index, mod_offset;
  1969. dsc->rc_model_size = 8192;
  1970. if (dsc->version == 0x11 && dsc->scr_rev == 0x1)
  1971. dsc->first_line_bpg_offset = 15;
  1972. else
  1973. dsc->first_line_bpg_offset = 12;
  1974. dsc->edge_factor = 6;
  1975. dsc->tgt_offset_hi = 3;
  1976. dsc->tgt_offset_lo = 3;
  1977. dsc->enable_422 = 0;
  1978. dsc->convert_rgb = 1;
  1979. dsc->vbr_enable = 0;
  1980. dsc->buf_thresh = dsi_dsc_rc_buf_thresh;
  1981. bpp = dsc->bpp;
  1982. bpc = dsc->bpc;
  1983. if ((bpc == 12) && (bpp == 8))
  1984. ratio_index = DSC_12BPC_8BPP;
  1985. else if ((bpc == 10) && (bpp == 8))
  1986. ratio_index = DSC_10BPC_8BPP;
  1987. else if ((bpc == 10) && (bpp == 10))
  1988. ratio_index = DSC_10BPC_10BPP;
  1989. else
  1990. ratio_index = DSC_8BPC_8BPP;
  1991. if (dsc->version == 0x11 && dsc->scr_rev == 0x1) {
  1992. dsc->range_min_qp =
  1993. dsi_dsc_rc_range_min_qp_1_1_scr1[ratio_index];
  1994. dsc->range_max_qp =
  1995. dsi_dsc_rc_range_max_qp_1_1_scr1[ratio_index];
  1996. } else {
  1997. dsc->range_min_qp = dsi_dsc_rc_range_min_qp_1_1[ratio_index];
  1998. dsc->range_max_qp = dsi_dsc_rc_range_max_qp_1_1[ratio_index];
  1999. }
  2000. dsc->range_bpg_offset = dsi_dsc_rc_range_bpg_offset;
  2001. if (bpp == 8) {
  2002. dsc->initial_offset = 6144;
  2003. dsc->initial_xmit_delay = 512;
  2004. } else if (bpp == 10) {
  2005. dsc->initial_offset = 5632;
  2006. dsc->initial_xmit_delay = 410;
  2007. } else {
  2008. dsc->initial_offset = 2048;
  2009. dsc->initial_xmit_delay = 341;
  2010. }
  2011. dsc->line_buf_depth = bpc + 1;
  2012. if (bpc == 8) {
  2013. dsc->input_10_bits = 0;
  2014. dsc->min_qp_flatness = 3;
  2015. dsc->max_qp_flatness = 12;
  2016. dsc->quant_incr_limit0 = 11;
  2017. dsc->quant_incr_limit1 = 11;
  2018. mux_words_size = 48;
  2019. } else if (bpc == 10) { /* 10bpc */
  2020. dsc->input_10_bits = 1;
  2021. dsc->min_qp_flatness = 7;
  2022. dsc->max_qp_flatness = 16;
  2023. dsc->quant_incr_limit0 = 15;
  2024. dsc->quant_incr_limit1 = 15;
  2025. mux_words_size = 48;
  2026. } else { /* 12 bpc */
  2027. dsc->input_10_bits = 0;
  2028. dsc->min_qp_flatness = 11;
  2029. dsc->max_qp_flatness = 20;
  2030. dsc->quant_incr_limit0 = 19;
  2031. dsc->quant_incr_limit1 = 19;
  2032. mux_words_size = 64;
  2033. }
  2034. mod_offset = dsc->slice_width % 3;
  2035. switch (mod_offset) {
  2036. case 0:
  2037. dsc->slice_last_group_size = 2;
  2038. break;
  2039. case 1:
  2040. dsc->slice_last_group_size = 0;
  2041. break;
  2042. case 2:
  2043. dsc->slice_last_group_size = 1;
  2044. break;
  2045. default:
  2046. break;
  2047. }
  2048. dsc->det_thresh_flatness = 2 << (bpc - 8);
  2049. groups_per_line = DIV_ROUND_UP(dsc->slice_width, 3);
  2050. dsc->chunk_size = dsc->slice_width * bpp / 8;
  2051. if ((dsc->slice_width * bpp) % 8)
  2052. dsc->chunk_size++;
  2053. /* rbs-min */
  2054. min_rate_buffer_size = dsc->rc_model_size - dsc->initial_offset +
  2055. dsc->initial_xmit_delay * bpp +
  2056. groups_per_line * dsc->first_line_bpg_offset;
  2057. hrd_delay = DIV_ROUND_UP(min_rate_buffer_size, bpp);
  2058. dsc->initial_dec_delay = hrd_delay - dsc->initial_xmit_delay;
  2059. dsc->initial_scale_value = 8 * dsc->rc_model_size /
  2060. (dsc->rc_model_size - dsc->initial_offset);
  2061. slice_bits = 8 * dsc->chunk_size * dsc->slice_height;
  2062. groups_total = groups_per_line * dsc->slice_height;
  2063. data = dsc->first_line_bpg_offset * 2048;
  2064. dsc->nfl_bpg_offset = DIV_ROUND_UP(data, (dsc->slice_height - 1));
  2065. pre_num_extra_mux_bits = 3 * (mux_words_size + (4 * bpc + 4) - 2);
  2066. num_extra_mux_bits = pre_num_extra_mux_bits - (mux_words_size -
  2067. ((slice_bits - pre_num_extra_mux_bits) % mux_words_size));
  2068. data = 2048 * (dsc->rc_model_size - dsc->initial_offset
  2069. + num_extra_mux_bits);
  2070. dsc->slice_bpg_offset = DIV_ROUND_UP(data, groups_total);
  2071. data = dsc->initial_xmit_delay * bpp;
  2072. final_value = dsc->rc_model_size - data + num_extra_mux_bits;
  2073. final_scale = 8 * dsc->rc_model_size /
  2074. (dsc->rc_model_size - final_value);
  2075. dsc->final_offset = final_value;
  2076. data = (final_scale - 9) * (dsc->nfl_bpg_offset +
  2077. dsc->slice_bpg_offset);
  2078. dsc->scale_increment_interval = (2048 * dsc->final_offset) / data;
  2079. dsc->scale_decrement_interval = groups_per_line /
  2080. (dsc->initial_scale_value - 8);
  2081. return 0;
  2082. }
  2083. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2084. struct dsi_parser_utils *utils)
  2085. {
  2086. const char *data;
  2087. u32 len, i;
  2088. int rc = 0;
  2089. struct dsi_display_mode_priv_info *priv_info;
  2090. if (!mode || !mode->priv_info)
  2091. return -EINVAL;
  2092. priv_info = mode->priv_info;
  2093. data = utils->get_property(utils->data,
  2094. "qcom,mdss-dsi-panel-phy-timings", &len);
  2095. if (!data) {
  2096. DSI_DEBUG("Unable to read Phy timing settings\n");
  2097. } else {
  2098. priv_info->phy_timing_val =
  2099. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2100. if (!priv_info->phy_timing_val)
  2101. return -EINVAL;
  2102. for (i = 0; i < len; i++)
  2103. priv_info->phy_timing_val[i] = data[i];
  2104. priv_info->phy_timing_len = len;
  2105. }
  2106. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  2107. /*
  2108. * For command mode we update the pclk as part of
  2109. * function dsi_panel_calc_dsi_transfer_time( )
  2110. * as we set it based on dsi clock or mdp transfer time.
  2111. */
  2112. mode->pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) *
  2113. DSI_V_TOTAL(&mode->timing) *
  2114. mode->timing.refresh_rate) / 1000;
  2115. }
  2116. return rc;
  2117. }
  2118. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2119. struct dsi_parser_utils *utils)
  2120. {
  2121. u32 data;
  2122. int rc = -EINVAL;
  2123. int intf_width;
  2124. const char *compression;
  2125. struct dsi_display_mode_priv_info *priv_info;
  2126. if (!mode || !mode->priv_info)
  2127. return -EINVAL;
  2128. priv_info = mode->priv_info;
  2129. priv_info->dsc_enabled = false;
  2130. compression = utils->get_property(utils->data,
  2131. "qcom,compression-mode", NULL);
  2132. if (compression && !strcmp(compression, "dsc"))
  2133. priv_info->dsc_enabled = true;
  2134. if (!priv_info->dsc_enabled) {
  2135. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2136. return 0;
  2137. }
  2138. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2139. if (rc) {
  2140. priv_info->dsc.version = 0x11;
  2141. rc = 0;
  2142. } else {
  2143. priv_info->dsc.version = data & 0xff;
  2144. /* only support DSC 1.1 rev */
  2145. if (priv_info->dsc.version != 0x11) {
  2146. DSI_ERR("%s: DSC version:%d not supported\n", __func__,
  2147. priv_info->dsc.version);
  2148. rc = -EINVAL;
  2149. goto error;
  2150. }
  2151. }
  2152. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2153. if (rc) {
  2154. priv_info->dsc.scr_rev = 0x0;
  2155. rc = 0;
  2156. } else {
  2157. priv_info->dsc.scr_rev = data & 0xff;
  2158. /* only one scr rev supported */
  2159. if (priv_info->dsc.scr_rev > 0x1) {
  2160. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2161. __func__, priv_info->dsc.scr_rev);
  2162. rc = -EINVAL;
  2163. goto error;
  2164. }
  2165. }
  2166. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2167. if (rc) {
  2168. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2169. goto error;
  2170. }
  2171. priv_info->dsc.slice_height = data;
  2172. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2173. if (rc) {
  2174. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2175. goto error;
  2176. }
  2177. priv_info->dsc.slice_width = data;
  2178. intf_width = mode->timing.h_active;
  2179. if (intf_width % priv_info->dsc.slice_width) {
  2180. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2181. intf_width, priv_info->dsc.slice_width);
  2182. rc = -EINVAL;
  2183. goto error;
  2184. }
  2185. priv_info->dsc.pic_width = mode->timing.h_active;
  2186. priv_info->dsc.pic_height = mode->timing.v_active;
  2187. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2188. if (rc) {
  2189. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2190. goto error;
  2191. } else if (!data || (data > 2)) {
  2192. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2193. goto error;
  2194. }
  2195. priv_info->dsc.slice_per_pkt = data;
  2196. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2197. &data);
  2198. if (rc) {
  2199. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2200. goto error;
  2201. }
  2202. priv_info->dsc.bpc = data;
  2203. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2204. if (rc) {
  2205. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2206. data = 0;
  2207. }
  2208. priv_info->dsc.pps_delay_ms = data;
  2209. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2210. &data);
  2211. if (rc) {
  2212. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2213. goto error;
  2214. }
  2215. priv_info->dsc.bpp = data;
  2216. priv_info->dsc.block_pred_enable = utils->read_bool(utils->data,
  2217. "qcom,mdss-dsc-block-prediction-enable");
  2218. priv_info->dsc.full_frame_slices = DIV_ROUND_UP(intf_width,
  2219. priv_info->dsc.slice_width);
  2220. dsi_dsc_populate_static_param(&priv_info->dsc);
  2221. dsi_dsc_pclk_param_calc(&priv_info->dsc, intf_width);
  2222. mode->timing.dsc_enabled = true;
  2223. mode->timing.dsc = &priv_info->dsc;
  2224. error:
  2225. return rc;
  2226. }
  2227. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2228. {
  2229. int rc = 0;
  2230. struct drm_panel_hdr_properties *hdr_prop;
  2231. struct dsi_parser_utils *utils = &panel->utils;
  2232. hdr_prop = &panel->hdr_props;
  2233. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2234. "qcom,mdss-dsi-panel-hdr-enabled");
  2235. if (hdr_prop->hdr_enabled) {
  2236. rc = utils->read_u32_array(utils->data,
  2237. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2238. hdr_prop->display_primaries,
  2239. DISPLAY_PRIMARIES_MAX);
  2240. if (rc) {
  2241. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2242. __func__, __LINE__, rc);
  2243. hdr_prop->hdr_enabled = false;
  2244. return rc;
  2245. }
  2246. rc = utils->read_u32(utils->data,
  2247. "qcom,mdss-dsi-panel-peak-brightness",
  2248. &(hdr_prop->peak_brightness));
  2249. if (rc) {
  2250. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2251. __func__, __LINE__, rc);
  2252. hdr_prop->hdr_enabled = false;
  2253. return rc;
  2254. }
  2255. rc = utils->read_u32(utils->data,
  2256. "qcom,mdss-dsi-panel-blackness-level",
  2257. &(hdr_prop->blackness_level));
  2258. if (rc) {
  2259. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2260. __func__, __LINE__, rc);
  2261. hdr_prop->hdr_enabled = false;
  2262. return rc;
  2263. }
  2264. }
  2265. return 0;
  2266. }
  2267. static int dsi_panel_parse_topology(
  2268. struct dsi_display_mode_priv_info *priv_info,
  2269. struct dsi_parser_utils *utils,
  2270. int topology_override)
  2271. {
  2272. struct msm_display_topology *topology;
  2273. u32 top_count, top_sel, *array = NULL;
  2274. int i, len = 0;
  2275. int rc = -EINVAL;
  2276. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2277. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2278. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2279. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2280. return rc;
  2281. }
  2282. top_count = len / TOPOLOGY_SET_LEN;
  2283. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2284. if (!array)
  2285. return -ENOMEM;
  2286. rc = utils->read_u32_array(utils->data,
  2287. "qcom,display-topology", array, len);
  2288. if (rc) {
  2289. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2290. goto read_fail;
  2291. }
  2292. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2293. if (!topology) {
  2294. rc = -ENOMEM;
  2295. goto read_fail;
  2296. }
  2297. for (i = 0; i < top_count; i++) {
  2298. struct msm_display_topology *top = &topology[i];
  2299. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2300. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2301. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2302. }
  2303. if (topology_override >= 0 && topology_override < top_count) {
  2304. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2305. topology_override,
  2306. topology[topology_override].num_lm,
  2307. topology[topology_override].num_enc,
  2308. topology[topology_override].num_intf);
  2309. top_sel = topology_override;
  2310. goto parse_done;
  2311. }
  2312. rc = utils->read_u32(utils->data,
  2313. "qcom,default-topology-index", &top_sel);
  2314. if (rc) {
  2315. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2316. goto parse_fail;
  2317. }
  2318. if (top_sel >= top_count) {
  2319. rc = -EINVAL;
  2320. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2321. rc);
  2322. goto parse_fail;
  2323. }
  2324. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2325. topology[top_sel].num_lm,
  2326. topology[top_sel].num_enc,
  2327. topology[top_sel].num_intf);
  2328. parse_done:
  2329. memcpy(&priv_info->topology, &topology[top_sel],
  2330. sizeof(struct msm_display_topology));
  2331. parse_fail:
  2332. kfree(topology);
  2333. read_fail:
  2334. kfree(array);
  2335. return rc;
  2336. }
  2337. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2338. struct msm_roi_alignment *align)
  2339. {
  2340. int len = 0, rc = 0;
  2341. u32 value[6];
  2342. struct property *data;
  2343. if (!align)
  2344. return -EINVAL;
  2345. memset(align, 0, sizeof(*align));
  2346. data = utils->find_property(utils->data,
  2347. "qcom,panel-roi-alignment", &len);
  2348. len /= sizeof(u32);
  2349. if (!data) {
  2350. DSI_ERR("panel roi alignment not found\n");
  2351. rc = -EINVAL;
  2352. } else if (len != 6) {
  2353. DSI_ERR("incorrect roi alignment len %d\n", len);
  2354. rc = -EINVAL;
  2355. } else {
  2356. rc = utils->read_u32_array(utils->data,
  2357. "qcom,panel-roi-alignment", value, len);
  2358. if (rc)
  2359. DSI_DEBUG("error reading panel roi alignment values\n");
  2360. else {
  2361. align->xstart_pix_align = value[0];
  2362. align->ystart_pix_align = value[1];
  2363. align->width_pix_align = value[2];
  2364. align->height_pix_align = value[3];
  2365. align->min_width = value[4];
  2366. align->min_height = value[5];
  2367. }
  2368. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2369. align->xstart_pix_align,
  2370. align->width_pix_align,
  2371. align->ystart_pix_align,
  2372. align->height_pix_align,
  2373. align->min_width,
  2374. align->min_height);
  2375. }
  2376. return rc;
  2377. }
  2378. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2379. struct dsi_parser_utils *utils)
  2380. {
  2381. struct msm_roi_caps *roi_caps = NULL;
  2382. const char *data;
  2383. int rc = 0;
  2384. if (!mode || !mode->priv_info) {
  2385. DSI_ERR("invalid arguments\n");
  2386. return -EINVAL;
  2387. }
  2388. roi_caps = &mode->priv_info->roi_caps;
  2389. memset(roi_caps, 0, sizeof(*roi_caps));
  2390. data = utils->get_property(utils->data,
  2391. "qcom,partial-update-enabled", NULL);
  2392. if (data) {
  2393. if (!strcmp(data, "dual_roi"))
  2394. roi_caps->num_roi = 2;
  2395. else if (!strcmp(data, "single_roi"))
  2396. roi_caps->num_roi = 1;
  2397. else {
  2398. DSI_INFO(
  2399. "invalid value for qcom,partial-update-enabled: %s\n",
  2400. data);
  2401. return 0;
  2402. }
  2403. } else {
  2404. DSI_DEBUG("partial update disabled as the property is not set\n");
  2405. return 0;
  2406. }
  2407. roi_caps->merge_rois = utils->read_bool(utils->data,
  2408. "qcom,partial-update-roi-merge");
  2409. roi_caps->enabled = roi_caps->num_roi > 0;
  2410. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2411. roi_caps->enabled);
  2412. if (roi_caps->enabled)
  2413. rc = dsi_panel_parse_roi_alignment(utils,
  2414. &roi_caps->align);
  2415. if (rc)
  2416. memset(roi_caps, 0, sizeof(*roi_caps));
  2417. return rc;
  2418. }
  2419. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2420. struct dsi_parser_utils *utils)
  2421. {
  2422. bool vid_mode_support, cmd_mode_support;
  2423. if (!mode || !mode->priv_info) {
  2424. DSI_ERR("invalid arguments\n");
  2425. return -EINVAL;
  2426. }
  2427. vid_mode_support = utils->read_bool(utils->data,
  2428. "qcom,mdss-dsi-video-mode");
  2429. cmd_mode_support = utils->read_bool(utils->data,
  2430. "qcom,mdss-dsi-cmd-mode");
  2431. if (cmd_mode_support)
  2432. mode->panel_mode = DSI_OP_CMD_MODE;
  2433. else if (vid_mode_support)
  2434. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2435. else
  2436. return -EINVAL;
  2437. return 0;
  2438. };
  2439. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2440. {
  2441. int dms_enabled;
  2442. const char *data;
  2443. struct dsi_parser_utils *utils = &panel->utils;
  2444. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2445. dms_enabled = utils->read_bool(utils->data,
  2446. "qcom,dynamic-mode-switch-enabled");
  2447. if (!dms_enabled)
  2448. return 0;
  2449. data = utils->get_property(utils->data,
  2450. "qcom,dynamic-mode-switch-type", NULL);
  2451. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2452. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2453. } else {
  2454. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2455. panel->name, data);
  2456. return -EINVAL;
  2457. }
  2458. return 0;
  2459. };
  2460. /*
  2461. * The length of all the valid values to be checked should not be greater
  2462. * than the length of returned data from read command.
  2463. */
  2464. static bool
  2465. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2466. {
  2467. int i;
  2468. struct drm_panel_esd_config *config = &panel->esd_config;
  2469. for (i = 0; i < count; ++i) {
  2470. if (config->status_valid_params[i] >
  2471. config->status_cmds_rlen[i]) {
  2472. DSI_DEBUG("ignore valid params\n");
  2473. return false;
  2474. }
  2475. }
  2476. return true;
  2477. }
  2478. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2479. char *prop_key, u32 **target, u32 cmd_cnt)
  2480. {
  2481. int tmp;
  2482. if (!utils->find_property(utils->data, prop_key, &tmp))
  2483. return false;
  2484. tmp /= sizeof(u32);
  2485. if (tmp != cmd_cnt) {
  2486. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2487. tmp, cmd_cnt);
  2488. return false;
  2489. }
  2490. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2491. if (IS_ERR_OR_NULL(*target)) {
  2492. DSI_ERR("Error allocating memory for property\n");
  2493. return false;
  2494. }
  2495. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2496. DSI_ERR("cannot get values from dts\n");
  2497. kfree(*target);
  2498. *target = NULL;
  2499. return false;
  2500. }
  2501. return true;
  2502. }
  2503. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2504. {
  2505. kfree(esd_config->status_buf);
  2506. kfree(esd_config->return_buf);
  2507. kfree(esd_config->status_value);
  2508. kfree(esd_config->status_valid_params);
  2509. kfree(esd_config->status_cmds_rlen);
  2510. kfree(esd_config->status_cmd.cmds);
  2511. }
  2512. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2513. {
  2514. struct drm_panel_esd_config *esd_config;
  2515. int rc = 0;
  2516. u32 tmp;
  2517. u32 i, status_len, *lenp;
  2518. struct property *data;
  2519. struct dsi_parser_utils *utils = &panel->utils;
  2520. if (!panel) {
  2521. DSI_ERR("Invalid Params\n");
  2522. return -EINVAL;
  2523. }
  2524. esd_config = &panel->esd_config;
  2525. if (!esd_config)
  2526. return -EINVAL;
  2527. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2528. DSI_CMD_SET_PANEL_STATUS, utils);
  2529. if (!esd_config->status_cmd.count) {
  2530. DSI_ERR("panel status command parsing failed\n");
  2531. rc = -EINVAL;
  2532. goto error;
  2533. }
  2534. if (!dsi_panel_parse_esd_status_len(utils,
  2535. "qcom,mdss-dsi-panel-status-read-length",
  2536. &panel->esd_config.status_cmds_rlen,
  2537. esd_config->status_cmd.count)) {
  2538. DSI_ERR("Invalid status read length\n");
  2539. rc = -EINVAL;
  2540. goto error1;
  2541. }
  2542. if (dsi_panel_parse_esd_status_len(utils,
  2543. "qcom,mdss-dsi-panel-status-valid-params",
  2544. &panel->esd_config.status_valid_params,
  2545. esd_config->status_cmd.count)) {
  2546. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2547. esd_config->status_cmd.count)) {
  2548. rc = -EINVAL;
  2549. goto error2;
  2550. }
  2551. }
  2552. status_len = 0;
  2553. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2554. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2555. status_len += lenp[i];
  2556. if (!status_len) {
  2557. rc = -EINVAL;
  2558. goto error2;
  2559. }
  2560. /*
  2561. * Some panel may need multiple read commands to properly
  2562. * check panel status. Do a sanity check for proper status
  2563. * value which will be compared with the value read by dsi
  2564. * controller during ESD check. Also check if multiple read
  2565. * commands are there then, there should be corresponding
  2566. * status check values for each read command.
  2567. */
  2568. data = utils->find_property(utils->data,
  2569. "qcom,mdss-dsi-panel-status-value", &tmp);
  2570. tmp /= sizeof(u32);
  2571. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2572. esd_config->groups = tmp / status_len;
  2573. } else {
  2574. DSI_ERR("error parse panel-status-value\n");
  2575. rc = -EINVAL;
  2576. goto error2;
  2577. }
  2578. esd_config->status_value =
  2579. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2580. GFP_KERNEL);
  2581. if (!esd_config->status_value) {
  2582. rc = -ENOMEM;
  2583. goto error2;
  2584. }
  2585. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2586. sizeof(unsigned char), GFP_KERNEL);
  2587. if (!esd_config->return_buf) {
  2588. rc = -ENOMEM;
  2589. goto error3;
  2590. }
  2591. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2592. if (!esd_config->status_buf) {
  2593. rc = -ENOMEM;
  2594. goto error4;
  2595. }
  2596. rc = utils->read_u32_array(utils->data,
  2597. "qcom,mdss-dsi-panel-status-value",
  2598. esd_config->status_value, esd_config->groups * status_len);
  2599. if (rc) {
  2600. DSI_DEBUG("error reading panel status values\n");
  2601. memset(esd_config->status_value, 0,
  2602. esd_config->groups * status_len);
  2603. }
  2604. return 0;
  2605. error4:
  2606. kfree(esd_config->return_buf);
  2607. error3:
  2608. kfree(esd_config->status_value);
  2609. error2:
  2610. kfree(esd_config->status_valid_params);
  2611. kfree(esd_config->status_cmds_rlen);
  2612. error1:
  2613. kfree(esd_config->status_cmd.cmds);
  2614. error:
  2615. return rc;
  2616. }
  2617. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2618. {
  2619. int rc = 0;
  2620. const char *string;
  2621. struct drm_panel_esd_config *esd_config;
  2622. struct dsi_parser_utils *utils = &panel->utils;
  2623. u8 *esd_mode = NULL;
  2624. esd_config = &panel->esd_config;
  2625. esd_config->status_mode = ESD_MODE_MAX;
  2626. esd_config->esd_enabled = utils->read_bool(utils->data,
  2627. "qcom,esd-check-enabled");
  2628. if (!esd_config->esd_enabled)
  2629. return 0;
  2630. rc = utils->read_string(utils->data,
  2631. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2632. if (!rc) {
  2633. if (!strcmp(string, "bta_check")) {
  2634. esd_config->status_mode = ESD_MODE_SW_BTA;
  2635. } else if (!strcmp(string, "reg_read")) {
  2636. esd_config->status_mode = ESD_MODE_REG_READ;
  2637. } else if (!strcmp(string, "te_signal_check")) {
  2638. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2639. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2640. } else {
  2641. DSI_ERR("TE-ESD not valid for video mode\n");
  2642. rc = -EINVAL;
  2643. goto error;
  2644. }
  2645. } else {
  2646. DSI_ERR("No valid panel-status-check-mode string\n");
  2647. rc = -EINVAL;
  2648. goto error;
  2649. }
  2650. } else {
  2651. DSI_DEBUG("status check method not defined!\n");
  2652. rc = -EINVAL;
  2653. goto error;
  2654. }
  2655. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2656. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2657. if (rc) {
  2658. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2659. rc);
  2660. goto error;
  2661. }
  2662. esd_mode = "register_read";
  2663. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2664. esd_mode = "bta_trigger";
  2665. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2666. esd_mode = "te_check";
  2667. }
  2668. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2669. return 0;
  2670. error:
  2671. panel->esd_config.esd_enabled = false;
  2672. return rc;
  2673. }
  2674. static void dsi_panel_update_util(struct dsi_panel *panel,
  2675. struct device_node *parser_node)
  2676. {
  2677. struct dsi_parser_utils *utils = &panel->utils;
  2678. if (parser_node) {
  2679. *utils = *dsi_parser_get_parser_utils();
  2680. utils->data = parser_node;
  2681. DSI_DEBUG("switching to parser APIs\n");
  2682. goto end;
  2683. }
  2684. *utils = *dsi_parser_get_of_utils();
  2685. utils->data = panel->panel_of_node;
  2686. end:
  2687. utils->node = panel->panel_of_node;
  2688. }
  2689. struct dsi_panel *dsi_panel_get(struct device *parent,
  2690. struct device_node *of_node,
  2691. struct device_node *parser_node,
  2692. const char *type,
  2693. int topology_override)
  2694. {
  2695. struct dsi_panel *panel;
  2696. struct dsi_parser_utils *utils;
  2697. const char *panel_physical_type;
  2698. int rc = 0;
  2699. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2700. if (!panel)
  2701. return ERR_PTR(-ENOMEM);
  2702. panel->panel_of_node = of_node;
  2703. panel->parent = parent;
  2704. panel->type = type;
  2705. dsi_panel_update_util(panel, parser_node);
  2706. utils = &panel->utils;
  2707. panel->name = utils->get_property(utils->data,
  2708. "qcom,mdss-dsi-panel-name", NULL);
  2709. if (!panel->name)
  2710. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2711. /*
  2712. * Set panel type to LCD as default.
  2713. */
  2714. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2715. panel_physical_type = utils->get_property(utils->data,
  2716. "qcom,mdss-dsi-panel-physical-type", NULL);
  2717. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2718. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2719. rc = dsi_panel_parse_host_config(panel);
  2720. if (rc) {
  2721. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2722. rc);
  2723. goto error;
  2724. }
  2725. rc = dsi_panel_parse_panel_mode(panel);
  2726. if (rc) {
  2727. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2728. rc);
  2729. goto error;
  2730. }
  2731. rc = dsi_panel_parse_dfps_caps(panel);
  2732. if (rc)
  2733. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2734. if (!(panel->dfps_caps.dfps_support)) {
  2735. /* qsync and dfps are mutually exclusive features */
  2736. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2737. if (rc)
  2738. DSI_DEBUG("failed to parse qsync features, rc=%d\n",
  2739. rc);
  2740. }
  2741. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2742. if (rc)
  2743. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2744. rc = dsi_panel_parse_phy_props(panel);
  2745. if (rc) {
  2746. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2747. rc);
  2748. goto error;
  2749. }
  2750. rc = dsi_panel_parse_gpios(panel);
  2751. if (rc) {
  2752. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2753. goto error;
  2754. }
  2755. rc = dsi_panel_parse_power_cfg(panel);
  2756. if (rc)
  2757. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2758. rc = dsi_panel_parse_bl_config(panel);
  2759. if (rc) {
  2760. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2761. if (rc == -EPROBE_DEFER)
  2762. goto error;
  2763. }
  2764. rc = dsi_panel_parse_misc_features(panel);
  2765. if (rc)
  2766. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2767. rc = dsi_panel_parse_hdr_config(panel);
  2768. if (rc)
  2769. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2770. rc = dsi_panel_get_mode_count(panel);
  2771. if (rc) {
  2772. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2773. goto error;
  2774. }
  2775. rc = dsi_panel_parse_dms_info(panel);
  2776. if (rc)
  2777. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2778. rc = dsi_panel_parse_esd_config(panel);
  2779. if (rc)
  2780. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2781. panel->power_mode = SDE_MODE_DPMS_OFF;
  2782. drm_panel_init(&panel->drm_panel);
  2783. panel->drm_panel.dev = &panel->mipi_device.dev;
  2784. panel->mipi_device.dev.of_node = of_node;
  2785. rc = drm_panel_add(&panel->drm_panel);
  2786. if (rc)
  2787. goto error;
  2788. mutex_init(&panel->panel_lock);
  2789. return panel;
  2790. error:
  2791. kfree(panel);
  2792. return ERR_PTR(rc);
  2793. }
  2794. void dsi_panel_put(struct dsi_panel *panel)
  2795. {
  2796. drm_panel_remove(&panel->drm_panel);
  2797. /* free resources allocated for ESD check */
  2798. dsi_panel_esd_config_deinit(&panel->esd_config);
  2799. kfree(panel);
  2800. }
  2801. int dsi_panel_drv_init(struct dsi_panel *panel,
  2802. struct mipi_dsi_host *host)
  2803. {
  2804. int rc = 0;
  2805. struct mipi_dsi_device *dev;
  2806. if (!panel || !host) {
  2807. DSI_ERR("invalid params\n");
  2808. return -EINVAL;
  2809. }
  2810. mutex_lock(&panel->panel_lock);
  2811. dev = &panel->mipi_device;
  2812. dev->host = host;
  2813. /*
  2814. * We dont have device structure since panel is not a device node.
  2815. * When using drm panel framework, the device is probed when the host is
  2816. * create.
  2817. */
  2818. dev->channel = 0;
  2819. dev->lanes = 4;
  2820. panel->host = host;
  2821. rc = dsi_panel_vreg_get(panel);
  2822. if (rc) {
  2823. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2824. panel->name, rc);
  2825. goto exit;
  2826. }
  2827. rc = dsi_panel_pinctrl_init(panel);
  2828. if (rc) {
  2829. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2830. panel->name, rc);
  2831. goto error_vreg_put;
  2832. }
  2833. rc = dsi_panel_gpio_request(panel);
  2834. if (rc) {
  2835. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2836. rc);
  2837. goto error_pinctrl_deinit;
  2838. }
  2839. rc = dsi_panel_bl_register(panel);
  2840. if (rc) {
  2841. if (rc != -EPROBE_DEFER)
  2842. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2843. panel->name, rc);
  2844. goto error_gpio_release;
  2845. }
  2846. goto exit;
  2847. error_gpio_release:
  2848. (void)dsi_panel_gpio_release(panel);
  2849. error_pinctrl_deinit:
  2850. (void)dsi_panel_pinctrl_deinit(panel);
  2851. error_vreg_put:
  2852. (void)dsi_panel_vreg_put(panel);
  2853. exit:
  2854. mutex_unlock(&panel->panel_lock);
  2855. return rc;
  2856. }
  2857. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2858. {
  2859. int rc = 0;
  2860. if (!panel) {
  2861. DSI_ERR("invalid params\n");
  2862. return -EINVAL;
  2863. }
  2864. mutex_lock(&panel->panel_lock);
  2865. rc = dsi_panel_bl_unregister(panel);
  2866. if (rc)
  2867. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2868. panel->name, rc);
  2869. rc = dsi_panel_gpio_release(panel);
  2870. if (rc)
  2871. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2872. rc);
  2873. rc = dsi_panel_pinctrl_deinit(panel);
  2874. if (rc)
  2875. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2876. rc);
  2877. rc = dsi_panel_vreg_put(panel);
  2878. if (rc)
  2879. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2880. panel->host = NULL;
  2881. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2882. mutex_unlock(&panel->panel_lock);
  2883. return rc;
  2884. }
  2885. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2886. struct dsi_display_mode *mode)
  2887. {
  2888. return 0;
  2889. }
  2890. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2891. {
  2892. const u32 SINGLE_MODE_SUPPORT = 1;
  2893. struct dsi_parser_utils *utils;
  2894. struct device_node *timings_np, *child_np;
  2895. int num_dfps_rates, num_bit_clks;
  2896. int num_video_modes = 0, num_cmd_modes = 0;
  2897. int count, rc = 0;
  2898. void *utils_data = NULL;
  2899. if (!panel) {
  2900. DSI_ERR("invalid params\n");
  2901. return -EINVAL;
  2902. }
  2903. utils = &panel->utils;
  2904. panel->num_timing_nodes = 0;
  2905. timings_np = utils->get_child_by_name(utils->data,
  2906. "qcom,mdss-dsi-display-timings");
  2907. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2908. DSI_ERR("no display timing nodes defined\n");
  2909. rc = -EINVAL;
  2910. goto error;
  2911. }
  2912. count = utils->get_child_count(timings_np);
  2913. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2914. count > DSI_MODE_MAX) {
  2915. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2916. rc = -EINVAL;
  2917. goto error;
  2918. }
  2919. /* No multiresolution support is available for video mode panels.
  2920. * Multi-mode is supported for video mode during POMS is enabled.
  2921. */
  2922. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2923. !panel->host_config.ext_bridge_mode &&
  2924. !panel->panel_mode_switch_enabled)
  2925. count = SINGLE_MODE_SUPPORT;
  2926. panel->num_timing_nodes = count;
  2927. dsi_for_each_child_node(timings_np, child_np) {
  2928. utils_data = child_np;
  2929. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2930. num_video_modes++;
  2931. else if (utils->read_bool(utils->data,
  2932. "qcom,mdss-dsi-cmd-mode"))
  2933. num_cmd_modes++;
  2934. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  2935. num_video_modes++;
  2936. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  2937. num_cmd_modes++;
  2938. }
  2939. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  2940. panel->dfps_caps.dfps_list_len;
  2941. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  2942. panel->dyn_clk_caps.bit_clk_list_len;
  2943. /* Inflate num_of_modes by fps and bit clks in dfps */
  2944. panel->num_display_modes = (num_cmd_modes * num_bit_clks) +
  2945. (num_video_modes * num_bit_clks * num_dfps_rates);
  2946. error:
  2947. return rc;
  2948. }
  2949. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2950. struct dsi_panel_phy_props *phy_props)
  2951. {
  2952. int rc = 0;
  2953. if (!panel || !phy_props) {
  2954. DSI_ERR("invalid params\n");
  2955. return -EINVAL;
  2956. }
  2957. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2958. return rc;
  2959. }
  2960. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2961. struct dsi_dfps_capabilities *dfps_caps)
  2962. {
  2963. int rc = 0;
  2964. if (!panel || !dfps_caps) {
  2965. DSI_ERR("invalid params\n");
  2966. return -EINVAL;
  2967. }
  2968. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2969. return rc;
  2970. }
  2971. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2972. {
  2973. int i;
  2974. if (!mode->priv_info)
  2975. return;
  2976. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2977. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2978. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2979. }
  2980. kfree(mode->priv_info);
  2981. }
  2982. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2983. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2984. {
  2985. u32 frame_time_us,nslices;
  2986. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz;
  2987. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2988. struct dsi_mode_info *timing = &mode->timing;
  2989. struct dsi_display_mode *display_mode;
  2990. u32 jitter_numer, jitter_denom, prefill_lines;
  2991. u32 min_threshold_us, prefill_time_us;
  2992. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  2993. * + 1 byte dcs data command.
  2994. */
  2995. const u32 packet_overhead = 56;
  2996. display_mode = container_of(timing, struct dsi_display_mode, timing);
  2997. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  2998. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  2999. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3000. if (timing->dsc_enabled) {
  3001. nslices = (timing->h_active)/(dsc->slice_width);
  3002. /* (slice width x bit-per-pixel + packet overhead) x
  3003. * number of slices x height x fps / lane
  3004. */
  3005. bits_per_line = ((dsc->slice_width * dsc->bpp) +
  3006. packet_overhead) * nslices;
  3007. bits_per_line = bits_per_line / (config->num_data_lanes);
  3008. min_bitclk_hz = (bits_per_line * timing->v_active *
  3009. timing->refresh_rate);
  3010. } else {
  3011. total_active_pixels = ((DSI_H_ACTIVE_DSC(timing)
  3012. * timing->v_active));
  3013. /* calculate the actual bitclk needed to transfer the frame */
  3014. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3015. (config->bpp)) / (config->num_data_lanes);
  3016. }
  3017. timing->min_dsi_clk_hz = min_bitclk_hz;
  3018. if (timing->clk_rate_hz) {
  3019. /* adjust the transfer time proportionately for bit clk*/
  3020. timing->dsi_transfer_time_us = mult_frac(frame_time_us,
  3021. min_bitclk_hz, timing->clk_rate_hz);
  3022. } else if (mode->priv_info->mdp_transfer_time_us) {
  3023. timing->dsi_transfer_time_us =
  3024. mode->priv_info->mdp_transfer_time_us;
  3025. } else {
  3026. min_threshold_us = mult_frac(frame_time_us,
  3027. jitter_numer, (jitter_denom * 100));
  3028. /*
  3029. * Increase the prefill_lines proportionately as recommended
  3030. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3031. */
  3032. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3033. timing->refresh_rate, 60);
  3034. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3035. (timing->v_active));
  3036. /*
  3037. * Threshold is sum of panel jitter time, prefill line time
  3038. * plus 100usec buffer time.
  3039. */
  3040. min_threshold_us = min_threshold_us + 100 + prefill_time_us;
  3041. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3042. if (min_threshold_us > frame_threshold_us)
  3043. frame_threshold_us = min_threshold_us;
  3044. timing->dsi_transfer_time_us = frame_time_us -
  3045. frame_threshold_us;
  3046. }
  3047. /* Calculate pclk_khz to update modeinfo */
  3048. pclk_rate_hz = mult_frac(min_bitclk_hz, frame_time_us,
  3049. timing->dsi_transfer_time_us);
  3050. display_mode->pixel_clk_khz = mult_frac(pclk_rate_hz,
  3051. config->num_data_lanes, config->bpp);
  3052. do_div(display_mode->pixel_clk_khz, 1000);
  3053. }
  3054. int dsi_panel_get_mode(struct dsi_panel *panel,
  3055. u32 index, struct dsi_display_mode *mode,
  3056. int topology_override)
  3057. {
  3058. struct device_node *timings_np, *child_np;
  3059. struct dsi_parser_utils *utils;
  3060. struct dsi_display_mode_priv_info *prv_info;
  3061. u32 child_idx = 0;
  3062. int rc = 0, num_timings;
  3063. void *utils_data = NULL;
  3064. if (!panel || !mode) {
  3065. DSI_ERR("invalid params\n");
  3066. return -EINVAL;
  3067. }
  3068. mutex_lock(&panel->panel_lock);
  3069. utils = &panel->utils;
  3070. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3071. if (!mode->priv_info) {
  3072. rc = -ENOMEM;
  3073. goto done;
  3074. }
  3075. prv_info = mode->priv_info;
  3076. timings_np = utils->get_child_by_name(utils->data,
  3077. "qcom,mdss-dsi-display-timings");
  3078. if (!timings_np) {
  3079. DSI_ERR("no display timing nodes defined\n");
  3080. rc = -EINVAL;
  3081. goto parse_fail;
  3082. }
  3083. num_timings = utils->get_child_count(timings_np);
  3084. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3085. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3086. rc = -EINVAL;
  3087. goto parse_fail;
  3088. }
  3089. utils_data = utils->data;
  3090. dsi_for_each_child_node(timings_np, child_np) {
  3091. if (index != child_idx++)
  3092. continue;
  3093. utils->data = child_np;
  3094. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3095. if (rc) {
  3096. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3097. goto parse_fail;
  3098. }
  3099. rc = dsi_panel_parse_dsc_params(mode, utils);
  3100. if (rc) {
  3101. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3102. goto parse_fail;
  3103. }
  3104. rc = dsi_panel_parse_topology(prv_info, utils,
  3105. topology_override);
  3106. if (rc) {
  3107. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3108. goto parse_fail;
  3109. }
  3110. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3111. if (rc) {
  3112. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3113. goto parse_fail;
  3114. }
  3115. rc = dsi_panel_parse_jitter_config(mode, utils);
  3116. if (rc)
  3117. DSI_ERR(
  3118. "failed to parse panel jitter config, rc=%d\n", rc);
  3119. rc = dsi_panel_parse_phy_timing(mode, utils);
  3120. if (rc) {
  3121. DSI_ERR(
  3122. "failed to parse panel phy timings, rc=%d\n", rc);
  3123. goto parse_fail;
  3124. }
  3125. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3126. if (rc)
  3127. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3128. if (panel->panel_mode_switch_enabled) {
  3129. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3130. if (rc) {
  3131. DSI_ERR("PMS: failed to parse panel mode\n");
  3132. rc = 0;
  3133. mode->panel_mode = panel->panel_mode;
  3134. }
  3135. } else {
  3136. mode->panel_mode = panel->panel_mode;
  3137. }
  3138. }
  3139. goto done;
  3140. parse_fail:
  3141. kfree(mode->priv_info);
  3142. mode->priv_info = NULL;
  3143. done:
  3144. utils->data = utils_data;
  3145. mutex_unlock(&panel->panel_lock);
  3146. return rc;
  3147. }
  3148. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3149. struct dsi_display_mode *mode,
  3150. struct dsi_host_config *config)
  3151. {
  3152. int rc = 0;
  3153. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3154. if (!panel || !mode || !config) {
  3155. DSI_ERR("invalid params\n");
  3156. return -EINVAL;
  3157. }
  3158. mutex_lock(&panel->panel_lock);
  3159. config->panel_mode = panel->panel_mode;
  3160. memcpy(&config->common_config, &panel->host_config,
  3161. sizeof(config->common_config));
  3162. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3163. memcpy(&config->u.video_engine, &panel->video_config,
  3164. sizeof(config->u.video_engine));
  3165. } else {
  3166. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3167. sizeof(config->u.cmd_engine));
  3168. }
  3169. memcpy(&config->video_timing, &mode->timing,
  3170. sizeof(config->video_timing));
  3171. config->video_timing.mdp_transfer_time_us =
  3172. mode->priv_info->mdp_transfer_time_us;
  3173. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3174. config->video_timing.dsc = &mode->priv_info->dsc;
  3175. if (dyn_clk_caps->dyn_clk_support)
  3176. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3177. else
  3178. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3179. config->esc_clk_rate_hz = 19200000;
  3180. mutex_unlock(&panel->panel_lock);
  3181. return rc;
  3182. }
  3183. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3184. {
  3185. int rc = 0;
  3186. if (!panel) {
  3187. DSI_ERR("invalid params\n");
  3188. return -EINVAL;
  3189. }
  3190. mutex_lock(&panel->panel_lock);
  3191. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3192. if (panel->lp11_init)
  3193. goto error;
  3194. rc = dsi_panel_power_on(panel);
  3195. if (rc) {
  3196. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3197. goto error;
  3198. }
  3199. error:
  3200. mutex_unlock(&panel->panel_lock);
  3201. return rc;
  3202. }
  3203. int dsi_panel_update_pps(struct dsi_panel *panel)
  3204. {
  3205. int rc = 0;
  3206. struct dsi_panel_cmd_set *set = NULL;
  3207. struct dsi_display_mode_priv_info *priv_info = NULL;
  3208. if (!panel || !panel->cur_mode) {
  3209. DSI_ERR("invalid params\n");
  3210. return -EINVAL;
  3211. }
  3212. mutex_lock(&panel->panel_lock);
  3213. priv_info = panel->cur_mode->priv_info;
  3214. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3215. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc, panel->dsc_pps_cmd, 0);
  3216. rc = dsi_panel_create_cmd_packets(panel->dsc_pps_cmd,
  3217. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3218. if (rc) {
  3219. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3220. goto error;
  3221. }
  3222. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3223. if (rc) {
  3224. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3225. panel->name, rc);
  3226. }
  3227. dsi_panel_destroy_cmd_packets(set);
  3228. error:
  3229. mutex_unlock(&panel->panel_lock);
  3230. return rc;
  3231. }
  3232. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3233. {
  3234. int rc = 0;
  3235. if (!panel) {
  3236. DSI_ERR("invalid params\n");
  3237. return -EINVAL;
  3238. }
  3239. mutex_lock(&panel->panel_lock);
  3240. if (!panel->panel_initialized)
  3241. goto exit;
  3242. /*
  3243. * Consider LP1->LP2->LP1.
  3244. * If the panel is already in LP mode, do not need to
  3245. * set the regulator.
  3246. * IBB and AB power mode would be set at the same time
  3247. * in PMIC driver, so we only call ibb setting that is enough.
  3248. */
  3249. if (dsi_panel_is_type_oled(panel) &&
  3250. panel->power_mode != SDE_MODE_DPMS_LP2)
  3251. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3252. "ibb", REGULATOR_MODE_IDLE);
  3253. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3254. if (rc)
  3255. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3256. panel->name, rc);
  3257. exit:
  3258. mutex_unlock(&panel->panel_lock);
  3259. return rc;
  3260. }
  3261. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3262. {
  3263. int rc = 0;
  3264. if (!panel) {
  3265. DSI_ERR("invalid params\n");
  3266. return -EINVAL;
  3267. }
  3268. mutex_lock(&panel->panel_lock);
  3269. if (!panel->panel_initialized)
  3270. goto exit;
  3271. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3272. if (rc)
  3273. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3274. panel->name, rc);
  3275. exit:
  3276. mutex_unlock(&panel->panel_lock);
  3277. return rc;
  3278. }
  3279. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3280. {
  3281. int rc = 0;
  3282. if (!panel) {
  3283. DSI_ERR("invalid params\n");
  3284. return -EINVAL;
  3285. }
  3286. mutex_lock(&panel->panel_lock);
  3287. if (!panel->panel_initialized)
  3288. goto exit;
  3289. /*
  3290. * Consider about LP1->LP2->NOLP.
  3291. */
  3292. if (dsi_panel_is_type_oled(panel) &&
  3293. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3294. panel->power_mode == SDE_MODE_DPMS_LP2))
  3295. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3296. "ibb", REGULATOR_MODE_NORMAL);
  3297. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3298. if (rc)
  3299. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3300. panel->name, rc);
  3301. exit:
  3302. mutex_unlock(&panel->panel_lock);
  3303. return rc;
  3304. }
  3305. int dsi_panel_prepare(struct dsi_panel *panel)
  3306. {
  3307. int rc = 0;
  3308. if (!panel) {
  3309. DSI_ERR("invalid params\n");
  3310. return -EINVAL;
  3311. }
  3312. mutex_lock(&panel->panel_lock);
  3313. if (panel->lp11_init) {
  3314. rc = dsi_panel_power_on(panel);
  3315. if (rc) {
  3316. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3317. panel->name, rc);
  3318. goto error;
  3319. }
  3320. }
  3321. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3322. if (rc) {
  3323. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3324. panel->name, rc);
  3325. goto error;
  3326. }
  3327. error:
  3328. mutex_unlock(&panel->panel_lock);
  3329. return rc;
  3330. }
  3331. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3332. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3333. {
  3334. static const int ROI_CMD_LEN = 5;
  3335. int rc = 0;
  3336. /* DTYPE_DCS_LWRITE */
  3337. char *caset, *paset;
  3338. set->cmds = NULL;
  3339. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3340. if (!caset) {
  3341. rc = -ENOMEM;
  3342. goto exit;
  3343. }
  3344. caset[0] = 0x2a;
  3345. caset[1] = (roi->x & 0xFF00) >> 8;
  3346. caset[2] = roi->x & 0xFF;
  3347. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3348. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3349. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3350. if (!paset) {
  3351. rc = -ENOMEM;
  3352. goto error_free_mem;
  3353. }
  3354. paset[0] = 0x2b;
  3355. paset[1] = (roi->y & 0xFF00) >> 8;
  3356. paset[2] = roi->y & 0xFF;
  3357. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3358. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3359. set->type = DSI_CMD_SET_ROI;
  3360. set->state = DSI_CMD_SET_STATE_LP;
  3361. set->count = 2; /* send caset + paset together */
  3362. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3363. if (!set->cmds) {
  3364. rc = -ENOMEM;
  3365. goto error_free_mem;
  3366. }
  3367. set->cmds[0].msg.channel = 0;
  3368. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3369. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3370. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3371. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3372. set->cmds[0].msg.tx_buf = caset;
  3373. set->cmds[0].msg.rx_len = 0;
  3374. set->cmds[0].msg.rx_buf = 0;
  3375. set->cmds[0].msg.wait_ms = 0;
  3376. set->cmds[0].last_command = 0;
  3377. set->cmds[0].post_wait_ms = 0;
  3378. set->cmds[1].msg.channel = 0;
  3379. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3380. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3381. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3382. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3383. set->cmds[1].msg.tx_buf = paset;
  3384. set->cmds[1].msg.rx_len = 0;
  3385. set->cmds[1].msg.rx_buf = 0;
  3386. set->cmds[1].msg.wait_ms = 0;
  3387. set->cmds[1].last_command = 1;
  3388. set->cmds[1].post_wait_ms = 0;
  3389. goto exit;
  3390. error_free_mem:
  3391. kfree(caset);
  3392. kfree(paset);
  3393. kfree(set->cmds);
  3394. exit:
  3395. return rc;
  3396. }
  3397. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3398. int ctrl_idx)
  3399. {
  3400. int rc = 0;
  3401. if (!panel) {
  3402. DSI_ERR("invalid params\n");
  3403. return -EINVAL;
  3404. }
  3405. mutex_lock(&panel->panel_lock);
  3406. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3407. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3408. if (rc)
  3409. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3410. panel->name, rc);
  3411. mutex_unlock(&panel->panel_lock);
  3412. return rc;
  3413. }
  3414. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3415. int ctrl_idx)
  3416. {
  3417. int rc = 0;
  3418. if (!panel) {
  3419. DSI_ERR("invalid params\n");
  3420. return -EINVAL;
  3421. }
  3422. mutex_lock(&panel->panel_lock);
  3423. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3424. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3425. if (rc)
  3426. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3427. panel->name, rc);
  3428. mutex_unlock(&panel->panel_lock);
  3429. return rc;
  3430. }
  3431. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3432. struct dsi_rect *roi)
  3433. {
  3434. int rc = 0;
  3435. struct dsi_panel_cmd_set *set;
  3436. struct dsi_display_mode_priv_info *priv_info;
  3437. if (!panel || !panel->cur_mode) {
  3438. DSI_ERR("Invalid params\n");
  3439. return -EINVAL;
  3440. }
  3441. priv_info = panel->cur_mode->priv_info;
  3442. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3443. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3444. if (rc) {
  3445. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3446. panel->name, rc);
  3447. return rc;
  3448. }
  3449. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3450. roi->x, roi->y, roi->w, roi->h);
  3451. mutex_lock(&panel->panel_lock);
  3452. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3453. if (rc)
  3454. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3455. panel->name, rc);
  3456. mutex_unlock(&panel->panel_lock);
  3457. dsi_panel_destroy_cmd_packets(set);
  3458. dsi_panel_dealloc_cmd_packets(set);
  3459. return rc;
  3460. }
  3461. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3462. {
  3463. int rc = 0;
  3464. if (!panel) {
  3465. DSI_ERR("Invalid params\n");
  3466. return -EINVAL;
  3467. }
  3468. mutex_lock(&panel->panel_lock);
  3469. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3470. if (rc)
  3471. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3472. panel->name, rc);
  3473. mutex_unlock(&panel->panel_lock);
  3474. return rc;
  3475. }
  3476. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3477. {
  3478. int rc = 0;
  3479. if (!panel) {
  3480. DSI_ERR("Invalid params\n");
  3481. return -EINVAL;
  3482. }
  3483. mutex_lock(&panel->panel_lock);
  3484. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3485. if (rc)
  3486. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3487. panel->name, rc);
  3488. mutex_unlock(&panel->panel_lock);
  3489. return rc;
  3490. }
  3491. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3492. {
  3493. int rc = 0;
  3494. if (!panel) {
  3495. DSI_ERR("Invalid params\n");
  3496. return -EINVAL;
  3497. }
  3498. mutex_lock(&panel->panel_lock);
  3499. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3500. if (rc)
  3501. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3502. panel->name, rc);
  3503. mutex_unlock(&panel->panel_lock);
  3504. return rc;
  3505. }
  3506. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3507. {
  3508. int rc = 0;
  3509. if (!panel) {
  3510. DSI_ERR("Invalid params\n");
  3511. return -EINVAL;
  3512. }
  3513. mutex_lock(&panel->panel_lock);
  3514. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3515. if (rc)
  3516. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3517. panel->name, rc);
  3518. mutex_unlock(&panel->panel_lock);
  3519. return rc;
  3520. }
  3521. int dsi_panel_switch(struct dsi_panel *panel)
  3522. {
  3523. int rc = 0;
  3524. if (!panel) {
  3525. DSI_ERR("Invalid params\n");
  3526. return -EINVAL;
  3527. }
  3528. mutex_lock(&panel->panel_lock);
  3529. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3530. if (rc)
  3531. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3532. panel->name, rc);
  3533. mutex_unlock(&panel->panel_lock);
  3534. return rc;
  3535. }
  3536. int dsi_panel_post_switch(struct dsi_panel *panel)
  3537. {
  3538. int rc = 0;
  3539. if (!panel) {
  3540. DSI_ERR("Invalid params\n");
  3541. return -EINVAL;
  3542. }
  3543. mutex_lock(&panel->panel_lock);
  3544. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3545. if (rc)
  3546. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3547. panel->name, rc);
  3548. mutex_unlock(&panel->panel_lock);
  3549. return rc;
  3550. }
  3551. int dsi_panel_enable(struct dsi_panel *panel)
  3552. {
  3553. int rc = 0;
  3554. if (!panel) {
  3555. DSI_ERR("Invalid params\n");
  3556. return -EINVAL;
  3557. }
  3558. mutex_lock(&panel->panel_lock);
  3559. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3560. if (rc)
  3561. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3562. panel->name, rc);
  3563. else
  3564. panel->panel_initialized = true;
  3565. mutex_unlock(&panel->panel_lock);
  3566. return rc;
  3567. }
  3568. int dsi_panel_post_enable(struct dsi_panel *panel)
  3569. {
  3570. int rc = 0;
  3571. if (!panel) {
  3572. DSI_ERR("invalid params\n");
  3573. return -EINVAL;
  3574. }
  3575. mutex_lock(&panel->panel_lock);
  3576. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3577. if (rc) {
  3578. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3579. panel->name, rc);
  3580. goto error;
  3581. }
  3582. error:
  3583. mutex_unlock(&panel->panel_lock);
  3584. return rc;
  3585. }
  3586. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3587. {
  3588. int rc = 0;
  3589. if (!panel) {
  3590. DSI_ERR("invalid params\n");
  3591. return -EINVAL;
  3592. }
  3593. mutex_lock(&panel->panel_lock);
  3594. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3595. if (rc) {
  3596. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3597. panel->name, rc);
  3598. goto error;
  3599. }
  3600. error:
  3601. mutex_unlock(&panel->panel_lock);
  3602. return rc;
  3603. }
  3604. int dsi_panel_disable(struct dsi_panel *panel)
  3605. {
  3606. int rc = 0;
  3607. if (!panel) {
  3608. DSI_ERR("invalid params\n");
  3609. return -EINVAL;
  3610. }
  3611. mutex_lock(&panel->panel_lock);
  3612. /* Avoid sending panel off commands when ESD recovery is underway */
  3613. if (!atomic_read(&panel->esd_recovery_pending)) {
  3614. /*
  3615. * Need to set IBB/AB regulator mode to STANDBY,
  3616. * if panel is going off from AOD mode.
  3617. */
  3618. if (dsi_panel_is_type_oled(panel) &&
  3619. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3620. panel->power_mode == SDE_MODE_DPMS_LP2))
  3621. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3622. "ibb", REGULATOR_MODE_STANDBY);
  3623. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3624. if (rc) {
  3625. /*
  3626. * Sending panel off commands may fail when DSI
  3627. * controller is in a bad state. These failures can be
  3628. * ignored since controller will go for full reset on
  3629. * subsequent display enable anyway.
  3630. */
  3631. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3632. panel->name, rc);
  3633. rc = 0;
  3634. }
  3635. }
  3636. panel->panel_initialized = false;
  3637. panel->power_mode = SDE_MODE_DPMS_OFF;
  3638. mutex_unlock(&panel->panel_lock);
  3639. return rc;
  3640. }
  3641. int dsi_panel_unprepare(struct dsi_panel *panel)
  3642. {
  3643. int rc = 0;
  3644. if (!panel) {
  3645. DSI_ERR("invalid params\n");
  3646. return -EINVAL;
  3647. }
  3648. mutex_lock(&panel->panel_lock);
  3649. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3650. if (rc) {
  3651. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3652. panel->name, rc);
  3653. goto error;
  3654. }
  3655. error:
  3656. mutex_unlock(&panel->panel_lock);
  3657. return rc;
  3658. }
  3659. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3660. {
  3661. int rc = 0;
  3662. if (!panel) {
  3663. DSI_ERR("invalid params\n");
  3664. return -EINVAL;
  3665. }
  3666. mutex_lock(&panel->panel_lock);
  3667. rc = dsi_panel_power_off(panel);
  3668. if (rc) {
  3669. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3670. panel->name, rc);
  3671. goto error;
  3672. }
  3673. error:
  3674. mutex_unlock(&panel->panel_lock);
  3675. return rc;
  3676. }