dp_rx_err.c 98 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "dp_internal.h"
  25. #include "hal_api.h"
  26. #include "qdf_trace.h"
  27. #include "qdf_nbuf.h"
  28. #include "dp_rx_defrag.h"
  29. #include "dp_ipa.h"
  30. #ifdef WIFI_MONITOR_SUPPORT
  31. #include "dp_htt.h"
  32. #include <dp_mon.h>
  33. #endif
  34. #ifdef FEATURE_WDS
  35. #include "dp_txrx_wds.h"
  36. #endif
  37. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  38. #include "qdf_net_types.h"
  39. #include "dp_rx_buffer_pool.h"
  40. #define dp_rx_err_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX_ERROR, params)
  41. #define dp_rx_err_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX_ERROR, params)
  42. #define dp_rx_err_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX_ERROR, params)
  43. #define dp_rx_err_info(params...) \
  44. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  45. #define dp_rx_err_info_rl(params...) \
  46. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  47. #define dp_rx_err_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX_ERROR, params)
  48. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  49. /* Max buffer in invalid peer SG list*/
  50. #define DP_MAX_INVALID_BUFFERS 10
  51. /* Max regular Rx packet routing error */
  52. #define DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD 20
  53. #define DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT 10
  54. #define DP_RX_ERR_ROUTE_TIMEOUT_US (5 * 1000 * 1000) /* micro seconds */
  55. #ifdef FEATURE_MEC
  56. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  57. struct dp_txrx_peer *txrx_peer,
  58. uint8_t *rx_tlv_hdr,
  59. qdf_nbuf_t nbuf)
  60. {
  61. struct dp_vdev *vdev = txrx_peer->vdev;
  62. struct dp_pdev *pdev = vdev->pdev;
  63. struct dp_mec_entry *mecentry = NULL;
  64. struct dp_ast_entry *ase = NULL;
  65. uint16_t sa_idx = 0;
  66. uint8_t *data;
  67. /*
  68. * Multicast Echo Check is required only if vdev is STA and
  69. * received pkt is a multicast/broadcast pkt. otherwise
  70. * skip the MEC check.
  71. */
  72. if (vdev->opmode != wlan_op_mode_sta)
  73. return false;
  74. if (!hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  75. return false;
  76. data = qdf_nbuf_data(nbuf);
  77. /*
  78. * if the received pkts src mac addr matches with vdev
  79. * mac address then drop the pkt as it is looped back
  80. */
  81. if (!(qdf_mem_cmp(&data[QDF_MAC_ADDR_SIZE],
  82. vdev->mac_addr.raw,
  83. QDF_MAC_ADDR_SIZE)))
  84. return true;
  85. /*
  86. * In case of qwrap isolation mode, donot drop loopback packets.
  87. * In isolation mode, all packets from the wired stations need to go
  88. * to rootap and loop back to reach the wireless stations and
  89. * vice-versa.
  90. */
  91. if (qdf_unlikely(vdev->isolation_vdev))
  92. return false;
  93. /*
  94. * if the received pkts src mac addr matches with the
  95. * wired PCs MAC addr which is behind the STA or with
  96. * wireless STAs MAC addr which are behind the Repeater,
  97. * then drop the pkt as it is looped back
  98. */
  99. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  100. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  101. if ((sa_idx < 0) ||
  102. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  103. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  104. "invalid sa_idx: %d", sa_idx);
  105. qdf_assert_always(0);
  106. }
  107. qdf_spin_lock_bh(&soc->ast_lock);
  108. ase = soc->ast_table[sa_idx];
  109. /*
  110. * this check was not needed since MEC is not dependent on AST,
  111. * but if we dont have this check SON has some issues in
  112. * dual backhaul scenario. in APS SON mode, client connected
  113. * to RE 2G and sends multicast packets. the RE sends it to CAP
  114. * over 5G backhaul. the CAP loopback it on 2G to RE.
  115. * On receiving in 2G STA vap, we assume that client has roamed
  116. * and kickout the client.
  117. */
  118. if (ase && (ase->peer_id != txrx_peer->peer_id)) {
  119. qdf_spin_unlock_bh(&soc->ast_lock);
  120. goto drop;
  121. }
  122. qdf_spin_unlock_bh(&soc->ast_lock);
  123. }
  124. qdf_spin_lock_bh(&soc->mec_lock);
  125. mecentry = dp_peer_mec_hash_find_by_pdevid(soc, pdev->pdev_id,
  126. &data[QDF_MAC_ADDR_SIZE]);
  127. if (!mecentry) {
  128. qdf_spin_unlock_bh(&soc->mec_lock);
  129. return false;
  130. }
  131. qdf_spin_unlock_bh(&soc->mec_lock);
  132. drop:
  133. dp_rx_err_info("%pK: received pkt with same src mac " QDF_MAC_ADDR_FMT,
  134. soc, QDF_MAC_ADDR_REF(&data[QDF_MAC_ADDR_SIZE]));
  135. return true;
  136. }
  137. #endif
  138. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  139. void dp_rx_link_desc_refill_duplicate_check(
  140. struct dp_soc *soc,
  141. struct hal_buf_info *buf_info,
  142. hal_buff_addrinfo_t ring_buf_info)
  143. {
  144. struct hal_buf_info current_link_desc_buf_info = { 0 };
  145. /* do duplicate link desc address check */
  146. hal_rx_buffer_addr_info_get_paddr(ring_buf_info,
  147. &current_link_desc_buf_info);
  148. /*
  149. * TODO - Check if the hal soc api call can be removed
  150. * since the cookie is just used for print.
  151. * buffer_addr_info is the first element of ring_desc
  152. */
  153. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  154. (uint32_t *)ring_buf_info,
  155. &current_link_desc_buf_info);
  156. if (qdf_unlikely(current_link_desc_buf_info.paddr ==
  157. buf_info->paddr)) {
  158. dp_info_rl("duplicate link desc addr: %llu, cookie: 0x%x",
  159. current_link_desc_buf_info.paddr,
  160. current_link_desc_buf_info.sw_cookie);
  161. DP_STATS_INC(soc, rx.err.dup_refill_link_desc, 1);
  162. }
  163. *buf_info = current_link_desc_buf_info;
  164. }
  165. /**
  166. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  167. * (WBM) by address
  168. *
  169. * @soc: core DP main context
  170. * @link_desc_addr: link descriptor addr
  171. *
  172. * Return: QDF_STATUS
  173. */
  174. QDF_STATUS
  175. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  176. hal_buff_addrinfo_t link_desc_addr,
  177. uint8_t bm_action)
  178. {
  179. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  180. hal_ring_handle_t wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  181. hal_soc_handle_t hal_soc = soc->hal_soc;
  182. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  183. void *src_srng_desc;
  184. if (!wbm_rel_srng) {
  185. dp_rx_err_err("%pK: WBM RELEASE RING not initialized", soc);
  186. return status;
  187. }
  188. /* do duplicate link desc address check */
  189. dp_rx_link_desc_refill_duplicate_check(
  190. soc,
  191. &soc->last_op_info.wbm_rel_link_desc,
  192. link_desc_addr);
  193. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  194. /* TODO */
  195. /*
  196. * Need API to convert from hal_ring pointer to
  197. * Ring Type / Ring Id combo
  198. */
  199. dp_rx_err_err("%pK: HAL RING Access For WBM Release SRNG Failed - %pK",
  200. soc, wbm_rel_srng);
  201. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  202. goto done;
  203. }
  204. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  205. if (qdf_likely(src_srng_desc)) {
  206. /* Return link descriptor through WBM ring (SW2WBM)*/
  207. hal_rx_msdu_link_desc_set(hal_soc,
  208. src_srng_desc, link_desc_addr, bm_action);
  209. status = QDF_STATUS_SUCCESS;
  210. } else {
  211. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  212. DP_STATS_INC(soc, rx.err.hal_ring_access_full_fail, 1);
  213. dp_info_rl("WBM Release Ring (Id %d) Full(Fail CNT %u)",
  214. srng->ring_id,
  215. soc->stats.rx.err.hal_ring_access_full_fail);
  216. dp_info_rl("HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  217. *srng->u.src_ring.hp_addr,
  218. srng->u.src_ring.reap_hp,
  219. *srng->u.src_ring.tp_addr,
  220. srng->u.src_ring.cached_tp);
  221. QDF_BUG(0);
  222. }
  223. done:
  224. hal_srng_access_end(hal_soc, wbm_rel_srng);
  225. return status;
  226. }
  227. qdf_export_symbol(dp_rx_link_desc_return_by_addr);
  228. /**
  229. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  230. * (WBM), following error handling
  231. *
  232. * @soc: core DP main context
  233. * @ring_desc: opaque pointer to the REO error ring descriptor
  234. *
  235. * Return: QDF_STATUS
  236. */
  237. QDF_STATUS
  238. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  239. uint8_t bm_action)
  240. {
  241. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  242. return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
  243. }
  244. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  245. /**
  246. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  247. *
  248. * @soc: core txrx main context
  249. * @ring_desc: opaque pointer to the REO error ring descriptor
  250. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  251. * @head: head of the local descriptor free-list
  252. * @tail: tail of the local descriptor free-list
  253. * @quota: No. of units (packets) that can be serviced in one shot.
  254. *
  255. * This function is used to drop all MSDU in an MPDU
  256. *
  257. * Return: uint32_t: No. of elements processed
  258. */
  259. static uint32_t
  260. dp_rx_msdus_drop(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  261. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  262. uint8_t *mac_id,
  263. uint32_t quota)
  264. {
  265. uint32_t rx_bufs_used = 0;
  266. void *link_desc_va;
  267. struct hal_buf_info buf_info;
  268. struct dp_pdev *pdev;
  269. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  270. int i;
  271. uint8_t *rx_tlv_hdr;
  272. uint32_t tid;
  273. struct rx_desc_pool *rx_desc_pool;
  274. struct dp_rx_desc *rx_desc;
  275. /* First field in REO Dst ring Desc is buffer_addr_info */
  276. void *buf_addr_info = ring_desc;
  277. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  278. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  279. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &buf_info);
  280. /* buffer_addr_info is the first element of ring_desc */
  281. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  282. (uint32_t *)ring_desc,
  283. &buf_info);
  284. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  285. if (!link_desc_va) {
  286. dp_rx_err_debug("link desc va is null, soc %pk", soc);
  287. return rx_bufs_used;
  288. }
  289. more_msdu_link_desc:
  290. /* No UNMAP required -- this is "malloc_consistent" memory */
  291. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  292. &mpdu_desc_info->msdu_count);
  293. for (i = 0; (i < mpdu_desc_info->msdu_count); i++) {
  294. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  295. soc, msdu_list.sw_cookie[i]);
  296. qdf_assert_always(rx_desc);
  297. /* all buffers from a MSDU link link belong to same pdev */
  298. *mac_id = rx_desc->pool_id;
  299. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  300. if (!pdev) {
  301. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  302. soc, rx_desc->pool_id);
  303. return rx_bufs_used;
  304. }
  305. if (!dp_rx_desc_check_magic(rx_desc)) {
  306. dp_rx_err_err("%pK: Invalid rx_desc cookie=%d",
  307. soc, msdu_list.sw_cookie[i]);
  308. return rx_bufs_used;
  309. }
  310. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  311. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  312. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, rx_desc->nbuf);
  313. rx_desc->unmapped = 1;
  314. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  315. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  316. rx_bufs_used++;
  317. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  318. rx_desc->rx_buf_start);
  319. dp_rx_err_err("%pK: Packet received with PN error for tid :%d",
  320. soc, tid);
  321. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  322. if (hal_rx_encryption_info_valid(soc->hal_soc, rx_tlv_hdr))
  323. hal_rx_print_pn(soc->hal_soc, rx_tlv_hdr);
  324. /* Just free the buffers */
  325. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf, *mac_id);
  326. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  327. &pdev->free_list_tail, rx_desc);
  328. }
  329. /*
  330. * If the msdu's are spread across multiple link-descriptors,
  331. * we cannot depend solely on the msdu_count(e.g., if msdu is
  332. * spread across multiple buffers).Hence, it is
  333. * necessary to check the next link_descriptor and release
  334. * all the msdu's that are part of it.
  335. */
  336. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  337. link_desc_va,
  338. &next_link_desc_addr_info);
  339. if (hal_rx_is_buf_addr_info_valid(
  340. &next_link_desc_addr_info)) {
  341. /* Clear the next link desc info for the current link_desc */
  342. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  343. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  344. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  345. hal_rx_buffer_addr_info_get_paddr(
  346. &next_link_desc_addr_info,
  347. &buf_info);
  348. /* buffer_addr_info is the first element of ring_desc */
  349. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  350. (uint32_t *)&next_link_desc_addr_info,
  351. &buf_info);
  352. cur_link_desc_addr_info = next_link_desc_addr_info;
  353. buf_addr_info = &cur_link_desc_addr_info;
  354. link_desc_va =
  355. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  356. goto more_msdu_link_desc;
  357. }
  358. quota--;
  359. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  360. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  361. return rx_bufs_used;
  362. }
  363. /**
  364. * dp_rx_pn_error_handle() - Handles PN check errors
  365. *
  366. * @soc: core txrx main context
  367. * @ring_desc: opaque pointer to the REO error ring descriptor
  368. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  369. * @head: head of the local descriptor free-list
  370. * @tail: tail of the local descriptor free-list
  371. * @quota: No. of units (packets) that can be serviced in one shot.
  372. *
  373. * This function implements PN error handling
  374. * If the peer is configured to ignore the PN check errors
  375. * or if DP feels, that this frame is still OK, the frame can be
  376. * re-injected back to REO to use some of the other features
  377. * of REO e.g. duplicate detection/routing to other cores
  378. *
  379. * Return: uint32_t: No. of elements processed
  380. */
  381. static uint32_t
  382. dp_rx_pn_error_handle(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  383. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  384. uint8_t *mac_id,
  385. uint32_t quota)
  386. {
  387. uint16_t peer_id;
  388. uint32_t rx_bufs_used = 0;
  389. struct dp_txrx_peer *txrx_peer;
  390. bool peer_pn_policy = false;
  391. dp_txrx_ref_handle txrx_ref_handle = NULL;
  392. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  393. mpdu_desc_info->peer_meta_data);
  394. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  395. &txrx_ref_handle,
  396. DP_MOD_ID_RX_ERR);
  397. if (qdf_likely(txrx_peer)) {
  398. /*
  399. * TODO: Check for peer specific policies & set peer_pn_policy
  400. */
  401. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  402. "discard rx due to PN error for peer %pK",
  403. txrx_peer);
  404. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  405. }
  406. dp_rx_err_err("%pK: Packet received with PN error", soc);
  407. /* No peer PN policy -- definitely drop */
  408. if (!peer_pn_policy)
  409. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  410. mpdu_desc_info,
  411. mac_id, quota);
  412. return rx_bufs_used;
  413. }
  414. #ifdef DP_RX_DELIVER_ALL_OOR_FRAMES
  415. /**
  416. * dp_rx_deliver_oor_frame() - deliver OOR frames to stack
  417. * @soc: Datapath soc handler
  418. * @peer: pointer to DP peer
  419. * @nbuf: pointer to the skb of RX frame
  420. * @frame_mask: the mask for speical frame needed
  421. * @rx_tlv_hdr: start of rx tlv header
  422. *
  423. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  424. * single nbuf is expected.
  425. *
  426. * return: true - nbuf has been delivered to stack, false - not.
  427. */
  428. static bool
  429. dp_rx_deliver_oor_frame(struct dp_soc *soc,
  430. struct dp_txrx_peer *txrx_peer,
  431. qdf_nbuf_t nbuf, uint32_t frame_mask,
  432. uint8_t *rx_tlv_hdr)
  433. {
  434. uint32_t l2_hdr_offset = 0;
  435. uint16_t msdu_len = 0;
  436. uint32_t skip_len;
  437. l2_hdr_offset =
  438. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  439. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  440. skip_len = l2_hdr_offset;
  441. } else {
  442. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  443. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  444. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  445. }
  446. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  447. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  448. qdf_nbuf_pull_head(nbuf, skip_len);
  449. qdf_nbuf_set_exc_frame(nbuf, 1);
  450. dp_info_rl("OOR frame, mpdu sn 0x%x",
  451. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  452. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer, nbuf, NULL);
  453. return true;
  454. }
  455. #else
  456. static bool
  457. dp_rx_deliver_oor_frame(struct dp_soc *soc,
  458. struct dp_txrx_peer *txrx_peer,
  459. qdf_nbuf_t nbuf, uint32_t frame_mask,
  460. uint8_t *rx_tlv_hdr)
  461. {
  462. return dp_rx_deliver_special_frame(soc, txrx_peer, nbuf, frame_mask,
  463. rx_tlv_hdr);
  464. }
  465. #endif
  466. /**
  467. * dp_rx_oor_handle() - Handles the msdu which is OOR error
  468. *
  469. * @soc: core txrx main context
  470. * @nbuf: pointer to msdu skb
  471. * @peer_id: dp peer ID
  472. * @rx_tlv_hdr: start of rx tlv header
  473. *
  474. * This function process the msdu delivered from REO2TCL
  475. * ring with error type OOR
  476. *
  477. * Return: None
  478. */
  479. static void
  480. dp_rx_oor_handle(struct dp_soc *soc,
  481. qdf_nbuf_t nbuf,
  482. uint16_t peer_id,
  483. uint8_t *rx_tlv_hdr)
  484. {
  485. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  486. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  487. struct dp_txrx_peer *txrx_peer = NULL;
  488. dp_txrx_ref_handle txrx_ref_handle = NULL;
  489. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  490. &txrx_ref_handle,
  491. DP_MOD_ID_RX_ERR);
  492. if (!txrx_peer) {
  493. dp_info_rl("peer not found");
  494. goto free_nbuf;
  495. }
  496. if (dp_rx_deliver_oor_frame(soc, txrx_peer, nbuf, frame_mask,
  497. rx_tlv_hdr)) {
  498. DP_STATS_INC(soc, rx.err.reo_err_oor_to_stack, 1);
  499. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  500. return;
  501. }
  502. free_nbuf:
  503. if (txrx_peer)
  504. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  505. DP_STATS_INC(soc, rx.err.reo_err_oor_drop, 1);
  506. dp_rx_nbuf_free(nbuf);
  507. }
  508. /**
  509. * dp_rx_err_nbuf_pn_check() - Check if the PN number of this current packet
  510. * is a monotonous increment of packet number
  511. * from the previous successfully re-ordered
  512. * frame.
  513. * @soc: Datapath SOC handle
  514. * @ring_desc: REO ring descriptor
  515. * @nbuf: Current packet
  516. *
  517. * Return: QDF_STATUS_SUCCESS, if the pn check passes, else QDF_STATUS_E_FAILURE
  518. */
  519. static inline QDF_STATUS
  520. dp_rx_err_nbuf_pn_check(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  521. qdf_nbuf_t nbuf)
  522. {
  523. uint64_t prev_pn, curr_pn[2];
  524. if (!hal_rx_encryption_info_valid(soc->hal_soc, qdf_nbuf_data(nbuf)))
  525. return QDF_STATUS_SUCCESS;
  526. hal_rx_reo_prev_pn_get(soc->hal_soc, ring_desc, &prev_pn);
  527. hal_rx_tlv_get_pn_num(soc->hal_soc, qdf_nbuf_data(nbuf), curr_pn);
  528. if (curr_pn[0] > prev_pn)
  529. return QDF_STATUS_SUCCESS;
  530. return QDF_STATUS_E_FAILURE;
  531. }
  532. #ifdef WLAN_SKIP_BAR_UPDATE
  533. static
  534. void dp_rx_err_handle_bar(struct dp_soc *soc,
  535. struct dp_peer *peer,
  536. qdf_nbuf_t nbuf)
  537. {
  538. dp_info_rl("BAR update to H.W is skipped");
  539. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  540. }
  541. #else
  542. static
  543. void dp_rx_err_handle_bar(struct dp_soc *soc,
  544. struct dp_peer *peer,
  545. qdf_nbuf_t nbuf)
  546. {
  547. uint8_t *rx_tlv_hdr;
  548. unsigned char type, subtype;
  549. uint16_t start_seq_num;
  550. uint32_t tid;
  551. QDF_STATUS status;
  552. struct ieee80211_frame_bar *bar;
  553. /*
  554. * 1. Is this a BAR frame. If not Discard it.
  555. * 2. If it is, get the peer id, tid, ssn
  556. * 2a Do a tid update
  557. */
  558. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  559. bar = (struct ieee80211_frame_bar *)(rx_tlv_hdr + soc->rx_pkt_tlv_size);
  560. type = bar->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
  561. subtype = bar->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
  562. if (!(type == IEEE80211_FC0_TYPE_CTL &&
  563. subtype == QDF_IEEE80211_FC0_SUBTYPE_BAR)) {
  564. dp_err_rl("Not a BAR frame!");
  565. return;
  566. }
  567. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  568. qdf_assert_always(tid < DP_MAX_TIDS);
  569. start_seq_num = le16toh(bar->i_seq) >> IEEE80211_SEQ_SEQ_SHIFT;
  570. dp_info_rl("tid %u window_size %u start_seq_num %u",
  571. tid, peer->rx_tid[tid].ba_win_size, start_seq_num);
  572. status = dp_rx_tid_update_wifi3(peer, tid,
  573. peer->rx_tid[tid].ba_win_size,
  574. start_seq_num,
  575. true);
  576. if (status != QDF_STATUS_SUCCESS) {
  577. dp_err_rl("failed to handle bar frame update rx tid");
  578. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  579. } else {
  580. DP_STATS_INC(soc, rx.err.ssn_update_count, 1);
  581. }
  582. }
  583. #endif
  584. /**
  585. * _dp_rx_bar_frame_handle(): Core of the BAR frame handling
  586. * @soc: Datapath SoC handle
  587. * @nbuf: packet being processed
  588. * @mpdu_desc_info: mpdu desc info for the current packet
  589. * @tid: tid on which the packet arrived
  590. * @err_status: Flag to indicate if REO encountered an error while routing this
  591. * frame
  592. * @error_code: REO error code
  593. *
  594. * Return: None
  595. */
  596. static void
  597. _dp_rx_bar_frame_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  598. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  599. uint32_t tid, uint8_t err_status, uint32_t error_code)
  600. {
  601. uint16_t peer_id;
  602. struct dp_peer *peer;
  603. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  604. mpdu_desc_info->peer_meta_data);
  605. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  606. if (!peer)
  607. return;
  608. dp_info("BAR frame: "
  609. " peer_id = %d"
  610. " tid = %u"
  611. " SSN = %d"
  612. " error status = %d",
  613. peer->peer_id,
  614. tid,
  615. mpdu_desc_info->mpdu_seq,
  616. err_status);
  617. if (err_status == HAL_REO_ERROR_DETECTED) {
  618. switch (error_code) {
  619. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  620. /* fallthrough */
  621. case HAL_REO_ERR_BAR_FRAME_OOR:
  622. dp_rx_err_handle_bar(soc, peer, nbuf);
  623. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  624. break;
  625. default:
  626. DP_STATS_INC(soc, rx.bar_frame, 1);
  627. }
  628. }
  629. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  630. }
  631. #ifdef DP_INVALID_PEER_ASSERT
  632. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) \
  633. do { \
  634. qdf_assert_always(!(head)); \
  635. qdf_assert_always(!(tail)); \
  636. } while (0)
  637. #else
  638. #define DP_PDEV_INVALID_PEER_MSDU_CHECK(head, tail) /* no op */
  639. #endif
  640. /**
  641. * dp_rx_chain_msdus() - Function to chain all msdus of a mpdu
  642. * to pdev invalid peer list
  643. *
  644. * @soc: core DP main context
  645. * @nbuf: Buffer pointer
  646. * @rx_tlv_hdr: start of rx tlv header
  647. * @mac_id: mac id
  648. *
  649. * Return: bool: true for last msdu of mpdu
  650. */
  651. static bool
  652. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf,
  653. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  654. {
  655. bool mpdu_done = false;
  656. qdf_nbuf_t curr_nbuf = NULL;
  657. qdf_nbuf_t tmp_nbuf = NULL;
  658. /* TODO: Currently only single radio is supported, hence
  659. * pdev hard coded to '0' index
  660. */
  661. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  662. if (!dp_pdev) {
  663. dp_rx_err_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  664. return mpdu_done;
  665. }
  666. /* if invalid peer SG list has max values free the buffers in list
  667. * and treat current buffer as start of list
  668. *
  669. * current logic to detect the last buffer from attn_tlv is not reliable
  670. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  671. * up
  672. */
  673. if (!dp_pdev->first_nbuf ||
  674. (dp_pdev->invalid_peer_head_msdu &&
  675. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  676. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  677. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  678. dp_pdev->ppdu_id = hal_rx_get_ppdu_id(soc->hal_soc,
  679. rx_tlv_hdr);
  680. dp_pdev->first_nbuf = true;
  681. /* If the new nbuf received is the first msdu of the
  682. * amsdu and there are msdus in the invalid peer msdu
  683. * list, then let us free all the msdus of the invalid
  684. * peer msdu list.
  685. * This scenario can happen when we start receiving
  686. * new a-msdu even before the previous a-msdu is completely
  687. * received.
  688. */
  689. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  690. while (curr_nbuf) {
  691. tmp_nbuf = curr_nbuf->next;
  692. dp_rx_nbuf_free(curr_nbuf);
  693. curr_nbuf = tmp_nbuf;
  694. }
  695. dp_pdev->invalid_peer_head_msdu = NULL;
  696. dp_pdev->invalid_peer_tail_msdu = NULL;
  697. dp_monitor_get_mpdu_status(dp_pdev, soc, rx_tlv_hdr);
  698. }
  699. if (dp_pdev->ppdu_id == hal_rx_attn_phy_ppdu_id_get(soc->hal_soc,
  700. rx_tlv_hdr) &&
  701. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  702. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  703. qdf_assert_always(dp_pdev->first_nbuf == true);
  704. dp_pdev->first_nbuf = false;
  705. mpdu_done = true;
  706. }
  707. /*
  708. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  709. * should be NULL here, add the checking for debugging purpose
  710. * in case some corner case.
  711. */
  712. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  713. dp_pdev->invalid_peer_tail_msdu);
  714. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  715. dp_pdev->invalid_peer_tail_msdu,
  716. nbuf);
  717. return mpdu_done;
  718. }
  719. /**
  720. * dp_rx_bar_frame_handle() - Function to handle err BAR frames
  721. * @soc: core DP main context
  722. * @ring_desc: Hal ring desc
  723. * @rx_desc: dp rx desc
  724. * @mpdu_desc_info: mpdu desc info
  725. *
  726. * Handle the error BAR frames received. Ensure the SOC level
  727. * stats are updated based on the REO error code. The BAR frames
  728. * are further processed by updating the Rx tids with the start
  729. * sequence number (SSN) and BA window size. Desc is returned
  730. * to the free desc list
  731. *
  732. * Return: none
  733. */
  734. static void
  735. dp_rx_bar_frame_handle(struct dp_soc *soc,
  736. hal_ring_desc_t ring_desc,
  737. struct dp_rx_desc *rx_desc,
  738. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  739. uint8_t err_status,
  740. uint32_t err_code)
  741. {
  742. qdf_nbuf_t nbuf;
  743. struct dp_pdev *pdev;
  744. struct rx_desc_pool *rx_desc_pool;
  745. uint8_t *rx_tlv_hdr;
  746. uint32_t tid;
  747. nbuf = rx_desc->nbuf;
  748. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  749. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  750. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  751. rx_desc->unmapped = 1;
  752. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  753. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  754. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  755. rx_tlv_hdr);
  756. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  757. _dp_rx_bar_frame_handle(soc, nbuf, mpdu_desc_info, tid, err_status,
  758. err_code);
  759. dp_rx_link_desc_return(soc, ring_desc,
  760. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  761. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  762. rx_desc->pool_id);
  763. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  764. &pdev->free_list_tail,
  765. rx_desc);
  766. }
  767. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  768. /**
  769. * dp_2k_jump_handle() - Function to handle 2k jump exception
  770. * on WBM ring
  771. *
  772. * @soc: core DP main context
  773. * @nbuf: buffer pointer
  774. * @rx_tlv_hdr: start of rx tlv header
  775. * @peer_id: peer id of first msdu
  776. * @tid: Tid for which exception occurred
  777. *
  778. * This function handles 2k jump violations arising out
  779. * of receiving aggregates in non BA case. This typically
  780. * may happen if aggregates are received on a QOS enabled TID
  781. * while Rx window size is still initialized to value of 2. Or
  782. * it may also happen if negotiated window size is 1 but peer
  783. * sends aggregates.
  784. *
  785. */
  786. void
  787. dp_2k_jump_handle(struct dp_soc *soc,
  788. qdf_nbuf_t nbuf,
  789. uint8_t *rx_tlv_hdr,
  790. uint16_t peer_id,
  791. uint8_t tid)
  792. {
  793. struct dp_peer *peer = NULL;
  794. struct dp_rx_tid *rx_tid = NULL;
  795. uint32_t frame_mask = FRAME_MASK_IPV4_ARP;
  796. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  797. if (!peer) {
  798. dp_rx_err_info_rl("%pK: peer not found", soc);
  799. goto free_nbuf;
  800. }
  801. if (tid >= DP_MAX_TIDS) {
  802. dp_info_rl("invalid tid");
  803. goto nbuf_deliver;
  804. }
  805. rx_tid = &peer->rx_tid[tid];
  806. qdf_spin_lock_bh(&rx_tid->tid_lock);
  807. /* only if BA session is active, allow send Delba */
  808. if (rx_tid->ba_status != DP_RX_BA_ACTIVE) {
  809. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  810. goto nbuf_deliver;
  811. }
  812. if (!rx_tid->delba_tx_status) {
  813. rx_tid->delba_tx_retry++;
  814. rx_tid->delba_tx_status = 1;
  815. rx_tid->delba_rcode =
  816. IEEE80211_REASON_QOS_SETUP_REQUIRED;
  817. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  818. if (soc->cdp_soc.ol_ops->send_delba) {
  819. DP_STATS_INC(soc, rx.err.rx_2k_jump_delba_sent,
  820. 1);
  821. soc->cdp_soc.ol_ops->send_delba(
  822. peer->vdev->pdev->soc->ctrl_psoc,
  823. peer->vdev->vdev_id,
  824. peer->mac_addr.raw,
  825. tid,
  826. rx_tid->delba_rcode,
  827. CDP_DELBA_2K_JUMP);
  828. }
  829. } else {
  830. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  831. }
  832. nbuf_deliver:
  833. if (dp_rx_deliver_special_frame(soc, peer->txrx_peer, nbuf, frame_mask,
  834. rx_tlv_hdr)) {
  835. DP_STATS_INC(soc, rx.err.rx_2k_jump_to_stack, 1);
  836. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  837. return;
  838. }
  839. free_nbuf:
  840. if (peer)
  841. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  842. DP_STATS_INC(soc, rx.err.rx_2k_jump_drop, 1);
  843. dp_rx_nbuf_free(nbuf);
  844. }
  845. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  846. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_KIWI)
  847. /**
  848. * dp_rx_null_q_handle_invalid_peer_id_exception() - to find exception
  849. * @soc: pointer to dp_soc struct
  850. * @pool_id: Pool id to find dp_pdev
  851. * @rx_tlv_hdr: TLV header of received packet
  852. * @nbuf: SKB
  853. *
  854. * In certain types of packets if peer_id is not correct then
  855. * driver may not be able find. Try finding peer by addr_2 of
  856. * received MPDU. If you find the peer then most likely sw_peer_id &
  857. * ast_idx is corrupted.
  858. *
  859. * Return: True if you find the peer by addr_2 of received MPDU else false
  860. */
  861. static bool
  862. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  863. uint8_t pool_id,
  864. uint8_t *rx_tlv_hdr,
  865. qdf_nbuf_t nbuf)
  866. {
  867. struct dp_peer *peer = NULL;
  868. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  869. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  870. struct ieee80211_frame *wh = (struct ieee80211_frame *)rx_pkt_hdr;
  871. if (!pdev) {
  872. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  873. soc, pool_id);
  874. return false;
  875. }
  876. /*
  877. * WAR- In certain types of packets if peer_id is not correct then
  878. * driver may not be able find. Try finding peer by addr_2 of
  879. * received MPDU
  880. */
  881. if (wh)
  882. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  883. DP_VDEV_ALL, DP_MOD_ID_RX_ERR);
  884. if (peer) {
  885. dp_verbose_debug("MPDU sw_peer_id & ast_idx is corrupted");
  886. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  887. QDF_TRACE_LEVEL_DEBUG);
  888. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer_id,
  889. 1, qdf_nbuf_len(nbuf));
  890. dp_rx_nbuf_free(nbuf);
  891. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  892. return true;
  893. }
  894. return false;
  895. }
  896. /**
  897. * dp_rx_check_pkt_len() - Check for pktlen validity
  898. * @soc: DP SOC context
  899. * @pkt_len: computed length of the pkt from caller in bytes
  900. *
  901. * Return: true if pktlen > RX_BUFFER_SIZE, else return false
  902. *
  903. */
  904. static inline
  905. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  906. {
  907. if (qdf_unlikely(pkt_len > RX_DATA_BUFFER_SIZE)) {
  908. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_pkt_len,
  909. 1, pkt_len);
  910. return true;
  911. } else {
  912. return false;
  913. }
  914. }
  915. #else
  916. static inline bool
  917. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  918. uint8_t pool_id,
  919. uint8_t *rx_tlv_hdr,
  920. qdf_nbuf_t nbuf)
  921. {
  922. return false;
  923. }
  924. static inline
  925. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  926. {
  927. return false;
  928. }
  929. #endif
  930. /*
  931. * dp_rx_deliver_to_osif_stack() - function to deliver rx pkts to stack
  932. * @soc: DP soc
  933. * @vdv: DP vdev handle
  934. * @txrx_peer: pointer to the txrx_peer object
  935. * @nbuf: skb list head
  936. * @tail: skb list tail
  937. * @is_eapol: eapol pkt check
  938. *
  939. * Return: None
  940. */
  941. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  942. static inline void
  943. dp_rx_deliver_to_osif_stack(struct dp_soc *soc,
  944. struct dp_vdev *vdev,
  945. struct dp_txrx_peer *txrx_peer,
  946. qdf_nbuf_t nbuf,
  947. qdf_nbuf_t tail,
  948. bool is_eapol)
  949. {
  950. if (is_eapol && soc->eapol_over_control_port)
  951. dp_rx_eapol_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  952. else
  953. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  954. }
  955. #else
  956. static inline void
  957. dp_rx_deliver_to_osif_stack(struct dp_soc *soc,
  958. struct dp_vdev *vdev,
  959. struct dp_txrx_peer *txrx_peer,
  960. qdf_nbuf_t nbuf,
  961. qdf_nbuf_t tail,
  962. bool is_eapol)
  963. {
  964. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  965. }
  966. #endif
  967. #ifdef WLAN_FEATURE_11BE_MLO
  968. /*
  969. * dp_rx_err_match_dhost() - function to check whether dest-mac is correct
  970. * @eh: Ethernet header of incoming packet
  971. * @vdev: dp_vdev object of the VAP on which this data packet is received
  972. *
  973. * Return: 1 if the destination mac is correct,
  974. * 0 if this frame is not correctly destined to this VAP/MLD
  975. */
  976. int dp_rx_err_match_dhost(qdf_ether_header_t *eh, struct dp_vdev *vdev)
  977. {
  978. return ((qdf_mem_cmp(eh->ether_dhost, &vdev->mac_addr.raw[0],
  979. QDF_MAC_ADDR_SIZE) == 0) ||
  980. (qdf_mem_cmp(eh->ether_dhost, &vdev->mld_mac_addr.raw[0],
  981. QDF_MAC_ADDR_SIZE) == 0));
  982. }
  983. #else
  984. int dp_rx_err_match_dhost(qdf_ether_header_t *eh, struct dp_vdev *vdev)
  985. {
  986. return (qdf_mem_cmp(eh->ether_dhost, &vdev->mac_addr.raw[0],
  987. QDF_MAC_ADDR_SIZE) == 0);
  988. }
  989. #endif
  990. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  991. /**
  992. * dp_rx_err_drop_3addr_mcast() - Check if feature drop_3ddr_mcast is enabled
  993. * If so, drop the multicast frame.
  994. * @vdev: datapath vdev
  995. * @rx_tlv_hdr: TLV header
  996. *
  997. * Return: true if packet is to be dropped,
  998. * false, if packet is not dropped.
  999. */
  1000. static bool
  1001. dp_rx_err_drop_3addr_mcast(struct dp_vdev *vdev, uint8_t *rx_tlv_hdr)
  1002. {
  1003. struct dp_soc *soc = vdev->pdev->soc;
  1004. if (!vdev->drop_3addr_mcast)
  1005. return false;
  1006. if (vdev->opmode != wlan_op_mode_sta)
  1007. return false;
  1008. if (hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  1009. return true;
  1010. return false;
  1011. }
  1012. /**
  1013. * dp_rx_err_is_pn_check_needed() - Check if the packet number check is needed
  1014. * for this frame received in REO error ring.
  1015. * @soc: Datapath SOC handle
  1016. * @error: REO error detected or not
  1017. * @error_code: Error code in case of REO error
  1018. *
  1019. * Return: true if pn check if needed in software,
  1020. * false, if pn check if not needed.
  1021. */
  1022. static inline bool
  1023. dp_rx_err_is_pn_check_needed(struct dp_soc *soc, uint8_t error,
  1024. uint32_t error_code)
  1025. {
  1026. return (soc->features.pn_in_reo_dest &&
  1027. (error == HAL_REO_ERROR_DETECTED &&
  1028. (hal_rx_reo_is_2k_jump(error_code) ||
  1029. hal_rx_reo_is_oor_error(error_code) ||
  1030. hal_rx_reo_is_bar_oor_2k_jump(error_code))));
  1031. }
  1032. /**
  1033. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  1034. * descriptor violation on either a
  1035. * REO or WBM ring
  1036. *
  1037. * @soc: core DP main context
  1038. * @nbuf: buffer pointer
  1039. * @rx_tlv_hdr: start of rx tlv header
  1040. * @pool_id: mac id
  1041. * @txrx_peer: txrx peer handle
  1042. *
  1043. * This function handles NULL queue descriptor violations arising out
  1044. * a missing REO queue for a given peer or a given TID. This typically
  1045. * may happen if a packet is received on a QOS enabled TID before the
  1046. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  1047. * it may also happen for MC/BC frames if they are not routed to the
  1048. * non-QOS TID queue, in the absence of any other default TID queue.
  1049. * This error can show up both in a REO destination or WBM release ring.
  1050. *
  1051. * Return: QDF_STATUS_SUCCESS, if nbuf handled successfully. QDF status code
  1052. * if nbuf could not be handled or dropped.
  1053. */
  1054. static QDF_STATUS
  1055. dp_rx_null_q_desc_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1056. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  1057. struct dp_txrx_peer *txrx_peer)
  1058. {
  1059. uint32_t pkt_len;
  1060. uint16_t msdu_len;
  1061. struct dp_vdev *vdev;
  1062. uint8_t tid;
  1063. qdf_ether_header_t *eh;
  1064. struct hal_rx_msdu_metadata msdu_metadata;
  1065. uint16_t sa_idx = 0;
  1066. bool is_eapol = 0;
  1067. bool enh_flag;
  1068. qdf_nbuf_set_rx_chfrag_start(nbuf,
  1069. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1070. rx_tlv_hdr));
  1071. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1072. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1073. rx_tlv_hdr));
  1074. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1075. rx_tlv_hdr));
  1076. qdf_nbuf_set_da_valid(nbuf,
  1077. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1078. rx_tlv_hdr));
  1079. qdf_nbuf_set_sa_valid(nbuf,
  1080. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1081. rx_tlv_hdr));
  1082. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1083. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1084. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1085. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1086. if (dp_rx_check_pkt_len(soc, pkt_len))
  1087. goto drop_nbuf;
  1088. /* Set length in nbuf */
  1089. qdf_nbuf_set_pktlen(
  1090. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1091. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1092. }
  1093. /*
  1094. * Check if DMA completed -- msdu_done is the last bit
  1095. * to be written
  1096. */
  1097. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1098. dp_err_rl("MSDU DONE failure");
  1099. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1100. QDF_TRACE_LEVEL_INFO);
  1101. qdf_assert(0);
  1102. }
  1103. if (!txrx_peer &&
  1104. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1105. rx_tlv_hdr, nbuf))
  1106. return QDF_STATUS_E_FAILURE;
  1107. if (!txrx_peer) {
  1108. bool mpdu_done = false;
  1109. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1110. if (!pdev) {
  1111. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1112. return QDF_STATUS_E_FAILURE;
  1113. }
  1114. dp_err_rl("txrx_peer is NULL");
  1115. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1116. qdf_nbuf_len(nbuf));
  1117. /* QCN9000 has the support enabled */
  1118. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1119. mpdu_done = true;
  1120. nbuf->next = NULL;
  1121. /* Trigger invalid peer handler wrapper */
  1122. dp_rx_process_invalid_peer_wrapper(soc,
  1123. nbuf, mpdu_done, pool_id);
  1124. } else {
  1125. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_tlv_hdr, pool_id);
  1126. /* Trigger invalid peer handler wrapper */
  1127. dp_rx_process_invalid_peer_wrapper(soc,
  1128. pdev->invalid_peer_head_msdu,
  1129. mpdu_done, pool_id);
  1130. }
  1131. if (mpdu_done) {
  1132. pdev->invalid_peer_head_msdu = NULL;
  1133. pdev->invalid_peer_tail_msdu = NULL;
  1134. }
  1135. return QDF_STATUS_E_FAILURE;
  1136. }
  1137. vdev = txrx_peer->vdev;
  1138. if (!vdev) {
  1139. dp_err_rl("Null vdev!");
  1140. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1141. goto drop_nbuf;
  1142. }
  1143. /*
  1144. * Advance the packet start pointer by total size of
  1145. * pre-header TLV's
  1146. */
  1147. if (qdf_nbuf_is_frag(nbuf))
  1148. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1149. else
  1150. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1151. soc->rx_pkt_tlv_size));
  1152. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1153. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1154. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1155. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1);
  1156. goto drop_nbuf;
  1157. }
  1158. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1159. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1160. if ((sa_idx < 0) ||
  1161. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1162. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1163. goto drop_nbuf;
  1164. }
  1165. }
  1166. if ((!soc->mec_fw_offload) &&
  1167. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1168. /* this is a looped back MCBC pkt, drop it */
  1169. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1170. qdf_nbuf_len(nbuf));
  1171. goto drop_nbuf;
  1172. }
  1173. /*
  1174. * In qwrap mode if the received packet matches with any of the vdev
  1175. * mac addresses, drop it. Donot receive multicast packets originated
  1176. * from any proxysta.
  1177. */
  1178. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1179. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1180. qdf_nbuf_len(nbuf));
  1181. goto drop_nbuf;
  1182. }
  1183. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1184. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1185. rx_tlv_hdr))) {
  1186. dp_err_rl("free buffer for multicast packet");
  1187. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1);
  1188. goto drop_nbuf;
  1189. }
  1190. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1191. dp_err_rl("mcast Policy Check Drop pkt");
  1192. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1);
  1193. goto drop_nbuf;
  1194. }
  1195. /* WDS Source Port Learning */
  1196. if (!soc->ast_offload_support &&
  1197. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1198. vdev->wds_enabled))
  1199. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  1200. msdu_metadata);
  1201. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1202. struct dp_peer *peer;
  1203. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1204. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1205. DP_MOD_ID_RX_ERR);
  1206. if (peer) {
  1207. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned)
  1208. dp_rx_tid_setup_wifi3(peer, tid, 1,
  1209. IEEE80211_SEQ_MAX);
  1210. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1211. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1212. }
  1213. }
  1214. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1215. if (!txrx_peer->authorize) {
  1216. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1217. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  1218. if (is_eapol) {
  1219. if (!dp_rx_err_match_dhost(eh, vdev))
  1220. goto drop_nbuf;
  1221. } else {
  1222. goto drop_nbuf;
  1223. }
  1224. }
  1225. /*
  1226. * Drop packets in this path if cce_match is found. Packets will come
  1227. * in following path depending on whether tidQ is setup.
  1228. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1229. * cce_match = 1
  1230. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1231. * dropped.
  1232. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1233. * cce_match = 1
  1234. * These packets need to be dropped and should not get delivered
  1235. * to stack.
  1236. */
  1237. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr))) {
  1238. goto drop_nbuf;
  1239. }
  1240. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1241. qdf_nbuf_set_next(nbuf, NULL);
  1242. dp_rx_deliver_raw(vdev, nbuf, txrx_peer);
  1243. } else {
  1244. enh_flag = vdev->pdev->enhanced_stats_en;
  1245. qdf_nbuf_set_next(nbuf, NULL);
  1246. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1247. enh_flag);
  1248. /*
  1249. * Update the protocol tag in SKB based on
  1250. * CCE metadata
  1251. */
  1252. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1253. EXCEPTION_DEST_RING_ID,
  1254. true, true);
  1255. /* Update the flow tag in SKB based on FSE metadata */
  1256. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1257. rx_tlv_hdr, true);
  1258. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1259. soc->hal_soc, rx_tlv_hdr) &&
  1260. (vdev->rx_decap_type ==
  1261. htt_cmn_pkt_type_ethernet))) {
  1262. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1263. enh_flag);
  1264. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1265. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  1266. qdf_nbuf_len(nbuf),
  1267. enh_flag);
  1268. }
  1269. qdf_nbuf_set_exc_frame(nbuf, 1);
  1270. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1271. is_eapol);
  1272. }
  1273. return QDF_STATUS_SUCCESS;
  1274. drop_nbuf:
  1275. dp_rx_nbuf_free(nbuf);
  1276. return QDF_STATUS_E_FAILURE;
  1277. }
  1278. /**
  1279. * dp_rx_reo_err_entry_process() - Handles for REO error entry processing
  1280. *
  1281. * @soc: core txrx main context
  1282. * @ring_desc: opaque pointer to the REO error ring descriptor
  1283. * @mpdu_desc_info: pointer to mpdu level description info
  1284. * @link_desc_va: pointer to msdu_link_desc virtual address
  1285. * @err_code: reo erro code fetched from ring entry
  1286. *
  1287. * Function to handle msdus fetched from msdu link desc, currently
  1288. * support REO error NULL queue, 2K jump, OOR.
  1289. *
  1290. * Return: msdu count processed
  1291. */
  1292. static uint32_t
  1293. dp_rx_reo_err_entry_process(struct dp_soc *soc,
  1294. void *ring_desc,
  1295. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  1296. void *link_desc_va,
  1297. enum hal_reo_error_code err_code)
  1298. {
  1299. uint32_t rx_bufs_used = 0;
  1300. struct dp_pdev *pdev;
  1301. int i;
  1302. uint8_t *rx_tlv_hdr_first;
  1303. uint8_t *rx_tlv_hdr_last;
  1304. uint32_t tid = DP_MAX_TIDS;
  1305. uint16_t peer_id;
  1306. struct dp_rx_desc *rx_desc;
  1307. struct rx_desc_pool *rx_desc_pool;
  1308. qdf_nbuf_t nbuf;
  1309. struct hal_buf_info buf_info;
  1310. struct hal_rx_msdu_list msdu_list;
  1311. uint16_t num_msdus;
  1312. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  1313. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  1314. /* First field in REO Dst ring Desc is buffer_addr_info */
  1315. void *buf_addr_info = ring_desc;
  1316. qdf_nbuf_t head_nbuf = NULL;
  1317. qdf_nbuf_t tail_nbuf = NULL;
  1318. uint16_t msdu_processed = 0;
  1319. QDF_STATUS status;
  1320. bool ret, is_pn_check_needed;
  1321. uint8_t rx_desc_pool_id;
  1322. struct dp_txrx_peer *txrx_peer = NULL;
  1323. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1324. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  1325. mpdu_desc_info->peer_meta_data);
  1326. is_pn_check_needed = dp_rx_err_is_pn_check_needed(soc,
  1327. HAL_REO_ERROR_DETECTED,
  1328. err_code);
  1329. more_msdu_link_desc:
  1330. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  1331. &num_msdus);
  1332. for (i = 0; i < num_msdus; i++) {
  1333. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  1334. soc,
  1335. msdu_list.sw_cookie[i]);
  1336. qdf_assert_always(rx_desc);
  1337. rx_desc_pool_id = rx_desc->pool_id;
  1338. /* all buffers from a MSDU link belong to same pdev */
  1339. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc_pool_id);
  1340. nbuf = rx_desc->nbuf;
  1341. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  1342. msdu_list.paddr[i]);
  1343. if (!ret) {
  1344. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1345. rx_desc->in_err_state = 1;
  1346. continue;
  1347. }
  1348. rx_desc_pool = &soc->rx_desc_buf[rx_desc_pool_id];
  1349. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1350. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1351. rx_desc->unmapped = 1;
  1352. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1353. QDF_NBUF_CB_RX_PKT_LEN(nbuf) = msdu_list.msdu_info[i].msdu_len;
  1354. rx_bufs_used++;
  1355. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  1356. &pdev->free_list_tail, rx_desc);
  1357. DP_RX_LIST_APPEND(head_nbuf, tail_nbuf, nbuf);
  1358. if (qdf_unlikely(msdu_list.msdu_info[i].msdu_flags &
  1359. HAL_MSDU_F_MSDU_CONTINUATION))
  1360. continue;
  1361. if (dp_rx_buffer_pool_refill(soc, head_nbuf,
  1362. rx_desc_pool_id)) {
  1363. /* MSDU queued back to the pool */
  1364. goto process_next_msdu;
  1365. }
  1366. rx_tlv_hdr_first = qdf_nbuf_data(head_nbuf);
  1367. rx_tlv_hdr_last = qdf_nbuf_data(tail_nbuf);
  1368. if (qdf_unlikely(head_nbuf != tail_nbuf)) {
  1369. nbuf = dp_rx_sg_create(soc, head_nbuf);
  1370. qdf_nbuf_set_is_frag(nbuf, 1);
  1371. DP_STATS_INC(soc, rx.err.reo_err_oor_sg_count, 1);
  1372. }
  1373. if (is_pn_check_needed) {
  1374. status = dp_rx_err_nbuf_pn_check(soc, ring_desc, nbuf);
  1375. if (QDF_IS_STATUS_ERROR(status)) {
  1376. DP_STATS_INC(soc, rx.err.pn_in_dest_check_fail,
  1377. 1);
  1378. dp_rx_nbuf_free(nbuf);
  1379. goto process_next_msdu;
  1380. }
  1381. hal_rx_tlv_populate_mpdu_desc_info(soc->hal_soc,
  1382. qdf_nbuf_data(nbuf),
  1383. mpdu_desc_info);
  1384. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  1385. mpdu_desc_info->peer_meta_data);
  1386. if (mpdu_desc_info->bar_frame)
  1387. _dp_rx_bar_frame_handle(soc, nbuf,
  1388. mpdu_desc_info, tid,
  1389. HAL_REO_ERROR_DETECTED,
  1390. err_code);
  1391. }
  1392. switch (err_code) {
  1393. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  1394. case HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET:
  1395. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  1396. /*
  1397. * only first msdu, mpdu start description tlv valid?
  1398. * and use it for following msdu.
  1399. */
  1400. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1401. rx_tlv_hdr_last))
  1402. tid = hal_rx_mpdu_start_tid_get(
  1403. soc->hal_soc,
  1404. rx_tlv_hdr_first);
  1405. dp_2k_jump_handle(soc, nbuf, rx_tlv_hdr_last,
  1406. peer_id, tid);
  1407. break;
  1408. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  1409. case HAL_REO_ERR_BAR_FRAME_OOR:
  1410. dp_rx_oor_handle(soc, nbuf, peer_id, rx_tlv_hdr_last);
  1411. break;
  1412. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  1413. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(
  1414. soc, peer_id,
  1415. &txrx_ref_handle,
  1416. DP_MOD_ID_RX_ERR);
  1417. if (!txrx_peer)
  1418. dp_info_rl("txrx_peer is null peer_id %u",
  1419. peer_id);
  1420. dp_rx_null_q_desc_handle(soc, nbuf, rx_tlv_hdr_last,
  1421. rx_desc_pool_id, txrx_peer);
  1422. if (txrx_peer)
  1423. dp_txrx_peer_unref_delete(txrx_ref_handle,
  1424. DP_MOD_ID_RX_ERR);
  1425. break;
  1426. default:
  1427. dp_err_rl("Non-support error code %d", err_code);
  1428. dp_rx_nbuf_free(nbuf);
  1429. }
  1430. process_next_msdu:
  1431. msdu_processed++;
  1432. head_nbuf = NULL;
  1433. tail_nbuf = NULL;
  1434. }
  1435. /*
  1436. * If the msdu's are spread across multiple link-descriptors,
  1437. * we cannot depend solely on the msdu_count(e.g., if msdu is
  1438. * spread across multiple buffers).Hence, it is
  1439. * necessary to check the next link_descriptor and release
  1440. * all the msdu's that are part of it.
  1441. */
  1442. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  1443. link_desc_va,
  1444. &next_link_desc_addr_info);
  1445. if (hal_rx_is_buf_addr_info_valid(
  1446. &next_link_desc_addr_info)) {
  1447. /* Clear the next link desc info for the current link_desc */
  1448. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  1449. dp_rx_link_desc_return_by_addr(
  1450. soc,
  1451. buf_addr_info,
  1452. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1453. hal_rx_buffer_addr_info_get_paddr(
  1454. &next_link_desc_addr_info,
  1455. &buf_info);
  1456. /* buffer_addr_info is the first element of ring_desc */
  1457. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  1458. (uint32_t *)&next_link_desc_addr_info,
  1459. &buf_info);
  1460. link_desc_va =
  1461. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  1462. cur_link_desc_addr_info = next_link_desc_addr_info;
  1463. buf_addr_info = &cur_link_desc_addr_info;
  1464. goto more_msdu_link_desc;
  1465. }
  1466. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  1467. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1468. if (qdf_unlikely(msdu_processed != mpdu_desc_info->msdu_count))
  1469. DP_STATS_INC(soc, rx.err.msdu_count_mismatch, 1);
  1470. return rx_bufs_used;
  1471. }
  1472. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1473. /**
  1474. * dp_rx_process_rxdma_err() - Function to deliver rxdma unencrypted_err
  1475. * frames to OS or wifi parse errors.
  1476. * @soc: core DP main context
  1477. * @nbuf: buffer pointer
  1478. * @rx_tlv_hdr: start of rx tlv header
  1479. * @txrx_peer: peer reference
  1480. * @err_code: rxdma err code
  1481. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  1482. * pool_id has same mapping)
  1483. *
  1484. * Return: None
  1485. */
  1486. void
  1487. dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1488. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1489. uint8_t err_code, uint8_t mac_id)
  1490. {
  1491. uint32_t pkt_len, l2_hdr_offset;
  1492. uint16_t msdu_len;
  1493. struct dp_vdev *vdev;
  1494. qdf_ether_header_t *eh;
  1495. bool is_broadcast;
  1496. /*
  1497. * Check if DMA completed -- msdu_done is the last bit
  1498. * to be written
  1499. */
  1500. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1501. dp_err_rl("MSDU DONE failure");
  1502. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1503. QDF_TRACE_LEVEL_INFO);
  1504. qdf_assert(0);
  1505. }
  1506. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc,
  1507. rx_tlv_hdr);
  1508. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1509. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  1510. if (dp_rx_check_pkt_len(soc, pkt_len)) {
  1511. /* Drop & free packet */
  1512. dp_rx_nbuf_free(nbuf);
  1513. return;
  1514. }
  1515. /* Set length in nbuf */
  1516. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1517. qdf_nbuf_set_next(nbuf, NULL);
  1518. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1519. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1520. if (!txrx_peer) {
  1521. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP, "txrx_peer is NULL");
  1522. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1523. qdf_nbuf_len(nbuf));
  1524. /* Trigger invalid peer handler wrapper */
  1525. dp_rx_process_invalid_peer_wrapper(soc, nbuf, true, mac_id);
  1526. return;
  1527. }
  1528. vdev = txrx_peer->vdev;
  1529. if (!vdev) {
  1530. dp_rx_err_info_rl("%pK: INVALID vdev %pK OR osif_rx", soc,
  1531. vdev);
  1532. /* Drop & free packet */
  1533. dp_rx_nbuf_free(nbuf);
  1534. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1535. return;
  1536. }
  1537. /*
  1538. * Advance the packet start pointer by total size of
  1539. * pre-header TLV's
  1540. */
  1541. dp_rx_skip_tlvs(soc, nbuf, l2_hdr_offset);
  1542. if (err_code == HAL_RXDMA_ERR_WIFI_PARSE) {
  1543. uint8_t *pkt_type;
  1544. pkt_type = qdf_nbuf_data(nbuf) + (2 * QDF_MAC_ADDR_SIZE);
  1545. if (*(uint16_t *)pkt_type == htons(QDF_ETH_TYPE_8021Q)) {
  1546. if (*(uint16_t *)(pkt_type + DP_SKIP_VLAN) ==
  1547. htons(QDF_LLC_STP)) {
  1548. DP_STATS_INC(vdev->pdev, vlan_tag_stp_cnt, 1);
  1549. goto process_mesh;
  1550. } else {
  1551. goto process_rx;
  1552. }
  1553. }
  1554. }
  1555. if (vdev->rx_decap_type == htt_cmn_pkt_type_raw)
  1556. goto process_mesh;
  1557. /*
  1558. * WAPI cert AP sends rekey frames as unencrypted.
  1559. * Thus RXDMA will report unencrypted frame error.
  1560. * To pass WAPI cert case, SW needs to pass unencrypted
  1561. * rekey frame to stack.
  1562. */
  1563. if (qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1564. goto process_rx;
  1565. }
  1566. /*
  1567. * In dynamic WEP case rekey frames are not encrypted
  1568. * similar to WAPI. Allow EAPOL when 8021+wep is enabled and
  1569. * key install is already done
  1570. */
  1571. if ((vdev->sec_type == cdp_sec_type_wep104) &&
  1572. (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)))
  1573. goto process_rx;
  1574. process_mesh:
  1575. if (!vdev->mesh_vdev && err_code == HAL_RXDMA_ERR_UNENCRYPTED) {
  1576. dp_rx_nbuf_free(nbuf);
  1577. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1578. return;
  1579. }
  1580. if (vdev->mesh_vdev) {
  1581. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1582. == QDF_STATUS_SUCCESS) {
  1583. dp_rx_err_info("%pK: mesh pkt filtered", soc);
  1584. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  1585. dp_rx_nbuf_free(nbuf);
  1586. return;
  1587. }
  1588. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, txrx_peer);
  1589. }
  1590. process_rx:
  1591. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1592. rx_tlv_hdr) &&
  1593. (vdev->rx_decap_type ==
  1594. htt_cmn_pkt_type_ethernet))) {
  1595. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1596. is_broadcast = (QDF_IS_ADDR_BROADCAST
  1597. (eh->ether_dhost)) ? 1 : 0 ;
  1598. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.multicast, 1,
  1599. qdf_nbuf_len(nbuf));
  1600. if (is_broadcast) {
  1601. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.bcast, 1,
  1602. qdf_nbuf_len(nbuf));
  1603. }
  1604. }
  1605. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1606. dp_rx_deliver_raw(vdev, nbuf, txrx_peer);
  1607. } else {
  1608. /* Update the protocol tag in SKB based on CCE metadata */
  1609. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1610. EXCEPTION_DEST_RING_ID, true, true);
  1611. /* Update the flow tag in SKB based on FSE metadata */
  1612. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1613. DP_PEER_STATS_FLAT_INC(txrx_peer, to_stack.num, 1);
  1614. qdf_nbuf_set_exc_frame(nbuf, 1);
  1615. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  1616. }
  1617. return;
  1618. }
  1619. /**
  1620. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  1621. * @soc: core DP main context
  1622. * @nbuf: buffer pointer
  1623. * @rx_tlv_hdr: start of rx tlv header
  1624. * @txrx_peer: txrx peer handle
  1625. *
  1626. * return: void
  1627. */
  1628. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1629. uint8_t *rx_tlv_hdr,
  1630. struct dp_txrx_peer *txrx_peer)
  1631. {
  1632. struct dp_vdev *vdev = NULL;
  1633. struct dp_pdev *pdev = NULL;
  1634. struct ol_if_ops *tops = NULL;
  1635. uint16_t rx_seq, fragno;
  1636. uint8_t is_raw;
  1637. unsigned int tid;
  1638. QDF_STATUS status;
  1639. struct cdp_rx_mic_err_info mic_failure_info;
  1640. if (!hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1641. rx_tlv_hdr))
  1642. return;
  1643. if (!txrx_peer) {
  1644. dp_info_rl("txrx_peer not found");
  1645. goto fail;
  1646. }
  1647. vdev = txrx_peer->vdev;
  1648. if (!vdev) {
  1649. dp_info_rl("VDEV not found");
  1650. goto fail;
  1651. }
  1652. pdev = vdev->pdev;
  1653. if (!pdev) {
  1654. dp_info_rl("PDEV not found");
  1655. goto fail;
  1656. }
  1657. is_raw = HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, qdf_nbuf_data(nbuf));
  1658. if (is_raw) {
  1659. fragno = dp_rx_frag_get_mpdu_frag_number(soc,
  1660. qdf_nbuf_data(nbuf));
  1661. /* Can get only last fragment */
  1662. if (fragno) {
  1663. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  1664. qdf_nbuf_data(nbuf));
  1665. rx_seq = hal_rx_get_rx_sequence(soc->hal_soc,
  1666. qdf_nbuf_data(nbuf));
  1667. status = dp_rx_defrag_add_last_frag(soc, txrx_peer,
  1668. tid, rx_seq, nbuf);
  1669. dp_info_rl("Frag pkt seq# %d frag# %d consumed "
  1670. "status %d !", rx_seq, fragno, status);
  1671. return;
  1672. }
  1673. }
  1674. if (hal_rx_mpdu_get_addr1(soc->hal_soc, qdf_nbuf_data(nbuf),
  1675. &mic_failure_info.da_mac_addr.bytes[0])) {
  1676. dp_err_rl("Failed to get da_mac_addr");
  1677. goto fail;
  1678. }
  1679. if (hal_rx_mpdu_get_addr2(soc->hal_soc, qdf_nbuf_data(nbuf),
  1680. &mic_failure_info.ta_mac_addr.bytes[0])) {
  1681. dp_err_rl("Failed to get ta_mac_addr");
  1682. goto fail;
  1683. }
  1684. mic_failure_info.key_id = 0;
  1685. mic_failure_info.multicast =
  1686. IEEE80211_IS_MULTICAST(mic_failure_info.da_mac_addr.bytes);
  1687. qdf_mem_zero(mic_failure_info.tsc, MIC_SEQ_CTR_SIZE);
  1688. mic_failure_info.frame_type = cdp_rx_frame_type_802_11;
  1689. mic_failure_info.data = NULL;
  1690. mic_failure_info.vdev_id = vdev->vdev_id;
  1691. tops = pdev->soc->cdp_soc.ol_ops;
  1692. if (tops->rx_mic_error)
  1693. tops->rx_mic_error(soc->ctrl_psoc, pdev->pdev_id,
  1694. &mic_failure_info);
  1695. fail:
  1696. dp_rx_nbuf_free(nbuf);
  1697. return;
  1698. }
  1699. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1700. defined(WLAN_MCAST_MLO)
  1701. static bool dp_rx_igmp_handler(struct dp_soc *soc,
  1702. struct dp_vdev *vdev,
  1703. struct dp_txrx_peer *peer,
  1704. qdf_nbuf_t nbuf)
  1705. {
  1706. if (soc->arch_ops.dp_rx_mcast_handler) {
  1707. if (soc->arch_ops.dp_rx_mcast_handler(soc, vdev, peer, nbuf))
  1708. return true;
  1709. }
  1710. return false;
  1711. }
  1712. #else
  1713. static bool dp_rx_igmp_handler(struct dp_soc *soc,
  1714. struct dp_vdev *vdev,
  1715. struct dp_txrx_peer *peer,
  1716. qdf_nbuf_t nbuf)
  1717. {
  1718. return false;
  1719. }
  1720. #endif
  1721. /**
  1722. * dp_rx_err_route_hdl() - Function to send EAPOL frames to stack
  1723. * Free any other packet which comes in
  1724. * this path.
  1725. *
  1726. * @soc: core DP main context
  1727. * @nbuf: buffer pointer
  1728. * @txrx_peer: txrx peer handle
  1729. * @rx_tlv_hdr: start of rx tlv header
  1730. * @err_src: rxdma/reo
  1731. *
  1732. * This function indicates EAPOL frame received in wbm error ring to stack.
  1733. * Any other frame should be dropped.
  1734. *
  1735. * Return: SUCCESS if delivered to stack
  1736. */
  1737. static void
  1738. dp_rx_err_route_hdl(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1739. struct dp_txrx_peer *txrx_peer, uint8_t *rx_tlv_hdr,
  1740. enum hal_rx_wbm_error_source err_src)
  1741. {
  1742. uint32_t pkt_len;
  1743. uint16_t msdu_len;
  1744. struct dp_vdev *vdev;
  1745. struct hal_rx_msdu_metadata msdu_metadata;
  1746. bool is_eapol;
  1747. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1748. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1749. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1750. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1751. if (dp_rx_check_pkt_len(soc, pkt_len))
  1752. goto drop_nbuf;
  1753. /* Set length in nbuf */
  1754. qdf_nbuf_set_pktlen(
  1755. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1756. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1757. }
  1758. /*
  1759. * Check if DMA completed -- msdu_done is the last bit
  1760. * to be written
  1761. */
  1762. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1763. dp_err_rl("MSDU DONE failure");
  1764. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1765. QDF_TRACE_LEVEL_INFO);
  1766. qdf_assert(0);
  1767. }
  1768. if (!txrx_peer)
  1769. goto drop_nbuf;
  1770. vdev = txrx_peer->vdev;
  1771. if (!vdev) {
  1772. dp_err_rl("Null vdev!");
  1773. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1774. goto drop_nbuf;
  1775. }
  1776. /*
  1777. * Advance the packet start pointer by total size of
  1778. * pre-header TLV's
  1779. */
  1780. if (qdf_nbuf_is_frag(nbuf))
  1781. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1782. else
  1783. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1784. soc->rx_pkt_tlv_size));
  1785. if (dp_rx_igmp_handler(soc, vdev, txrx_peer, nbuf))
  1786. return;
  1787. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1788. /*
  1789. * Indicate EAPOL frame to stack only when vap mac address
  1790. * matches the destination address.
  1791. */
  1792. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  1793. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1794. qdf_ether_header_t *eh =
  1795. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1796. if (dp_rx_err_match_dhost(eh, vdev)) {
  1797. DP_STATS_INC_PKT(vdev, rx_i.routed_eapol_pkt, 1,
  1798. qdf_nbuf_len(nbuf));
  1799. /*
  1800. * Update the protocol tag in SKB based on
  1801. * CCE metadata.
  1802. */
  1803. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1804. EXCEPTION_DEST_RING_ID,
  1805. true, true);
  1806. /* Update the flow tag in SKB based on FSE metadata */
  1807. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1808. true);
  1809. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  1810. qdf_nbuf_len(nbuf),
  1811. vdev->pdev->enhanced_stats_en);
  1812. qdf_nbuf_set_exc_frame(nbuf, 1);
  1813. qdf_nbuf_set_next(nbuf, NULL);
  1814. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf,
  1815. NULL, is_eapol);
  1816. return;
  1817. }
  1818. }
  1819. drop_nbuf:
  1820. DP_STATS_INCC(soc, rx.reo2rel_route_drop, 1,
  1821. err_src == HAL_RX_WBM_ERR_SRC_REO);
  1822. DP_STATS_INCC(soc, rx.rxdma2rel_route_drop, 1,
  1823. err_src == HAL_RX_WBM_ERR_SRC_RXDMA);
  1824. dp_rx_nbuf_free(nbuf);
  1825. }
  1826. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1827. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  1828. /**
  1829. * dp_rx_link_cookie_check() - Validate link desc cookie
  1830. * @ring_desc: ring descriptor
  1831. *
  1832. * Return: qdf status
  1833. */
  1834. static inline QDF_STATUS
  1835. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1836. {
  1837. if (qdf_unlikely(HAL_RX_REO_BUF_LINK_COOKIE_INVALID_GET(ring_desc)))
  1838. return QDF_STATUS_E_FAILURE;
  1839. return QDF_STATUS_SUCCESS;
  1840. }
  1841. /**
  1842. * dp_rx_link_cookie_invalidate() - Invalidate link desc cookie
  1843. * @ring_desc: ring descriptor
  1844. *
  1845. * Return: None
  1846. */
  1847. static inline void
  1848. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1849. {
  1850. HAL_RX_REO_BUF_LINK_COOKIE_INVALID_SET(ring_desc);
  1851. }
  1852. #else
  1853. static inline QDF_STATUS
  1854. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1855. {
  1856. return QDF_STATUS_SUCCESS;
  1857. }
  1858. static inline void
  1859. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1860. {
  1861. }
  1862. #endif
  1863. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1864. /**
  1865. * dp_rx_err_ring_record_entry() - Record rx err ring history
  1866. * @soc: Datapath soc structure
  1867. * @paddr: paddr of the buffer in RX err ring
  1868. * @sw_cookie: SW cookie of the buffer in RX err ring
  1869. * @rbm: Return buffer manager of the buffer in RX err ring
  1870. *
  1871. * Returns: None
  1872. */
  1873. static inline void
  1874. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1875. uint32_t sw_cookie, uint8_t rbm)
  1876. {
  1877. struct dp_buf_info_record *record;
  1878. uint32_t idx;
  1879. if (qdf_unlikely(!soc->rx_err_ring_history))
  1880. return;
  1881. idx = dp_history_get_next_index(&soc->rx_err_ring_history->index,
  1882. DP_RX_ERR_HIST_MAX);
  1883. /* No NULL check needed for record since its an array */
  1884. record = &soc->rx_err_ring_history->entry[idx];
  1885. record->timestamp = qdf_get_log_timestamp();
  1886. record->hbi.paddr = paddr;
  1887. record->hbi.sw_cookie = sw_cookie;
  1888. record->hbi.rbm = rbm;
  1889. }
  1890. #else
  1891. static inline void
  1892. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1893. uint32_t sw_cookie, uint8_t rbm)
  1894. {
  1895. }
  1896. #endif
  1897. #ifdef HANDLE_RX_REROUTE_ERR
  1898. static int dp_rx_err_handle_msdu_buf(struct dp_soc *soc,
  1899. hal_ring_desc_t ring_desc)
  1900. {
  1901. int lmac_id = DP_INVALID_LMAC_ID;
  1902. struct dp_rx_desc *rx_desc;
  1903. struct hal_buf_info hbi;
  1904. struct dp_pdev *pdev;
  1905. struct rx_desc_pool *rx_desc_pool;
  1906. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1907. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, hbi.sw_cookie);
  1908. /* sanity */
  1909. if (!rx_desc) {
  1910. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_invalid_cookie, 1);
  1911. goto assert_return;
  1912. }
  1913. if (!rx_desc->nbuf)
  1914. goto assert_return;
  1915. dp_rx_err_ring_record_entry(soc, hbi.paddr,
  1916. hbi.sw_cookie,
  1917. hal_rx_ret_buf_manager_get(soc->hal_soc,
  1918. ring_desc));
  1919. if (hbi.paddr != qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0)) {
  1920. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1921. rx_desc->in_err_state = 1;
  1922. goto assert_return;
  1923. }
  1924. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1925. /* After this point the rx_desc and nbuf are valid */
  1926. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1927. qdf_assert_always(!rx_desc->unmapped);
  1928. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, rx_desc->nbuf);
  1929. rx_desc->unmapped = 1;
  1930. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1931. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  1932. rx_desc->pool_id);
  1933. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  1934. lmac_id = rx_desc->pool_id;
  1935. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  1936. &pdev->free_list_tail,
  1937. rx_desc);
  1938. return lmac_id;
  1939. assert_return:
  1940. qdf_assert(0);
  1941. return lmac_id;
  1942. }
  1943. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1944. {
  1945. int ret;
  1946. uint64_t cur_time_stamp;
  1947. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_rcved, 1);
  1948. /* Recover if overall error count exceeds threshold */
  1949. if (soc->stats.rx.err.reo_err_msdu_buf_rcved >
  1950. DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD) {
  1951. dp_err("pkt threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1952. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1953. soc->rx_route_err_start_pkt_ts);
  1954. qdf_trigger_self_recovery(NULL, QDF_RX_REG_PKT_ROUTE_ERR);
  1955. }
  1956. cur_time_stamp = qdf_get_log_timestamp_usecs();
  1957. if (!soc->rx_route_err_start_pkt_ts)
  1958. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1959. /* Recover if threshold number of packets received in threshold time */
  1960. if ((cur_time_stamp - soc->rx_route_err_start_pkt_ts) >
  1961. DP_RX_ERR_ROUTE_TIMEOUT_US) {
  1962. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1963. if (soc->rx_route_err_in_window >
  1964. DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT) {
  1965. qdf_trigger_self_recovery(NULL,
  1966. QDF_RX_REG_PKT_ROUTE_ERR);
  1967. dp_err("rate threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1968. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1969. soc->rx_route_err_start_pkt_ts);
  1970. } else {
  1971. soc->rx_route_err_in_window = 1;
  1972. }
  1973. } else {
  1974. soc->rx_route_err_in_window++;
  1975. }
  1976. ret = dp_rx_err_handle_msdu_buf(soc, ring_desc);
  1977. return ret;
  1978. }
  1979. #else /* HANDLE_RX_REROUTE_ERR */
  1980. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1981. {
  1982. qdf_assert_always(0);
  1983. return DP_INVALID_LMAC_ID;
  1984. }
  1985. #endif /* HANDLE_RX_REROUTE_ERR */
  1986. uint32_t
  1987. dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1988. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  1989. {
  1990. hal_ring_desc_t ring_desc;
  1991. hal_soc_handle_t hal_soc;
  1992. uint32_t count = 0;
  1993. uint32_t rx_bufs_used = 0;
  1994. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1995. uint8_t mac_id = 0;
  1996. uint8_t buf_type;
  1997. uint8_t err_status;
  1998. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1999. struct hal_buf_info hbi;
  2000. struct dp_pdev *dp_pdev;
  2001. struct dp_srng *dp_rxdma_srng;
  2002. struct rx_desc_pool *rx_desc_pool;
  2003. void *link_desc_va;
  2004. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  2005. uint16_t num_msdus;
  2006. struct dp_rx_desc *rx_desc = NULL;
  2007. QDF_STATUS status;
  2008. bool ret;
  2009. uint32_t error_code = 0;
  2010. bool sw_pn_check_needed;
  2011. /* Debug -- Remove later */
  2012. qdf_assert(soc && hal_ring_hdl);
  2013. hal_soc = soc->hal_soc;
  2014. /* Debug -- Remove later */
  2015. qdf_assert(hal_soc);
  2016. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  2017. /* TODO */
  2018. /*
  2019. * Need API to convert from hal_ring pointer to
  2020. * Ring Type / Ring Id combo
  2021. */
  2022. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  2023. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK", soc,
  2024. hal_ring_hdl);
  2025. goto done;
  2026. }
  2027. while (qdf_likely(quota-- && (ring_desc =
  2028. hal_srng_dst_peek(hal_soc,
  2029. hal_ring_hdl)))) {
  2030. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  2031. err_status = hal_rx_err_status_get(hal_soc, ring_desc);
  2032. buf_type = hal_rx_reo_buf_type_get(hal_soc, ring_desc);
  2033. if (err_status == HAL_REO_ERROR_DETECTED)
  2034. error_code = hal_rx_get_reo_error_code(hal_soc,
  2035. ring_desc);
  2036. qdf_mem_set(&mpdu_desc_info, sizeof(mpdu_desc_info), 0);
  2037. sw_pn_check_needed = dp_rx_err_is_pn_check_needed(soc,
  2038. err_status,
  2039. error_code);
  2040. if (!sw_pn_check_needed) {
  2041. /*
  2042. * MPDU desc info will be present in the REO desc
  2043. * only in the below scenarios
  2044. * 1) pn_in_dest_disabled: always
  2045. * 2) pn_in_dest enabled: All cases except 2k-jup
  2046. * and OOR errors
  2047. */
  2048. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc,
  2049. &mpdu_desc_info);
  2050. }
  2051. if (HAL_RX_REO_DESC_MSDU_COUNT_GET(ring_desc) == 0)
  2052. goto next_entry;
  2053. /*
  2054. * For REO error ring, only MSDU LINK DESC is expected.
  2055. * Handle HAL_RX_REO_MSDU_BUF_ADDR_TYPE exception case.
  2056. */
  2057. if (qdf_unlikely(buf_type != HAL_RX_REO_MSDU_LINK_DESC_TYPE)) {
  2058. int lmac_id;
  2059. lmac_id = dp_rx_err_exception(soc, ring_desc);
  2060. if (lmac_id >= 0)
  2061. rx_bufs_reaped[lmac_id] += 1;
  2062. goto next_entry;
  2063. }
  2064. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  2065. &hbi);
  2066. /*
  2067. * check for the magic number in the sw cookie
  2068. */
  2069. qdf_assert_always((hbi.sw_cookie >> LINK_DESC_ID_SHIFT) &
  2070. soc->link_desc_id_start);
  2071. status = dp_rx_link_cookie_check(ring_desc);
  2072. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2073. DP_STATS_INC(soc, rx.err.invalid_link_cookie, 1);
  2074. break;
  2075. }
  2076. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2077. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  2078. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  2079. &num_msdus);
  2080. dp_rx_err_ring_record_entry(soc, msdu_list.paddr[0],
  2081. msdu_list.sw_cookie[0],
  2082. msdu_list.rbm[0]);
  2083. // TODO - BE- Check if the RBM is to be checked for all chips
  2084. if (qdf_unlikely((msdu_list.rbm[0] !=
  2085. dp_rx_get_rx_bm_id(soc)) &&
  2086. (msdu_list.rbm[0] !=
  2087. soc->idle_link_bm_id) &&
  2088. (msdu_list.rbm[0] !=
  2089. dp_rx_get_defrag_bm_id(soc)))) {
  2090. /* TODO */
  2091. /* Call appropriate handler */
  2092. if (!wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  2093. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  2094. dp_rx_err_err("%pK: Invalid RBM %d",
  2095. soc, msdu_list.rbm[0]);
  2096. }
  2097. /* Return link descriptor through WBM ring (SW2WBM)*/
  2098. dp_rx_link_desc_return(soc, ring_desc,
  2099. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  2100. goto next_entry;
  2101. }
  2102. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  2103. soc,
  2104. msdu_list.sw_cookie[0]);
  2105. qdf_assert_always(rx_desc);
  2106. mac_id = rx_desc->pool_id;
  2107. if (sw_pn_check_needed) {
  2108. goto process_reo_error_code;
  2109. }
  2110. if (mpdu_desc_info.bar_frame) {
  2111. qdf_assert_always(mpdu_desc_info.msdu_count == 1);
  2112. dp_rx_bar_frame_handle(soc, ring_desc, rx_desc,
  2113. &mpdu_desc_info, err_status,
  2114. error_code);
  2115. rx_bufs_reaped[mac_id] += 1;
  2116. goto next_entry;
  2117. }
  2118. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  2119. /*
  2120. * We only handle one msdu per link desc for fragmented
  2121. * case. We drop the msdus and release the link desc
  2122. * back if there are more than one msdu in link desc.
  2123. */
  2124. if (qdf_unlikely(num_msdus > 1)) {
  2125. count = dp_rx_msdus_drop(soc, ring_desc,
  2126. &mpdu_desc_info,
  2127. &mac_id, quota);
  2128. rx_bufs_reaped[mac_id] += count;
  2129. goto next_entry;
  2130. }
  2131. /*
  2132. * this is a unlikely scenario where the host is reaping
  2133. * a descriptor which it already reaped just a while ago
  2134. * but is yet to replenish it back to HW.
  2135. * In this case host will dump the last 128 descriptors
  2136. * including the software descriptor rx_desc and assert.
  2137. */
  2138. if (qdf_unlikely(!rx_desc->in_use)) {
  2139. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  2140. dp_info_rl("Reaping rx_desc not in use!");
  2141. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2142. ring_desc, rx_desc);
  2143. /* ignore duplicate RX desc and continue */
  2144. /* Pop out the descriptor */
  2145. goto next_entry;
  2146. }
  2147. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  2148. msdu_list.paddr[0]);
  2149. if (!ret) {
  2150. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  2151. rx_desc->in_err_state = 1;
  2152. goto next_entry;
  2153. }
  2154. count = dp_rx_frag_handle(soc,
  2155. ring_desc, &mpdu_desc_info,
  2156. rx_desc, &mac_id, quota);
  2157. rx_bufs_reaped[mac_id] += count;
  2158. DP_STATS_INC(soc, rx.rx_frags, 1);
  2159. goto next_entry;
  2160. }
  2161. process_reo_error_code:
  2162. /*
  2163. * Expect REO errors to be handled after this point
  2164. */
  2165. qdf_assert_always(err_status == HAL_REO_ERROR_DETECTED);
  2166. dp_info_rl("Got pkt with REO ERROR: %d", error_code);
  2167. switch (error_code) {
  2168. case HAL_REO_ERR_PN_CHECK_FAILED:
  2169. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  2170. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2171. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2172. if (dp_pdev)
  2173. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  2174. count = dp_rx_pn_error_handle(soc,
  2175. ring_desc,
  2176. &mpdu_desc_info, &mac_id,
  2177. quota);
  2178. rx_bufs_reaped[mac_id] += count;
  2179. break;
  2180. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2181. case HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET:
  2182. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2183. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2184. case HAL_REO_ERR_BAR_FRAME_OOR:
  2185. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2186. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2187. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2188. if (dp_pdev)
  2189. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  2190. count = dp_rx_reo_err_entry_process(
  2191. soc,
  2192. ring_desc,
  2193. &mpdu_desc_info,
  2194. link_desc_va,
  2195. error_code);
  2196. rx_bufs_reaped[mac_id] += count;
  2197. break;
  2198. case HAL_REO_ERR_QUEUE_DESC_INVALID:
  2199. case HAL_REO_ERR_AMPDU_IN_NON_BA:
  2200. case HAL_REO_ERR_NON_BA_DUPLICATE:
  2201. case HAL_REO_ERR_BA_DUPLICATE:
  2202. case HAL_REO_ERR_BAR_FRAME_NO_BA_SESSION:
  2203. case HAL_REO_ERR_BAR_FRAME_SN_EQUALS_SSN:
  2204. case HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET:
  2205. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2206. count = dp_rx_msdus_drop(soc, ring_desc,
  2207. &mpdu_desc_info,
  2208. &mac_id, quota);
  2209. rx_bufs_reaped[mac_id] += count;
  2210. break;
  2211. default:
  2212. /* Assert if unexpected error type */
  2213. qdf_assert_always(0);
  2214. }
  2215. next_entry:
  2216. dp_rx_link_cookie_invalidate(ring_desc);
  2217. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2218. }
  2219. done:
  2220. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2221. if (soc->rx.flags.defrag_timeout_check) {
  2222. uint32_t now_ms =
  2223. qdf_system_ticks_to_msecs(qdf_system_ticks());
  2224. if (now_ms >= soc->rx.defrag.next_flush_ms)
  2225. dp_rx_defrag_waitlist_flush(soc);
  2226. }
  2227. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2228. if (rx_bufs_reaped[mac_id]) {
  2229. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2230. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2231. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2232. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2233. rx_desc_pool,
  2234. rx_bufs_reaped[mac_id],
  2235. &dp_pdev->free_list_head,
  2236. &dp_pdev->free_list_tail);
  2237. rx_bufs_used += rx_bufs_reaped[mac_id];
  2238. }
  2239. }
  2240. return rx_bufs_used; /* Assume no scale factor for now */
  2241. }
  2242. #ifdef DROP_RXDMA_DECRYPT_ERR
  2243. /**
  2244. * dp_handle_rxdma_decrypt_err() - Check if decrypt err frames can be handled
  2245. *
  2246. * Return: true if rxdma decrypt err frames are handled and false otheriwse
  2247. */
  2248. static inline bool dp_handle_rxdma_decrypt_err(void)
  2249. {
  2250. return false;
  2251. }
  2252. #else
  2253. static inline bool dp_handle_rxdma_decrypt_err(void)
  2254. {
  2255. return true;
  2256. }
  2257. #endif
  2258. /*
  2259. * dp_rx_wbm_sg_list_last_msdu_war() - war for HW issue
  2260. *
  2261. * This is a war for HW issue where length is only valid in last msdu
  2262. *@soc: DP SOC handle
  2263. */
  2264. static inline void dp_rx_wbm_sg_list_last_msdu_war(struct dp_soc *soc)
  2265. {
  2266. if (soc->wbm_sg_last_msdu_war) {
  2267. uint32_t len;
  2268. qdf_nbuf_t temp = soc->wbm_sg_param.wbm_sg_nbuf_tail;
  2269. len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc,
  2270. qdf_nbuf_data(temp));
  2271. temp = soc->wbm_sg_param.wbm_sg_nbuf_head;
  2272. while (temp) {
  2273. QDF_NBUF_CB_RX_PKT_LEN(temp) = len;
  2274. temp = temp->next;
  2275. }
  2276. }
  2277. }
  2278. #ifdef RX_DESC_DEBUG_CHECK
  2279. /**
  2280. * dp_rx_wbm_desc_nbuf_sanity_check - Add sanity check to for WBM rx_desc paddr
  2281. * corruption
  2282. * @soc: core txrx main context
  2283. * @hal_ring_hdl: opaque pointer to the HAL Rx Error Ring
  2284. * @ring_desc: REO ring descriptor
  2285. * @rx_desc: Rx descriptor
  2286. *
  2287. * Return: NONE
  2288. */
  2289. static
  2290. QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
  2291. hal_ring_handle_t hal_ring_hdl,
  2292. hal_ring_desc_t ring_desc,
  2293. struct dp_rx_desc *rx_desc)
  2294. {
  2295. struct hal_buf_info hbi;
  2296. hal_rx_wbm_rel_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2297. /* Sanity check for possible buffer paddr corruption */
  2298. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  2299. return QDF_STATUS_SUCCESS;
  2300. hal_srng_dump_ring_desc(soc->hal_soc, hal_ring_hdl, ring_desc);
  2301. return QDF_STATUS_E_FAILURE;
  2302. }
  2303. #else
  2304. static
  2305. QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
  2306. hal_ring_handle_t hal_ring_hdl,
  2307. hal_ring_desc_t ring_desc,
  2308. struct dp_rx_desc *rx_desc)
  2309. {
  2310. return QDF_STATUS_SUCCESS;
  2311. }
  2312. #endif
  2313. static inline bool
  2314. dp_rx_is_sg_formation_required(struct hal_wbm_err_desc_info *info)
  2315. {
  2316. /*
  2317. * Currently Null Queue and Unencrypted error handlers has support for
  2318. * SG. Other error handler do not deal with SG buffer.
  2319. */
  2320. if (((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) &&
  2321. (info->reo_err_code == HAL_REO_ERR_QUEUE_DESC_ADDR_0)) ||
  2322. ((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) &&
  2323. (info->rxdma_err_code == HAL_RXDMA_ERR_UNENCRYPTED)))
  2324. return true;
  2325. return false;
  2326. }
  2327. uint32_t
  2328. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2329. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  2330. {
  2331. hal_ring_desc_t ring_desc;
  2332. hal_soc_handle_t hal_soc;
  2333. struct dp_rx_desc *rx_desc;
  2334. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  2335. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  2336. uint32_t rx_bufs_used = 0;
  2337. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  2338. uint8_t buf_type;
  2339. uint8_t mac_id;
  2340. struct dp_pdev *dp_pdev;
  2341. struct dp_srng *dp_rxdma_srng;
  2342. struct rx_desc_pool *rx_desc_pool;
  2343. uint8_t *rx_tlv_hdr;
  2344. qdf_nbuf_t nbuf_head = NULL;
  2345. qdf_nbuf_t nbuf_tail = NULL;
  2346. qdf_nbuf_t nbuf, next;
  2347. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  2348. uint8_t pool_id;
  2349. uint8_t tid = 0;
  2350. uint8_t msdu_continuation = 0;
  2351. bool process_sg_buf = false;
  2352. uint32_t wbm_err_src;
  2353. QDF_STATUS status;
  2354. /* Debug -- Remove later */
  2355. qdf_assert(soc && hal_ring_hdl);
  2356. hal_soc = soc->hal_soc;
  2357. /* Debug -- Remove later */
  2358. qdf_assert(hal_soc);
  2359. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  2360. /* TODO */
  2361. /*
  2362. * Need API to convert from hal_ring pointer to
  2363. * Ring Type / Ring Id combo
  2364. */
  2365. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  2366. soc, hal_ring_hdl);
  2367. goto done;
  2368. }
  2369. while (qdf_likely(quota)) {
  2370. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2371. if (qdf_unlikely(!ring_desc))
  2372. break;
  2373. /* XXX */
  2374. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  2375. /*
  2376. * For WBM ring, expect only MSDU buffers
  2377. */
  2378. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  2379. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  2380. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  2381. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  2382. if (soc->arch_ops.dp_wbm_get_rx_desc_from_hal_desc(soc,
  2383. ring_desc,
  2384. &rx_desc)) {
  2385. dp_rx_err_err("get rx desc from hal_desc failed");
  2386. continue;
  2387. }
  2388. qdf_assert_always(rx_desc);
  2389. if (!dp_rx_desc_check_magic(rx_desc)) {
  2390. dp_rx_err_err("%pk: Invalid rx_desc %pk",
  2391. soc, rx_desc);
  2392. continue;
  2393. }
  2394. /*
  2395. * this is a unlikely scenario where the host is reaping
  2396. * a descriptor which it already reaped just a while ago
  2397. * but is yet to replenish it back to HW.
  2398. * In this case host will dump the last 128 descriptors
  2399. * including the software descriptor rx_desc and assert.
  2400. */
  2401. if (qdf_unlikely(!rx_desc->in_use)) {
  2402. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  2403. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2404. ring_desc, rx_desc);
  2405. continue;
  2406. }
  2407. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
  2408. nbuf = rx_desc->nbuf;
  2409. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  2410. ring_desc, rx_desc);
  2411. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2412. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  2413. dp_info_rl("Rx error Nbuf %pk sanity check failure!",
  2414. nbuf);
  2415. rx_desc->in_err_state = 1;
  2416. rx_desc->unmapped = 1;
  2417. rx_bufs_reaped[rx_desc->pool_id]++;
  2418. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  2419. &tail[rx_desc->pool_id],
  2420. rx_desc);
  2421. continue;
  2422. }
  2423. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2424. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2425. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  2426. rx_desc->unmapped = 1;
  2427. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2428. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support &&
  2429. dp_rx_is_sg_formation_required(&wbm_err_info))) {
  2430. /* SG is detected from continuation bit */
  2431. msdu_continuation =
  2432. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  2433. ring_desc);
  2434. if (msdu_continuation &&
  2435. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  2436. /* Update length from first buffer in SG */
  2437. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  2438. hal_rx_msdu_start_msdu_len_get(
  2439. soc->hal_soc,
  2440. qdf_nbuf_data(nbuf));
  2441. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = true;
  2442. }
  2443. if (msdu_continuation) {
  2444. /* MSDU continued packets */
  2445. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  2446. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2447. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  2448. } else {
  2449. /* This is the terminal packet in SG */
  2450. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  2451. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  2452. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2453. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  2454. process_sg_buf = true;
  2455. }
  2456. }
  2457. /*
  2458. * save the wbm desc info in nbuf TLV. We will need this
  2459. * info when we do the actual nbuf processing
  2460. */
  2461. wbm_err_info.pool_id = rx_desc->pool_id;
  2462. hal_rx_priv_info_set_in_tlv(soc->hal_soc,
  2463. qdf_nbuf_data(nbuf),
  2464. (uint8_t *)&wbm_err_info,
  2465. sizeof(wbm_err_info));
  2466. rx_bufs_reaped[rx_desc->pool_id]++;
  2467. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  2468. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  2469. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  2470. nbuf);
  2471. if (process_sg_buf) {
  2472. if (!dp_rx_buffer_pool_refill(
  2473. soc,
  2474. soc->wbm_sg_param.wbm_sg_nbuf_head,
  2475. rx_desc->pool_id))
  2476. DP_RX_MERGE_TWO_LIST(
  2477. nbuf_head, nbuf_tail,
  2478. soc->wbm_sg_param.wbm_sg_nbuf_head,
  2479. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  2480. dp_rx_wbm_sg_list_last_msdu_war(soc);
  2481. dp_rx_wbm_sg_list_reset(soc);
  2482. process_sg_buf = false;
  2483. }
  2484. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  2485. rx_desc->pool_id)) {
  2486. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  2487. }
  2488. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  2489. &tail[rx_desc->pool_id],
  2490. rx_desc);
  2491. /*
  2492. * if continuation bit is set then we have MSDU spread
  2493. * across multiple buffers, let us not decrement quota
  2494. * till we reap all buffers of that MSDU.
  2495. */
  2496. if (qdf_likely(!msdu_continuation))
  2497. quota -= 1;
  2498. }
  2499. done:
  2500. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2501. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2502. if (rx_bufs_reaped[mac_id]) {
  2503. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2504. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2505. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2506. rx_desc_pool, rx_bufs_reaped[mac_id],
  2507. &head[mac_id], &tail[mac_id]);
  2508. rx_bufs_used += rx_bufs_reaped[mac_id];
  2509. }
  2510. }
  2511. nbuf = nbuf_head;
  2512. while (nbuf) {
  2513. struct dp_txrx_peer *txrx_peer;
  2514. struct dp_peer *peer;
  2515. uint16_t peer_id;
  2516. uint8_t err_code;
  2517. uint8_t *tlv_hdr;
  2518. uint32_t peer_meta_data;
  2519. dp_txrx_ref_handle txrx_ref_handle = NULL;
  2520. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2521. /*
  2522. * retrieve the wbm desc info from nbuf TLV, so we can
  2523. * handle error cases appropriately
  2524. */
  2525. hal_rx_priv_info_get_from_tlv(soc->hal_soc, rx_tlv_hdr,
  2526. (uint8_t *)&wbm_err_info,
  2527. sizeof(wbm_err_info));
  2528. peer_meta_data = hal_rx_mpdu_peer_meta_data_get(soc->hal_soc,
  2529. rx_tlv_hdr);
  2530. peer_id = dp_rx_peer_metadata_peer_id_get(soc, peer_meta_data);
  2531. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  2532. &txrx_ref_handle,
  2533. DP_MOD_ID_RX_ERR);
  2534. if (!txrx_peer)
  2535. dp_info_rl("peer is null peer_id%u err_src%u err_rsn%u",
  2536. peer_id, wbm_err_info.wbm_err_src,
  2537. wbm_err_info.reo_psh_rsn);
  2538. /* Set queue_mapping in nbuf to 0 */
  2539. dp_set_rx_queue(nbuf, 0);
  2540. next = nbuf->next;
  2541. /*
  2542. * Form the SG for msdu continued buffers
  2543. * QCN9000 has this support
  2544. */
  2545. if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2546. nbuf = dp_rx_sg_create(soc, nbuf);
  2547. next = nbuf->next;
  2548. /*
  2549. * SG error handling is not done correctly,
  2550. * drop SG frames for now.
  2551. */
  2552. dp_rx_nbuf_free(nbuf);
  2553. dp_info_rl("scattered msdu dropped");
  2554. nbuf = next;
  2555. if (txrx_peer)
  2556. dp_txrx_peer_unref_delete(txrx_ref_handle,
  2557. DP_MOD_ID_RX_ERR);
  2558. continue;
  2559. }
  2560. if (wbm_err_info.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  2561. if (wbm_err_info.reo_psh_rsn
  2562. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  2563. DP_STATS_INC(soc,
  2564. rx.err.reo_error
  2565. [wbm_err_info.reo_err_code], 1);
  2566. /* increment @pdev level */
  2567. pool_id = wbm_err_info.pool_id;
  2568. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2569. if (dp_pdev)
  2570. DP_STATS_INC(dp_pdev, err.reo_error,
  2571. 1);
  2572. switch (wbm_err_info.reo_err_code) {
  2573. /*
  2574. * Handling for packets which have NULL REO
  2575. * queue descriptor
  2576. */
  2577. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2578. pool_id = wbm_err_info.pool_id;
  2579. dp_rx_null_q_desc_handle(soc, nbuf,
  2580. rx_tlv_hdr,
  2581. pool_id,
  2582. txrx_peer);
  2583. break;
  2584. /* TODO */
  2585. /* Add per error code accounting */
  2586. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2587. if (txrx_peer)
  2588. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2589. rx.err.jump_2k_err,
  2590. 1);
  2591. pool_id = wbm_err_info.pool_id;
  2592. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2593. rx_tlv_hdr)) {
  2594. tid =
  2595. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2596. }
  2597. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2598. hal_rx_msdu_start_msdu_len_get(
  2599. soc->hal_soc, rx_tlv_hdr);
  2600. nbuf->next = NULL;
  2601. dp_2k_jump_handle(soc, nbuf,
  2602. rx_tlv_hdr,
  2603. peer_id, tid);
  2604. break;
  2605. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2606. if (txrx_peer)
  2607. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2608. rx.err.oor_err,
  2609. 1);
  2610. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2611. rx_tlv_hdr)) {
  2612. tid =
  2613. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2614. }
  2615. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2616. hal_rx_msdu_start_msdu_len_get(
  2617. soc->hal_soc, rx_tlv_hdr);
  2618. nbuf->next = NULL;
  2619. dp_rx_oor_handle(soc, nbuf,
  2620. peer_id,
  2621. rx_tlv_hdr);
  2622. break;
  2623. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2624. case HAL_REO_ERR_BAR_FRAME_OOR:
  2625. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  2626. if (peer) {
  2627. dp_rx_err_handle_bar(soc, peer,
  2628. nbuf);
  2629. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  2630. }
  2631. dp_rx_nbuf_free(nbuf);
  2632. break;
  2633. case HAL_REO_ERR_PN_CHECK_FAILED:
  2634. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  2635. if (txrx_peer)
  2636. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2637. rx.err.pn_err,
  2638. 1);
  2639. dp_rx_nbuf_free(nbuf);
  2640. break;
  2641. default:
  2642. dp_info_rl("Got pkt with REO ERROR: %d",
  2643. wbm_err_info.reo_err_code);
  2644. dp_rx_nbuf_free(nbuf);
  2645. }
  2646. } else if (wbm_err_info.reo_psh_rsn
  2647. == HAL_RX_WBM_REO_PSH_RSN_ROUTE) {
  2648. dp_rx_err_route_hdl(soc, nbuf, txrx_peer,
  2649. rx_tlv_hdr,
  2650. HAL_RX_WBM_ERR_SRC_REO);
  2651. } else {
  2652. /* should not enter here */
  2653. dp_rx_err_alert("invalid reo push reason %u",
  2654. wbm_err_info.reo_psh_rsn);
  2655. dp_rx_nbuf_free(nbuf);
  2656. qdf_assert_always(0);
  2657. }
  2658. } else if (wbm_err_info.wbm_err_src ==
  2659. HAL_RX_WBM_ERR_SRC_RXDMA) {
  2660. if (wbm_err_info.rxdma_psh_rsn
  2661. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2662. DP_STATS_INC(soc,
  2663. rx.err.rxdma_error
  2664. [wbm_err_info.rxdma_err_code], 1);
  2665. /* increment @pdev level */
  2666. pool_id = wbm_err_info.pool_id;
  2667. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2668. if (dp_pdev)
  2669. DP_STATS_INC(dp_pdev,
  2670. err.rxdma_error, 1);
  2671. switch (wbm_err_info.rxdma_err_code) {
  2672. case HAL_RXDMA_ERR_UNENCRYPTED:
  2673. case HAL_RXDMA_ERR_WIFI_PARSE:
  2674. if (txrx_peer)
  2675. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2676. rx.err.rxdma_wifi_parse_err,
  2677. 1);
  2678. pool_id = wbm_err_info.pool_id;
  2679. dp_rx_process_rxdma_err(soc, nbuf,
  2680. rx_tlv_hdr,
  2681. txrx_peer,
  2682. wbm_err_info.
  2683. rxdma_err_code,
  2684. pool_id);
  2685. break;
  2686. case HAL_RXDMA_ERR_TKIP_MIC:
  2687. dp_rx_process_mic_error(soc, nbuf,
  2688. rx_tlv_hdr,
  2689. txrx_peer);
  2690. if (txrx_peer)
  2691. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2692. rx.err.mic_err,
  2693. 1);
  2694. break;
  2695. case HAL_RXDMA_ERR_DECRYPT:
  2696. if (txrx_peer) {
  2697. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2698. rx.err.decrypt_err,
  2699. 1);
  2700. dp_rx_nbuf_free(nbuf);
  2701. break;
  2702. }
  2703. if (!dp_handle_rxdma_decrypt_err()) {
  2704. dp_rx_nbuf_free(nbuf);
  2705. break;
  2706. }
  2707. pool_id = wbm_err_info.pool_id;
  2708. err_code = wbm_err_info.rxdma_err_code;
  2709. tlv_hdr = rx_tlv_hdr;
  2710. dp_rx_process_rxdma_err(soc, nbuf,
  2711. tlv_hdr, NULL,
  2712. err_code,
  2713. pool_id);
  2714. break;
  2715. case HAL_RXDMA_MULTICAST_ECHO:
  2716. if (txrx_peer)
  2717. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2718. rx.mec_drop, 1,
  2719. qdf_nbuf_len(nbuf));
  2720. dp_rx_nbuf_free(nbuf);
  2721. break;
  2722. case HAL_RXDMA_UNAUTHORIZED_WDS:
  2723. pool_id = wbm_err_info.pool_id;
  2724. err_code = wbm_err_info.rxdma_err_code;
  2725. tlv_hdr = rx_tlv_hdr;
  2726. dp_rx_process_rxdma_err(soc, nbuf,
  2727. tlv_hdr, NULL,
  2728. err_code,
  2729. pool_id);
  2730. break;
  2731. default:
  2732. dp_rx_nbuf_free(nbuf);
  2733. dp_err_rl("RXDMA error %d",
  2734. wbm_err_info.rxdma_err_code);
  2735. }
  2736. } else if (wbm_err_info.rxdma_psh_rsn
  2737. == HAL_RX_WBM_RXDMA_PSH_RSN_ROUTE) {
  2738. dp_rx_err_route_hdl(soc, nbuf, txrx_peer,
  2739. rx_tlv_hdr,
  2740. HAL_RX_WBM_ERR_SRC_RXDMA);
  2741. } else if (wbm_err_info.rxdma_psh_rsn
  2742. == HAL_RX_WBM_RXDMA_PSH_RSN_FLUSH) {
  2743. dp_rx_err_err("rxdma push reason %u",
  2744. wbm_err_info.rxdma_psh_rsn);
  2745. DP_STATS_INC(soc, rx.err.rx_flush_count, 1);
  2746. dp_rx_nbuf_free(nbuf);
  2747. } else {
  2748. /* should not enter here */
  2749. dp_rx_err_alert("invalid rxdma push reason %u",
  2750. wbm_err_info.rxdma_psh_rsn);
  2751. dp_rx_nbuf_free(nbuf);
  2752. qdf_assert_always(0);
  2753. }
  2754. } else {
  2755. /* Should not come here */
  2756. qdf_assert(0);
  2757. }
  2758. if (txrx_peer)
  2759. dp_txrx_peer_unref_delete(txrx_ref_handle,
  2760. DP_MOD_ID_RX_ERR);
  2761. nbuf = next;
  2762. }
  2763. return rx_bufs_used; /* Assume no scale factor for now */
  2764. }
  2765. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2766. /**
  2767. * dup_desc_dbg() - dump and assert if duplicate rx desc found
  2768. *
  2769. * @soc: core DP main context
  2770. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2771. * @rx_desc: void pointer to rx descriptor
  2772. *
  2773. * Return: void
  2774. */
  2775. static void dup_desc_dbg(struct dp_soc *soc,
  2776. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2777. void *rx_desc)
  2778. {
  2779. DP_STATS_INC(soc, rx.err.hal_rxdma_err_dup, 1);
  2780. dp_rx_dump_info_and_assert(
  2781. soc,
  2782. soc->rx_rel_ring.hal_srng,
  2783. hal_rxdma_desc_to_hal_ring_desc(rxdma_dst_ring_desc),
  2784. rx_desc);
  2785. }
  2786. /**
  2787. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  2788. *
  2789. * @soc: core DP main context
  2790. * @mac_id: mac id which is one of 3 mac_ids
  2791. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2792. * @head: head of descs list to be freed
  2793. * @tail: tail of decs list to be freed
  2794. * Return: number of msdu in MPDU to be popped
  2795. */
  2796. static inline uint32_t
  2797. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2798. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2799. union dp_rx_desc_list_elem_t **head,
  2800. union dp_rx_desc_list_elem_t **tail)
  2801. {
  2802. void *rx_msdu_link_desc;
  2803. qdf_nbuf_t msdu;
  2804. qdf_nbuf_t last;
  2805. struct hal_rx_msdu_list msdu_list;
  2806. uint16_t num_msdus;
  2807. struct hal_buf_info buf_info;
  2808. uint32_t rx_bufs_used = 0;
  2809. uint32_t msdu_cnt;
  2810. uint32_t i;
  2811. uint8_t push_reason;
  2812. uint8_t rxdma_error_code = 0;
  2813. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  2814. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2815. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2816. hal_rxdma_desc_t ring_desc;
  2817. struct rx_desc_pool *rx_desc_pool;
  2818. if (!pdev) {
  2819. dp_rx_err_debug("%pK: pdev is null for mac_id = %d",
  2820. soc, mac_id);
  2821. return rx_bufs_used;
  2822. }
  2823. msdu = 0;
  2824. last = NULL;
  2825. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2826. &buf_info, &msdu_cnt);
  2827. push_reason =
  2828. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  2829. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2830. rxdma_error_code =
  2831. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  2832. }
  2833. do {
  2834. rx_msdu_link_desc =
  2835. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2836. qdf_assert_always(rx_msdu_link_desc);
  2837. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2838. &msdu_list, &num_msdus);
  2839. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2840. /* if the msdus belongs to NSS offloaded radio &&
  2841. * the rbm is not SW1_BM then return the msdu_link
  2842. * descriptor without freeing the msdus (nbufs). let
  2843. * these buffers be given to NSS completion ring for
  2844. * NSS to free them.
  2845. * else iterate through the msdu link desc list and
  2846. * free each msdu in the list.
  2847. */
  2848. if (msdu_list.rbm[0] !=
  2849. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id) &&
  2850. wlan_cfg_get_dp_pdev_nss_enabled(
  2851. pdev->wlan_cfg_ctx))
  2852. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  2853. else {
  2854. for (i = 0; i < num_msdus; i++) {
  2855. struct dp_rx_desc *rx_desc =
  2856. soc->arch_ops.
  2857. dp_rx_desc_cookie_2_va(
  2858. soc,
  2859. msdu_list.sw_cookie[i]);
  2860. qdf_assert_always(rx_desc);
  2861. msdu = rx_desc->nbuf;
  2862. /*
  2863. * this is a unlikely scenario
  2864. * where the host is reaping
  2865. * a descriptor which
  2866. * it already reaped just a while ago
  2867. * but is yet to replenish
  2868. * it back to HW.
  2869. * In this case host will dump
  2870. * the last 128 descriptors
  2871. * including the software descriptor
  2872. * rx_desc and assert.
  2873. */
  2874. ring_desc = rxdma_dst_ring_desc;
  2875. if (qdf_unlikely(!rx_desc->in_use)) {
  2876. dup_desc_dbg(soc,
  2877. ring_desc,
  2878. rx_desc);
  2879. continue;
  2880. }
  2881. if (rx_desc->unmapped == 0) {
  2882. rx_desc_pool =
  2883. &soc->rx_desc_buf[rx_desc->pool_id];
  2884. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2885. dp_rx_nbuf_unmap_pool(soc,
  2886. rx_desc_pool,
  2887. msdu);
  2888. rx_desc->unmapped = 1;
  2889. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2890. }
  2891. dp_rx_err_debug("%pK: msdu_nbuf=%pK ",
  2892. soc, msdu);
  2893. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  2894. rx_desc->pool_id);
  2895. rx_bufs_used++;
  2896. dp_rx_add_to_free_desc_list(head,
  2897. tail, rx_desc);
  2898. }
  2899. }
  2900. } else {
  2901. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  2902. }
  2903. /*
  2904. * Store the current link buffer into to the local structure
  2905. * to be used for release purpose.
  2906. */
  2907. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  2908. buf_info.paddr, buf_info.sw_cookie,
  2909. buf_info.rbm);
  2910. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  2911. &buf_info);
  2912. dp_rx_link_desc_return_by_addr(soc,
  2913. (hal_buff_addrinfo_t)
  2914. rx_link_buf_info,
  2915. bm_action);
  2916. } while (buf_info.paddr);
  2917. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  2918. if (pdev)
  2919. DP_STATS_INC(pdev, err.rxdma_error, 1);
  2920. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  2921. dp_rx_err_err("%pK: Packet received with Decrypt error", soc);
  2922. }
  2923. return rx_bufs_used;
  2924. }
  2925. uint32_t
  2926. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2927. uint32_t mac_id, uint32_t quota)
  2928. {
  2929. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2930. hal_rxdma_desc_t rxdma_dst_ring_desc;
  2931. hal_soc_handle_t hal_soc;
  2932. void *err_dst_srng;
  2933. union dp_rx_desc_list_elem_t *head = NULL;
  2934. union dp_rx_desc_list_elem_t *tail = NULL;
  2935. struct dp_srng *dp_rxdma_srng;
  2936. struct rx_desc_pool *rx_desc_pool;
  2937. uint32_t work_done = 0;
  2938. uint32_t rx_bufs_used = 0;
  2939. if (!pdev)
  2940. return 0;
  2941. err_dst_srng = soc->rxdma_err_dst_ring[mac_id].hal_srng;
  2942. if (!err_dst_srng) {
  2943. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2944. soc, err_dst_srng);
  2945. return 0;
  2946. }
  2947. hal_soc = soc->hal_soc;
  2948. qdf_assert(hal_soc);
  2949. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, err_dst_srng))) {
  2950. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2951. soc, err_dst_srng);
  2952. return 0;
  2953. }
  2954. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  2955. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  2956. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  2957. rxdma_dst_ring_desc,
  2958. &head, &tail);
  2959. }
  2960. dp_srng_access_end(int_ctx, soc, err_dst_srng);
  2961. if (rx_bufs_used) {
  2962. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2963. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2964. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2965. } else {
  2966. dp_rxdma_srng = &soc->rx_refill_buf_ring[pdev->lmac_id];
  2967. rx_desc_pool = &soc->rx_desc_buf[pdev->lmac_id];
  2968. }
  2969. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2970. rx_desc_pool, rx_bufs_used, &head, &tail);
  2971. work_done += rx_bufs_used;
  2972. }
  2973. return work_done;
  2974. }
  2975. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2976. static inline uint32_t
  2977. dp_wbm_int_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2978. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2979. union dp_rx_desc_list_elem_t **head,
  2980. union dp_rx_desc_list_elem_t **tail)
  2981. {
  2982. void *rx_msdu_link_desc;
  2983. qdf_nbuf_t msdu;
  2984. qdf_nbuf_t last;
  2985. struct hal_rx_msdu_list msdu_list;
  2986. uint16_t num_msdus;
  2987. struct hal_buf_info buf_info;
  2988. uint32_t rx_bufs_used = 0, msdu_cnt, i;
  2989. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2990. struct rx_desc_pool *rx_desc_pool;
  2991. msdu = 0;
  2992. last = NULL;
  2993. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2994. &buf_info, &msdu_cnt);
  2995. do {
  2996. rx_msdu_link_desc =
  2997. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2998. if (!rx_msdu_link_desc) {
  2999. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_LINK_DESC], 1);
  3000. break;
  3001. }
  3002. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  3003. &msdu_list, &num_msdus);
  3004. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  3005. for (i = 0; i < num_msdus; i++) {
  3006. struct dp_rx_desc *rx_desc =
  3007. soc->arch_ops.dp_rx_desc_cookie_2_va(
  3008. soc,
  3009. msdu_list.sw_cookie[i]);
  3010. qdf_assert_always(rx_desc);
  3011. rx_desc_pool =
  3012. &soc->rx_desc_buf[rx_desc->pool_id];
  3013. msdu = rx_desc->nbuf;
  3014. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  3015. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, msdu);
  3016. rx_desc->unmapped = 1;
  3017. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  3018. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  3019. rx_desc->pool_id);
  3020. rx_bufs_used++;
  3021. dp_rx_add_to_free_desc_list(head,
  3022. tail, rx_desc);
  3023. }
  3024. }
  3025. /*
  3026. * Store the current link buffer into to the local structure
  3027. * to be used for release purpose.
  3028. */
  3029. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  3030. buf_info.paddr, buf_info.sw_cookie,
  3031. buf_info.rbm);
  3032. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  3033. &buf_info);
  3034. dp_rx_link_desc_return_by_addr(soc, (hal_buff_addrinfo_t)
  3035. rx_link_buf_info,
  3036. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  3037. } while (buf_info.paddr);
  3038. return rx_bufs_used;
  3039. }
  3040. /*
  3041. *
  3042. * dp_handle_wbm_internal_error() - handles wbm_internal_error case
  3043. *
  3044. * @soc: core DP main context
  3045. * @hal_desc: hal descriptor
  3046. * @buf_type: indicates if the buffer is of type link disc or msdu
  3047. * Return: None
  3048. *
  3049. * wbm_internal_error is seen in following scenarios :
  3050. *
  3051. * 1. Null pointers detected in WBM_RELEASE_RING descriptors
  3052. * 2. Null pointers detected during delinking process
  3053. *
  3054. * Some null pointer cases:
  3055. *
  3056. * a. MSDU buffer pointer is NULL
  3057. * b. Next_MSDU_Link_Desc pointer is NULL, with no last msdu flag
  3058. * c. MSDU buffer pointer is NULL or Next_Link_Desc pointer is NULL
  3059. */
  3060. void
  3061. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  3062. uint32_t buf_type)
  3063. {
  3064. struct hal_buf_info buf_info = {0};
  3065. struct dp_rx_desc *rx_desc = NULL;
  3066. struct rx_desc_pool *rx_desc_pool;
  3067. uint32_t rx_bufs_reaped = 0;
  3068. union dp_rx_desc_list_elem_t *head = NULL;
  3069. union dp_rx_desc_list_elem_t *tail = NULL;
  3070. uint8_t pool_id;
  3071. hal_rx_reo_buf_paddr_get(soc->hal_soc, hal_desc, &buf_info);
  3072. if (!buf_info.paddr) {
  3073. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_BUFFER], 1);
  3074. return;
  3075. }
  3076. /* buffer_addr_info is the first element of ring_desc */
  3077. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)hal_desc,
  3078. &buf_info);
  3079. pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(buf_info.sw_cookie);
  3080. if (buf_type == HAL_WBM_RELEASE_RING_2_BUFFER_TYPE) {
  3081. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_MSDU_BUFF], 1);
  3082. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  3083. soc,
  3084. buf_info.sw_cookie);
  3085. if (rx_desc && rx_desc->nbuf) {
  3086. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  3087. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  3088. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool,
  3089. rx_desc->nbuf);
  3090. rx_desc->unmapped = 1;
  3091. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  3092. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  3093. rx_desc->pool_id);
  3094. dp_rx_add_to_free_desc_list(&head,
  3095. &tail,
  3096. rx_desc);
  3097. rx_bufs_reaped++;
  3098. }
  3099. } else if (buf_type == HAL_WBM_RELEASE_RING_2_DESC_TYPE) {
  3100. rx_bufs_reaped = dp_wbm_int_err_mpdu_pop(soc, pool_id,
  3101. hal_desc,
  3102. &head, &tail);
  3103. }
  3104. if (rx_bufs_reaped) {
  3105. struct rx_desc_pool *rx_desc_pool;
  3106. struct dp_srng *dp_rxdma_srng;
  3107. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_BUFF_REAPED], 1);
  3108. dp_rxdma_srng = &soc->rx_refill_buf_ring[pool_id];
  3109. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  3110. dp_rx_buffers_replenish(soc, pool_id, dp_rxdma_srng,
  3111. rx_desc_pool,
  3112. rx_bufs_reaped,
  3113. &head, &tail);
  3114. }
  3115. }
  3116. #endif /* QCA_HOST_MODE_WIFI_DISABLED */