3709853456
This change brings msm display driver including sde, dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel project. It is first source code snapshot from base kernel project. Change-Id: Iec864c064ce5ea04e170f24414c728684002f284 Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
453 lines
13 KiB
C
453 lines
13 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
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*/
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#ifndef _SDE_ROTATOR_R3_INTERNAL_H
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#define _SDE_ROTATOR_R3_INTERNAL_H
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#include "sde_rotator_core.h"
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struct sde_hw_rotator;
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struct sde_hw_rotator_context;
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/**
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* Flags
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*/
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#define SDE_ROT_FLAG_SECURE_OVERLAY_SESSION 0x1
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#define SDE_ROT_FLAG_FLIP_LR 0x2
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#define SDE_ROT_FLAG_FLIP_UD 0x4
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#define SDE_ROT_FLAG_SOURCE_ROTATED_90 0x8
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#define SDE_ROT_FLAG_ROT_90 0x10
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#define SDE_ROT_FLAG_DEINTERLACE 0x20
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#define SDE_ROT_FLAG_SECURE_CAMERA_SESSION 0x40
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/**
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* General defines
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*/
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#define SDE_HW_ROT_REGDMA_RAM_SIZE 1024
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#define SDE_HW_ROT_REGDMA_TOTAL_CTX 8
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#define SDE_HW_ROT_REGDMA_SEG_MASK (SDE_HW_ROT_REGDMA_TOTAL_CTX - 1)
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#define SDE_HW_ROT_REGDMA_SEG_SIZE \
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(SDE_HW_ROT_REGDMA_RAM_SIZE / SDE_HW_ROT_REGDMA_TOTAL_CTX)
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#define SDE_REGDMA_SWTS_MASK 0x00000FFF
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#define SDE_REGDMA_SWTS_SHIFT 12
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enum sde_rot_queue_prio {
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ROT_QUEUE_HIGH_PRIORITY,
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ROT_QUEUE_LOW_PRIORITY,
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ROT_QUEUE_MAX
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};
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enum sde_rot_angle {
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ROT_ANGLE_0,
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ROT_ANGLE_90,
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ROT_ANGEL_MAX
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};
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enum sde_rotator_regdma_mode {
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ROT_REGDMA_OFF,
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ROT_REGDMA_ON,
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ROT_REGDMA_MAX
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};
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/**
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* struct sde_hw_rot_sspp_cfg: Rotator SSPP Configration description
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* @src: source surface information
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* @src_rect: src ROI, caller takes into account the different operations
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* such as decimation, flip etc to program this field
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* @addr: source surface address
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*/
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struct sde_hw_rot_sspp_cfg {
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struct sde_mdp_format_params *fmt;
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struct sde_mdp_plane_sizes src_plane;
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struct sde_rect *src_rect;
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struct sde_mdp_data *data;
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u32 img_width;
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u32 img_height;
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u32 fps;
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u64 bw;
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};
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/**
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* struct sde_hw_rot_wb_cfg: Rotator WB Configration description
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* @dest: destination surface information
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* @dest_rect: dest ROI, caller takes into account the different operations
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* such as decimation, flip etc to program this field
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* @addr: destination surface address
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* @prefill_bw: prefill bandwidth in Bps
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*/
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struct sde_hw_rot_wb_cfg {
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struct sde_mdp_format_params *fmt;
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struct sde_mdp_plane_sizes dst_plane;
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struct sde_rect *dst_rect;
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struct sde_mdp_data *data;
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u32 img_width;
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u32 img_height;
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u32 v_downscale_factor;
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u32 h_downscale_factor;
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u32 fps;
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u64 bw;
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u64 prefill_bw;
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};
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/**
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*
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* struct sde_hw_rotator_ops: Interface to the Rotator Hw driver functions
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*
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* Pre-requsises:
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* - Caller must call the init function to get the rotator context
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* - These functions will be called after clocks are enabled
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*/
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struct sde_hw_rotator_ops {
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/**
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* setup_rotator_fetchengine():
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* Setup Source format
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* Setup Source dimension/cropping rectangle (ROI)
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* Setup Source surface base address and stride
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* Setup fetch engine op mode (linear/tiled/compression/...)
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* @ctx: Rotator context created in sde_hw_rotator_config
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* @queue_id: Select either low / high priority queue
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* @cfg: Rotator Fetch engine configuration parameters
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* @danger_lut: Danger LUT setting
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* @safe_lut: Safe LUT setting
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* @dnsc_factor_w: Downscale factor for width
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* @dnsc_factor_h: Downscale factor for height
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* @flags: Specific config flag, see SDE_ROT_FLAG_ for details
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*/
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void (*setup_rotator_fetchengine)(
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struct sde_hw_rotator_context *ctx,
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enum sde_rot_queue_prio queue_id,
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struct sde_hw_rot_sspp_cfg *cfg,
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u32 danger_lut,
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u32 safe_lut,
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u32 dnsc_factor_w,
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u32 dnsc_factor_h,
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u32 flags);
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/**
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* setup_rotator_wbengine():
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* Setup destination formats
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* Setup destination dimension/cropping rectangle (ROI)
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* Setup destination surface base address and strides
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* Setup writeback engine op mode (linear/tiled/compression)
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* @ctx: Rotator context created in sde_hw_rotator_config
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* @queue_id: Select either low / high priority queue
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* @cfg: Rotator WriteBack engine configuration parameters
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* @flags: Specific config flag, see SDE_ROT_FLAG_ for details
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*/
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void (*setup_rotator_wbengine)(
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struct sde_hw_rotator_context *ctx,
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enum sde_rot_queue_prio queue_id,
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struct sde_hw_rot_wb_cfg *cfg,
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u32 flags);
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/**
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* start_rotator():
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* Kick start rotator operation based on cached setup parameters
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* REGDMA commands will get generated at this points
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* @ctx: Rotator context
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* @queue_id: Select either low / high priority queue
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* Returns: unique job timestamp per submit. Used for tracking
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* rotator finished job.
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*/
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u32 (*start_rotator)(
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struct sde_hw_rotator_context *ctx,
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enum sde_rot_queue_prio queue_id);
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/**
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* wait_rotator_done():
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* Notify Rotator HAL layer previously submitted job finished.
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* A job timestamp will return to caller.
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* @ctx: Rotator context
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* @flags: Reserved
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* Returns: job timestamp for tracking purpose
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*
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*/
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u32 (*wait_rotator_done)(
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struct sde_hw_rotator_context *ctx,
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enum sde_rot_queue_prio queue_id,
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u32 flags);
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/**
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* get_pending_ts():
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* Obtain current active timestamp from rotator hw
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* @rot: HW Rotator structure
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* @ctx: Rotator context
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* @ts: current timestamp return from rot hw
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* Returns: true if context has pending requests
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*/
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int (*get_pending_ts)(
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struct sde_hw_rotator *rot,
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struct sde_hw_rotator_context *ctx,
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u32 *ts);
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/**
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* update_ts():
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* Update rotator timestmap with given value
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* @rot: HW Rotator structure
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* @q_id: rotator queue id
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* @ts: new timestamp for rotator
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*/
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void (*update_ts)(
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struct sde_hw_rotator *rot,
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u32 q_id,
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u32 ts);
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};
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/**
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* struct sde_dbg_buf : Debug buffer used by debugfs
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* @vaddr: VA address mapped from dma buffer
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* @dmabuf: DMA buffer
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* @buflen: Length of DMA buffer
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* @width: pixel width of buffer
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* @height: pixel height of buffer
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*/
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struct sde_dbg_buf {
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void *vaddr;
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struct dma_buf *dmabuf;
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unsigned long buflen;
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u32 width;
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u32 height;
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};
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/**
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* struct sde_hw_rotator_context : Each rotator context ties to each priority
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* queue. Max number of concurrent contexts in regdma is limited to regdma
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* ram segment size allocation. Each rotator context can be any priority. A
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* incremental timestamp is used to identify and assigned to each context.
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* @list: list of pending context
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* @sequence_id: unique sequence identifier for rotation request
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* @sbuf_mode: true if stream buffer is requested
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* @start_ctrl: start control register update value
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* @sys_cache_mode: sys cache mode register update value
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* @op_mode: rot top op mode selection
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* @last_entry: pointer to last configured entry (for debugging purposes)
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*/
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struct sde_hw_rotator_context {
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struct list_head list;
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struct sde_hw_rotator *rot;
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struct sde_rot_hw_resource *hwres;
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enum sde_rot_queue_prio q_id;
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u32 session_id;
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u32 sequence_id;
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char __iomem *regdma_base;
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char __iomem *regdma_wrptr;
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u32 timestamp;
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struct completion rot_comp;
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wait_queue_head_t regdma_waitq;
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struct sde_dbg_buf src_dbgbuf;
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struct sde_dbg_buf dst_dbgbuf;
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u32 last_regdma_isr_status;
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u32 last_regdma_timestamp;
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dma_addr_t ts_addr;
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bool is_secure;
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bool is_traffic_shaping;
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bool sbuf_mode;
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bool abort;
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u32 start_ctrl;
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u32 sys_cache_mode;
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u32 op_mode;
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struct sde_rot_entry *last_entry;
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};
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/**
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* struct sde_hw_rotator_resource_info : Each rotator resource ties to each
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* priority queue
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*/
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struct sde_hw_rotator_resource_info {
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struct sde_hw_rotator *rot;
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struct sde_rot_hw_resource hw;
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};
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/**
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* struct sde_hw_rotator : Rotator description
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* @hw: mdp register mapped offset
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* @ops: pointer to operations possible for the rotator HW
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* @highest_bank: highest bank size of memory
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* @ubwc_malsize: ubwc minimum allowable length
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* @ubwc_swizzle: ubwc swizzle enable
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* @sbuf_headroom: stream buffer headroom in lines
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* @solid_fill: true if solid fill is requested
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* @constant_color: solid fill constant color
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* @sbuf_ctx: list of active sbuf context in FIFO order
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* @vid_trigger: video mode trigger select
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* @cmd_trigger: command mode trigger select
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* @inpixfmts: array of supported input pixel formats fourcc per mode
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* @num_inpixfmt: size of the supported input pixel format array per mode
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* @outpixfmts: array of supported output pixel formats in fourcc per mode
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* @num_outpixfmt: size of the supported output pixel formats array per mode
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* @downscale_caps: capability string of scaling
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* @maxlinewidth: maximum line width supported
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*/
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struct sde_hw_rotator {
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/* base */
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char __iomem *mdss_base;
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/* Platform device from upper manager */
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struct platform_device *pdev;
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/* Ops */
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struct sde_hw_rotator_ops ops;
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/* Cmd Queue */
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u32 cmd_queue[SDE_HW_ROT_REGDMA_RAM_SIZE];
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/* Cmd Queue Write Ptr */
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char __iomem *cmd_wr_ptr[ROT_QUEUE_MAX][SDE_HW_ROT_REGDMA_TOTAL_CTX];
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/* Rotator Context */
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struct sde_hw_rotator_context
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*rotCtx[ROT_QUEUE_MAX][SDE_HW_ROT_REGDMA_TOTAL_CTX];
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/* Cmd timestamp sequence for different priority*/
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atomic_t timestamp[ROT_QUEUE_MAX];
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/* regdma mode */
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enum sde_rotator_regdma_mode mode;
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/* logical interrupt number */
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int irq_num;
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atomic_t irq_enabled;
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/* internal ION memory for SW timestamp */
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struct ion_client *iclient;
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struct sde_mdp_img_data swts_buf;
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void *swts_buffer;
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u32 highest_bank;
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u32 ubwc_malsize;
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u32 ubwc_swizzle;
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u32 sbuf_headroom;
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u32 solid_fill;
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u32 constant_color;
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spinlock_t rotctx_lock;
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spinlock_t rotisr_lock;
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bool dbgmem;
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bool reset_hw_ts;
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u32 last_hwts[ROT_QUEUE_MAX];
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u32 koff_timeout;
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u32 vid_trigger;
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u32 cmd_trigger;
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struct list_head sbuf_ctx[ROT_QUEUE_MAX];
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const u32 *inpixfmts[SDE_ROTATOR_MODE_MAX];
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u32 num_inpixfmt[SDE_ROTATOR_MODE_MAX];
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const u32 *outpixfmts[SDE_ROTATOR_MODE_MAX];
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u32 num_outpixfmt[SDE_ROTATOR_MODE_MAX];
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const char *downscale_caps;
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u32 maxlinewidth;
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};
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/**
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* sde_hw_rotator_get_regdma_ctxidx(): regdma segment index is based on
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* timestamp. For non-regdma, just return 0 (i.e. first index)
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* @ctx: Rotator Context
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* return: regdma segment index
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*/
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static inline u32 sde_hw_rotator_get_regdma_ctxidx(
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struct sde_hw_rotator_context *ctx)
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{
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if (ctx->rot->mode == ROT_REGDMA_OFF)
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return 0;
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else
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return ctx->timestamp & SDE_HW_ROT_REGDMA_SEG_MASK;
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}
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/**
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* sde_hw_rotator_get_regdma_segment_base: return the base pointe of current
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* regdma command buffer
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* @ctx: Rotator Context
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* return: base segment address
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*/
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static inline char __iomem *sde_hw_rotator_get_regdma_segment_base(
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struct sde_hw_rotator_context *ctx)
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{
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SDEROT_DBG("regdma base @slot[%d]: %pK\n",
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sde_hw_rotator_get_regdma_ctxidx(ctx),
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ctx->regdma_base);
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return ctx->regdma_base;
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}
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/**
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* sde_hw_rotator_get_regdma_segment(): return current regdma command buffer
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* pointer for current regdma segment.
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* @ctx: Rotator Context
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* return: segment address
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*/
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static inline char __iomem *sde_hw_rotator_get_regdma_segment(
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struct sde_hw_rotator_context *ctx)
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{
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u32 idx = sde_hw_rotator_get_regdma_ctxidx(ctx);
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char __iomem *addr = ctx->regdma_wrptr;
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SDEROT_DBG("regdma slot[%d] ==> %pK\n", idx, addr);
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return addr;
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}
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/**
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* sde_hw_rotator_put_regdma_segment(): update current regdma command buffer
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* pointer for current regdma segment
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* @ctx: Rotator Context
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* @wrptr: current regdma segment location
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*/
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static inline void sde_hw_rotator_put_regdma_segment(
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struct sde_hw_rotator_context *ctx,
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char __iomem *wrptr)
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{
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u32 idx = sde_hw_rotator_get_regdma_ctxidx(ctx);
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ctx->regdma_wrptr = wrptr;
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SDEROT_DBG("regdma slot[%d] <== %pK\n", idx, wrptr);
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}
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/**
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* sde_hw_rotator_put_ctx(): Storing rotator context according to its
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* timestamp.
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*/
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static inline void sde_hw_rotator_put_ctx(struct sde_hw_rotator_context *ctx)
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{
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struct sde_hw_rotator *rot = ctx->rot;
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u32 idx = sde_hw_rotator_get_regdma_ctxidx(ctx);
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unsigned long flags;
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spin_lock_irqsave(&rot->rotisr_lock, flags);
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rot->rotCtx[ctx->q_id][idx] = ctx;
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if (ctx->sbuf_mode)
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list_add_tail(&ctx->list, &rot->sbuf_ctx[ctx->q_id]);
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spin_unlock_irqrestore(&rot->rotisr_lock, flags);
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SDEROT_DBG("rotCtx[%d][%d] <== ctx:%pK | session-id:%d\n",
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ctx->q_id, idx, ctx, ctx->session_id);
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}
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/**
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* sde_hw_rotator_clr_ctx(): Clearing rotator context according to its
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* timestamp.
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*/
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static inline void sde_hw_rotator_clr_ctx(struct sde_hw_rotator_context *ctx)
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{
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struct sde_hw_rotator *rot = ctx->rot;
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u32 idx = sde_hw_rotator_get_regdma_ctxidx(ctx);
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unsigned long flags;
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spin_lock_irqsave(&rot->rotisr_lock, flags);
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rot->rotCtx[ctx->q_id][idx] = NULL;
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if (ctx->sbuf_mode)
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list_del_init(&ctx->list);
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spin_unlock_irqrestore(&rot->rotisr_lock, flags);
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SDEROT_DBG("rotCtx[%d][%d] <== null | session-id:%d\n",
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ctx->q_id, idx, ctx->session_id);
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}
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#endif /*_SDE_ROTATOR_R3_INTERNAL_H */
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