dp_main.c 293 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361636263636364636563666367636863696370637163726373637463756376637763786379638063816382638363846385638663876388638963906391639263936394639563966397639863996400640164026403640464056406640764086409641064116412641364146415641664176418641964206421642264236424642564266427642864296430643164326433643464356436643764386439644064416442644364446445644664476448644964506451645264536454645564566457645864596460646164626463646464656466646764686469647064716472647364746475647664776478647964806481648264836484648564866487648864896490649164926493649464956496649764986499650065016502650365046505650665076508650965106511651265136514651565166517651865196520652165226523652465256526652765286529653065316532653365346535653665376538653965406541654265436544654565466547654865496550655165526553655465556556655765586559656065616562656365646565656665676568656965706571657265736574657565766577657865796580658165826583658465856586658765886589659065916592659365946595659665976598659966006601660266036604660566066607660866096610661166126613661466156616661766186619662066216622662366246625662666276628662966306631663266336634663566366637663866396640664166426643664466456646664766486649665066516652665366546655665666576658665966606661666266636664666566666667666866696670667166726673667466756676667766786679668066816682668366846685668666876688668966906691669266936694669566966697669866996700670167026703670467056706670767086709671067116712671367146715671667176718671967206721672267236724672567266727672867296730673167326733673467356736673767386739674067416742674367446745674667476748674967506751675267536754675567566757675867596760676167626763676467656766676767686769677067716772677367746775677667776778677967806781678267836784678567866787678867896790679167926793679467956796679767986799680068016802680368046805680668076808680968106811681268136814681568166817681868196820682168226823682468256826682768286829683068316832683368346835683668376838683968406841684268436844684568466847684868496850685168526853685468556856685768586859686068616862686368646865686668676868686968706871687268736874687568766877687868796880688168826883688468856886688768886889689068916892689368946895689668976898689969006901690269036904690569066907690869096910691169126913691469156916691769186919692069216922692369246925692669276928692969306931693269336934693569366937693869396940694169426943694469456946694769486949695069516952695369546955695669576958695969606961696269636964696569666967696869696970697169726973697469756976697769786979698069816982698369846985698669876988698969906991699269936994699569966997699869997000700170027003700470057006700770087009701070117012701370147015701670177018701970207021702270237024702570267027702870297030703170327033703470357036703770387039704070417042704370447045704670477048704970507051705270537054705570567057705870597060706170627063706470657066706770687069707070717072707370747075707670777078707970807081708270837084708570867087708870897090709170927093709470957096709770987099710071017102710371047105710671077108710971107111711271137114711571167117711871197120712171227123712471257126712771287129713071317132713371347135713671377138713971407141714271437144714571467147714871497150715171527153715471557156715771587159716071617162716371647165716671677168716971707171717271737174717571767177717871797180718171827183718471857186718771887189719071917192719371947195719671977198719972007201720272037204720572067207720872097210721172127213721472157216721772187219722072217222722372247225722672277228722972307231723272337234723572367237723872397240724172427243724472457246724772487249725072517252725372547255725672577258725972607261726272637264726572667267726872697270727172727273727472757276727772787279728072817282728372847285728672877288728972907291729272937294729572967297729872997300730173027303730473057306730773087309731073117312731373147315731673177318731973207321732273237324732573267327732873297330733173327333733473357336733773387339734073417342734373447345734673477348734973507351735273537354735573567357735873597360736173627363736473657366736773687369737073717372737373747375737673777378737973807381738273837384738573867387738873897390739173927393739473957396739773987399740074017402740374047405740674077408740974107411741274137414741574167417741874197420742174227423742474257426742774287429743074317432743374347435743674377438743974407441744274437444744574467447744874497450745174527453745474557456745774587459746074617462746374647465746674677468746974707471747274737474747574767477747874797480748174827483748474857486748774887489749074917492749374947495749674977498749975007501750275037504750575067507750875097510751175127513751475157516751775187519752075217522752375247525752675277528752975307531753275337534753575367537753875397540754175427543754475457546754775487549755075517552755375547555755675577558755975607561756275637564756575667567756875697570757175727573757475757576757775787579758075817582758375847585758675877588758975907591759275937594759575967597759875997600760176027603760476057606760776087609761076117612761376147615761676177618761976207621762276237624762576267627762876297630763176327633763476357636763776387639764076417642764376447645764676477648764976507651765276537654765576567657765876597660766176627663766476657666766776687669767076717672767376747675767676777678767976807681768276837684768576867687768876897690769176927693769476957696769776987699770077017702770377047705770677077708770977107711771277137714771577167717771877197720772177227723772477257726772777287729773077317732773377347735773677377738773977407741774277437744774577467747774877497750775177527753775477557756775777587759776077617762776377647765776677677768776977707771777277737774777577767777777877797780778177827783778477857786778777887789779077917792779377947795779677977798779978007801780278037804780578067807780878097810781178127813781478157816781778187819782078217822782378247825782678277828782978307831783278337834783578367837783878397840784178427843784478457846784778487849785078517852785378547855785678577858785978607861786278637864786578667867786878697870787178727873787478757876787778787879788078817882788378847885788678877888788978907891789278937894789578967897789878997900790179027903790479057906790779087909791079117912791379147915791679177918791979207921792279237924792579267927792879297930793179327933793479357936793779387939794079417942794379447945794679477948794979507951795279537954795579567957795879597960796179627963796479657966796779687969797079717972797379747975797679777978797979807981798279837984798579867987798879897990799179927993799479957996799779987999800080018002800380048005800680078008800980108011801280138014801580168017801880198020802180228023802480258026802780288029803080318032803380348035803680378038803980408041804280438044804580468047804880498050805180528053805480558056805780588059806080618062806380648065806680678068806980708071807280738074807580768077807880798080808180828083808480858086808780888089809080918092809380948095809680978098809981008101810281038104810581068107810881098110811181128113811481158116811781188119812081218122812381248125812681278128812981308131813281338134813581368137813881398140814181428143814481458146814781488149815081518152815381548155815681578158815981608161816281638164816581668167816881698170817181728173817481758176817781788179818081818182818381848185818681878188818981908191819281938194819581968197819881998200820182028203820482058206820782088209821082118212821382148215821682178218821982208221822282238224822582268227822882298230823182328233823482358236823782388239824082418242824382448245824682478248824982508251825282538254825582568257825882598260826182628263826482658266826782688269827082718272827382748275827682778278827982808281828282838284828582868287828882898290829182928293829482958296829782988299830083018302830383048305830683078308830983108311831283138314831583168317831883198320832183228323832483258326832783288329833083318332833383348335833683378338833983408341834283438344834583468347834883498350835183528353835483558356835783588359836083618362836383648365836683678368836983708371837283738374837583768377837883798380838183828383838483858386838783888389839083918392839383948395839683978398839984008401840284038404840584068407840884098410841184128413841484158416841784188419842084218422842384248425842684278428842984308431843284338434843584368437843884398440844184428443844484458446844784488449845084518452845384548455845684578458845984608461846284638464846584668467846884698470847184728473847484758476847784788479848084818482848384848485848684878488848984908491849284938494849584968497849884998500850185028503850485058506850785088509851085118512851385148515851685178518851985208521852285238524852585268527852885298530853185328533853485358536853785388539854085418542854385448545854685478548854985508551855285538554855585568557855885598560856185628563856485658566856785688569857085718572857385748575857685778578857985808581858285838584858585868587858885898590859185928593859485958596859785988599860086018602860386048605860686078608860986108611861286138614861586168617861886198620862186228623862486258626862786288629863086318632863386348635863686378638863986408641864286438644864586468647864886498650865186528653865486558656865786588659866086618662866386648665866686678668866986708671867286738674867586768677867886798680868186828683868486858686868786888689869086918692869386948695869686978698869987008701870287038704870587068707870887098710871187128713871487158716871787188719872087218722872387248725872687278728872987308731873287338734873587368737873887398740874187428743874487458746874787488749875087518752875387548755875687578758875987608761876287638764876587668767876887698770877187728773877487758776877787788779878087818782878387848785878687878788878987908791879287938794879587968797879887998800880188028803880488058806880788088809881088118812881388148815881688178818881988208821882288238824882588268827882888298830883188328833883488358836883788388839884088418842884388448845884688478848884988508851885288538854885588568857885888598860886188628863886488658866886788688869887088718872887388748875887688778878887988808881888288838884888588868887888888898890889188928893889488958896889788988899890089018902890389048905890689078908890989108911891289138914891589168917891889198920892189228923892489258926892789288929893089318932893389348935893689378938893989408941894289438944894589468947894889498950895189528953895489558956895789588959896089618962896389648965896689678968896989708971897289738974897589768977897889798980898189828983898489858986898789888989899089918992899389948995899689978998899990009001900290039004900590069007900890099010901190129013901490159016901790189019902090219022902390249025902690279028902990309031903290339034903590369037903890399040904190429043904490459046904790489049905090519052905390549055905690579058905990609061906290639064906590669067906890699070907190729073907490759076907790789079908090819082908390849085908690879088908990909091909290939094909590969097909890999100910191029103910491059106910791089109911091119112911391149115911691179118911991209121912291239124912591269127912891299130913191329133913491359136913791389139914091419142914391449145914691479148914991509151915291539154915591569157915891599160916191629163916491659166916791689169917091719172917391749175917691779178917991809181918291839184918591869187918891899190919191929193919491959196919791989199920092019202920392049205920692079208920992109211921292139214921592169217921892199220922192229223922492259226922792289229923092319232923392349235923692379238923992409241924292439244924592469247924892499250925192529253925492559256925792589259926092619262926392649265926692679268926992709271927292739274927592769277927892799280928192829283928492859286928792889289929092919292929392949295929692979298929993009301930293039304930593069307930893099310931193129313931493159316931793189319932093219322932393249325932693279328932993309331933293339334933593369337933893399340934193429343934493459346934793489349935093519352935393549355935693579358935993609361936293639364936593669367936893699370937193729373937493759376937793789379938093819382938393849385938693879388938993909391939293939394939593969397939893999400940194029403940494059406940794089409941094119412941394149415941694179418941994209421942294239424942594269427942894299430943194329433943494359436943794389439944094419442944394449445944694479448944994509451945294539454945594569457945894599460946194629463946494659466946794689469947094719472947394749475947694779478947994809481948294839484948594869487948894899490949194929493949494959496949794989499950095019502950395049505950695079508950995109511951295139514951595169517951895199520952195229523952495259526952795289529953095319532953395349535953695379538953995409541954295439544954595469547954895499550955195529553955495559556955795589559956095619562956395649565956695679568956995709571957295739574957595769577957895799580958195829583958495859586958795889589959095919592959395949595959695979598959996009601960296039604960596069607960896099610961196129613961496159616961796189619962096219622962396249625962696279628962996309631963296339634963596369637963896399640964196429643964496459646964796489649965096519652965396549655965696579658965996609661966296639664966596669667966896699670967196729673967496759676967796789679968096819682968396849685968696879688968996909691969296939694969596969697969896999700970197029703970497059706970797089709971097119712971397149715971697179718971997209721972297239724972597269727972897299730973197329733973497359736973797389739974097419742974397449745974697479748974997509751975297539754975597569757975897599760976197629763976497659766976797689769977097719772977397749775977697779778977997809781978297839784978597869787978897899790979197929793979497959796979797989799980098019802980398049805980698079808980998109811981298139814981598169817981898199820982198229823982498259826982798289829983098319832983398349835983698379838983998409841984298439844984598469847984898499850985198529853985498559856985798589859986098619862986398649865986698679868986998709871987298739874987598769877987898799880988198829883988498859886988798889889989098919892989398949895989698979898989999009901990299039904990599069907990899099910991199129913991499159916991799189919992099219922992399249925992699279928992999309931993299339934993599369937993899399940994199429943994499459946994799489949995099519952995399549955995699579958995999609961996299639964996599669967996899699970997199729973997499759976997799789979998099819982998399849985998699879988998999909991999299939994999599969997999899991000010001100021000310004100051000610007100081000910010100111001210013100141001510016100171001810019100201002110022100231002410025100261002710028100291003010031100321003310034100351003610037100381003910040100411004210043100441004510046100471004810049100501005110052100531005410055100561005710058100591006010061100621006310064100651006610067100681006910070100711007210073100741007510076100771007810079100801008110082100831008410085100861008710088100891009010091100921009310094100951009610097100981009910100101011010210103101041010510106101071010810109101101011110112101131011410115101161011710118101191012010121101221012310124101251012610127101281012910130101311013210133101341013510136101371013810139101401014110142101431014410145101461014710148101491015010151101521015310154101551015610157101581015910160101611016210163101641016510166101671016810169101701017110172101731017410175101761017710178101791018010181101821018310184101851018610187101881018910190101911019210193101941019510196101971019810199102001020110202102031020410205102061020710208102091021010211102121021310214102151021610217102181021910220102211022210223102241022510226102271022810229102301023110232102331023410235102361023710238102391024010241102421024310244102451024610247102481024910250102511025210253102541025510256102571025810259102601026110262102631026410265102661026710268102691027010271102721027310274102751027610277102781027910280102811028210283102841028510286102871028810289102901029110292102931029410295102961029710298102991030010301103021030310304103051030610307103081030910310103111031210313103141031510316103171031810319103201032110322103231032410325103261032710328103291033010331103321033310334103351033610337103381033910340103411034210343103441034510346103471034810349103501035110352103531035410355103561035710358103591036010361103621036310364103651036610367103681036910370103711037210373103741037510376103771037810379103801038110382103831038410385103861038710388103891039010391103921039310394103951039610397103981039910400104011040210403104041040510406104071040810409104101041110412104131041410415104161041710418104191042010421104221042310424104251042610427104281042910430104311043210433104341043510436104371043810439104401044110442104431044410445104461044710448104491045010451104521045310454104551045610457104581045910460104611046210463104641046510466104671046810469104701047110472104731047410475104761047710478104791048010481104821048310484104851048610487104881048910490104911049210493104941049510496104971049810499105001050110502105031050410505105061050710508105091051010511105121051310514105151051610517105181051910520105211052210523105241052510526105271052810529105301053110532105331053410535105361053710538105391054010541105421054310544105451054610547105481054910550105511055210553105541055510556105571055810559105601056110562105631056410565105661056710568105691057010571105721057310574105751057610577105781057910580105811058210583105841058510586105871058810589105901059110592105931059410595105961059710598105991060010601106021060310604106051060610607106081060910610106111061210613106141061510616106171061810619106201062110622106231062410625106261062710628106291063010631106321063310634106351063610637106381063910640106411064210643106441064510646106471064810649106501065110652106531065410655106561065710658106591066010661106621066310664106651066610667106681066910670106711067210673106741067510676106771067810679106801068110682106831068410685106861068710688106891069010691106921069310694106951069610697106981069910700107011070210703107041070510706107071070810709107101071110712107131071410715107161071710718107191072010721107221072310724107251072610727107281072910730107311073210733107341073510736107371073810739107401074110742107431074410745107461074710748107491075010751107521075310754107551075610757107581075910760107611076210763107641076510766107671076810769107701077110772107731077410775107761077710778107791078010781107821078310784107851078610787107881078910790107911079210793107941079510796107971079810799108001080110802108031080410805108061080710808108091081010811108121081310814
  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_hw_headers.h>
  24. #include <hal_api.h>
  25. #include <hif.h>
  26. #include <htt.h>
  27. #include <wdi_event.h>
  28. #include <queue.h>
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include "dp_rx_mon.h"
  35. #ifdef DP_RATETABLE_SUPPORT
  36. #include "dp_ratetable.h"
  37. #endif
  38. #include <cdp_txrx_handle.h>
  39. #include <wlan_cfg.h>
  40. #include "cdp_txrx_cmn_struct.h"
  41. #include "cdp_txrx_stats_struct.h"
  42. #include "cdp_txrx_cmn_reg.h"
  43. #include <qdf_util.h>
  44. #include "dp_peer.h"
  45. #include "dp_rx_mon.h"
  46. #include "htt_stats.h"
  47. #include "htt_ppdu_stats.h"
  48. #include "dp_htt.h"
  49. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  50. #include "cfg_ucfg_api.h"
  51. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  52. #include "cdp_txrx_flow_ctrl_v2.h"
  53. #else
  54. static inline void
  55. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  56. {
  57. return;
  58. }
  59. #endif
  60. #include "dp_ipa.h"
  61. #include "dp_cal_client_api.h"
  62. #ifdef CONFIG_MCL
  63. extern int con_mode_monitor;
  64. #ifndef REMOVE_PKT_LOG
  65. #include <pktlog_ac_api.h>
  66. #include <pktlog_ac.h>
  67. #endif
  68. #endif
  69. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  70. #include "dp_rx_mon_feature.h"
  71. #else
  72. /*
  73. * dp_config_enh_rx_capture()- API to enable/disable enhanced rx capture
  74. * @pdev_handle: DP_PDEV handle
  75. * @val: user provided value
  76. *
  77. * Return: QDF_STATUS
  78. */
  79. static QDF_STATUS
  80. dp_config_enh_rx_capture(struct cdp_pdev *pdev_handle, int val)
  81. {
  82. return QDF_STATUS_E_INVAL;
  83. }
  84. #endif
  85. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  86. #include "dp_tx_capture.h"
  87. #else
  88. /*
  89. * dp_config_enh_tx_capture()- API to enable/disable enhanced tx capture
  90. * @pdev_handle: DP_PDEV handle
  91. * @val: user provided value
  92. *
  93. * Return: QDF_STATUS
  94. */
  95. static QDF_STATUS
  96. dp_config_enh_tx_capture(struct cdp_pdev *pdev_handle, int val)
  97. {
  98. return QDF_STATUS_E_INVAL;
  99. }
  100. #endif
  101. void *dp_soc_init(void *dpsoc, HTC_HANDLE htc_handle, void *hif_handle);
  102. static void dp_pdev_detach(struct cdp_pdev *txrx_pdev, int force);
  103. static struct dp_soc *
  104. dp_soc_attach(void *ctrl_psoc, HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  105. struct ol_if_ops *ol_ops, uint16_t device_id);
  106. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  107. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  108. uint8_t *peer_mac_addr,
  109. struct cdp_ctrl_objmgr_peer *ctrl_peer);
  110. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  111. static void dp_ppdu_ring_reset(struct dp_pdev *pdev);
  112. static void dp_ppdu_ring_cfg(struct dp_pdev *pdev);
  113. #ifdef ENABLE_VERBOSE_DEBUG
  114. bool is_dp_verbose_debug_enabled;
  115. #endif
  116. #define DP_INTR_POLL_TIMER_MS 10
  117. /* Generic AST entry aging timer value */
  118. #define DP_AST_AGING_TIMER_DEFAULT_MS 1000
  119. /* WDS AST entry aging timer value */
  120. #define DP_WDS_AST_AGING_TIMER_DEFAULT_MS 120000
  121. #define DP_WDS_AST_AGING_TIMER_CNT \
  122. ((DP_WDS_AST_AGING_TIMER_DEFAULT_MS / DP_AST_AGING_TIMER_DEFAULT_MS) - 1)
  123. #define DP_MCS_LENGTH (6*MAX_MCS)
  124. #define DP_NSS_LENGTH (6*SS_COUNT)
  125. #define DP_MU_GROUP_SHOW 16
  126. #define DP_MU_GROUP_LENGTH (6 * DP_MU_GROUP_SHOW)
  127. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  128. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  129. #define DP_MAX_MCS_STRING_LEN 30
  130. #define DP_CURR_FW_STATS_AVAIL 19
  131. #define DP_HTT_DBG_EXT_STATS_MAX 256
  132. #define DP_MAX_SLEEP_TIME 100
  133. #ifndef QCA_WIFI_3_0_EMU
  134. #define SUSPEND_DRAIN_WAIT 500
  135. #else
  136. #define SUSPEND_DRAIN_WAIT 3000
  137. #endif
  138. #ifdef IPA_OFFLOAD
  139. /* Exclude IPA rings from the interrupt context */
  140. #define TX_RING_MASK_VAL 0xb
  141. #define RX_RING_MASK_VAL 0x7
  142. #else
  143. #define TX_RING_MASK_VAL 0xF
  144. #define RX_RING_MASK_VAL 0xF
  145. #endif
  146. #define STR_MAXLEN 64
  147. #define RNG_ERR "SRNG setup failed for"
  148. /* Threshold for peer's cached buf queue beyond which frames are dropped */
  149. #define DP_RX_CACHED_BUFQ_THRESH 64
  150. /**
  151. * default_dscp_tid_map - Default DSCP-TID mapping
  152. *
  153. * DSCP TID
  154. * 000000 0
  155. * 001000 1
  156. * 010000 2
  157. * 011000 3
  158. * 100000 4
  159. * 101000 5
  160. * 110000 6
  161. * 111000 7
  162. */
  163. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  164. 0, 0, 0, 0, 0, 0, 0, 0,
  165. 1, 1, 1, 1, 1, 1, 1, 1,
  166. 2, 2, 2, 2, 2, 2, 2, 2,
  167. 3, 3, 3, 3, 3, 3, 3, 3,
  168. 4, 4, 4, 4, 4, 4, 4, 4,
  169. 5, 5, 5, 5, 5, 5, 5, 5,
  170. 6, 6, 6, 6, 6, 6, 6, 6,
  171. 7, 7, 7, 7, 7, 7, 7, 7,
  172. };
  173. /**
  174. * default_pcp_tid_map - Default PCP-TID mapping
  175. *
  176. * PCP TID
  177. * 000 0
  178. * 001 1
  179. * 010 2
  180. * 011 3
  181. * 100 4
  182. * 101 5
  183. * 110 6
  184. * 111 7
  185. */
  186. static uint8_t default_pcp_tid_map[PCP_TID_MAP_MAX] = {
  187. 0, 1, 2, 3, 4, 5, 6, 7,
  188. };
  189. /*
  190. * struct dp_rate_debug
  191. *
  192. * @mcs_type: print string for a given mcs
  193. * @valid: valid mcs rate?
  194. */
  195. struct dp_rate_debug {
  196. char mcs_type[DP_MAX_MCS_STRING_LEN];
  197. uint8_t valid;
  198. };
  199. #define MCS_VALID 1
  200. #define MCS_INVALID 0
  201. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  202. {
  203. {"OFDM 48 Mbps", MCS_VALID},
  204. {"OFDM 24 Mbps", MCS_VALID},
  205. {"OFDM 12 Mbps", MCS_VALID},
  206. {"OFDM 6 Mbps ", MCS_VALID},
  207. {"OFDM 54 Mbps", MCS_VALID},
  208. {"OFDM 36 Mbps", MCS_VALID},
  209. {"OFDM 18 Mbps", MCS_VALID},
  210. {"OFDM 9 Mbps ", MCS_VALID},
  211. {"INVALID ", MCS_INVALID},
  212. {"INVALID ", MCS_INVALID},
  213. {"INVALID ", MCS_INVALID},
  214. {"INVALID ", MCS_INVALID},
  215. {"INVALID ", MCS_VALID},
  216. },
  217. {
  218. {"CCK 11 Mbps Long ", MCS_VALID},
  219. {"CCK 5.5 Mbps Long ", MCS_VALID},
  220. {"CCK 2 Mbps Long ", MCS_VALID},
  221. {"CCK 1 Mbps Long ", MCS_VALID},
  222. {"CCK 11 Mbps Short ", MCS_VALID},
  223. {"CCK 5.5 Mbps Short", MCS_VALID},
  224. {"CCK 2 Mbps Short ", MCS_VALID},
  225. {"INVALID ", MCS_INVALID},
  226. {"INVALID ", MCS_INVALID},
  227. {"INVALID ", MCS_INVALID},
  228. {"INVALID ", MCS_INVALID},
  229. {"INVALID ", MCS_INVALID},
  230. {"INVALID ", MCS_VALID},
  231. },
  232. {
  233. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  234. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  235. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  236. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  237. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  238. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  239. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  240. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  241. {"INVALID ", MCS_INVALID},
  242. {"INVALID ", MCS_INVALID},
  243. {"INVALID ", MCS_INVALID},
  244. {"INVALID ", MCS_INVALID},
  245. {"INVALID ", MCS_VALID},
  246. },
  247. {
  248. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  249. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  250. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  251. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  252. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  253. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  254. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  255. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  256. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  257. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  258. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  259. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  260. {"INVALID ", MCS_VALID},
  261. },
  262. {
  263. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  264. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  265. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  266. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  267. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  268. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  269. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  270. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  271. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  272. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  273. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  274. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  275. {"INVALID ", MCS_VALID},
  276. }
  277. };
  278. /**
  279. * @brief Cpu to tx ring map
  280. */
  281. #ifdef CONFIG_WIN
  282. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  283. uint8_t
  284. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  285. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  286. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  287. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  288. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  289. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3},
  290. {0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1}
  291. };
  292. #else
  293. static uint8_t
  294. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  295. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  296. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  297. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  298. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  299. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}
  300. };
  301. #endif
  302. #else
  303. static uint8_t
  304. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  305. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  306. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  307. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  308. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  309. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3}
  310. };
  311. #endif
  312. /**
  313. * @brief Select the type of statistics
  314. */
  315. enum dp_stats_type {
  316. STATS_FW = 0,
  317. STATS_HOST = 1,
  318. STATS_TYPE_MAX = 2,
  319. };
  320. /**
  321. * @brief General Firmware statistics options
  322. *
  323. */
  324. enum dp_fw_stats {
  325. TXRX_FW_STATS_INVALID = -1,
  326. };
  327. /**
  328. * dp_stats_mapping_table - Firmware and Host statistics
  329. * currently supported
  330. */
  331. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  332. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  333. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  334. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  335. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  336. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  337. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  338. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  339. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  340. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  341. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  342. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  343. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  344. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  345. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  346. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  347. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  348. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  349. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  350. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  351. /* Last ENUM for HTT FW STATS */
  352. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  353. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  354. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  355. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  356. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  357. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  358. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  359. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  360. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  361. {TXRX_FW_STATS_INVALID, TXRX_REO_QUEUE_STATS},
  362. {TXRX_FW_STATS_INVALID, TXRX_SOC_CFG_PARAMS},
  363. {TXRX_FW_STATS_INVALID, TXRX_PDEV_CFG_PARAMS},
  364. };
  365. /* MCL specific functions */
  366. #ifdef CONFIG_MCL
  367. /**
  368. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  369. * @soc: pointer to dp_soc handle
  370. * @intr_ctx_num: interrupt context number for which mon mask is needed
  371. *
  372. * For MCL, monitor mode rings are being processed in timer contexts (polled).
  373. * This function is returning 0, since in interrupt mode(softirq based RX),
  374. * we donot want to process monitor mode rings in a softirq.
  375. *
  376. * So, in case packet log is enabled for SAP/STA/P2P modes,
  377. * regular interrupt processing will not process monitor mode rings. It would be
  378. * done in a separate timer context.
  379. *
  380. * Return: 0
  381. */
  382. static inline
  383. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  384. {
  385. return 0;
  386. }
  387. /*
  388. * dp_service_mon_rings()- timer to reap monitor rings
  389. * reqd as we are not getting ppdu end interrupts
  390. * @arg: SoC Handle
  391. *
  392. * Return:
  393. *
  394. */
  395. static void dp_service_mon_rings(void *arg)
  396. {
  397. struct dp_soc *soc = (struct dp_soc *)arg;
  398. int ring = 0, work_done, mac_id;
  399. struct dp_pdev *pdev = NULL;
  400. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  401. pdev = soc->pdev_list[ring];
  402. if (!pdev)
  403. continue;
  404. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  405. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  406. pdev->pdev_id);
  407. work_done = dp_mon_process(soc, mac_for_pdev,
  408. QCA_NAPI_BUDGET);
  409. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  410. FL("Reaped %d descs from Monitor rings"),
  411. work_done);
  412. }
  413. }
  414. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  415. }
  416. #ifndef REMOVE_PKT_LOG
  417. /**
  418. * dp_pkt_log_init() - API to initialize packet log
  419. * @ppdev: physical device handle
  420. * @scn: HIF context
  421. *
  422. * Return: none
  423. */
  424. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  425. {
  426. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  427. if (handle->pkt_log_init) {
  428. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  429. "%s: Packet log not initialized", __func__);
  430. return;
  431. }
  432. pktlog_sethandle(&handle->pl_dev, scn);
  433. pktlog_set_callback_regtype(PKTLOG_DEFAULT_CALLBACK_REGISTRATION);
  434. if (pktlogmod_init(scn)) {
  435. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  436. "%s: pktlogmod_init failed", __func__);
  437. handle->pkt_log_init = false;
  438. } else {
  439. handle->pkt_log_init = true;
  440. }
  441. }
  442. /**
  443. * dp_pkt_log_con_service() - connect packet log service
  444. * @ppdev: physical device handle
  445. * @scn: device context
  446. *
  447. * Return: none
  448. */
  449. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  450. {
  451. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  452. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  453. pktlog_htc_attach();
  454. }
  455. /**
  456. * dp_get_num_rx_contexts() - get number of RX contexts
  457. * @soc_hdl: cdp opaque soc handle
  458. *
  459. * Return: number of RX contexts
  460. */
  461. static int dp_get_num_rx_contexts(struct cdp_soc_t *soc_hdl)
  462. {
  463. int i;
  464. int num_rx_contexts = 0;
  465. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  466. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  467. if (wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i))
  468. num_rx_contexts++;
  469. return num_rx_contexts;
  470. }
  471. /**
  472. * dp_pktlogmod_exit() - API to cleanup pktlog info
  473. * @handle: Pdev handle
  474. *
  475. * Return: none
  476. */
  477. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  478. {
  479. void *scn = (void *)handle->soc->hif_handle;
  480. if (!scn) {
  481. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  482. "%s: Invalid hif(scn) handle", __func__);
  483. return;
  484. }
  485. pktlogmod_exit(scn);
  486. handle->pkt_log_init = false;
  487. }
  488. #endif
  489. #else
  490. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  491. /**
  492. * dp_soc_get_mon_mask_for_interrupt_mode() - get mon mode mask for intr mode
  493. * @soc: pointer to dp_soc handle
  494. * @intr_ctx_num: interrupt context number for which mon mask is needed
  495. *
  496. * Return: mon mask value
  497. */
  498. static inline
  499. uint32_t dp_soc_get_mon_mask_for_interrupt_mode(struct dp_soc *soc, int intr_ctx_num)
  500. {
  501. return wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  502. }
  503. #endif
  504. /**
  505. * dp_get_dp_vdev_from_cdp_vdev() - get dp_vdev from cdp_vdev by type-casting
  506. * @cdp_opaque_vdev: pointer to cdp_vdev
  507. *
  508. * Return: pointer to dp_vdev
  509. */
  510. static
  511. struct dp_vdev *dp_get_dp_vdev_from_cdp_vdev(struct cdp_vdev *cdp_opaque_vdev)
  512. {
  513. return (struct dp_vdev *)cdp_opaque_vdev;
  514. }
  515. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  516. struct cdp_peer *peer_hdl,
  517. uint8_t *mac_addr,
  518. enum cdp_txrx_ast_entry_type type,
  519. uint32_t flags)
  520. {
  521. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  522. (struct dp_peer *)peer_hdl,
  523. mac_addr,
  524. type,
  525. flags);
  526. }
  527. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  528. struct cdp_peer *peer_hdl,
  529. uint8_t *wds_macaddr,
  530. uint32_t flags)
  531. {
  532. int status = -1;
  533. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  534. struct dp_ast_entry *ast_entry = NULL;
  535. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  536. qdf_spin_lock_bh(&soc->ast_lock);
  537. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, wds_macaddr,
  538. peer->vdev->pdev->pdev_id);
  539. if (ast_entry) {
  540. status = dp_peer_update_ast(soc,
  541. peer,
  542. ast_entry, flags);
  543. }
  544. qdf_spin_unlock_bh(&soc->ast_lock);
  545. return status;
  546. }
  547. /*
  548. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  549. * @soc_handle: Datapath SOC handle
  550. * @wds_macaddr: WDS entry MAC Address
  551. * Return: None
  552. */
  553. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  554. uint8_t *wds_macaddr,
  555. uint8_t *peer_mac_addr,
  556. void *vdev_handle)
  557. {
  558. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  559. struct dp_ast_entry *ast_entry = NULL;
  560. struct dp_ast_entry *tmp_ast_entry;
  561. struct dp_peer *peer;
  562. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  563. struct dp_pdev *pdev;
  564. if (!vdev)
  565. return;
  566. pdev = vdev->pdev;
  567. if (peer_mac_addr) {
  568. peer = dp_peer_find_hash_find(soc, peer_mac_addr,
  569. 0, vdev->vdev_id);
  570. if (!peer)
  571. return;
  572. qdf_spin_lock_bh(&soc->ast_lock);
  573. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, tmp_ast_entry) {
  574. if ((ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM) ||
  575. (ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM_SEC))
  576. dp_peer_del_ast(soc, ast_entry);
  577. }
  578. qdf_spin_unlock_bh(&soc->ast_lock);
  579. dp_peer_unref_delete(peer);
  580. } else if (wds_macaddr) {
  581. qdf_spin_lock_bh(&soc->ast_lock);
  582. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, wds_macaddr,
  583. pdev->pdev_id);
  584. if (ast_entry) {
  585. if ((ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM) ||
  586. (ast_entry->type == CDP_TXRX_AST_TYPE_WDS_HM_SEC))
  587. dp_peer_del_ast(soc, ast_entry);
  588. }
  589. qdf_spin_unlock_bh(&soc->ast_lock);
  590. }
  591. }
  592. /*
  593. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  594. * @soc: Datapath SOC handle
  595. *
  596. * Return: None
  597. */
  598. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  599. void *vdev_hdl)
  600. {
  601. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  602. struct dp_pdev *pdev;
  603. struct dp_vdev *vdev;
  604. struct dp_peer *peer;
  605. struct dp_ast_entry *ase, *temp_ase;
  606. int i;
  607. qdf_spin_lock_bh(&soc->ast_lock);
  608. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  609. pdev = soc->pdev_list[i];
  610. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  611. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  612. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  613. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  614. if ((ase->type ==
  615. CDP_TXRX_AST_TYPE_WDS_HM) ||
  616. (ase->type ==
  617. CDP_TXRX_AST_TYPE_WDS_HM_SEC))
  618. dp_peer_del_ast(soc, ase);
  619. }
  620. }
  621. }
  622. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  623. }
  624. qdf_spin_unlock_bh(&soc->ast_lock);
  625. }
  626. /*
  627. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  628. * @soc: Datapath SOC handle
  629. *
  630. * Return: None
  631. */
  632. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  633. {
  634. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  635. struct dp_pdev *pdev;
  636. struct dp_vdev *vdev;
  637. struct dp_peer *peer;
  638. struct dp_ast_entry *ase, *temp_ase;
  639. int i;
  640. qdf_spin_lock_bh(&soc->ast_lock);
  641. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  642. pdev = soc->pdev_list[i];
  643. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  644. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  645. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  646. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  647. if ((ase->type ==
  648. CDP_TXRX_AST_TYPE_STATIC) ||
  649. (ase->type ==
  650. CDP_TXRX_AST_TYPE_SELF) ||
  651. (ase->type ==
  652. CDP_TXRX_AST_TYPE_STA_BSS))
  653. continue;
  654. dp_peer_del_ast(soc, ase);
  655. }
  656. }
  657. }
  658. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  659. }
  660. qdf_spin_unlock_bh(&soc->ast_lock);
  661. }
  662. /**
  663. * dp_peer_get_ast_info_by_soc_wifi3() - search the soc AST hash table
  664. * and return ast entry information
  665. * of first ast entry found in the
  666. * table with given mac address
  667. *
  668. * @soc : data path soc handle
  669. * @ast_mac_addr : AST entry mac address
  670. * @ast_entry_info : ast entry information
  671. *
  672. * return : true if ast entry found with ast_mac_addr
  673. * false if ast entry not found
  674. */
  675. static bool dp_peer_get_ast_info_by_soc_wifi3
  676. (struct cdp_soc_t *soc_hdl,
  677. uint8_t *ast_mac_addr,
  678. struct cdp_ast_entry_info *ast_entry_info)
  679. {
  680. struct dp_ast_entry *ast_entry;
  681. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  682. qdf_spin_lock_bh(&soc->ast_lock);
  683. ast_entry = dp_peer_ast_hash_find_soc(soc, ast_mac_addr);
  684. if (!ast_entry || !ast_entry->peer) {
  685. qdf_spin_unlock_bh(&soc->ast_lock);
  686. return false;
  687. }
  688. if (ast_entry->delete_in_progress && !ast_entry->callback) {
  689. qdf_spin_unlock_bh(&soc->ast_lock);
  690. return false;
  691. }
  692. ast_entry_info->type = ast_entry->type;
  693. ast_entry_info->pdev_id = ast_entry->pdev_id;
  694. ast_entry_info->vdev_id = ast_entry->vdev_id;
  695. ast_entry_info->peer_id = ast_entry->peer->peer_ids[0];
  696. qdf_mem_copy(&ast_entry_info->peer_mac_addr[0],
  697. &ast_entry->peer->mac_addr.raw[0],
  698. QDF_MAC_ADDR_SIZE);
  699. qdf_spin_unlock_bh(&soc->ast_lock);
  700. return true;
  701. }
  702. /**
  703. * dp_peer_get_ast_info_by_pdevid_wifi3() - search the soc AST hash table
  704. * and return ast entry information
  705. * if mac address and pdev_id matches
  706. *
  707. * @soc : data path soc handle
  708. * @ast_mac_addr : AST entry mac address
  709. * @pdev_id : pdev_id
  710. * @ast_entry_info : ast entry information
  711. *
  712. * return : true if ast entry found with ast_mac_addr
  713. * false if ast entry not found
  714. */
  715. static bool dp_peer_get_ast_info_by_pdevid_wifi3
  716. (struct cdp_soc_t *soc_hdl,
  717. uint8_t *ast_mac_addr,
  718. uint8_t pdev_id,
  719. struct cdp_ast_entry_info *ast_entry_info)
  720. {
  721. struct dp_ast_entry *ast_entry;
  722. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  723. qdf_spin_lock_bh(&soc->ast_lock);
  724. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, ast_mac_addr, pdev_id);
  725. if (!ast_entry || !ast_entry->peer) {
  726. qdf_spin_unlock_bh(&soc->ast_lock);
  727. return false;
  728. }
  729. if (ast_entry->delete_in_progress && !ast_entry->callback) {
  730. qdf_spin_unlock_bh(&soc->ast_lock);
  731. return false;
  732. }
  733. ast_entry_info->type = ast_entry->type;
  734. ast_entry_info->pdev_id = ast_entry->pdev_id;
  735. ast_entry_info->vdev_id = ast_entry->vdev_id;
  736. ast_entry_info->peer_id = ast_entry->peer->peer_ids[0];
  737. qdf_mem_copy(&ast_entry_info->peer_mac_addr[0],
  738. &ast_entry->peer->mac_addr.raw[0],
  739. QDF_MAC_ADDR_SIZE);
  740. qdf_spin_unlock_bh(&soc->ast_lock);
  741. return true;
  742. }
  743. /**
  744. * dp_peer_ast_entry_del_by_soc() - delete the ast entry from soc AST hash table
  745. * with given mac address
  746. *
  747. * @soc : data path soc handle
  748. * @ast_mac_addr : AST entry mac address
  749. * @callback : callback function to called on ast delete response from FW
  750. * @cookie : argument to be passed to callback
  751. *
  752. * return : QDF_STATUS_SUCCESS if ast entry found with ast_mac_addr and delete
  753. * is sent
  754. * QDF_STATUS_E_INVAL false if ast entry not found
  755. */
  756. static QDF_STATUS dp_peer_ast_entry_del_by_soc(struct cdp_soc_t *soc_handle,
  757. uint8_t *mac_addr,
  758. txrx_ast_free_cb callback,
  759. void *cookie)
  760. {
  761. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  762. struct dp_ast_entry *ast_entry;
  763. txrx_ast_free_cb cb = NULL;
  764. void *arg = NULL;
  765. qdf_spin_lock_bh(&soc->ast_lock);
  766. ast_entry = dp_peer_ast_hash_find_soc(soc, mac_addr);
  767. if (!ast_entry) {
  768. qdf_spin_unlock_bh(&soc->ast_lock);
  769. return -QDF_STATUS_E_INVAL;
  770. }
  771. if (ast_entry->callback) {
  772. cb = ast_entry->callback;
  773. arg = ast_entry->cookie;
  774. }
  775. ast_entry->callback = callback;
  776. ast_entry->cookie = cookie;
  777. /*
  778. * if delete_in_progress is set AST delete is sent to target
  779. * and host is waiting for response should not send delete
  780. * again
  781. */
  782. if (!ast_entry->delete_in_progress)
  783. dp_peer_del_ast(soc, ast_entry);
  784. qdf_spin_unlock_bh(&soc->ast_lock);
  785. if (cb) {
  786. cb(soc->ctrl_psoc,
  787. soc,
  788. arg,
  789. CDP_TXRX_AST_DELETE_IN_PROGRESS);
  790. }
  791. return QDF_STATUS_SUCCESS;
  792. }
  793. /**
  794. * dp_peer_ast_entry_del_by_pdev() - delete the ast entry from soc AST hash
  795. * table if mac address and pdev_id matches
  796. *
  797. * @soc : data path soc handle
  798. * @ast_mac_addr : AST entry mac address
  799. * @pdev_id : pdev id
  800. * @callback : callback function to called on ast delete response from FW
  801. * @cookie : argument to be passed to callback
  802. *
  803. * return : QDF_STATUS_SUCCESS if ast entry found with ast_mac_addr and delete
  804. * is sent
  805. * QDF_STATUS_E_INVAL false if ast entry not found
  806. */
  807. static QDF_STATUS dp_peer_ast_entry_del_by_pdev(struct cdp_soc_t *soc_handle,
  808. uint8_t *mac_addr,
  809. uint8_t pdev_id,
  810. txrx_ast_free_cb callback,
  811. void *cookie)
  812. {
  813. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  814. struct dp_ast_entry *ast_entry;
  815. txrx_ast_free_cb cb = NULL;
  816. void *arg = NULL;
  817. qdf_spin_lock_bh(&soc->ast_lock);
  818. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, mac_addr, pdev_id);
  819. if (!ast_entry) {
  820. qdf_spin_unlock_bh(&soc->ast_lock);
  821. return -QDF_STATUS_E_INVAL;
  822. }
  823. if (ast_entry->callback) {
  824. cb = ast_entry->callback;
  825. arg = ast_entry->cookie;
  826. }
  827. ast_entry->callback = callback;
  828. ast_entry->cookie = cookie;
  829. /*
  830. * if delete_in_progress is set AST delete is sent to target
  831. * and host is waiting for response should not sent delete
  832. * again
  833. */
  834. if (!ast_entry->delete_in_progress)
  835. dp_peer_del_ast(soc, ast_entry);
  836. qdf_spin_unlock_bh(&soc->ast_lock);
  837. if (cb) {
  838. cb(soc->ctrl_psoc,
  839. soc,
  840. arg,
  841. CDP_TXRX_AST_DELETE_IN_PROGRESS);
  842. }
  843. return QDF_STATUS_SUCCESS;
  844. }
  845. /**
  846. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  847. * @ring_num: ring num of the ring being queried
  848. * @grp_mask: the grp_mask array for the ring type in question.
  849. *
  850. * The grp_mask array is indexed by group number and the bit fields correspond
  851. * to ring numbers. We are finding which interrupt group a ring belongs to.
  852. *
  853. * Return: the index in the grp_mask array with the ring number.
  854. * -QDF_STATUS_E_NOENT if no entry is found
  855. */
  856. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  857. {
  858. int ext_group_num;
  859. int mask = 1 << ring_num;
  860. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  861. ext_group_num++) {
  862. if (mask & grp_mask[ext_group_num])
  863. return ext_group_num;
  864. }
  865. return -QDF_STATUS_E_NOENT;
  866. }
  867. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  868. enum hal_ring_type ring_type,
  869. int ring_num)
  870. {
  871. int *grp_mask;
  872. switch (ring_type) {
  873. case WBM2SW_RELEASE:
  874. /* dp_tx_comp_handler - soc->tx_comp_ring */
  875. if (ring_num < 3)
  876. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  877. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  878. else if (ring_num == 3) {
  879. /* sw treats this as a separate ring type */
  880. grp_mask = &soc->wlan_cfg_ctx->
  881. int_rx_wbm_rel_ring_mask[0];
  882. ring_num = 0;
  883. } else {
  884. qdf_assert(0);
  885. return -QDF_STATUS_E_NOENT;
  886. }
  887. break;
  888. case REO_EXCEPTION:
  889. /* dp_rx_err_process - &soc->reo_exception_ring */
  890. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  891. break;
  892. case REO_DST:
  893. /* dp_rx_process - soc->reo_dest_ring */
  894. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  895. break;
  896. case REO_STATUS:
  897. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  898. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  899. break;
  900. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  901. case RXDMA_MONITOR_STATUS:
  902. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  903. case RXDMA_MONITOR_DST:
  904. /* dp_mon_process */
  905. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  906. break;
  907. case RXDMA_DST:
  908. /* dp_rxdma_err_process */
  909. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  910. break;
  911. case RXDMA_BUF:
  912. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  913. break;
  914. case RXDMA_MONITOR_BUF:
  915. /* TODO: support low_thresh interrupt */
  916. return -QDF_STATUS_E_NOENT;
  917. break;
  918. case TCL_DATA:
  919. case TCL_CMD:
  920. case REO_CMD:
  921. case SW2WBM_RELEASE:
  922. case WBM_IDLE_LINK:
  923. /* normally empty SW_TO_HW rings */
  924. return -QDF_STATUS_E_NOENT;
  925. break;
  926. case TCL_STATUS:
  927. case REO_REINJECT:
  928. /* misc unused rings */
  929. return -QDF_STATUS_E_NOENT;
  930. break;
  931. case CE_SRC:
  932. case CE_DST:
  933. case CE_DST_STATUS:
  934. /* CE_rings - currently handled by hif */
  935. default:
  936. return -QDF_STATUS_E_NOENT;
  937. break;
  938. }
  939. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  940. }
  941. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  942. *ring_params, int ring_type, int ring_num)
  943. {
  944. int msi_group_number;
  945. int msi_data_count;
  946. int ret;
  947. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  948. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  949. &msi_data_count, &msi_data_start,
  950. &msi_irq_start);
  951. if (ret)
  952. return;
  953. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  954. ring_num);
  955. if (msi_group_number < 0) {
  956. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  957. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  958. ring_type, ring_num);
  959. ring_params->msi_addr = 0;
  960. ring_params->msi_data = 0;
  961. return;
  962. }
  963. if (msi_group_number > msi_data_count) {
  964. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  965. FL("2 msi_groups will share an msi; msi_group_num %d"),
  966. msi_group_number);
  967. QDF_ASSERT(0);
  968. }
  969. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  970. ring_params->msi_addr = addr_low;
  971. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  972. ring_params->msi_data = (msi_group_number % msi_data_count)
  973. + msi_data_start;
  974. ring_params->flags |= HAL_SRNG_MSI_INTR;
  975. }
  976. /**
  977. * dp_print_ast_stats() - Dump AST table contents
  978. * @soc: Datapath soc handle
  979. *
  980. * return void
  981. */
  982. #ifdef FEATURE_AST
  983. void dp_print_ast_stats(struct dp_soc *soc)
  984. {
  985. uint8_t i;
  986. uint8_t num_entries = 0;
  987. struct dp_vdev *vdev;
  988. struct dp_pdev *pdev;
  989. struct dp_peer *peer;
  990. struct dp_ast_entry *ase, *tmp_ase;
  991. char type[CDP_TXRX_AST_TYPE_MAX][10] = {
  992. "NONE", "STATIC", "SELF", "WDS", "MEC", "HMWDS", "BSS",
  993. "DA", "HMWDS_SEC"};
  994. DP_PRINT_STATS("AST Stats:");
  995. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  996. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  997. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  998. DP_PRINT_STATS("AST Table:");
  999. qdf_spin_lock_bh(&soc->ast_lock);
  1000. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1001. pdev = soc->pdev_list[i];
  1002. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1003. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1004. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1005. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  1006. DP_PRINT_STATS("%6d mac_addr = %pM"
  1007. " peer_mac_addr = %pM"
  1008. " peer_id = %u"
  1009. " type = %s"
  1010. " next_hop = %d"
  1011. " is_active = %d"
  1012. " is_bss = %d"
  1013. " ast_idx = %d"
  1014. " ast_hash = %d"
  1015. " delete_in_progress = %d"
  1016. " pdev_id = %d"
  1017. " vdev_id = %d",
  1018. ++num_entries,
  1019. ase->mac_addr.raw,
  1020. ase->peer->mac_addr.raw,
  1021. ase->peer->peer_ids[0],
  1022. type[ase->type],
  1023. ase->next_hop,
  1024. ase->is_active,
  1025. ase->is_bss,
  1026. ase->ast_idx,
  1027. ase->ast_hash_value,
  1028. ase->delete_in_progress,
  1029. ase->pdev_id,
  1030. ase->vdev_id);
  1031. }
  1032. }
  1033. }
  1034. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1035. }
  1036. qdf_spin_unlock_bh(&soc->ast_lock);
  1037. }
  1038. #else
  1039. void dp_print_ast_stats(struct dp_soc *soc)
  1040. {
  1041. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  1042. return;
  1043. }
  1044. #endif
  1045. /**
  1046. * dp_print_peer_table() - Dump all Peer stats
  1047. * @vdev: Datapath Vdev handle
  1048. *
  1049. * return void
  1050. */
  1051. static void dp_print_peer_table(struct dp_vdev *vdev)
  1052. {
  1053. struct dp_peer *peer = NULL;
  1054. DP_PRINT_STATS("Dumping Peer Table Stats:");
  1055. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1056. if (!peer) {
  1057. DP_PRINT_STATS("Invalid Peer");
  1058. return;
  1059. }
  1060. DP_PRINT_STATS(" peer_mac_addr = %pM"
  1061. " nawds_enabled = %d"
  1062. " bss_peer = %d"
  1063. " wapi = %d"
  1064. " wds_enabled = %d"
  1065. " delete in progress = %d"
  1066. " peer id = %d",
  1067. peer->mac_addr.raw,
  1068. peer->nawds_enabled,
  1069. peer->bss_peer,
  1070. peer->wapi,
  1071. peer->wds_enabled,
  1072. peer->delete_in_progress,
  1073. peer->peer_ids[0]);
  1074. }
  1075. }
  1076. /*
  1077. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  1078. */
  1079. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  1080. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  1081. {
  1082. void *hal_soc = soc->hal_soc;
  1083. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  1084. /* TODO: See if we should get align size from hal */
  1085. uint32_t ring_base_align = 8;
  1086. struct hal_srng_params ring_params;
  1087. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  1088. /* TODO: Currently hal layer takes care of endianness related settings.
  1089. * See if these settings need to passed from DP layer
  1090. */
  1091. ring_params.flags = 0;
  1092. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  1093. srng->hal_srng = NULL;
  1094. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  1095. srng->num_entries = num_entries;
  1096. if (!dp_is_soc_reinit(soc)) {
  1097. srng->base_vaddr_unaligned =
  1098. qdf_mem_alloc_consistent(soc->osdev,
  1099. soc->osdev->dev,
  1100. srng->alloc_size,
  1101. &srng->base_paddr_unaligned);
  1102. }
  1103. if (!srng->base_vaddr_unaligned) {
  1104. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1105. FL("alloc failed - ring_type: %d, ring_num %d"),
  1106. ring_type, ring_num);
  1107. return QDF_STATUS_E_NOMEM;
  1108. }
  1109. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  1110. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  1111. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  1112. ((unsigned long)(ring_params.ring_base_vaddr) -
  1113. (unsigned long)srng->base_vaddr_unaligned);
  1114. ring_params.num_entries = num_entries;
  1115. dp_verbose_debug("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u",
  1116. ring_type, ring_num,
  1117. (void *)ring_params.ring_base_vaddr,
  1118. (void *)ring_params.ring_base_paddr,
  1119. ring_params.num_entries);
  1120. if (soc->intr_mode == DP_INTR_MSI) {
  1121. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  1122. dp_verbose_debug("Using MSI for ring_type: %d, ring_num %d",
  1123. ring_type, ring_num);
  1124. } else {
  1125. ring_params.msi_data = 0;
  1126. ring_params.msi_addr = 0;
  1127. dp_verbose_debug("Skipping MSI for ring_type: %d, ring_num %d",
  1128. ring_type, ring_num);
  1129. }
  1130. /*
  1131. * Setup interrupt timer and batch counter thresholds for
  1132. * interrupt mitigation based on ring type
  1133. */
  1134. if (ring_type == REO_DST) {
  1135. ring_params.intr_timer_thres_us =
  1136. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  1137. ring_params.intr_batch_cntr_thres_entries =
  1138. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  1139. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  1140. ring_params.intr_timer_thres_us =
  1141. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  1142. ring_params.intr_batch_cntr_thres_entries =
  1143. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  1144. } else {
  1145. ring_params.intr_timer_thres_us =
  1146. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  1147. ring_params.intr_batch_cntr_thres_entries =
  1148. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  1149. }
  1150. /* Enable low threshold interrupts for rx buffer rings (regular and
  1151. * monitor buffer rings.
  1152. * TODO: See if this is required for any other ring
  1153. */
  1154. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  1155. (ring_type == RXDMA_MONITOR_STATUS)) {
  1156. /* TODO: Setting low threshold to 1/8th of ring size
  1157. * see if this needs to be configurable
  1158. */
  1159. ring_params.low_threshold = num_entries >> 3;
  1160. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  1161. ring_params.intr_timer_thres_us =
  1162. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  1163. ring_params.intr_batch_cntr_thres_entries = 0;
  1164. }
  1165. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  1166. mac_id, &ring_params);
  1167. if (!srng->hal_srng) {
  1168. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1169. srng->alloc_size,
  1170. srng->base_vaddr_unaligned,
  1171. srng->base_paddr_unaligned, 0);
  1172. }
  1173. return 0;
  1174. }
  1175. /*
  1176. * dp_srng_deinit() - Internal function to deinit SRNG rings used by data path
  1177. * @soc: DP SOC handle
  1178. * @srng: source ring structure
  1179. * @ring_type: type of ring
  1180. * @ring_num: ring number
  1181. *
  1182. * Return: None
  1183. */
  1184. static void dp_srng_deinit(struct dp_soc *soc, struct dp_srng *srng,
  1185. int ring_type, int ring_num)
  1186. {
  1187. if (!srng->hal_srng) {
  1188. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1189. FL("Ring type: %d, num:%d not setup"),
  1190. ring_type, ring_num);
  1191. return;
  1192. }
  1193. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  1194. srng->hal_srng = NULL;
  1195. }
  1196. /**
  1197. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  1198. * Any buffers allocated and attached to ring entries are expected to be freed
  1199. * before calling this function.
  1200. */
  1201. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  1202. int ring_type, int ring_num)
  1203. {
  1204. if (!dp_is_soc_reinit(soc)) {
  1205. if (!srng->hal_srng && (srng->alloc_size == 0)) {
  1206. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1207. FL("Ring type: %d, num:%d not setup"),
  1208. ring_type, ring_num);
  1209. return;
  1210. }
  1211. if (srng->hal_srng) {
  1212. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  1213. srng->hal_srng = NULL;
  1214. }
  1215. }
  1216. if (srng->alloc_size) {
  1217. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1218. srng->alloc_size,
  1219. srng->base_vaddr_unaligned,
  1220. srng->base_paddr_unaligned, 0);
  1221. srng->alloc_size = 0;
  1222. }
  1223. }
  1224. /* TODO: Need this interface from HIF */
  1225. void *hif_get_hal_handle(void *hif_handle);
  1226. /*
  1227. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  1228. * @dp_ctx: DP SOC handle
  1229. * @budget: Number of frames/descriptors that can be processed in one shot
  1230. *
  1231. * Return: remaining budget/quota for the soc device
  1232. */
  1233. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  1234. {
  1235. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  1236. struct dp_soc *soc = int_ctx->soc;
  1237. int ring = 0;
  1238. uint32_t work_done = 0;
  1239. int budget = dp_budget;
  1240. uint8_t tx_mask = int_ctx->tx_ring_mask;
  1241. uint8_t rx_mask = int_ctx->rx_ring_mask;
  1242. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  1243. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  1244. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  1245. uint32_t remaining_quota = dp_budget;
  1246. struct dp_pdev *pdev = NULL;
  1247. int mac_id;
  1248. /* Process Tx completion interrupts first to return back buffers */
  1249. while (tx_mask) {
  1250. if (tx_mask & 0x1) {
  1251. work_done = dp_tx_comp_handler(soc,
  1252. soc->tx_comp_ring[ring].hal_srng,
  1253. remaining_quota);
  1254. dp_verbose_debug("tx mask 0x%x ring %d, budget %d, work_done %d",
  1255. tx_mask, ring, budget, work_done);
  1256. budget -= work_done;
  1257. if (budget <= 0)
  1258. goto budget_done;
  1259. remaining_quota = budget;
  1260. }
  1261. tx_mask = tx_mask >> 1;
  1262. ring++;
  1263. }
  1264. /* Process REO Exception ring interrupt */
  1265. if (rx_err_mask) {
  1266. work_done = dp_rx_err_process(soc,
  1267. soc->reo_exception_ring.hal_srng,
  1268. remaining_quota);
  1269. dp_verbose_debug("REO Exception Ring: work_done %d budget %d",
  1270. work_done, budget);
  1271. budget -= work_done;
  1272. if (budget <= 0) {
  1273. goto budget_done;
  1274. }
  1275. remaining_quota = budget;
  1276. }
  1277. /* Process Rx WBM release ring interrupt */
  1278. if (rx_wbm_rel_mask) {
  1279. work_done = dp_rx_wbm_err_process(soc,
  1280. soc->rx_rel_ring.hal_srng, remaining_quota);
  1281. dp_verbose_debug("WBM Release Ring: work_done %d budget %d",
  1282. work_done, budget);
  1283. budget -= work_done;
  1284. if (budget <= 0) {
  1285. goto budget_done;
  1286. }
  1287. remaining_quota = budget;
  1288. }
  1289. /* Process Rx interrupts */
  1290. if (rx_mask) {
  1291. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1292. if (rx_mask & (1 << ring)) {
  1293. work_done = dp_rx_process(int_ctx,
  1294. soc->reo_dest_ring[ring].hal_srng,
  1295. ring,
  1296. remaining_quota);
  1297. dp_verbose_debug("rx mask 0x%x ring %d, work_done %d budget %d",
  1298. rx_mask, ring,
  1299. work_done, budget);
  1300. budget -= work_done;
  1301. if (budget <= 0)
  1302. goto budget_done;
  1303. remaining_quota = budget;
  1304. }
  1305. }
  1306. }
  1307. if (reo_status_mask)
  1308. dp_reo_status_ring_handler(soc);
  1309. /* Process LMAC interrupts */
  1310. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  1311. pdev = soc->pdev_list[ring];
  1312. if (!pdev)
  1313. continue;
  1314. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1315. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  1316. pdev->pdev_id);
  1317. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  1318. work_done = dp_mon_process(soc, mac_for_pdev,
  1319. remaining_quota);
  1320. budget -= work_done;
  1321. if (budget <= 0)
  1322. goto budget_done;
  1323. remaining_quota = budget;
  1324. }
  1325. if (int_ctx->rxdma2host_ring_mask &
  1326. (1 << mac_for_pdev)) {
  1327. work_done = dp_rxdma_err_process(soc,
  1328. mac_for_pdev,
  1329. remaining_quota);
  1330. budget -= work_done;
  1331. if (budget <= 0)
  1332. goto budget_done;
  1333. remaining_quota = budget;
  1334. }
  1335. if (int_ctx->host2rxdma_ring_mask &
  1336. (1 << mac_for_pdev)) {
  1337. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1338. union dp_rx_desc_list_elem_t *tail = NULL;
  1339. struct dp_srng *rx_refill_buf_ring =
  1340. &pdev->rx_refill_buf_ring;
  1341. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  1342. 1);
  1343. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1344. rx_refill_buf_ring,
  1345. &soc->rx_desc_buf[mac_for_pdev], 0,
  1346. &desc_list, &tail);
  1347. }
  1348. }
  1349. }
  1350. qdf_lro_flush(int_ctx->lro_ctx);
  1351. budget_done:
  1352. return dp_budget - budget;
  1353. }
  1354. /* dp_interrupt_timer()- timer poll for interrupts
  1355. *
  1356. * @arg: SoC Handle
  1357. *
  1358. * Return:
  1359. *
  1360. */
  1361. static void dp_interrupt_timer(void *arg)
  1362. {
  1363. struct dp_soc *soc = (struct dp_soc *) arg;
  1364. int i;
  1365. if (qdf_atomic_read(&soc->cmn_init_done)) {
  1366. for (i = 0;
  1367. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  1368. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  1369. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1370. }
  1371. }
  1372. /*
  1373. * dp_soc_attach_poll() - Register handlers for DP interrupts
  1374. * @txrx_soc: DP SOC handle
  1375. *
  1376. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1377. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1378. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1379. *
  1380. * Return: 0 for success, nonzero for failure.
  1381. */
  1382. static QDF_STATUS dp_soc_attach_poll(void *txrx_soc)
  1383. {
  1384. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1385. int i;
  1386. soc->intr_mode = DP_INTR_POLL;
  1387. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1388. soc->intr_ctx[i].dp_intr_id = i;
  1389. soc->intr_ctx[i].tx_ring_mask =
  1390. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1391. soc->intr_ctx[i].rx_ring_mask =
  1392. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1393. soc->intr_ctx[i].rx_mon_ring_mask =
  1394. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1395. soc->intr_ctx[i].rx_err_ring_mask =
  1396. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1397. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  1398. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1399. soc->intr_ctx[i].reo_status_ring_mask =
  1400. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1401. soc->intr_ctx[i].rxdma2host_ring_mask =
  1402. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1403. soc->intr_ctx[i].soc = soc;
  1404. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1405. }
  1406. qdf_timer_init(soc->osdev, &soc->int_timer,
  1407. dp_interrupt_timer, (void *)soc,
  1408. QDF_TIMER_TYPE_WAKE_APPS);
  1409. return QDF_STATUS_SUCCESS;
  1410. }
  1411. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  1412. #if defined(CONFIG_MCL)
  1413. /*
  1414. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  1415. * @txrx_soc: DP SOC handle
  1416. *
  1417. * Call the appropriate attach function based on the mode of operation.
  1418. * This is a WAR for enabling monitor mode.
  1419. *
  1420. * Return: 0 for success. nonzero for failure.
  1421. */
  1422. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1423. {
  1424. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1425. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  1426. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  1427. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1428. "%s: Poll mode", __func__);
  1429. return dp_soc_attach_poll(txrx_soc);
  1430. } else {
  1431. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1432. "%s: Interrupt mode", __func__);
  1433. return dp_soc_interrupt_attach(txrx_soc);
  1434. }
  1435. }
  1436. #else
  1437. #if defined(DP_INTR_POLL_BASED) && DP_INTR_POLL_BASED
  1438. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1439. {
  1440. return dp_soc_attach_poll(txrx_soc);
  1441. }
  1442. #else
  1443. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  1444. {
  1445. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1446. if (hif_is_polled_mode_enabled(soc->hif_handle))
  1447. return dp_soc_attach_poll(txrx_soc);
  1448. else
  1449. return dp_soc_interrupt_attach(txrx_soc);
  1450. }
  1451. #endif
  1452. #endif
  1453. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  1454. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  1455. {
  1456. int j;
  1457. int num_irq = 0;
  1458. int tx_mask =
  1459. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1460. int rx_mask =
  1461. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1462. int rx_mon_mask =
  1463. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1464. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1465. soc->wlan_cfg_ctx, intr_ctx_num);
  1466. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1467. soc->wlan_cfg_ctx, intr_ctx_num);
  1468. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1469. soc->wlan_cfg_ctx, intr_ctx_num);
  1470. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1471. soc->wlan_cfg_ctx, intr_ctx_num);
  1472. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1473. soc->wlan_cfg_ctx, intr_ctx_num);
  1474. int host2rxdma_mon_ring_mask = wlan_cfg_get_host2rxdma_mon_ring_mask(
  1475. soc->wlan_cfg_ctx, intr_ctx_num);
  1476. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1477. if (tx_mask & (1 << j)) {
  1478. irq_id_map[num_irq++] =
  1479. (wbm2host_tx_completions_ring1 - j);
  1480. }
  1481. if (rx_mask & (1 << j)) {
  1482. irq_id_map[num_irq++] =
  1483. (reo2host_destination_ring1 - j);
  1484. }
  1485. if (rxdma2host_ring_mask & (1 << j)) {
  1486. irq_id_map[num_irq++] =
  1487. rxdma2host_destination_ring_mac1 -
  1488. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1489. }
  1490. if (host2rxdma_ring_mask & (1 << j)) {
  1491. irq_id_map[num_irq++] =
  1492. host2rxdma_host_buf_ring_mac1 -
  1493. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1494. }
  1495. if (host2rxdma_mon_ring_mask & (1 << j)) {
  1496. irq_id_map[num_irq++] =
  1497. host2rxdma_monitor_ring1 -
  1498. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1499. }
  1500. if (rx_mon_mask & (1 << j)) {
  1501. irq_id_map[num_irq++] =
  1502. ppdu_end_interrupts_mac1 -
  1503. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1504. irq_id_map[num_irq++] =
  1505. rxdma2host_monitor_status_ring_mac1 -
  1506. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1507. }
  1508. if (rx_wbm_rel_ring_mask & (1 << j))
  1509. irq_id_map[num_irq++] = wbm2host_rx_release;
  1510. if (rx_err_ring_mask & (1 << j))
  1511. irq_id_map[num_irq++] = reo2host_exception;
  1512. if (reo_status_ring_mask & (1 << j))
  1513. irq_id_map[num_irq++] = reo2host_status;
  1514. }
  1515. *num_irq_r = num_irq;
  1516. }
  1517. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1518. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1519. int msi_vector_count, int msi_vector_start)
  1520. {
  1521. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1522. soc->wlan_cfg_ctx, intr_ctx_num);
  1523. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1524. soc->wlan_cfg_ctx, intr_ctx_num);
  1525. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1526. soc->wlan_cfg_ctx, intr_ctx_num);
  1527. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1528. soc->wlan_cfg_ctx, intr_ctx_num);
  1529. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1530. soc->wlan_cfg_ctx, intr_ctx_num);
  1531. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1532. soc->wlan_cfg_ctx, intr_ctx_num);
  1533. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1534. soc->wlan_cfg_ctx, intr_ctx_num);
  1535. unsigned int vector =
  1536. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1537. int num_irq = 0;
  1538. soc->intr_mode = DP_INTR_MSI;
  1539. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1540. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1541. irq_id_map[num_irq++] =
  1542. pld_get_msi_irq(soc->osdev->dev, vector);
  1543. *num_irq_r = num_irq;
  1544. }
  1545. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1546. int *irq_id_map, int *num_irq)
  1547. {
  1548. int msi_vector_count, ret;
  1549. uint32_t msi_base_data, msi_vector_start;
  1550. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1551. &msi_vector_count,
  1552. &msi_base_data,
  1553. &msi_vector_start);
  1554. if (ret)
  1555. return dp_soc_interrupt_map_calculate_integrated(soc,
  1556. intr_ctx_num, irq_id_map, num_irq);
  1557. else
  1558. dp_soc_interrupt_map_calculate_msi(soc,
  1559. intr_ctx_num, irq_id_map, num_irq,
  1560. msi_vector_count, msi_vector_start);
  1561. }
  1562. /*
  1563. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1564. * @txrx_soc: DP SOC handle
  1565. *
  1566. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1567. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1568. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1569. *
  1570. * Return: 0 for success. nonzero for failure.
  1571. */
  1572. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1573. {
  1574. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1575. int i = 0;
  1576. int num_irq = 0;
  1577. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1578. int ret = 0;
  1579. /* Map of IRQ ids registered with one interrupt context */
  1580. int irq_id_map[HIF_MAX_GRP_IRQ];
  1581. int tx_mask =
  1582. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1583. int rx_mask =
  1584. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1585. int rx_mon_mask =
  1586. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  1587. int rx_err_ring_mask =
  1588. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1589. int rx_wbm_rel_ring_mask =
  1590. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1591. int reo_status_ring_mask =
  1592. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1593. int rxdma2host_ring_mask =
  1594. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1595. int host2rxdma_ring_mask =
  1596. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1597. int host2rxdma_mon_ring_mask =
  1598. wlan_cfg_get_host2rxdma_mon_ring_mask(
  1599. soc->wlan_cfg_ctx, i);
  1600. soc->intr_ctx[i].dp_intr_id = i;
  1601. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1602. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1603. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1604. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1605. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1606. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1607. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1608. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1609. soc->intr_ctx[i].host2rxdma_mon_ring_mask =
  1610. host2rxdma_mon_ring_mask;
  1611. soc->intr_ctx[i].soc = soc;
  1612. num_irq = 0;
  1613. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1614. &num_irq);
  1615. ret = hif_register_ext_group(soc->hif_handle,
  1616. num_irq, irq_id_map, dp_service_srngs,
  1617. &soc->intr_ctx[i], "dp_intr",
  1618. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1619. if (ret) {
  1620. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1621. FL("failed, ret = %d"), ret);
  1622. return QDF_STATUS_E_FAILURE;
  1623. }
  1624. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1625. }
  1626. hif_configure_ext_group_interrupts(soc->hif_handle);
  1627. return QDF_STATUS_SUCCESS;
  1628. }
  1629. /*
  1630. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1631. * @txrx_soc: DP SOC handle
  1632. *
  1633. * Return: void
  1634. */
  1635. static void dp_soc_interrupt_detach(void *txrx_soc)
  1636. {
  1637. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1638. int i;
  1639. if (soc->intr_mode == DP_INTR_POLL) {
  1640. qdf_timer_stop(&soc->int_timer);
  1641. qdf_timer_free(&soc->int_timer);
  1642. } else {
  1643. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1644. }
  1645. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1646. soc->intr_ctx[i].tx_ring_mask = 0;
  1647. soc->intr_ctx[i].rx_ring_mask = 0;
  1648. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1649. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1650. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1651. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1652. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1653. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1654. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  1655. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1656. }
  1657. }
  1658. #define AVG_MAX_MPDUS_PER_TID 128
  1659. #define AVG_TIDS_PER_CLIENT 2
  1660. #define AVG_FLOWS_PER_TID 2
  1661. #define AVG_MSDUS_PER_FLOW 128
  1662. #define AVG_MSDUS_PER_MPDU 4
  1663. /*
  1664. * Allocate and setup link descriptor pool that will be used by HW for
  1665. * various link and queue descriptors and managed by WBM
  1666. */
  1667. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1668. {
  1669. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1670. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1671. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1672. uint32_t num_mpdus_per_link_desc =
  1673. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1674. uint32_t num_msdus_per_link_desc =
  1675. hal_num_msdus_per_link_desc(soc->hal_soc);
  1676. uint32_t num_mpdu_links_per_queue_desc =
  1677. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1678. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1679. uint32_t total_link_descs, total_mem_size;
  1680. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1681. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1682. uint32_t num_link_desc_banks;
  1683. uint32_t last_bank_size = 0;
  1684. uint32_t entry_size, num_entries;
  1685. int i;
  1686. uint32_t desc_id = 0;
  1687. qdf_dma_addr_t *baseaddr = NULL;
  1688. /* Only Tx queue descriptors are allocated from common link descriptor
  1689. * pool Rx queue descriptors are not included in this because (REO queue
  1690. * extension descriptors) they are expected to be allocated contiguously
  1691. * with REO queue descriptors
  1692. */
  1693. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1694. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1695. num_mpdu_queue_descs = num_mpdu_link_descs /
  1696. num_mpdu_links_per_queue_desc;
  1697. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1698. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1699. num_msdus_per_link_desc;
  1700. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1701. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1702. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1703. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1704. /* Round up to power of 2 */
  1705. total_link_descs = 1;
  1706. while (total_link_descs < num_entries)
  1707. total_link_descs <<= 1;
  1708. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1709. FL("total_link_descs: %u, link_desc_size: %d"),
  1710. total_link_descs, link_desc_size);
  1711. total_mem_size = total_link_descs * link_desc_size;
  1712. total_mem_size += link_desc_align;
  1713. if (total_mem_size <= max_alloc_size) {
  1714. num_link_desc_banks = 0;
  1715. last_bank_size = total_mem_size;
  1716. } else {
  1717. num_link_desc_banks = (total_mem_size) /
  1718. (max_alloc_size - link_desc_align);
  1719. last_bank_size = total_mem_size %
  1720. (max_alloc_size - link_desc_align);
  1721. }
  1722. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1723. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1724. total_mem_size, num_link_desc_banks);
  1725. for (i = 0; i < num_link_desc_banks; i++) {
  1726. if (!dp_is_soc_reinit(soc)) {
  1727. baseaddr = &soc->link_desc_banks[i].
  1728. base_paddr_unaligned;
  1729. soc->link_desc_banks[i].base_vaddr_unaligned =
  1730. qdf_mem_alloc_consistent(soc->osdev,
  1731. soc->osdev->dev,
  1732. max_alloc_size,
  1733. baseaddr);
  1734. }
  1735. soc->link_desc_banks[i].size = max_alloc_size;
  1736. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1737. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1738. ((unsigned long)(
  1739. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1740. link_desc_align));
  1741. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1742. soc->link_desc_banks[i].base_paddr_unaligned) +
  1743. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1744. (unsigned long)(
  1745. soc->link_desc_banks[i].base_vaddr_unaligned));
  1746. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1747. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1748. FL("Link descriptor memory alloc failed"));
  1749. goto fail;
  1750. }
  1751. }
  1752. if (last_bank_size) {
  1753. /* Allocate last bank in case total memory required is not exact
  1754. * multiple of max_alloc_size
  1755. */
  1756. if (!dp_is_soc_reinit(soc)) {
  1757. baseaddr = &soc->link_desc_banks[i].
  1758. base_paddr_unaligned;
  1759. soc->link_desc_banks[i].base_vaddr_unaligned =
  1760. qdf_mem_alloc_consistent(soc->osdev,
  1761. soc->osdev->dev,
  1762. last_bank_size,
  1763. baseaddr);
  1764. }
  1765. soc->link_desc_banks[i].size = last_bank_size;
  1766. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1767. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1768. ((unsigned long)(
  1769. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1770. link_desc_align));
  1771. soc->link_desc_banks[i].base_paddr =
  1772. (unsigned long)(
  1773. soc->link_desc_banks[i].base_paddr_unaligned) +
  1774. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1775. (unsigned long)(
  1776. soc->link_desc_banks[i].base_vaddr_unaligned));
  1777. }
  1778. /* Allocate and setup link descriptor idle list for HW internal use */
  1779. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1780. total_mem_size = entry_size * total_link_descs;
  1781. if (total_mem_size <= max_alloc_size) {
  1782. void *desc;
  1783. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1784. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1785. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1786. FL("Link desc idle ring setup failed"));
  1787. goto fail;
  1788. }
  1789. hal_srng_access_start_unlocked(soc->hal_soc,
  1790. soc->wbm_idle_link_ring.hal_srng);
  1791. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1792. soc->link_desc_banks[i].base_paddr; i++) {
  1793. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1794. ((unsigned long)(
  1795. soc->link_desc_banks[i].base_vaddr) -
  1796. (unsigned long)(
  1797. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1798. / link_desc_size;
  1799. unsigned long paddr = (unsigned long)(
  1800. soc->link_desc_banks[i].base_paddr);
  1801. while (num_entries && (desc = hal_srng_src_get_next(
  1802. soc->hal_soc,
  1803. soc->wbm_idle_link_ring.hal_srng))) {
  1804. hal_set_link_desc_addr(desc,
  1805. LINK_DESC_COOKIE(desc_id, i), paddr);
  1806. num_entries--;
  1807. desc_id++;
  1808. paddr += link_desc_size;
  1809. }
  1810. }
  1811. hal_srng_access_end_unlocked(soc->hal_soc,
  1812. soc->wbm_idle_link_ring.hal_srng);
  1813. } else {
  1814. uint32_t num_scatter_bufs;
  1815. uint32_t num_entries_per_buf;
  1816. uint32_t rem_entries;
  1817. uint8_t *scatter_buf_ptr;
  1818. uint16_t scatter_buf_num;
  1819. uint32_t buf_size = 0;
  1820. soc->wbm_idle_scatter_buf_size =
  1821. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1822. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1823. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1824. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1825. soc->hal_soc, total_mem_size,
  1826. soc->wbm_idle_scatter_buf_size);
  1827. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1828. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1829. FL("scatter bufs size out of bounds"));
  1830. goto fail;
  1831. }
  1832. for (i = 0; i < num_scatter_bufs; i++) {
  1833. baseaddr = &soc->wbm_idle_scatter_buf_base_paddr[i];
  1834. if (!dp_is_soc_reinit(soc)) {
  1835. buf_size = soc->wbm_idle_scatter_buf_size;
  1836. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1837. qdf_mem_alloc_consistent(soc->osdev,
  1838. soc->osdev->
  1839. dev,
  1840. buf_size,
  1841. baseaddr);
  1842. }
  1843. if (!soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1844. QDF_TRACE(QDF_MODULE_ID_DP,
  1845. QDF_TRACE_LEVEL_ERROR,
  1846. FL("Scatter lst memory alloc fail"));
  1847. goto fail;
  1848. }
  1849. }
  1850. /* Populate idle list scatter buffers with link descriptor
  1851. * pointers
  1852. */
  1853. scatter_buf_num = 0;
  1854. scatter_buf_ptr = (uint8_t *)(
  1855. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1856. rem_entries = num_entries_per_buf;
  1857. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1858. soc->link_desc_banks[i].base_paddr; i++) {
  1859. uint32_t num_link_descs =
  1860. (soc->link_desc_banks[i].size -
  1861. ((unsigned long)(
  1862. soc->link_desc_banks[i].base_vaddr) -
  1863. (unsigned long)(
  1864. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1865. / link_desc_size;
  1866. unsigned long paddr = (unsigned long)(
  1867. soc->link_desc_banks[i].base_paddr);
  1868. while (num_link_descs) {
  1869. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1870. LINK_DESC_COOKIE(desc_id, i), paddr);
  1871. num_link_descs--;
  1872. desc_id++;
  1873. paddr += link_desc_size;
  1874. rem_entries--;
  1875. if (rem_entries) {
  1876. scatter_buf_ptr += entry_size;
  1877. } else {
  1878. rem_entries = num_entries_per_buf;
  1879. scatter_buf_num++;
  1880. if (scatter_buf_num >= num_scatter_bufs)
  1881. break;
  1882. scatter_buf_ptr = (uint8_t *)(
  1883. soc->wbm_idle_scatter_buf_base_vaddr[
  1884. scatter_buf_num]);
  1885. }
  1886. }
  1887. }
  1888. /* Setup link descriptor idle list in HW */
  1889. hal_setup_link_idle_list(soc->hal_soc,
  1890. soc->wbm_idle_scatter_buf_base_paddr,
  1891. soc->wbm_idle_scatter_buf_base_vaddr,
  1892. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1893. (uint32_t)(scatter_buf_ptr -
  1894. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1895. scatter_buf_num-1])), total_link_descs);
  1896. }
  1897. return 0;
  1898. fail:
  1899. if (soc->wbm_idle_link_ring.hal_srng) {
  1900. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1901. WBM_IDLE_LINK, 0);
  1902. }
  1903. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1904. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1905. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1906. soc->wbm_idle_scatter_buf_size,
  1907. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1908. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1909. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1910. }
  1911. }
  1912. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1913. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1914. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1915. soc->link_desc_banks[i].size,
  1916. soc->link_desc_banks[i].base_vaddr_unaligned,
  1917. soc->link_desc_banks[i].base_paddr_unaligned,
  1918. 0);
  1919. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1920. }
  1921. }
  1922. return QDF_STATUS_E_FAILURE;
  1923. }
  1924. /*
  1925. * Free link descriptor pool that was setup HW
  1926. */
  1927. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1928. {
  1929. int i;
  1930. if (soc->wbm_idle_link_ring.hal_srng) {
  1931. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1932. WBM_IDLE_LINK, 0);
  1933. }
  1934. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1935. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1936. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1937. soc->wbm_idle_scatter_buf_size,
  1938. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1939. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1940. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1941. }
  1942. }
  1943. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1944. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1945. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1946. soc->link_desc_banks[i].size,
  1947. soc->link_desc_banks[i].base_vaddr_unaligned,
  1948. soc->link_desc_banks[i].base_paddr_unaligned,
  1949. 0);
  1950. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1951. }
  1952. }
  1953. }
  1954. #ifdef IPA_OFFLOAD
  1955. #define REO_DST_RING_SIZE_QCA6290 1023
  1956. #ifndef QCA_WIFI_QCA8074_VP
  1957. #define REO_DST_RING_SIZE_QCA8074 1023
  1958. #else
  1959. #define REO_DST_RING_SIZE_QCA8074 8
  1960. #endif /* QCA_WIFI_QCA8074_VP */
  1961. #else
  1962. #define REO_DST_RING_SIZE_QCA6290 1024
  1963. #ifndef QCA_WIFI_QCA8074_VP
  1964. #define REO_DST_RING_SIZE_QCA8074 2048
  1965. #else
  1966. #define REO_DST_RING_SIZE_QCA8074 8
  1967. #endif /* QCA_WIFI_QCA8074_VP */
  1968. #endif /* IPA_OFFLOAD */
  1969. /*
  1970. * dp_ast_aging_timer_fn() - Timer callback function for WDS aging
  1971. * @soc: Datapath SOC handle
  1972. *
  1973. * This is a timer function used to age out stale AST nodes from
  1974. * AST table
  1975. */
  1976. #ifdef FEATURE_WDS
  1977. static void dp_ast_aging_timer_fn(void *soc_hdl)
  1978. {
  1979. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1980. struct dp_pdev *pdev;
  1981. struct dp_vdev *vdev;
  1982. struct dp_peer *peer;
  1983. struct dp_ast_entry *ase, *temp_ase;
  1984. int i;
  1985. bool check_wds_ase = false;
  1986. if (soc->wds_ast_aging_timer_cnt++ >= DP_WDS_AST_AGING_TIMER_CNT) {
  1987. soc->wds_ast_aging_timer_cnt = 0;
  1988. check_wds_ase = true;
  1989. }
  1990. /* Peer list access lock */
  1991. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1992. /* AST list access lock */
  1993. qdf_spin_lock_bh(&soc->ast_lock);
  1994. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1995. pdev = soc->pdev_list[i];
  1996. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1997. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1998. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1999. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  2000. /*
  2001. * Do not expire static ast entries
  2002. * and HM WDS entries
  2003. */
  2004. if (ase->type !=
  2005. CDP_TXRX_AST_TYPE_WDS &&
  2006. ase->type !=
  2007. CDP_TXRX_AST_TYPE_MEC &&
  2008. ase->type !=
  2009. CDP_TXRX_AST_TYPE_DA)
  2010. continue;
  2011. /* Expire MEC entry every n sec.
  2012. * This needs to be expired in
  2013. * case if STA backbone is made as
  2014. * AP backbone, In this case it needs
  2015. * to be re-added as a WDS entry.
  2016. */
  2017. if (ase->is_active && ase->type ==
  2018. CDP_TXRX_AST_TYPE_MEC) {
  2019. ase->is_active = FALSE;
  2020. continue;
  2021. } else if (ase->is_active &&
  2022. check_wds_ase) {
  2023. ase->is_active = FALSE;
  2024. continue;
  2025. }
  2026. if (ase->type ==
  2027. CDP_TXRX_AST_TYPE_MEC) {
  2028. DP_STATS_INC(soc,
  2029. ast.aged_out, 1);
  2030. dp_peer_del_ast(soc, ase);
  2031. } else if (check_wds_ase) {
  2032. DP_STATS_INC(soc,
  2033. ast.aged_out, 1);
  2034. dp_peer_del_ast(soc, ase);
  2035. }
  2036. }
  2037. }
  2038. }
  2039. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2040. }
  2041. qdf_spin_unlock_bh(&soc->ast_lock);
  2042. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2043. if (qdf_atomic_read(&soc->cmn_init_done))
  2044. qdf_timer_mod(&soc->ast_aging_timer,
  2045. DP_AST_AGING_TIMER_DEFAULT_MS);
  2046. }
  2047. /*
  2048. * dp_soc_wds_attach() - Setup WDS timer and AST table
  2049. * @soc: Datapath SOC handle
  2050. *
  2051. * Return: None
  2052. */
  2053. static void dp_soc_wds_attach(struct dp_soc *soc)
  2054. {
  2055. soc->wds_ast_aging_timer_cnt = 0;
  2056. qdf_timer_init(soc->osdev, &soc->ast_aging_timer,
  2057. dp_ast_aging_timer_fn, (void *)soc,
  2058. QDF_TIMER_TYPE_WAKE_APPS);
  2059. qdf_timer_mod(&soc->ast_aging_timer, DP_AST_AGING_TIMER_DEFAULT_MS);
  2060. }
  2061. /*
  2062. * dp_soc_wds_detach() - Detach WDS data structures and timers
  2063. * @txrx_soc: DP SOC handle
  2064. *
  2065. * Return: None
  2066. */
  2067. static void dp_soc_wds_detach(struct dp_soc *soc)
  2068. {
  2069. qdf_timer_stop(&soc->ast_aging_timer);
  2070. qdf_timer_free(&soc->ast_aging_timer);
  2071. }
  2072. #else
  2073. static void dp_soc_wds_attach(struct dp_soc *soc)
  2074. {
  2075. }
  2076. static void dp_soc_wds_detach(struct dp_soc *soc)
  2077. {
  2078. }
  2079. #endif
  2080. /*
  2081. * dp_soc_reset_ring_map() - Reset cpu ring map
  2082. * @soc: Datapath soc handler
  2083. *
  2084. * This api resets the default cpu ring map
  2085. */
  2086. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  2087. {
  2088. uint8_t i;
  2089. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2090. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  2091. switch (nss_config) {
  2092. case dp_nss_cfg_first_radio:
  2093. /*
  2094. * Setting Tx ring map for one nss offloaded radio
  2095. */
  2096. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  2097. break;
  2098. case dp_nss_cfg_second_radio:
  2099. /*
  2100. * Setting Tx ring for two nss offloaded radios
  2101. */
  2102. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  2103. break;
  2104. case dp_nss_cfg_dbdc:
  2105. /*
  2106. * Setting Tx ring map for 2 nss offloaded radios
  2107. */
  2108. soc->tx_ring_map[i] =
  2109. dp_cpu_ring_map[DP_NSS_DBDC_OFFLOADED_MAP][i];
  2110. break;
  2111. case dp_nss_cfg_dbtc:
  2112. /*
  2113. * Setting Tx ring map for 3 nss offloaded radios
  2114. */
  2115. soc->tx_ring_map[i] =
  2116. dp_cpu_ring_map[DP_NSS_DBTC_OFFLOADED_MAP][i];
  2117. break;
  2118. default:
  2119. dp_err("tx_ring_map failed due to invalid nss cfg");
  2120. break;
  2121. }
  2122. }
  2123. }
  2124. /*
  2125. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  2126. * @dp_soc - DP soc handle
  2127. * @ring_type - ring type
  2128. * @ring_num - ring_num
  2129. *
  2130. * return 0 or 1
  2131. */
  2132. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  2133. {
  2134. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2135. uint8_t status = 0;
  2136. switch (ring_type) {
  2137. case WBM2SW_RELEASE:
  2138. case REO_DST:
  2139. case RXDMA_BUF:
  2140. status = ((nss_config) & (1 << ring_num));
  2141. break;
  2142. default:
  2143. break;
  2144. }
  2145. return status;
  2146. }
  2147. /*
  2148. * dp_soc_reset_intr_mask() - reset interrupt mask
  2149. * @dp_soc - DP Soc handle
  2150. *
  2151. * Return: Return void
  2152. */
  2153. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  2154. {
  2155. uint8_t j;
  2156. int *grp_mask = NULL;
  2157. int group_number, mask, num_ring;
  2158. /* number of tx ring */
  2159. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  2160. /*
  2161. * group mask for tx completion ring.
  2162. */
  2163. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  2164. /* loop and reset the mask for only offloaded ring */
  2165. for (j = 0; j < num_ring; j++) {
  2166. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  2167. continue;
  2168. }
  2169. /*
  2170. * Group number corresponding to tx offloaded ring.
  2171. */
  2172. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2173. if (group_number < 0) {
  2174. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2175. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2176. WBM2SW_RELEASE, j);
  2177. return;
  2178. }
  2179. /* reset the tx mask for offloaded ring */
  2180. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2181. mask &= (~(1 << j));
  2182. /*
  2183. * reset the interrupt mask for offloaded ring.
  2184. */
  2185. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2186. }
  2187. /* number of rx rings */
  2188. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2189. /*
  2190. * group mask for reo destination ring.
  2191. */
  2192. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  2193. /* loop and reset the mask for only offloaded ring */
  2194. for (j = 0; j < num_ring; j++) {
  2195. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  2196. continue;
  2197. }
  2198. /*
  2199. * Group number corresponding to rx offloaded ring.
  2200. */
  2201. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2202. if (group_number < 0) {
  2203. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2204. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2205. REO_DST, j);
  2206. return;
  2207. }
  2208. /* set the interrupt mask for offloaded ring */
  2209. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  2210. mask &= (~(1 << j));
  2211. /*
  2212. * set the interrupt mask to zero for rx offloaded radio.
  2213. */
  2214. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  2215. }
  2216. /*
  2217. * group mask for Rx buffer refill ring
  2218. */
  2219. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  2220. /* loop and reset the mask for only offloaded ring */
  2221. for (j = 0; j < MAX_PDEV_CNT; j++) {
  2222. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  2223. continue;
  2224. }
  2225. /*
  2226. * Group number corresponding to rx offloaded ring.
  2227. */
  2228. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  2229. if (group_number < 0) {
  2230. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2231. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  2232. REO_DST, j);
  2233. return;
  2234. }
  2235. /* set the interrupt mask for offloaded ring */
  2236. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2237. group_number);
  2238. mask &= (~(1 << j));
  2239. /*
  2240. * set the interrupt mask to zero for rx offloaded radio.
  2241. */
  2242. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  2243. group_number, mask);
  2244. }
  2245. }
  2246. #ifdef IPA_OFFLOAD
  2247. /**
  2248. * dp_reo_remap_config() - configure reo remap register value based
  2249. * nss configuration.
  2250. * based on offload_radio value below remap configuration
  2251. * get applied.
  2252. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  2253. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  2254. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  2255. * 3 - both Radios handled by NSS (remap not required)
  2256. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  2257. *
  2258. * @remap1: output parameter indicates reo remap 1 register value
  2259. * @remap2: output parameter indicates reo remap 2 register value
  2260. * Return: bool type, true if remap is configured else false.
  2261. */
  2262. bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap1, uint32_t *remap2)
  2263. {
  2264. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  2265. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  2266. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  2267. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  2268. dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
  2269. return true;
  2270. }
  2271. #else
  2272. static bool dp_reo_remap_config(struct dp_soc *soc,
  2273. uint32_t *remap1,
  2274. uint32_t *remap2)
  2275. {
  2276. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2277. switch (offload_radio) {
  2278. case dp_nss_cfg_default:
  2279. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  2280. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  2281. (0x3 << 18) | (0x4 << 21)) << 8;
  2282. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  2283. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  2284. (0x3 << 18) | (0x4 << 21)) << 8;
  2285. break;
  2286. case dp_nss_cfg_first_radio:
  2287. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  2288. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  2289. (0x2 << 18) | (0x3 << 21)) << 8;
  2290. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  2291. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  2292. (0x4 << 18) | (0x2 << 21)) << 8;
  2293. break;
  2294. case dp_nss_cfg_second_radio:
  2295. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  2296. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  2297. (0x1 << 18) | (0x3 << 21)) << 8;
  2298. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  2299. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  2300. (0x4 << 18) | (0x1 << 21)) << 8;
  2301. break;
  2302. case dp_nss_cfg_dbdc:
  2303. case dp_nss_cfg_dbtc:
  2304. /* return false if both or all are offloaded to NSS */
  2305. return false;
  2306. }
  2307. dp_debug("remap1 %x remap2 %x offload_radio %u",
  2308. *remap1, *remap2, offload_radio);
  2309. return true;
  2310. }
  2311. #endif
  2312. /*
  2313. * dp_reo_frag_dst_set() - configure reo register to set the
  2314. * fragment destination ring
  2315. * @soc : Datapath soc
  2316. * @frag_dst_ring : output parameter to set fragment destination ring
  2317. *
  2318. * Based on offload_radio below fragment destination rings is selected
  2319. * 0 - TCL
  2320. * 1 - SW1
  2321. * 2 - SW2
  2322. * 3 - SW3
  2323. * 4 - SW4
  2324. * 5 - Release
  2325. * 6 - FW
  2326. * 7 - alternate select
  2327. *
  2328. * return: void
  2329. */
  2330. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  2331. {
  2332. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  2333. switch (offload_radio) {
  2334. case dp_nss_cfg_default:
  2335. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  2336. break;
  2337. case dp_nss_cfg_dbdc:
  2338. case dp_nss_cfg_dbtc:
  2339. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  2340. break;
  2341. default:
  2342. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2343. FL("dp_reo_frag_dst_set invalid offload radio config"));
  2344. break;
  2345. }
  2346. }
  2347. #ifdef ENABLE_VERBOSE_DEBUG
  2348. static void dp_enable_verbose_debug(struct dp_soc *soc)
  2349. {
  2350. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2351. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2352. if (soc_cfg_ctx->per_pkt_trace & dp_verbose_debug_mask)
  2353. is_dp_verbose_debug_enabled = true;
  2354. if (soc_cfg_ctx->per_pkt_trace & hal_verbose_debug_mask)
  2355. hal_set_verbose_debug(true);
  2356. else
  2357. hal_set_verbose_debug(false);
  2358. }
  2359. #else
  2360. static void dp_enable_verbose_debug(struct dp_soc *soc)
  2361. {
  2362. }
  2363. #endif
  2364. /*
  2365. * dp_soc_cmn_setup() - Common SoC level initializion
  2366. * @soc: Datapath SOC handle
  2367. *
  2368. * This is an internal function used to setup common SOC data structures,
  2369. * to be called from PDEV attach after receiving HW mode capabilities from FW
  2370. */
  2371. static int dp_soc_cmn_setup(struct dp_soc *soc)
  2372. {
  2373. int i;
  2374. struct hal_reo_params reo_params;
  2375. int tx_ring_size;
  2376. int tx_comp_ring_size;
  2377. int reo_dst_ring_size;
  2378. uint32_t entries;
  2379. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2380. if (qdf_atomic_read(&soc->cmn_init_done))
  2381. return 0;
  2382. if (dp_hw_link_desc_pool_setup(soc))
  2383. goto fail1;
  2384. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2385. dp_enable_verbose_debug(soc);
  2386. /* Setup SRNG rings */
  2387. /* Common rings */
  2388. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  2389. wlan_cfg_get_dp_soc_wbm_release_ring_size(soc_cfg_ctx))) {
  2390. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2391. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  2392. goto fail1;
  2393. }
  2394. soc->num_tcl_data_rings = 0;
  2395. /* Tx data rings */
  2396. if (!wlan_cfg_per_pdev_tx_ring(soc_cfg_ctx)) {
  2397. soc->num_tcl_data_rings =
  2398. wlan_cfg_num_tcl_data_rings(soc_cfg_ctx);
  2399. tx_comp_ring_size =
  2400. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2401. tx_ring_size =
  2402. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2403. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2404. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  2405. TCL_DATA, i, 0, tx_ring_size)) {
  2406. QDF_TRACE(QDF_MODULE_ID_DP,
  2407. QDF_TRACE_LEVEL_ERROR,
  2408. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  2409. goto fail1;
  2410. }
  2411. /*
  2412. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  2413. * count
  2414. */
  2415. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  2416. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  2417. QDF_TRACE(QDF_MODULE_ID_DP,
  2418. QDF_TRACE_LEVEL_ERROR,
  2419. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  2420. goto fail1;
  2421. }
  2422. }
  2423. } else {
  2424. /* This will be incremented during per pdev ring setup */
  2425. soc->num_tcl_data_rings = 0;
  2426. }
  2427. if (dp_tx_soc_attach(soc)) {
  2428. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2429. FL("dp_tx_soc_attach failed"));
  2430. goto fail1;
  2431. }
  2432. entries = wlan_cfg_get_dp_soc_tcl_cmd_ring_size(soc_cfg_ctx);
  2433. /* TCL command and status rings */
  2434. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  2435. entries)) {
  2436. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2437. FL("dp_srng_setup failed for tcl_cmd_ring"));
  2438. goto fail1;
  2439. }
  2440. entries = wlan_cfg_get_dp_soc_tcl_status_ring_size(soc_cfg_ctx);
  2441. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  2442. entries)) {
  2443. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2444. FL("dp_srng_setup failed for tcl_status_ring"));
  2445. goto fail1;
  2446. }
  2447. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2448. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  2449. * descriptors
  2450. */
  2451. /* Rx data rings */
  2452. if (!wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2453. soc->num_reo_dest_rings =
  2454. wlan_cfg_num_reo_dest_rings(soc_cfg_ctx);
  2455. QDF_TRACE(QDF_MODULE_ID_DP,
  2456. QDF_TRACE_LEVEL_INFO,
  2457. FL("num_reo_dest_rings %d"), soc->num_reo_dest_rings);
  2458. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2459. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  2460. i, 0, reo_dst_ring_size)) {
  2461. QDF_TRACE(QDF_MODULE_ID_DP,
  2462. QDF_TRACE_LEVEL_ERROR,
  2463. FL(RNG_ERR "reo_dest_ring [%d]"), i);
  2464. goto fail1;
  2465. }
  2466. }
  2467. } else {
  2468. /* This will be incremented during per pdev ring setup */
  2469. soc->num_reo_dest_rings = 0;
  2470. }
  2471. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2472. /* LMAC RxDMA to SW Rings configuration */
  2473. if (!wlan_cfg_per_pdev_lmac_ring(soc_cfg_ctx)) {
  2474. /* Only valid for MCL */
  2475. struct dp_pdev *pdev = soc->pdev_list[0];
  2476. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  2477. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  2478. RXDMA_DST, 0, i,
  2479. entries)) {
  2480. QDF_TRACE(QDF_MODULE_ID_DP,
  2481. QDF_TRACE_LEVEL_ERROR,
  2482. FL(RNG_ERR "rxdma_err_dst_ring"));
  2483. goto fail1;
  2484. }
  2485. }
  2486. }
  2487. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  2488. /* REO reinjection ring */
  2489. entries = wlan_cfg_get_dp_soc_reo_reinject_ring_size(soc_cfg_ctx);
  2490. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  2491. entries)) {
  2492. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2493. FL("dp_srng_setup failed for reo_reinject_ring"));
  2494. goto fail1;
  2495. }
  2496. /* Rx release ring */
  2497. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  2498. wlan_cfg_get_dp_soc_rx_release_ring_size(soc_cfg_ctx))) {
  2499. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2500. FL("dp_srng_setup failed for rx_rel_ring"));
  2501. goto fail1;
  2502. }
  2503. /* Rx exception ring */
  2504. entries = wlan_cfg_get_dp_soc_reo_exception_ring_size(soc_cfg_ctx);
  2505. if (dp_srng_setup(soc, &soc->reo_exception_ring,
  2506. REO_EXCEPTION, 0, MAX_REO_DEST_RINGS, entries)) {
  2507. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2508. FL("dp_srng_setup failed for reo_exception_ring"));
  2509. goto fail1;
  2510. }
  2511. /* REO command and status rings */
  2512. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  2513. wlan_cfg_get_dp_soc_reo_cmd_ring_size(soc_cfg_ctx))) {
  2514. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2515. FL("dp_srng_setup failed for reo_cmd_ring"));
  2516. goto fail1;
  2517. }
  2518. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  2519. TAILQ_INIT(&soc->rx.reo_cmd_list);
  2520. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  2521. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  2522. wlan_cfg_get_dp_soc_reo_status_ring_size(soc_cfg_ctx))) {
  2523. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2524. FL("dp_srng_setup failed for reo_status_ring"));
  2525. goto fail1;
  2526. }
  2527. /* Reset the cpu ring map if radio is NSS offloaded */
  2528. if (wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx)) {
  2529. dp_soc_reset_cpu_ring_map(soc);
  2530. dp_soc_reset_intr_mask(soc);
  2531. }
  2532. /* Setup HW REO */
  2533. qdf_mem_zero(&reo_params, sizeof(reo_params));
  2534. if (wlan_cfg_is_rx_hash_enabled(soc_cfg_ctx)) {
  2535. /*
  2536. * Reo ring remap is not required if both radios
  2537. * are offloaded to NSS
  2538. */
  2539. if (!dp_reo_remap_config(soc,
  2540. &reo_params.remap1,
  2541. &reo_params.remap2))
  2542. goto out;
  2543. reo_params.rx_hash_enabled = true;
  2544. }
  2545. /* setup the global rx defrag waitlist */
  2546. TAILQ_INIT(&soc->rx.defrag.waitlist);
  2547. soc->rx.defrag.timeout_ms =
  2548. wlan_cfg_get_rx_defrag_min_timeout(soc_cfg_ctx);
  2549. soc->rx.defrag.next_flush_ms = 0;
  2550. soc->rx.flags.defrag_timeout_check =
  2551. wlan_cfg_get_defrag_timeout_check(soc_cfg_ctx);
  2552. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  2553. out:
  2554. /*
  2555. * set the fragment destination ring
  2556. */
  2557. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  2558. hal_reo_setup(soc->hal_soc, &reo_params);
  2559. qdf_atomic_set(&soc->cmn_init_done, 1);
  2560. dp_soc_wds_attach(soc);
  2561. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  2562. return 0;
  2563. fail1:
  2564. /*
  2565. * Cleanup will be done as part of soc_detach, which will
  2566. * be called on pdev attach failure
  2567. */
  2568. return QDF_STATUS_E_FAILURE;
  2569. }
  2570. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2571. static QDF_STATUS dp_lro_hash_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2572. {
  2573. struct cdp_lro_hash_config lro_hash;
  2574. QDF_STATUS status;
  2575. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2576. !wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx) &&
  2577. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2578. dp_err("LRO, GRO and RX hash disabled");
  2579. return QDF_STATUS_E_FAILURE;
  2580. }
  2581. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2582. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) ||
  2583. wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx)) {
  2584. lro_hash.lro_enable = 1;
  2585. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2586. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2587. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2588. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2589. }
  2590. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2591. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2592. LRO_IPV4_SEED_ARR_SZ));
  2593. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2594. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2595. LRO_IPV6_SEED_ARR_SZ));
  2596. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2597. if (!soc->cdp_soc.ol_ops->lro_hash_config) {
  2598. QDF_BUG(0);
  2599. dp_err("lro_hash_config not configured");
  2600. return QDF_STATUS_E_FAILURE;
  2601. }
  2602. status = soc->cdp_soc.ol_ops->lro_hash_config(pdev->ctrl_pdev,
  2603. &lro_hash);
  2604. if (!QDF_IS_STATUS_SUCCESS(status)) {
  2605. dp_err("failed to send lro_hash_config to FW %u", status);
  2606. return status;
  2607. }
  2608. dp_info("LRO CMD config: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2609. lro_hash.lro_enable, lro_hash.tcp_flag,
  2610. lro_hash.tcp_flag_mask);
  2611. dp_info("toeplitz_hash_ipv4:");
  2612. qdf_trace_hex_dump(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2613. (void *)lro_hash.toeplitz_hash_ipv4,
  2614. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2615. LRO_IPV4_SEED_ARR_SZ));
  2616. dp_info("toeplitz_hash_ipv6:");
  2617. qdf_trace_hex_dump(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2618. (void *)lro_hash.toeplitz_hash_ipv6,
  2619. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2620. LRO_IPV6_SEED_ARR_SZ));
  2621. return status;
  2622. }
  2623. /*
  2624. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2625. * @soc: data path SoC handle
  2626. * @pdev: Physical device handle
  2627. *
  2628. * Return: 0 - success, > 0 - failure
  2629. */
  2630. #ifdef QCA_HOST2FW_RXBUF_RING
  2631. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2632. struct dp_pdev *pdev)
  2633. {
  2634. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2635. int max_mac_rings;
  2636. int i;
  2637. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2638. max_mac_rings = wlan_cfg_get_num_mac_rings(pdev_cfg_ctx);
  2639. for (i = 0; i < max_mac_rings; i++) {
  2640. dp_verbose_debug("pdev_id %d mac_id %d", pdev->pdev_id, i);
  2641. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2642. RXDMA_BUF, 1, i,
  2643. wlan_cfg_get_rx_dma_buf_ring_size(pdev_cfg_ctx))) {
  2644. QDF_TRACE(QDF_MODULE_ID_DP,
  2645. QDF_TRACE_LEVEL_ERROR,
  2646. FL("failed rx mac ring setup"));
  2647. return QDF_STATUS_E_FAILURE;
  2648. }
  2649. }
  2650. return QDF_STATUS_SUCCESS;
  2651. }
  2652. #else
  2653. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2654. struct dp_pdev *pdev)
  2655. {
  2656. return QDF_STATUS_SUCCESS;
  2657. }
  2658. #endif
  2659. /**
  2660. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2661. * @pdev - DP_PDEV handle
  2662. *
  2663. * Return: void
  2664. */
  2665. static inline void
  2666. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2667. {
  2668. uint8_t map_id;
  2669. struct dp_soc *soc = pdev->soc;
  2670. if (!soc)
  2671. return;
  2672. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2673. qdf_mem_copy(pdev->dscp_tid_map[map_id],
  2674. default_dscp_tid_map,
  2675. sizeof(default_dscp_tid_map));
  2676. }
  2677. for (map_id = 0; map_id < soc->num_hw_dscp_tid_map; map_id++) {
  2678. hal_tx_set_dscp_tid_map(soc->hal_soc,
  2679. default_dscp_tid_map,
  2680. map_id);
  2681. }
  2682. }
  2683. /**
  2684. * dp_pcp_tid_map_setup(): Initialize the pcp-tid maps
  2685. * @pdev - DP_PDEV handle
  2686. *
  2687. * Return: void
  2688. */
  2689. static inline void
  2690. dp_pcp_tid_map_setup(struct dp_pdev *pdev)
  2691. {
  2692. struct dp_soc *soc = pdev->soc;
  2693. if (!soc)
  2694. return;
  2695. qdf_mem_copy(soc->pcp_tid_map, default_pcp_tid_map,
  2696. sizeof(default_pcp_tid_map));
  2697. hal_tx_set_pcp_tid_map_default(soc->hal_soc, default_pcp_tid_map);
  2698. }
  2699. #ifdef IPA_OFFLOAD
  2700. /**
  2701. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2702. * @soc: data path instance
  2703. * @pdev: core txrx pdev context
  2704. *
  2705. * Return: QDF_STATUS_SUCCESS: success
  2706. * QDF_STATUS_E_RESOURCES: Error return
  2707. */
  2708. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2709. struct dp_pdev *pdev)
  2710. {
  2711. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2712. int entries;
  2713. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2714. entries = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  2715. /* Setup second Rx refill buffer ring */
  2716. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2717. IPA_RX_REFILL_BUF_RING_IDX,
  2718. pdev->pdev_id,
  2719. entries)) {
  2720. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2721. FL("dp_srng_setup failed second rx refill ring"));
  2722. return QDF_STATUS_E_FAILURE;
  2723. }
  2724. return QDF_STATUS_SUCCESS;
  2725. }
  2726. /**
  2727. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2728. * @soc: data path instance
  2729. * @pdev: core txrx pdev context
  2730. *
  2731. * Return: void
  2732. */
  2733. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2734. struct dp_pdev *pdev)
  2735. {
  2736. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2737. IPA_RX_REFILL_BUF_RING_IDX);
  2738. }
  2739. #else
  2740. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2741. struct dp_pdev *pdev)
  2742. {
  2743. return QDF_STATUS_SUCCESS;
  2744. }
  2745. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2746. struct dp_pdev *pdev)
  2747. {
  2748. }
  2749. #endif
  2750. #if !defined(DISABLE_MON_CONFIG)
  2751. /**
  2752. * dp_mon_rings_setup() - Initialize Monitor rings based on target
  2753. * @soc: soc handle
  2754. * @pdev: physical device handle
  2755. *
  2756. * Return: nonzero on failure and zero on success
  2757. */
  2758. static
  2759. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2760. {
  2761. int mac_id = 0;
  2762. int pdev_id = pdev->pdev_id;
  2763. int entries;
  2764. struct wlan_cfg_dp_pdev_ctxt *pdev_cfg_ctx;
  2765. pdev_cfg_ctx = pdev->wlan_cfg_ctx;
  2766. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2767. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2768. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  2769. entries =
  2770. wlan_cfg_get_dma_mon_buf_ring_size(pdev_cfg_ctx);
  2771. if (dp_srng_setup(soc,
  2772. &pdev->rxdma_mon_buf_ring[mac_id],
  2773. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2774. entries)) {
  2775. QDF_TRACE(QDF_MODULE_ID_DP,
  2776. QDF_TRACE_LEVEL_ERROR,
  2777. FL(RNG_ERR "rxdma_mon_buf_ring "));
  2778. return QDF_STATUS_E_NOMEM;
  2779. }
  2780. entries =
  2781. wlan_cfg_get_dma_mon_dest_ring_size(pdev_cfg_ctx);
  2782. if (dp_srng_setup(soc,
  2783. &pdev->rxdma_mon_dst_ring[mac_id],
  2784. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2785. entries)) {
  2786. QDF_TRACE(QDF_MODULE_ID_DP,
  2787. QDF_TRACE_LEVEL_ERROR,
  2788. FL(RNG_ERR "rxdma_mon_dst_ring"));
  2789. return QDF_STATUS_E_NOMEM;
  2790. }
  2791. entries =
  2792. wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2793. if (dp_srng_setup(soc,
  2794. &pdev->rxdma_mon_status_ring[mac_id],
  2795. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2796. entries)) {
  2797. QDF_TRACE(QDF_MODULE_ID_DP,
  2798. QDF_TRACE_LEVEL_ERROR,
  2799. FL(RNG_ERR "rxdma_mon_status_ring"));
  2800. return QDF_STATUS_E_NOMEM;
  2801. }
  2802. entries =
  2803. wlan_cfg_get_dma_mon_desc_ring_size(pdev_cfg_ctx);
  2804. if (dp_srng_setup(soc,
  2805. &pdev->rxdma_mon_desc_ring[mac_id],
  2806. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2807. entries)) {
  2808. QDF_TRACE(QDF_MODULE_ID_DP,
  2809. QDF_TRACE_LEVEL_ERROR,
  2810. FL(RNG_ERR "rxdma_mon_desc_ring"));
  2811. return QDF_STATUS_E_NOMEM;
  2812. }
  2813. } else {
  2814. entries =
  2815. wlan_cfg_get_dma_mon_stat_ring_size(pdev_cfg_ctx);
  2816. if (dp_srng_setup(soc,
  2817. &pdev->rxdma_mon_status_ring[mac_id],
  2818. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2819. entries)) {
  2820. QDF_TRACE(QDF_MODULE_ID_DP,
  2821. QDF_TRACE_LEVEL_ERROR,
  2822. FL(RNG_ERR "rxdma_mon_status_ring"));
  2823. return QDF_STATUS_E_NOMEM;
  2824. }
  2825. }
  2826. }
  2827. return QDF_STATUS_SUCCESS;
  2828. }
  2829. #else
  2830. static
  2831. QDF_STATUS dp_mon_rings_setup(struct dp_soc *soc, struct dp_pdev *pdev)
  2832. {
  2833. return QDF_STATUS_SUCCESS;
  2834. }
  2835. #endif
  2836. /*dp_iterate_update_peer_list - update peer stats on cal client timer
  2837. * @pdev_hdl: pdev handle
  2838. */
  2839. #ifdef ATH_SUPPORT_EXT_STAT
  2840. void dp_iterate_update_peer_list(void *pdev_hdl)
  2841. {
  2842. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  2843. struct dp_soc *soc = pdev->soc;
  2844. struct dp_vdev *vdev = NULL;
  2845. struct dp_peer *peer = NULL;
  2846. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2847. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2848. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  2849. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  2850. dp_cal_client_update_peer_stats(&peer->stats);
  2851. }
  2852. }
  2853. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2854. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2855. }
  2856. #else
  2857. void dp_iterate_update_peer_list(void *pdev_hdl)
  2858. {
  2859. }
  2860. #endif
  2861. /*
  2862. * dp_pdev_attach_wifi3() - attach txrx pdev
  2863. * @ctrl_pdev: Opaque PDEV object
  2864. * @txrx_soc: Datapath SOC handle
  2865. * @htc_handle: HTC handle for host-target interface
  2866. * @qdf_osdev: QDF OS device
  2867. * @pdev_id: PDEV ID
  2868. *
  2869. * Return: DP PDEV handle on success, NULL on failure
  2870. */
  2871. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2872. struct cdp_ctrl_objmgr_pdev *ctrl_pdev,
  2873. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2874. {
  2875. int tx_ring_size;
  2876. int tx_comp_ring_size;
  2877. int reo_dst_ring_size;
  2878. int entries;
  2879. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  2880. int nss_cfg;
  2881. void *sojourn_buf;
  2882. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2883. struct dp_pdev *pdev = NULL;
  2884. if (dp_is_soc_reinit(soc))
  2885. pdev = soc->pdev_list[pdev_id];
  2886. else
  2887. pdev = qdf_mem_malloc(sizeof(*pdev));
  2888. if (!pdev) {
  2889. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2890. FL("DP PDEV memory allocation failed"));
  2891. goto fail0;
  2892. }
  2893. /*
  2894. * Variable to prevent double pdev deinitialization during
  2895. * radio detach execution .i.e. in the absence of any vdev.
  2896. */
  2897. pdev->pdev_deinit = 0;
  2898. pdev->invalid_peer = qdf_mem_malloc(sizeof(struct dp_peer));
  2899. if (!pdev->invalid_peer) {
  2900. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2901. FL("Invalid peer memory allocation failed"));
  2902. qdf_mem_free(pdev);
  2903. goto fail0;
  2904. }
  2905. soc_cfg_ctx = soc->wlan_cfg_ctx;
  2906. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach(soc->ctrl_psoc);
  2907. if (!pdev->wlan_cfg_ctx) {
  2908. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2909. FL("pdev cfg_attach failed"));
  2910. qdf_mem_free(pdev->invalid_peer);
  2911. qdf_mem_free(pdev);
  2912. goto fail0;
  2913. }
  2914. /*
  2915. * set nss pdev config based on soc config
  2916. */
  2917. nss_cfg = wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx);
  2918. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2919. (nss_cfg & (1 << pdev_id)));
  2920. pdev->soc = soc;
  2921. pdev->ctrl_pdev = ctrl_pdev;
  2922. pdev->pdev_id = pdev_id;
  2923. soc->pdev_list[pdev_id] = pdev;
  2924. pdev->lmac_id = wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, pdev_id);
  2925. soc->pdev_count++;
  2926. TAILQ_INIT(&pdev->vdev_list);
  2927. qdf_spinlock_create(&pdev->vdev_list_lock);
  2928. pdev->vdev_count = 0;
  2929. qdf_spinlock_create(&pdev->tx_mutex);
  2930. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2931. TAILQ_INIT(&pdev->neighbour_peers_list);
  2932. pdev->neighbour_peers_added = false;
  2933. pdev->monitor_configured = false;
  2934. if (dp_soc_cmn_setup(soc)) {
  2935. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2936. FL("dp_soc_cmn_setup failed"));
  2937. goto fail1;
  2938. }
  2939. /* Setup per PDEV TCL rings if configured */
  2940. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2941. tx_ring_size =
  2942. wlan_cfg_tx_ring_size(soc_cfg_ctx);
  2943. tx_comp_ring_size =
  2944. wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  2945. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2946. pdev_id, pdev_id, tx_ring_size)) {
  2947. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2948. FL("dp_srng_setup failed for tcl_data_ring"));
  2949. goto fail1;
  2950. }
  2951. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2952. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2953. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2954. FL("dp_srng_setup failed for tx_comp_ring"));
  2955. goto fail1;
  2956. }
  2957. soc->num_tcl_data_rings++;
  2958. }
  2959. /* Tx specific init */
  2960. if (dp_tx_pdev_attach(pdev)) {
  2961. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2962. FL("dp_tx_pdev_attach failed"));
  2963. goto fail1;
  2964. }
  2965. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc->wlan_cfg_ctx);
  2966. /* Setup per PDEV REO rings if configured */
  2967. if (wlan_cfg_per_pdev_rx_ring(soc_cfg_ctx)) {
  2968. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2969. pdev_id, pdev_id, reo_dst_ring_size)) {
  2970. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2971. FL("dp_srng_setup failed for reo_dest_ringn"));
  2972. goto fail1;
  2973. }
  2974. soc->num_reo_dest_rings++;
  2975. }
  2976. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2977. wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx))) {
  2978. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2979. FL("dp_srng_setup failed rx refill ring"));
  2980. goto fail1;
  2981. }
  2982. if (dp_rxdma_ring_setup(soc, pdev)) {
  2983. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2984. FL("RXDMA ring config failed"));
  2985. goto fail1;
  2986. }
  2987. if (dp_mon_rings_setup(soc, pdev)) {
  2988. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2989. FL("MONITOR rings setup failed"));
  2990. goto fail1;
  2991. }
  2992. entries = wlan_cfg_get_dp_soc_rxdma_err_dst_ring_size(soc_cfg_ctx);
  2993. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2994. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2995. 0, pdev_id,
  2996. entries)) {
  2997. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2998. FL(RNG_ERR "rxdma_err_dst_ring"));
  2999. goto fail1;
  3000. }
  3001. }
  3002. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  3003. goto fail1;
  3004. if (dp_ipa_ring_resource_setup(soc, pdev))
  3005. goto fail1;
  3006. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  3007. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3008. FL("dp_ipa_uc_attach failed"));
  3009. goto fail1;
  3010. }
  3011. /* Rx specific init */
  3012. if (dp_rx_pdev_attach(pdev)) {
  3013. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3014. FL("dp_rx_pdev_attach failed"));
  3015. goto fail1;
  3016. }
  3017. DP_STATS_INIT(pdev);
  3018. /* Monitor filter init */
  3019. pdev->mon_filter_mode = MON_FILTER_ALL;
  3020. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  3021. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  3022. pdev->fp_data_filter = FILTER_DATA_ALL;
  3023. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  3024. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  3025. pdev->mo_data_filter = FILTER_DATA_ALL;
  3026. dp_local_peer_id_pool_init(pdev);
  3027. dp_dscp_tid_map_setup(pdev);
  3028. dp_pcp_tid_map_setup(pdev);
  3029. /* Rx monitor mode specific init */
  3030. if (dp_rx_pdev_mon_attach(pdev)) {
  3031. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3032. "dp_rx_pdev_mon_attach failed");
  3033. goto fail1;
  3034. }
  3035. if (dp_wdi_event_attach(pdev)) {
  3036. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3037. "dp_wdi_evet_attach failed");
  3038. goto fail1;
  3039. }
  3040. /* set the reo destination during initialization */
  3041. pdev->reo_dest = pdev->pdev_id + 1;
  3042. /*
  3043. * initialize ppdu tlv list
  3044. */
  3045. TAILQ_INIT(&pdev->ppdu_info_list);
  3046. pdev->tlv_count = 0;
  3047. pdev->list_depth = 0;
  3048. qdf_mem_zero(&pdev->sojourn_stats, sizeof(struct cdp_tx_sojourn_stats));
  3049. pdev->sojourn_buf = qdf_nbuf_alloc(pdev->soc->osdev,
  3050. sizeof(struct cdp_tx_sojourn_stats), 0, 4,
  3051. TRUE);
  3052. if (pdev->sojourn_buf) {
  3053. sojourn_buf = qdf_nbuf_data(pdev->sojourn_buf);
  3054. qdf_mem_zero(sojourn_buf, sizeof(struct cdp_tx_sojourn_stats));
  3055. }
  3056. /* initlialize cal client timer */
  3057. dp_cal_client_attach(&pdev->cal_client_ctx, pdev, pdev->soc->osdev,
  3058. &dp_iterate_update_peer_list);
  3059. qdf_event_create(&pdev->fw_peer_stats_event);
  3060. pdev->num_tx_allowed = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  3061. dp_tx_ppdu_stats_attach(pdev);
  3062. return (struct cdp_pdev *)pdev;
  3063. fail1:
  3064. dp_pdev_detach((struct cdp_pdev *)pdev, 0);
  3065. fail0:
  3066. return NULL;
  3067. }
  3068. /*
  3069. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  3070. * @soc: data path SoC handle
  3071. * @pdev: Physical device handle
  3072. *
  3073. * Return: void
  3074. */
  3075. #ifdef QCA_HOST2FW_RXBUF_RING
  3076. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  3077. struct dp_pdev *pdev)
  3078. {
  3079. int max_mac_rings =
  3080. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  3081. int i;
  3082. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  3083. max_mac_rings : MAX_RX_MAC_RINGS;
  3084. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  3085. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  3086. RXDMA_BUF, 1);
  3087. qdf_timer_free(&soc->mon_reap_timer);
  3088. }
  3089. #else
  3090. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  3091. struct dp_pdev *pdev)
  3092. {
  3093. }
  3094. #endif
  3095. /*
  3096. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  3097. * @pdev: device object
  3098. *
  3099. * Return: void
  3100. */
  3101. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  3102. {
  3103. struct dp_neighbour_peer *peer = NULL;
  3104. struct dp_neighbour_peer *temp_peer = NULL;
  3105. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  3106. neighbour_peer_list_elem, temp_peer) {
  3107. /* delete this peer from the list */
  3108. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3109. peer, neighbour_peer_list_elem);
  3110. qdf_mem_free(peer);
  3111. }
  3112. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  3113. }
  3114. /**
  3115. * dp_htt_ppdu_stats_detach() - detach stats resources
  3116. * @pdev: Datapath PDEV handle
  3117. *
  3118. * Return: void
  3119. */
  3120. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  3121. {
  3122. struct ppdu_info *ppdu_info, *ppdu_info_next;
  3123. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  3124. ppdu_info_list_elem, ppdu_info_next) {
  3125. if (!ppdu_info)
  3126. break;
  3127. qdf_assert_always(ppdu_info->nbuf);
  3128. qdf_nbuf_free(ppdu_info->nbuf);
  3129. qdf_mem_free(ppdu_info);
  3130. }
  3131. }
  3132. #if !defined(DISABLE_MON_CONFIG)
  3133. static
  3134. void dp_mon_ring_cleanup(struct dp_soc *soc, struct dp_pdev *pdev,
  3135. int mac_id)
  3136. {
  3137. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  3138. dp_srng_cleanup(soc,
  3139. &pdev->rxdma_mon_buf_ring[mac_id],
  3140. RXDMA_MONITOR_BUF, 0);
  3141. dp_srng_cleanup(soc,
  3142. &pdev->rxdma_mon_dst_ring[mac_id],
  3143. RXDMA_MONITOR_DST, 0);
  3144. dp_srng_cleanup(soc,
  3145. &pdev->rxdma_mon_status_ring[mac_id],
  3146. RXDMA_MONITOR_STATUS, 0);
  3147. dp_srng_cleanup(soc,
  3148. &pdev->rxdma_mon_desc_ring[mac_id],
  3149. RXDMA_MONITOR_DESC, 0);
  3150. dp_srng_cleanup(soc,
  3151. &pdev->rxdma_err_dst_ring[mac_id],
  3152. RXDMA_DST, 0);
  3153. } else {
  3154. dp_srng_cleanup(soc,
  3155. &pdev->rxdma_mon_status_ring[mac_id],
  3156. RXDMA_MONITOR_STATUS, 0);
  3157. dp_srng_cleanup(soc,
  3158. &pdev->rxdma_err_dst_ring[mac_id],
  3159. RXDMA_DST, 0);
  3160. }
  3161. }
  3162. #else
  3163. static void dp_mon_ring_cleanup(struct dp_soc *soc, struct dp_pdev *pdev,
  3164. int mac_id)
  3165. {
  3166. }
  3167. #endif
  3168. /**
  3169. * dp_mon_ring_deinit() - Placeholder to deinitialize Monitor rings
  3170. *
  3171. * @soc: soc handle
  3172. * @pdev: datapath physical dev handle
  3173. * @mac_id: mac number
  3174. *
  3175. * Return: None
  3176. */
  3177. static void dp_mon_ring_deinit(struct dp_soc *soc, struct dp_pdev *pdev,
  3178. int mac_id)
  3179. {
  3180. }
  3181. /**
  3182. * dp_pdev_mem_reset() - Reset txrx pdev memory
  3183. * @pdev: dp pdev handle
  3184. *
  3185. * Return: None
  3186. */
  3187. static void dp_pdev_mem_reset(struct dp_pdev *pdev)
  3188. {
  3189. uint16_t len = 0;
  3190. uint8_t *dp_pdev_offset = (uint8_t *)pdev;
  3191. len = sizeof(struct dp_pdev) -
  3192. offsetof(struct dp_pdev, pdev_deinit) -
  3193. sizeof(pdev->pdev_deinit);
  3194. dp_pdev_offset = dp_pdev_offset +
  3195. offsetof(struct dp_pdev, pdev_deinit) +
  3196. sizeof(pdev->pdev_deinit);
  3197. qdf_mem_zero(dp_pdev_offset, len);
  3198. }
  3199. /**
  3200. * dp_pdev_deinit() - Deinit txrx pdev
  3201. * @txrx_pdev: Datapath PDEV handle
  3202. * @force: Force deinit
  3203. *
  3204. * Return: None
  3205. */
  3206. static void dp_pdev_deinit(struct cdp_pdev *txrx_pdev, int force)
  3207. {
  3208. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3209. struct dp_soc *soc = pdev->soc;
  3210. qdf_nbuf_t curr_nbuf, next_nbuf;
  3211. int mac_id;
  3212. /*
  3213. * Prevent double pdev deinitialization during radio detach
  3214. * execution .i.e. in the absence of any vdev
  3215. */
  3216. if (pdev->pdev_deinit)
  3217. return;
  3218. pdev->pdev_deinit = 1;
  3219. dp_wdi_event_detach(pdev);
  3220. dp_tx_pdev_detach(pdev);
  3221. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3222. dp_srng_deinit(soc, &soc->tcl_data_ring[pdev->pdev_id],
  3223. TCL_DATA, pdev->pdev_id);
  3224. dp_srng_deinit(soc, &soc->tx_comp_ring[pdev->pdev_id],
  3225. WBM2SW_RELEASE, pdev->pdev_id);
  3226. }
  3227. dp_pktlogmod_exit(pdev);
  3228. dp_rx_pdev_detach(pdev);
  3229. dp_rx_pdev_mon_detach(pdev);
  3230. dp_neighbour_peers_detach(pdev);
  3231. qdf_spinlock_destroy(&pdev->tx_mutex);
  3232. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  3233. dp_ipa_uc_detach(soc, pdev);
  3234. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  3235. /* Cleanup per PDEV REO rings if configured */
  3236. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3237. dp_srng_deinit(soc, &soc->reo_dest_ring[pdev->pdev_id],
  3238. REO_DST, pdev->pdev_id);
  3239. }
  3240. dp_srng_deinit(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  3241. dp_rxdma_ring_cleanup(soc, pdev);
  3242. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3243. dp_mon_ring_deinit(soc, pdev, mac_id);
  3244. dp_srng_deinit(soc, &pdev->rxdma_err_dst_ring[mac_id],
  3245. RXDMA_DST, 0);
  3246. }
  3247. curr_nbuf = pdev->invalid_peer_head_msdu;
  3248. while (curr_nbuf) {
  3249. next_nbuf = qdf_nbuf_next(curr_nbuf);
  3250. qdf_nbuf_free(curr_nbuf);
  3251. curr_nbuf = next_nbuf;
  3252. }
  3253. pdev->invalid_peer_head_msdu = NULL;
  3254. pdev->invalid_peer_tail_msdu = NULL;
  3255. dp_htt_ppdu_stats_detach(pdev);
  3256. qdf_nbuf_free(pdev->sojourn_buf);
  3257. dp_cal_client_detach(&pdev->cal_client_ctx);
  3258. soc->pdev_count--;
  3259. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  3260. qdf_mem_free(pdev->invalid_peer);
  3261. qdf_mem_free(pdev->dp_txrx_handle);
  3262. dp_pdev_mem_reset(pdev);
  3263. }
  3264. /**
  3265. * dp_pdev_deinit_wifi3() - Deinit txrx pdev
  3266. * @txrx_pdev: Datapath PDEV handle
  3267. * @force: Force deinit
  3268. *
  3269. * Return: None
  3270. */
  3271. static void dp_pdev_deinit_wifi3(struct cdp_pdev *txrx_pdev, int force)
  3272. {
  3273. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3274. struct dp_soc *soc = pdev->soc;
  3275. soc->dp_soc_reinit = TRUE;
  3276. dp_pdev_deinit(txrx_pdev, force);
  3277. }
  3278. /*
  3279. * dp_pdev_detach() - Complete rest of pdev detach
  3280. * @txrx_pdev: Datapath PDEV handle
  3281. * @force: Force deinit
  3282. *
  3283. * Return: None
  3284. */
  3285. static void dp_pdev_detach(struct cdp_pdev *txrx_pdev, int force)
  3286. {
  3287. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3288. struct dp_soc *soc = pdev->soc;
  3289. struct rx_desc_pool *rx_desc_pool;
  3290. int mac_id, mac_for_pdev;
  3291. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3292. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  3293. TCL_DATA, pdev->pdev_id);
  3294. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  3295. WBM2SW_RELEASE, pdev->pdev_id);
  3296. }
  3297. dp_mon_link_free(pdev);
  3298. dp_tx_ppdu_stats_detach(pdev);
  3299. /* Cleanup per PDEV REO rings if configured */
  3300. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3301. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  3302. REO_DST, pdev->pdev_id);
  3303. }
  3304. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  3305. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3306. dp_mon_ring_cleanup(soc, pdev, mac_id);
  3307. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  3308. RXDMA_DST, 0);
  3309. if (dp_is_soc_reinit(soc)) {
  3310. mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  3311. pdev->pdev_id);
  3312. rx_desc_pool = &soc->rx_desc_status[mac_for_pdev];
  3313. dp_rx_desc_free_array(soc, rx_desc_pool);
  3314. rx_desc_pool = &soc->rx_desc_mon[mac_for_pdev];
  3315. dp_rx_desc_free_array(soc, rx_desc_pool);
  3316. }
  3317. }
  3318. if (dp_is_soc_reinit(soc)) {
  3319. rx_desc_pool = &soc->rx_desc_buf[pdev->pdev_id];
  3320. dp_rx_desc_free_array(soc, rx_desc_pool);
  3321. }
  3322. soc->pdev_list[pdev->pdev_id] = NULL;
  3323. qdf_mem_free(pdev);
  3324. }
  3325. /*
  3326. * dp_pdev_detach_wifi3() - detach txrx pdev
  3327. * @txrx_pdev: Datapath PDEV handle
  3328. * @force: Force detach
  3329. *
  3330. * Return: None
  3331. */
  3332. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  3333. {
  3334. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3335. struct dp_soc *soc = pdev->soc;
  3336. if (dp_is_soc_reinit(soc)) {
  3337. dp_pdev_detach(txrx_pdev, force);
  3338. } else {
  3339. dp_pdev_deinit(txrx_pdev, force);
  3340. dp_pdev_detach(txrx_pdev, force);
  3341. }
  3342. }
  3343. /*
  3344. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  3345. * @soc: DP SOC handle
  3346. */
  3347. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  3348. {
  3349. struct reo_desc_list_node *desc;
  3350. struct dp_rx_tid *rx_tid;
  3351. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  3352. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  3353. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  3354. rx_tid = &desc->rx_tid;
  3355. qdf_mem_unmap_nbytes_single(soc->osdev,
  3356. rx_tid->hw_qdesc_paddr,
  3357. QDF_DMA_BIDIRECTIONAL,
  3358. rx_tid->hw_qdesc_alloc_size);
  3359. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  3360. qdf_mem_free(desc);
  3361. }
  3362. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  3363. qdf_list_destroy(&soc->reo_desc_freelist);
  3364. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  3365. }
  3366. /**
  3367. * dp_soc_mem_reset() - Reset Dp Soc memory
  3368. * @soc: DP handle
  3369. *
  3370. * Return: None
  3371. */
  3372. static void dp_soc_mem_reset(struct dp_soc *soc)
  3373. {
  3374. uint16_t len = 0;
  3375. uint8_t *dp_soc_offset = (uint8_t *)soc;
  3376. len = sizeof(struct dp_soc) -
  3377. offsetof(struct dp_soc, dp_soc_reinit) -
  3378. sizeof(soc->dp_soc_reinit);
  3379. dp_soc_offset = dp_soc_offset +
  3380. offsetof(struct dp_soc, dp_soc_reinit) +
  3381. sizeof(soc->dp_soc_reinit);
  3382. qdf_mem_zero(dp_soc_offset, len);
  3383. }
  3384. /**
  3385. * dp_soc_deinit() - Deinitialize txrx SOC
  3386. * @txrx_soc: Opaque DP SOC handle
  3387. *
  3388. * Return: None
  3389. */
  3390. static void dp_soc_deinit(void *txrx_soc)
  3391. {
  3392. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3393. int i;
  3394. qdf_atomic_set(&soc->cmn_init_done, 0);
  3395. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3396. if (soc->pdev_list[i])
  3397. dp_pdev_deinit((struct cdp_pdev *)
  3398. soc->pdev_list[i], 1);
  3399. }
  3400. qdf_flush_work(&soc->htt_stats.work);
  3401. qdf_disable_work(&soc->htt_stats.work);
  3402. /* Free pending htt stats messages */
  3403. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  3404. dp_reo_cmdlist_destroy(soc);
  3405. dp_peer_find_detach(soc);
  3406. /* Free the ring memories */
  3407. /* Common rings */
  3408. dp_srng_deinit(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3409. /* Tx data rings */
  3410. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3411. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3412. dp_srng_deinit(soc, &soc->tcl_data_ring[i],
  3413. TCL_DATA, i);
  3414. dp_srng_deinit(soc, &soc->tx_comp_ring[i],
  3415. WBM2SW_RELEASE, i);
  3416. }
  3417. }
  3418. /* TCL command and status rings */
  3419. dp_srng_deinit(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  3420. dp_srng_deinit(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3421. /* Rx data rings */
  3422. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3423. soc->num_reo_dest_rings =
  3424. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3425. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3426. /* TODO: Get number of rings and ring sizes
  3427. * from wlan_cfg
  3428. */
  3429. dp_srng_deinit(soc, &soc->reo_dest_ring[i],
  3430. REO_DST, i);
  3431. }
  3432. }
  3433. /* REO reinjection ring */
  3434. dp_srng_deinit(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3435. /* Rx release ring */
  3436. dp_srng_deinit(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3437. /* Rx exception ring */
  3438. /* TODO: Better to store ring_type and ring_num in
  3439. * dp_srng during setup
  3440. */
  3441. dp_srng_deinit(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3442. /* REO command and status rings */
  3443. dp_srng_deinit(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3444. dp_srng_deinit(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3445. dp_soc_wds_detach(soc);
  3446. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  3447. qdf_spinlock_destroy(&soc->htt_stats.lock);
  3448. htt_soc_htc_dealloc(soc->htt_handle);
  3449. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  3450. dp_reo_cmdlist_destroy(soc);
  3451. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  3452. dp_reo_desc_freelist_destroy(soc);
  3453. qdf_spinlock_destroy(&soc->ast_lock);
  3454. dp_soc_mem_reset(soc);
  3455. }
  3456. /**
  3457. * dp_soc_deinit_wifi3() - Deinitialize txrx SOC
  3458. * @txrx_soc: Opaque DP SOC handle
  3459. *
  3460. * Return: None
  3461. */
  3462. static void dp_soc_deinit_wifi3(void *txrx_soc)
  3463. {
  3464. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3465. soc->dp_soc_reinit = 1;
  3466. dp_soc_deinit(txrx_soc);
  3467. }
  3468. /*
  3469. * dp_soc_detach() - Detach rest of txrx SOC
  3470. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  3471. *
  3472. * Return: None
  3473. */
  3474. static void dp_soc_detach(void *txrx_soc)
  3475. {
  3476. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3477. int i;
  3478. qdf_atomic_set(&soc->cmn_init_done, 0);
  3479. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  3480. * SW descriptors
  3481. */
  3482. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3483. if (soc->pdev_list[i])
  3484. dp_pdev_detach((struct cdp_pdev *)
  3485. soc->pdev_list[i], 1);
  3486. }
  3487. /* Free the ring memories */
  3488. /* Common rings */
  3489. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3490. dp_tx_soc_detach(soc);
  3491. /* Tx data rings */
  3492. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  3493. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3494. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  3495. TCL_DATA, i);
  3496. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  3497. WBM2SW_RELEASE, i);
  3498. }
  3499. }
  3500. /* TCL command and status rings */
  3501. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  3502. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3503. /* Rx data rings */
  3504. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  3505. soc->num_reo_dest_rings =
  3506. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3507. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3508. /* TODO: Get number of rings and ring sizes
  3509. * from wlan_cfg
  3510. */
  3511. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  3512. REO_DST, i);
  3513. }
  3514. }
  3515. /* REO reinjection ring */
  3516. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3517. /* Rx release ring */
  3518. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3519. /* Rx exception ring */
  3520. /* TODO: Better to store ring_type and ring_num in
  3521. * dp_srng during setup
  3522. */
  3523. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3524. /* REO command and status rings */
  3525. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3526. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3527. dp_hw_link_desc_pool_cleanup(soc);
  3528. htt_soc_detach(soc->htt_handle);
  3529. soc->dp_soc_reinit = 0;
  3530. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  3531. qdf_mem_free(soc);
  3532. }
  3533. /*
  3534. * dp_soc_detach_wifi3() - Detach txrx SOC
  3535. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  3536. *
  3537. * Return: None
  3538. */
  3539. static void dp_soc_detach_wifi3(void *txrx_soc)
  3540. {
  3541. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  3542. if (dp_is_soc_reinit(soc)) {
  3543. dp_soc_detach(txrx_soc);
  3544. } else {
  3545. dp_soc_deinit(txrx_soc);
  3546. dp_soc_detach(txrx_soc);
  3547. }
  3548. }
  3549. #if !defined(DISABLE_MON_CONFIG)
  3550. /**
  3551. * dp_mon_htt_srng_setup() - Prepare HTT messages for Monitor rings
  3552. * @soc: soc handle
  3553. * @pdev: physical device handle
  3554. * @mac_id: ring number
  3555. * @mac_for_pdev: mac_id
  3556. *
  3557. * Return: non-zero for failure, zero for success
  3558. */
  3559. static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
  3560. struct dp_pdev *pdev,
  3561. int mac_id,
  3562. int mac_for_pdev)
  3563. {
  3564. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3565. if (soc->wlan_cfg_ctx->rxdma1_enable) {
  3566. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3567. pdev->rxdma_mon_buf_ring[mac_id]
  3568. .hal_srng,
  3569. RXDMA_MONITOR_BUF);
  3570. if (status != QDF_STATUS_SUCCESS) {
  3571. dp_err("Failed to send htt srng setup message for Rxdma mon buf ring");
  3572. return status;
  3573. }
  3574. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3575. pdev->rxdma_mon_dst_ring[mac_id]
  3576. .hal_srng,
  3577. RXDMA_MONITOR_DST);
  3578. if (status != QDF_STATUS_SUCCESS) {
  3579. dp_err("Failed to send htt srng setup message for Rxdma mon dst ring");
  3580. return status;
  3581. }
  3582. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3583. pdev->rxdma_mon_status_ring[mac_id]
  3584. .hal_srng,
  3585. RXDMA_MONITOR_STATUS);
  3586. if (status != QDF_STATUS_SUCCESS) {
  3587. dp_err("Failed to send htt srng setup message for Rxdma mon status ring");
  3588. return status;
  3589. }
  3590. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3591. pdev->rxdma_mon_desc_ring[mac_id]
  3592. .hal_srng,
  3593. RXDMA_MONITOR_DESC);
  3594. if (status != QDF_STATUS_SUCCESS) {
  3595. dp_err("Failed to send htt srng message for Rxdma mon desc ring");
  3596. return status;
  3597. }
  3598. } else {
  3599. status = htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3600. pdev->rxdma_mon_status_ring[mac_id]
  3601. .hal_srng,
  3602. RXDMA_MONITOR_STATUS);
  3603. if (status != QDF_STATUS_SUCCESS) {
  3604. dp_err("Failed to send htt srng setup message for Rxdma mon status ring");
  3605. return status;
  3606. }
  3607. }
  3608. return status;
  3609. }
  3610. #else
  3611. static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
  3612. struct dp_pdev *pdev,
  3613. int mac_id,
  3614. int mac_for_pdev)
  3615. {
  3616. return QDF_STATUS_SUCCESS;
  3617. }
  3618. #endif
  3619. /*
  3620. * dp_rxdma_ring_config() - configure the RX DMA rings
  3621. *
  3622. * This function is used to configure the MAC rings.
  3623. * On MCL host provides buffers in Host2FW ring
  3624. * FW refills (copies) buffers to the ring and updates
  3625. * ring_idx in register
  3626. *
  3627. * @soc: data path SoC handle
  3628. *
  3629. * Return: zero on success, non-zero on failure
  3630. */
  3631. #ifdef QCA_HOST2FW_RXBUF_RING
  3632. static QDF_STATUS dp_rxdma_ring_config(struct dp_soc *soc)
  3633. {
  3634. int i;
  3635. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3636. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3637. struct dp_pdev *pdev = soc->pdev_list[i];
  3638. if (pdev) {
  3639. int mac_id;
  3640. bool dbs_enable = 0;
  3641. int max_mac_rings =
  3642. wlan_cfg_get_num_mac_rings
  3643. (pdev->wlan_cfg_ctx);
  3644. htt_srng_setup(soc->htt_handle, 0,
  3645. pdev->rx_refill_buf_ring.hal_srng,
  3646. RXDMA_BUF);
  3647. if (pdev->rx_refill_buf_ring2.hal_srng)
  3648. htt_srng_setup(soc->htt_handle, 0,
  3649. pdev->rx_refill_buf_ring2.hal_srng,
  3650. RXDMA_BUF);
  3651. if (soc->cdp_soc.ol_ops->
  3652. is_hw_dbs_2x2_capable) {
  3653. dbs_enable = soc->cdp_soc.ol_ops->
  3654. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  3655. }
  3656. if (dbs_enable) {
  3657. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3658. QDF_TRACE_LEVEL_ERROR,
  3659. FL("DBS enabled max_mac_rings %d"),
  3660. max_mac_rings);
  3661. } else {
  3662. max_mac_rings = 1;
  3663. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3664. QDF_TRACE_LEVEL_ERROR,
  3665. FL("DBS disabled, max_mac_rings %d"),
  3666. max_mac_rings);
  3667. }
  3668. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3669. FL("pdev_id %d max_mac_rings %d"),
  3670. pdev->pdev_id, max_mac_rings);
  3671. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  3672. int mac_for_pdev = dp_get_mac_id_for_pdev(
  3673. mac_id, pdev->pdev_id);
  3674. QDF_TRACE(QDF_MODULE_ID_TXRX,
  3675. QDF_TRACE_LEVEL_ERROR,
  3676. FL("mac_id %d"), mac_for_pdev);
  3677. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3678. pdev->rx_mac_buf_ring[mac_id]
  3679. .hal_srng,
  3680. RXDMA_BUF);
  3681. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3682. pdev->rxdma_err_dst_ring[mac_id]
  3683. .hal_srng,
  3684. RXDMA_DST);
  3685. /* Configure monitor mode rings */
  3686. status = dp_mon_htt_srng_setup(soc, pdev,
  3687. mac_id,
  3688. mac_for_pdev);
  3689. if (status != QDF_STATUS_SUCCESS) {
  3690. dp_err("Failed to send htt monitor messages to target");
  3691. return status;
  3692. }
  3693. }
  3694. }
  3695. }
  3696. /*
  3697. * Timer to reap rxdma status rings.
  3698. * Needed until we enable ppdu end interrupts
  3699. */
  3700. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  3701. dp_service_mon_rings, (void *)soc,
  3702. QDF_TIMER_TYPE_WAKE_APPS);
  3703. soc->reap_timer_init = 1;
  3704. return status;
  3705. }
  3706. #else
  3707. /* This is only for WIN */
  3708. static QDF_STATUS dp_rxdma_ring_config(struct dp_soc *soc)
  3709. {
  3710. int i;
  3711. int mac_id;
  3712. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3713. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3714. struct dp_pdev *pdev = soc->pdev_list[i];
  3715. if (!pdev)
  3716. continue;
  3717. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3718. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  3719. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3720. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  3721. #ifndef DISABLE_MON_CONFIG
  3722. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3723. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3724. RXDMA_MONITOR_BUF);
  3725. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3726. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  3727. RXDMA_MONITOR_DST);
  3728. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3729. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3730. RXDMA_MONITOR_STATUS);
  3731. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3732. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  3733. RXDMA_MONITOR_DESC);
  3734. #endif
  3735. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  3736. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  3737. RXDMA_DST);
  3738. }
  3739. }
  3740. return status;
  3741. }
  3742. #endif
  3743. #ifdef NO_RX_PKT_HDR_TLV
  3744. static QDF_STATUS
  3745. dp_rxdma_ring_sel_cfg(struct dp_soc *soc)
  3746. {
  3747. int i;
  3748. int mac_id;
  3749. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  3750. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3751. htt_tlv_filter.mpdu_start = 1;
  3752. htt_tlv_filter.msdu_start = 1;
  3753. htt_tlv_filter.mpdu_end = 1;
  3754. htt_tlv_filter.msdu_end = 1;
  3755. htt_tlv_filter.attention = 1;
  3756. htt_tlv_filter.packet = 1;
  3757. htt_tlv_filter.packet_header = 0;
  3758. htt_tlv_filter.ppdu_start = 0;
  3759. htt_tlv_filter.ppdu_end = 0;
  3760. htt_tlv_filter.ppdu_end_user_stats = 0;
  3761. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3762. htt_tlv_filter.ppdu_end_status_done = 0;
  3763. htt_tlv_filter.enable_fp = 1;
  3764. htt_tlv_filter.enable_md = 0;
  3765. htt_tlv_filter.enable_md = 0;
  3766. htt_tlv_filter.enable_mo = 0;
  3767. htt_tlv_filter.fp_mgmt_filter = 0;
  3768. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  3769. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  3770. FILTER_DATA_MCAST |
  3771. FILTER_DATA_DATA);
  3772. htt_tlv_filter.mo_mgmt_filter = 0;
  3773. htt_tlv_filter.mo_ctrl_filter = 0;
  3774. htt_tlv_filter.mo_data_filter = 0;
  3775. htt_tlv_filter.md_data_filter = 0;
  3776. htt_tlv_filter.offset_valid = true;
  3777. htt_tlv_filter.rx_packet_offset = RX_PKT_TLVS_LEN;
  3778. /*Not subscribing rx_pkt_header*/
  3779. htt_tlv_filter.rx_header_offset = 0;
  3780. htt_tlv_filter.rx_mpdu_start_offset =
  3781. HAL_RX_PKT_TLV_MPDU_START_OFFSET(soc->hal_soc);
  3782. htt_tlv_filter.rx_mpdu_end_offset =
  3783. HAL_RX_PKT_TLV_MPDU_END_OFFSET(soc->hal_soc);
  3784. htt_tlv_filter.rx_msdu_start_offset =
  3785. HAL_RX_PKT_TLV_MSDU_START_OFFSET(soc->hal_soc);
  3786. htt_tlv_filter.rx_msdu_end_offset =
  3787. HAL_RX_PKT_TLV_MSDU_END_OFFSET(soc->hal_soc);
  3788. htt_tlv_filter.rx_attn_offset =
  3789. HAL_RX_PKT_TLV_ATTN_OFFSET(soc->hal_soc);
  3790. for (i = 0; i < MAX_PDEV_CNT; i++) {
  3791. struct dp_pdev *pdev = soc->pdev_list[i];
  3792. if (!pdev)
  3793. continue;
  3794. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3795. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  3796. pdev->pdev_id);
  3797. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3798. pdev->rx_refill_buf_ring.hal_srng,
  3799. RXDMA_BUF, RX_BUFFER_SIZE,
  3800. &htt_tlv_filter);
  3801. }
  3802. }
  3803. return status;
  3804. }
  3805. #else
  3806. static QDF_STATUS
  3807. dp_rxdma_ring_sel_cfg(struct dp_soc *soc)
  3808. {
  3809. return QDF_STATUS_SUCCESS;
  3810. }
  3811. #endif
  3812. /*
  3813. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  3814. * @cdp_soc: Opaque Datapath SOC handle
  3815. *
  3816. * Return: zero on success, non-zero on failure
  3817. */
  3818. static QDF_STATUS
  3819. dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  3820. {
  3821. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  3822. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3823. htt_soc_attach_target(soc->htt_handle);
  3824. status = dp_rxdma_ring_config(soc);
  3825. if (status != QDF_STATUS_SUCCESS) {
  3826. dp_err("Failed to send htt srng setup messages to target");
  3827. return status;
  3828. }
  3829. status = dp_rxdma_ring_sel_cfg(soc);
  3830. if (status != QDF_STATUS_SUCCESS) {
  3831. dp_err("Failed to send htt ring config message to target");
  3832. return status;
  3833. }
  3834. DP_STATS_INIT(soc);
  3835. /* initialize work queue for stats processing */
  3836. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  3837. return QDF_STATUS_SUCCESS;
  3838. }
  3839. /*
  3840. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  3841. * @txrx_soc: Datapath SOC handle
  3842. */
  3843. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  3844. {
  3845. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3846. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  3847. }
  3848. /*
  3849. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  3850. * @txrx_soc: Datapath SOC handle
  3851. * @nss_cfg: nss config
  3852. */
  3853. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  3854. {
  3855. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  3856. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  3857. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  3858. /*
  3859. * TODO: masked out based on the per offloaded radio
  3860. */
  3861. switch (config) {
  3862. case dp_nss_cfg_default:
  3863. break;
  3864. case dp_nss_cfg_dbdc:
  3865. case dp_nss_cfg_dbtc:
  3866. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  3867. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  3868. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  3869. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  3870. break;
  3871. default:
  3872. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3873. "Invalid offload config %d", config);
  3874. }
  3875. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3876. FL("nss-wifi<0> nss config is enabled"));
  3877. }
  3878. /*
  3879. * dp_vdev_attach_wifi3() - attach txrx vdev
  3880. * @txrx_pdev: Datapath PDEV handle
  3881. * @vdev_mac_addr: MAC address of the virtual interface
  3882. * @vdev_id: VDEV Id
  3883. * @wlan_op_mode: VDEV operating mode
  3884. *
  3885. * Return: DP VDEV handle on success, NULL on failure
  3886. */
  3887. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  3888. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  3889. {
  3890. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  3891. struct dp_soc *soc = pdev->soc;
  3892. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  3893. if (!vdev) {
  3894. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3895. FL("DP VDEV memory allocation failed"));
  3896. goto fail0;
  3897. }
  3898. vdev->pdev = pdev;
  3899. vdev->vdev_id = vdev_id;
  3900. vdev->opmode = op_mode;
  3901. vdev->osdev = soc->osdev;
  3902. vdev->osif_rx = NULL;
  3903. vdev->osif_rsim_rx_decap = NULL;
  3904. vdev->osif_get_key = NULL;
  3905. vdev->osif_rx_mon = NULL;
  3906. vdev->osif_tx_free_ext = NULL;
  3907. vdev->osif_vdev = NULL;
  3908. vdev->delete.pending = 0;
  3909. vdev->safemode = 0;
  3910. vdev->drop_unenc = 1;
  3911. vdev->sec_type = cdp_sec_type_none;
  3912. #ifdef notyet
  3913. vdev->filters_num = 0;
  3914. #endif
  3915. qdf_mem_copy(
  3916. &vdev->mac_addr.raw[0], vdev_mac_addr, QDF_MAC_ADDR_SIZE);
  3917. /* TODO: Initialize default HTT meta data that will be used in
  3918. * TCL descriptors for packets transmitted from this VDEV
  3919. */
  3920. TAILQ_INIT(&vdev->peer_list);
  3921. if ((soc->intr_mode == DP_INTR_POLL) &&
  3922. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  3923. if ((pdev->vdev_count == 0) ||
  3924. (wlan_op_mode_monitor == vdev->opmode))
  3925. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3926. }
  3927. if (wlan_op_mode_monitor == vdev->opmode) {
  3928. pdev->monitor_vdev = vdev;
  3929. return (struct cdp_vdev *)vdev;
  3930. }
  3931. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3932. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  3933. vdev->dscp_tid_map_id = 0;
  3934. vdev->mcast_enhancement_en = 0;
  3935. vdev->raw_mode_war = wlan_cfg_get_raw_mode_war(soc->wlan_cfg_ctx);
  3936. vdev->prev_tx_enq_tstamp = 0;
  3937. vdev->prev_rx_deliver_tstamp = 0;
  3938. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3939. /* add this vdev into the pdev's list */
  3940. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  3941. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3942. pdev->vdev_count++;
  3943. dp_tx_vdev_attach(vdev);
  3944. if (pdev->vdev_count == 1)
  3945. dp_lro_hash_setup(soc, pdev);
  3946. dp_info("Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  3947. DP_STATS_INIT(vdev);
  3948. if (wlan_op_mode_sta == vdev->opmode)
  3949. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  3950. vdev->mac_addr.raw,
  3951. NULL);
  3952. return (struct cdp_vdev *)vdev;
  3953. fail0:
  3954. return NULL;
  3955. }
  3956. /**
  3957. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  3958. * @vdev: Datapath VDEV handle
  3959. * @osif_vdev: OSIF vdev handle
  3960. * @ctrl_vdev: UMAC vdev handle
  3961. * @txrx_ops: Tx and Rx operations
  3962. *
  3963. * Return: DP VDEV handle on success, NULL on failure
  3964. */
  3965. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  3966. void *osif_vdev, struct cdp_ctrl_objmgr_vdev *ctrl_vdev,
  3967. struct ol_txrx_ops *txrx_ops)
  3968. {
  3969. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3970. vdev->osif_vdev = osif_vdev;
  3971. vdev->ctrl_vdev = ctrl_vdev;
  3972. vdev->osif_rx = txrx_ops->rx.rx;
  3973. vdev->osif_rx_stack = txrx_ops->rx.rx_stack;
  3974. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  3975. vdev->osif_get_key = txrx_ops->get_key;
  3976. vdev->osif_rx_mon = txrx_ops->rx.mon;
  3977. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  3978. vdev->tx_comp = txrx_ops->tx.tx_comp;
  3979. #ifdef notyet
  3980. #if ATH_SUPPORT_WAPI
  3981. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  3982. #endif
  3983. #endif
  3984. #ifdef UMAC_SUPPORT_PROXY_ARP
  3985. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  3986. #endif
  3987. vdev->me_convert = txrx_ops->me_convert;
  3988. /* TODO: Enable the following once Tx code is integrated */
  3989. if (vdev->mesh_vdev)
  3990. txrx_ops->tx.tx = dp_tx_send_mesh;
  3991. else
  3992. txrx_ops->tx.tx = dp_tx_send;
  3993. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  3994. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  3995. "DP Vdev Register success");
  3996. }
  3997. /**
  3998. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  3999. * @vdev: Datapath VDEV handle
  4000. * @unmap_only: Flag to indicate "only unmap"
  4001. *
  4002. * Return: void
  4003. */
  4004. static void dp_vdev_flush_peers(struct cdp_vdev *vdev_handle, bool unmap_only)
  4005. {
  4006. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4007. struct dp_pdev *pdev = vdev->pdev;
  4008. struct dp_soc *soc = pdev->soc;
  4009. struct dp_peer *peer;
  4010. uint16_t *peer_ids;
  4011. struct dp_ast_entry *ase, *tmp_ase;
  4012. uint8_t i = 0, j = 0;
  4013. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  4014. if (!peer_ids) {
  4015. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4016. "DP alloc failure - unable to flush peers");
  4017. return;
  4018. }
  4019. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4020. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4021. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  4022. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  4023. if (j < soc->max_peers)
  4024. peer_ids[j++] = peer->peer_ids[i];
  4025. }
  4026. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4027. for (i = 0; i < j ; i++) {
  4028. if (unmap_only) {
  4029. peer = __dp_peer_find_by_id(soc, peer_ids[i]);
  4030. if (peer) {
  4031. if (soc->is_peer_map_unmap_v2) {
  4032. /* free AST entries of peer before
  4033. * release peer reference
  4034. */
  4035. DP_PEER_ITERATE_ASE_LIST(peer, ase,
  4036. tmp_ase) {
  4037. dp_rx_peer_unmap_handler
  4038. (soc, peer_ids[i],
  4039. vdev->vdev_id,
  4040. ase->mac_addr.raw,
  4041. 1);
  4042. }
  4043. }
  4044. dp_rx_peer_unmap_handler(soc, peer_ids[i],
  4045. vdev->vdev_id,
  4046. peer->mac_addr.raw,
  4047. 0);
  4048. }
  4049. } else {
  4050. peer = dp_peer_find_by_id(soc, peer_ids[i]);
  4051. if (peer) {
  4052. dp_info("peer: %pM is getting flush",
  4053. peer->mac_addr.raw);
  4054. if (soc->is_peer_map_unmap_v2) {
  4055. /* free AST entries of peer before
  4056. * release peer reference
  4057. */
  4058. DP_PEER_ITERATE_ASE_LIST(peer, ase,
  4059. tmp_ase) {
  4060. dp_rx_peer_unmap_handler
  4061. (soc, peer_ids[i],
  4062. vdev->vdev_id,
  4063. ase->mac_addr.raw,
  4064. 1);
  4065. }
  4066. }
  4067. dp_peer_delete_wifi3(peer, 0);
  4068. /*
  4069. * we need to call dp_peer_unref_del_find_by_id
  4070. * to remove additional ref count incremented
  4071. * by dp_peer_find_by_id() call.
  4072. *
  4073. * Hold the ref count while executing
  4074. * dp_peer_delete_wifi3() call.
  4075. *
  4076. */
  4077. dp_peer_unref_del_find_by_id(peer);
  4078. dp_rx_peer_unmap_handler(soc, peer_ids[i],
  4079. vdev->vdev_id,
  4080. peer->mac_addr.raw, 0);
  4081. }
  4082. }
  4083. }
  4084. qdf_mem_free(peer_ids);
  4085. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4086. FL("Flushed peers for vdev object %pK "), vdev);
  4087. }
  4088. /*
  4089. * dp_vdev_detach_wifi3() - Detach txrx vdev
  4090. * @txrx_vdev: Datapath VDEV handle
  4091. * @callback: Callback OL_IF on completion of detach
  4092. * @cb_context: Callback context
  4093. *
  4094. */
  4095. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  4096. ol_txrx_vdev_delete_cb callback, void *cb_context)
  4097. {
  4098. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4099. struct dp_pdev *pdev;
  4100. struct dp_soc *soc;
  4101. struct dp_neighbour_peer *peer = NULL;
  4102. struct dp_neighbour_peer *temp_peer = NULL;
  4103. /* preconditions */
  4104. qdf_assert_always(vdev);
  4105. pdev = vdev->pdev;
  4106. soc = pdev->soc;
  4107. if (wlan_op_mode_monitor == vdev->opmode)
  4108. goto free_vdev;
  4109. if (wlan_op_mode_sta == vdev->opmode)
  4110. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  4111. /*
  4112. * If Target is hung, flush all peers before detaching vdev
  4113. * this will free all references held due to missing
  4114. * unmap commands from Target
  4115. */
  4116. if (!hif_is_target_ready(HIF_GET_SOFTC(soc->hif_handle)))
  4117. dp_vdev_flush_peers((struct cdp_vdev *)vdev, false);
  4118. /*
  4119. * Use peer_ref_mutex while accessing peer_list, in case
  4120. * a peer is in the process of being removed from the list.
  4121. */
  4122. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4123. /* check that the vdev has no peers allocated */
  4124. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  4125. /* debug print - will be removed later */
  4126. dp_warn("not deleting vdev object %pK (%pM) until deletion finishes for all its peers",
  4127. vdev, vdev->mac_addr.raw);
  4128. /* indicate that the vdev needs to be deleted */
  4129. vdev->delete.pending = 1;
  4130. vdev->delete.callback = callback;
  4131. vdev->delete.context = cb_context;
  4132. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4133. return;
  4134. }
  4135. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4136. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4137. if (!soc->hw_nac_monitor_support) {
  4138. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  4139. neighbour_peer_list_elem) {
  4140. QDF_ASSERT(peer->vdev != vdev);
  4141. }
  4142. } else {
  4143. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  4144. neighbour_peer_list_elem, temp_peer) {
  4145. if (peer->vdev == vdev) {
  4146. TAILQ_REMOVE(&pdev->neighbour_peers_list, peer,
  4147. neighbour_peer_list_elem);
  4148. qdf_mem_free(peer);
  4149. }
  4150. }
  4151. }
  4152. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4153. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4154. dp_tx_vdev_detach(vdev);
  4155. /* remove the vdev from its parent pdev's list */
  4156. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  4157. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4158. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  4159. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4160. free_vdev:
  4161. qdf_mem_free(vdev);
  4162. if (callback)
  4163. callback(cb_context);
  4164. }
  4165. /*
  4166. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  4167. * @soc - datapath soc handle
  4168. * @peer - datapath peer handle
  4169. *
  4170. * Delete the AST entries belonging to a peer
  4171. */
  4172. #ifdef FEATURE_AST
  4173. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  4174. struct dp_peer *peer)
  4175. {
  4176. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  4177. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  4178. dp_peer_del_ast(soc, ast_entry);
  4179. peer->self_ast_entry = NULL;
  4180. }
  4181. #else
  4182. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  4183. struct dp_peer *peer)
  4184. {
  4185. }
  4186. #endif
  4187. #if ATH_SUPPORT_WRAP
  4188. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  4189. uint8_t *peer_mac_addr)
  4190. {
  4191. struct dp_peer *peer;
  4192. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  4193. 0, vdev->vdev_id);
  4194. if (!peer)
  4195. return NULL;
  4196. if (peer->bss_peer)
  4197. return peer;
  4198. dp_peer_unref_delete(peer);
  4199. return NULL;
  4200. }
  4201. #else
  4202. static inline struct dp_peer *dp_peer_can_reuse(struct dp_vdev *vdev,
  4203. uint8_t *peer_mac_addr)
  4204. {
  4205. struct dp_peer *peer;
  4206. peer = dp_peer_find_hash_find(vdev->pdev->soc, peer_mac_addr,
  4207. 0, vdev->vdev_id);
  4208. if (!peer)
  4209. return NULL;
  4210. if (peer->bss_peer && (peer->vdev->vdev_id == vdev->vdev_id))
  4211. return peer;
  4212. dp_peer_unref_delete(peer);
  4213. return NULL;
  4214. }
  4215. #endif
  4216. #ifdef FEATURE_AST
  4217. static inline void dp_peer_ast_handle_roam_del(struct dp_soc *soc,
  4218. struct dp_pdev *pdev,
  4219. uint8_t *peer_mac_addr)
  4220. {
  4221. struct dp_ast_entry *ast_entry;
  4222. qdf_spin_lock_bh(&soc->ast_lock);
  4223. if (soc->ast_override_support)
  4224. ast_entry = dp_peer_ast_hash_find_by_pdevid(soc, peer_mac_addr,
  4225. pdev->pdev_id);
  4226. else
  4227. ast_entry = dp_peer_ast_hash_find_soc(soc, peer_mac_addr);
  4228. if (ast_entry && ast_entry->next_hop &&
  4229. !ast_entry->delete_in_progress)
  4230. dp_peer_del_ast(soc, ast_entry);
  4231. qdf_spin_unlock_bh(&soc->ast_lock);
  4232. }
  4233. #endif
  4234. #ifdef PEER_CACHE_RX_PKTS
  4235. static inline void dp_peer_rx_bufq_resources_init(struct dp_peer *peer)
  4236. {
  4237. qdf_spinlock_create(&peer->bufq_info.bufq_lock);
  4238. peer->bufq_info.thresh = DP_RX_CACHED_BUFQ_THRESH;
  4239. qdf_list_create(&peer->bufq_info.cached_bufq, DP_RX_CACHED_BUFQ_THRESH);
  4240. }
  4241. #else
  4242. static inline void dp_peer_rx_bufq_resources_init(struct dp_peer *peer)
  4243. {
  4244. }
  4245. #endif
  4246. /*
  4247. * dp_peer_create_wifi3() - attach txrx peer
  4248. * @txrx_vdev: Datapath VDEV handle
  4249. * @peer_mac_addr: Peer MAC address
  4250. *
  4251. * Return: DP peeer handle on success, NULL on failure
  4252. */
  4253. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  4254. uint8_t *peer_mac_addr, struct cdp_ctrl_objmgr_peer *ctrl_peer)
  4255. {
  4256. struct dp_peer *peer;
  4257. int i;
  4258. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4259. struct dp_pdev *pdev;
  4260. struct dp_soc *soc;
  4261. struct cdp_peer_cookie peer_cookie;
  4262. enum cdp_txrx_ast_entry_type ast_type = CDP_TXRX_AST_TYPE_STATIC;
  4263. /* preconditions */
  4264. qdf_assert(vdev);
  4265. qdf_assert(peer_mac_addr);
  4266. pdev = vdev->pdev;
  4267. soc = pdev->soc;
  4268. /*
  4269. * If a peer entry with given MAC address already exists,
  4270. * reuse the peer and reset the state of peer.
  4271. */
  4272. peer = dp_peer_can_reuse(vdev, peer_mac_addr);
  4273. if (peer) {
  4274. qdf_atomic_init(&peer->is_default_route_set);
  4275. dp_peer_cleanup(vdev, peer);
  4276. qdf_spin_lock_bh(&soc->ast_lock);
  4277. dp_peer_delete_ast_entries(soc, peer);
  4278. peer->delete_in_progress = false;
  4279. qdf_spin_unlock_bh(&soc->ast_lock);
  4280. if ((vdev->opmode == wlan_op_mode_sta) &&
  4281. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  4282. QDF_MAC_ADDR_SIZE)) {
  4283. ast_type = CDP_TXRX_AST_TYPE_SELF;
  4284. }
  4285. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  4286. /*
  4287. * Control path maintains a node count which is incremented
  4288. * for every new peer create command. Since new peer is not being
  4289. * created and earlier reference is reused here,
  4290. * peer_unref_delete event is sent to control path to
  4291. * increment the count back.
  4292. */
  4293. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  4294. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4295. peer->mac_addr.raw, vdev->mac_addr.raw,
  4296. vdev->opmode, peer->ctrl_peer, ctrl_peer);
  4297. }
  4298. peer->ctrl_peer = ctrl_peer;
  4299. dp_local_peer_id_alloc(pdev, peer);
  4300. DP_STATS_INIT(peer);
  4301. DP_STATS_UPD(peer, rx.avg_rssi, INVALID_RSSI);
  4302. return (void *)peer;
  4303. } else {
  4304. /*
  4305. * When a STA roams from RPTR AP to ROOT AP and vice versa, we
  4306. * need to remove the AST entry which was earlier added as a WDS
  4307. * entry.
  4308. * If an AST entry exists, but no peer entry exists with a given
  4309. * MAC addresses, we could deduce it as a WDS entry
  4310. */
  4311. dp_peer_ast_handle_roam_del(soc, pdev, peer_mac_addr);
  4312. }
  4313. #ifdef notyet
  4314. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  4315. soc->mempool_ol_ath_peer);
  4316. #else
  4317. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  4318. #endif
  4319. if (!peer)
  4320. return NULL; /* failure */
  4321. qdf_mem_zero(peer, sizeof(struct dp_peer));
  4322. TAILQ_INIT(&peer->ast_entry_list);
  4323. /* store provided params */
  4324. peer->vdev = vdev;
  4325. peer->ctrl_peer = ctrl_peer;
  4326. if ((vdev->opmode == wlan_op_mode_sta) &&
  4327. !qdf_mem_cmp(peer_mac_addr, &vdev->mac_addr.raw[0],
  4328. QDF_MAC_ADDR_SIZE)) {
  4329. ast_type = CDP_TXRX_AST_TYPE_SELF;
  4330. }
  4331. dp_peer_add_ast(soc, peer, peer_mac_addr, ast_type, 0);
  4332. qdf_spinlock_create(&peer->peer_info_lock);
  4333. dp_peer_rx_bufq_resources_init(peer);
  4334. qdf_mem_copy(
  4335. &peer->mac_addr.raw[0], peer_mac_addr, QDF_MAC_ADDR_SIZE);
  4336. /* TODO: See of rx_opt_proc is really required */
  4337. peer->rx_opt_proc = soc->rx_opt_proc;
  4338. /* initialize the peer_id */
  4339. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  4340. peer->peer_ids[i] = HTT_INVALID_PEER;
  4341. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4342. qdf_atomic_init(&peer->ref_cnt);
  4343. /* keep one reference for attach */
  4344. qdf_atomic_inc(&peer->ref_cnt);
  4345. /* add this peer into the vdev's list */
  4346. if (wlan_op_mode_sta == vdev->opmode)
  4347. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  4348. else
  4349. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  4350. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4351. /* TODO: See if hash based search is required */
  4352. dp_peer_find_hash_add(soc, peer);
  4353. /* Initialize the peer state */
  4354. peer->state = OL_TXRX_PEER_STATE_DISC;
  4355. dp_info("vdev %pK created peer %pK (%pM) ref_cnt: %d",
  4356. vdev, peer, peer->mac_addr.raw,
  4357. qdf_atomic_read(&peer->ref_cnt));
  4358. /*
  4359. * For every peer MAp message search and set if bss_peer
  4360. */
  4361. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  4362. dp_info("vdev bss_peer!!");
  4363. peer->bss_peer = 1;
  4364. vdev->vap_bss_peer = peer;
  4365. }
  4366. for (i = 0; i < DP_MAX_TIDS; i++)
  4367. qdf_spinlock_create(&peer->rx_tid[i].tid_lock);
  4368. peer->valid = 1;
  4369. dp_local_peer_id_alloc(pdev, peer);
  4370. DP_STATS_INIT(peer);
  4371. DP_STATS_UPD(peer, rx.avg_rssi, INVALID_RSSI);
  4372. qdf_mem_copy(peer_cookie.mac_addr, peer->mac_addr.raw,
  4373. QDF_MAC_ADDR_SIZE);
  4374. peer_cookie.ctx = NULL;
  4375. peer_cookie.cookie = pdev->next_peer_cookie++;
  4376. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  4377. dp_wdi_event_handler(WDI_EVENT_PEER_CREATE, pdev->soc,
  4378. (void *)&peer_cookie,
  4379. peer->peer_ids[0], WDI_NO_VAL, pdev->pdev_id);
  4380. #endif
  4381. if (soc->wlanstats_enabled) {
  4382. if (!peer_cookie.ctx) {
  4383. pdev->next_peer_cookie--;
  4384. qdf_err("Failed to initialize peer rate stats");
  4385. } else {
  4386. peer->wlanstats_ctx = (void *)peer_cookie.ctx;
  4387. }
  4388. }
  4389. return (void *)peer;
  4390. }
  4391. /*
  4392. * dp_vdev_get_default_reo_hash() - get reo dest ring and hash values for a vdev
  4393. * @vdev: Datapath VDEV handle
  4394. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4395. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4396. *
  4397. * Return: None
  4398. */
  4399. static
  4400. void dp_vdev_get_default_reo_hash(struct dp_vdev *vdev,
  4401. enum cdp_host_reo_dest_ring *reo_dest,
  4402. bool *hash_based)
  4403. {
  4404. struct dp_soc *soc;
  4405. struct dp_pdev *pdev;
  4406. pdev = vdev->pdev;
  4407. soc = pdev->soc;
  4408. /*
  4409. * hash based steering is disabled for Radios which are offloaded
  4410. * to NSS
  4411. */
  4412. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  4413. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  4414. /*
  4415. * Below line of code will ensure the proper reo_dest ring is chosen
  4416. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  4417. */
  4418. *reo_dest = pdev->reo_dest;
  4419. }
  4420. #ifdef IPA_OFFLOAD
  4421. /*
  4422. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  4423. * @vdev: Datapath VDEV handle
  4424. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4425. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4426. *
  4427. * If IPA is enabled in ini, for SAP mode, disable hash based
  4428. * steering, use default reo_dst ring for RX. Use config values for other modes.
  4429. * Return: None
  4430. */
  4431. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  4432. enum cdp_host_reo_dest_ring *reo_dest,
  4433. bool *hash_based)
  4434. {
  4435. struct dp_soc *soc;
  4436. struct dp_pdev *pdev;
  4437. pdev = vdev->pdev;
  4438. soc = pdev->soc;
  4439. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  4440. /*
  4441. * If IPA is enabled, disable hash-based flow steering and set
  4442. * reo_dest_ring_4 as the REO ring to receive packets on.
  4443. * IPA is configured to reap reo_dest_ring_4.
  4444. *
  4445. * Note - REO DST indexes are from 0 - 3, while cdp_host_reo_dest_ring
  4446. * value enum value is from 1 - 4.
  4447. * Hence, *reo_dest = IPA_REO_DEST_RING_IDX + 1
  4448. */
  4449. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  4450. if (vdev->opmode == wlan_op_mode_ap) {
  4451. *reo_dest = IPA_REO_DEST_RING_IDX + 1;
  4452. *hash_based = 0;
  4453. }
  4454. }
  4455. }
  4456. #else
  4457. /*
  4458. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  4459. * @vdev: Datapath VDEV handle
  4460. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  4461. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  4462. *
  4463. * Use system config values for hash based steering.
  4464. * Return: None
  4465. */
  4466. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  4467. enum cdp_host_reo_dest_ring *reo_dest,
  4468. bool *hash_based)
  4469. {
  4470. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  4471. }
  4472. #endif /* IPA_OFFLOAD */
  4473. /*
  4474. * dp_peer_setup_wifi3() - initialize the peer
  4475. * @vdev_hdl: virtual device object
  4476. * @peer: Peer object
  4477. *
  4478. * Return: void
  4479. */
  4480. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  4481. {
  4482. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  4483. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4484. struct dp_pdev *pdev;
  4485. struct dp_soc *soc;
  4486. bool hash_based = 0;
  4487. enum cdp_host_reo_dest_ring reo_dest;
  4488. /* preconditions */
  4489. qdf_assert(vdev);
  4490. qdf_assert(peer);
  4491. pdev = vdev->pdev;
  4492. soc = pdev->soc;
  4493. peer->last_assoc_rcvd = 0;
  4494. peer->last_disassoc_rcvd = 0;
  4495. peer->last_deauth_rcvd = 0;
  4496. dp_peer_setup_get_reo_hash(vdev, &reo_dest, &hash_based);
  4497. dp_info("pdev: %d vdev :%d opmode:%u hash-based-steering:%d default-reo_dest:%u",
  4498. pdev->pdev_id, vdev->vdev_id,
  4499. vdev->opmode, hash_based, reo_dest);
  4500. /*
  4501. * There are corner cases where the AD1 = AD2 = "VAPs address"
  4502. * i.e both the devices have same MAC address. In these
  4503. * cases we want such pkts to be processed in NULL Q handler
  4504. * which is REO2TCL ring. for this reason we should
  4505. * not setup reo_queues and default route for bss_peer.
  4506. */
  4507. if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap)
  4508. return;
  4509. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  4510. /* TODO: Check the destination ring number to be passed to FW */
  4511. soc->cdp_soc.ol_ops->peer_set_default_routing(
  4512. pdev->ctrl_pdev, peer->mac_addr.raw,
  4513. peer->vdev->vdev_id, hash_based, reo_dest);
  4514. }
  4515. qdf_atomic_set(&peer->is_default_route_set, 1);
  4516. dp_peer_rx_init(pdev, peer);
  4517. dp_peer_tx_init(pdev, peer);
  4518. return;
  4519. }
  4520. /*
  4521. * dp_cp_peer_del_resp_handler - Handle the peer delete response
  4522. * @soc_hdl: Datapath SOC handle
  4523. * @vdev_hdl: virtual device object
  4524. * @mac_addr: Mac address of the peer
  4525. *
  4526. * Return: void
  4527. */
  4528. static void dp_cp_peer_del_resp_handler(struct cdp_soc_t *soc_hdl,
  4529. struct cdp_vdev *vdev_hdl,
  4530. uint8_t *mac_addr)
  4531. {
  4532. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  4533. struct dp_ast_entry *ast_entry = NULL;
  4534. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4535. txrx_ast_free_cb cb = NULL;
  4536. void *cookie;
  4537. qdf_spin_lock_bh(&soc->ast_lock);
  4538. if (soc->ast_override_support)
  4539. ast_entry =
  4540. dp_peer_ast_hash_find_by_pdevid(soc, mac_addr,
  4541. vdev->pdev->pdev_id);
  4542. else
  4543. ast_entry = dp_peer_ast_hash_find_soc(soc, mac_addr);
  4544. /* in case of qwrap we have multiple BSS peers
  4545. * with same mac address
  4546. *
  4547. * AST entry for this mac address will be created
  4548. * only for one peer hence it will be NULL here
  4549. */
  4550. if (!ast_entry || ast_entry->peer || !ast_entry->delete_in_progress) {
  4551. qdf_spin_unlock_bh(&soc->ast_lock);
  4552. return;
  4553. }
  4554. if (ast_entry->is_mapped)
  4555. soc->ast_table[ast_entry->ast_idx] = NULL;
  4556. DP_STATS_INC(soc, ast.deleted, 1);
  4557. dp_peer_ast_hash_remove(soc, ast_entry);
  4558. cb = ast_entry->callback;
  4559. cookie = ast_entry->cookie;
  4560. ast_entry->callback = NULL;
  4561. ast_entry->cookie = NULL;
  4562. soc->num_ast_entries--;
  4563. qdf_spin_unlock_bh(&soc->ast_lock);
  4564. if (cb) {
  4565. cb(soc->ctrl_psoc,
  4566. soc,
  4567. cookie,
  4568. CDP_TXRX_AST_DELETED);
  4569. }
  4570. qdf_mem_free(ast_entry);
  4571. }
  4572. /*
  4573. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  4574. * @vdev_handle: virtual device object
  4575. * @htt_pkt_type: type of pkt
  4576. *
  4577. * Return: void
  4578. */
  4579. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  4580. enum htt_cmn_pkt_type val)
  4581. {
  4582. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4583. vdev->tx_encap_type = val;
  4584. }
  4585. /*
  4586. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  4587. * @vdev_handle: virtual device object
  4588. * @htt_pkt_type: type of pkt
  4589. *
  4590. * Return: void
  4591. */
  4592. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  4593. enum htt_cmn_pkt_type val)
  4594. {
  4595. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4596. vdev->rx_decap_type = val;
  4597. }
  4598. /*
  4599. * dp_set_ba_aging_timeout() - set ba aging timeout per AC
  4600. * @txrx_soc: cdp soc handle
  4601. * @ac: Access category
  4602. * @value: timeout value in millisec
  4603. *
  4604. * Return: void
  4605. */
  4606. static void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  4607. uint8_t ac, uint32_t value)
  4608. {
  4609. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  4610. hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
  4611. }
  4612. /*
  4613. * dp_get_ba_aging_timeout() - get ba aging timeout per AC
  4614. * @txrx_soc: cdp soc handle
  4615. * @ac: access category
  4616. * @value: timeout value in millisec
  4617. *
  4618. * Return: void
  4619. */
  4620. static void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  4621. uint8_t ac, uint32_t *value)
  4622. {
  4623. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  4624. hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
  4625. }
  4626. /*
  4627. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  4628. * @pdev_handle: physical device object
  4629. * @val: reo destination ring index (1 - 4)
  4630. *
  4631. * Return: void
  4632. */
  4633. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  4634. enum cdp_host_reo_dest_ring val)
  4635. {
  4636. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4637. if (pdev)
  4638. pdev->reo_dest = val;
  4639. }
  4640. /*
  4641. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  4642. * @pdev_handle: physical device object
  4643. *
  4644. * Return: reo destination ring index
  4645. */
  4646. static enum cdp_host_reo_dest_ring
  4647. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  4648. {
  4649. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4650. if (pdev)
  4651. return pdev->reo_dest;
  4652. else
  4653. return cdp_host_reo_dest_ring_unknown;
  4654. }
  4655. /*
  4656. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  4657. * @pdev_handle: device object
  4658. * @val: value to be set
  4659. *
  4660. * Return: void
  4661. */
  4662. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  4663. uint32_t val)
  4664. {
  4665. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4666. /* Enable/Disable smart mesh filtering. This flag will be checked
  4667. * during rx processing to check if packets are from NAC clients.
  4668. */
  4669. pdev->filter_neighbour_peers = val;
  4670. return 0;
  4671. }
  4672. /*
  4673. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  4674. * address for smart mesh filtering
  4675. * @vdev_handle: virtual device object
  4676. * @cmd: Add/Del command
  4677. * @macaddr: nac client mac address
  4678. *
  4679. * Return: void
  4680. */
  4681. static int dp_update_filter_neighbour_peers(struct cdp_vdev *vdev_handle,
  4682. uint32_t cmd, uint8_t *macaddr)
  4683. {
  4684. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4685. struct dp_pdev *pdev = vdev->pdev;
  4686. struct dp_neighbour_peer *peer = NULL;
  4687. if (!macaddr)
  4688. goto fail0;
  4689. /* Store address of NAC (neighbour peer) which will be checked
  4690. * against TA of received packets.
  4691. */
  4692. if (cmd == DP_NAC_PARAM_ADD) {
  4693. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  4694. sizeof(*peer));
  4695. if (!peer) {
  4696. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4697. FL("DP neighbour peer node memory allocation failed"));
  4698. goto fail0;
  4699. }
  4700. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  4701. macaddr, QDF_MAC_ADDR_SIZE);
  4702. peer->vdev = vdev;
  4703. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4704. /* add this neighbour peer into the list */
  4705. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  4706. neighbour_peer_list_elem);
  4707. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4708. /* first neighbour */
  4709. if (!pdev->neighbour_peers_added) {
  4710. pdev->neighbour_peers_added = true;
  4711. dp_ppdu_ring_cfg(pdev);
  4712. }
  4713. return 1;
  4714. } else if (cmd == DP_NAC_PARAM_DEL) {
  4715. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  4716. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  4717. neighbour_peer_list_elem) {
  4718. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  4719. macaddr, QDF_MAC_ADDR_SIZE)) {
  4720. /* delete this peer from the list */
  4721. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  4722. peer, neighbour_peer_list_elem);
  4723. qdf_mem_free(peer);
  4724. break;
  4725. }
  4726. }
  4727. /* last neighbour deleted */
  4728. if (TAILQ_EMPTY(&pdev->neighbour_peers_list)) {
  4729. pdev->neighbour_peers_added = false;
  4730. dp_ppdu_ring_cfg(pdev);
  4731. }
  4732. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  4733. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  4734. !pdev->enhanced_stats_en)
  4735. dp_ppdu_ring_reset(pdev);
  4736. return 1;
  4737. }
  4738. fail0:
  4739. return 0;
  4740. }
  4741. /*
  4742. * dp_get_sec_type() - Get the security type
  4743. * @peer: Datapath peer handle
  4744. * @sec_idx: Security id (mcast, ucast)
  4745. *
  4746. * return sec_type: Security type
  4747. */
  4748. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  4749. {
  4750. struct dp_peer *dpeer = (struct dp_peer *)peer;
  4751. return dpeer->security[sec_idx].sec_type;
  4752. }
  4753. /*
  4754. * dp_peer_authorize() - authorize txrx peer
  4755. * @peer_handle: Datapath peer handle
  4756. * @authorize
  4757. *
  4758. */
  4759. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  4760. {
  4761. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4762. struct dp_soc *soc;
  4763. if (peer) {
  4764. soc = peer->vdev->pdev->soc;
  4765. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4766. peer->authorize = authorize ? 1 : 0;
  4767. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4768. }
  4769. }
  4770. static void dp_reset_and_release_peer_mem(struct dp_soc *soc,
  4771. struct dp_pdev *pdev,
  4772. struct dp_peer *peer,
  4773. struct dp_vdev *vdev)
  4774. {
  4775. struct dp_peer *bss_peer = NULL;
  4776. uint8_t *m_addr = NULL;
  4777. if (!vdev) {
  4778. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4779. "vdev is NULL");
  4780. } else {
  4781. if (vdev->vap_bss_peer == peer)
  4782. vdev->vap_bss_peer = NULL;
  4783. m_addr = peer->mac_addr.raw;
  4784. if (soc->cdp_soc.ol_ops->peer_unref_delete)
  4785. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  4786. m_addr, vdev->mac_addr.raw, vdev->opmode,
  4787. peer->ctrl_peer, NULL);
  4788. if (vdev && vdev->vap_bss_peer) {
  4789. bss_peer = vdev->vap_bss_peer;
  4790. DP_UPDATE_STATS(vdev, peer);
  4791. }
  4792. }
  4793. /*
  4794. * Peer AST list hast to be empty here
  4795. */
  4796. DP_AST_ASSERT(TAILQ_EMPTY(&peer->ast_entry_list));
  4797. qdf_mem_free(peer);
  4798. }
  4799. /**
  4800. * dp_delete_pending_vdev() - check and process vdev delete
  4801. * @pdev: DP specific pdev pointer
  4802. * @vdev: DP specific vdev pointer
  4803. * @vdev_id: vdev id corresponding to vdev
  4804. *
  4805. * This API does following:
  4806. * 1) It releases tx flow pools buffers as vdev is
  4807. * going down and no peers are associated.
  4808. * 2) It also detaches vdev before cleaning vdev (struct dp_vdev) memory
  4809. */
  4810. static void dp_delete_pending_vdev(struct dp_pdev *pdev, struct dp_vdev *vdev,
  4811. uint8_t vdev_id)
  4812. {
  4813. ol_txrx_vdev_delete_cb vdev_delete_cb = NULL;
  4814. void *vdev_delete_context = NULL;
  4815. vdev_delete_cb = vdev->delete.callback;
  4816. vdev_delete_context = vdev->delete.context;
  4817. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4818. FL("deleting vdev object %pK (%pM)- its last peer is done"),
  4819. vdev, vdev->mac_addr.raw);
  4820. /* all peers are gone, go ahead and delete it */
  4821. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  4822. FLOW_TYPE_VDEV, vdev_id);
  4823. dp_tx_vdev_detach(vdev);
  4824. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4825. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  4826. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4827. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4828. FL("deleting vdev object %pK (%pM)"),
  4829. vdev, vdev->mac_addr.raw);
  4830. qdf_mem_free(vdev);
  4831. vdev = NULL;
  4832. if (vdev_delete_cb)
  4833. vdev_delete_cb(vdev_delete_context);
  4834. }
  4835. /*
  4836. * dp_peer_unref_delete() - unref and delete peer
  4837. * @peer_handle: Datapath peer handle
  4838. *
  4839. */
  4840. void dp_peer_unref_delete(void *peer_handle)
  4841. {
  4842. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4843. struct dp_vdev *vdev = peer->vdev;
  4844. struct dp_pdev *pdev = vdev->pdev;
  4845. struct dp_soc *soc = pdev->soc;
  4846. struct dp_peer *tmppeer;
  4847. int found = 0;
  4848. uint16_t peer_id;
  4849. uint16_t vdev_id;
  4850. bool delete_vdev;
  4851. struct cdp_peer_cookie peer_cookie;
  4852. /*
  4853. * Hold the lock all the way from checking if the peer ref count
  4854. * is zero until the peer references are removed from the hash
  4855. * table and vdev list (if the peer ref count is zero).
  4856. * This protects against a new HL tx operation starting to use the
  4857. * peer object just after this function concludes it's done being used.
  4858. * Furthermore, the lock needs to be held while checking whether the
  4859. * vdev's list of peers is empty, to make sure that list is not modified
  4860. * concurrently with the empty check.
  4861. */
  4862. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4863. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  4864. peer_id = peer->peer_ids[0];
  4865. vdev_id = vdev->vdev_id;
  4866. /*
  4867. * Make sure that the reference to the peer in
  4868. * peer object map is removed
  4869. */
  4870. if (peer_id != HTT_INVALID_PEER)
  4871. soc->peer_id_to_obj_map[peer_id] = NULL;
  4872. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  4873. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  4874. /* remove the reference to the peer from the hash table */
  4875. dp_peer_find_hash_remove(soc, peer);
  4876. qdf_spin_lock_bh(&soc->ast_lock);
  4877. if (peer->self_ast_entry) {
  4878. dp_peer_del_ast(soc, peer->self_ast_entry);
  4879. peer->self_ast_entry = NULL;
  4880. }
  4881. qdf_spin_unlock_bh(&soc->ast_lock);
  4882. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  4883. if (tmppeer == peer) {
  4884. found = 1;
  4885. break;
  4886. }
  4887. }
  4888. if (found) {
  4889. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  4890. peer_list_elem);
  4891. } else {
  4892. /*Ignoring the remove operation as peer not found*/
  4893. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  4894. "peer:%pK not found in vdev:%pK peerlist:%pK",
  4895. peer, vdev, &peer->vdev->peer_list);
  4896. }
  4897. /* send peer destroy event to upper layer */
  4898. qdf_mem_copy(peer_cookie.mac_addr, peer->mac_addr.raw,
  4899. QDF_MAC_ADDR_SIZE);
  4900. peer_cookie.ctx = NULL;
  4901. peer_cookie.ctx = (void *)peer->wlanstats_ctx;
  4902. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  4903. dp_wdi_event_handler(WDI_EVENT_PEER_DESTROY,
  4904. pdev->soc,
  4905. (void *)&peer_cookie,
  4906. peer->peer_ids[0],
  4907. WDI_NO_VAL,
  4908. pdev->pdev_id);
  4909. #endif
  4910. peer->wlanstats_ctx = NULL;
  4911. /* cleanup the peer data */
  4912. dp_peer_cleanup(vdev, peer);
  4913. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4914. dp_reset_and_release_peer_mem(soc, pdev, peer, vdev);
  4915. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  4916. /* check whether the parent vdev has no peers left */
  4917. if (TAILQ_EMPTY(&vdev->peer_list)) {
  4918. /*
  4919. * capture vdev delete pending flag's status
  4920. * while holding peer_ref_mutex lock
  4921. */
  4922. delete_vdev = vdev->delete.pending;
  4923. /*
  4924. * Now that there are no references to the peer, we can
  4925. * release the peer reference lock.
  4926. */
  4927. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4928. /*
  4929. * Check if the parent vdev was waiting for its peers
  4930. * to be deleted, in order for it to be deleted too.
  4931. */
  4932. if (delete_vdev)
  4933. dp_delete_pending_vdev(pdev, vdev, vdev_id);
  4934. } else {
  4935. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4936. }
  4937. } else {
  4938. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  4939. }
  4940. }
  4941. #ifdef PEER_CACHE_RX_PKTS
  4942. static inline void dp_peer_rx_bufq_resources_deinit(struct dp_peer *peer)
  4943. {
  4944. qdf_list_destroy(&peer->bufq_info.cached_bufq);
  4945. qdf_spinlock_destroy(&peer->bufq_info.bufq_lock);
  4946. }
  4947. #else
  4948. static inline void dp_peer_rx_bufq_resources_deinit(struct dp_peer *peer)
  4949. {
  4950. }
  4951. #endif
  4952. /*
  4953. * dp_peer_detach_wifi3() – Detach txrx peer
  4954. * @peer_handle: Datapath peer handle
  4955. * @bitmap: bitmap indicating special handling of request.
  4956. *
  4957. */
  4958. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  4959. {
  4960. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4961. /* redirect the peer's rx delivery function to point to a
  4962. * discard func
  4963. */
  4964. peer->rx_opt_proc = dp_rx_discard;
  4965. /* Do not make ctrl_peer to NULL for connected sta peers.
  4966. * We need ctrl_peer to release the reference during dp
  4967. * peer free. This reference was held for
  4968. * obj_mgr peer during the creation of dp peer.
  4969. */
  4970. if (!(peer->vdev && (peer->vdev->opmode != wlan_op_mode_sta) &&
  4971. !peer->bss_peer))
  4972. peer->ctrl_peer = NULL;
  4973. peer->valid = 0;
  4974. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  4975. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  4976. dp_local_peer_id_free(peer->vdev->pdev, peer);
  4977. qdf_spinlock_destroy(&peer->peer_info_lock);
  4978. dp_peer_rx_bufq_resources_deinit(peer);
  4979. /*
  4980. * Remove the reference added during peer_attach.
  4981. * The peer will still be left allocated until the
  4982. * PEER_UNMAP message arrives to remove the other
  4983. * reference, added by the PEER_MAP message.
  4984. */
  4985. dp_peer_unref_delete(peer_handle);
  4986. }
  4987. /*
  4988. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  4989. * @peer_handle: Datapath peer handle
  4990. *
  4991. */
  4992. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  4993. {
  4994. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  4995. return vdev->mac_addr.raw;
  4996. }
  4997. /*
  4998. * dp_vdev_set_wds() - Enable per packet stats
  4999. * @vdev_handle: DP VDEV handle
  5000. * @val: value
  5001. *
  5002. * Return: none
  5003. */
  5004. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  5005. {
  5006. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5007. vdev->wds_enabled = val;
  5008. return 0;
  5009. }
  5010. /*
  5011. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  5012. * @peer_handle: Datapath peer handle
  5013. *
  5014. */
  5015. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  5016. uint8_t vdev_id)
  5017. {
  5018. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  5019. struct dp_vdev *vdev = NULL;
  5020. if (qdf_unlikely(!pdev))
  5021. return NULL;
  5022. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  5023. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5024. if (vdev->delete.pending)
  5025. continue;
  5026. if (vdev->vdev_id == vdev_id)
  5027. break;
  5028. }
  5029. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  5030. return (struct cdp_vdev *)vdev;
  5031. }
  5032. /*
  5033. * dp_get_mon_vdev_from_pdev_wifi3() - Get vdev handle of monitor mode
  5034. * @dev: PDEV handle
  5035. *
  5036. * Return: VDEV handle of monitor mode
  5037. */
  5038. static struct cdp_vdev *dp_get_mon_vdev_from_pdev_wifi3(struct cdp_pdev *dev)
  5039. {
  5040. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  5041. if (qdf_unlikely(!pdev))
  5042. return NULL;
  5043. return (struct cdp_vdev *)pdev->monitor_vdev;
  5044. }
  5045. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  5046. {
  5047. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5048. return vdev->opmode;
  5049. }
  5050. static
  5051. void dp_get_os_rx_handles_from_vdev_wifi3(struct cdp_vdev *pvdev,
  5052. ol_txrx_rx_fp *stack_fn_p,
  5053. ol_osif_vdev_handle *osif_vdev_p)
  5054. {
  5055. struct dp_vdev *vdev = dp_get_dp_vdev_from_cdp_vdev(pvdev);
  5056. qdf_assert(vdev);
  5057. *stack_fn_p = vdev->osif_rx_stack;
  5058. *osif_vdev_p = vdev->osif_vdev;
  5059. }
  5060. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  5061. {
  5062. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  5063. struct dp_pdev *pdev = vdev->pdev;
  5064. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  5065. }
  5066. /**
  5067. * dp_monitor_mode_ring_config() - Send the tlv config to fw for monitor buffer
  5068. * ring based on target
  5069. * @soc: soc handle
  5070. * @mac_for_pdev: pdev_id
  5071. * @pdev: physical device handle
  5072. * @ring_num: mac id
  5073. * @htt_tlv_filter: tlv filter
  5074. *
  5075. * Return: zero on success, non-zero on failure
  5076. */
  5077. static inline
  5078. QDF_STATUS dp_monitor_mode_ring_config(struct dp_soc *soc, uint8_t mac_for_pdev,
  5079. struct dp_pdev *pdev, uint8_t ring_num,
  5080. struct htt_rx_ring_tlv_filter htt_tlv_filter)
  5081. {
  5082. QDF_STATUS status;
  5083. if (soc->wlan_cfg_ctx->rxdma1_enable)
  5084. status = htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5085. pdev->rxdma_mon_buf_ring[ring_num]
  5086. .hal_srng,
  5087. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE,
  5088. &htt_tlv_filter);
  5089. else
  5090. status = htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5091. pdev->rx_mac_buf_ring[ring_num]
  5092. .hal_srng,
  5093. RXDMA_BUF, RX_BUFFER_SIZE,
  5094. &htt_tlv_filter);
  5095. return status;
  5096. }
  5097. /**
  5098. * dp_reset_monitor_mode() - Disable monitor mode
  5099. * @pdev_handle: Datapath PDEV handle
  5100. *
  5101. * Return: QDF_STATUS
  5102. */
  5103. QDF_STATUS dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  5104. {
  5105. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5106. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5107. struct dp_soc *soc = pdev->soc;
  5108. uint8_t pdev_id;
  5109. int mac_id;
  5110. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5111. pdev_id = pdev->pdev_id;
  5112. soc = pdev->soc;
  5113. qdf_spin_lock_bh(&pdev->mon_lock);
  5114. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5115. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5116. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5117. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5118. pdev, mac_id,
  5119. htt_tlv_filter);
  5120. if (status != QDF_STATUS_SUCCESS) {
  5121. dp_err("Failed to send tlv filter for monitor mode rings");
  5122. return status;
  5123. }
  5124. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5125. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5126. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE,
  5127. &htt_tlv_filter);
  5128. }
  5129. pdev->monitor_vdev = NULL;
  5130. pdev->mcopy_mode = 0;
  5131. pdev->monitor_configured = false;
  5132. qdf_spin_unlock_bh(&pdev->mon_lock);
  5133. return QDF_STATUS_SUCCESS;
  5134. }
  5135. /**
  5136. * dp_set_nac() - set peer_nac
  5137. * @peer_handle: Datapath PEER handle
  5138. *
  5139. * Return: void
  5140. */
  5141. static void dp_set_nac(struct cdp_peer *peer_handle)
  5142. {
  5143. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5144. peer->nac = 1;
  5145. }
  5146. /**
  5147. * dp_get_tx_pending() - read pending tx
  5148. * @pdev_handle: Datapath PDEV handle
  5149. *
  5150. * Return: outstanding tx
  5151. */
  5152. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  5153. {
  5154. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5155. return qdf_atomic_read(&pdev->num_tx_outstanding);
  5156. }
  5157. /**
  5158. * dp_get_peer_mac_from_peer_id() - get peer mac
  5159. * @pdev_handle: Datapath PDEV handle
  5160. * @peer_id: Peer ID
  5161. * @peer_mac: MAC addr of PEER
  5162. *
  5163. * Return: void
  5164. */
  5165. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  5166. uint32_t peer_id, uint8_t *peer_mac)
  5167. {
  5168. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5169. struct dp_peer *peer;
  5170. if (pdev && peer_mac) {
  5171. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  5172. if (peer) {
  5173. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  5174. QDF_MAC_ADDR_SIZE);
  5175. dp_peer_unref_del_find_by_id(peer);
  5176. }
  5177. }
  5178. }
  5179. /**
  5180. * dp_pdev_configure_monitor_rings() - configure monitor rings
  5181. * @vdev_handle: Datapath VDEV handle
  5182. *
  5183. * Return: QDF_STATUS
  5184. */
  5185. QDF_STATUS dp_pdev_configure_monitor_rings(struct dp_pdev *pdev)
  5186. {
  5187. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5188. struct dp_soc *soc;
  5189. uint8_t pdev_id;
  5190. int mac_id;
  5191. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5192. pdev_id = pdev->pdev_id;
  5193. soc = pdev->soc;
  5194. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  5195. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  5196. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  5197. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  5198. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  5199. pdev->mo_data_filter);
  5200. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5201. htt_tlv_filter.mpdu_start = 1;
  5202. htt_tlv_filter.msdu_start = 1;
  5203. htt_tlv_filter.packet = 1;
  5204. htt_tlv_filter.msdu_end = 1;
  5205. htt_tlv_filter.mpdu_end = 1;
  5206. htt_tlv_filter.packet_header = 1;
  5207. htt_tlv_filter.attention = 1;
  5208. htt_tlv_filter.ppdu_start = 0;
  5209. htt_tlv_filter.ppdu_end = 0;
  5210. htt_tlv_filter.ppdu_end_user_stats = 0;
  5211. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  5212. htt_tlv_filter.ppdu_end_status_done = 0;
  5213. htt_tlv_filter.header_per_msdu = 1;
  5214. htt_tlv_filter.enable_fp =
  5215. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  5216. htt_tlv_filter.enable_md = 0;
  5217. htt_tlv_filter.enable_mo =
  5218. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  5219. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  5220. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  5221. if (pdev->mcopy_mode) {
  5222. htt_tlv_filter.fp_data_filter = 0;
  5223. htt_tlv_filter.mo_data_filter = 0;
  5224. } else {
  5225. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  5226. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  5227. }
  5228. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  5229. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  5230. htt_tlv_filter.offset_valid = false;
  5231. if ((pdev->rx_enh_capture_mode == CDP_RX_ENH_CAPTURE_MPDU) ||
  5232. (pdev->rx_enh_capture_mode == CDP_RX_ENH_CAPTURE_MPDU_MSDU)) {
  5233. htt_tlv_filter.fp_mgmt_filter = 0;
  5234. htt_tlv_filter.fp_ctrl_filter = 0;
  5235. htt_tlv_filter.fp_data_filter = 0;
  5236. htt_tlv_filter.mo_mgmt_filter = 0;
  5237. htt_tlv_filter.mo_ctrl_filter = 0;
  5238. htt_tlv_filter.mo_data_filter = 0;
  5239. }
  5240. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5241. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5242. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5243. pdev, mac_id,
  5244. htt_tlv_filter);
  5245. if (status != QDF_STATUS_SUCCESS) {
  5246. dp_err("Failed to send tlv filter for monitor mode rings");
  5247. return status;
  5248. }
  5249. }
  5250. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5251. htt_tlv_filter.mpdu_start = 1;
  5252. htt_tlv_filter.msdu_start = 0;
  5253. htt_tlv_filter.packet = 0;
  5254. htt_tlv_filter.msdu_end = 0;
  5255. htt_tlv_filter.mpdu_end = 0;
  5256. if ((pdev->rx_enh_capture_mode == CDP_RX_ENH_CAPTURE_MPDU) ||
  5257. (pdev->rx_enh_capture_mode == CDP_RX_ENH_CAPTURE_MPDU_MSDU)) {
  5258. htt_tlv_filter.mpdu_end = 1;
  5259. }
  5260. htt_tlv_filter.attention = 0;
  5261. htt_tlv_filter.ppdu_start = 1;
  5262. htt_tlv_filter.ppdu_end = 1;
  5263. htt_tlv_filter.ppdu_end_user_stats = 1;
  5264. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5265. htt_tlv_filter.ppdu_end_status_done = 1;
  5266. htt_tlv_filter.enable_fp = 1;
  5267. htt_tlv_filter.enable_md = 0;
  5268. htt_tlv_filter.enable_mo = 1;
  5269. if (pdev->mcopy_mode ||
  5270. (pdev->rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  5271. htt_tlv_filter.packet_header = 1;
  5272. if (pdev->rx_enh_capture_mode == CDP_RX_ENH_CAPTURE_MPDU) {
  5273. htt_tlv_filter.header_per_msdu = 0;
  5274. htt_tlv_filter.enable_mo = 0;
  5275. } else if (pdev->rx_enh_capture_mode ==
  5276. CDP_RX_ENH_CAPTURE_MPDU_MSDU) {
  5277. htt_tlv_filter.header_per_msdu = 1;
  5278. htt_tlv_filter.enable_mo = 0;
  5279. }
  5280. }
  5281. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5282. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5283. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5284. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5285. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5286. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5287. htt_tlv_filter.offset_valid = false;
  5288. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5289. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5290. pdev->pdev_id);
  5291. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5292. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5293. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5294. }
  5295. return status;
  5296. }
  5297. /**
  5298. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  5299. * @vdev_handle: Datapath VDEV handle
  5300. * @smart_monitor: Flag to denote if its smart monitor mode
  5301. *
  5302. * Return: 0 on success, not 0 on failure
  5303. */
  5304. static QDF_STATUS dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  5305. uint8_t special_monitor)
  5306. {
  5307. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5308. struct dp_pdev *pdev;
  5309. qdf_assert(vdev);
  5310. pdev = vdev->pdev;
  5311. pdev->monitor_vdev = vdev;
  5312. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  5313. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  5314. pdev, pdev->pdev_id, pdev->soc, vdev);
  5315. /*
  5316. * do not configure monitor buf ring and filter for smart and
  5317. * lite monitor
  5318. * for smart monitor filters are added along with first NAC
  5319. * for lite monitor required configuration done through
  5320. * dp_set_pdev_param
  5321. */
  5322. if (special_monitor)
  5323. return QDF_STATUS_SUCCESS;
  5324. /*Check if current pdev's monitor_vdev exists */
  5325. if (pdev->monitor_configured) {
  5326. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5327. "monitor vap already created vdev=%pK\n", vdev);
  5328. qdf_assert(vdev);
  5329. return QDF_STATUS_E_RESOURCES;
  5330. }
  5331. pdev->monitor_configured = true;
  5332. return dp_pdev_configure_monitor_rings(pdev);
  5333. }
  5334. /**
  5335. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  5336. * @pdev_handle: Datapath PDEV handle
  5337. * @filter_val: Flag to select Filter for monitor mode
  5338. * Return: 0 on success, not 0 on failure
  5339. */
  5340. static QDF_STATUS
  5341. dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  5342. struct cdp_monitor_filter *filter_val)
  5343. {
  5344. /* Many monitor VAPs can exists in a system but only one can be up at
  5345. * anytime
  5346. */
  5347. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5348. struct dp_vdev *vdev = pdev->monitor_vdev;
  5349. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5350. struct dp_soc *soc;
  5351. uint8_t pdev_id;
  5352. int mac_id;
  5353. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5354. pdev_id = pdev->pdev_id;
  5355. soc = pdev->soc;
  5356. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  5357. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK",
  5358. pdev, pdev_id, soc, vdev);
  5359. /*Check if current pdev's monitor_vdev exists */
  5360. if (!pdev->monitor_vdev) {
  5361. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5362. "vdev=%pK", vdev);
  5363. qdf_assert(vdev);
  5364. }
  5365. /* update filter mode, type in pdev structure */
  5366. pdev->mon_filter_mode = filter_val->mode;
  5367. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  5368. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  5369. pdev->fp_data_filter = filter_val->fp_data;
  5370. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  5371. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  5372. pdev->mo_data_filter = filter_val->mo_data;
  5373. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  5374. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]",
  5375. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  5376. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  5377. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  5378. pdev->mo_data_filter);
  5379. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5380. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5381. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5382. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5383. pdev, mac_id,
  5384. htt_tlv_filter);
  5385. if (status != QDF_STATUS_SUCCESS) {
  5386. dp_err("Failed to send tlv filter for monitor mode rings");
  5387. return status;
  5388. }
  5389. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5390. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5391. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5392. }
  5393. htt_tlv_filter.mpdu_start = 1;
  5394. htt_tlv_filter.msdu_start = 1;
  5395. htt_tlv_filter.packet = 1;
  5396. htt_tlv_filter.msdu_end = 1;
  5397. htt_tlv_filter.mpdu_end = 1;
  5398. htt_tlv_filter.packet_header = 1;
  5399. htt_tlv_filter.attention = 1;
  5400. htt_tlv_filter.ppdu_start = 0;
  5401. htt_tlv_filter.ppdu_end = 0;
  5402. htt_tlv_filter.ppdu_end_user_stats = 0;
  5403. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  5404. htt_tlv_filter.ppdu_end_status_done = 0;
  5405. htt_tlv_filter.header_per_msdu = 1;
  5406. htt_tlv_filter.enable_fp =
  5407. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  5408. htt_tlv_filter.enable_md = 0;
  5409. htt_tlv_filter.enable_mo =
  5410. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  5411. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  5412. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  5413. if (pdev->mcopy_mode)
  5414. htt_tlv_filter.fp_data_filter = 0;
  5415. else
  5416. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  5417. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  5418. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  5419. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  5420. htt_tlv_filter.offset_valid = false;
  5421. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5422. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  5423. status = dp_monitor_mode_ring_config(soc, mac_for_pdev,
  5424. pdev, mac_id,
  5425. htt_tlv_filter);
  5426. if (status != QDF_STATUS_SUCCESS) {
  5427. dp_err("Failed to send tlv filter for monitor mode rings");
  5428. return status;
  5429. }
  5430. }
  5431. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  5432. htt_tlv_filter.mpdu_start = 1;
  5433. htt_tlv_filter.msdu_start = 0;
  5434. htt_tlv_filter.packet = 0;
  5435. htt_tlv_filter.msdu_end = 0;
  5436. htt_tlv_filter.mpdu_end = 0;
  5437. htt_tlv_filter.attention = 0;
  5438. htt_tlv_filter.ppdu_start = 1;
  5439. htt_tlv_filter.ppdu_end = 1;
  5440. htt_tlv_filter.ppdu_end_user_stats = 1;
  5441. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5442. htt_tlv_filter.ppdu_end_status_done = 1;
  5443. htt_tlv_filter.enable_fp = 1;
  5444. htt_tlv_filter.enable_md = 0;
  5445. htt_tlv_filter.enable_mo = 1;
  5446. if (pdev->mcopy_mode) {
  5447. htt_tlv_filter.packet_header = 1;
  5448. }
  5449. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5450. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5451. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5452. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5453. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5454. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5455. htt_tlv_filter.offset_valid = false;
  5456. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5457. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5458. pdev->pdev_id);
  5459. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  5460. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5461. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5462. }
  5463. return QDF_STATUS_SUCCESS;
  5464. }
  5465. /**
  5466. * dp_get_pdev_id_frm_pdev() - get pdev_id
  5467. * @pdev_handle: Datapath PDEV handle
  5468. *
  5469. * Return: pdev_id
  5470. */
  5471. static
  5472. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  5473. {
  5474. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5475. return pdev->pdev_id;
  5476. }
  5477. /**
  5478. * dp_get_delay_stats_flag() - get delay stats flag
  5479. * @pdev_handle: Datapath PDEV handle
  5480. *
  5481. * Return: 0 if flag is disabled else 1
  5482. */
  5483. static
  5484. bool dp_get_delay_stats_flag(struct cdp_pdev *pdev_handle)
  5485. {
  5486. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5487. return pdev->delay_stats_flag;
  5488. }
  5489. /**
  5490. * dp_pdev_set_chan_noise_floor() - set channel noise floor
  5491. * @pdev_handle: Datapath PDEV handle
  5492. * @chan_noise_floor: Channel Noise Floor
  5493. *
  5494. * Return: void
  5495. */
  5496. static
  5497. void dp_pdev_set_chan_noise_floor(struct cdp_pdev *pdev_handle,
  5498. int16_t chan_noise_floor)
  5499. {
  5500. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5501. pdev->chan_noise_floor = chan_noise_floor;
  5502. }
  5503. /**
  5504. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  5505. * @vdev_handle: Datapath VDEV handle
  5506. * Return: true on ucast filter flag set
  5507. */
  5508. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  5509. {
  5510. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5511. struct dp_pdev *pdev;
  5512. pdev = vdev->pdev;
  5513. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  5514. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  5515. return true;
  5516. return false;
  5517. }
  5518. /**
  5519. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  5520. * @vdev_handle: Datapath VDEV handle
  5521. * Return: true on mcast filter flag set
  5522. */
  5523. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  5524. {
  5525. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5526. struct dp_pdev *pdev;
  5527. pdev = vdev->pdev;
  5528. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  5529. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  5530. return true;
  5531. return false;
  5532. }
  5533. /**
  5534. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  5535. * @vdev_handle: Datapath VDEV handle
  5536. * Return: true on non data filter flag set
  5537. */
  5538. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  5539. {
  5540. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5541. struct dp_pdev *pdev;
  5542. pdev = vdev->pdev;
  5543. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  5544. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  5545. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  5546. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  5547. return true;
  5548. }
  5549. }
  5550. return false;
  5551. }
  5552. #ifdef MESH_MODE_SUPPORT
  5553. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  5554. {
  5555. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  5556. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5557. FL("val %d"), val);
  5558. vdev->mesh_vdev = val;
  5559. }
  5560. /*
  5561. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  5562. * @vdev_hdl: virtual device object
  5563. * @val: value to be set
  5564. *
  5565. * Return: void
  5566. */
  5567. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  5568. {
  5569. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  5570. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5571. FL("val %d"), val);
  5572. vdev->mesh_rx_filter = val;
  5573. }
  5574. #endif
  5575. /*
  5576. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  5577. * Current scope is bar received count
  5578. *
  5579. * @pdev_handle: DP_PDEV handle
  5580. *
  5581. * Return: void
  5582. */
  5583. #define STATS_PROC_TIMEOUT (HZ/1000)
  5584. static void
  5585. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  5586. {
  5587. struct dp_vdev *vdev;
  5588. struct dp_peer *peer;
  5589. uint32_t waitcnt;
  5590. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5591. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5592. if (!peer) {
  5593. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5594. FL("DP Invalid Peer refernce"));
  5595. return;
  5596. }
  5597. if (peer->delete_in_progress) {
  5598. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5599. FL("DP Peer deletion in progress"));
  5600. continue;
  5601. }
  5602. qdf_atomic_inc(&peer->ref_cnt);
  5603. waitcnt = 0;
  5604. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  5605. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  5606. && waitcnt < 10) {
  5607. schedule_timeout_interruptible(
  5608. STATS_PROC_TIMEOUT);
  5609. waitcnt++;
  5610. }
  5611. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  5612. dp_peer_unref_delete(peer);
  5613. }
  5614. }
  5615. }
  5616. /**
  5617. * dp_rx_bar_stats_cb(): BAR received stats callback
  5618. * @soc: SOC handle
  5619. * @cb_ctxt: Call back context
  5620. * @reo_status: Reo status
  5621. *
  5622. * return: void
  5623. */
  5624. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  5625. union hal_reo_status *reo_status)
  5626. {
  5627. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  5628. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  5629. if (!qdf_atomic_read(&soc->cmn_init_done))
  5630. return;
  5631. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  5632. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  5633. queue_status->header.status);
  5634. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  5635. return;
  5636. }
  5637. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  5638. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  5639. }
  5640. /**
  5641. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  5642. * @vdev: DP VDEV handle
  5643. *
  5644. * return: void
  5645. */
  5646. void dp_aggregate_vdev_stats(struct dp_vdev *vdev,
  5647. struct cdp_vdev_stats *vdev_stats)
  5648. {
  5649. struct dp_peer *peer = NULL;
  5650. struct dp_soc *soc = NULL;
  5651. if (!vdev || !vdev->pdev)
  5652. return;
  5653. soc = vdev->pdev->soc;
  5654. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  5655. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  5656. dp_update_vdev_stats(vdev_stats, peer);
  5657. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5658. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  5659. vdev_stats, vdev->vdev_id,
  5660. UPDATE_VDEV_STATS, vdev->pdev->pdev_id);
  5661. #endif
  5662. }
  5663. /**
  5664. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  5665. * @pdev: DP PDEV handle
  5666. *
  5667. * return: void
  5668. */
  5669. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  5670. {
  5671. struct dp_vdev *vdev = NULL;
  5672. struct dp_soc *soc;
  5673. struct cdp_vdev_stats *vdev_stats =
  5674. qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  5675. if (!vdev_stats) {
  5676. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5677. "DP alloc failure - unable to get alloc vdev stats");
  5678. return;
  5679. }
  5680. qdf_mem_zero(&pdev->stats.tx, sizeof(pdev->stats.tx));
  5681. qdf_mem_zero(&pdev->stats.rx, sizeof(pdev->stats.rx));
  5682. qdf_mem_zero(&pdev->stats.tx_i, sizeof(pdev->stats.tx_i));
  5683. if (pdev->mcopy_mode)
  5684. DP_UPDATE_STATS(pdev, pdev->invalid_peer);
  5685. soc = pdev->soc;
  5686. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  5687. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  5688. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  5689. dp_aggregate_vdev_stats(vdev, vdev_stats);
  5690. dp_update_pdev_stats(pdev, vdev_stats);
  5691. dp_update_pdev_ingress_stats(pdev, vdev);
  5692. }
  5693. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  5694. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  5695. qdf_mem_free(vdev_stats);
  5696. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  5697. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc, &pdev->stats,
  5698. pdev->pdev_id, UPDATE_PDEV_STATS, pdev->pdev_id);
  5699. #endif
  5700. }
  5701. /**
  5702. * dp_vdev_getstats() - get vdev packet level stats
  5703. * @vdev_handle: Datapath VDEV handle
  5704. * @stats: cdp network device stats structure
  5705. *
  5706. * Return: void
  5707. */
  5708. static void dp_vdev_getstats(void *vdev_handle,
  5709. struct cdp_dev_stats *stats)
  5710. {
  5711. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5712. struct dp_pdev *pdev;
  5713. struct dp_soc *soc;
  5714. struct cdp_vdev_stats *vdev_stats;
  5715. if (!vdev)
  5716. return;
  5717. pdev = vdev->pdev;
  5718. if (!pdev)
  5719. return;
  5720. soc = pdev->soc;
  5721. vdev_stats = qdf_mem_malloc(sizeof(struct cdp_vdev_stats));
  5722. if (!vdev_stats) {
  5723. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5724. "DP alloc failure - unable to get alloc vdev stats");
  5725. return;
  5726. }
  5727. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  5728. dp_aggregate_vdev_stats(vdev, vdev_stats);
  5729. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  5730. stats->tx_packets = vdev_stats->tx_i.rcvd.num;
  5731. stats->tx_bytes = vdev_stats->tx_i.rcvd.bytes;
  5732. stats->tx_errors = vdev_stats->tx.tx_failed +
  5733. vdev_stats->tx_i.dropped.dropped_pkt.num;
  5734. stats->tx_dropped = stats->tx_errors;
  5735. stats->rx_packets = vdev_stats->rx.unicast.num +
  5736. vdev_stats->rx.multicast.num +
  5737. vdev_stats->rx.bcast.num;
  5738. stats->rx_bytes = vdev_stats->rx.unicast.bytes +
  5739. vdev_stats->rx.multicast.bytes +
  5740. vdev_stats->rx.bcast.bytes;
  5741. qdf_mem_free(vdev_stats);
  5742. }
  5743. /**
  5744. * dp_pdev_getstats() - get pdev packet level stats
  5745. * @pdev_handle: Datapath PDEV handle
  5746. * @stats: cdp network device stats structure
  5747. *
  5748. * Return: void
  5749. */
  5750. static void dp_pdev_getstats(void *pdev_handle,
  5751. struct cdp_dev_stats *stats)
  5752. {
  5753. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5754. dp_aggregate_pdev_stats(pdev);
  5755. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  5756. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  5757. stats->tx_errors = pdev->stats.tx.tx_failed +
  5758. pdev->stats.tx_i.dropped.dropped_pkt.num;
  5759. stats->tx_dropped = stats->tx_errors;
  5760. stats->rx_packets = pdev->stats.rx.unicast.num +
  5761. pdev->stats.rx.multicast.num +
  5762. pdev->stats.rx.bcast.num;
  5763. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  5764. pdev->stats.rx.multicast.bytes +
  5765. pdev->stats.rx.bcast.bytes;
  5766. }
  5767. /**
  5768. * dp_get_device_stats() - get interface level packet stats
  5769. * @handle: device handle
  5770. * @stats: cdp network device stats structure
  5771. * @type: device type pdev/vdev
  5772. *
  5773. * Return: void
  5774. */
  5775. static void dp_get_device_stats(void *handle,
  5776. struct cdp_dev_stats *stats, uint8_t type)
  5777. {
  5778. switch (type) {
  5779. case UPDATE_VDEV_STATS:
  5780. dp_vdev_getstats(handle, stats);
  5781. break;
  5782. case UPDATE_PDEV_STATS:
  5783. dp_pdev_getstats(handle, stats);
  5784. break;
  5785. default:
  5786. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5787. "apstats cannot be updated for this input "
  5788. "type %d", type);
  5789. break;
  5790. }
  5791. }
  5792. /**
  5793. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  5794. * @pdev: DP_PDEV Handle
  5795. *
  5796. * Return:void
  5797. */
  5798. static inline void
  5799. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  5800. {
  5801. uint8_t i = 0, index = 0;
  5802. DP_PRINT_STATS("PDEV Tx Stats:\n");
  5803. DP_PRINT_STATS("Received From Stack:");
  5804. DP_PRINT_STATS(" Packets = %d",
  5805. pdev->stats.tx_i.rcvd.num);
  5806. DP_PRINT_STATS(" Bytes = %llu",
  5807. pdev->stats.tx_i.rcvd.bytes);
  5808. DP_PRINT_STATS("Processed:");
  5809. DP_PRINT_STATS(" Packets = %d",
  5810. pdev->stats.tx_i.processed.num);
  5811. DP_PRINT_STATS(" Bytes = %llu",
  5812. pdev->stats.tx_i.processed.bytes);
  5813. DP_PRINT_STATS("Total Completions:");
  5814. DP_PRINT_STATS(" Packets = %u",
  5815. pdev->stats.tx.comp_pkt.num);
  5816. DP_PRINT_STATS(" Bytes = %llu",
  5817. pdev->stats.tx.comp_pkt.bytes);
  5818. DP_PRINT_STATS("Successful Completions:");
  5819. DP_PRINT_STATS(" Packets = %u",
  5820. pdev->stats.tx.tx_success.num);
  5821. DP_PRINT_STATS(" Bytes = %llu",
  5822. pdev->stats.tx.tx_success.bytes);
  5823. DP_PRINT_STATS("Dropped:");
  5824. DP_PRINT_STATS(" Total = %d",
  5825. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5826. DP_PRINT_STATS(" Dma_map_error = %d",
  5827. pdev->stats.tx_i.dropped.dma_error);
  5828. DP_PRINT_STATS(" Ring Full = %d",
  5829. pdev->stats.tx_i.dropped.ring_full);
  5830. DP_PRINT_STATS(" Descriptor Not available = %d",
  5831. pdev->stats.tx_i.dropped.desc_na.num);
  5832. DP_PRINT_STATS(" HW enqueue failed= %d",
  5833. pdev->stats.tx_i.dropped.enqueue_fail);
  5834. DP_PRINT_STATS(" Resources Full = %d",
  5835. pdev->stats.tx_i.dropped.res_full);
  5836. DP_PRINT_STATS(" FW removed Pkts = %u",
  5837. pdev->stats.tx.dropped.fw_rem.num);
  5838. DP_PRINT_STATS(" FW removed bytes= %llu",
  5839. pdev->stats.tx.dropped.fw_rem.bytes);
  5840. DP_PRINT_STATS(" FW removed transmitted = %d",
  5841. pdev->stats.tx.dropped.fw_rem_tx);
  5842. DP_PRINT_STATS(" FW removed untransmitted = %d",
  5843. pdev->stats.tx.dropped.fw_rem_notx);
  5844. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  5845. pdev->stats.tx.dropped.fw_reason1);
  5846. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  5847. pdev->stats.tx.dropped.fw_reason2);
  5848. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  5849. pdev->stats.tx.dropped.fw_reason3);
  5850. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  5851. pdev->stats.tx.dropped.age_out);
  5852. DP_PRINT_STATS(" headroom insufficient = %d",
  5853. pdev->stats.tx_i.dropped.headroom_insufficient);
  5854. DP_PRINT_STATS(" Multicast:");
  5855. DP_PRINT_STATS(" Packets: %u",
  5856. pdev->stats.tx.mcast.num);
  5857. DP_PRINT_STATS(" Bytes: %llu",
  5858. pdev->stats.tx.mcast.bytes);
  5859. DP_PRINT_STATS("Scatter Gather:");
  5860. DP_PRINT_STATS(" Packets = %d",
  5861. pdev->stats.tx_i.sg.sg_pkt.num);
  5862. DP_PRINT_STATS(" Bytes = %llu",
  5863. pdev->stats.tx_i.sg.sg_pkt.bytes);
  5864. DP_PRINT_STATS(" Dropped By Host = %d",
  5865. pdev->stats.tx_i.sg.dropped_host.num);
  5866. DP_PRINT_STATS(" Dropped By Target = %d",
  5867. pdev->stats.tx_i.sg.dropped_target);
  5868. DP_PRINT_STATS("TSO:");
  5869. DP_PRINT_STATS(" Number of Segments = %d",
  5870. pdev->stats.tx_i.tso.num_seg);
  5871. DP_PRINT_STATS(" Packets = %d",
  5872. pdev->stats.tx_i.tso.tso_pkt.num);
  5873. DP_PRINT_STATS(" Bytes = %llu",
  5874. pdev->stats.tx_i.tso.tso_pkt.bytes);
  5875. DP_PRINT_STATS(" Dropped By Host = %d",
  5876. pdev->stats.tx_i.tso.dropped_host.num);
  5877. DP_PRINT_STATS("Mcast Enhancement:");
  5878. DP_PRINT_STATS(" Packets = %d",
  5879. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  5880. DP_PRINT_STATS(" Bytes = %llu",
  5881. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  5882. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  5883. pdev->stats.tx_i.mcast_en.dropped_map_error);
  5884. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  5885. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  5886. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  5887. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  5888. DP_PRINT_STATS(" Unicast sent = %d",
  5889. pdev->stats.tx_i.mcast_en.ucast);
  5890. DP_PRINT_STATS("Raw:");
  5891. DP_PRINT_STATS(" Packets = %d",
  5892. pdev->stats.tx_i.raw.raw_pkt.num);
  5893. DP_PRINT_STATS(" Bytes = %llu",
  5894. pdev->stats.tx_i.raw.raw_pkt.bytes);
  5895. DP_PRINT_STATS(" DMA map error = %d",
  5896. pdev->stats.tx_i.raw.dma_map_error);
  5897. DP_PRINT_STATS("Reinjected:");
  5898. DP_PRINT_STATS(" Packets = %d",
  5899. pdev->stats.tx_i.reinject_pkts.num);
  5900. DP_PRINT_STATS(" Bytes = %llu\n",
  5901. pdev->stats.tx_i.reinject_pkts.bytes);
  5902. DP_PRINT_STATS("Inspected:");
  5903. DP_PRINT_STATS(" Packets = %d",
  5904. pdev->stats.tx_i.inspect_pkts.num);
  5905. DP_PRINT_STATS(" Bytes = %llu",
  5906. pdev->stats.tx_i.inspect_pkts.bytes);
  5907. DP_PRINT_STATS("Nawds Multicast:");
  5908. DP_PRINT_STATS(" Packets = %d",
  5909. pdev->stats.tx_i.nawds_mcast.num);
  5910. DP_PRINT_STATS(" Bytes = %llu",
  5911. pdev->stats.tx_i.nawds_mcast.bytes);
  5912. DP_PRINT_STATS("CCE Classified:");
  5913. DP_PRINT_STATS(" CCE Classified Packets: %u",
  5914. pdev->stats.tx_i.cce_classified);
  5915. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  5916. pdev->stats.tx_i.cce_classified_raw);
  5917. DP_PRINT_STATS("Mesh stats:");
  5918. DP_PRINT_STATS(" frames to firmware: %u",
  5919. pdev->stats.tx_i.mesh.exception_fw);
  5920. DP_PRINT_STATS(" completions from fw: %u",
  5921. pdev->stats.tx_i.mesh.completion_fw);
  5922. DP_PRINT_STATS("PPDU stats counter");
  5923. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  5924. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  5925. pdev->stats.ppdu_stats_counter[index]);
  5926. }
  5927. DP_PRINT_STATS("tx_ppdu_proc: %llu\n",
  5928. pdev->tx_ppdu_proc);
  5929. for (i = 0; i < CDP_WDI_NUM_EVENTS; i++) {
  5930. if (!pdev->stats.wdi_event[i])
  5931. DP_PRINT_STATS("Wdi msgs received from fw[%d]:%d",
  5932. i, pdev->stats.wdi_event[i]);
  5933. }
  5934. }
  5935. /**
  5936. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  5937. * @pdev: DP_PDEV Handle
  5938. *
  5939. * Return: void
  5940. */
  5941. static inline void
  5942. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  5943. {
  5944. DP_PRINT_STATS("PDEV Rx Stats:\n");
  5945. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  5946. DP_PRINT_STATS(" Packets = %d %d %d %d",
  5947. pdev->stats.rx.rcvd_reo[0].num,
  5948. pdev->stats.rx.rcvd_reo[1].num,
  5949. pdev->stats.rx.rcvd_reo[2].num,
  5950. pdev->stats.rx.rcvd_reo[3].num);
  5951. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  5952. pdev->stats.rx.rcvd_reo[0].bytes,
  5953. pdev->stats.rx.rcvd_reo[1].bytes,
  5954. pdev->stats.rx.rcvd_reo[2].bytes,
  5955. pdev->stats.rx.rcvd_reo[3].bytes);
  5956. DP_PRINT_STATS("Replenished:");
  5957. DP_PRINT_STATS(" Packets = %d",
  5958. pdev->stats.replenish.pkts.num);
  5959. DP_PRINT_STATS(" Bytes = %llu",
  5960. pdev->stats.replenish.pkts.bytes);
  5961. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  5962. pdev->stats.buf_freelist);
  5963. DP_PRINT_STATS(" Low threshold intr = %d",
  5964. pdev->stats.replenish.low_thresh_intrs);
  5965. DP_PRINT_STATS("Dropped:");
  5966. DP_PRINT_STATS(" msdu_not_done = %d",
  5967. pdev->stats.dropped.msdu_not_done);
  5968. DP_PRINT_STATS(" wifi parse = %d",
  5969. pdev->stats.dropped.wifi_parse);
  5970. DP_PRINT_STATS(" mon_rx_drop = %d",
  5971. pdev->stats.dropped.mon_rx_drop);
  5972. DP_PRINT_STATS(" mec_drop = %d",
  5973. pdev->stats.rx.mec_drop.num);
  5974. DP_PRINT_STATS(" Bytes = %llu",
  5975. pdev->stats.rx.mec_drop.bytes);
  5976. DP_PRINT_STATS("Sent To Stack:");
  5977. DP_PRINT_STATS(" Packets = %d",
  5978. pdev->stats.rx.to_stack.num);
  5979. DP_PRINT_STATS(" Bytes = %llu",
  5980. pdev->stats.rx.to_stack.bytes);
  5981. DP_PRINT_STATS(" vlan_tag_stp_cnt = %d",
  5982. pdev->stats.vlan_tag_stp_cnt);
  5983. DP_PRINT_STATS("Multicast/Broadcast:");
  5984. DP_PRINT_STATS(" Packets = %d",
  5985. pdev->stats.rx.multicast.num);
  5986. DP_PRINT_STATS(" Bytes = %llu",
  5987. pdev->stats.rx.multicast.bytes);
  5988. DP_PRINT_STATS("Errors:");
  5989. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  5990. pdev->stats.replenish.rxdma_err);
  5991. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  5992. pdev->stats.err.desc_alloc_fail);
  5993. DP_PRINT_STATS(" IP checksum error = %d",
  5994. pdev->stats.err.ip_csum_err);
  5995. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  5996. pdev->stats.err.tcp_udp_csum_err);
  5997. /* Get bar_recv_cnt */
  5998. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  5999. DP_PRINT_STATS("BAR Received Count: = %d",
  6000. pdev->stats.rx.bar_recv_cnt);
  6001. }
  6002. /**
  6003. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  6004. * @pdev: DP_PDEV Handle
  6005. *
  6006. * Return: void
  6007. */
  6008. static inline void
  6009. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  6010. {
  6011. struct cdp_pdev_mon_stats *rx_mon_stats;
  6012. uint32_t *stat_ring_ppdu_ids;
  6013. uint32_t *dest_ring_ppdu_ids;
  6014. int i, idx;
  6015. rx_mon_stats = &pdev->rx_mon_stats;
  6016. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  6017. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  6018. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  6019. rx_mon_stats->status_ppdu_done);
  6020. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  6021. rx_mon_stats->dest_ppdu_done);
  6022. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  6023. rx_mon_stats->dest_mpdu_done);
  6024. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  6025. rx_mon_stats->dest_mpdu_drop);
  6026. DP_PRINT_STATS("dup_mon_linkdesc_cnt = %d",
  6027. rx_mon_stats->dup_mon_linkdesc_cnt);
  6028. DP_PRINT_STATS("dup_mon_buf_cnt = %d",
  6029. rx_mon_stats->dup_mon_buf_cnt);
  6030. stat_ring_ppdu_ids =
  6031. (uint32_t *)qdf_mem_malloc(sizeof(uint32_t) * MAX_PPDU_ID_HIST);
  6032. dest_ring_ppdu_ids =
  6033. (uint32_t *)qdf_mem_malloc(sizeof(uint32_t) * MAX_PPDU_ID_HIST);
  6034. if (!stat_ring_ppdu_ids || !dest_ring_ppdu_ids)
  6035. DP_PRINT_STATS("Unable to allocate ppdu id hist mem\n");
  6036. qdf_spin_lock_bh(&pdev->mon_lock);
  6037. idx = rx_mon_stats->ppdu_id_hist_idx;
  6038. qdf_mem_copy(stat_ring_ppdu_ids,
  6039. rx_mon_stats->stat_ring_ppdu_id_hist,
  6040. sizeof(uint32_t) * MAX_PPDU_ID_HIST);
  6041. qdf_mem_copy(dest_ring_ppdu_ids,
  6042. rx_mon_stats->dest_ring_ppdu_id_hist,
  6043. sizeof(uint32_t) * MAX_PPDU_ID_HIST);
  6044. qdf_spin_unlock_bh(&pdev->mon_lock);
  6045. DP_PRINT_STATS("PPDU Id history:");
  6046. DP_PRINT_STATS("stat_ring_ppdu_ids\t dest_ring_ppdu_ids");
  6047. for (i = 0; i < MAX_PPDU_ID_HIST; i++) {
  6048. idx = (idx + 1) & (MAX_PPDU_ID_HIST - 1);
  6049. DP_PRINT_STATS("%*u\t%*u", 16,
  6050. rx_mon_stats->stat_ring_ppdu_id_hist[idx], 16,
  6051. rx_mon_stats->dest_ring_ppdu_id_hist[idx]);
  6052. }
  6053. qdf_mem_free(stat_ring_ppdu_ids);
  6054. qdf_mem_free(dest_ring_ppdu_ids);
  6055. }
  6056. /**
  6057. * dp_print_soc_tx_stats(): Print SOC level stats
  6058. * @soc DP_SOC Handle
  6059. *
  6060. * Return: void
  6061. */
  6062. static inline void
  6063. dp_print_soc_tx_stats(struct dp_soc *soc)
  6064. {
  6065. uint8_t desc_pool_id;
  6066. soc->stats.tx.desc_in_use = 0;
  6067. DP_PRINT_STATS("SOC Tx Stats:\n");
  6068. for (desc_pool_id = 0;
  6069. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  6070. desc_pool_id++)
  6071. soc->stats.tx.desc_in_use +=
  6072. soc->tx_desc[desc_pool_id].num_allocated;
  6073. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  6074. soc->stats.tx.desc_in_use);
  6075. DP_PRINT_STATS("Tx Invalid peer:");
  6076. DP_PRINT_STATS(" Packets = %d",
  6077. soc->stats.tx.tx_invalid_peer.num);
  6078. DP_PRINT_STATS(" Bytes = %llu",
  6079. soc->stats.tx.tx_invalid_peer.bytes);
  6080. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  6081. soc->stats.tx.tcl_ring_full[0],
  6082. soc->stats.tx.tcl_ring_full[1],
  6083. soc->stats.tx.tcl_ring_full[2]);
  6084. DP_PRINT_STATS("Tx invalid completion release = %d",
  6085. soc->stats.tx.invalid_release_source);
  6086. }
  6087. /**
  6088. * dp_print_soc_rx_stats: Print SOC level Rx stats
  6089. * @soc: DP_SOC Handle
  6090. *
  6091. * Return:void
  6092. */
  6093. static inline void
  6094. dp_print_soc_rx_stats(struct dp_soc *soc)
  6095. {
  6096. uint32_t i;
  6097. char reo_error[DP_REO_ERR_LENGTH];
  6098. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  6099. uint8_t index = 0;
  6100. DP_PRINT_STATS("No of AST Entries = %d", soc->num_ast_entries);
  6101. DP_PRINT_STATS("SOC Rx Stats:\n");
  6102. DP_PRINT_STATS("Fragmented packets: %u",
  6103. soc->stats.rx.rx_frags);
  6104. DP_PRINT_STATS("Reo reinjected packets: %u",
  6105. soc->stats.rx.reo_reinject);
  6106. DP_PRINT_STATS("Errors:\n");
  6107. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  6108. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  6109. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  6110. DP_PRINT_STATS("Invalid RBM = %d",
  6111. soc->stats.rx.err.invalid_rbm);
  6112. DP_PRINT_STATS("Invalid Vdev = %d",
  6113. soc->stats.rx.err.invalid_vdev);
  6114. DP_PRINT_STATS("Invalid sa_idx or da_idx = %d",
  6115. soc->stats.rx.err.invalid_sa_da_idx);
  6116. DP_PRINT_STATS("Invalid Pdev = %d",
  6117. soc->stats.rx.err.invalid_pdev);
  6118. DP_PRINT_STATS("Invalid Peer = %d",
  6119. soc->stats.rx.err.rx_invalid_peer.num);
  6120. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  6121. soc->stats.rx.err.hal_ring_access_fail);
  6122. DP_PRINT_STATS("MSDU Done failures = %d",
  6123. soc->stats.rx.err.msdu_done_fail);
  6124. DP_PRINT_STATS("RX frags: %d", soc->stats.rx.rx_frags);
  6125. DP_PRINT_STATS("RX frag wait: %d", soc->stats.rx.rx_frag_wait);
  6126. DP_PRINT_STATS("RX frag err: %d", soc->stats.rx.rx_frag_err);
  6127. DP_PRINT_STATS("RX HP out_of_sync: %d", soc->stats.rx.hp_oos);
  6128. DP_PRINT_STATS("RX DESC invalid magic: %u",
  6129. soc->stats.rx.err.rx_desc_invalid_magic);
  6130. DP_PRINT_STATS("RX DUP DESC: %d",
  6131. soc->stats.rx.err.hal_reo_dest_dup);
  6132. DP_PRINT_STATS("RX REL DUP DESC: %d",
  6133. soc->stats.rx.err.hal_wbm_rel_dup);
  6134. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  6135. index += qdf_snprint(&rxdma_error[index],
  6136. DP_RXDMA_ERR_LENGTH - index,
  6137. " %d", soc->stats.rx.err.rxdma_error[i]);
  6138. }
  6139. DP_PRINT_STATS("RXDMA Error (0-31):%s", rxdma_error);
  6140. index = 0;
  6141. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  6142. index += qdf_snprint(&reo_error[index],
  6143. DP_REO_ERR_LENGTH - index,
  6144. " %d", soc->stats.rx.err.reo_error[i]);
  6145. }
  6146. DP_PRINT_STATS("REO Error(0-14):%s", reo_error);
  6147. }
  6148. const
  6149. char *dp_srng_get_str_from_hal_ring_type(enum hal_ring_type ring_type)
  6150. {
  6151. switch (ring_type) {
  6152. case REO_DST:
  6153. return "Reo_dst";
  6154. case REO_EXCEPTION:
  6155. return "Reo_exception";
  6156. case REO_CMD:
  6157. return "Reo_cmd";
  6158. case REO_REINJECT:
  6159. return "Reo_reinject";
  6160. case REO_STATUS:
  6161. return "Reo_status";
  6162. case WBM2SW_RELEASE:
  6163. return "wbm2sw_release";
  6164. case TCL_DATA:
  6165. return "tcl_data";
  6166. case TCL_CMD:
  6167. return "tcl_cmd";
  6168. case TCL_STATUS:
  6169. return "tcl_status";
  6170. case SW2WBM_RELEASE:
  6171. return "sw2wbm_release";
  6172. case RXDMA_BUF:
  6173. return "Rxdma_buf";
  6174. case RXDMA_DST:
  6175. return "Rxdma_dst";
  6176. case RXDMA_MONITOR_BUF:
  6177. return "Rxdma_monitor_buf";
  6178. case RXDMA_MONITOR_DESC:
  6179. return "Rxdma_monitor_desc";
  6180. case RXDMA_MONITOR_STATUS:
  6181. return "Rxdma_monitor_status";
  6182. default:
  6183. dp_err("Invalid ring type");
  6184. break;
  6185. }
  6186. return "Invalid";
  6187. }
  6188. /*
  6189. * dp_print_napi_stats(): NAPI stats
  6190. * @soc - soc handle
  6191. */
  6192. static void dp_print_napi_stats(struct dp_soc *soc)
  6193. {
  6194. hif_print_napi_stats(soc->hif_handle);
  6195. }
  6196. /**
  6197. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  6198. * @vdev: DP_VDEV handle
  6199. *
  6200. * Return:void
  6201. */
  6202. static inline void
  6203. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  6204. {
  6205. struct dp_peer *peer = NULL;
  6206. if (!vdev || !vdev->pdev)
  6207. return;
  6208. DP_STATS_CLR(vdev->pdev);
  6209. DP_STATS_CLR(vdev->pdev->soc);
  6210. DP_STATS_CLR(vdev);
  6211. hif_clear_napi_stats(vdev->pdev->soc->hif_handle);
  6212. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  6213. if (!peer)
  6214. return;
  6215. DP_STATS_CLR(peer);
  6216. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  6217. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  6218. &peer->stats, peer->peer_ids[0],
  6219. UPDATE_PEER_STATS, vdev->pdev->pdev_id);
  6220. #endif
  6221. }
  6222. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  6223. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  6224. &vdev->stats, vdev->vdev_id,
  6225. UPDATE_VDEV_STATS, vdev->pdev->pdev_id);
  6226. #endif
  6227. }
  6228. /**
  6229. * dp_print_common_rates_info(): Print common rate for tx or rx
  6230. * @pkt_type_array: rate type array contains rate info
  6231. *
  6232. * Return:void
  6233. */
  6234. static inline void
  6235. dp_print_common_rates_info(struct cdp_pkt_type *pkt_type_array)
  6236. {
  6237. uint8_t mcs, pkt_type;
  6238. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  6239. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  6240. if (!dp_rate_string[pkt_type][mcs].valid)
  6241. continue;
  6242. DP_PRINT_STATS(" %s = %d",
  6243. dp_rate_string[pkt_type][mcs].mcs_type,
  6244. pkt_type_array[pkt_type].mcs_count[mcs]);
  6245. }
  6246. DP_PRINT_STATS("\n");
  6247. }
  6248. }
  6249. /**
  6250. * dp_print_rx_rates(): Print Rx rate stats
  6251. * @vdev: DP_VDEV handle
  6252. *
  6253. * Return:void
  6254. */
  6255. static inline void
  6256. dp_print_rx_rates(struct dp_vdev *vdev)
  6257. {
  6258. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6259. uint8_t i;
  6260. uint8_t index = 0;
  6261. char nss[DP_NSS_LENGTH];
  6262. DP_PRINT_STATS("Rx Rate Info:\n");
  6263. dp_print_common_rates_info(pdev->stats.rx.pkt_type);
  6264. index = 0;
  6265. for (i = 0; i < SS_COUNT; i++) {
  6266. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6267. " %d", pdev->stats.rx.nss[i]);
  6268. }
  6269. DP_PRINT_STATS("NSS(1-8) = %s",
  6270. nss);
  6271. DP_PRINT_STATS("SGI ="
  6272. " 0.8us %d,"
  6273. " 0.4us %d,"
  6274. " 1.6us %d,"
  6275. " 3.2us %d,",
  6276. pdev->stats.rx.sgi_count[0],
  6277. pdev->stats.rx.sgi_count[1],
  6278. pdev->stats.rx.sgi_count[2],
  6279. pdev->stats.rx.sgi_count[3]);
  6280. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  6281. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  6282. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  6283. DP_PRINT_STATS("Reception Type ="
  6284. " SU: %d,"
  6285. " MU_MIMO:%d,"
  6286. " MU_OFDMA:%d,"
  6287. " MU_OFDMA_MIMO:%d\n",
  6288. pdev->stats.rx.reception_type[0],
  6289. pdev->stats.rx.reception_type[1],
  6290. pdev->stats.rx.reception_type[2],
  6291. pdev->stats.rx.reception_type[3]);
  6292. DP_PRINT_STATS("Aggregation:\n");
  6293. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  6294. pdev->stats.rx.ampdu_cnt);
  6295. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  6296. pdev->stats.rx.non_ampdu_cnt);
  6297. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  6298. pdev->stats.rx.amsdu_cnt);
  6299. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  6300. pdev->stats.rx.non_amsdu_cnt);
  6301. }
  6302. /**
  6303. * dp_print_tx_rates(): Print tx rates
  6304. * @vdev: DP_VDEV handle
  6305. *
  6306. * Return:void
  6307. */
  6308. static inline void
  6309. dp_print_tx_rates(struct dp_vdev *vdev)
  6310. {
  6311. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6312. DP_PRINT_STATS("Tx Rate Info:\n");
  6313. dp_print_common_rates_info(pdev->stats.tx.pkt_type);
  6314. DP_PRINT_STATS("SGI ="
  6315. " 0.8us %d"
  6316. " 0.4us %d"
  6317. " 1.6us %d"
  6318. " 3.2us %d",
  6319. pdev->stats.tx.sgi_count[0],
  6320. pdev->stats.tx.sgi_count[1],
  6321. pdev->stats.tx.sgi_count[2],
  6322. pdev->stats.tx.sgi_count[3]);
  6323. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  6324. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  6325. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  6326. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  6327. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  6328. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  6329. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  6330. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  6331. DP_PRINT_STATS("Aggregation:\n");
  6332. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  6333. pdev->stats.tx.ampdu_cnt);
  6334. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  6335. pdev->stats.tx.non_ampdu_cnt);
  6336. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  6337. pdev->stats.tx.amsdu_cnt);
  6338. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  6339. pdev->stats.tx.non_amsdu_cnt);
  6340. }
  6341. /**
  6342. * dp_print_peer_stats():print peer stats
  6343. * @peer: DP_PEER handle
  6344. *
  6345. * return void
  6346. */
  6347. static inline void dp_print_peer_stats(struct dp_peer *peer)
  6348. {
  6349. uint8_t i;
  6350. uint32_t index;
  6351. uint32_t j;
  6352. char nss[DP_NSS_LENGTH];
  6353. char mu_group_id[DP_MU_GROUP_LENGTH];
  6354. DP_PRINT_STATS("Node Tx Stats:\n");
  6355. DP_PRINT_STATS("Total Packet Completions = %d",
  6356. peer->stats.tx.comp_pkt.num);
  6357. DP_PRINT_STATS("Total Bytes Completions = %llu",
  6358. peer->stats.tx.comp_pkt.bytes);
  6359. DP_PRINT_STATS("Success Packets = %d",
  6360. peer->stats.tx.tx_success.num);
  6361. DP_PRINT_STATS("Success Bytes = %llu",
  6362. peer->stats.tx.tx_success.bytes);
  6363. DP_PRINT_STATS("Unicast Success Packets = %d",
  6364. peer->stats.tx.ucast.num);
  6365. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  6366. peer->stats.tx.ucast.bytes);
  6367. DP_PRINT_STATS("Multicast Success Packets = %d",
  6368. peer->stats.tx.mcast.num);
  6369. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  6370. peer->stats.tx.mcast.bytes);
  6371. DP_PRINT_STATS("Broadcast Success Packets = %d",
  6372. peer->stats.tx.bcast.num);
  6373. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  6374. peer->stats.tx.bcast.bytes);
  6375. DP_PRINT_STATS("Packets Failed = %d",
  6376. peer->stats.tx.tx_failed);
  6377. DP_PRINT_STATS("Packets In OFDMA = %d",
  6378. peer->stats.tx.ofdma);
  6379. DP_PRINT_STATS("Packets In STBC = %d",
  6380. peer->stats.tx.stbc);
  6381. DP_PRINT_STATS("Packets In LDPC = %d",
  6382. peer->stats.tx.ldpc);
  6383. DP_PRINT_STATS("Packet Retries = %d",
  6384. peer->stats.tx.retries);
  6385. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  6386. peer->stats.tx.amsdu_cnt);
  6387. DP_PRINT_STATS("Msdu's As Part of Ampdu = %d",
  6388. peer->stats.tx.non_ampdu_cnt);
  6389. DP_PRINT_STATS("Msdu's As Ampdu = %d",
  6390. peer->stats.tx.ampdu_cnt);
  6391. DP_PRINT_STATS("Last Packet RSSI = %d",
  6392. peer->stats.tx.last_ack_rssi);
  6393. DP_PRINT_STATS("Dropped At FW: Removed Pkts = %u",
  6394. peer->stats.tx.dropped.fw_rem.num);
  6395. DP_PRINT_STATS("Dropped At FW: Removed bytes = %llu",
  6396. peer->stats.tx.dropped.fw_rem.bytes);
  6397. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  6398. peer->stats.tx.dropped.fw_rem_tx);
  6399. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  6400. peer->stats.tx.dropped.fw_rem_notx);
  6401. DP_PRINT_STATS("Dropped : Age Out = %d",
  6402. peer->stats.tx.dropped.age_out);
  6403. DP_PRINT_STATS("NAWDS : ");
  6404. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  6405. peer->stats.tx.nawds_mcast_drop);
  6406. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  6407. peer->stats.tx.nawds_mcast.num);
  6408. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  6409. peer->stats.tx.nawds_mcast.bytes);
  6410. DP_PRINT_STATS("Rate Info:");
  6411. dp_print_common_rates_info(peer->stats.tx.pkt_type);
  6412. DP_PRINT_STATS("SGI = "
  6413. " 0.8us %d"
  6414. " 0.4us %d"
  6415. " 1.6us %d"
  6416. " 3.2us %d",
  6417. peer->stats.tx.sgi_count[0],
  6418. peer->stats.tx.sgi_count[1],
  6419. peer->stats.tx.sgi_count[2],
  6420. peer->stats.tx.sgi_count[3]);
  6421. DP_PRINT_STATS("Excess Retries per AC ");
  6422. DP_PRINT_STATS(" Best effort = %d",
  6423. peer->stats.tx.excess_retries_per_ac[0]);
  6424. DP_PRINT_STATS(" Background= %d",
  6425. peer->stats.tx.excess_retries_per_ac[1]);
  6426. DP_PRINT_STATS(" Video = %d",
  6427. peer->stats.tx.excess_retries_per_ac[2]);
  6428. DP_PRINT_STATS(" Voice = %d",
  6429. peer->stats.tx.excess_retries_per_ac[3]);
  6430. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  6431. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  6432. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  6433. index = 0;
  6434. for (i = 0; i < SS_COUNT; i++) {
  6435. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6436. " %d", peer->stats.tx.nss[i]);
  6437. }
  6438. DP_PRINT_STATS("NSS(1-8) = %s", nss);
  6439. DP_PRINT_STATS("Transmit Type :");
  6440. DP_PRINT_STATS("SU %d, MU_MIMO %d, MU_OFDMA %d, MU_MIMO_OFDMA %d",
  6441. peer->stats.tx.transmit_type[0],
  6442. peer->stats.tx.transmit_type[1],
  6443. peer->stats.tx.transmit_type[2],
  6444. peer->stats.tx.transmit_type[3]);
  6445. for (i = 0; i < MAX_MU_GROUP_ID;) {
  6446. index = 0;
  6447. for (j = 0; j < DP_MU_GROUP_SHOW && i < MAX_MU_GROUP_ID;
  6448. j++) {
  6449. index += qdf_snprint(&mu_group_id[index],
  6450. DP_MU_GROUP_LENGTH - index,
  6451. " %d",
  6452. peer->stats.tx.mu_group_id[i]);
  6453. i++;
  6454. }
  6455. DP_PRINT_STATS("User position list for GID %02d->%d: [%s]",
  6456. i - DP_MU_GROUP_SHOW, i - 1, mu_group_id);
  6457. }
  6458. DP_PRINT_STATS("Last Packet RU index [%d], Size [%d]",
  6459. peer->stats.tx.ru_start, peer->stats.tx.ru_tones);
  6460. DP_PRINT_STATS("RU Locations RU[26 52 106 242 484 996]:");
  6461. DP_PRINT_STATS("RU_26: %d", peer->stats.tx.ru_loc[0]);
  6462. DP_PRINT_STATS("RU 52: %d", peer->stats.tx.ru_loc[1]);
  6463. DP_PRINT_STATS("RU 106: %d", peer->stats.tx.ru_loc[2]);
  6464. DP_PRINT_STATS("RU 242: %d", peer->stats.tx.ru_loc[3]);
  6465. DP_PRINT_STATS("RU 484: %d", peer->stats.tx.ru_loc[4]);
  6466. DP_PRINT_STATS("RU 996: %d", peer->stats.tx.ru_loc[5]);
  6467. DP_PRINT_STATS("Aggregation:");
  6468. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  6469. peer->stats.tx.amsdu_cnt);
  6470. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  6471. peer->stats.tx.non_amsdu_cnt);
  6472. DP_PRINT_STATS("Bytes and Packets transmitted in last one sec:");
  6473. DP_PRINT_STATS(" Bytes transmitted in last sec: %d",
  6474. peer->stats.tx.tx_byte_rate);
  6475. DP_PRINT_STATS(" Data transmitted in last sec: %d",
  6476. peer->stats.tx.tx_data_rate);
  6477. DP_PRINT_STATS("Node Rx Stats:");
  6478. DP_PRINT_STATS("Packets Sent To Stack = %d",
  6479. peer->stats.rx.to_stack.num);
  6480. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  6481. peer->stats.rx.to_stack.bytes);
  6482. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  6483. DP_PRINT_STATS("Ring Id = %d", i);
  6484. DP_PRINT_STATS(" Packets Received = %d",
  6485. peer->stats.rx.rcvd_reo[i].num);
  6486. DP_PRINT_STATS(" Bytes Received = %llu",
  6487. peer->stats.rx.rcvd_reo[i].bytes);
  6488. }
  6489. DP_PRINT_STATS("Multicast Packets Received = %d",
  6490. peer->stats.rx.multicast.num);
  6491. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  6492. peer->stats.rx.multicast.bytes);
  6493. DP_PRINT_STATS("Broadcast Packets Received = %d",
  6494. peer->stats.rx.bcast.num);
  6495. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  6496. peer->stats.rx.bcast.bytes);
  6497. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  6498. peer->stats.rx.intra_bss.pkts.num);
  6499. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  6500. peer->stats.rx.intra_bss.pkts.bytes);
  6501. DP_PRINT_STATS("Raw Packets Received = %d",
  6502. peer->stats.rx.raw.num);
  6503. DP_PRINT_STATS("Raw Bytes Received = %llu",
  6504. peer->stats.rx.raw.bytes);
  6505. DP_PRINT_STATS("Errors: MIC Errors = %d",
  6506. peer->stats.rx.err.mic_err);
  6507. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  6508. peer->stats.rx.err.decrypt_err);
  6509. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  6510. peer->stats.rx.non_ampdu_cnt);
  6511. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  6512. peer->stats.rx.ampdu_cnt);
  6513. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  6514. peer->stats.rx.non_amsdu_cnt);
  6515. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  6516. peer->stats.rx.amsdu_cnt);
  6517. DP_PRINT_STATS("NAWDS : ");
  6518. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  6519. peer->stats.rx.nawds_mcast_drop);
  6520. DP_PRINT_STATS("SGI ="
  6521. " 0.8us %d"
  6522. " 0.4us %d"
  6523. " 1.6us %d"
  6524. " 3.2us %d",
  6525. peer->stats.rx.sgi_count[0],
  6526. peer->stats.rx.sgi_count[1],
  6527. peer->stats.rx.sgi_count[2],
  6528. peer->stats.rx.sgi_count[3]);
  6529. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  6530. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  6531. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  6532. DP_PRINT_STATS("Reception Type ="
  6533. " SU %d,"
  6534. " MU_MIMO %d,"
  6535. " MU_OFDMA %d,"
  6536. " MU_OFDMA_MIMO %d",
  6537. peer->stats.rx.reception_type[0],
  6538. peer->stats.rx.reception_type[1],
  6539. peer->stats.rx.reception_type[2],
  6540. peer->stats.rx.reception_type[3]);
  6541. dp_print_common_rates_info(peer->stats.rx.pkt_type);
  6542. index = 0;
  6543. for (i = 0; i < SS_COUNT; i++) {
  6544. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  6545. " %d", peer->stats.rx.nss[i]);
  6546. }
  6547. DP_PRINT_STATS("NSS(1-8) = %s",
  6548. nss);
  6549. DP_PRINT_STATS("Aggregation:");
  6550. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  6551. peer->stats.rx.ampdu_cnt);
  6552. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  6553. peer->stats.rx.non_ampdu_cnt);
  6554. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  6555. peer->stats.rx.amsdu_cnt);
  6556. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  6557. peer->stats.rx.non_amsdu_cnt);
  6558. DP_PRINT_STATS("Bytes and Packets received in last one sec:");
  6559. DP_PRINT_STATS(" Bytes received in last sec: %d",
  6560. peer->stats.rx.rx_byte_rate);
  6561. DP_PRINT_STATS(" Data received in last sec: %d",
  6562. peer->stats.rx.rx_data_rate);
  6563. }
  6564. /*
  6565. * dp_get_host_peer_stats()- function to print peer stats
  6566. * @pdev_handle: DP_PDEV handle
  6567. * @mac_addr: mac address of the peer
  6568. *
  6569. * Return: void
  6570. */
  6571. static void
  6572. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  6573. {
  6574. struct dp_peer *peer;
  6575. uint8_t local_id;
  6576. if (!mac_addr) {
  6577. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6578. "Invalid MAC address\n");
  6579. return;
  6580. }
  6581. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  6582. &local_id);
  6583. if (!peer) {
  6584. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6585. "%s: Invalid peer\n", __func__);
  6586. return;
  6587. }
  6588. /* Making sure the peer is for the specific pdev */
  6589. if ((struct dp_pdev *)pdev_handle != peer->vdev->pdev) {
  6590. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  6591. "%s: Peer is not for this pdev\n", __func__);
  6592. return;
  6593. }
  6594. dp_print_peer_stats(peer);
  6595. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  6596. }
  6597. /**
  6598. * dp_txrx_stats_help() - Helper function for Txrx_Stats
  6599. *
  6600. * Return: None
  6601. */
  6602. static void dp_txrx_stats_help(void)
  6603. {
  6604. dp_info("Command: iwpriv wlan0 txrx_stats <stats_option> <mac_id>");
  6605. dp_info("stats_option:");
  6606. dp_info(" 1 -- HTT Tx Statistics");
  6607. dp_info(" 2 -- HTT Rx Statistics");
  6608. dp_info(" 3 -- HTT Tx HW Queue Statistics");
  6609. dp_info(" 4 -- HTT Tx HW Sched Statistics");
  6610. dp_info(" 5 -- HTT Error Statistics");
  6611. dp_info(" 6 -- HTT TQM Statistics");
  6612. dp_info(" 7 -- HTT TQM CMDQ Statistics");
  6613. dp_info(" 8 -- HTT TX_DE_CMN Statistics");
  6614. dp_info(" 9 -- HTT Tx Rate Statistics");
  6615. dp_info(" 10 -- HTT Rx Rate Statistics");
  6616. dp_info(" 11 -- HTT Peer Statistics");
  6617. dp_info(" 12 -- HTT Tx SelfGen Statistics");
  6618. dp_info(" 13 -- HTT Tx MU HWQ Statistics");
  6619. dp_info(" 14 -- HTT RING_IF_INFO Statistics");
  6620. dp_info(" 15 -- HTT SRNG Statistics");
  6621. dp_info(" 16 -- HTT SFM Info Statistics");
  6622. dp_info(" 17 -- HTT PDEV_TX_MU_MIMO_SCHED INFO Statistics");
  6623. dp_info(" 18 -- HTT Peer List Details");
  6624. dp_info(" 20 -- Clear Host Statistics");
  6625. dp_info(" 21 -- Host Rx Rate Statistics");
  6626. dp_info(" 22 -- Host Tx Rate Statistics");
  6627. dp_info(" 23 -- Host Tx Statistics");
  6628. dp_info(" 24 -- Host Rx Statistics");
  6629. dp_info(" 25 -- Host AST Statistics");
  6630. dp_info(" 26 -- Host SRNG PTR Statistics");
  6631. dp_info(" 27 -- Host Mon Statistics");
  6632. dp_info(" 28 -- Host REO Queue Statistics");
  6633. dp_info(" 29 -- Host Soc cfg param Statistics");
  6634. dp_info(" 30 -- Host pdev cfg param Statistics");
  6635. }
  6636. /**
  6637. * dp_print_host_stats()- Function to print the stats aggregated at host
  6638. * @vdev_handle: DP_VDEV handle
  6639. * @type: host stats type
  6640. *
  6641. * Return: 0 on success, print error message in case of failure
  6642. */
  6643. static int
  6644. dp_print_host_stats(struct cdp_vdev *vdev_handle,
  6645. struct cdp_txrx_stats_req *req)
  6646. {
  6647. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6648. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6649. enum cdp_host_txrx_stats type =
  6650. dp_stats_mapping_table[req->stats][STATS_HOST];
  6651. dp_aggregate_pdev_stats(pdev);
  6652. switch (type) {
  6653. case TXRX_CLEAR_STATS:
  6654. dp_txrx_host_stats_clr(vdev);
  6655. break;
  6656. case TXRX_RX_RATE_STATS:
  6657. dp_print_rx_rates(vdev);
  6658. break;
  6659. case TXRX_TX_RATE_STATS:
  6660. dp_print_tx_rates(vdev);
  6661. break;
  6662. case TXRX_TX_HOST_STATS:
  6663. dp_print_pdev_tx_stats(pdev);
  6664. dp_print_soc_tx_stats(pdev->soc);
  6665. break;
  6666. case TXRX_RX_HOST_STATS:
  6667. dp_print_pdev_rx_stats(pdev);
  6668. dp_print_soc_rx_stats(pdev->soc);
  6669. break;
  6670. case TXRX_AST_STATS:
  6671. dp_print_ast_stats(pdev->soc);
  6672. dp_print_peer_table(vdev);
  6673. break;
  6674. case TXRX_SRNG_PTR_STATS:
  6675. dp_print_ring_stats(pdev);
  6676. break;
  6677. case TXRX_RX_MON_STATS:
  6678. dp_print_pdev_rx_mon_stats(pdev);
  6679. break;
  6680. case TXRX_REO_QUEUE_STATS:
  6681. dp_get_host_peer_stats((struct cdp_pdev *)pdev, req->peer_addr);
  6682. break;
  6683. case TXRX_SOC_CFG_PARAMS:
  6684. dp_print_soc_cfg_params(pdev->soc);
  6685. break;
  6686. case TXRX_PDEV_CFG_PARAMS:
  6687. dp_print_pdev_cfg_params(pdev);
  6688. break;
  6689. case TXRX_NAPI_STATS:
  6690. dp_print_napi_stats(pdev->soc);
  6691. break;
  6692. default:
  6693. dp_info("Wrong Input For TxRx Host Stats");
  6694. dp_txrx_stats_help();
  6695. break;
  6696. }
  6697. return 0;
  6698. }
  6699. /*
  6700. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  6701. * @pdev: DP_PDEV handle
  6702. *
  6703. * Return: void
  6704. */
  6705. static void
  6706. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  6707. {
  6708. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  6709. int mac_id;
  6710. qdf_mem_zero(&(htt_tlv_filter), sizeof(htt_tlv_filter));
  6711. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6712. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6713. pdev->pdev_id);
  6714. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  6715. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  6716. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  6717. }
  6718. }
  6719. /*
  6720. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  6721. * @pdev: DP_PDEV handle
  6722. *
  6723. * Return: void
  6724. */
  6725. static void
  6726. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  6727. {
  6728. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6729. int mac_id;
  6730. htt_tlv_filter.mpdu_start = 1;
  6731. htt_tlv_filter.msdu_start = 0;
  6732. htt_tlv_filter.packet = 0;
  6733. htt_tlv_filter.msdu_end = 0;
  6734. htt_tlv_filter.mpdu_end = 0;
  6735. htt_tlv_filter.attention = 0;
  6736. htt_tlv_filter.ppdu_start = 1;
  6737. htt_tlv_filter.ppdu_end = 1;
  6738. htt_tlv_filter.ppdu_end_user_stats = 1;
  6739. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6740. htt_tlv_filter.ppdu_end_status_done = 1;
  6741. htt_tlv_filter.enable_fp = 1;
  6742. htt_tlv_filter.enable_md = 0;
  6743. if (pdev->neighbour_peers_added &&
  6744. pdev->soc->hw_nac_monitor_support) {
  6745. htt_tlv_filter.enable_md = 1;
  6746. htt_tlv_filter.packet_header = 1;
  6747. }
  6748. if (pdev->mcopy_mode) {
  6749. htt_tlv_filter.packet_header = 1;
  6750. htt_tlv_filter.enable_mo = 1;
  6751. }
  6752. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6753. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6754. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6755. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6756. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6757. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6758. if (pdev->neighbour_peers_added &&
  6759. pdev->soc->hw_nac_monitor_support)
  6760. htt_tlv_filter.md_data_filter = FILTER_DATA_ALL;
  6761. htt_tlv_filter.offset_valid = false;
  6762. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6763. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6764. pdev->pdev_id);
  6765. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  6766. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  6767. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  6768. }
  6769. }
  6770. /*
  6771. * is_ppdu_txrx_capture_enabled() - API to check both pktlog and debug_sniffer
  6772. * modes are enabled or not.
  6773. * @dp_pdev: dp pdev handle.
  6774. *
  6775. * Return: bool
  6776. */
  6777. static inline bool is_ppdu_txrx_capture_enabled(struct dp_pdev *pdev)
  6778. {
  6779. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable &&
  6780. !pdev->mcopy_mode)
  6781. return true;
  6782. else
  6783. return false;
  6784. }
  6785. /*
  6786. *dp_set_bpr_enable() - API to enable/disable bpr feature
  6787. *@pdev_handle: DP_PDEV handle.
  6788. *@val: Provided value.
  6789. *
  6790. *Return: 0 for success. nonzero for failure.
  6791. */
  6792. static QDF_STATUS
  6793. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  6794. {
  6795. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6796. switch (val) {
  6797. case CDP_BPR_DISABLE:
  6798. pdev->bpr_enable = CDP_BPR_DISABLE;
  6799. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  6800. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6801. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6802. } else if (pdev->enhanced_stats_en &&
  6803. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  6804. !pdev->pktlog_ppdu_stats) {
  6805. dp_h2t_cfg_stats_msg_send(pdev,
  6806. DP_PPDU_STATS_CFG_ENH_STATS,
  6807. pdev->pdev_id);
  6808. }
  6809. break;
  6810. case CDP_BPR_ENABLE:
  6811. pdev->bpr_enable = CDP_BPR_ENABLE;
  6812. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  6813. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  6814. dp_h2t_cfg_stats_msg_send(pdev,
  6815. DP_PPDU_STATS_CFG_BPR,
  6816. pdev->pdev_id);
  6817. } else if (pdev->enhanced_stats_en &&
  6818. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  6819. !pdev->pktlog_ppdu_stats) {
  6820. dp_h2t_cfg_stats_msg_send(pdev,
  6821. DP_PPDU_STATS_CFG_BPR_ENH,
  6822. pdev->pdev_id);
  6823. } else if (pdev->pktlog_ppdu_stats) {
  6824. dp_h2t_cfg_stats_msg_send(pdev,
  6825. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  6826. pdev->pdev_id);
  6827. }
  6828. break;
  6829. default:
  6830. break;
  6831. }
  6832. return QDF_STATUS_SUCCESS;
  6833. }
  6834. /*
  6835. * dp_pdev_tid_stats_ingress_inc
  6836. * @pdev: pdev handle
  6837. * @val: increase in value
  6838. *
  6839. * Return: void
  6840. */
  6841. static void
  6842. dp_pdev_tid_stats_ingress_inc(struct cdp_pdev *pdev, uint32_t val)
  6843. {
  6844. struct dp_pdev *dp_pdev = (struct dp_pdev *)pdev;
  6845. dp_pdev->stats.tid_stats.ingress_stack += val;
  6846. }
  6847. /*
  6848. * dp_pdev_tid_stats_osif_drop
  6849. * @pdev: pdev handle
  6850. * @val: increase in value
  6851. *
  6852. * Return: void
  6853. */
  6854. static void
  6855. dp_pdev_tid_stats_osif_drop(struct cdp_pdev *pdev, uint32_t val)
  6856. {
  6857. struct dp_pdev *dp_pdev = (struct dp_pdev *)pdev;
  6858. dp_pdev->stats.tid_stats.osif_drop += val;
  6859. }
  6860. /*
  6861. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  6862. * @pdev_handle: DP_PDEV handle
  6863. * @val: user provided value
  6864. *
  6865. * Return: 0 for success. nonzero for failure.
  6866. */
  6867. static QDF_STATUS
  6868. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  6869. {
  6870. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6871. QDF_STATUS status = QDF_STATUS_SUCCESS;
  6872. if (pdev->mcopy_mode)
  6873. dp_reset_monitor_mode(pdev_handle);
  6874. switch (val) {
  6875. case 0:
  6876. pdev->tx_sniffer_enable = 0;
  6877. pdev->mcopy_mode = 0;
  6878. pdev->monitor_configured = false;
  6879. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  6880. !pdev->bpr_enable) {
  6881. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6882. dp_ppdu_ring_reset(pdev);
  6883. } else if (pdev->enhanced_stats_en && !pdev->bpr_enable) {
  6884. dp_h2t_cfg_stats_msg_send(pdev,
  6885. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  6886. } else if (!pdev->enhanced_stats_en && pdev->bpr_enable) {
  6887. dp_h2t_cfg_stats_msg_send(pdev,
  6888. DP_PPDU_STATS_CFG_BPR_ENH,
  6889. pdev->pdev_id);
  6890. } else {
  6891. dp_h2t_cfg_stats_msg_send(pdev,
  6892. DP_PPDU_STATS_CFG_BPR,
  6893. pdev->pdev_id);
  6894. }
  6895. break;
  6896. case 1:
  6897. pdev->tx_sniffer_enable = 1;
  6898. pdev->mcopy_mode = 0;
  6899. pdev->monitor_configured = false;
  6900. if (!pdev->pktlog_ppdu_stats)
  6901. dp_h2t_cfg_stats_msg_send(pdev,
  6902. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  6903. break;
  6904. case 2:
  6905. if (pdev->monitor_vdev) {
  6906. status = QDF_STATUS_E_RESOURCES;
  6907. break;
  6908. }
  6909. pdev->mcopy_mode = 1;
  6910. dp_pdev_configure_monitor_rings(pdev);
  6911. pdev->monitor_configured = true;
  6912. pdev->tx_sniffer_enable = 0;
  6913. if (!pdev->pktlog_ppdu_stats)
  6914. dp_h2t_cfg_stats_msg_send(pdev,
  6915. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  6916. break;
  6917. default:
  6918. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6919. "Invalid value");
  6920. break;
  6921. }
  6922. return status;
  6923. }
  6924. /*
  6925. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  6926. * @pdev_handle: DP_PDEV handle
  6927. *
  6928. * Return: void
  6929. */
  6930. static void
  6931. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  6932. {
  6933. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6934. if (pdev->enhanced_stats_en == 0)
  6935. dp_cal_client_timer_start(pdev->cal_client_ctx);
  6936. pdev->enhanced_stats_en = 1;
  6937. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  6938. !pdev->monitor_vdev)
  6939. dp_ppdu_ring_cfg(pdev);
  6940. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  6941. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  6942. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  6943. dp_h2t_cfg_stats_msg_send(pdev,
  6944. DP_PPDU_STATS_CFG_BPR_ENH,
  6945. pdev->pdev_id);
  6946. }
  6947. }
  6948. /*
  6949. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  6950. * @pdev_handle: DP_PDEV handle
  6951. *
  6952. * Return: void
  6953. */
  6954. static void
  6955. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  6956. {
  6957. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6958. if (pdev->enhanced_stats_en == 1)
  6959. dp_cal_client_timer_stop(pdev->cal_client_ctx);
  6960. pdev->enhanced_stats_en = 0;
  6961. if (is_ppdu_txrx_capture_enabled(pdev) && !pdev->bpr_enable) {
  6962. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  6963. } else if (is_ppdu_txrx_capture_enabled(pdev) && pdev->bpr_enable) {
  6964. dp_h2t_cfg_stats_msg_send(pdev,
  6965. DP_PPDU_STATS_CFG_BPR,
  6966. pdev->pdev_id);
  6967. }
  6968. if (!pdev->mcopy_mode && !pdev->neighbour_peers_added &&
  6969. !pdev->monitor_vdev)
  6970. dp_ppdu_ring_reset(pdev);
  6971. }
  6972. /*
  6973. * dp_get_fw_peer_stats()- function to print peer stats
  6974. * @pdev_handle: DP_PDEV handle
  6975. * @mac_addr: mac address of the peer
  6976. * @cap: Type of htt stats requested
  6977. * @is_wait: if set, wait on completion from firmware response
  6978. *
  6979. * Currently Supporting only MAC ID based requests Only
  6980. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  6981. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  6982. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  6983. *
  6984. * Return: void
  6985. */
  6986. static void
  6987. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  6988. uint32_t cap, uint32_t is_wait)
  6989. {
  6990. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  6991. int i;
  6992. uint32_t config_param0 = 0;
  6993. uint32_t config_param1 = 0;
  6994. uint32_t config_param2 = 0;
  6995. uint32_t config_param3 = 0;
  6996. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  6997. config_param0 |= (1 << (cap + 1));
  6998. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  6999. config_param1 |= (1 << i);
  7000. }
  7001. config_param2 |= (mac_addr[0] & 0x000000ff);
  7002. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  7003. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  7004. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  7005. config_param3 |= (mac_addr[4] & 0x000000ff);
  7006. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  7007. if (is_wait) {
  7008. qdf_event_reset(&pdev->fw_peer_stats_event);
  7009. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  7010. config_param0, config_param1,
  7011. config_param2, config_param3,
  7012. 0, 1, 0);
  7013. qdf_wait_single_event(&pdev->fw_peer_stats_event,
  7014. DP_FW_PEER_STATS_CMP_TIMEOUT_MSEC);
  7015. } else {
  7016. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  7017. config_param0, config_param1,
  7018. config_param2, config_param3,
  7019. 0, 0, 0);
  7020. }
  7021. }
  7022. /* This struct definition will be removed from here
  7023. * once it get added in FW headers*/
  7024. struct httstats_cmd_req {
  7025. uint32_t config_param0;
  7026. uint32_t config_param1;
  7027. uint32_t config_param2;
  7028. uint32_t config_param3;
  7029. int cookie;
  7030. u_int8_t stats_id;
  7031. };
  7032. /*
  7033. * dp_get_htt_stats: function to process the httstas request
  7034. * @pdev_handle: DP pdev handle
  7035. * @data: pointer to request data
  7036. * @data_len: length for request data
  7037. *
  7038. * return: void
  7039. */
  7040. static void
  7041. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  7042. {
  7043. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7044. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  7045. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  7046. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  7047. req->config_param0, req->config_param1,
  7048. req->config_param2, req->config_param3,
  7049. req->cookie, 0, 0);
  7050. }
  7051. /*
  7052. * dp_set_pdev_param: function to set parameters in pdev
  7053. * @pdev_handle: DP pdev handle
  7054. * @param: parameter type to be set
  7055. * @val: value of parameter to be set
  7056. *
  7057. * Return: 0 for success. nonzero for failure.
  7058. */
  7059. static QDF_STATUS dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  7060. enum cdp_pdev_param_type param,
  7061. uint8_t val)
  7062. {
  7063. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7064. switch (param) {
  7065. case CDP_CONFIG_DEBUG_SNIFFER:
  7066. return dp_config_debug_sniffer(pdev_handle, val);
  7067. case CDP_CONFIG_BPR_ENABLE:
  7068. return dp_set_bpr_enable(pdev_handle, val);
  7069. case CDP_CONFIG_PRIMARY_RADIO:
  7070. pdev->is_primary = val;
  7071. break;
  7072. case CDP_CONFIG_CAPTURE_LATENCY:
  7073. if (val == 1)
  7074. pdev->latency_capture_enable = true;
  7075. else
  7076. pdev->latency_capture_enable = false;
  7077. break;
  7078. case CDP_INGRESS_STATS:
  7079. dp_pdev_tid_stats_ingress_inc(pdev_handle, val);
  7080. break;
  7081. case CDP_OSIF_DROP:
  7082. dp_pdev_tid_stats_osif_drop(pdev_handle, val);
  7083. break;
  7084. case CDP_CONFIG_ENH_RX_CAPTURE:
  7085. return dp_config_enh_rx_capture(pdev_handle, val);
  7086. case CDP_CONFIG_TX_CAPTURE:
  7087. return dp_config_enh_tx_capture(pdev_handle, val);
  7088. default:
  7089. return QDF_STATUS_E_INVAL;
  7090. }
  7091. return QDF_STATUS_SUCCESS;
  7092. }
  7093. /*
  7094. * dp_calculate_delay_stats: function to get rx delay stats
  7095. * @vdev_handle: DP vdev handle
  7096. * @nbuf: skb
  7097. *
  7098. * Return: void
  7099. */
  7100. static void dp_calculate_delay_stats(struct cdp_vdev *vdev_handle,
  7101. qdf_nbuf_t nbuf)
  7102. {
  7103. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7104. dp_rx_compute_delay(vdev, nbuf);
  7105. }
  7106. /*
  7107. * dp_get_vdev_param: function to get parameters from vdev
  7108. * @param: parameter type to get value
  7109. *
  7110. * return: void
  7111. */
  7112. static uint32_t dp_get_vdev_param(struct cdp_vdev *vdev_handle,
  7113. enum cdp_vdev_param_type param)
  7114. {
  7115. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7116. uint32_t val;
  7117. switch (param) {
  7118. case CDP_ENABLE_WDS:
  7119. val = vdev->wds_enabled;
  7120. break;
  7121. case CDP_ENABLE_MEC:
  7122. val = vdev->mec_enabled;
  7123. break;
  7124. case CDP_ENABLE_DA_WAR:
  7125. val = vdev->pdev->soc->da_war_enabled;
  7126. break;
  7127. default:
  7128. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7129. "param value %d is wrong\n",
  7130. param);
  7131. val = -1;
  7132. break;
  7133. }
  7134. return val;
  7135. }
  7136. /*
  7137. * dp_set_vdev_param: function to set parameters in vdev
  7138. * @param: parameter type to be set
  7139. * @val: value of parameter to be set
  7140. *
  7141. * return: void
  7142. */
  7143. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  7144. enum cdp_vdev_param_type param, uint32_t val)
  7145. {
  7146. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7147. switch (param) {
  7148. case CDP_ENABLE_WDS:
  7149. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7150. "wds_enable %d for vdev(%p) id(%d)\n",
  7151. val, vdev, vdev->vdev_id);
  7152. vdev->wds_enabled = val;
  7153. break;
  7154. case CDP_ENABLE_MEC:
  7155. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7156. "mec_enable %d for vdev(%p) id(%d)\n",
  7157. val, vdev, vdev->vdev_id);
  7158. vdev->mec_enabled = val;
  7159. break;
  7160. case CDP_ENABLE_DA_WAR:
  7161. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7162. "da_war_enable %d for vdev(%p) id(%d)\n",
  7163. val, vdev, vdev->vdev_id);
  7164. vdev->pdev->soc->da_war_enabled = val;
  7165. dp_wds_flush_ast_table_wifi3(((struct cdp_soc_t *)
  7166. vdev->pdev->soc));
  7167. break;
  7168. case CDP_ENABLE_NAWDS:
  7169. vdev->nawds_enabled = val;
  7170. break;
  7171. case CDP_ENABLE_MCAST_EN:
  7172. vdev->mcast_enhancement_en = val;
  7173. break;
  7174. case CDP_ENABLE_PROXYSTA:
  7175. vdev->proxysta_vdev = val;
  7176. break;
  7177. case CDP_UPDATE_TDLS_FLAGS:
  7178. vdev->tdls_link_connected = val;
  7179. break;
  7180. case CDP_CFG_WDS_AGING_TIMER:
  7181. if (val == 0)
  7182. qdf_timer_stop(&vdev->pdev->soc->ast_aging_timer);
  7183. else if (val != vdev->wds_aging_timer_val)
  7184. qdf_timer_mod(&vdev->pdev->soc->ast_aging_timer, val);
  7185. vdev->wds_aging_timer_val = val;
  7186. break;
  7187. case CDP_ENABLE_AP_BRIDGE:
  7188. if (wlan_op_mode_sta != vdev->opmode)
  7189. vdev->ap_bridge_enabled = val;
  7190. else
  7191. vdev->ap_bridge_enabled = false;
  7192. break;
  7193. case CDP_ENABLE_CIPHER:
  7194. vdev->sec_type = val;
  7195. break;
  7196. case CDP_ENABLE_QWRAP_ISOLATION:
  7197. vdev->isolation_vdev = val;
  7198. break;
  7199. default:
  7200. break;
  7201. }
  7202. dp_tx_vdev_update_search_flags(vdev);
  7203. }
  7204. /**
  7205. * dp_peer_set_nawds: set nawds bit in peer
  7206. * @peer_handle: pointer to peer
  7207. * @value: enable/disable nawds
  7208. *
  7209. * return: void
  7210. */
  7211. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  7212. {
  7213. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7214. peer->nawds_enabled = value;
  7215. }
  7216. /*
  7217. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  7218. * @vdev_handle: DP_VDEV handle
  7219. * @map_id:ID of map that needs to be updated
  7220. *
  7221. * Return: void
  7222. */
  7223. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  7224. uint8_t map_id)
  7225. {
  7226. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7227. vdev->dscp_tid_map_id = map_id;
  7228. return;
  7229. }
  7230. #ifdef DP_RATETABLE_SUPPORT
  7231. static int dp_txrx_get_ratekbps(int preamb, int mcs,
  7232. int htflag, int gintval)
  7233. {
  7234. uint32_t rix;
  7235. return dp_getrateindex((uint32_t)gintval, (uint16_t)mcs, 1,
  7236. (uint8_t)preamb, 1, &rix);
  7237. }
  7238. #else
  7239. static int dp_txrx_get_ratekbps(int preamb, int mcs,
  7240. int htflag, int gintval)
  7241. {
  7242. return 0;
  7243. }
  7244. #endif
  7245. /* dp_txrx_get_pdev_stats - Returns cdp_pdev_stats
  7246. * @peer_handle: DP pdev handle
  7247. *
  7248. * return : cdp_pdev_stats pointer
  7249. */
  7250. static struct cdp_pdev_stats*
  7251. dp_txrx_get_pdev_stats(struct cdp_pdev *pdev_handle)
  7252. {
  7253. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7254. dp_aggregate_pdev_stats(pdev);
  7255. return &pdev->stats;
  7256. }
  7257. /* dp_txrx_get_peer_stats - will return cdp_peer_stats
  7258. * @peer_handle: DP_PEER handle
  7259. *
  7260. * return : cdp_peer_stats pointer
  7261. */
  7262. static struct cdp_peer_stats*
  7263. dp_txrx_get_peer_stats(struct cdp_peer *peer_handle)
  7264. {
  7265. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7266. qdf_assert(peer);
  7267. return &peer->stats;
  7268. }
  7269. /* dp_txrx_reset_peer_stats - reset cdp_peer_stats for particular peer
  7270. * @peer_handle: DP_PEER handle
  7271. *
  7272. * return : void
  7273. */
  7274. static void dp_txrx_reset_peer_stats(struct cdp_peer *peer_handle)
  7275. {
  7276. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7277. qdf_assert(peer);
  7278. qdf_mem_zero(&peer->stats, sizeof(peer->stats));
  7279. }
  7280. /* dp_txrx_get_vdev_stats - Update buffer with cdp_vdev_stats
  7281. * @vdev_handle: DP_VDEV handle
  7282. * @buf: buffer for vdev stats
  7283. *
  7284. * return : int
  7285. */
  7286. static int dp_txrx_get_vdev_stats(struct cdp_vdev *vdev_handle, void *buf,
  7287. bool is_aggregate)
  7288. {
  7289. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7290. struct cdp_vdev_stats *vdev_stats;
  7291. struct dp_pdev *pdev;
  7292. struct dp_soc *soc;
  7293. if (!vdev)
  7294. return 1;
  7295. pdev = vdev->pdev;
  7296. if (!pdev)
  7297. return 1;
  7298. soc = pdev->soc;
  7299. vdev_stats = (struct cdp_vdev_stats *)buf;
  7300. if (is_aggregate) {
  7301. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  7302. dp_aggregate_vdev_stats(vdev, buf);
  7303. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  7304. } else {
  7305. qdf_mem_copy(vdev_stats, &vdev->stats, sizeof(vdev->stats));
  7306. }
  7307. return 0;
  7308. }
  7309. /*
  7310. * dp_get_total_per(): get total per
  7311. * @pdev_handle: DP_PDEV handle
  7312. *
  7313. * Return: % error rate using retries per packet and success packets
  7314. */
  7315. static int dp_get_total_per(struct cdp_pdev *pdev_handle)
  7316. {
  7317. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7318. dp_aggregate_pdev_stats(pdev);
  7319. if ((pdev->stats.tx.tx_success.num + pdev->stats.tx.retries) == 0)
  7320. return 0;
  7321. return ((pdev->stats.tx.retries * 100) /
  7322. ((pdev->stats.tx.tx_success.num) + (pdev->stats.tx.retries)));
  7323. }
  7324. /*
  7325. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  7326. * @pdev_handle: DP_PDEV handle
  7327. * @buf: to hold pdev_stats
  7328. *
  7329. * Return: int
  7330. */
  7331. static int
  7332. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  7333. {
  7334. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7335. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  7336. struct cdp_txrx_stats_req req = {0,};
  7337. dp_aggregate_pdev_stats(pdev);
  7338. req.stats = (enum cdp_stats)HTT_DBG_EXT_STATS_PDEV_TX;
  7339. req.cookie_val = 1;
  7340. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  7341. req.param1, req.param2, req.param3, 0,
  7342. req.cookie_val, 0);
  7343. msleep(DP_MAX_SLEEP_TIME);
  7344. req.stats = (enum cdp_stats)HTT_DBG_EXT_STATS_PDEV_RX;
  7345. req.cookie_val = 1;
  7346. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  7347. req.param1, req.param2, req.param3, 0,
  7348. req.cookie_val, 0);
  7349. msleep(DP_MAX_SLEEP_TIME);
  7350. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  7351. return TXRX_STATS_LEVEL;
  7352. }
  7353. /**
  7354. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  7355. * @pdev: DP_PDEV handle
  7356. * @map_id: ID of map that needs to be updated
  7357. * @tos: index value in map
  7358. * @tid: tid value passed by the user
  7359. *
  7360. * Return: void
  7361. */
  7362. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  7363. uint8_t map_id, uint8_t tos, uint8_t tid)
  7364. {
  7365. uint8_t dscp;
  7366. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  7367. struct dp_soc *soc = pdev->soc;
  7368. if (!soc)
  7369. return;
  7370. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  7371. pdev->dscp_tid_map[map_id][dscp] = tid;
  7372. if (map_id < soc->num_hw_dscp_tid_map)
  7373. hal_tx_update_dscp_tid(soc->hal_soc, tid,
  7374. map_id, dscp);
  7375. return;
  7376. }
  7377. /**
  7378. * dp_hmmc_tid_override_en_wifi3(): Function to enable hmmc tid override.
  7379. * @pdev_handle: pdev handle
  7380. * @val: hmmc-dscp flag value
  7381. *
  7382. * Return: void
  7383. */
  7384. static void dp_hmmc_tid_override_en_wifi3(struct cdp_pdev *pdev_handle,
  7385. bool val)
  7386. {
  7387. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7388. pdev->hmmc_tid_override_en = val;
  7389. }
  7390. /**
  7391. * dp_set_hmmc_tid_val_wifi3(): Function to set hmmc tid value.
  7392. * @pdev_handle: pdev handle
  7393. * @tid: tid value
  7394. *
  7395. * Return: void
  7396. */
  7397. static void dp_set_hmmc_tid_val_wifi3(struct cdp_pdev *pdev_handle,
  7398. uint8_t tid)
  7399. {
  7400. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  7401. pdev->hmmc_tid = tid;
  7402. }
  7403. /**
  7404. * dp_fw_stats_process(): Process TxRX FW stats request
  7405. * @vdev_handle: DP VDEV handle
  7406. * @req: stats request
  7407. *
  7408. * return: int
  7409. */
  7410. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  7411. struct cdp_txrx_stats_req *req)
  7412. {
  7413. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7414. struct dp_pdev *pdev = NULL;
  7415. uint32_t stats = req->stats;
  7416. uint8_t mac_id = req->mac_id;
  7417. if (!vdev) {
  7418. DP_TRACE(NONE, "VDEV not found");
  7419. return 1;
  7420. }
  7421. pdev = vdev->pdev;
  7422. /*
  7423. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  7424. * from param0 to param3 according to below rule:
  7425. *
  7426. * PARAM:
  7427. * - config_param0 : start_offset (stats type)
  7428. * - config_param1 : stats bmask from start offset
  7429. * - config_param2 : stats bmask from start offset + 32
  7430. * - config_param3 : stats bmask from start offset + 64
  7431. */
  7432. if (req->stats == CDP_TXRX_STATS_0) {
  7433. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  7434. req->param1 = 0xFFFFFFFF;
  7435. req->param2 = 0xFFFFFFFF;
  7436. req->param3 = 0xFFFFFFFF;
  7437. } else if (req->stats == (uint8_t)HTT_DBG_EXT_STATS_PDEV_TX_MU) {
  7438. req->param0 = HTT_DBG_EXT_STATS_SET_VDEV_MASK(vdev->vdev_id);
  7439. }
  7440. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  7441. req->param1, req->param2, req->param3,
  7442. 0, 0, mac_id);
  7443. }
  7444. /**
  7445. * dp_txrx_stats_request - function to map to firmware and host stats
  7446. * @vdev: virtual handle
  7447. * @req: stats request
  7448. *
  7449. * Return: QDF_STATUS
  7450. */
  7451. static
  7452. QDF_STATUS dp_txrx_stats_request(struct cdp_vdev *vdev,
  7453. struct cdp_txrx_stats_req *req)
  7454. {
  7455. int host_stats;
  7456. int fw_stats;
  7457. enum cdp_stats stats;
  7458. int num_stats;
  7459. if (!vdev || !req) {
  7460. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7461. "Invalid vdev/req instance");
  7462. return QDF_STATUS_E_INVAL;
  7463. }
  7464. if (req->mac_id >= WLAN_CFG_MAC_PER_TARGET) {
  7465. dp_err("Invalid mac id request");
  7466. return QDF_STATUS_E_INVAL;
  7467. }
  7468. stats = req->stats;
  7469. if (stats >= CDP_TXRX_MAX_STATS)
  7470. return QDF_STATUS_E_INVAL;
  7471. /*
  7472. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  7473. * has to be updated if new FW HTT stats added
  7474. */
  7475. if (stats > CDP_TXRX_STATS_HTT_MAX)
  7476. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  7477. num_stats = QDF_ARRAY_SIZE(dp_stats_mapping_table);
  7478. if (stats >= num_stats) {
  7479. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7480. "%s: Invalid stats option: %d", __func__, stats);
  7481. return QDF_STATUS_E_INVAL;
  7482. }
  7483. req->stats = stats;
  7484. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  7485. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  7486. dp_info("stats: %u fw_stats_type: %d host_stats: %d",
  7487. stats, fw_stats, host_stats);
  7488. if (fw_stats != TXRX_FW_STATS_INVALID) {
  7489. /* update request with FW stats type */
  7490. req->stats = fw_stats;
  7491. return dp_fw_stats_process(vdev, req);
  7492. }
  7493. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  7494. (host_stats <= TXRX_HOST_STATS_MAX))
  7495. return dp_print_host_stats(vdev, req);
  7496. else
  7497. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7498. "Wrong Input for TxRx Stats");
  7499. return QDF_STATUS_SUCCESS;
  7500. }
  7501. /*
  7502. * dp_print_per_ring_stats(): Packet count per ring
  7503. * @soc - soc handle
  7504. */
  7505. static void dp_print_per_ring_stats(struct dp_soc *soc)
  7506. {
  7507. uint8_t ring;
  7508. uint16_t core;
  7509. uint64_t total_packets;
  7510. DP_TRACE_STATS(INFO_HIGH, "Reo packets per ring:");
  7511. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  7512. total_packets = 0;
  7513. DP_TRACE_STATS(INFO_HIGH,
  7514. "Packets on ring %u:", ring);
  7515. for (core = 0; core < NR_CPUS; core++) {
  7516. DP_TRACE_STATS(INFO_HIGH,
  7517. "Packets arriving on core %u: %llu",
  7518. core,
  7519. soc->stats.rx.ring_packets[core][ring]);
  7520. total_packets += soc->stats.rx.ring_packets[core][ring];
  7521. }
  7522. DP_TRACE_STATS(INFO_HIGH,
  7523. "Total packets on ring %u: %llu",
  7524. ring, total_packets);
  7525. }
  7526. }
  7527. /*
  7528. * dp_txrx_path_stats() - Function to display dump stats
  7529. * @soc - soc handle
  7530. *
  7531. * return: none
  7532. */
  7533. static void dp_txrx_path_stats(struct dp_soc *soc)
  7534. {
  7535. uint8_t error_code;
  7536. uint8_t loop_pdev;
  7537. struct dp_pdev *pdev;
  7538. uint8_t i;
  7539. if (!soc) {
  7540. DP_TRACE(ERROR, "%s: Invalid access",
  7541. __func__);
  7542. return;
  7543. }
  7544. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  7545. pdev = soc->pdev_list[loop_pdev];
  7546. dp_aggregate_pdev_stats(pdev);
  7547. DP_TRACE_STATS(INFO_HIGH, "Tx path Statistics:");
  7548. DP_TRACE_STATS(INFO_HIGH, "from stack: %u msdus (%llu bytes)",
  7549. pdev->stats.tx_i.rcvd.num,
  7550. pdev->stats.tx_i.rcvd.bytes);
  7551. DP_TRACE_STATS(INFO_HIGH,
  7552. "processed from host: %u msdus (%llu bytes)",
  7553. pdev->stats.tx_i.processed.num,
  7554. pdev->stats.tx_i.processed.bytes);
  7555. DP_TRACE_STATS(INFO_HIGH,
  7556. "successfully transmitted: %u msdus (%llu bytes)",
  7557. pdev->stats.tx.tx_success.num,
  7558. pdev->stats.tx.tx_success.bytes);
  7559. DP_TRACE_STATS(INFO_HIGH, "Dropped in host:");
  7560. DP_TRACE_STATS(INFO_HIGH, "Total packets dropped: %u,",
  7561. pdev->stats.tx_i.dropped.dropped_pkt.num);
  7562. DP_TRACE_STATS(INFO_HIGH, "Descriptor not available: %u",
  7563. pdev->stats.tx_i.dropped.desc_na.num);
  7564. DP_TRACE_STATS(INFO_HIGH, "Ring full: %u",
  7565. pdev->stats.tx_i.dropped.ring_full);
  7566. DP_TRACE_STATS(INFO_HIGH, "Enqueue fail: %u",
  7567. pdev->stats.tx_i.dropped.enqueue_fail);
  7568. DP_TRACE_STATS(INFO_HIGH, "DMA Error: %u",
  7569. pdev->stats.tx_i.dropped.dma_error);
  7570. DP_TRACE_STATS(INFO_HIGH, "Dropped in hardware:");
  7571. DP_TRACE_STATS(INFO_HIGH, "total packets dropped: %u",
  7572. pdev->stats.tx.tx_failed);
  7573. DP_TRACE_STATS(INFO_HIGH, "mpdu age out: %u",
  7574. pdev->stats.tx.dropped.age_out);
  7575. DP_TRACE_STATS(INFO_HIGH, "firmware removed packets: %u",
  7576. pdev->stats.tx.dropped.fw_rem.num);
  7577. DP_TRACE_STATS(INFO_HIGH, "firmware removed bytes: %llu",
  7578. pdev->stats.tx.dropped.fw_rem.bytes);
  7579. DP_TRACE_STATS(INFO_HIGH, "firmware removed tx: %u",
  7580. pdev->stats.tx.dropped.fw_rem_tx);
  7581. DP_TRACE_STATS(INFO_HIGH, "firmware removed notx %u",
  7582. pdev->stats.tx.dropped.fw_rem_notx);
  7583. DP_TRACE_STATS(INFO_HIGH, "Invalid peer on tx path: %u",
  7584. pdev->soc->stats.tx.tx_invalid_peer.num);
  7585. DP_TRACE_STATS(INFO_HIGH, "Tx packets sent per interrupt:");
  7586. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  7587. pdev->stats.tx_comp_histogram.pkts_1);
  7588. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  7589. pdev->stats.tx_comp_histogram.pkts_2_20);
  7590. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  7591. pdev->stats.tx_comp_histogram.pkts_21_40);
  7592. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  7593. pdev->stats.tx_comp_histogram.pkts_41_60);
  7594. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  7595. pdev->stats.tx_comp_histogram.pkts_61_80);
  7596. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  7597. pdev->stats.tx_comp_histogram.pkts_81_100);
  7598. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  7599. pdev->stats.tx_comp_histogram.pkts_101_200);
  7600. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  7601. pdev->stats.tx_comp_histogram.pkts_201_plus);
  7602. DP_TRACE_STATS(INFO_HIGH, "Rx path statistics");
  7603. DP_TRACE_STATS(INFO_HIGH,
  7604. "delivered %u msdus ( %llu bytes),",
  7605. pdev->stats.rx.to_stack.num,
  7606. pdev->stats.rx.to_stack.bytes);
  7607. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  7608. DP_TRACE_STATS(INFO_HIGH,
  7609. "received on reo[%d] %u msdus( %llu bytes),",
  7610. i, pdev->stats.rx.rcvd_reo[i].num,
  7611. pdev->stats.rx.rcvd_reo[i].bytes);
  7612. DP_TRACE_STATS(INFO_HIGH,
  7613. "intra-bss packets %u msdus ( %llu bytes),",
  7614. pdev->stats.rx.intra_bss.pkts.num,
  7615. pdev->stats.rx.intra_bss.pkts.bytes);
  7616. DP_TRACE_STATS(INFO_HIGH,
  7617. "intra-bss fails %u msdus ( %llu bytes),",
  7618. pdev->stats.rx.intra_bss.fail.num,
  7619. pdev->stats.rx.intra_bss.fail.bytes);
  7620. DP_TRACE_STATS(INFO_HIGH,
  7621. "raw packets %u msdus ( %llu bytes),",
  7622. pdev->stats.rx.raw.num,
  7623. pdev->stats.rx.raw.bytes);
  7624. DP_TRACE_STATS(INFO_HIGH, "mic errors %u",
  7625. pdev->stats.rx.err.mic_err);
  7626. DP_TRACE_STATS(INFO_HIGH, "Invalid peer on rx path: %u",
  7627. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  7628. DP_TRACE_STATS(INFO_HIGH, "sw_peer_id invalid %u",
  7629. pdev->soc->stats.rx.err.rx_invalid_peer_id.num);
  7630. DP_TRACE_STATS(INFO_HIGH, "packet_len invalid %u",
  7631. pdev->soc->stats.rx.err.rx_invalid_pkt_len.num);
  7632. DP_TRACE_STATS(INFO_HIGH, "Reo Statistics");
  7633. DP_TRACE_STATS(INFO_HIGH, "rbm error: %u msdus",
  7634. pdev->soc->stats.rx.err.invalid_rbm);
  7635. DP_TRACE_STATS(INFO_HIGH, "hal ring access fail: %u msdus",
  7636. pdev->soc->stats.rx.err.hal_ring_access_fail);
  7637. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  7638. error_code++) {
  7639. if (!pdev->soc->stats.rx.err.reo_error[error_code])
  7640. continue;
  7641. DP_TRACE_STATS(INFO_HIGH,
  7642. "Reo error number (%u): %u msdus",
  7643. error_code,
  7644. pdev->soc->stats.rx.err
  7645. .reo_error[error_code]);
  7646. }
  7647. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  7648. error_code++) {
  7649. if (!pdev->soc->stats.rx.err.rxdma_error[error_code])
  7650. continue;
  7651. DP_TRACE_STATS(INFO_HIGH,
  7652. "Rxdma error number (%u): %u msdus",
  7653. error_code,
  7654. pdev->soc->stats.rx.err
  7655. .rxdma_error[error_code]);
  7656. }
  7657. DP_TRACE_STATS(INFO_HIGH, "Rx packets reaped per interrupt:");
  7658. DP_TRACE_STATS(INFO_HIGH, "Single Packet: %u",
  7659. pdev->stats.rx_ind_histogram.pkts_1);
  7660. DP_TRACE_STATS(INFO_HIGH, "2-20 Packets: %u",
  7661. pdev->stats.rx_ind_histogram.pkts_2_20);
  7662. DP_TRACE_STATS(INFO_HIGH, "21-40 Packets: %u",
  7663. pdev->stats.rx_ind_histogram.pkts_21_40);
  7664. DP_TRACE_STATS(INFO_HIGH, "41-60 Packets: %u",
  7665. pdev->stats.rx_ind_histogram.pkts_41_60);
  7666. DP_TRACE_STATS(INFO_HIGH, "61-80 Packets: %u",
  7667. pdev->stats.rx_ind_histogram.pkts_61_80);
  7668. DP_TRACE_STATS(INFO_HIGH, "81-100 Packets: %u",
  7669. pdev->stats.rx_ind_histogram.pkts_81_100);
  7670. DP_TRACE_STATS(INFO_HIGH, "101-200 Packets: %u",
  7671. pdev->stats.rx_ind_histogram.pkts_101_200);
  7672. DP_TRACE_STATS(INFO_HIGH, " 201+ Packets: %u",
  7673. pdev->stats.rx_ind_histogram.pkts_201_plus);
  7674. DP_TRACE_STATS(INFO_HIGH, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  7675. __func__,
  7676. pdev->soc->wlan_cfg_ctx
  7677. ->tso_enabled,
  7678. pdev->soc->wlan_cfg_ctx
  7679. ->lro_enabled,
  7680. pdev->soc->wlan_cfg_ctx
  7681. ->rx_hash,
  7682. pdev->soc->wlan_cfg_ctx
  7683. ->napi_enabled);
  7684. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7685. DP_TRACE_STATS(INFO_HIGH, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  7686. __func__,
  7687. pdev->soc->wlan_cfg_ctx
  7688. ->tx_flow_stop_queue_threshold,
  7689. pdev->soc->wlan_cfg_ctx
  7690. ->tx_flow_start_queue_offset);
  7691. #endif
  7692. }
  7693. }
  7694. /*
  7695. * dp_txrx_dump_stats() - Dump statistics
  7696. * @value - Statistics option
  7697. */
  7698. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  7699. enum qdf_stats_verbosity_level level)
  7700. {
  7701. struct dp_soc *soc =
  7702. (struct dp_soc *)psoc;
  7703. QDF_STATUS status = QDF_STATUS_SUCCESS;
  7704. if (!soc) {
  7705. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7706. "%s: soc is NULL", __func__);
  7707. return QDF_STATUS_E_INVAL;
  7708. }
  7709. switch (value) {
  7710. case CDP_TXRX_PATH_STATS:
  7711. dp_txrx_path_stats(soc);
  7712. break;
  7713. case CDP_RX_RING_STATS:
  7714. dp_print_per_ring_stats(soc);
  7715. break;
  7716. case CDP_TXRX_TSO_STATS:
  7717. /* TODO: NOT IMPLEMENTED */
  7718. break;
  7719. case CDP_DUMP_TX_FLOW_POOL_INFO:
  7720. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  7721. break;
  7722. case CDP_DP_NAPI_STATS:
  7723. dp_print_napi_stats(soc);
  7724. break;
  7725. case CDP_TXRX_DESC_STATS:
  7726. /* TODO: NOT IMPLEMENTED */
  7727. break;
  7728. default:
  7729. status = QDF_STATUS_E_INVAL;
  7730. break;
  7731. }
  7732. return status;
  7733. }
  7734. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  7735. /**
  7736. * dp_update_flow_control_parameters() - API to store datapath
  7737. * config parameters
  7738. * @soc: soc handle
  7739. * @cfg: ini parameter handle
  7740. *
  7741. * Return: void
  7742. */
  7743. static inline
  7744. void dp_update_flow_control_parameters(struct dp_soc *soc,
  7745. struct cdp_config_params *params)
  7746. {
  7747. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  7748. params->tx_flow_stop_queue_threshold;
  7749. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  7750. params->tx_flow_start_queue_offset;
  7751. }
  7752. #else
  7753. static inline
  7754. void dp_update_flow_control_parameters(struct dp_soc *soc,
  7755. struct cdp_config_params *params)
  7756. {
  7757. }
  7758. #endif
  7759. /**
  7760. * dp_update_config_parameters() - API to store datapath
  7761. * config parameters
  7762. * @soc: soc handle
  7763. * @cfg: ini parameter handle
  7764. *
  7765. * Return: status
  7766. */
  7767. static
  7768. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  7769. struct cdp_config_params *params)
  7770. {
  7771. struct dp_soc *soc = (struct dp_soc *)psoc;
  7772. if (!(soc)) {
  7773. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  7774. "%s: Invalid handle", __func__);
  7775. return QDF_STATUS_E_INVAL;
  7776. }
  7777. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  7778. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  7779. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  7780. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  7781. params->tcp_udp_checksumoffload;
  7782. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  7783. soc->wlan_cfg_ctx->ipa_enabled = params->ipa_enable;
  7784. soc->wlan_cfg_ctx->gro_enabled = params->gro_enable;
  7785. dp_update_flow_control_parameters(soc, params);
  7786. return QDF_STATUS_SUCCESS;
  7787. }
  7788. /**
  7789. * dp_txrx_set_wds_rx_policy() - API to store datapath
  7790. * config parameters
  7791. * @vdev_handle - datapath vdev handle
  7792. * @cfg: ini parameter handle
  7793. *
  7794. * Return: status
  7795. */
  7796. #ifdef WDS_VENDOR_EXTENSION
  7797. void
  7798. dp_txrx_set_wds_rx_policy(
  7799. struct cdp_vdev *vdev_handle,
  7800. u_int32_t val)
  7801. {
  7802. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7803. struct dp_peer *peer;
  7804. if (vdev->opmode == wlan_op_mode_ap) {
  7805. /* for ap, set it on bss_peer */
  7806. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  7807. if (peer->bss_peer) {
  7808. peer->wds_ecm.wds_rx_filter = 1;
  7809. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  7810. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  7811. break;
  7812. }
  7813. }
  7814. } else if (vdev->opmode == wlan_op_mode_sta) {
  7815. peer = TAILQ_FIRST(&vdev->peer_list);
  7816. peer->wds_ecm.wds_rx_filter = 1;
  7817. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  7818. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  7819. }
  7820. }
  7821. /**
  7822. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  7823. *
  7824. * @peer_handle - datapath peer handle
  7825. * @wds_tx_ucast: policy for unicast transmission
  7826. * @wds_tx_mcast: policy for multicast transmission
  7827. *
  7828. * Return: void
  7829. */
  7830. void
  7831. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  7832. int wds_tx_ucast, int wds_tx_mcast)
  7833. {
  7834. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  7835. if (wds_tx_ucast || wds_tx_mcast) {
  7836. peer->wds_enabled = 1;
  7837. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  7838. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  7839. } else {
  7840. peer->wds_enabled = 0;
  7841. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  7842. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  7843. }
  7844. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  7845. FL("Policy Update set to :\
  7846. peer->wds_enabled %d\
  7847. peer->wds_ecm.wds_tx_ucast_4addr %d\
  7848. peer->wds_ecm.wds_tx_mcast_4addr %d"),
  7849. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  7850. peer->wds_ecm.wds_tx_mcast_4addr);
  7851. return;
  7852. }
  7853. #endif
  7854. static struct cdp_wds_ops dp_ops_wds = {
  7855. .vdev_set_wds = dp_vdev_set_wds,
  7856. #ifdef WDS_VENDOR_EXTENSION
  7857. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  7858. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  7859. #endif
  7860. };
  7861. /*
  7862. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  7863. * @vdev_handle - datapath vdev handle
  7864. * @callback - callback function
  7865. * @ctxt: callback context
  7866. *
  7867. */
  7868. static void
  7869. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  7870. ol_txrx_data_tx_cb callback, void *ctxt)
  7871. {
  7872. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  7873. vdev->tx_non_std_data_callback.func = callback;
  7874. vdev->tx_non_std_data_callback.ctxt = ctxt;
  7875. }
  7876. /**
  7877. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  7878. * @pdev_hdl: datapath pdev handle
  7879. *
  7880. * Return: opaque pointer to dp txrx handle
  7881. */
  7882. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  7883. {
  7884. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  7885. return pdev->dp_txrx_handle;
  7886. }
  7887. /**
  7888. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  7889. * @pdev_hdl: datapath pdev handle
  7890. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  7891. *
  7892. * Return: void
  7893. */
  7894. static void
  7895. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  7896. {
  7897. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  7898. pdev->dp_txrx_handle = dp_txrx_hdl;
  7899. }
  7900. /**
  7901. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  7902. * @soc_handle: datapath soc handle
  7903. *
  7904. * Return: opaque pointer to external dp (non-core DP)
  7905. */
  7906. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  7907. {
  7908. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7909. return soc->external_txrx_handle;
  7910. }
  7911. /**
  7912. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  7913. * @soc_handle: datapath soc handle
  7914. * @txrx_handle: opaque pointer to external dp (non-core DP)
  7915. *
  7916. * Return: void
  7917. */
  7918. static void
  7919. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  7920. {
  7921. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7922. soc->external_txrx_handle = txrx_handle;
  7923. }
  7924. /**
  7925. * dp_soc_map_pdev_to_lmac() - Save pdev_id to lmac_id mapping
  7926. * @pdev_hdl: datapath pdev handle
  7927. * @lmac_id: lmac id
  7928. *
  7929. * Return: void
  7930. */
  7931. static void
  7932. dp_soc_map_pdev_to_lmac(struct cdp_pdev *pdev_hdl, uint32_t lmac_id)
  7933. {
  7934. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  7935. struct dp_soc *soc = pdev->soc;
  7936. pdev->lmac_id = lmac_id;
  7937. wlan_cfg_set_hw_macid(soc->wlan_cfg_ctx,
  7938. pdev->pdev_id,
  7939. (lmac_id + 1));
  7940. }
  7941. /**
  7942. * dp_get_cfg_capabilities() - get dp capabilities
  7943. * @soc_handle: datapath soc handle
  7944. * @dp_caps: enum for dp capabilities
  7945. *
  7946. * Return: bool to determine if dp caps is enabled
  7947. */
  7948. static bool
  7949. dp_get_cfg_capabilities(struct cdp_soc_t *soc_handle,
  7950. enum cdp_capabilities dp_caps)
  7951. {
  7952. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  7953. return wlan_cfg_get_dp_caps(soc->wlan_cfg_ctx, dp_caps);
  7954. }
  7955. #ifdef FEATURE_AST
  7956. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  7957. {
  7958. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  7959. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  7960. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  7961. /*
  7962. * For BSS peer, new peer is not created on alloc_node if the
  7963. * peer with same address already exists , instead refcnt is
  7964. * increased for existing peer. Correspondingly in delete path,
  7965. * only refcnt is decreased; and peer is only deleted , when all
  7966. * references are deleted. So delete_in_progress should not be set
  7967. * for bss_peer, unless only 2 reference remains (peer map reference
  7968. * and peer hash table reference).
  7969. */
  7970. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  7971. return;
  7972. }
  7973. qdf_spin_lock_bh(&soc->ast_lock);
  7974. peer->delete_in_progress = true;
  7975. dp_peer_delete_ast_entries(soc, peer);
  7976. qdf_spin_unlock_bh(&soc->ast_lock);
  7977. }
  7978. #endif
  7979. #ifdef ATH_SUPPORT_NAC_RSSI
  7980. /**
  7981. * dp_vdev_get_neighbour_rssi(): Store RSSI for configured NAC
  7982. * @vdev_hdl: DP vdev handle
  7983. * @rssi: rssi value
  7984. *
  7985. * Return: 0 for success. nonzero for failure.
  7986. */
  7987. static QDF_STATUS dp_vdev_get_neighbour_rssi(struct cdp_vdev *vdev_hdl,
  7988. char *mac_addr,
  7989. uint8_t *rssi)
  7990. {
  7991. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  7992. struct dp_pdev *pdev = vdev->pdev;
  7993. struct dp_neighbour_peer *peer = NULL;
  7994. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  7995. *rssi = 0;
  7996. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  7997. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  7998. neighbour_peer_list_elem) {
  7999. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  8000. mac_addr, QDF_MAC_ADDR_SIZE) == 0) {
  8001. *rssi = peer->rssi;
  8002. status = QDF_STATUS_SUCCESS;
  8003. break;
  8004. }
  8005. }
  8006. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  8007. return status;
  8008. }
  8009. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  8010. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  8011. uint8_t chan_num)
  8012. {
  8013. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8014. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  8015. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  8016. pdev->nac_rssi_filtering = 1;
  8017. /* Store address of NAC (neighbour peer) which will be checked
  8018. * against TA of received packets.
  8019. */
  8020. if (cmd == CDP_NAC_PARAM_ADD) {
  8021. dp_update_filter_neighbour_peers(vdev_handle, DP_NAC_PARAM_ADD,
  8022. client_macaddr);
  8023. } else if (cmd == CDP_NAC_PARAM_DEL) {
  8024. dp_update_filter_neighbour_peers(vdev_handle,
  8025. DP_NAC_PARAM_DEL,
  8026. client_macaddr);
  8027. }
  8028. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  8029. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  8030. ((void *)vdev->pdev->ctrl_pdev,
  8031. vdev->vdev_id, cmd, bssid);
  8032. return QDF_STATUS_SUCCESS;
  8033. }
  8034. #endif
  8035. /**
  8036. * dp_enable_peer_based_pktlog() - Set Flag for peer based filtering
  8037. * for pktlog
  8038. * @txrx_pdev_handle: cdp_pdev handle
  8039. * @enb_dsb: Enable or disable peer based filtering
  8040. *
  8041. * Return: QDF_STATUS
  8042. */
  8043. static int
  8044. dp_enable_peer_based_pktlog(
  8045. struct cdp_pdev *txrx_pdev_handle,
  8046. char *mac_addr, uint8_t enb_dsb)
  8047. {
  8048. struct dp_peer *peer;
  8049. uint8_t local_id;
  8050. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev_handle;
  8051. peer = (struct dp_peer *)dp_find_peer_by_addr(txrx_pdev_handle,
  8052. mac_addr, &local_id);
  8053. if (!peer) {
  8054. dp_err("Invalid Peer");
  8055. return QDF_STATUS_E_FAILURE;
  8056. }
  8057. peer->peer_based_pktlog_filter = enb_dsb;
  8058. pdev->dp_peer_based_pktlog = enb_dsb;
  8059. return QDF_STATUS_SUCCESS;
  8060. }
  8061. #ifdef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  8062. #ifdef WLAN_SUPPORT_RX_TAG_STATISTICS
  8063. /**
  8064. * dp_summarize_tag_stats - sums up the given protocol type's counters
  8065. * across all the rings and dumps the same
  8066. * @pdev_handle: cdp_pdev handle
  8067. * @protocol_type: protocol type for which stats should be displayed
  8068. *
  8069. * Return: none
  8070. */
  8071. static uint64_t dp_summarize_tag_stats(struct cdp_pdev *pdev_handle,
  8072. uint16_t protocol_type)
  8073. {
  8074. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8075. uint8_t ring_idx;
  8076. uint64_t total_tag_cnt = 0;
  8077. for (ring_idx = 0; ring_idx < MAX_REO_DEST_RINGS; ring_idx++) {
  8078. total_tag_cnt +=
  8079. pdev->reo_proto_tag_stats[ring_idx][protocol_type].tag_ctr;
  8080. }
  8081. total_tag_cnt += pdev->rx_err_proto_tag_stats[protocol_type].tag_ctr;
  8082. DP_PRINT_STATS("ProtoID: %d, Tag: %u Tagged MSDU cnt: %llu",
  8083. protocol_type,
  8084. pdev->rx_proto_tag_map[protocol_type].tag,
  8085. total_tag_cnt);
  8086. return total_tag_cnt;
  8087. }
  8088. /**
  8089. * dp_dump_pdev_rx_protocol_tag_stats - dump the number of packets tagged for
  8090. * given protocol type (RX_PROTOCOL_TAG_ALL indicates for all protocol)
  8091. * @pdev_handle: cdp_pdev handle
  8092. * @protocol_type: protocol type for which stats should be displayed
  8093. *
  8094. * Return: none
  8095. */
  8096. static void
  8097. dp_dump_pdev_rx_protocol_tag_stats(struct cdp_pdev *pdev_handle,
  8098. uint16_t protocol_type)
  8099. {
  8100. uint16_t proto_idx;
  8101. if (protocol_type != RX_PROTOCOL_TAG_ALL &&
  8102. protocol_type >= RX_PROTOCOL_TAG_MAX) {
  8103. DP_PRINT_STATS("Invalid protocol type : %u", protocol_type);
  8104. return;
  8105. }
  8106. /* protocol_type in [0 ... RX_PROTOCOL_TAG_MAX] */
  8107. if (protocol_type != RX_PROTOCOL_TAG_ALL) {
  8108. dp_summarize_tag_stats(pdev_handle, protocol_type);
  8109. return;
  8110. }
  8111. /* protocol_type == RX_PROTOCOL_TAG_ALL */
  8112. for (proto_idx = 0; proto_idx < RX_PROTOCOL_TAG_MAX; proto_idx++)
  8113. dp_summarize_tag_stats(pdev_handle, proto_idx);
  8114. }
  8115. #endif /* WLAN_SUPPORT_RX_TAG_STATISTICS */
  8116. /**
  8117. * dp_reset_pdev_rx_protocol_tag_stats - resets the stats counters for
  8118. * given protocol type
  8119. * @pdev_handle: cdp_pdev handle
  8120. * @protocol_type: protocol type for which stats should be reset
  8121. *
  8122. * Return: none
  8123. */
  8124. #ifdef WLAN_SUPPORT_RX_TAG_STATISTICS
  8125. static void
  8126. dp_reset_pdev_rx_protocol_tag_stats(struct cdp_pdev *pdev_handle,
  8127. uint16_t protocol_type)
  8128. {
  8129. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8130. uint8_t ring_idx;
  8131. for (ring_idx = 0; ring_idx < MAX_REO_DEST_RINGS; ring_idx++)
  8132. pdev->reo_proto_tag_stats[ring_idx][protocol_type].tag_ctr = 0;
  8133. pdev->rx_err_proto_tag_stats[protocol_type].tag_ctr = 0;
  8134. }
  8135. #else
  8136. static void
  8137. dp_reset_pdev_rx_protocol_tag_stats(struct cdp_pdev *pdev_handle,
  8138. uint16_t protocol_type)
  8139. {
  8140. /** Stub API */
  8141. }
  8142. #endif /* WLAN_SUPPORT_RX_TAG_STATISTICS */
  8143. /**
  8144. * dp_update_pdev_rx_protocol_tag - Add/remove a protocol tag that should be
  8145. * applied to the desired protocol type packets
  8146. * @txrx_pdev_handle: cdp_pdev handle
  8147. * @enable_rx_protocol_tag - bitmask that indicates what protocol types
  8148. * are enabled for tagging. zero indicates disable feature, non-zero indicates
  8149. * enable feature
  8150. * @protocol_type: new protocol type for which the tag is being added
  8151. * @tag: user configured tag for the new protocol
  8152. *
  8153. * Return: QDF_STATUS
  8154. */
  8155. static QDF_STATUS
  8156. dp_update_pdev_rx_protocol_tag(struct cdp_pdev *pdev_handle,
  8157. uint32_t enable_rx_protocol_tag,
  8158. uint16_t protocol_type,
  8159. uint16_t tag)
  8160. {
  8161. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8162. /*
  8163. * dynamically enable/disable tagging based on enable_rx_protocol_tag
  8164. * flag.
  8165. */
  8166. if (enable_rx_protocol_tag) {
  8167. /* Tagging for one or more protocols has been set by user */
  8168. pdev->is_rx_protocol_tagging_enabled = true;
  8169. } else {
  8170. /*
  8171. * No protocols being tagged, disable feature till next add
  8172. * operation
  8173. */
  8174. pdev->is_rx_protocol_tagging_enabled = false;
  8175. }
  8176. /** Reset stats counter across all rings for given protocol */
  8177. dp_reset_pdev_rx_protocol_tag_stats(pdev_handle, protocol_type);
  8178. pdev->rx_proto_tag_map[protocol_type].tag = tag;
  8179. return QDF_STATUS_SUCCESS;
  8180. }
  8181. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  8182. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  8183. uint32_t max_peers,
  8184. uint32_t max_ast_index,
  8185. bool peer_map_unmap_v2)
  8186. {
  8187. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  8188. soc->max_peers = max_peers;
  8189. qdf_print ("%s max_peers %u, max_ast_index: %u\n",
  8190. __func__, max_peers, max_ast_index);
  8191. wlan_cfg_set_max_ast_idx(soc->wlan_cfg_ctx, max_ast_index);
  8192. if (dp_peer_find_attach(soc))
  8193. return QDF_STATUS_E_FAILURE;
  8194. soc->is_peer_map_unmap_v2 = peer_map_unmap_v2;
  8195. return QDF_STATUS_SUCCESS;
  8196. }
  8197. /**
  8198. * dp_pdev_set_ctrl_pdev() - set ctrl pdev handle in dp pdev
  8199. * @dp_pdev: dp pdev handle
  8200. * @ctrl_pdev: UMAC ctrl pdev handle
  8201. *
  8202. * Return: void
  8203. */
  8204. static void dp_pdev_set_ctrl_pdev(struct cdp_pdev *dp_pdev,
  8205. struct cdp_ctrl_objmgr_pdev *ctrl_pdev)
  8206. {
  8207. struct dp_pdev *pdev = (struct dp_pdev *)dp_pdev;
  8208. pdev->ctrl_pdev = ctrl_pdev;
  8209. }
  8210. static void dp_set_rate_stats_cap(struct cdp_soc_t *soc_hdl,
  8211. uint8_t val)
  8212. {
  8213. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  8214. soc->wlanstats_enabled = val;
  8215. }
  8216. static void dp_soc_set_rate_stats_ctx(struct cdp_soc_t *soc_handle,
  8217. void *stats_ctx)
  8218. {
  8219. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  8220. soc->rate_stats_ctx = stats_ctx;
  8221. }
  8222. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  8223. static void dp_flush_rate_stats_req(struct cdp_soc_t *soc_hdl,
  8224. struct cdp_pdev *pdev_hdl)
  8225. {
  8226. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  8227. struct dp_soc *soc = (struct dp_soc *)pdev->soc;
  8228. struct dp_vdev *vdev = NULL;
  8229. struct dp_peer *peer = NULL;
  8230. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  8231. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  8232. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  8233. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  8234. if (peer)
  8235. dp_wdi_event_handler(
  8236. WDI_EVENT_FLUSH_RATE_STATS_REQ,
  8237. pdev->soc, peer->wlanstats_ctx,
  8238. peer->peer_ids[0],
  8239. WDI_NO_VAL, pdev->pdev_id);
  8240. }
  8241. }
  8242. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  8243. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  8244. }
  8245. #else
  8246. static inline void
  8247. dp_flush_rate_stats_req(struct cdp_soc_t *soc_hdl,
  8248. struct cdp_pdev *pdev_hdl)
  8249. {
  8250. }
  8251. #endif
  8252. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  8253. static void dp_peer_flush_rate_stats(struct cdp_soc_t *soc,
  8254. struct cdp_pdev *pdev_handle,
  8255. void *buf)
  8256. {
  8257. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8258. dp_wdi_event_handler(WDI_EVENT_PEER_FLUSH_RATE_STATS,
  8259. pdev->soc, buf, HTT_INVALID_PEER,
  8260. WDI_NO_VAL, pdev->pdev_id);
  8261. }
  8262. #else
  8263. static inline void
  8264. dp_peer_flush_rate_stats(struct cdp_soc_t *soc,
  8265. struct cdp_pdev *pdev_handle,
  8266. void *buf)
  8267. {
  8268. }
  8269. #endif
  8270. static void *dp_soc_get_rate_stats_ctx(struct cdp_soc_t *soc_handle)
  8271. {
  8272. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  8273. return soc->rate_stats_ctx;
  8274. }
  8275. /*
  8276. * dp_get_cfg() - get dp cfg
  8277. * @soc: cdp soc handle
  8278. * @cfg: cfg enum
  8279. *
  8280. * Return: cfg value
  8281. */
  8282. static uint32_t dp_get_cfg(void *soc, enum cdp_dp_cfg cfg)
  8283. {
  8284. struct dp_soc *dpsoc = (struct dp_soc *)soc;
  8285. uint32_t value = 0;
  8286. switch (cfg) {
  8287. case cfg_dp_enable_data_stall:
  8288. value = dpsoc->wlan_cfg_ctx->enable_data_stall_detection;
  8289. break;
  8290. case cfg_dp_enable_ip_tcp_udp_checksum_offload:
  8291. value = dpsoc->wlan_cfg_ctx->tcp_udp_checksumoffload;
  8292. break;
  8293. case cfg_dp_tso_enable:
  8294. value = dpsoc->wlan_cfg_ctx->tso_enabled;
  8295. break;
  8296. case cfg_dp_lro_enable:
  8297. value = dpsoc->wlan_cfg_ctx->lro_enabled;
  8298. break;
  8299. case cfg_dp_gro_enable:
  8300. value = dpsoc->wlan_cfg_ctx->gro_enabled;
  8301. break;
  8302. case cfg_dp_tx_flow_start_queue_offset:
  8303. value = dpsoc->wlan_cfg_ctx->tx_flow_start_queue_offset;
  8304. break;
  8305. case cfg_dp_tx_flow_stop_queue_threshold:
  8306. value = dpsoc->wlan_cfg_ctx->tx_flow_stop_queue_threshold;
  8307. break;
  8308. case cfg_dp_disable_intra_bss_fwd:
  8309. value = dpsoc->wlan_cfg_ctx->disable_intra_bss_fwd;
  8310. break;
  8311. default:
  8312. value = 0;
  8313. }
  8314. return value;
  8315. }
  8316. #ifdef CONFIG_WIN
  8317. /**
  8318. * dp_tx_flow_ctrl_configure_pdev() - Configure flow control params
  8319. * @pdev_hdl: datapath pdev handle
  8320. * @param: ol ath params
  8321. * @value: value of the flag
  8322. * @buff: Buffer to be passed
  8323. *
  8324. * Implemented this function same as legacy function. In legacy code, single
  8325. * function is used to display stats and update pdev params.
  8326. *
  8327. * Return: 0 for success. nonzero for failure.
  8328. */
  8329. static uint32_t dp_tx_flow_ctrl_configure_pdev(void *pdev_handle,
  8330. enum _ol_ath_param_t param,
  8331. uint32_t value, void *buff)
  8332. {
  8333. struct dp_soc *soc = NULL;
  8334. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8335. if (qdf_unlikely(!pdev))
  8336. return 1;
  8337. soc = pdev->soc;
  8338. if (!soc)
  8339. return 1;
  8340. switch (param) {
  8341. case OL_ATH_PARAM_VIDEO_DELAY_STATS_FC:
  8342. if (value)
  8343. pdev->delay_stats_flag = true;
  8344. else
  8345. pdev->delay_stats_flag = false;
  8346. break;
  8347. case OL_ATH_PARAM_VIDEO_STATS_FC:
  8348. qdf_print("------- TID Stats ------\n");
  8349. dp_pdev_print_tid_stats(pdev);
  8350. qdf_print("------ Delay Stats ------\n");
  8351. dp_pdev_print_delay_stats(pdev);
  8352. break;
  8353. case OL_ATH_PARAM_TOTAL_Q_SIZE:
  8354. {
  8355. uint32_t tx_min, tx_max;
  8356. tx_min = wlan_cfg_get_min_tx_desc(soc->wlan_cfg_ctx);
  8357. tx_max = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  8358. if (!buff) {
  8359. if ((value >= tx_min) && (value <= tx_max)) {
  8360. pdev->num_tx_allowed = value;
  8361. } else {
  8362. QDF_TRACE(QDF_MODULE_ID_DP,
  8363. QDF_TRACE_LEVEL_INFO,
  8364. "Failed to update num_tx_allowed, Q_min = %d Q_max = %d",
  8365. tx_min, tx_max);
  8366. break;
  8367. }
  8368. } else {
  8369. *(int *)buff = pdev->num_tx_allowed;
  8370. }
  8371. }
  8372. break;
  8373. default:
  8374. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  8375. "%s: not handled param %d ", __func__, param);
  8376. break;
  8377. }
  8378. return 0;
  8379. }
  8380. #endif
  8381. /**
  8382. * dp_set_pdev_pcp_tid_map_wifi3(): update pcp tid map in pdev
  8383. * @vdev: DP_PDEV handle
  8384. * @pcp: pcp value
  8385. * @tid: tid value passed by the user
  8386. *
  8387. * Return: QDF_STATUS_SUCCESS on success
  8388. */
  8389. static QDF_STATUS dp_set_pdev_pcp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  8390. uint8_t pcp, uint8_t tid)
  8391. {
  8392. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8393. struct dp_soc *soc = pdev->soc;
  8394. soc->pcp_tid_map[pcp] = tid;
  8395. hal_tx_update_pcp_tid_map(soc->hal_soc, pcp, tid);
  8396. return QDF_STATUS_SUCCESS;
  8397. }
  8398. /**
  8399. * dp_set_pdev_tidmap_prty_wifi3(): update tidmap priority in pdev
  8400. * @vdev: DP_PDEV handle
  8401. * @prio: tidmap priority value passed by the user
  8402. *
  8403. * Return: QDF_STATUS_SUCCESS on success
  8404. */
  8405. static QDF_STATUS dp_set_pdev_tidmap_prty_wifi3(struct cdp_pdev *pdev_handle,
  8406. uint8_t prio)
  8407. {
  8408. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  8409. struct dp_soc *soc = pdev->soc;
  8410. soc->tidmap_prty = prio;
  8411. hal_tx_set_tidmap_prty(soc->hal_soc, prio);
  8412. return QDF_STATUS_SUCCESS;
  8413. }
  8414. /**
  8415. * dp_set_vdev_pcp_tid_map_wifi3(): update pcp tid map in vdev
  8416. * @vdev: DP_VDEV handle
  8417. * @pcp: pcp value
  8418. * @tid: tid value passed by the user
  8419. *
  8420. * Return: QDF_STATUS_SUCCESS on success
  8421. */
  8422. static QDF_STATUS dp_set_vdev_pcp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  8423. uint8_t pcp, uint8_t tid)
  8424. {
  8425. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8426. vdev->pcp_tid_map[pcp] = tid;
  8427. return QDF_STATUS_SUCCESS;
  8428. }
  8429. /**
  8430. * dp_set_vdev_tidmap_tbl_id_wifi3(): update tidmapi tbl id in vdev
  8431. * @vdev: DP_VDEV handle
  8432. * @mapid: map_id value passed by the user
  8433. *
  8434. * Return: QDF_STATUS_SUCCESS on success
  8435. */
  8436. static QDF_STATUS dp_set_vdev_tidmap_tbl_id_wifi3(struct cdp_vdev *vdev_handle,
  8437. uint8_t mapid)
  8438. {
  8439. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8440. vdev->tidmap_tbl_id = mapid;
  8441. return QDF_STATUS_SUCCESS;
  8442. }
  8443. /**
  8444. * dp_set_vdev_tidmap_prty_wifi3(): update tidmap priority in vdev
  8445. * @vdev: DP_VDEV handle
  8446. * @prio: tidmap priority value passed by the user
  8447. *
  8448. * Return: QDF_STATUS_SUCCESS on success
  8449. */
  8450. static QDF_STATUS dp_set_vdev_tidmap_prty_wifi3(struct cdp_vdev *vdev_handle,
  8451. uint8_t prio)
  8452. {
  8453. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  8454. vdev->tidmap_prty = prio;
  8455. return QDF_STATUS_SUCCESS;
  8456. }
  8457. static struct cdp_cmn_ops dp_ops_cmn = {
  8458. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  8459. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  8460. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  8461. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  8462. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  8463. .txrx_pdev_deinit = dp_pdev_deinit_wifi3,
  8464. .txrx_peer_create = dp_peer_create_wifi3,
  8465. .txrx_peer_setup = dp_peer_setup_wifi3,
  8466. #ifdef FEATURE_AST
  8467. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  8468. #else
  8469. .txrx_peer_teardown = NULL,
  8470. #endif
  8471. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  8472. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  8473. .txrx_peer_get_ast_info_by_soc = dp_peer_get_ast_info_by_soc_wifi3,
  8474. .txrx_peer_get_ast_info_by_pdev =
  8475. dp_peer_get_ast_info_by_pdevid_wifi3,
  8476. .txrx_peer_ast_delete_by_soc =
  8477. dp_peer_ast_entry_del_by_soc,
  8478. .txrx_peer_ast_delete_by_pdev =
  8479. dp_peer_ast_entry_del_by_pdev,
  8480. .txrx_peer_delete = dp_peer_delete_wifi3,
  8481. .txrx_vdev_register = dp_vdev_register_wifi3,
  8482. .txrx_vdev_flush_peers = dp_vdev_flush_peers,
  8483. .txrx_soc_detach = dp_soc_detach_wifi3,
  8484. .txrx_soc_deinit = dp_soc_deinit_wifi3,
  8485. .txrx_soc_init = dp_soc_init_wifi3,
  8486. .txrx_tso_soc_attach = dp_tso_soc_attach,
  8487. .txrx_tso_soc_detach = dp_tso_soc_detach,
  8488. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  8489. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  8490. .txrx_get_mon_vdev_from_pdev = dp_get_mon_vdev_from_pdev_wifi3,
  8491. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  8492. .txrx_ath_getstats = dp_get_device_stats,
  8493. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  8494. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  8495. .addba_resp_tx_completion = dp_addba_resp_tx_completion_wifi3,
  8496. .delba_process = dp_delba_process_wifi3,
  8497. .set_addba_response = dp_set_addba_response,
  8498. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  8499. .flush_cache_rx_queue = NULL,
  8500. /* TODO: get API's for dscp-tid need to be added*/
  8501. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  8502. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  8503. .hmmc_tid_override_en = dp_hmmc_tid_override_en_wifi3,
  8504. .set_hmmc_tid_val = dp_set_hmmc_tid_val_wifi3,
  8505. .txrx_get_total_per = dp_get_total_per,
  8506. .txrx_stats_request = dp_txrx_stats_request,
  8507. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  8508. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  8509. .txrx_get_vow_config_frm_pdev = dp_get_delay_stats_flag,
  8510. .txrx_pdev_set_chan_noise_floor = dp_pdev_set_chan_noise_floor,
  8511. .txrx_set_nac = dp_set_nac,
  8512. .txrx_get_tx_pending = dp_get_tx_pending,
  8513. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  8514. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  8515. .display_stats = dp_txrx_dump_stats,
  8516. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  8517. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  8518. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  8519. .txrx_intr_detach = dp_soc_interrupt_detach,
  8520. .set_pn_check = dp_set_pn_check_wifi3,
  8521. .update_config_parameters = dp_update_config_parameters,
  8522. /* TODO: Add other functions */
  8523. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  8524. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  8525. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  8526. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  8527. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  8528. .map_pdev_to_lmac = dp_soc_map_pdev_to_lmac,
  8529. .txrx_set_ba_aging_timeout = dp_set_ba_aging_timeout,
  8530. .txrx_get_ba_aging_timeout = dp_get_ba_aging_timeout,
  8531. .tx_send = dp_tx_send,
  8532. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  8533. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  8534. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  8535. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  8536. .txrx_pdev_set_ctrl_pdev = dp_pdev_set_ctrl_pdev,
  8537. .txrx_get_os_rx_handles_from_vdev =
  8538. dp_get_os_rx_handles_from_vdev_wifi3,
  8539. .delba_tx_completion = dp_delba_tx_completion_wifi3,
  8540. .get_dp_capabilities = dp_get_cfg_capabilities,
  8541. .txrx_get_cfg = dp_get_cfg,
  8542. .set_rate_stats_ctx = dp_soc_set_rate_stats_ctx,
  8543. .get_rate_stats_ctx = dp_soc_get_rate_stats_ctx,
  8544. .txrx_peer_flush_rate_stats = dp_peer_flush_rate_stats,
  8545. .txrx_flush_rate_stats_request = dp_flush_rate_stats_req,
  8546. .set_pdev_pcp_tid_map = dp_set_pdev_pcp_tid_map_wifi3,
  8547. .set_pdev_tidmap_prty = dp_set_pdev_tidmap_prty_wifi3,
  8548. .set_vdev_pcp_tid_map = dp_set_vdev_pcp_tid_map_wifi3,
  8549. .set_vdev_tidmap_prty = dp_set_vdev_tidmap_prty_wifi3,
  8550. .set_vdev_tidmap_tbl_id = dp_set_vdev_tidmap_tbl_id_wifi3,
  8551. .txrx_cp_peer_del_response = dp_cp_peer_del_resp_handler,
  8552. };
  8553. static struct cdp_ctrl_ops dp_ops_ctrl = {
  8554. .txrx_peer_authorize = dp_peer_authorize,
  8555. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  8556. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  8557. #ifdef MESH_MODE_SUPPORT
  8558. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  8559. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  8560. #endif
  8561. .txrx_set_vdev_param = dp_set_vdev_param,
  8562. .txrx_peer_set_nawds = dp_peer_set_nawds,
  8563. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  8564. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  8565. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  8566. .txrx_update_filter_neighbour_peers =
  8567. dp_update_filter_neighbour_peers,
  8568. .txrx_get_sec_type = dp_get_sec_type,
  8569. /* TODO: Add other functions */
  8570. .txrx_wdi_event_sub = dp_wdi_event_sub,
  8571. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  8572. #ifdef WDI_EVENT_ENABLE
  8573. .txrx_get_pldev = dp_get_pldev,
  8574. #endif
  8575. .txrx_set_pdev_param = dp_set_pdev_param,
  8576. #ifdef ATH_SUPPORT_NAC_RSSI
  8577. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  8578. .txrx_vdev_get_neighbour_rssi = dp_vdev_get_neighbour_rssi,
  8579. #endif
  8580. .set_key = dp_set_michael_key,
  8581. .txrx_get_vdev_param = dp_get_vdev_param,
  8582. .enable_peer_based_pktlog = dp_enable_peer_based_pktlog,
  8583. .calculate_delay_stats = dp_calculate_delay_stats,
  8584. #ifdef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  8585. .txrx_update_pdev_rx_protocol_tag = dp_update_pdev_rx_protocol_tag,
  8586. #ifdef WLAN_SUPPORT_RX_TAG_STATISTICS
  8587. .txrx_dump_pdev_rx_protocol_tag_stats =
  8588. dp_dump_pdev_rx_protocol_tag_stats,
  8589. #endif /* WLAN_SUPPORT_RX_TAG_STATISTICS */
  8590. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  8591. };
  8592. static struct cdp_me_ops dp_ops_me = {
  8593. #ifdef ATH_SUPPORT_IQUE
  8594. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  8595. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  8596. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  8597. #endif
  8598. };
  8599. static struct cdp_mon_ops dp_ops_mon = {
  8600. .txrx_monitor_set_filter_ucast_data = NULL,
  8601. .txrx_monitor_set_filter_mcast_data = NULL,
  8602. .txrx_monitor_set_filter_non_data = NULL,
  8603. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  8604. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  8605. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  8606. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  8607. /* Added support for HK advance filter */
  8608. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  8609. };
  8610. static struct cdp_host_stats_ops dp_ops_host_stats = {
  8611. .txrx_per_peer_stats = dp_get_host_peer_stats,
  8612. .get_fw_peer_stats = dp_get_fw_peer_stats,
  8613. .get_htt_stats = dp_get_htt_stats,
  8614. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  8615. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  8616. .txrx_stats_publish = dp_txrx_stats_publish,
  8617. .txrx_get_vdev_stats = dp_txrx_get_vdev_stats,
  8618. .txrx_get_peer_stats = dp_txrx_get_peer_stats,
  8619. .txrx_reset_peer_stats = dp_txrx_reset_peer_stats,
  8620. .txrx_get_pdev_stats = dp_txrx_get_pdev_stats,
  8621. .txrx_get_ratekbps = dp_txrx_get_ratekbps,
  8622. .configure_rate_stats = dp_set_rate_stats_cap,
  8623. /* TODO */
  8624. };
  8625. static struct cdp_raw_ops dp_ops_raw = {
  8626. /* TODO */
  8627. };
  8628. #ifdef CONFIG_WIN
  8629. static struct cdp_pflow_ops dp_ops_pflow = {
  8630. dp_tx_flow_ctrl_configure_pdev,
  8631. };
  8632. #endif /* CONFIG_WIN */
  8633. #ifdef FEATURE_RUNTIME_PM
  8634. /**
  8635. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  8636. * @opaque_pdev: DP pdev context
  8637. *
  8638. * DP is ready to runtime suspend if there are no pending TX packets.
  8639. *
  8640. * Return: QDF_STATUS
  8641. */
  8642. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  8643. {
  8644. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8645. struct dp_soc *soc = pdev->soc;
  8646. /* Abort if there are any pending TX packets */
  8647. if (dp_get_tx_pending(opaque_pdev) > 0) {
  8648. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  8649. FL("Abort suspend due to pending TX packets"));
  8650. return QDF_STATUS_E_AGAIN;
  8651. }
  8652. if (soc->intr_mode == DP_INTR_POLL)
  8653. qdf_timer_stop(&soc->int_timer);
  8654. return QDF_STATUS_SUCCESS;
  8655. }
  8656. /**
  8657. * dp_runtime_resume() - ensure DP is ready to runtime resume
  8658. * @opaque_pdev: DP pdev context
  8659. *
  8660. * Resume DP for runtime PM.
  8661. *
  8662. * Return: QDF_STATUS
  8663. */
  8664. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  8665. {
  8666. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8667. struct dp_soc *soc = pdev->soc;
  8668. void *hal_srng;
  8669. int i;
  8670. if (soc->intr_mode == DP_INTR_POLL)
  8671. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  8672. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  8673. hal_srng = soc->tcl_data_ring[i].hal_srng;
  8674. if (hal_srng) {
  8675. /* We actually only need to acquire the lock */
  8676. hal_srng_access_start(soc->hal_soc, hal_srng);
  8677. /* Update SRC ring head pointer for HW to send
  8678. all pending packets */
  8679. hal_srng_access_end(soc->hal_soc, hal_srng);
  8680. }
  8681. }
  8682. return QDF_STATUS_SUCCESS;
  8683. }
  8684. #endif /* FEATURE_RUNTIME_PM */
  8685. /**
  8686. * dp_tx_get_success_ack_stats() - get tx success completion count
  8687. * @opaque_pdev: dp pdev context
  8688. * @vdevid: vdev identifier
  8689. *
  8690. * Return: tx success ack count
  8691. */
  8692. static uint32_t dp_tx_get_success_ack_stats(struct cdp_pdev *pdev,
  8693. uint8_t vdev_id)
  8694. {
  8695. struct dp_vdev *vdev =
  8696. (struct dp_vdev *)dp_get_vdev_from_vdev_id_wifi3(pdev,
  8697. vdev_id);
  8698. struct dp_soc *soc = ((struct dp_pdev *)pdev)->soc;
  8699. struct cdp_vdev_stats *vdev_stats = NULL;
  8700. uint32_t tx_success;
  8701. if (!vdev) {
  8702. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  8703. FL("Invalid vdev id %d"), vdev_id);
  8704. return 0;
  8705. }
  8706. vdev_stats = qdf_mem_malloc_atomic(sizeof(struct cdp_vdev_stats));
  8707. if (!vdev_stats) {
  8708. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  8709. "DP alloc failure - unable to get alloc vdev stats");
  8710. return 0;
  8711. }
  8712. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  8713. dp_aggregate_vdev_stats(vdev, vdev_stats);
  8714. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  8715. tx_success = vdev_stats->tx.tx_success.num;
  8716. qdf_mem_free(vdev_stats);
  8717. return tx_success;
  8718. }
  8719. #ifndef CONFIG_WIN
  8720. static struct cdp_misc_ops dp_ops_misc = {
  8721. #ifdef FEATURE_WLAN_TDLS
  8722. .tx_non_std = dp_tx_non_std,
  8723. #endif /* FEATURE_WLAN_TDLS */
  8724. .get_opmode = dp_get_opmode,
  8725. #ifdef FEATURE_RUNTIME_PM
  8726. .runtime_suspend = dp_runtime_suspend,
  8727. .runtime_resume = dp_runtime_resume,
  8728. #endif /* FEATURE_RUNTIME_PM */
  8729. .pkt_log_init = dp_pkt_log_init,
  8730. .pkt_log_con_service = dp_pkt_log_con_service,
  8731. .get_num_rx_contexts = dp_get_num_rx_contexts,
  8732. .get_tx_ack_stats = dp_tx_get_success_ack_stats,
  8733. };
  8734. static struct cdp_flowctl_ops dp_ops_flowctl = {
  8735. /* WIFI 3.0 DP implement as required. */
  8736. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  8737. .flow_pool_map_handler = dp_tx_flow_pool_map,
  8738. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  8739. .register_pause_cb = dp_txrx_register_pause_cb,
  8740. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  8741. .tx_desc_thresh_reached = dp_tx_desc_thresh_reached,
  8742. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  8743. };
  8744. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  8745. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8746. };
  8747. #ifdef IPA_OFFLOAD
  8748. static struct cdp_ipa_ops dp_ops_ipa = {
  8749. .ipa_get_resource = dp_ipa_get_resource,
  8750. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  8751. .ipa_op_response = dp_ipa_op_response,
  8752. .ipa_register_op_cb = dp_ipa_register_op_cb,
  8753. .ipa_get_stat = dp_ipa_get_stat,
  8754. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  8755. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  8756. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  8757. .ipa_setup = dp_ipa_setup,
  8758. .ipa_cleanup = dp_ipa_cleanup,
  8759. .ipa_setup_iface = dp_ipa_setup_iface,
  8760. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  8761. .ipa_enable_pipes = dp_ipa_enable_pipes,
  8762. .ipa_disable_pipes = dp_ipa_disable_pipes,
  8763. .ipa_set_perf_level = dp_ipa_set_perf_level,
  8764. .ipa_rx_intrabss_fwd = dp_ipa_rx_intrabss_fwd
  8765. };
  8766. #endif
  8767. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  8768. {
  8769. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8770. struct dp_soc *soc = pdev->soc;
  8771. int timeout = SUSPEND_DRAIN_WAIT;
  8772. int drain_wait_delay = 50; /* 50 ms */
  8773. /* Abort if there are any pending TX packets */
  8774. while (dp_get_tx_pending(opaque_pdev) > 0) {
  8775. qdf_sleep(drain_wait_delay);
  8776. if (timeout <= 0) {
  8777. dp_err("TX frames are pending, abort suspend");
  8778. return QDF_STATUS_E_TIMEOUT;
  8779. }
  8780. timeout = timeout - drain_wait_delay;
  8781. }
  8782. if (soc->intr_mode == DP_INTR_POLL)
  8783. qdf_timer_stop(&soc->int_timer);
  8784. return QDF_STATUS_SUCCESS;
  8785. }
  8786. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  8787. {
  8788. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  8789. struct dp_soc *soc = pdev->soc;
  8790. if (soc->intr_mode == DP_INTR_POLL)
  8791. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  8792. return QDF_STATUS_SUCCESS;
  8793. }
  8794. static struct cdp_bus_ops dp_ops_bus = {
  8795. .bus_suspend = dp_bus_suspend,
  8796. .bus_resume = dp_bus_resume
  8797. };
  8798. static struct cdp_ocb_ops dp_ops_ocb = {
  8799. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8800. };
  8801. static struct cdp_throttle_ops dp_ops_throttle = {
  8802. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8803. };
  8804. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  8805. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8806. };
  8807. static struct cdp_cfg_ops dp_ops_cfg = {
  8808. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  8809. };
  8810. /*
  8811. * dp_peer_get_ref_find_by_addr - get peer with addr by ref count inc
  8812. * @dev: physical device instance
  8813. * @peer_mac_addr: peer mac address
  8814. * @local_id: local id for the peer
  8815. * @debug_id: to track enum peer access
  8816. *
  8817. * Return: peer instance pointer
  8818. */
  8819. static inline void *
  8820. dp_peer_get_ref_find_by_addr(struct cdp_pdev *dev, uint8_t *peer_mac_addr,
  8821. uint8_t *local_id,
  8822. enum peer_debug_id_type debug_id)
  8823. {
  8824. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  8825. struct dp_peer *peer;
  8826. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr, 0, DP_VDEV_ALL);
  8827. if (!peer)
  8828. return NULL;
  8829. *local_id = peer->local_id;
  8830. DP_TRACE(INFO, "%s: peer %pK id %d", __func__, peer, *local_id);
  8831. return peer;
  8832. }
  8833. /*
  8834. * dp_peer_release_ref - release peer ref count
  8835. * @peer: peer handle
  8836. * @debug_id: to track enum peer access
  8837. *
  8838. * Return: None
  8839. */
  8840. static inline
  8841. void dp_peer_release_ref(void *peer, enum peer_debug_id_type debug_id)
  8842. {
  8843. dp_peer_unref_delete(peer);
  8844. }
  8845. static struct cdp_peer_ops dp_ops_peer = {
  8846. .register_peer = dp_register_peer,
  8847. .clear_peer = dp_clear_peer,
  8848. .find_peer_by_addr = dp_find_peer_by_addr,
  8849. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  8850. .peer_get_ref_by_addr = dp_peer_get_ref_find_by_addr,
  8851. .peer_release_ref = dp_peer_release_ref,
  8852. .local_peer_id = dp_local_peer_id,
  8853. .peer_find_by_local_id = dp_peer_find_by_local_id,
  8854. .peer_state_update = dp_peer_state_update,
  8855. .get_vdevid = dp_get_vdevid,
  8856. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  8857. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  8858. .get_vdev_for_peer = dp_get_vdev_for_peer,
  8859. .get_peer_state = dp_get_peer_state,
  8860. };
  8861. #endif
  8862. static struct cdp_ops dp_txrx_ops = {
  8863. .cmn_drv_ops = &dp_ops_cmn,
  8864. .ctrl_ops = &dp_ops_ctrl,
  8865. .me_ops = &dp_ops_me,
  8866. .mon_ops = &dp_ops_mon,
  8867. .host_stats_ops = &dp_ops_host_stats,
  8868. .wds_ops = &dp_ops_wds,
  8869. .raw_ops = &dp_ops_raw,
  8870. #ifdef CONFIG_WIN
  8871. .pflow_ops = &dp_ops_pflow,
  8872. #endif /* CONFIG_WIN */
  8873. #ifndef CONFIG_WIN
  8874. .misc_ops = &dp_ops_misc,
  8875. .cfg_ops = &dp_ops_cfg,
  8876. .flowctl_ops = &dp_ops_flowctl,
  8877. .l_flowctl_ops = &dp_ops_l_flowctl,
  8878. #ifdef IPA_OFFLOAD
  8879. .ipa_ops = &dp_ops_ipa,
  8880. #endif
  8881. .bus_ops = &dp_ops_bus,
  8882. .ocb_ops = &dp_ops_ocb,
  8883. .peer_ops = &dp_ops_peer,
  8884. .throttle_ops = &dp_ops_throttle,
  8885. .mob_stats_ops = &dp_ops_mob_stats,
  8886. #endif
  8887. };
  8888. /*
  8889. * dp_soc_set_txrx_ring_map()
  8890. * @dp_soc: DP handler for soc
  8891. *
  8892. * Return: Void
  8893. */
  8894. void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  8895. {
  8896. uint32_t i;
  8897. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  8898. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_DEFAULT_MAP][i];
  8899. }
  8900. }
  8901. #if defined(QCA_WIFI_QCA8074) || defined(QCA_WIFI_QCA6018)
  8902. #ifndef QCA_MEM_ATTACH_ON_WIFI3
  8903. /**
  8904. * dp_soc_attach_wifi3() - Attach txrx SOC
  8905. * @ctrl_psoc: Opaque SOC handle from control plane
  8906. * @htc_handle: Opaque HTC handle
  8907. * @hif_handle: Opaque HIF handle
  8908. * @qdf_osdev: QDF device
  8909. * @ol_ops: Offload Operations
  8910. * @device_id: Device ID
  8911. *
  8912. * Return: DP SOC handle on success, NULL on failure
  8913. */
  8914. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  8915. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8916. struct ol_if_ops *ol_ops, uint16_t device_id)
  8917. {
  8918. struct dp_soc *dp_soc = NULL;
  8919. dp_soc = dp_soc_attach(ctrl_psoc, htc_handle, qdf_osdev,
  8920. ol_ops, device_id);
  8921. if (!dp_soc)
  8922. return NULL;
  8923. if (!dp_soc_init(dp_soc, htc_handle, hif_handle))
  8924. return NULL;
  8925. return (void *)dp_soc;
  8926. }
  8927. #else
  8928. /**
  8929. * dp_soc_attach_wifi3() - Attach txrx SOC
  8930. * @ctrl_psoc: Opaque SOC handle from control plane
  8931. * @htc_handle: Opaque HTC handle
  8932. * @hif_handle: Opaque HIF handle
  8933. * @qdf_osdev: QDF device
  8934. * @ol_ops: Offload Operations
  8935. * @device_id: Device ID
  8936. *
  8937. * Return: DP SOC handle on success, NULL on failure
  8938. */
  8939. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  8940. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8941. struct ol_if_ops *ol_ops, uint16_t device_id)
  8942. {
  8943. struct dp_soc *dp_soc = NULL;
  8944. dp_soc = dp_soc_attach(ctrl_psoc, htc_handle, qdf_osdev,
  8945. ol_ops, device_id);
  8946. return (void *)dp_soc;
  8947. }
  8948. #endif
  8949. /**
  8950. * dp_soc_attach() - Attach txrx SOC
  8951. * @ctrl_psoc: Opaque SOC handle from control plane
  8952. * @htc_handle: Opaque HTC handle
  8953. * @qdf_osdev: QDF device
  8954. * @ol_ops: Offload Operations
  8955. * @device_id: Device ID
  8956. *
  8957. * Return: DP SOC handle on success, NULL on failure
  8958. */
  8959. static struct dp_soc *
  8960. dp_soc_attach(void *ctrl_psoc, HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  8961. struct ol_if_ops *ol_ops, uint16_t device_id)
  8962. {
  8963. int int_ctx;
  8964. struct dp_soc *soc = NULL;
  8965. struct htt_soc *htt_soc = NULL;
  8966. soc = qdf_mem_malloc(sizeof(*soc));
  8967. if (!soc) {
  8968. dp_err("DP SOC memory allocation failed");
  8969. goto fail0;
  8970. }
  8971. int_ctx = 0;
  8972. soc->device_id = device_id;
  8973. soc->cdp_soc.ops = &dp_txrx_ops;
  8974. soc->cdp_soc.ol_ops = ol_ops;
  8975. soc->ctrl_psoc = ctrl_psoc;
  8976. soc->osdev = qdf_osdev;
  8977. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_MAPS;
  8978. soc->wlan_cfg_ctx = wlan_cfg_soc_attach(soc->ctrl_psoc);
  8979. if (!soc->wlan_cfg_ctx) {
  8980. dp_err("wlan_cfg_ctx failed\n");
  8981. goto fail1;
  8982. }
  8983. htt_soc = qdf_mem_malloc(sizeof(*htt_soc));
  8984. if (!htt_soc) {
  8985. dp_err("HTT attach failed");
  8986. goto fail1;
  8987. }
  8988. soc->htt_handle = htt_soc;
  8989. htt_soc->dp_soc = soc;
  8990. htt_soc->htc_soc = htc_handle;
  8991. if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS)
  8992. goto fail2;
  8993. return (void *)soc;
  8994. fail2:
  8995. qdf_mem_free(htt_soc);
  8996. fail1:
  8997. qdf_mem_free(soc);
  8998. fail0:
  8999. return NULL;
  9000. }
  9001. /**
  9002. * dp_soc_init() - Initialize txrx SOC
  9003. * @dp_soc: Opaque DP SOC handle
  9004. * @htc_handle: Opaque HTC handle
  9005. * @hif_handle: Opaque HIF handle
  9006. *
  9007. * Return: DP SOC handle on success, NULL on failure
  9008. */
  9009. void *dp_soc_init(void *dpsoc, HTC_HANDLE htc_handle, void *hif_handle)
  9010. {
  9011. int target_type;
  9012. struct dp_soc *soc = (struct dp_soc *)dpsoc;
  9013. struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle;
  9014. htt_soc->htc_soc = htc_handle;
  9015. soc->hif_handle = hif_handle;
  9016. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  9017. if (!soc->hal_soc)
  9018. return NULL;
  9019. htt_soc_initialize(soc->htt_handle, soc->ctrl_psoc, htt_soc->htc_soc,
  9020. soc->hal_soc, soc->osdev);
  9021. target_type = hal_get_target_type(soc->hal_soc);
  9022. switch (target_type) {
  9023. case TARGET_TYPE_QCA6290:
  9024. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  9025. REO_DST_RING_SIZE_QCA6290);
  9026. soc->ast_override_support = 1;
  9027. soc->da_war_enabled = false;
  9028. break;
  9029. #ifdef QCA_WIFI_QCA6390
  9030. case TARGET_TYPE_QCA6390:
  9031. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  9032. REO_DST_RING_SIZE_QCA6290);
  9033. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  9034. soc->ast_override_support = 1;
  9035. if (con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  9036. int int_ctx;
  9037. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS; int_ctx++) {
  9038. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  9039. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  9040. }
  9041. }
  9042. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  9043. break;
  9044. #endif
  9045. case TARGET_TYPE_QCA8074:
  9046. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  9047. REO_DST_RING_SIZE_QCA8074);
  9048. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  9049. soc->hw_nac_monitor_support = 1;
  9050. soc->da_war_enabled = true;
  9051. break;
  9052. case TARGET_TYPE_QCA8074V2:
  9053. case TARGET_TYPE_QCA6018:
  9054. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  9055. REO_DST_RING_SIZE_QCA8074);
  9056. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  9057. soc->hw_nac_monitor_support = 1;
  9058. soc->ast_override_support = 1;
  9059. soc->per_tid_basize_max_tid = 8;
  9060. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  9061. soc->da_war_enabled = false;
  9062. break;
  9063. default:
  9064. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  9065. qdf_assert_always(0);
  9066. break;
  9067. }
  9068. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  9069. cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH));
  9070. soc->cce_disable = false;
  9071. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  9072. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  9073. CDP_CFG_MAX_PEER_ID);
  9074. if (ret != -EINVAL) {
  9075. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  9076. }
  9077. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  9078. CDP_CFG_CCE_DISABLE);
  9079. if (ret == 1)
  9080. soc->cce_disable = true;
  9081. }
  9082. qdf_spinlock_create(&soc->peer_ref_mutex);
  9083. qdf_spinlock_create(&soc->ast_lock);
  9084. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  9085. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  9086. /* fill the tx/rx cpu ring map*/
  9087. dp_soc_set_txrx_ring_map(soc);
  9088. qdf_spinlock_create(&soc->htt_stats.lock);
  9089. /* initialize work queue for stats processing */
  9090. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  9091. return soc;
  9092. }
  9093. /**
  9094. * dp_soc_init_wifi3() - Initialize txrx SOC
  9095. * @dp_soc: Opaque DP SOC handle
  9096. * @ctrl_psoc: Opaque SOC handle from control plane(Unused)
  9097. * @hif_handle: Opaque HIF handle
  9098. * @htc_handle: Opaque HTC handle
  9099. * @qdf_osdev: QDF device (Unused)
  9100. * @ol_ops: Offload Operations (Unused)
  9101. * @device_id: Device ID (Unused)
  9102. *
  9103. * Return: DP SOC handle on success, NULL on failure
  9104. */
  9105. void *dp_soc_init_wifi3(void *dpsoc, void *ctrl_psoc, void *hif_handle,
  9106. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  9107. struct ol_if_ops *ol_ops, uint16_t device_id)
  9108. {
  9109. return dp_soc_init(dpsoc, htc_handle, hif_handle);
  9110. }
  9111. #endif
  9112. /*
  9113. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  9114. *
  9115. * @soc: handle to DP soc
  9116. * @mac_id: MAC id
  9117. *
  9118. * Return: Return pdev corresponding to MAC
  9119. */
  9120. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  9121. {
  9122. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  9123. return soc->pdev_list[mac_id];
  9124. /* Typically for MCL as there only 1 PDEV*/
  9125. return soc->pdev_list[0];
  9126. }
  9127. /*
  9128. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  9129. * @soc: DP SoC context
  9130. * @max_mac_rings: No of MAC rings
  9131. *
  9132. * Return: None
  9133. */
  9134. static
  9135. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  9136. int *max_mac_rings)
  9137. {
  9138. bool dbs_enable = false;
  9139. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  9140. dbs_enable = soc->cdp_soc.ol_ops->
  9141. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  9142. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  9143. }
  9144. /*
  9145. * dp_is_soc_reinit() - Check if soc reinit is true
  9146. * @soc: DP SoC context
  9147. *
  9148. * Return: true or false
  9149. */
  9150. bool dp_is_soc_reinit(struct dp_soc *soc)
  9151. {
  9152. return soc->dp_soc_reinit;
  9153. }
  9154. /*
  9155. * dp_set_pktlog_wifi3() - attach txrx vdev
  9156. * @pdev: Datapath PDEV handle
  9157. * @event: which event's notifications are being subscribed to
  9158. * @enable: WDI event subscribe or not. (True or False)
  9159. *
  9160. * Return: Success, NULL on failure
  9161. */
  9162. #ifdef WDI_EVENT_ENABLE
  9163. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  9164. bool enable)
  9165. {
  9166. struct dp_soc *soc = NULL;
  9167. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  9168. int max_mac_rings = wlan_cfg_get_num_mac_rings
  9169. (pdev->wlan_cfg_ctx);
  9170. uint8_t mac_id = 0;
  9171. soc = pdev->soc;
  9172. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  9173. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  9174. FL("Max_mac_rings %d "),
  9175. max_mac_rings);
  9176. if (enable) {
  9177. switch (event) {
  9178. case WDI_EVENT_RX_DESC:
  9179. if (pdev->monitor_vdev) {
  9180. /* Nothing needs to be done if monitor mode is
  9181. * enabled
  9182. */
  9183. return 0;
  9184. }
  9185. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  9186. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  9187. htt_tlv_filter.mpdu_start = 1;
  9188. htt_tlv_filter.msdu_start = 1;
  9189. htt_tlv_filter.msdu_end = 1;
  9190. htt_tlv_filter.mpdu_end = 1;
  9191. htt_tlv_filter.packet_header = 1;
  9192. htt_tlv_filter.attention = 1;
  9193. htt_tlv_filter.ppdu_start = 1;
  9194. htt_tlv_filter.ppdu_end = 1;
  9195. htt_tlv_filter.ppdu_end_user_stats = 1;
  9196. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  9197. htt_tlv_filter.ppdu_end_status_done = 1;
  9198. htt_tlv_filter.enable_fp = 1;
  9199. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  9200. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  9201. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  9202. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  9203. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  9204. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  9205. htt_tlv_filter.offset_valid = false;
  9206. for (mac_id = 0; mac_id < max_mac_rings;
  9207. mac_id++) {
  9208. int mac_for_pdev =
  9209. dp_get_mac_id_for_pdev(mac_id,
  9210. pdev->pdev_id);
  9211. htt_h2t_rx_ring_cfg(soc->htt_handle,
  9212. mac_for_pdev,
  9213. pdev->rxdma_mon_status_ring[mac_id]
  9214. .hal_srng,
  9215. RXDMA_MONITOR_STATUS,
  9216. RX_BUFFER_SIZE,
  9217. &htt_tlv_filter);
  9218. }
  9219. if (soc->reap_timer_init)
  9220. qdf_timer_mod(&soc->mon_reap_timer,
  9221. DP_INTR_POLL_TIMER_MS);
  9222. }
  9223. break;
  9224. case WDI_EVENT_LITE_RX:
  9225. if (pdev->monitor_vdev) {
  9226. /* Nothing needs to be done if monitor mode is
  9227. * enabled
  9228. */
  9229. return 0;
  9230. }
  9231. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  9232. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  9233. htt_tlv_filter.ppdu_start = 1;
  9234. htt_tlv_filter.ppdu_end = 1;
  9235. htt_tlv_filter.ppdu_end_user_stats = 1;
  9236. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  9237. htt_tlv_filter.ppdu_end_status_done = 1;
  9238. htt_tlv_filter.mpdu_start = 1;
  9239. htt_tlv_filter.enable_fp = 1;
  9240. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  9241. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  9242. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  9243. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  9244. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  9245. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  9246. htt_tlv_filter.offset_valid = false;
  9247. for (mac_id = 0; mac_id < max_mac_rings;
  9248. mac_id++) {
  9249. int mac_for_pdev =
  9250. dp_get_mac_id_for_pdev(mac_id,
  9251. pdev->pdev_id);
  9252. htt_h2t_rx_ring_cfg(soc->htt_handle,
  9253. mac_for_pdev,
  9254. pdev->rxdma_mon_status_ring[mac_id]
  9255. .hal_srng,
  9256. RXDMA_MONITOR_STATUS,
  9257. RX_BUFFER_SIZE_PKTLOG_LITE,
  9258. &htt_tlv_filter);
  9259. }
  9260. if (soc->reap_timer_init)
  9261. qdf_timer_mod(&soc->mon_reap_timer,
  9262. DP_INTR_POLL_TIMER_MS);
  9263. }
  9264. break;
  9265. case WDI_EVENT_LITE_T2H:
  9266. if (pdev->monitor_vdev) {
  9267. /* Nothing needs to be done if monitor mode is
  9268. * enabled
  9269. */
  9270. return 0;
  9271. }
  9272. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  9273. int mac_for_pdev = dp_get_mac_id_for_pdev(
  9274. mac_id, pdev->pdev_id);
  9275. pdev->pktlog_ppdu_stats = true;
  9276. dp_h2t_cfg_stats_msg_send(pdev,
  9277. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  9278. mac_for_pdev);
  9279. }
  9280. break;
  9281. default:
  9282. /* Nothing needs to be done for other pktlog types */
  9283. break;
  9284. }
  9285. } else {
  9286. switch (event) {
  9287. case WDI_EVENT_RX_DESC:
  9288. case WDI_EVENT_LITE_RX:
  9289. if (pdev->monitor_vdev) {
  9290. /* Nothing needs to be done if monitor mode is
  9291. * enabled
  9292. */
  9293. return 0;
  9294. }
  9295. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  9296. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  9297. for (mac_id = 0; mac_id < max_mac_rings;
  9298. mac_id++) {
  9299. int mac_for_pdev =
  9300. dp_get_mac_id_for_pdev(mac_id,
  9301. pdev->pdev_id);
  9302. htt_h2t_rx_ring_cfg(soc->htt_handle,
  9303. mac_for_pdev,
  9304. pdev->rxdma_mon_status_ring[mac_id]
  9305. .hal_srng,
  9306. RXDMA_MONITOR_STATUS,
  9307. RX_BUFFER_SIZE,
  9308. &htt_tlv_filter);
  9309. }
  9310. if (soc->reap_timer_init)
  9311. qdf_timer_stop(&soc->mon_reap_timer);
  9312. }
  9313. break;
  9314. case WDI_EVENT_LITE_T2H:
  9315. if (pdev->monitor_vdev) {
  9316. /* Nothing needs to be done if monitor mode is
  9317. * enabled
  9318. */
  9319. return 0;
  9320. }
  9321. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  9322. * passing value 0. Once these macros will define in htt
  9323. * header file will use proper macros
  9324. */
  9325. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  9326. int mac_for_pdev =
  9327. dp_get_mac_id_for_pdev(mac_id,
  9328. pdev->pdev_id);
  9329. pdev->pktlog_ppdu_stats = false;
  9330. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  9331. dp_h2t_cfg_stats_msg_send(pdev, 0,
  9332. mac_for_pdev);
  9333. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  9334. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  9335. mac_for_pdev);
  9336. } else if (pdev->enhanced_stats_en) {
  9337. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  9338. mac_for_pdev);
  9339. }
  9340. }
  9341. break;
  9342. default:
  9343. /* Nothing needs to be done for other pktlog types */
  9344. break;
  9345. }
  9346. }
  9347. return 0;
  9348. }
  9349. #endif
  9350. /**
  9351. * dp_bucket_index() - Return index from array
  9352. *
  9353. * @delay: delay measured
  9354. * @array: array used to index corresponding delay
  9355. *
  9356. * Return: index
  9357. */
  9358. static uint8_t dp_bucket_index(uint32_t delay, uint16_t *array)
  9359. {
  9360. uint8_t i = CDP_DELAY_BUCKET_0;
  9361. for (; i < CDP_DELAY_BUCKET_MAX; i++) {
  9362. if (delay >= array[i] && delay <= array[i + 1])
  9363. return i;
  9364. }
  9365. return (CDP_DELAY_BUCKET_MAX - 1);
  9366. }
  9367. /**
  9368. * dp_fill_delay_buckets() - Fill delay statistics bucket for each
  9369. * type of delay
  9370. *
  9371. * @pdev: pdev handle
  9372. * @delay: delay in ms
  9373. * @t: tid value
  9374. * @mode: type of tx delay mode
  9375. * Return: pointer to cdp_delay_stats structure
  9376. */
  9377. static struct cdp_delay_stats *
  9378. dp_fill_delay_buckets(struct dp_pdev *pdev, uint32_t delay,
  9379. uint8_t tid, uint8_t mode)
  9380. {
  9381. uint8_t delay_index = 0;
  9382. struct cdp_tid_tx_stats *tstats =
  9383. &pdev->stats.tid_stats.tid_tx_stats[tid];
  9384. struct cdp_tid_rx_stats *rstats =
  9385. &pdev->stats.tid_stats.tid_rx_stats[tid];
  9386. /*
  9387. * cdp_fw_to_hw_delay_range
  9388. * Fw to hw delay ranges in milliseconds
  9389. */
  9390. uint16_t cdp_fw_to_hw_delay[CDP_DELAY_BUCKET_MAX] = {
  9391. 0, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 250, 500};
  9392. /*
  9393. * cdp_sw_enq_delay_range
  9394. * Software enqueue delay ranges in milliseconds
  9395. */
  9396. uint16_t cdp_sw_enq_delay[CDP_DELAY_BUCKET_MAX] = {
  9397. 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12};
  9398. /*
  9399. * cdp_intfrm_delay_range
  9400. * Interframe delay ranges in milliseconds
  9401. */
  9402. uint16_t cdp_intfrm_delay[CDP_DELAY_BUCKET_MAX] = {
  9403. 0, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60};
  9404. /*
  9405. * Update delay stats in proper bucket
  9406. */
  9407. switch (mode) {
  9408. /* Software Enqueue delay ranges */
  9409. case CDP_DELAY_STATS_SW_ENQ:
  9410. delay_index = dp_bucket_index(delay, cdp_sw_enq_delay);
  9411. tstats->swq_delay.delay_bucket[delay_index]++;
  9412. return &tstats->swq_delay;
  9413. /* Tx Completion delay ranges */
  9414. case CDP_DELAY_STATS_FW_HW_TRANSMIT:
  9415. delay_index = dp_bucket_index(delay, cdp_fw_to_hw_delay);
  9416. tstats->hwtx_delay.delay_bucket[delay_index]++;
  9417. return &tstats->hwtx_delay;
  9418. /* Interframe tx delay ranges */
  9419. case CDP_DELAY_STATS_TX_INTERFRAME:
  9420. delay_index = dp_bucket_index(delay, cdp_intfrm_delay);
  9421. tstats->intfrm_delay.delay_bucket[delay_index]++;
  9422. return &tstats->intfrm_delay;
  9423. /* Interframe rx delay ranges */
  9424. case CDP_DELAY_STATS_RX_INTERFRAME:
  9425. delay_index = dp_bucket_index(delay, cdp_intfrm_delay);
  9426. rstats->intfrm_delay.delay_bucket[delay_index]++;
  9427. return &rstats->intfrm_delay;
  9428. /* Ring reap to indication to network stack */
  9429. case CDP_DELAY_STATS_REAP_STACK:
  9430. delay_index = dp_bucket_index(delay, cdp_intfrm_delay);
  9431. rstats->to_stack_delay.delay_bucket[delay_index]++;
  9432. return &rstats->to_stack_delay;
  9433. default:
  9434. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  9435. "%s Incorrect delay mode: %d", __func__, mode);
  9436. }
  9437. return NULL;
  9438. }
  9439. /**
  9440. * dp_update_delay_stats() - Update delay statistics in structure
  9441. * and fill min, max and avg delay
  9442. *
  9443. * @pdev: pdev handle
  9444. * @delay: delay in ms
  9445. * @tid: tid value
  9446. * @mode: type of tx delay mode
  9447. * Return: none
  9448. */
  9449. void dp_update_delay_stats(struct dp_pdev *pdev, uint32_t delay,
  9450. uint8_t tid, uint8_t mode)
  9451. {
  9452. struct cdp_delay_stats *dstats = NULL;
  9453. /*
  9454. * Delay ranges are different for different delay modes
  9455. * Get the correct index to update delay bucket
  9456. */
  9457. dstats = dp_fill_delay_buckets(pdev, delay, tid, mode);
  9458. if (qdf_unlikely(!dstats))
  9459. return;
  9460. if (delay != 0) {
  9461. /*
  9462. * Compute minimum,average and maximum
  9463. * delay
  9464. */
  9465. if (delay < dstats->min_delay)
  9466. dstats->min_delay = delay;
  9467. if (delay > dstats->max_delay)
  9468. dstats->max_delay = delay;
  9469. /*
  9470. * Average over delay measured till now
  9471. */
  9472. if (!dstats->avg_delay)
  9473. dstats->avg_delay = delay;
  9474. else
  9475. dstats->avg_delay = ((delay + dstats->avg_delay) / 2);
  9476. }
  9477. }