msm_smem.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/dma-buf.h>
  6. #include <linux/dma-heap.h>
  7. #include <linux/dma-direction.h>
  8. #include <linux/iommu.h>
  9. #include <linux/msm_dma_iommu_mapping.h>
  10. #include <linux/msm_ion.h>
  11. #include <soc/qcom/secure_buffer.h>
  12. #include <linux/mem-buf.h>
  13. #include <linux/slab.h>
  14. #include <linux/types.h>
  15. #include <linux/qcom-dma-mapping.h>
  16. #include <linux/version.h>
  17. #include "msm_cvp_core.h"
  18. #include "msm_cvp_debug.h"
  19. #include "msm_cvp_resources.h"
  20. #include "cvp_core_hfi.h"
  21. #include "msm_cvp_dsp.h"
  22. static void * __cvp_dma_buf_vmap(struct dma_buf *dbuf)
  23. {
  24. #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 13, 0))
  25. return dma_buf_vmap(dbuf);
  26. #else
  27. struct dma_buf_map map;
  28. void *dma_map;
  29. int err;
  30. err = dma_buf_vmap(dbuf, &map);
  31. dma_map = err ? NULL : map.vaddr;
  32. if (!dma_map)
  33. dprintk(CVP_ERR, "map to kvaddr failed\n");
  34. return dma_map;
  35. #endif
  36. }
  37. static void __cvp_dma_buf_vunmap(void *vaddr, struct dma_buf *dbuf)
  38. {
  39. #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 13, 0))
  40. dma_buf_vunmap(dbuf, vaddr);
  41. #else
  42. struct dma_buf_map map = { \
  43. .vaddr = vaddr, \
  44. .is_iomem = false, \
  45. };
  46. if (vaddr)
  47. dma_buf_vunmap(dbuf, &map);
  48. #endif
  49. }
  50. static int msm_dma_get_device_address(struct dma_buf *dbuf, u32 align,
  51. dma_addr_t *iova, u32 flags, struct msm_cvp_platform_resources *res,
  52. struct cvp_dma_mapping_info *mapping_info)
  53. {
  54. int rc = 0;
  55. struct dma_buf_attachment *attach;
  56. struct sg_table *table = NULL;
  57. struct context_bank_info *cb = NULL;
  58. if (!dbuf || !iova || !mapping_info) {
  59. dprintk(CVP_ERR, "Invalid params: %pK, %pK, %pK\n",
  60. dbuf, iova, mapping_info);
  61. return -EINVAL;
  62. }
  63. if (is_iommu_present(res)) {
  64. cb = msm_cvp_smem_get_context_bank(res, flags);
  65. if (!cb) {
  66. dprintk(CVP_ERR,
  67. "%s: Failed to get context bank device\n",
  68. __func__);
  69. rc = -EIO;
  70. goto mem_map_failed;
  71. }
  72. /* Prepare a dma buf for dma on the given device */
  73. attach = dma_buf_attach(dbuf, cb->dev);
  74. if (IS_ERR_OR_NULL(attach)) {
  75. rc = PTR_ERR(attach) ?: -ENOMEM;
  76. dprintk(CVP_ERR, "Failed to attach dmabuf\n");
  77. goto mem_buf_attach_failed;
  78. }
  79. /*
  80. * Get the scatterlist for the given attachment
  81. * Mapping of sg is taken care by map attachment
  82. */
  83. attach->dma_map_attrs = DMA_ATTR_DELAYED_UNMAP;
  84. /*
  85. * We do not need dma_map function to perform cache operations
  86. * on the whole buffer size and hence pass skip sync flag.
  87. * We do the required cache operations separately for the
  88. * required buffer size
  89. */
  90. attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC;
  91. if (res->sys_cache_present)
  92. attach->dma_map_attrs |=
  93. DMA_ATTR_IOMMU_USE_UPSTREAM_HINT;
  94. table = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
  95. if (IS_ERR_OR_NULL(table)) {
  96. rc = PTR_ERR(table) ?: -ENOMEM;
  97. dprintk(CVP_ERR, "Failed to map table\n");
  98. goto mem_map_table_failed;
  99. }
  100. if (table->sgl) {
  101. if (flags & SMEM_CAMERA) {
  102. *iova = sg_phys(table->sgl);
  103. } else {
  104. *iova = table->sgl->dma_address;
  105. }
  106. } else {
  107. dprintk(CVP_ERR, "sgl is NULL\n");
  108. rc = -ENOMEM;
  109. goto mem_map_sg_failed;
  110. }
  111. mapping_info->dev = cb->dev;
  112. mapping_info->domain = cb->domain;
  113. mapping_info->table = table;
  114. mapping_info->attach = attach;
  115. mapping_info->buf = dbuf;
  116. mapping_info->cb_info = (void *)cb;
  117. } else {
  118. dprintk(CVP_MEM, "iommu not present, use phys mem addr\n");
  119. }
  120. return 0;
  121. mem_map_sg_failed:
  122. dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL);
  123. mem_map_table_failed:
  124. dma_buf_detach(dbuf, attach);
  125. mem_buf_attach_failed:
  126. mem_map_failed:
  127. return rc;
  128. }
  129. static int msm_dma_put_device_address(u32 flags,
  130. struct cvp_dma_mapping_info *mapping_info)
  131. {
  132. int rc = 0;
  133. if (!mapping_info) {
  134. dprintk(CVP_WARN, "Invalid mapping_info\n");
  135. return -EINVAL;
  136. }
  137. if (!mapping_info->dev || !mapping_info->table ||
  138. !mapping_info->buf || !mapping_info->attach ||
  139. !mapping_info->cb_info) {
  140. dprintk(CVP_WARN, "Invalid params\n");
  141. return -EINVAL;
  142. }
  143. dma_buf_unmap_attachment(mapping_info->attach,
  144. mapping_info->table, DMA_BIDIRECTIONAL);
  145. dma_buf_detach(mapping_info->buf, mapping_info->attach);
  146. mapping_info->dev = NULL;
  147. mapping_info->domain = NULL;
  148. mapping_info->table = NULL;
  149. mapping_info->attach = NULL;
  150. mapping_info->buf = NULL;
  151. mapping_info->cb_info = NULL;
  152. return rc;
  153. }
  154. struct dma_buf *msm_cvp_smem_get_dma_buf(int fd)
  155. {
  156. struct dma_buf *dma_buf;
  157. dma_buf = dma_buf_get(fd);
  158. if (IS_ERR_OR_NULL(dma_buf)) {
  159. dprintk(CVP_ERR, "Failed to get dma_buf for %d, error %ld\n",
  160. fd, PTR_ERR(dma_buf));
  161. dma_buf = NULL;
  162. }
  163. return dma_buf;
  164. }
  165. void msm_cvp_smem_put_dma_buf(void *dma_buf)
  166. {
  167. if (!dma_buf) {
  168. dprintk(CVP_ERR, "%s: NULL dma_buf\n", __func__);
  169. return;
  170. }
  171. dma_heap_buffer_free((struct dma_buf *)dma_buf);
  172. }
  173. int msm_cvp_map_smem(struct msm_cvp_inst *inst,
  174. struct msm_cvp_smem *smem,
  175. const char *str)
  176. {
  177. int *vmid_list;
  178. int *perms_list;
  179. int nelems = 0;
  180. int rc = 0;
  181. dma_addr_t iova = 0;
  182. u32 temp = 0;
  183. u32 align = SZ_4K;
  184. struct dma_buf *dma_buf;
  185. if (!inst || !smem) {
  186. dprintk(CVP_ERR, "%s: Invalid params: %pK %pK\n",
  187. __func__, inst, smem);
  188. return -EINVAL;
  189. }
  190. dma_buf = smem->dma_buf;
  191. rc = mem_buf_dma_buf_copy_vmperm(dma_buf,
  192. &vmid_list, &perms_list, &nelems);
  193. if (rc) {
  194. dprintk(CVP_ERR, "%s fail to get vmid and perms %d\n",
  195. __func__, rc);
  196. return rc;
  197. }
  198. for (temp = 0; temp < nelems; temp++) {
  199. if (vmid_list[temp] == VMID_CP_PIXEL)
  200. smem->flags |= (SMEM_SECURE | SMEM_PIXEL);
  201. else if (vmid_list[temp] == VMID_CP_NON_PIXEL)
  202. smem->flags |= (SMEM_SECURE | SMEM_NON_PIXEL);
  203. else if (vmid_list[temp] == VMID_CP_CAMERA)
  204. smem->flags |= (SMEM_SECURE | SMEM_CAMERA);
  205. }
  206. rc = msm_dma_get_device_address(dma_buf, align, &iova, smem->flags,
  207. &(inst->core->resources), &smem->mapping_info);
  208. if (rc) {
  209. dprintk(CVP_ERR, "Failed to get device address: %d\n", rc);
  210. goto exit;
  211. }
  212. temp = (u32)iova;
  213. if ((dma_addr_t)temp != iova) {
  214. dprintk(CVP_ERR, "iova(%pa) truncated to %#x", &iova, temp);
  215. rc = -EINVAL;
  216. goto exit;
  217. }
  218. smem->size = dma_buf->size;
  219. smem->device_addr = (u32)iova;
  220. print_smem(CVP_MEM, str, inst, smem);
  221. goto success;
  222. exit:
  223. smem->device_addr = 0x0;
  224. success:
  225. kfree(vmid_list);
  226. kfree(perms_list);
  227. return rc;
  228. }
  229. int msm_cvp_unmap_smem(struct msm_cvp_inst *inst,
  230. struct msm_cvp_smem *smem,
  231. const char *str)
  232. {
  233. int rc = 0;
  234. if (!smem) {
  235. dprintk(CVP_ERR, "%s: Invalid params: %pK\n", __func__, smem);
  236. rc = -EINVAL;
  237. goto exit;
  238. }
  239. print_smem(CVP_MEM, str, inst, smem);
  240. rc = msm_dma_put_device_address(smem->flags, &smem->mapping_info);
  241. if (rc) {
  242. dprintk(CVP_ERR, "Failed to put device address: %d\n", rc);
  243. goto exit;
  244. }
  245. smem->device_addr = 0x0;
  246. exit:
  247. return rc;
  248. }
  249. static int alloc_dma_mem(size_t size, u32 align, int map_kernel,
  250. struct msm_cvp_platform_resources *res, struct msm_cvp_smem *mem)
  251. {
  252. dma_addr_t iova = 0;
  253. int rc = 0;
  254. struct dma_buf *dbuf = NULL;
  255. struct dma_heap *heap = NULL;
  256. struct mem_buf_lend_kernel_arg arg;
  257. int vmids[1];
  258. int perms[1];
  259. if (!res) {
  260. dprintk(CVP_ERR, "%s: NULL res\n", __func__);
  261. return -EINVAL;
  262. }
  263. align = ALIGN(align, SZ_4K);
  264. size = ALIGN(size, SZ_4K);
  265. if (is_iommu_present(res)) {
  266. heap = dma_heap_find("qcom,system");
  267. dprintk(CVP_MEM, "%s size %zx align %d flag %d\n",
  268. __func__, size, align, mem->flags);
  269. } else {
  270. dprintk(CVP_ERR,
  271. "No IOMMU CB: allocate shared memory heap size %zx align %d\n",
  272. size, align);
  273. }
  274. dbuf = dma_heap_buffer_alloc(heap, size, 0, 0);
  275. if (IS_ERR_OR_NULL(dbuf)) {
  276. dprintk(CVP_ERR,
  277. "Failed to allocate shared memory = %x bytes, %x %x\n",
  278. size, mem->flags, PTR_ERR(dbuf));
  279. rc = -ENOMEM;
  280. goto fail_shared_mem_alloc;
  281. }
  282. perms[0] = PERM_READ | PERM_WRITE;
  283. arg.nr_acl_entries = 1;
  284. arg.vmids = vmids;
  285. arg.perms = perms;
  286. if (mem->flags & SMEM_NON_PIXEL) {
  287. vmids[0] = VMID_CP_NON_PIXEL;
  288. rc = mem_buf_lend(dbuf, &arg);
  289. } else if (mem->flags & SMEM_PIXEL) {
  290. vmids[0] = VMID_CP_PIXEL;
  291. rc = mem_buf_lend(dbuf, &arg);
  292. }
  293. if (rc) {
  294. dprintk(CVP_ERR, "Failed to lend dmabuf %d, vmid %d\n",
  295. rc, vmids[0]);
  296. goto fail_device_address;
  297. }
  298. if (!gfa_cv.dmabuf_f_op)
  299. gfa_cv.dmabuf_f_op = (const struct file_operations *)dbuf->file->f_op;
  300. mem->size = size;
  301. mem->dma_buf = dbuf;
  302. mem->kvaddr = NULL;
  303. rc = msm_dma_get_device_address(dbuf, align, &iova, mem->flags,
  304. res, &mem->mapping_info);
  305. if (rc) {
  306. dprintk(CVP_ERR, "Failed to get device address: %d\n",
  307. rc);
  308. goto fail_device_address;
  309. }
  310. mem->device_addr = (u32)iova;
  311. if ((dma_addr_t)mem->device_addr != iova) {
  312. dprintk(CVP_ERR, "iova(%pa) truncated to %#x",
  313. &iova, mem->device_addr);
  314. goto fail_device_address;
  315. }
  316. if (map_kernel) {
  317. dma_buf_begin_cpu_access(dbuf, DMA_BIDIRECTIONAL);
  318. mem->kvaddr = __cvp_dma_buf_vmap(dbuf);
  319. if (!mem->kvaddr) {
  320. dprintk(CVP_ERR,
  321. "Failed to map shared mem in kernel\n");
  322. rc = -EIO;
  323. goto fail_map;
  324. }
  325. }
  326. dprintk(CVP_MEM,
  327. "%s: dma_buf=%pK,iova=%x,size=%d,kvaddr=%pK,flags=%#lx\n",
  328. __func__, mem->dma_buf, mem->device_addr, mem->size,
  329. mem->kvaddr, mem->flags);
  330. return rc;
  331. fail_map:
  332. if (map_kernel)
  333. dma_buf_end_cpu_access(dbuf, DMA_BIDIRECTIONAL);
  334. fail_device_address:
  335. dma_heap_buffer_free(dbuf);
  336. fail_shared_mem_alloc:
  337. return rc;
  338. }
  339. static int free_dma_mem(struct msm_cvp_smem *mem)
  340. {
  341. dprintk(CVP_MEM,
  342. "%s: dma_buf = %pK, device_addr = %x, size = %d, kvaddr = %pK\n",
  343. __func__, mem->dma_buf, mem->device_addr, mem->size, mem->kvaddr);
  344. if (mem->device_addr) {
  345. msm_dma_put_device_address(mem->flags, &mem->mapping_info);
  346. mem->device_addr = 0x0;
  347. }
  348. if (mem->kvaddr) {
  349. __cvp_dma_buf_vunmap(mem->dma_buf, mem->kvaddr);
  350. mem->kvaddr = NULL;
  351. dma_buf_end_cpu_access(mem->dma_buf, DMA_BIDIRECTIONAL);
  352. }
  353. if (mem->dma_buf) {
  354. dma_heap_buffer_free(mem->dma_buf);
  355. mem->dma_buf = NULL;
  356. }
  357. return 0;
  358. }
  359. int msm_cvp_smem_alloc(size_t size, u32 align, int map_kernel,
  360. void *res, struct msm_cvp_smem *smem)
  361. {
  362. int rc = 0;
  363. if (!smem || !size) {
  364. dprintk(CVP_ERR, "%s: NULL smem or %d size\n",
  365. __func__, (u32)size);
  366. return -EINVAL;
  367. }
  368. rc = alloc_dma_mem(size, align, map_kernel,
  369. (struct msm_cvp_platform_resources *)res, smem);
  370. return rc;
  371. }
  372. int msm_cvp_smem_free(struct msm_cvp_smem *smem)
  373. {
  374. int rc = 0;
  375. if (!smem) {
  376. dprintk(CVP_ERR, "NULL smem passed\n");
  377. return -EINVAL;
  378. }
  379. rc = free_dma_mem(smem);
  380. return rc;
  381. };
  382. int msm_cvp_smem_cache_operations(struct dma_buf *dbuf,
  383. enum smem_cache_ops cache_op, unsigned long offset, unsigned long size)
  384. {
  385. int rc = 0;
  386. if (!dbuf) {
  387. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  388. return -EINVAL;
  389. }
  390. switch (cache_op) {
  391. case SMEM_CACHE_CLEAN:
  392. case SMEM_CACHE_CLEAN_INVALIDATE:
  393. rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_BIDIRECTIONAL,
  394. offset, size);
  395. if (rc)
  396. break;
  397. rc = dma_buf_end_cpu_access_partial(dbuf, DMA_BIDIRECTIONAL,
  398. offset, size);
  399. break;
  400. case SMEM_CACHE_INVALIDATE:
  401. rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_TO_DEVICE,
  402. offset, size);
  403. if (rc)
  404. break;
  405. rc = dma_buf_end_cpu_access_partial(dbuf, DMA_FROM_DEVICE,
  406. offset, size);
  407. break;
  408. default:
  409. dprintk(CVP_ERR, "%s: cache (%d) operation not supported\n",
  410. __func__, cache_op);
  411. rc = -EINVAL;
  412. break;
  413. }
  414. return rc;
  415. }
  416. struct context_bank_info *msm_cvp_smem_get_context_bank(
  417. struct msm_cvp_platform_resources *res,
  418. unsigned int flags)
  419. {
  420. struct context_bank_info *cb = NULL, *match = NULL;
  421. char *search_str;
  422. char *non_secure_cb = "cvp_hlos";
  423. char *secure_nonpixel_cb = "cvp_sec_nonpixel";
  424. char *secure_pixel_cb = "cvp_sec_pixel";
  425. bool is_secure = (flags & SMEM_SECURE) ? true : false;
  426. if (flags & SMEM_PIXEL)
  427. search_str = secure_pixel_cb;
  428. else if (flags & SMEM_NON_PIXEL)
  429. search_str = secure_nonpixel_cb;
  430. else if (flags & SMEM_CAMERA)
  431. search_str = secure_pixel_cb;
  432. else
  433. search_str = non_secure_cb;
  434. list_for_each_entry(cb, &res->context_banks, list) {
  435. if (cb->is_secure == is_secure &&
  436. !strcmp(search_str, cb->name)) {
  437. match = cb;
  438. break;
  439. }
  440. }
  441. if (!match)
  442. dprintk(CVP_ERR,
  443. "%s: cb not found for flags %x, is_secure %d\n",
  444. __func__, flags, is_secure);
  445. return match;
  446. }
  447. int msm_cvp_map_ipcc_regs(u32 *iova)
  448. {
  449. struct context_bank_info *cb;
  450. struct msm_cvp_core *core;
  451. struct cvp_hfi_device *hfi_ops;
  452. struct iris_hfi_device *dev = NULL;
  453. phys_addr_t paddr;
  454. u32 size;
  455. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  456. if (core) {
  457. hfi_ops = core->device;
  458. if (hfi_ops)
  459. dev = hfi_ops->hfi_device_data;
  460. }
  461. if (!dev)
  462. return -EINVAL;
  463. paddr = dev->res->ipcc_reg_base;
  464. size = dev->res->ipcc_reg_size;
  465. if (!paddr || !size)
  466. return -EINVAL;
  467. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  468. if (!cb) {
  469. dprintk(CVP_ERR, "%s: fail to get context bank\n", __func__);
  470. return -EINVAL;
  471. }
  472. *iova = dma_map_resource(cb->dev, paddr, size, DMA_BIDIRECTIONAL, 0);
  473. if (*iova == DMA_MAPPING_ERROR) {
  474. dprintk(CVP_WARN, "%s: fail to map IPCC regs\n", __func__);
  475. return -EFAULT;
  476. }
  477. return 0;
  478. }