dp_main.c 122 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <hal_api.h>
  23. #include <hif.h>
  24. #include <htt.h>
  25. #include <wdi_event.h>
  26. #include <queue.h>
  27. #include "dp_htt.h"
  28. #include "dp_types.h"
  29. #include "dp_internal.h"
  30. #include "dp_tx.h"
  31. #include "dp_rx.h"
  32. #include <cdp_txrx_handle.h>
  33. #include <wlan_cfg.h>
  34. #include "cdp_txrx_cmn_struct.h"
  35. #include <qdf_util.h>
  36. #include "dp_peer.h"
  37. #include "dp_rx_mon.h"
  38. #include "htt_stats.h"
  39. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  40. #define DP_INTR_POLL_TIMER_MS 10
  41. #define DP_MCS_LENGTH (6*MAX_MCS)
  42. #define DP_NSS_LENGTH (6*SS_COUNT)
  43. #define DP_RXDMA_ERR_LENGTH (6*MAX_RXDMA_ERRORS)
  44. #define DP_REO_ERR_LENGTH (6*REO_ERROR_TYPE_MAX)
  45. #define DP_CURR_FW_STATS_AVAIL 19
  46. #define DP_HTT_DBG_EXT_STATS_MAX 256
  47. /**
  48. * default_dscp_tid_map - Default DSCP-TID mapping
  49. *
  50. * DSCP TID AC
  51. * 000000 0 WME_AC_BE
  52. * 001000 1 WME_AC_BK
  53. * 010000 1 WME_AC_BK
  54. * 011000 0 WME_AC_BE
  55. * 100000 5 WME_AC_VI
  56. * 101000 5 WME_AC_VI
  57. * 110000 6 WME_AC_VO
  58. * 111000 6 WME_AC_VO
  59. */
  60. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  61. 0, 0, 0, 0, 0, 0, 0, 0,
  62. 1, 1, 1, 1, 1, 1, 1, 1,
  63. 1, 1, 1, 1, 1, 1, 1, 1,
  64. 0, 0, 0, 0, 0, 0, 0, 0,
  65. 5, 5, 5, 5, 5, 5, 5, 5,
  66. 5, 5, 5, 5, 5, 5, 5, 5,
  67. 6, 6, 6, 6, 6, 6, 6, 6,
  68. 6, 6, 6, 6, 6, 6, 6, 6,
  69. };
  70. /**
  71. * @brief Select the type of statistics
  72. */
  73. enum dp_stats_type {
  74. STATS_FW = 0,
  75. STATS_HOST = 1,
  76. STATS_TYPE_MAX = 2,
  77. };
  78. /**
  79. * @brief General Firmware statistics options
  80. *
  81. */
  82. enum dp_fw_stats {
  83. TXRX_FW_STATS_INVALID = -1,
  84. };
  85. /**
  86. * @brief Firmware and Host statistics
  87. * currently supported
  88. */
  89. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  90. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  91. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  92. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  93. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  94. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  95. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  96. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  97. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  98. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  99. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  100. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  101. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  102. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  103. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  104. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  105. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  106. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  107. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  108. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  109. /* Last ENUM for HTT FW STATS */
  110. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  111. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  112. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  113. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  114. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  115. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  116. };
  117. /*
  118. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  119. */
  120. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  121. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  122. {
  123. void *hal_soc = soc->hal_soc;
  124. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  125. /* TODO: See if we should get align size from hal */
  126. uint32_t ring_base_align = 8;
  127. struct hal_srng_params ring_params;
  128. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  129. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  130. srng->hal_srng = NULL;
  131. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  132. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  133. soc->osdev, soc->osdev->dev, srng->alloc_size,
  134. &(srng->base_paddr_unaligned));
  135. if (!srng->base_vaddr_unaligned) {
  136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  137. FL("alloc failed - ring_type: %d, ring_num %d"),
  138. ring_type, ring_num);
  139. return QDF_STATUS_E_NOMEM;
  140. }
  141. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  142. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  143. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  144. ((unsigned long)(ring_params.ring_base_vaddr) -
  145. (unsigned long)srng->base_vaddr_unaligned);
  146. ring_params.num_entries = num_entries;
  147. /* TODO: Check MSI support and get MSI settings from HIF layer */
  148. ring_params.msi_data = 0;
  149. ring_params.msi_addr = 0;
  150. /*
  151. * Setup interrupt timer and batch counter thresholds for
  152. * interrupt mitigation based on ring type
  153. */
  154. if (ring_type == REO_DST) {
  155. ring_params.intr_timer_thres_us =
  156. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  157. ring_params.intr_batch_cntr_thres_entries =
  158. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  159. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  160. ring_params.intr_timer_thres_us =
  161. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  162. ring_params.intr_batch_cntr_thres_entries =
  163. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  164. } else {
  165. ring_params.intr_timer_thres_us =
  166. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  167. ring_params.intr_batch_cntr_thres_entries =
  168. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  169. }
  170. /* TODO: Currently hal layer takes care of endianness related settings.
  171. * See if these settings need to passed from DP layer
  172. */
  173. ring_params.flags = 0;
  174. /* Enable low threshold interrupts for rx buffer rings (regular and
  175. * monitor buffer rings.
  176. * TODO: See if this is required for any other ring
  177. */
  178. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  179. /* TODO: Setting low threshold to 1/8th of ring size
  180. * see if this needs to be configurable
  181. */
  182. ring_params.low_threshold = num_entries >> 3;
  183. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  184. }
  185. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  186. mac_id, &ring_params);
  187. return 0;
  188. }
  189. /**
  190. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  191. * Any buffers allocated and attached to ring entries are expected to be freed
  192. * before calling this function.
  193. */
  194. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  195. int ring_type, int ring_num)
  196. {
  197. if (!srng->hal_srng) {
  198. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  199. FL("Ring type: %d, num:%d not setup"),
  200. ring_type, ring_num);
  201. return;
  202. }
  203. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  204. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  205. srng->alloc_size,
  206. srng->base_vaddr_unaligned,
  207. srng->base_paddr_unaligned, 0);
  208. }
  209. /* TODO: Need this interface from HIF */
  210. void *hif_get_hal_handle(void *hif_handle);
  211. /*
  212. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  213. * @dp_ctx: DP SOC handle
  214. * @budget: Number of frames/descriptors that can be processed in one shot
  215. *
  216. * Return: remaining budget/quota for the soc device
  217. */
  218. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  219. {
  220. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  221. struct dp_soc *soc = int_ctx->soc;
  222. int ring = 0;
  223. uint32_t work_done = 0;
  224. uint32_t budget = dp_budget;
  225. uint8_t tx_mask = int_ctx->tx_ring_mask;
  226. uint8_t rx_mask = int_ctx->rx_ring_mask;
  227. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  228. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  229. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  230. /* Process Tx completion interrupts first to return back buffers */
  231. if (tx_mask) {
  232. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  233. if (tx_mask & (1 << ring)) {
  234. work_done =
  235. dp_tx_comp_handler(soc, ring, budget);
  236. budget -= work_done;
  237. if (work_done)
  238. QDF_TRACE(QDF_MODULE_ID_DP,
  239. QDF_TRACE_LEVEL_INFO,
  240. "tx mask 0x%x ring %d,"
  241. "budget %d",
  242. tx_mask, ring, budget);
  243. if (budget <= 0)
  244. goto budget_done;
  245. }
  246. }
  247. }
  248. /* Process REO Exception ring interrupt */
  249. if (rx_err_mask) {
  250. work_done = dp_rx_err_process(soc,
  251. soc->reo_exception_ring.hal_srng, budget);
  252. budget -= work_done;
  253. if (work_done)
  254. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  255. "REO Exception Ring: work_done %d budget %d",
  256. work_done, budget);
  257. if (budget <= 0) {
  258. goto budget_done;
  259. }
  260. }
  261. /* Process Rx WBM release ring interrupt */
  262. if (rx_wbm_rel_mask) {
  263. work_done = dp_rx_wbm_err_process(soc,
  264. soc->rx_rel_ring.hal_srng, budget);
  265. budget -= work_done;
  266. if (work_done)
  267. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  268. "WBM Release Ring: work_done %d budget %d",
  269. work_done, budget);
  270. if (budget <= 0) {
  271. goto budget_done;
  272. }
  273. }
  274. /* Process Rx interrupts */
  275. if (rx_mask) {
  276. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  277. if (rx_mask & (1 << ring)) {
  278. work_done =
  279. dp_rx_process(int_ctx,
  280. soc->reo_dest_ring[ring].hal_srng,
  281. budget);
  282. budget -= work_done;
  283. if (work_done)
  284. QDF_TRACE(QDF_MODULE_ID_DP,
  285. QDF_TRACE_LEVEL_INFO,
  286. "rx mask 0x%x ring %d,"
  287. "budget %d",
  288. tx_mask, ring, budget);
  289. if (budget <= 0)
  290. goto budget_done;
  291. }
  292. }
  293. }
  294. if (reo_status_mask)
  295. dp_reo_status_ring_handler(soc);
  296. /* Process LMAC interrupts */
  297. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  298. if (soc->pdev_list[ring] == NULL)
  299. continue;
  300. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  301. work_done =
  302. dp_mon_process(soc, ring, budget);
  303. budget -= work_done;
  304. }
  305. if (int_ctx->rxdma2host_ring_mask & (1 << ring)) {
  306. work_done =
  307. dp_rxdma_err_process(soc, ring, budget);
  308. budget -= work_done;
  309. }
  310. }
  311. qdf_lro_flush(int_ctx->lro_ctx);
  312. budget_done:
  313. return dp_budget - budget;
  314. }
  315. /* dp_interrupt_timer()- timer poll for interrupts
  316. *
  317. * @arg: SoC Handle
  318. *
  319. * Return:
  320. *
  321. */
  322. #ifdef DP_INTR_POLL_BASED
  323. static void dp_interrupt_timer(void *arg)
  324. {
  325. struct dp_soc *soc = (struct dp_soc *) arg;
  326. int i;
  327. if (qdf_atomic_read(&soc->cmn_init_done)) {
  328. for (i = 0;
  329. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  330. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  331. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  332. }
  333. }
  334. /*
  335. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  336. * @txrx_soc: DP SOC handle
  337. *
  338. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  339. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  340. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  341. *
  342. * Return: 0 for success. nonzero for failure.
  343. */
  344. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  345. {
  346. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  347. int i;
  348. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  349. soc->intr_ctx[i].tx_ring_mask = 0xF;
  350. soc->intr_ctx[i].rx_ring_mask = 0xF;
  351. soc->intr_ctx[i].rx_mon_ring_mask = 0x1;
  352. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  353. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  354. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  355. soc->intr_ctx[i].rxdma2host_ring_mask = 0x1;
  356. soc->intr_ctx[i].soc = soc;
  357. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  358. }
  359. qdf_timer_init(soc->osdev, &soc->int_timer,
  360. dp_interrupt_timer, (void *)soc,
  361. QDF_TIMER_TYPE_WAKE_APPS);
  362. return QDF_STATUS_SUCCESS;
  363. }
  364. /*
  365. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  366. * @txrx_soc: DP SOC handle
  367. *
  368. * Return: void
  369. */
  370. static void dp_soc_interrupt_detach(void *txrx_soc)
  371. {
  372. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  373. int i;
  374. qdf_timer_stop(&soc->int_timer);
  375. qdf_timer_free(&soc->int_timer);
  376. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  377. soc->intr_ctx[i].tx_ring_mask = 0;
  378. soc->intr_ctx[i].rx_ring_mask = 0;
  379. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  380. soc->intr_ctx[i].rx_err_ring_mask = 0;
  381. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  382. soc->intr_ctx[i].reo_status_ring_mask = 0;
  383. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  384. }
  385. }
  386. #else
  387. /*
  388. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  389. * @txrx_soc: DP SOC handle
  390. *
  391. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  392. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  393. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  394. *
  395. * Return: 0 for success. nonzero for failure.
  396. */
  397. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  398. {
  399. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  400. int i = 0;
  401. int num_irq = 0;
  402. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  403. int j = 0;
  404. int ret = 0;
  405. /* Map of IRQ ids registered with one interrupt context */
  406. int irq_id_map[HIF_MAX_GRP_IRQ];
  407. int tx_mask =
  408. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  409. int rx_mask =
  410. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  411. int rx_mon_mask =
  412. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  413. int rx_err_ring_mask =
  414. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  415. int rx_wbm_rel_ring_mask =
  416. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  417. int reo_status_ring_mask =
  418. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  419. int rxdma2host_ring_mask =
  420. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  421. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  422. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  423. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  424. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  425. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  426. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  427. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  428. soc->intr_ctx[i].soc = soc;
  429. num_irq = 0;
  430. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  431. if (tx_mask & (1 << j)) {
  432. irq_id_map[num_irq++] =
  433. (wbm2host_tx_completions_ring1 - j);
  434. }
  435. if (rx_mask & (1 << j)) {
  436. irq_id_map[num_irq++] =
  437. (reo2host_destination_ring1 - j);
  438. }
  439. if (rxdma2host_ring_mask & (1 << j)) {
  440. irq_id_map[num_irq++] =
  441. rxdma2host_destination_ring_mac1 -
  442. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  443. }
  444. if (rx_mon_mask & (1 << j)) {
  445. irq_id_map[num_irq++] =
  446. ppdu_end_interrupts_mac1 -
  447. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  448. }
  449. if (rx_wbm_rel_ring_mask & (1 << j))
  450. irq_id_map[num_irq++] = wbm2host_rx_release;
  451. if (rx_err_ring_mask & (1 << j))
  452. irq_id_map[num_irq++] = reo2host_exception;
  453. if (reo_status_ring_mask & (1 << j))
  454. irq_id_map[num_irq++] = reo2host_status;
  455. }
  456. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  457. num_irq, irq_id_map,
  458. dp_service_srngs,
  459. &soc->intr_ctx[i]);
  460. if (ret) {
  461. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  462. FL("failed, ret = %d"), ret);
  463. return QDF_STATUS_E_FAILURE;
  464. }
  465. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  466. }
  467. hif_configure_ext_group_interrupts(soc->hif_handle);
  468. return QDF_STATUS_SUCCESS;
  469. }
  470. /*
  471. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  472. * @txrx_soc: DP SOC handle
  473. *
  474. * Return: void
  475. */
  476. static void dp_soc_interrupt_detach(void *txrx_soc)
  477. {
  478. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  479. int i;
  480. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  481. soc->intr_ctx[i].tx_ring_mask = 0;
  482. soc->intr_ctx[i].rx_ring_mask = 0;
  483. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  484. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  485. }
  486. }
  487. #endif
  488. #define AVG_MAX_MPDUS_PER_TID 128
  489. #define AVG_TIDS_PER_CLIENT 2
  490. #define AVG_FLOWS_PER_TID 2
  491. #define AVG_MSDUS_PER_FLOW 128
  492. #define AVG_MSDUS_PER_MPDU 4
  493. /*
  494. * Allocate and setup link descriptor pool that will be used by HW for
  495. * various link and queue descriptors and managed by WBM
  496. */
  497. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  498. {
  499. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  500. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  501. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  502. uint32_t num_mpdus_per_link_desc =
  503. hal_num_mpdus_per_link_desc(soc->hal_soc);
  504. uint32_t num_msdus_per_link_desc =
  505. hal_num_msdus_per_link_desc(soc->hal_soc);
  506. uint32_t num_mpdu_links_per_queue_desc =
  507. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  508. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  509. uint32_t total_link_descs, total_mem_size;
  510. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  511. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  512. uint32_t num_link_desc_banks;
  513. uint32_t last_bank_size = 0;
  514. uint32_t entry_size, num_entries;
  515. int i;
  516. /* Only Tx queue descriptors are allocated from common link descriptor
  517. * pool Rx queue descriptors are not included in this because (REO queue
  518. * extension descriptors) they are expected to be allocated contiguously
  519. * with REO queue descriptors
  520. */
  521. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  522. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  523. num_mpdu_queue_descs = num_mpdu_link_descs /
  524. num_mpdu_links_per_queue_desc;
  525. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  526. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  527. num_msdus_per_link_desc;
  528. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  529. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  530. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  531. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  532. /* Round up to power of 2 */
  533. total_link_descs = 1;
  534. while (total_link_descs < num_entries)
  535. total_link_descs <<= 1;
  536. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  537. FL("total_link_descs: %u, link_desc_size: %d"),
  538. total_link_descs, link_desc_size);
  539. total_mem_size = total_link_descs * link_desc_size;
  540. total_mem_size += link_desc_align;
  541. if (total_mem_size <= max_alloc_size) {
  542. num_link_desc_banks = 0;
  543. last_bank_size = total_mem_size;
  544. } else {
  545. num_link_desc_banks = (total_mem_size) /
  546. (max_alloc_size - link_desc_align);
  547. last_bank_size = total_mem_size %
  548. (max_alloc_size - link_desc_align);
  549. }
  550. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  551. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  552. total_mem_size, num_link_desc_banks);
  553. for (i = 0; i < num_link_desc_banks; i++) {
  554. soc->link_desc_banks[i].base_vaddr_unaligned =
  555. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  556. max_alloc_size,
  557. &(soc->link_desc_banks[i].base_paddr_unaligned));
  558. soc->link_desc_banks[i].size = max_alloc_size;
  559. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  560. soc->link_desc_banks[i].base_vaddr_unaligned) +
  561. ((unsigned long)(
  562. soc->link_desc_banks[i].base_vaddr_unaligned) %
  563. link_desc_align));
  564. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  565. soc->link_desc_banks[i].base_paddr_unaligned) +
  566. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  567. (unsigned long)(
  568. soc->link_desc_banks[i].base_vaddr_unaligned));
  569. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  570. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  571. FL("Link descriptor memory alloc failed"));
  572. goto fail;
  573. }
  574. }
  575. if (last_bank_size) {
  576. /* Allocate last bank in case total memory required is not exact
  577. * multiple of max_alloc_size
  578. */
  579. soc->link_desc_banks[i].base_vaddr_unaligned =
  580. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  581. last_bank_size,
  582. &(soc->link_desc_banks[i].base_paddr_unaligned));
  583. soc->link_desc_banks[i].size = last_bank_size;
  584. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  585. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  586. ((unsigned long)(
  587. soc->link_desc_banks[i].base_vaddr_unaligned) %
  588. link_desc_align));
  589. soc->link_desc_banks[i].base_paddr =
  590. (unsigned long)(
  591. soc->link_desc_banks[i].base_paddr_unaligned) +
  592. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  593. (unsigned long)(
  594. soc->link_desc_banks[i].base_vaddr_unaligned));
  595. }
  596. /* Allocate and setup link descriptor idle list for HW internal use */
  597. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  598. total_mem_size = entry_size * total_link_descs;
  599. if (total_mem_size <= max_alloc_size) {
  600. void *desc;
  601. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  602. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  603. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  604. FL("Link desc idle ring setup failed"));
  605. goto fail;
  606. }
  607. hal_srng_access_start_unlocked(soc->hal_soc,
  608. soc->wbm_idle_link_ring.hal_srng);
  609. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  610. soc->link_desc_banks[i].base_paddr; i++) {
  611. uint32_t num_entries = (soc->link_desc_banks[i].size -
  612. ((unsigned long)(
  613. soc->link_desc_banks[i].base_vaddr) -
  614. (unsigned long)(
  615. soc->link_desc_banks[i].base_vaddr_unaligned)))
  616. / link_desc_size;
  617. unsigned long paddr = (unsigned long)(
  618. soc->link_desc_banks[i].base_paddr);
  619. while (num_entries && (desc = hal_srng_src_get_next(
  620. soc->hal_soc,
  621. soc->wbm_idle_link_ring.hal_srng))) {
  622. hal_set_link_desc_addr(desc, i, paddr);
  623. num_entries--;
  624. paddr += link_desc_size;
  625. }
  626. }
  627. hal_srng_access_end_unlocked(soc->hal_soc,
  628. soc->wbm_idle_link_ring.hal_srng);
  629. } else {
  630. uint32_t num_scatter_bufs;
  631. uint32_t num_entries_per_buf;
  632. uint32_t rem_entries;
  633. uint8_t *scatter_buf_ptr;
  634. uint16_t scatter_buf_num;
  635. soc->wbm_idle_scatter_buf_size =
  636. hal_idle_list_scatter_buf_size(soc->hal_soc);
  637. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  638. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  639. num_scatter_bufs = (total_mem_size /
  640. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  641. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  642. for (i = 0; i < num_scatter_bufs; i++) {
  643. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  644. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  645. soc->wbm_idle_scatter_buf_size,
  646. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  647. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  648. QDF_TRACE(QDF_MODULE_ID_DP,
  649. QDF_TRACE_LEVEL_ERROR,
  650. FL("Scatter list memory alloc failed"));
  651. goto fail;
  652. }
  653. }
  654. /* Populate idle list scatter buffers with link descriptor
  655. * pointers
  656. */
  657. scatter_buf_num = 0;
  658. scatter_buf_ptr = (uint8_t *)(
  659. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  660. rem_entries = num_entries_per_buf;
  661. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  662. soc->link_desc_banks[i].base_paddr; i++) {
  663. uint32_t num_link_descs =
  664. (soc->link_desc_banks[i].size -
  665. ((unsigned long)(
  666. soc->link_desc_banks[i].base_vaddr) -
  667. (unsigned long)(
  668. soc->link_desc_banks[i].base_vaddr_unaligned)))
  669. / link_desc_size;
  670. unsigned long paddr = (unsigned long)(
  671. soc->link_desc_banks[i].base_paddr);
  672. void *desc = NULL;
  673. while (num_link_descs && (desc =
  674. hal_srng_src_get_next(soc->hal_soc,
  675. soc->wbm_idle_link_ring.hal_srng))) {
  676. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  677. i, paddr);
  678. num_link_descs--;
  679. paddr += link_desc_size;
  680. if (rem_entries) {
  681. rem_entries--;
  682. scatter_buf_ptr += link_desc_size;
  683. } else {
  684. rem_entries = num_entries_per_buf;
  685. scatter_buf_num++;
  686. scatter_buf_ptr = (uint8_t *)(
  687. soc->wbm_idle_scatter_buf_base_vaddr[
  688. scatter_buf_num]);
  689. }
  690. }
  691. }
  692. /* Setup link descriptor idle list in HW */
  693. hal_setup_link_idle_list(soc->hal_soc,
  694. soc->wbm_idle_scatter_buf_base_paddr,
  695. soc->wbm_idle_scatter_buf_base_vaddr,
  696. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  697. (uint32_t)(scatter_buf_ptr -
  698. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  699. scatter_buf_num])));
  700. }
  701. return 0;
  702. fail:
  703. if (soc->wbm_idle_link_ring.hal_srng) {
  704. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  705. WBM_IDLE_LINK, 0);
  706. }
  707. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  708. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  709. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  710. soc->wbm_idle_scatter_buf_size,
  711. soc->wbm_idle_scatter_buf_base_vaddr[i],
  712. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  713. }
  714. }
  715. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  716. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  717. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  718. soc->link_desc_banks[i].size,
  719. soc->link_desc_banks[i].base_vaddr_unaligned,
  720. soc->link_desc_banks[i].base_paddr_unaligned,
  721. 0);
  722. }
  723. }
  724. return QDF_STATUS_E_FAILURE;
  725. }
  726. #ifdef notused
  727. /*
  728. * Free link descriptor pool that was setup HW
  729. */
  730. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  731. {
  732. int i;
  733. if (soc->wbm_idle_link_ring.hal_srng) {
  734. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  735. WBM_IDLE_LINK, 0);
  736. }
  737. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  738. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  739. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  740. soc->wbm_idle_scatter_buf_size,
  741. soc->wbm_idle_scatter_buf_base_vaddr[i],
  742. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  743. }
  744. }
  745. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  746. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  747. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  748. soc->link_desc_banks[i].size,
  749. soc->link_desc_banks[i].base_vaddr_unaligned,
  750. soc->link_desc_banks[i].base_paddr_unaligned,
  751. 0);
  752. }
  753. }
  754. }
  755. #endif /* notused */
  756. /* TODO: Following should be configurable */
  757. #define WBM_RELEASE_RING_SIZE 64
  758. #define TCL_DATA_RING_SIZE 512
  759. #define TX_COMP_RING_SIZE 1024
  760. #define TCL_CMD_RING_SIZE 32
  761. #define TCL_STATUS_RING_SIZE 32
  762. #define REO_DST_RING_SIZE 2048
  763. #define REO_REINJECT_RING_SIZE 32
  764. #define RX_RELEASE_RING_SIZE 1024
  765. #define REO_EXCEPTION_RING_SIZE 128
  766. #define REO_CMD_RING_SIZE 32
  767. #define REO_STATUS_RING_SIZE 32
  768. #define RXDMA_BUF_RING_SIZE 1024
  769. #define RXDMA_REFILL_RING_SIZE 2048
  770. #define RXDMA_MONITOR_BUF_RING_SIZE 1024
  771. #define RXDMA_MONITOR_DST_RING_SIZE 1024
  772. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  773. #define RXDMA_MONITOR_DESC_RING_SIZE 1024
  774. #define RXDMA_ERR_DST_RING_SIZE 1024
  775. /*
  776. * dp_soc_cmn_setup() - Common SoC level initializion
  777. * @soc: Datapath SOC handle
  778. *
  779. * This is an internal function used to setup common SOC data structures,
  780. * to be called from PDEV attach after receiving HW mode capabilities from FW
  781. */
  782. static int dp_soc_cmn_setup(struct dp_soc *soc)
  783. {
  784. int i;
  785. struct hal_reo_params reo_params;
  786. if (qdf_atomic_read(&soc->cmn_init_done))
  787. return 0;
  788. if (dp_peer_find_attach(soc))
  789. goto fail0;
  790. if (dp_hw_link_desc_pool_setup(soc))
  791. goto fail1;
  792. /* Setup SRNG rings */
  793. /* Common rings */
  794. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  795. WBM_RELEASE_RING_SIZE)) {
  796. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  797. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  798. goto fail1;
  799. }
  800. soc->num_tcl_data_rings = 0;
  801. /* Tx data rings */
  802. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  803. soc->num_tcl_data_rings =
  804. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  805. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  806. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  807. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  808. QDF_TRACE(QDF_MODULE_ID_DP,
  809. QDF_TRACE_LEVEL_ERROR,
  810. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  811. goto fail1;
  812. }
  813. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  814. WBM2SW_RELEASE, i, 0, TX_COMP_RING_SIZE)) {
  815. QDF_TRACE(QDF_MODULE_ID_DP,
  816. QDF_TRACE_LEVEL_ERROR,
  817. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  818. goto fail1;
  819. }
  820. }
  821. } else {
  822. /* This will be incremented during per pdev ring setup */
  823. soc->num_tcl_data_rings = 0;
  824. }
  825. if (dp_tx_soc_attach(soc)) {
  826. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  827. FL("dp_tx_soc_attach failed"));
  828. goto fail1;
  829. }
  830. /* TCL command and status rings */
  831. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  832. TCL_CMD_RING_SIZE)) {
  833. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  834. FL("dp_srng_setup failed for tcl_cmd_ring"));
  835. goto fail1;
  836. }
  837. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  838. TCL_STATUS_RING_SIZE)) {
  839. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  840. FL("dp_srng_setup failed for tcl_status_ring"));
  841. goto fail1;
  842. }
  843. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  844. * descriptors
  845. */
  846. /* Rx data rings */
  847. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  848. soc->num_reo_dest_rings =
  849. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  850. QDF_TRACE(QDF_MODULE_ID_DP,
  851. QDF_TRACE_LEVEL_ERROR,
  852. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  853. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  854. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  855. i, 0, REO_DST_RING_SIZE)) {
  856. QDF_TRACE(QDF_MODULE_ID_DP,
  857. QDF_TRACE_LEVEL_ERROR,
  858. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  859. goto fail1;
  860. }
  861. }
  862. } else {
  863. /* This will be incremented during per pdev ring setup */
  864. soc->num_reo_dest_rings = 0;
  865. }
  866. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  867. /* REO reinjection ring */
  868. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  869. REO_REINJECT_RING_SIZE)) {
  870. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  871. FL("dp_srng_setup failed for reo_reinject_ring"));
  872. goto fail1;
  873. }
  874. /* Rx release ring */
  875. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  876. RX_RELEASE_RING_SIZE)) {
  877. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  878. FL("dp_srng_setup failed for rx_rel_ring"));
  879. goto fail1;
  880. }
  881. /* Rx exception ring */
  882. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  883. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  884. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  885. FL("dp_srng_setup failed for reo_exception_ring"));
  886. goto fail1;
  887. }
  888. /* REO command and status rings */
  889. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  890. REO_CMD_RING_SIZE)) {
  891. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  892. FL("dp_srng_setup failed for reo_cmd_ring"));
  893. goto fail1;
  894. }
  895. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  896. TAILQ_INIT(&soc->rx.reo_cmd_list);
  897. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  898. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  899. REO_STATUS_RING_SIZE)) {
  900. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  901. FL("dp_srng_setup failed for reo_status_ring"));
  902. goto fail1;
  903. }
  904. /* Setup HW REO */
  905. qdf_mem_zero(&reo_params, sizeof(reo_params));
  906. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx))
  907. reo_params.rx_hash_enabled = true;
  908. hal_reo_setup(soc->hal_soc, &reo_params);
  909. qdf_atomic_set(&soc->cmn_init_done, 1);
  910. qdf_nbuf_queue_init(&soc->htt_stats_msg);
  911. return 0;
  912. fail1:
  913. /*
  914. * Cleanup will be done as part of soc_detach, which will
  915. * be called on pdev attach failure
  916. */
  917. fail0:
  918. return QDF_STATUS_E_FAILURE;
  919. }
  920. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  921. static void dp_lro_hash_setup(struct dp_soc *soc)
  922. {
  923. struct cdp_lro_hash_config lro_hash;
  924. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  925. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  926. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  927. FL("LRO disabled RX hash disabled"));
  928. return;
  929. }
  930. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  931. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  932. lro_hash.lro_enable = 1;
  933. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  934. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  935. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  936. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  937. }
  938. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, FL("enabled"));
  939. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  940. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  941. LRO_IPV4_SEED_ARR_SZ));
  942. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  943. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  944. LRO_IPV6_SEED_ARR_SZ));
  945. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  946. "lro_hash: lro_enable: 0x%x"
  947. "lro_hash: tcp_flag 0x%x tcp_flag_mask 0x%x",
  948. lro_hash.lro_enable, lro_hash.tcp_flag,
  949. lro_hash.tcp_flag_mask);
  950. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  951. FL("lro_hash: toeplitz_hash_ipv4:"));
  952. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  953. QDF_TRACE_LEVEL_ERROR,
  954. (void *)lro_hash.toeplitz_hash_ipv4,
  955. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  956. LRO_IPV4_SEED_ARR_SZ));
  957. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  958. FL("lro_hash: toeplitz_hash_ipv6:"));
  959. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  960. QDF_TRACE_LEVEL_ERROR,
  961. (void *)lro_hash.toeplitz_hash_ipv6,
  962. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  963. LRO_IPV6_SEED_ARR_SZ));
  964. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  965. if (soc->cdp_soc.ol_ops->lro_hash_config)
  966. (void)soc->cdp_soc.ol_ops->lro_hash_config
  967. (soc->osif_soc, &lro_hash);
  968. }
  969. /*
  970. * dp_rxdma_ring_setup() - configure the RX DMA rings
  971. * @soc: data path SoC handle
  972. * @pdev: Physical device handle
  973. *
  974. * Return: 0 - success, > 0 - failure
  975. */
  976. #ifdef QCA_HOST2FW_RXBUF_RING
  977. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  978. struct dp_pdev *pdev)
  979. {
  980. int max_mac_rings =
  981. wlan_cfg_get_num_mac_rings
  982. (pdev->wlan_cfg_ctx);
  983. int i;
  984. for (i = 0; i < max_mac_rings; i++) {
  985. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  986. "%s: pdev_id %d mac_id %d\n",
  987. __func__, pdev->pdev_id, i);
  988. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  989. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  990. QDF_TRACE(QDF_MODULE_ID_DP,
  991. QDF_TRACE_LEVEL_ERROR,
  992. FL("failed rx mac ring setup"));
  993. return QDF_STATUS_E_FAILURE;
  994. }
  995. }
  996. return QDF_STATUS_SUCCESS;
  997. }
  998. #else
  999. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1000. struct dp_pdev *pdev)
  1001. {
  1002. return QDF_STATUS_SUCCESS;
  1003. }
  1004. #endif
  1005. /**
  1006. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  1007. * @pdev - DP_PDEV handle
  1008. *
  1009. * Return: void
  1010. */
  1011. static inline void
  1012. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1013. {
  1014. uint8_t map_id;
  1015. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1016. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  1017. sizeof(default_dscp_tid_map));
  1018. }
  1019. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  1020. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  1021. pdev->dscp_tid_map[map_id],
  1022. map_id);
  1023. }
  1024. }
  1025. /*
  1026. * dp_pdev_attach_wifi3() - attach txrx pdev
  1027. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  1028. * @txrx_soc: Datapath SOC handle
  1029. * @htc_handle: HTC handle for host-target interface
  1030. * @qdf_osdev: QDF OS device
  1031. * @pdev_id: PDEV ID
  1032. *
  1033. * Return: DP PDEV handle on success, NULL on failure
  1034. */
  1035. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  1036. struct cdp_cfg *ctrl_pdev,
  1037. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  1038. {
  1039. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1040. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  1041. if (!pdev) {
  1042. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1043. FL("DP PDEV memory allocation failed"));
  1044. goto fail0;
  1045. }
  1046. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  1047. if (!pdev->wlan_cfg_ctx) {
  1048. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1049. FL("pdev cfg_attach failed"));
  1050. qdf_mem_free(pdev);
  1051. goto fail0;
  1052. }
  1053. /*
  1054. * set nss pdev config based on soc config
  1055. */
  1056. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  1057. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev->pdev_id)));
  1058. pdev->soc = soc;
  1059. pdev->osif_pdev = ctrl_pdev;
  1060. pdev->pdev_id = pdev_id;
  1061. soc->pdev_list[pdev_id] = pdev;
  1062. soc->pdev_count++;
  1063. TAILQ_INIT(&pdev->vdev_list);
  1064. pdev->vdev_count = 0;
  1065. qdf_spinlock_create(&pdev->tx_mutex);
  1066. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  1067. TAILQ_INIT(&pdev->neighbour_peers_list);
  1068. if (dp_soc_cmn_setup(soc)) {
  1069. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1070. FL("dp_soc_cmn_setup failed"));
  1071. goto fail1;
  1072. }
  1073. /* Setup per PDEV TCL rings if configured */
  1074. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1075. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  1076. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  1077. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1078. FL("dp_srng_setup failed for tcl_data_ring"));
  1079. goto fail1;
  1080. }
  1081. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  1082. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  1083. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1084. FL("dp_srng_setup failed for tx_comp_ring"));
  1085. goto fail1;
  1086. }
  1087. soc->num_tcl_data_rings++;
  1088. }
  1089. /* Tx specific init */
  1090. if (dp_tx_pdev_attach(pdev)) {
  1091. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1092. FL("dp_tx_pdev_attach failed"));
  1093. goto fail1;
  1094. }
  1095. /* Setup per PDEV REO rings if configured */
  1096. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1097. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  1098. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  1099. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1100. FL("dp_srng_setup failed for reo_dest_ringn"));
  1101. goto fail1;
  1102. }
  1103. soc->num_reo_dest_rings++;
  1104. }
  1105. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  1106. RXDMA_REFILL_RING_SIZE)) {
  1107. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1108. FL("dp_srng_setup failed rx refill ring"));
  1109. goto fail1;
  1110. }
  1111. if (dp_rxdma_ring_setup(soc, pdev)) {
  1112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1113. FL("RXDMA ring config failed"));
  1114. goto fail1;
  1115. }
  1116. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  1117. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  1118. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1119. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  1120. goto fail1;
  1121. }
  1122. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  1123. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  1124. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1125. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  1126. goto fail1;
  1127. }
  1128. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  1129. RXDMA_MONITOR_STATUS, 0, pdev_id,
  1130. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  1131. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1132. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  1133. goto fail1;
  1134. }
  1135. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  1136. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  1137. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1138. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  1139. goto fail1;
  1140. }
  1141. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring, RXDMA_DST, 0,
  1142. pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  1143. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1144. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  1145. goto fail1;
  1146. }
  1147. /* Rx specific init */
  1148. if (dp_rx_pdev_attach(pdev)) {
  1149. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1150. FL("dp_rx_pdev_attach failed "));
  1151. goto fail0;
  1152. }
  1153. DP_STATS_INIT(pdev);
  1154. #ifndef CONFIG_WIN
  1155. /* MCL */
  1156. dp_local_peer_id_pool_init(pdev);
  1157. #endif
  1158. dp_dscp_tid_map_setup(pdev);
  1159. /* Rx monitor mode specific init */
  1160. if (dp_rx_pdev_mon_attach(pdev)) {
  1161. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1162. "dp_rx_pdev_attach failed\n");
  1163. goto fail1;
  1164. }
  1165. if (dp_wdi_event_attach(pdev)) {
  1166. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1167. "dp_wdi_evet_attach failed\n");
  1168. goto fail1;
  1169. }
  1170. /* set the reo destination to 1 during initialization */
  1171. pdev->reo_dest = 1;
  1172. return (struct cdp_pdev *)pdev;
  1173. fail1:
  1174. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  1175. fail0:
  1176. return NULL;
  1177. }
  1178. /*
  1179. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  1180. * @soc: data path SoC handle
  1181. * @pdev: Physical device handle
  1182. *
  1183. * Return: void
  1184. */
  1185. #ifdef QCA_HOST2FW_RXBUF_RING
  1186. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1187. struct dp_pdev *pdev)
  1188. {
  1189. int max_mac_rings =
  1190. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  1191. int i;
  1192. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  1193. max_mac_rings : MAX_RX_MAC_RINGS;
  1194. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  1195. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  1196. RXDMA_BUF, 1);
  1197. }
  1198. #else
  1199. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1200. struct dp_pdev *pdev)
  1201. {
  1202. }
  1203. #endif
  1204. /*
  1205. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  1206. * @pdev: device object
  1207. *
  1208. * Return: void
  1209. */
  1210. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  1211. {
  1212. struct dp_neighbour_peer *peer = NULL;
  1213. struct dp_neighbour_peer *temp_peer = NULL;
  1214. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  1215. neighbour_peer_list_elem, temp_peer) {
  1216. /* delete this peer from the list */
  1217. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  1218. peer, neighbour_peer_list_elem);
  1219. qdf_mem_free(peer);
  1220. }
  1221. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  1222. }
  1223. /*
  1224. * dp_pdev_detach_wifi3() - detach txrx pdev
  1225. * @txrx_pdev: Datapath PDEV handle
  1226. * @force: Force detach
  1227. *
  1228. */
  1229. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  1230. {
  1231. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1232. struct dp_soc *soc = pdev->soc;
  1233. dp_wdi_event_detach(pdev);
  1234. dp_tx_pdev_detach(pdev);
  1235. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1236. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  1237. TCL_DATA, pdev->pdev_id);
  1238. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  1239. WBM2SW_RELEASE, pdev->pdev_id);
  1240. }
  1241. dp_rx_pdev_detach(pdev);
  1242. dp_rx_pdev_mon_detach(pdev);
  1243. dp_neighbour_peers_detach(pdev);
  1244. qdf_spinlock_destroy(&pdev->tx_mutex);
  1245. /* Setup per PDEV REO rings if configured */
  1246. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1247. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  1248. REO_DST, pdev->pdev_id);
  1249. }
  1250. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  1251. dp_rxdma_ring_cleanup(soc, pdev);
  1252. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  1253. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  1254. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  1255. RXDMA_MONITOR_STATUS, 0);
  1256. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  1257. RXDMA_MONITOR_DESC, 0);
  1258. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring, RXDMA_DST, 0);
  1259. soc->pdev_list[pdev->pdev_id] = NULL;
  1260. soc->pdev_count--;
  1261. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  1262. qdf_mem_free(pdev);
  1263. }
  1264. /*
  1265. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  1266. * @soc: DP SOC handle
  1267. */
  1268. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  1269. {
  1270. struct reo_desc_list_node *desc;
  1271. struct dp_rx_tid *rx_tid;
  1272. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  1273. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  1274. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1275. rx_tid = &desc->rx_tid;
  1276. qdf_mem_unmap_nbytes_single(soc->osdev,
  1277. rx_tid->hw_qdesc_paddr,
  1278. QDF_DMA_BIDIRECTIONAL,
  1279. rx_tid->hw_qdesc_alloc_size);
  1280. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  1281. qdf_mem_free(desc);
  1282. }
  1283. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  1284. qdf_list_destroy(&soc->reo_desc_freelist);
  1285. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  1286. }
  1287. /*
  1288. * dp_soc_detach_wifi3() - Detach txrx SOC
  1289. * @txrx_soc: DP SOC handle
  1290. *
  1291. */
  1292. static void dp_soc_detach_wifi3(void *txrx_soc)
  1293. {
  1294. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1295. int i;
  1296. qdf_atomic_set(&soc->cmn_init_done, 0);
  1297. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1298. if (soc->pdev_list[i])
  1299. dp_pdev_detach_wifi3(
  1300. (struct cdp_pdev *)soc->pdev_list[i], 1);
  1301. }
  1302. dp_peer_find_detach(soc);
  1303. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  1304. * SW descriptors
  1305. */
  1306. /* Free the ring memories */
  1307. /* Common rings */
  1308. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  1309. dp_tx_soc_detach(soc);
  1310. /* Tx data rings */
  1311. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1312. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1313. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  1314. TCL_DATA, i);
  1315. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  1316. WBM2SW_RELEASE, i);
  1317. }
  1318. }
  1319. /* TCL command and status rings */
  1320. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  1321. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  1322. /* Rx data rings */
  1323. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1324. soc->num_reo_dest_rings =
  1325. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1326. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1327. /* TODO: Get number of rings and ring sizes
  1328. * from wlan_cfg
  1329. */
  1330. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  1331. REO_DST, i);
  1332. }
  1333. }
  1334. /* REO reinjection ring */
  1335. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  1336. /* Rx release ring */
  1337. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  1338. /* Rx exception ring */
  1339. /* TODO: Better to store ring_type and ring_num in
  1340. * dp_srng during setup
  1341. */
  1342. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  1343. /* REO command and status rings */
  1344. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  1345. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  1346. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  1347. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  1348. htt_soc_detach(soc->htt_handle);
  1349. dp_reo_desc_freelist_destroy(soc);
  1350. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  1351. qdf_mem_free(soc);
  1352. }
  1353. /*
  1354. * dp_rxdma_ring_config() - configure the RX DMA rings
  1355. *
  1356. * This function is used to configure the MAC rings.
  1357. * On MCL host provides buffers in Host2FW ring
  1358. * FW refills (copies) buffers to the ring and updates
  1359. * ring_idx in register
  1360. *
  1361. * @soc: data path SoC handle
  1362. * @pdev: Physical device handle
  1363. *
  1364. * Return: void
  1365. */
  1366. #ifdef QCA_HOST2FW_RXBUF_RING
  1367. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1368. {
  1369. int i;
  1370. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1371. struct dp_pdev *pdev = soc->pdev_list[i];
  1372. if (pdev) {
  1373. int mac_id = 0;
  1374. int j;
  1375. bool dbs_enable = 0;
  1376. int max_mac_rings =
  1377. wlan_cfg_get_num_mac_rings
  1378. (pdev->wlan_cfg_ctx);
  1379. htt_srng_setup(soc->htt_handle, 0,
  1380. pdev->rx_refill_buf_ring.hal_srng,
  1381. RXDMA_BUF);
  1382. if (soc->cdp_soc.ol_ops->
  1383. is_hw_dbs_2x2_capable) {
  1384. dbs_enable = soc->cdp_soc.ol_ops->
  1385. is_hw_dbs_2x2_capable(soc->psoc);
  1386. }
  1387. if (dbs_enable) {
  1388. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1389. QDF_TRACE_LEVEL_ERROR,
  1390. FL("DBS enabled max_mac_rings %d\n"),
  1391. max_mac_rings);
  1392. } else {
  1393. max_mac_rings = 1;
  1394. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1395. QDF_TRACE_LEVEL_ERROR,
  1396. FL("DBS disabled, max_mac_rings %d\n"),
  1397. max_mac_rings);
  1398. }
  1399. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1400. FL("pdev_id %d max_mac_rings %d\n"),
  1401. pdev->pdev_id, max_mac_rings);
  1402. for (j = 0; j < max_mac_rings; j++) {
  1403. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1404. QDF_TRACE_LEVEL_ERROR,
  1405. FL("mac_id %d\n"), mac_id);
  1406. htt_srng_setup(soc->htt_handle, mac_id,
  1407. pdev->rx_mac_buf_ring[j]
  1408. .hal_srng,
  1409. RXDMA_BUF);
  1410. mac_id++;
  1411. }
  1412. /* Configure monitor mode rings */
  1413. htt_srng_setup(soc->htt_handle, i,
  1414. pdev->rxdma_mon_buf_ring.hal_srng,
  1415. RXDMA_MONITOR_BUF);
  1416. htt_srng_setup(soc->htt_handle, i,
  1417. pdev->rxdma_mon_dst_ring.hal_srng,
  1418. RXDMA_MONITOR_DST);
  1419. htt_srng_setup(soc->htt_handle, i,
  1420. pdev->rxdma_mon_status_ring.hal_srng,
  1421. RXDMA_MONITOR_STATUS);
  1422. htt_srng_setup(soc->htt_handle, i,
  1423. pdev->rxdma_mon_desc_ring.hal_srng,
  1424. RXDMA_MONITOR_DESC);
  1425. htt_srng_setup(soc->htt_handle, i,
  1426. pdev->rxdma_err_dst_ring.hal_srng,
  1427. RXDMA_DST);
  1428. }
  1429. }
  1430. }
  1431. #else
  1432. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1433. {
  1434. int i;
  1435. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1436. struct dp_pdev *pdev = soc->pdev_list[i];
  1437. if (pdev) {
  1438. htt_srng_setup(soc->htt_handle, i,
  1439. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  1440. htt_srng_setup(soc->htt_handle, i,
  1441. pdev->rxdma_mon_buf_ring.hal_srng,
  1442. RXDMA_MONITOR_BUF);
  1443. htt_srng_setup(soc->htt_handle, i,
  1444. pdev->rxdma_mon_dst_ring.hal_srng,
  1445. RXDMA_MONITOR_DST);
  1446. htt_srng_setup(soc->htt_handle, i,
  1447. pdev->rxdma_mon_status_ring.hal_srng,
  1448. RXDMA_MONITOR_STATUS);
  1449. htt_srng_setup(soc->htt_handle, i,
  1450. pdev->rxdma_mon_desc_ring.hal_srng,
  1451. RXDMA_MONITOR_DESC);
  1452. htt_srng_setup(soc->htt_handle, i,
  1453. pdev->rxdma_err_dst_ring.hal_srng,
  1454. RXDMA_DST);
  1455. }
  1456. }
  1457. }
  1458. #endif
  1459. /*
  1460. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  1461. * @txrx_soc: Datapath SOC handle
  1462. */
  1463. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  1464. {
  1465. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  1466. htt_soc_attach_target(soc->htt_handle);
  1467. dp_rxdma_ring_config(soc);
  1468. DP_STATS_INIT(soc);
  1469. return 0;
  1470. }
  1471. /*
  1472. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  1473. * @txrx_soc: Datapath SOC handle
  1474. */
  1475. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  1476. {
  1477. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  1478. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  1479. }
  1480. /*
  1481. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  1482. * @txrx_soc: Datapath SOC handle
  1483. * @nss_cfg: nss config
  1484. */
  1485. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  1486. {
  1487. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  1488. wlan_cfg_set_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx, config);
  1489. if (config) {
  1490. /*
  1491. * disable dp interrupt if nss enabled
  1492. */
  1493. wlan_cfg_set_num_contexts(dsoc->wlan_cfg_ctx, 0);
  1494. }
  1495. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1496. FL("nss-wifi<0> nss config is enabled"));
  1497. }
  1498. /*
  1499. * dp_vdev_attach_wifi3() - attach txrx vdev
  1500. * @txrx_pdev: Datapath PDEV handle
  1501. * @vdev_mac_addr: MAC address of the virtual interface
  1502. * @vdev_id: VDEV Id
  1503. * @wlan_op_mode: VDEV operating mode
  1504. *
  1505. * Return: DP VDEV handle on success, NULL on failure
  1506. */
  1507. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  1508. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1509. {
  1510. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1511. struct dp_soc *soc = pdev->soc;
  1512. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1513. if (!vdev) {
  1514. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1515. FL("DP VDEV memory allocation failed"));
  1516. goto fail0;
  1517. }
  1518. vdev->pdev = pdev;
  1519. vdev->vdev_id = vdev_id;
  1520. vdev->opmode = op_mode;
  1521. vdev->osdev = soc->osdev;
  1522. vdev->osif_rx = NULL;
  1523. vdev->osif_rsim_rx_decap = NULL;
  1524. vdev->osif_rx_mon = NULL;
  1525. vdev->osif_tx_free_ext = NULL;
  1526. vdev->osif_vdev = NULL;
  1527. vdev->delete.pending = 0;
  1528. vdev->safemode = 0;
  1529. vdev->drop_unenc = 1;
  1530. #ifdef notyet
  1531. vdev->filters_num = 0;
  1532. #endif
  1533. qdf_mem_copy(
  1534. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1535. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1536. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1537. vdev->dscp_tid_map_id = 0;
  1538. vdev->mcast_enhancement_en = 0;
  1539. /* TODO: Initialize default HTT meta data that will be used in
  1540. * TCL descriptors for packets transmitted from this VDEV
  1541. */
  1542. TAILQ_INIT(&vdev->peer_list);
  1543. /* add this vdev into the pdev's list */
  1544. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1545. pdev->vdev_count++;
  1546. dp_tx_vdev_attach(vdev);
  1547. #ifdef DP_INTR_POLL_BASED
  1548. if (wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  1549. if (pdev->vdev_count == 1)
  1550. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1551. }
  1552. #endif
  1553. dp_lro_hash_setup(soc);
  1554. /* LRO */
  1555. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1556. wlan_op_mode_sta == vdev->opmode)
  1557. vdev->lro_enable = true;
  1558. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1559. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  1560. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1561. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1562. DP_STATS_INIT(vdev);
  1563. return (struct cdp_vdev *)vdev;
  1564. fail0:
  1565. return NULL;
  1566. }
  1567. /**
  1568. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1569. * @vdev: Datapath VDEV handle
  1570. * @osif_vdev: OSIF vdev handle
  1571. * @txrx_ops: Tx and Rx operations
  1572. *
  1573. * Return: DP VDEV handle on success, NULL on failure
  1574. */
  1575. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  1576. void *osif_vdev,
  1577. struct ol_txrx_ops *txrx_ops)
  1578. {
  1579. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1580. vdev->osif_vdev = osif_vdev;
  1581. vdev->osif_rx = txrx_ops->rx.rx;
  1582. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1583. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1584. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  1585. #ifdef notyet
  1586. #if ATH_SUPPORT_WAPI
  1587. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1588. #endif
  1589. #endif
  1590. #ifdef UMAC_SUPPORT_PROXY_ARP
  1591. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1592. #endif
  1593. vdev->me_convert = txrx_ops->me_convert;
  1594. /* TODO: Enable the following once Tx code is integrated */
  1595. txrx_ops->tx.tx = dp_tx_send;
  1596. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1597. "DP Vdev Register success");
  1598. }
  1599. /*
  1600. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1601. * @txrx_vdev: Datapath VDEV handle
  1602. * @callback: Callback OL_IF on completion of detach
  1603. * @cb_context: Callback context
  1604. *
  1605. */
  1606. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  1607. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1608. {
  1609. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1610. struct dp_pdev *pdev = vdev->pdev;
  1611. struct dp_soc *soc = pdev->soc;
  1612. /* preconditions */
  1613. qdf_assert(vdev);
  1614. /* remove the vdev from its parent pdev's list */
  1615. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1616. /*
  1617. * Use peer_ref_mutex while accessing peer_list, in case
  1618. * a peer is in the process of being removed from the list.
  1619. */
  1620. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1621. /* check that the vdev has no peers allocated */
  1622. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1623. /* debug print - will be removed later */
  1624. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1625. FL("not deleting vdev object %p (%pM)"
  1626. "until deletion finishes for all its peers"),
  1627. vdev, vdev->mac_addr.raw);
  1628. /* indicate that the vdev needs to be deleted */
  1629. vdev->delete.pending = 1;
  1630. vdev->delete.callback = callback;
  1631. vdev->delete.context = cb_context;
  1632. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1633. return;
  1634. }
  1635. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1636. dp_tx_vdev_detach(vdev);
  1637. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1638. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1639. qdf_mem_free(vdev);
  1640. if (callback)
  1641. callback(cb_context);
  1642. }
  1643. /*
  1644. * dp_peer_create_wifi3() - attach txrx peer
  1645. * @txrx_vdev: Datapath VDEV handle
  1646. * @peer_mac_addr: Peer MAC address
  1647. *
  1648. * Return: DP peeer handle on success, NULL on failure
  1649. */
  1650. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  1651. uint8_t *peer_mac_addr)
  1652. {
  1653. struct dp_peer *peer;
  1654. int i;
  1655. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1656. struct dp_pdev *pdev;
  1657. struct dp_soc *soc;
  1658. /* preconditions */
  1659. qdf_assert(vdev);
  1660. qdf_assert(peer_mac_addr);
  1661. pdev = vdev->pdev;
  1662. soc = pdev->soc;
  1663. #ifdef notyet
  1664. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1665. soc->mempool_ol_ath_peer);
  1666. #else
  1667. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1668. #endif
  1669. if (!peer)
  1670. return NULL; /* failure */
  1671. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1672. TAILQ_INIT(&peer->ast_entry_list);
  1673. qdf_mem_copy(&peer->self_ast_entry.mac_addr, peer_mac_addr,
  1674. DP_MAC_ADDR_LEN);
  1675. peer->self_ast_entry.peer = peer;
  1676. TAILQ_INSERT_TAIL(&peer->ast_entry_list, &peer->self_ast_entry,
  1677. ast_entry_elem);
  1678. qdf_spinlock_create(&peer->peer_info_lock);
  1679. /* store provided params */
  1680. peer->vdev = vdev;
  1681. qdf_mem_copy(
  1682. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1683. /* TODO: See of rx_opt_proc is really required */
  1684. peer->rx_opt_proc = soc->rx_opt_proc;
  1685. /* initialize the peer_id */
  1686. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1687. peer->peer_ids[i] = HTT_INVALID_PEER;
  1688. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1689. qdf_atomic_init(&peer->ref_cnt);
  1690. /* keep one reference for attach */
  1691. qdf_atomic_inc(&peer->ref_cnt);
  1692. /* add this peer into the vdev's list */
  1693. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1694. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1695. /* TODO: See if hash based search is required */
  1696. dp_peer_find_hash_add(soc, peer);
  1697. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1698. "vdev %p created peer %p (%pM) ref_cnt: %d",
  1699. vdev, peer, peer->mac_addr.raw,
  1700. qdf_atomic_read(&peer->ref_cnt));
  1701. /*
  1702. * For every peer MAp message search and set if bss_peer
  1703. */
  1704. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1705. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1706. "vdev bss_peer!!!!");
  1707. peer->bss_peer = 1;
  1708. vdev->vap_bss_peer = peer;
  1709. }
  1710. #ifndef CONFIG_WIN
  1711. dp_local_peer_id_alloc(pdev, peer);
  1712. #endif
  1713. DP_STATS_INIT(peer);
  1714. return (void *)peer;
  1715. }
  1716. /*
  1717. * dp_peer_setup_wifi3() - initialize the peer
  1718. * @vdev_hdl: virtual device object
  1719. * @peer: Peer object
  1720. *
  1721. * Return: void
  1722. */
  1723. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  1724. {
  1725. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1726. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1727. struct dp_pdev *pdev;
  1728. struct dp_soc *soc;
  1729. bool hash_based = 0;
  1730. enum cdp_host_reo_dest_ring reo_dest;
  1731. /* preconditions */
  1732. qdf_assert(vdev);
  1733. qdf_assert(peer);
  1734. pdev = vdev->pdev;
  1735. soc = pdev->soc;
  1736. dp_peer_rx_init(pdev, peer);
  1737. peer->last_assoc_rcvd = 0;
  1738. peer->last_disassoc_rcvd = 0;
  1739. peer->last_deauth_rcvd = 0;
  1740. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  1741. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1742. FL("hash based steering %d\n"), hash_based);
  1743. if (!hash_based)
  1744. reo_dest = pdev->reo_dest;
  1745. else
  1746. reo_dest = 1;
  1747. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1748. /* TODO: Check the destination ring number to be passed to FW */
  1749. soc->cdp_soc.ol_ops->peer_set_default_routing(
  1750. pdev->osif_pdev, peer->mac_addr.raw,
  1751. peer->vdev->vdev_id, hash_based, reo_dest);
  1752. }
  1753. return;
  1754. }
  1755. /*
  1756. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  1757. * @vdev_handle: virtual device object
  1758. * @htt_pkt_type: type of pkt
  1759. *
  1760. * Return: void
  1761. */
  1762. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  1763. enum htt_cmn_pkt_type val)
  1764. {
  1765. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1766. vdev->tx_encap_type = val;
  1767. }
  1768. /*
  1769. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  1770. * @vdev_handle: virtual device object
  1771. * @htt_pkt_type: type of pkt
  1772. *
  1773. * Return: void
  1774. */
  1775. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  1776. enum htt_cmn_pkt_type val)
  1777. {
  1778. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1779. vdev->rx_decap_type = val;
  1780. }
  1781. /*
  1782. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  1783. * @pdev_handle: physical device object
  1784. * @val: reo destination ring index (1 - 4)
  1785. *
  1786. * Return: void
  1787. */
  1788. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  1789. enum cdp_host_reo_dest_ring val)
  1790. {
  1791. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1792. if (pdev)
  1793. pdev->reo_dest = val;
  1794. }
  1795. /*
  1796. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  1797. * @pdev_handle: physical device object
  1798. *
  1799. * Return: reo destination ring index
  1800. */
  1801. static enum cdp_host_reo_dest_ring
  1802. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  1803. {
  1804. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1805. if (pdev)
  1806. return pdev->reo_dest;
  1807. else
  1808. return cdp_host_reo_dest_ring_unknown;
  1809. }
  1810. #ifdef QCA_SUPPORT_SON
  1811. static void dp_son_peer_authorize(struct dp_peer *peer)
  1812. {
  1813. struct dp_soc *soc;
  1814. soc = peer->vdev->pdev->soc;
  1815. peer->peer_bs_inact_flag = 0;
  1816. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1817. return;
  1818. }
  1819. #else
  1820. static void dp_son_peer_authorize(struct dp_peer *peer)
  1821. {
  1822. return;
  1823. }
  1824. #endif
  1825. /*
  1826. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  1827. * @pdev_handle: device object
  1828. * @val: value to be set
  1829. *
  1830. * Return: void
  1831. */
  1832. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  1833. uint32_t val)
  1834. {
  1835. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1836. /* Enable/Disable smart mesh filtering. This flag will be checked
  1837. * during rx processing to check if packets are from NAC clients.
  1838. */
  1839. pdev->filter_neighbour_peers = val;
  1840. return 0;
  1841. }
  1842. /*
  1843. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  1844. * address for smart mesh filtering
  1845. * @pdev_handle: device object
  1846. * @cmd: Add/Del command
  1847. * @macaddr: nac client mac address
  1848. *
  1849. * Return: void
  1850. */
  1851. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  1852. uint32_t cmd, uint8_t *macaddr)
  1853. {
  1854. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1855. struct dp_neighbour_peer *peer = NULL;
  1856. if (!macaddr)
  1857. goto fail0;
  1858. /* Store address of NAC (neighbour peer) which will be checked
  1859. * against TA of received packets.
  1860. */
  1861. if (cmd == DP_NAC_PARAM_ADD) {
  1862. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  1863. sizeof(*peer));
  1864. if (!peer) {
  1865. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1866. FL("DP neighbour peer node memory allocation failed"));
  1867. goto fail0;
  1868. }
  1869. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  1870. macaddr, DP_MAC_ADDR_LEN);
  1871. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1872. /* add this neighbour peer into the list */
  1873. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  1874. neighbour_peer_list_elem);
  1875. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1876. return 1;
  1877. } else if (cmd == DP_NAC_PARAM_DEL) {
  1878. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1879. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1880. neighbour_peer_list_elem) {
  1881. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  1882. macaddr, DP_MAC_ADDR_LEN)) {
  1883. /* delete this peer from the list */
  1884. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  1885. peer, neighbour_peer_list_elem);
  1886. qdf_mem_free(peer);
  1887. break;
  1888. }
  1889. }
  1890. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1891. return 1;
  1892. }
  1893. fail0:
  1894. return 0;
  1895. }
  1896. /*
  1897. * dp_peer_authorize() - authorize txrx peer
  1898. * @peer_handle: Datapath peer handle
  1899. * @authorize
  1900. *
  1901. */
  1902. static void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1903. {
  1904. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1905. struct dp_soc *soc;
  1906. if (peer != NULL) {
  1907. soc = peer->vdev->pdev->soc;
  1908. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1909. dp_son_peer_authorize(peer);
  1910. peer->authorize = authorize ? 1 : 0;
  1911. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1912. }
  1913. }
  1914. /*
  1915. * dp_peer_unref_delete() - unref and delete peer
  1916. * @peer_handle: Datapath peer handle
  1917. *
  1918. */
  1919. void dp_peer_unref_delete(void *peer_handle)
  1920. {
  1921. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1922. struct dp_vdev *vdev = peer->vdev;
  1923. struct dp_pdev *pdev = vdev->pdev;
  1924. struct dp_soc *soc = pdev->soc;
  1925. struct dp_peer *tmppeer;
  1926. int found = 0;
  1927. uint16_t peer_id;
  1928. uint16_t hw_peer_id;
  1929. struct dp_ast_entry *ast_entry;
  1930. /*
  1931. * Hold the lock all the way from checking if the peer ref count
  1932. * is zero until the peer references are removed from the hash
  1933. * table and vdev list (if the peer ref count is zero).
  1934. * This protects against a new HL tx operation starting to use the
  1935. * peer object just after this function concludes it's done being used.
  1936. * Furthermore, the lock needs to be held while checking whether the
  1937. * vdev's list of peers is empty, to make sure that list is not modified
  1938. * concurrently with the empty check.
  1939. */
  1940. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1941. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1942. "%s: peer %p ref_cnt(before decrement): %d\n", __func__,
  1943. peer, qdf_atomic_read(&peer->ref_cnt));
  1944. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1945. peer_id = peer->peer_ids[0];
  1946. /*
  1947. * Make sure that the reference to the peer in
  1948. * peer object map is removed
  1949. */
  1950. if (peer_id != HTT_INVALID_PEER)
  1951. soc->peer_id_to_obj_map[peer_id] = NULL;
  1952. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1953. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1954. /* remove the reference to the peer from the hash table */
  1955. dp_peer_find_hash_remove(soc, peer);
  1956. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1957. if (tmppeer == peer) {
  1958. found = 1;
  1959. break;
  1960. }
  1961. }
  1962. if (found) {
  1963. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1964. peer_list_elem);
  1965. } else {
  1966. /*Ignoring the remove operation as peer not found*/
  1967. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1968. "peer %p not found in vdev (%p)->peer_list:%p",
  1969. peer, vdev, &peer->vdev->peer_list);
  1970. }
  1971. /* cleanup the peer data */
  1972. dp_peer_cleanup(vdev, peer);
  1973. /* check whether the parent vdev has no peers left */
  1974. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1975. /*
  1976. * Now that there are no references to the peer, we can
  1977. * release the peer reference lock.
  1978. */
  1979. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1980. /*
  1981. * Check if the parent vdev was waiting for its peers
  1982. * to be deleted, in order for it to be deleted too.
  1983. */
  1984. if (vdev->delete.pending) {
  1985. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1986. vdev->delete.callback;
  1987. void *vdev_delete_context =
  1988. vdev->delete.context;
  1989. QDF_TRACE(QDF_MODULE_ID_DP,
  1990. QDF_TRACE_LEVEL_INFO_HIGH,
  1991. FL("deleting vdev object %p (%pM)"
  1992. " - its last peer is done"),
  1993. vdev, vdev->mac_addr.raw);
  1994. /* all peers are gone, go ahead and delete it */
  1995. qdf_mem_free(vdev);
  1996. if (vdev_delete_cb)
  1997. vdev_delete_cb(vdev_delete_context);
  1998. }
  1999. } else {
  2000. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2001. }
  2002. #ifdef notyet
  2003. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  2004. #else
  2005. TAILQ_FOREACH(ast_entry, &peer->ast_entry_list,
  2006. ast_entry_elem) {
  2007. hw_peer_id = ast_entry->ast_idx;
  2008. if (peer->self_ast_entry.ast_idx != hw_peer_id)
  2009. qdf_mem_free(ast_entry);
  2010. else
  2011. peer->self_ast_entry.ast_idx =
  2012. HTT_INVALID_PEER;
  2013. soc->ast_table[hw_peer_id] = NULL;
  2014. }
  2015. qdf_mem_free(peer);
  2016. #endif
  2017. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  2018. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  2019. vdev->vdev_id, peer->mac_addr.raw);
  2020. }
  2021. } else {
  2022. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2023. }
  2024. }
  2025. /*
  2026. * dp_peer_detach_wifi3() – Detach txrx peer
  2027. * @peer_handle: Datapath peer handle
  2028. *
  2029. */
  2030. static void dp_peer_delete_wifi3(void *peer_handle)
  2031. {
  2032. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2033. /* redirect the peer's rx delivery function to point to a
  2034. * discard func
  2035. */
  2036. peer->rx_opt_proc = dp_rx_discard;
  2037. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2038. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  2039. #ifndef CONFIG_WIN
  2040. dp_local_peer_id_free(peer->vdev->pdev, peer);
  2041. #endif
  2042. qdf_spinlock_destroy(&peer->peer_info_lock);
  2043. /*
  2044. * Remove the reference added during peer_attach.
  2045. * The peer will still be left allocated until the
  2046. * PEER_UNMAP message arrives to remove the other
  2047. * reference, added by the PEER_MAP message.
  2048. */
  2049. dp_peer_unref_delete(peer_handle);
  2050. }
  2051. /*
  2052. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  2053. * @peer_handle: Datapath peer handle
  2054. *
  2055. */
  2056. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  2057. {
  2058. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  2059. return vdev->mac_addr.raw;
  2060. }
  2061. /*
  2062. * dp_vdev_set_wds() - Enable per packet stats
  2063. * @vdev_handle: DP VDEV handle
  2064. * @val: value
  2065. *
  2066. * Return: none
  2067. */
  2068. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  2069. {
  2070. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2071. vdev->wds_enabled = val;
  2072. return 0;
  2073. }
  2074. /*
  2075. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  2076. * @peer_handle: Datapath peer handle
  2077. *
  2078. */
  2079. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  2080. uint8_t vdev_id)
  2081. {
  2082. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  2083. struct dp_vdev *vdev = NULL;
  2084. if (qdf_unlikely(!pdev))
  2085. return NULL;
  2086. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2087. if (vdev->vdev_id == vdev_id)
  2088. break;
  2089. }
  2090. return (struct cdp_vdev *)vdev;
  2091. }
  2092. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  2093. {
  2094. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2095. return vdev->opmode;
  2096. }
  2097. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  2098. {
  2099. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  2100. struct dp_pdev *pdev = vdev->pdev;
  2101. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  2102. }
  2103. /**
  2104. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  2105. * @vdev_handle: Datapath VDEV handle
  2106. * @smart_monitor: Flag to denote if its smart monitor mode
  2107. *
  2108. * Return: 0 on success, not 0 on failure
  2109. */
  2110. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  2111. uint8_t smart_monitor)
  2112. {
  2113. /* Many monitor VAPs can exists in a system but only one can be up at
  2114. * anytime
  2115. */
  2116. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2117. struct dp_pdev *pdev;
  2118. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  2119. struct dp_soc *soc;
  2120. uint8_t pdev_id;
  2121. qdf_assert(vdev);
  2122. pdev = vdev->pdev;
  2123. pdev_id = pdev->pdev_id;
  2124. soc = pdev->soc;
  2125. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  2126. "pdev=%p, pdev_id=%d, soc=%p vdev=%p\n",
  2127. pdev, pdev_id, soc, vdev);
  2128. /*Check if current pdev's monitor_vdev exists */
  2129. if (pdev->monitor_vdev) {
  2130. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2131. "vdev=%p\n", vdev);
  2132. qdf_assert(vdev);
  2133. }
  2134. pdev->monitor_vdev = vdev;
  2135. /* If smart monitor mode, do not configure monitor ring */
  2136. if (smart_monitor)
  2137. return QDF_STATUS_SUCCESS;
  2138. htt_tlv_filter.mpdu_start = 1;
  2139. htt_tlv_filter.msdu_start = 1;
  2140. htt_tlv_filter.packet = 1;
  2141. htt_tlv_filter.msdu_end = 1;
  2142. htt_tlv_filter.mpdu_end = 1;
  2143. htt_tlv_filter.packet_header = 1;
  2144. htt_tlv_filter.attention = 1;
  2145. htt_tlv_filter.ppdu_start = 0;
  2146. htt_tlv_filter.ppdu_end = 0;
  2147. htt_tlv_filter.ppdu_end_user_stats = 0;
  2148. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  2149. htt_tlv_filter.ppdu_end_status_done = 0;
  2150. htt_tlv_filter.enable_fp = 1;
  2151. htt_tlv_filter.enable_md = 0;
  2152. htt_tlv_filter.enable_mo = 1;
  2153. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  2154. pdev->rxdma_mon_buf_ring.hal_srng,
  2155. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  2156. htt_tlv_filter.mpdu_start = 1;
  2157. htt_tlv_filter.msdu_start = 1;
  2158. htt_tlv_filter.packet = 0;
  2159. htt_tlv_filter.msdu_end = 1;
  2160. htt_tlv_filter.mpdu_end = 1;
  2161. htt_tlv_filter.packet_header = 1;
  2162. htt_tlv_filter.attention = 1;
  2163. htt_tlv_filter.ppdu_start = 1;
  2164. htt_tlv_filter.ppdu_end = 1;
  2165. htt_tlv_filter.ppdu_end_user_stats = 1;
  2166. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  2167. htt_tlv_filter.ppdu_end_status_done = 1;
  2168. htt_tlv_filter.enable_fp = 1;
  2169. htt_tlv_filter.enable_md = 0;
  2170. htt_tlv_filter.enable_mo = 1;
  2171. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  2172. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  2173. RX_BUFFER_SIZE, &htt_tlv_filter);
  2174. return QDF_STATUS_SUCCESS;
  2175. }
  2176. #ifdef MESH_MODE_SUPPORT
  2177. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  2178. {
  2179. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2180. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2181. FL("val %d"), val);
  2182. vdev->mesh_vdev = val;
  2183. }
  2184. /*
  2185. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  2186. * @vdev_hdl: virtual device object
  2187. * @val: value to be set
  2188. *
  2189. * Return: void
  2190. */
  2191. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  2192. {
  2193. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2194. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2195. FL("val %d"), val);
  2196. vdev->mesh_rx_filter = val;
  2197. }
  2198. #endif
  2199. /**
  2200. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  2201. * @vdev: DP VDEV handle
  2202. *
  2203. * return: void
  2204. */
  2205. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  2206. {
  2207. struct dp_peer *peer = NULL;
  2208. int i;
  2209. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  2210. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  2211. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2212. if (!peer)
  2213. return;
  2214. for (i = 0; i <= MAX_MCS; i++) {
  2215. DP_STATS_AGGR(vdev, peer, tx.pkt_type[0].mcs_count[i]);
  2216. DP_STATS_AGGR(vdev, peer, tx.pkt_type[1].mcs_count[i]);
  2217. DP_STATS_AGGR(vdev, peer, tx.pkt_type[2].mcs_count[i]);
  2218. DP_STATS_AGGR(vdev, peer, tx.pkt_type[3].mcs_count[i]);
  2219. DP_STATS_AGGR(vdev, peer, tx.pkt_type[4].mcs_count[i]);
  2220. DP_STATS_AGGR(vdev, peer, rx.pkt_type[0].mcs_count[i]);
  2221. DP_STATS_AGGR(vdev, peer, rx.pkt_type[1].mcs_count[i]);
  2222. DP_STATS_AGGR(vdev, peer, rx.pkt_type[2].mcs_count[i]);
  2223. DP_STATS_AGGR(vdev, peer, rx.pkt_type[3].mcs_count[i]);
  2224. DP_STATS_AGGR(vdev, peer, rx.pkt_type[4].mcs_count[i]);
  2225. }
  2226. for (i = 0; i < SUPPORTED_BW; i++) {
  2227. DP_STATS_AGGR(vdev, peer, tx.bw[i]);
  2228. DP_STATS_AGGR(vdev, peer, rx.bw[i]);
  2229. }
  2230. for (i = 0; i < SS_COUNT; i++)
  2231. DP_STATS_AGGR(vdev, peer, rx.nss[i]);
  2232. for (i = 0; i < WME_AC_MAX; i++) {
  2233. DP_STATS_AGGR(vdev, peer, tx.wme_ac_type[i]);
  2234. DP_STATS_AGGR(vdev, peer, rx.wme_ac_type[i]);
  2235. DP_STATS_AGGR(vdev, peer, tx.excess_retries_ac[i]);
  2236. }
  2237. for (i = 0; i < MAX_MCS + 1; i++) {
  2238. DP_STATS_AGGR(vdev, peer, tx.sgi_count[i]);
  2239. DP_STATS_AGGR(vdev, peer, rx.sgi_count[i]);
  2240. }
  2241. DP_STATS_AGGR_PKT(vdev, peer, tx.comp_pkt);
  2242. DP_STATS_AGGR_PKT(vdev, peer, tx.ucast);
  2243. DP_STATS_AGGR_PKT(vdev, peer, tx.mcast);
  2244. DP_STATS_AGGR_PKT(vdev, peer, tx.tx_success);
  2245. DP_STATS_AGGR(vdev, peer, tx.tx_failed);
  2246. DP_STATS_AGGR(vdev, peer, tx.ofdma);
  2247. DP_STATS_AGGR(vdev, peer, tx.stbc);
  2248. DP_STATS_AGGR(vdev, peer, tx.ldpc);
  2249. DP_STATS_AGGR(vdev, peer, tx.retries);
  2250. DP_STATS_AGGR(vdev, peer, tx.non_amsdu_cnt);
  2251. DP_STATS_AGGR(vdev, peer, tx.amsdu_cnt);
  2252. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard);
  2253. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_retired);
  2254. DP_STATS_AGGR(vdev, peer, tx.dropped.mpdu_age_out);
  2255. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason1);
  2256. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason2);
  2257. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason3);
  2258. DP_STATS_AGGR(vdev, peer, rx.err.mic_err);
  2259. DP_STATS_AGGR(vdev, peer, rx.err.decrypt_err);
  2260. DP_STATS_AGGR(vdev, peer, rx.non_ampdu_cnt);
  2261. DP_STATS_AGGR(vdev, peer, rx.ampdu_cnt);
  2262. DP_STATS_AGGR(vdev, peer, rx.non_amsdu_cnt);
  2263. DP_STATS_AGGR(vdev, peer, rx.amsdu_cnt);
  2264. DP_STATS_AGGR_PKT(vdev, peer, rx.to_stack);
  2265. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  2266. DP_STATS_AGGR_PKT(vdev, peer, rx.rcvd_reo[i]);
  2267. peer->stats.rx.unicast.num = peer->stats.rx.to_stack.num -
  2268. peer->stats.rx.multicast.num;
  2269. peer->stats.rx.unicast.bytes = peer->stats.rx.to_stack.bytes -
  2270. peer->stats.rx.multicast.bytes;
  2271. DP_STATS_AGGR_PKT(vdev, peer, rx.unicast);
  2272. DP_STATS_AGGR_PKT(vdev, peer, rx.multicast);
  2273. DP_STATS_AGGR_PKT(vdev, peer, rx.wds);
  2274. DP_STATS_AGGR_PKT(vdev, peer, rx.raw);
  2275. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss.pkts);
  2276. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss.fail);
  2277. vdev->stats.tx.last_ack_rssi =
  2278. peer->stats.tx.last_ack_rssi;
  2279. }
  2280. }
  2281. /**
  2282. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  2283. * @pdev: DP PDEV handle
  2284. *
  2285. * return: void
  2286. */
  2287. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  2288. {
  2289. struct dp_vdev *vdev = NULL;
  2290. uint8_t i;
  2291. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  2292. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  2293. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  2294. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2295. if (!vdev)
  2296. return;
  2297. dp_aggregate_vdev_stats(vdev);
  2298. for (i = 0; i <= MAX_MCS; i++) {
  2299. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[0].mcs_count[i]);
  2300. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[1].mcs_count[i]);
  2301. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[2].mcs_count[i]);
  2302. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[3].mcs_count[i]);
  2303. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[4].mcs_count[i]);
  2304. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[0].mcs_count[i]);
  2305. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[1].mcs_count[i]);
  2306. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[2].mcs_count[i]);
  2307. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[3].mcs_count[i]);
  2308. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[4].mcs_count[i]);
  2309. }
  2310. for (i = 0; i < SUPPORTED_BW; i++) {
  2311. DP_STATS_AGGR(pdev, vdev, tx.bw[i]);
  2312. DP_STATS_AGGR(pdev, vdev, rx.bw[i]);
  2313. }
  2314. for (i = 0; i < SS_COUNT; i++)
  2315. DP_STATS_AGGR(pdev, vdev, rx.nss[i]);
  2316. for (i = 0; i < WME_AC_MAX; i++) {
  2317. DP_STATS_AGGR(pdev, vdev, tx.wme_ac_type[i]);
  2318. DP_STATS_AGGR(pdev, vdev, rx.wme_ac_type[i]);
  2319. DP_STATS_AGGR(pdev, vdev,
  2320. tx.excess_retries_ac[i]);
  2321. }
  2322. for (i = 0; i < MAX_MCS + 1; i++) {
  2323. DP_STATS_AGGR(pdev, vdev, tx.sgi_count[i]);
  2324. DP_STATS_AGGR(pdev, vdev, rx.sgi_count[i]);
  2325. }
  2326. DP_STATS_AGGR_PKT(pdev, vdev, tx.comp_pkt);
  2327. DP_STATS_AGGR_PKT(pdev, vdev, tx.ucast);
  2328. DP_STATS_AGGR_PKT(pdev, vdev, tx.mcast);
  2329. DP_STATS_AGGR_PKT(pdev, vdev, tx.tx_success);
  2330. DP_STATS_AGGR(pdev, vdev, tx.tx_failed);
  2331. DP_STATS_AGGR(pdev, vdev, tx.ofdma);
  2332. DP_STATS_AGGR(pdev, vdev, tx.stbc);
  2333. DP_STATS_AGGR(pdev, vdev, tx.ldpc);
  2334. DP_STATS_AGGR(pdev, vdev, tx.retries);
  2335. DP_STATS_AGGR(pdev, vdev, tx.non_amsdu_cnt);
  2336. DP_STATS_AGGR(pdev, vdev, tx.amsdu_cnt);
  2337. DP_STATS_AGGR(pdev, vdev, tx.dropped.fw_discard);
  2338. DP_STATS_AGGR(pdev, vdev,
  2339. tx.dropped.fw_discard_retired);
  2340. DP_STATS_AGGR(pdev, vdev, tx.dropped.mpdu_age_out);
  2341. DP_STATS_AGGR(pdev, vdev,
  2342. tx.dropped.fw_discard_reason1);
  2343. DP_STATS_AGGR(pdev, vdev,
  2344. tx.dropped.fw_discard_reason2);
  2345. DP_STATS_AGGR(pdev, vdev,
  2346. tx.dropped.fw_discard_reason3);
  2347. DP_STATS_AGGR(pdev, vdev, rx.err.mic_err);
  2348. DP_STATS_AGGR(pdev, vdev, rx.err.decrypt_err);
  2349. DP_STATS_AGGR(pdev, vdev, rx.non_ampdu_cnt);
  2350. DP_STATS_AGGR(pdev, vdev, rx.ampdu_cnt);
  2351. DP_STATS_AGGR(pdev, vdev, rx.non_amsdu_cnt);
  2352. DP_STATS_AGGR(pdev, vdev, rx.amsdu_cnt);
  2353. DP_STATS_AGGR_PKT(pdev, vdev, rx.to_stack);
  2354. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[0]);
  2355. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[1]);
  2356. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[2]);
  2357. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[3]);
  2358. DP_STATS_AGGR_PKT(pdev, vdev, rx.unicast);
  2359. DP_STATS_AGGR_PKT(pdev, vdev, rx.multicast);
  2360. DP_STATS_AGGR_PKT(pdev, vdev, rx.wds);
  2361. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss.pkts);
  2362. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss.fail);
  2363. DP_STATS_AGGR_PKT(pdev, vdev, rx.raw);
  2364. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  2365. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  2366. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  2367. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  2368. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  2369. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  2370. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  2371. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  2372. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  2373. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  2374. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  2375. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  2376. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  2377. DP_STATS_AGGR(pdev, vdev,
  2378. tx_i.mcast_en.dropped_map_error);
  2379. DP_STATS_AGGR(pdev, vdev,
  2380. tx_i.mcast_en.dropped_self_mac);
  2381. DP_STATS_AGGR(pdev, vdev,
  2382. tx_i.mcast_en.dropped_send_fail);
  2383. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  2384. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  2385. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  2386. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  2387. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  2388. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  2389. pdev->stats.tx_i.dropped.dropped_pkt.num =
  2390. pdev->stats.tx_i.dropped.dma_error +
  2391. pdev->stats.tx_i.dropped.ring_full +
  2392. pdev->stats.tx_i.dropped.enqueue_fail +
  2393. pdev->stats.tx_i.dropped.desc_na +
  2394. pdev->stats.tx_i.dropped.res_full;
  2395. pdev->stats.tx.last_ack_rssi =
  2396. vdev->stats.tx.last_ack_rssi;
  2397. pdev->stats.tx_i.tso.num_seg =
  2398. vdev->stats.tx_i.tso.num_seg;
  2399. }
  2400. }
  2401. /**
  2402. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  2403. * @pdev: DP_PDEV Handle
  2404. *
  2405. * Return:void
  2406. */
  2407. static inline void
  2408. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  2409. {
  2410. DP_TRACE_STATS(FATAL, "WLAN Tx Stats:\n");
  2411. DP_TRACE_STATS(FATAL, "Received From Stack:\n");
  2412. DP_TRACE_STATS(FATAL, "Packets = %d",
  2413. pdev->stats.tx_i.rcvd.num);
  2414. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2415. pdev->stats.tx_i.rcvd.bytes);
  2416. DP_TRACE_STATS(FATAL, "Processed:\n");
  2417. DP_TRACE_STATS(FATAL, "Packets = %d",
  2418. pdev->stats.tx_i.processed.num);
  2419. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2420. pdev->stats.tx_i.processed.bytes);
  2421. DP_TRACE_STATS(FATAL, "Completions:\n");
  2422. DP_TRACE_STATS(FATAL, "Packets = %d",
  2423. pdev->stats.tx.comp_pkt.num);
  2424. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2425. pdev->stats.tx.comp_pkt.bytes);
  2426. DP_TRACE_STATS(FATAL, "Dropped:\n");
  2427. DP_TRACE_STATS(FATAL, "Packets = %d",
  2428. pdev->stats.tx_i.dropped.dropped_pkt.num);
  2429. DP_TRACE_STATS(FATAL, "Dma_map_error = %d",
  2430. pdev->stats.tx_i.dropped.dma_error);
  2431. DP_TRACE_STATS(FATAL, "Ring Full = %d",
  2432. pdev->stats.tx_i.dropped.ring_full);
  2433. DP_TRACE_STATS(FATAL, "Descriptor Not available = %d",
  2434. pdev->stats.tx_i.dropped.desc_na);
  2435. DP_TRACE_STATS(FATAL, "HW enqueue failed= %d",
  2436. pdev->stats.tx_i.dropped.enqueue_fail);
  2437. DP_TRACE_STATS(FATAL, "Resources Full = %d",
  2438. pdev->stats.tx_i.dropped.res_full);
  2439. DP_TRACE_STATS(FATAL, "Fw Discard = %d",
  2440. pdev->stats.tx.dropped.fw_discard);
  2441. DP_TRACE_STATS(FATAL, "Fw Discard Retired = %d",
  2442. pdev->stats.tx.dropped.fw_discard_retired);
  2443. DP_TRACE_STATS(FATAL, "Firmware Discard Untransmitted = %d",
  2444. pdev->stats.tx.dropped.fw_discard_untransmitted);
  2445. DP_TRACE_STATS(FATAL, "Mpdu Age Out = %d",
  2446. pdev->stats.tx.dropped.mpdu_age_out);
  2447. DP_TRACE_STATS(FATAL, "Firmware Discard Reason1 = %d",
  2448. pdev->stats.tx.dropped.fw_discard_reason1);
  2449. DP_TRACE_STATS(FATAL, "Firmware Discard Reason2 = %d",
  2450. pdev->stats.tx.dropped.fw_discard_reason2);
  2451. DP_TRACE_STATS(FATAL, "Firmware Discard Reason3 = %d\n",
  2452. pdev->stats.tx.dropped.fw_discard_reason3);
  2453. DP_TRACE_STATS(FATAL, "Scatter Gather:\n");
  2454. DP_TRACE_STATS(FATAL, "Packets = %d",
  2455. pdev->stats.tx_i.sg.sg_pkt.num);
  2456. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2457. pdev->stats.tx_i.sg.sg_pkt.bytes);
  2458. DP_TRACE_STATS(FATAL, "Dropped By Host = %d",
  2459. pdev->stats.tx_i.sg.dropped_host);
  2460. DP_TRACE_STATS(FATAL, "Dropped By Target = %d\n",
  2461. pdev->stats.tx_i.sg.dropped_target);
  2462. DP_TRACE_STATS(FATAL, "Tso:\n");
  2463. DP_TRACE_STATS(FATAL, "Number of Segments = %d",
  2464. pdev->stats.tx_i.tso.num_seg);
  2465. DP_TRACE_STATS(FATAL, "Packets = %d",
  2466. pdev->stats.tx_i.tso.tso_pkt.num);
  2467. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2468. pdev->stats.tx_i.tso.tso_pkt.bytes);
  2469. DP_TRACE_STATS(FATAL, "Dropped By Host = %d\n",
  2470. pdev->stats.tx_i.tso.dropped_host);
  2471. DP_TRACE_STATS(FATAL, "Mcast Enhancement:\n");
  2472. DP_TRACE_STATS(FATAL, "Packets = %d",
  2473. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  2474. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2475. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  2476. DP_TRACE_STATS(FATAL, "Dropped: Map Errors = %d",
  2477. pdev->stats.tx_i.mcast_en.dropped_map_error);
  2478. DP_TRACE_STATS(FATAL, "Dropped: Self Mac = %d",
  2479. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  2480. DP_TRACE_STATS(FATAL, "Dropped: Send Fail = %d",
  2481. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  2482. DP_TRACE_STATS(FATAL, "Unicast sent = %d\n",
  2483. pdev->stats.tx_i.mcast_en.ucast);
  2484. DP_TRACE_STATS(FATAL, "Raw:\n");
  2485. DP_TRACE_STATS(FATAL, "Packets = %d",
  2486. pdev->stats.tx_i.raw.raw_pkt.num);
  2487. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2488. pdev->stats.tx_i.raw.raw_pkt.bytes);
  2489. DP_TRACE_STATS(FATAL, "DMA map error = %d\n",
  2490. pdev->stats.tx_i.raw.dma_map_error);
  2491. DP_TRACE_STATS(FATAL, "Reinjected:\n");
  2492. DP_TRACE_STATS(FATAL, "Packets = %d",
  2493. pdev->stats.tx_i.reinject_pkts.num);
  2494. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2495. pdev->stats.tx_i.reinject_pkts.bytes);
  2496. DP_TRACE_STATS(FATAL, "Inspected:\n");
  2497. DP_TRACE_STATS(FATAL, "Packets = %d",
  2498. pdev->stats.tx_i.inspect_pkts.num);
  2499. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2500. pdev->stats.tx_i.inspect_pkts.bytes);
  2501. }
  2502. /**
  2503. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  2504. * @pdev: DP_PDEV Handle
  2505. *
  2506. * Return: void
  2507. */
  2508. static inline void
  2509. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  2510. {
  2511. DP_TRACE_STATS(FATAL, "WLAN Rx Stats:\n");
  2512. DP_TRACE_STATS(FATAL, "Received From HW (Per Rx Ring):\n");
  2513. DP_TRACE_STATS(FATAL, "Packets = %d %d %d %d",
  2514. pdev->stats.rx.rcvd_reo[0].num,
  2515. pdev->stats.rx.rcvd_reo[1].num,
  2516. pdev->stats.rx.rcvd_reo[2].num,
  2517. pdev->stats.rx.rcvd_reo[3].num);
  2518. DP_TRACE_STATS(FATAL, "Bytes = %d %d %d %d\n",
  2519. pdev->stats.rx.rcvd_reo[0].bytes,
  2520. pdev->stats.rx.rcvd_reo[1].bytes,
  2521. pdev->stats.rx.rcvd_reo[2].bytes,
  2522. pdev->stats.rx.rcvd_reo[3].bytes);
  2523. DP_TRACE_STATS(FATAL, "Replenished:\n");
  2524. DP_TRACE_STATS(FATAL, "Packets = %d",
  2525. pdev->stats.replenish.pkts.num);
  2526. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2527. pdev->stats.replenish.pkts.bytes);
  2528. DP_TRACE_STATS(FATAL, "Buffers Added To Freelist = %d\n",
  2529. pdev->stats.buf_freelist);
  2530. DP_TRACE_STATS(FATAL, "Dropped:\n");
  2531. DP_TRACE_STATS(FATAL, "Total Packets With Msdu Not Done = %d\n",
  2532. pdev->stats.dropped.msdu_not_done);
  2533. DP_TRACE_STATS(FATAL, "Sent To Stack:\n");
  2534. DP_TRACE_STATS(FATAL, "Packets = %d",
  2535. pdev->stats.rx.to_stack.num);
  2536. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2537. pdev->stats.rx.to_stack.bytes);
  2538. DP_TRACE_STATS(FATAL, "Multicast/Broadcast:\n");
  2539. DP_TRACE_STATS(FATAL, "Packets = %d",
  2540. pdev->stats.rx.multicast.num);
  2541. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2542. pdev->stats.rx.multicast.bytes);
  2543. DP_TRACE_STATS(FATAL, "Errors:\n");
  2544. DP_TRACE_STATS(FATAL, "Rxdma Ring Un-inititalized = %d",
  2545. pdev->stats.replenish.rxdma_err);
  2546. DP_TRACE_STATS(FATAL, "Desc Alloc Failed: = %d",
  2547. pdev->stats.err.desc_alloc_fail);
  2548. }
  2549. /**
  2550. * dp_print_soc_tx_stats(): Print SOC level stats
  2551. * @soc DP_SOC Handle
  2552. *
  2553. * Return: void
  2554. */
  2555. static inline void
  2556. dp_print_soc_tx_stats(struct dp_soc *soc)
  2557. {
  2558. DP_TRACE_STATS(FATAL, "SOC Tx Stats:\n");
  2559. DP_TRACE_STATS(FATAL, "Tx Descriptors In Use = %d",
  2560. soc->stats.tx.desc_in_use);
  2561. DP_TRACE_STATS(FATAL, "Invalid peer:\n");
  2562. DP_TRACE_STATS(FATAL, "Packets = %d",
  2563. soc->stats.tx.tx_invalid_peer.num);
  2564. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2565. soc->stats.tx.tx_invalid_peer.bytes);
  2566. DP_TRACE_STATS(FATAL, "Packets dropped due to TCL ring full = %d %d %d",
  2567. soc->stats.tx.tcl_ring_full[0],
  2568. soc->stats.tx.tcl_ring_full[1],
  2569. soc->stats.tx.tcl_ring_full[2]);
  2570. }
  2571. /**
  2572. * dp_print_soc_rx_stats: Print SOC level Rx stats
  2573. * @soc: DP_SOC Handle
  2574. *
  2575. * Return:void
  2576. */
  2577. static inline void
  2578. dp_print_soc_rx_stats(struct dp_soc *soc)
  2579. {
  2580. uint32_t i;
  2581. char reo_error[DP_REO_ERR_LENGTH];
  2582. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  2583. uint8_t index = 0;
  2584. DP_TRACE_STATS(FATAL, "SOC Rx Stats:\n");
  2585. DP_TRACE_STATS(FATAL, "Errors:\n");
  2586. DP_TRACE_STATS(FATAL, "Rx Decrypt Errors = %d",
  2587. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  2588. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  2589. DP_TRACE_STATS(FATAL, "Invalid RBM = %d",
  2590. soc->stats.rx.err.invalid_rbm);
  2591. DP_TRACE_STATS(FATAL, "Invalid Vdev = %d",
  2592. soc->stats.rx.err.invalid_vdev);
  2593. DP_TRACE_STATS(FATAL, "Invalid Pdev = %d",
  2594. soc->stats.rx.err.invalid_pdev);
  2595. DP_TRACE_STATS(FATAL, "Invalid Peer = %d",
  2596. soc->stats.rx.err.rx_invalid_peer.num);
  2597. DP_TRACE_STATS(FATAL, "HAL Ring Access Fail = %d",
  2598. soc->stats.rx.err.hal_ring_access_fail);
  2599. for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
  2600. index += qdf_snprint(&rxdma_error[index],
  2601. DP_RXDMA_ERR_LENGTH - index,
  2602. " %d", soc->stats.rx.err.rxdma_error[i]);
  2603. }
  2604. DP_TRACE_STATS(FATAL, "RXDMA Error (0-31):%s",
  2605. rxdma_error);
  2606. index = 0;
  2607. for (i = 0; i < REO_ERROR_TYPE_MAX; i++) {
  2608. index += qdf_snprint(&reo_error[index],
  2609. DP_REO_ERR_LENGTH - index,
  2610. " %d", soc->stats.rx.err.reo_error[i]);
  2611. }
  2612. DP_TRACE_STATS(FATAL, "REO Error(0-14):%s",
  2613. reo_error);
  2614. }
  2615. /**
  2616. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  2617. * @vdev: DP_VDEV handle
  2618. *
  2619. * Return:void
  2620. */
  2621. static inline void
  2622. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  2623. {
  2624. struct dp_peer *peer = NULL;
  2625. DP_STATS_CLR(vdev->pdev);
  2626. DP_STATS_CLR(vdev->pdev->soc);
  2627. DP_STATS_CLR(vdev);
  2628. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2629. if (!peer)
  2630. return;
  2631. DP_STATS_CLR(peer);
  2632. }
  2633. }
  2634. /**
  2635. * dp_print_rx_rates(): Print Rx rate stats
  2636. * @vdev: DP_VDEV handle
  2637. *
  2638. * Return:void
  2639. */
  2640. static inline void
  2641. dp_print_rx_rates(struct dp_vdev *vdev)
  2642. {
  2643. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2644. uint8_t i, pkt_type;
  2645. uint8_t index = 0;
  2646. char rx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2647. char nss[DP_NSS_LENGTH];
  2648. DP_TRACE_STATS(FATAL, "Rx Rate Info:\n");
  2649. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2650. index = 0;
  2651. for (i = 0; i < MAX_MCS; i++) {
  2652. index += qdf_snprint(&rx_mcs[pkt_type][index],
  2653. DP_MCS_LENGTH - index,
  2654. " %d ",
  2655. pdev->stats.rx.pkt_type[pkt_type].
  2656. mcs_count[i]);
  2657. }
  2658. }
  2659. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2660. rx_mcs[0]);
  2661. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2662. pdev->stats.rx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2663. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2664. rx_mcs[1]);
  2665. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2666. pdev->stats.rx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2667. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2668. rx_mcs[2]);
  2669. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2670. pdev->stats.rx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2671. DP_TRACE_STATS(FATAL, "Type 11AC MCS(0-9) = %s",
  2672. rx_mcs[3]);
  2673. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2674. pdev->stats.rx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2675. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2676. rx_mcs[4]);
  2677. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2678. pdev->stats.rx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2679. index = 0;
  2680. for (i = 0; i < SS_COUNT; i++) {
  2681. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2682. " %d", pdev->stats.rx.nss[i]);
  2683. }
  2684. DP_TRACE_STATS(FATAL, "NSS(0-7) = %s",
  2685. nss);
  2686. DP_TRACE_STATS(FATAL, "SGI ="
  2687. " 0.8us %d,"
  2688. " 0.4us %d,"
  2689. " 1.6us %d,"
  2690. " 3.2us %d,",
  2691. pdev->stats.rx.sgi_count[0],
  2692. pdev->stats.rx.sgi_count[1],
  2693. pdev->stats.rx.sgi_count[2],
  2694. pdev->stats.rx.sgi_count[3]);
  2695. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2696. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  2697. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  2698. DP_TRACE_STATS(FATAL, "Reception Type ="
  2699. " SU: %d,"
  2700. " MU_MIMO:%d,"
  2701. " MU_OFDMA:%d,"
  2702. " MU_OFDMA_MIMO:%d\n",
  2703. pdev->stats.rx.reception_type[0],
  2704. pdev->stats.rx.reception_type[1],
  2705. pdev->stats.rx.reception_type[2],
  2706. pdev->stats.rx.reception_type[3]);
  2707. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2708. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Ampdus = %d",
  2709. pdev->stats.rx.ampdu_cnt);
  2710. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Mpdu Level Aggregation : %d",
  2711. pdev->stats.rx.non_ampdu_cnt);
  2712. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu: %d",
  2713. pdev->stats.rx.amsdu_cnt);
  2714. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation: %d",
  2715. pdev->stats.rx.non_amsdu_cnt);
  2716. }
  2717. /**
  2718. * dp_print_tx_rates(): Print tx rates
  2719. * @vdev: DP_VDEV handle
  2720. *
  2721. * Return:void
  2722. */
  2723. static inline void
  2724. dp_print_tx_rates(struct dp_vdev *vdev)
  2725. {
  2726. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2727. uint8_t i, pkt_type;
  2728. char mcs[DOT11_MAX][DP_MCS_LENGTH];
  2729. uint32_t index;
  2730. DP_TRACE_STATS(FATAL, "Tx Rate Info:\n");
  2731. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2732. index = 0;
  2733. for (i = 0; i < MAX_MCS; i++) {
  2734. index += qdf_snprint(&mcs[pkt_type][index],
  2735. DP_MCS_LENGTH - index,
  2736. " %d ",
  2737. pdev->stats.tx.pkt_type[pkt_type].
  2738. mcs_count[i]);
  2739. }
  2740. }
  2741. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2742. mcs[0]);
  2743. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2744. pdev->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2745. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2746. mcs[1]);
  2747. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2748. pdev->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2749. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2750. mcs[2]);
  2751. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2752. pdev->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2753. DP_TRACE_STATS(FATAL, "Type 11AC MCS(0-9) = %s",
  2754. mcs[3]);
  2755. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2756. pdev->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2757. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2758. mcs[4]);
  2759. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2760. pdev->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2761. DP_TRACE_STATS(FATAL, "SGI ="
  2762. " 0.8us %d"
  2763. " 0.4us %d"
  2764. " 1.6us %d"
  2765. " 3.2us %d",
  2766. pdev->stats.tx.sgi_count[0],
  2767. pdev->stats.tx.sgi_count[1],
  2768. pdev->stats.tx.sgi_count[2],
  2769. pdev->stats.tx.sgi_count[3]);
  2770. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2771. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  2772. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  2773. DP_TRACE_STATS(FATAL, "OFDMA = %d", pdev->stats.tx.ofdma);
  2774. DP_TRACE_STATS(FATAL, "STBC = %d", pdev->stats.tx.stbc);
  2775. DP_TRACE_STATS(FATAL, "LDPC = %d", pdev->stats.tx.ldpc);
  2776. DP_TRACE_STATS(FATAL, "Retries = %d", pdev->stats.tx.retries);
  2777. DP_TRACE_STATS(FATAL, "Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  2778. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2779. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu = %d",
  2780. pdev->stats.tx.amsdu_cnt);
  2781. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation = %d",
  2782. pdev->stats.tx.non_amsdu_cnt);
  2783. }
  2784. /**
  2785. * dp_print_peer_stats():print peer stats
  2786. * @peer: DP_PEER handle
  2787. *
  2788. * return void
  2789. */
  2790. static inline void dp_print_peer_stats(struct dp_peer *peer)
  2791. {
  2792. uint8_t i, pkt_type;
  2793. char tx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2794. char rx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2795. uint32_t index;
  2796. char nss[DP_NSS_LENGTH];
  2797. DP_TRACE_STATS(FATAL, "Node Tx Stats:\n");
  2798. DP_TRACE_STATS(FATAL, "Total Packet Completions = %d",
  2799. peer->stats.tx.comp_pkt.num);
  2800. DP_TRACE_STATS(FATAL, "Total Bytes Completions = %d",
  2801. peer->stats.tx.comp_pkt.bytes);
  2802. DP_TRACE_STATS(FATAL, "Success Packets = %d",
  2803. peer->stats.tx.tx_success.num);
  2804. DP_TRACE_STATS(FATAL, "Success Bytes = %d",
  2805. peer->stats.tx.tx_success.bytes);
  2806. DP_TRACE_STATS(FATAL, "Packets Failed = %d",
  2807. peer->stats.tx.tx_failed);
  2808. DP_TRACE_STATS(FATAL, "Packets In OFDMA = %d",
  2809. peer->stats.tx.ofdma);
  2810. DP_TRACE_STATS(FATAL, "Packets In STBC = %d",
  2811. peer->stats.tx.stbc);
  2812. DP_TRACE_STATS(FATAL, "Packets In LDPC = %d",
  2813. peer->stats.tx.ldpc);
  2814. DP_TRACE_STATS(FATAL, "Packet Retries = %d",
  2815. peer->stats.tx.retries);
  2816. DP_TRACE_STATS(FATAL, "Msdu's Not Part of Ampdu = %d",
  2817. peer->stats.tx.non_amsdu_cnt);
  2818. DP_TRACE_STATS(FATAL, "Mpdu's Part of Ampdu = %d",
  2819. peer->stats.tx.amsdu_cnt);
  2820. DP_TRACE_STATS(FATAL, "Last Packet RSSI = %d",
  2821. peer->stats.tx.last_ack_rssi);
  2822. DP_TRACE_STATS(FATAL, "Dropped At FW: FW Discard = %d",
  2823. peer->stats.tx.dropped.fw_discard);
  2824. DP_TRACE_STATS(FATAL, "Dropped At FW: FW Discard Retired = %d",
  2825. peer->stats.tx.dropped.fw_discard_retired);
  2826. DP_TRACE_STATS(FATAL, "Dropped At FW: FW Discard Untransmitted = %d",
  2827. peer->stats.tx.dropped.fw_discard_untransmitted);
  2828. DP_TRACE_STATS(FATAL, "Dropped : Mpdu Age Out = %d",
  2829. peer->stats.tx.dropped.mpdu_age_out);
  2830. DP_TRACE_STATS(FATAL, "Dropped : FW Discard Reason1 = %d",
  2831. peer->stats.tx.dropped.fw_discard_reason1);
  2832. DP_TRACE_STATS(FATAL, "Dropped : FW Discard Reason2 = %d",
  2833. peer->stats.tx.dropped.fw_discard_reason2);
  2834. DP_TRACE_STATS(FATAL, "Dropped : FW Discard Reason3 = %d",
  2835. peer->stats.tx.dropped.fw_discard_reason3);
  2836. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2837. index = 0;
  2838. for (i = 0; i < MAX_MCS; i++) {
  2839. index += qdf_snprint(&tx_mcs[pkt_type][index],
  2840. DP_MCS_LENGTH - index,
  2841. " %d ",
  2842. peer->stats.tx.pkt_type[pkt_type].
  2843. mcs_count[i]);
  2844. }
  2845. }
  2846. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2847. tx_mcs[0]);
  2848. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2849. peer->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2850. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2851. tx_mcs[1]);
  2852. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2853. peer->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2854. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2855. tx_mcs[2]);
  2856. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2857. peer->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2858. DP_TRACE_STATS(FATAL, "11AC MCS(0-9) = %s",
  2859. tx_mcs[3]);
  2860. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2861. peer->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2862. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2863. tx_mcs[4]);
  2864. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2865. peer->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2866. DP_TRACE_STATS(FATAL, "SGI = "
  2867. " 0.8us %d"
  2868. " 0.4us %d"
  2869. " 1.6us %d"
  2870. " 3.2us %d",
  2871. peer->stats.tx.sgi_count[0],
  2872. peer->stats.tx.sgi_count[1],
  2873. peer->stats.tx.sgi_count[2],
  2874. peer->stats.tx.sgi_count[3]);
  2875. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  2876. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  2877. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  2878. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2879. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu = %d",
  2880. peer->stats.tx.amsdu_cnt);
  2881. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation = %d\n",
  2882. peer->stats.tx.non_amsdu_cnt);
  2883. DP_TRACE_STATS(FATAL, "Node Rx Stats:\n");
  2884. DP_TRACE_STATS(FATAL, "Packets Sent To Stack = %d",
  2885. peer->stats.rx.to_stack.num);
  2886. DP_TRACE_STATS(FATAL, "Bytes Sent To Stack = %d",
  2887. peer->stats.rx.to_stack.bytes);
  2888. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  2889. DP_TRACE_STATS(FATAL, "Packets Received = %d",
  2890. peer->stats.rx.rcvd_reo[i].num);
  2891. DP_TRACE_STATS(FATAL, "Bytes Received = %d",
  2892. peer->stats.rx.rcvd_reo[i].bytes);
  2893. }
  2894. DP_TRACE_STATS(FATAL, "Multicast Packets Received = %d",
  2895. peer->stats.rx.multicast.num);
  2896. DP_TRACE_STATS(FATAL, "Multicast Bytes Received = %d",
  2897. peer->stats.rx.multicast.bytes);
  2898. DP_TRACE_STATS(FATAL, "WDS Packets Received = %d",
  2899. peer->stats.rx.wds.num);
  2900. DP_TRACE_STATS(FATAL, "WDS Bytes Received = %d",
  2901. peer->stats.rx.wds.bytes);
  2902. DP_TRACE_STATS(FATAL, "Intra BSS Packets Received = %d",
  2903. peer->stats.rx.intra_bss.pkts.num);
  2904. DP_TRACE_STATS(FATAL, "Intra BSS Bytes Received = %d",
  2905. peer->stats.rx.intra_bss.pkts.bytes);
  2906. DP_TRACE_STATS(FATAL, "Raw Packets Received = %d",
  2907. peer->stats.rx.raw.num);
  2908. DP_TRACE_STATS(FATAL, "Raw Bytes Received = %d",
  2909. peer->stats.rx.raw.bytes);
  2910. DP_TRACE_STATS(FATAL, "Errors: MIC Errors = %d",
  2911. peer->stats.rx.err.mic_err);
  2912. DP_TRACE_STATS(FATAL, "Erros: Decryption Errors = %d",
  2913. peer->stats.rx.err.decrypt_err);
  2914. DP_TRACE_STATS(FATAL, "Msdu's Received As Part of Ampdu = %d",
  2915. peer->stats.rx.non_ampdu_cnt);
  2916. DP_TRACE_STATS(FATAL, "Msdu's Recived As Ampdu = %d",
  2917. peer->stats.rx.ampdu_cnt);
  2918. DP_TRACE_STATS(FATAL, "Msdu's Received Not Part of Amsdu's = %d",
  2919. peer->stats.rx.non_amsdu_cnt);
  2920. DP_TRACE_STATS(FATAL, "MSDUs Received As Part of Amsdu = %d",
  2921. peer->stats.rx.amsdu_cnt);
  2922. DP_TRACE_STATS(FATAL, "SGI ="
  2923. " 0.8us %d"
  2924. " 0.4us %d"
  2925. " 1.6us %d"
  2926. " 3.2us %d",
  2927. peer->stats.rx.sgi_count[0],
  2928. peer->stats.rx.sgi_count[1],
  2929. peer->stats.rx.sgi_count[2],
  2930. peer->stats.rx.sgi_count[3]);
  2931. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  2932. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  2933. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  2934. DP_TRACE_STATS(FATAL, "Reception Type ="
  2935. " SU %d,"
  2936. " MU_MIMO %d,"
  2937. " MU_OFDMA %d,"
  2938. " MU_OFDMA_MIMO %d",
  2939. peer->stats.rx.reception_type[0],
  2940. peer->stats.rx.reception_type[1],
  2941. peer->stats.rx.reception_type[2],
  2942. peer->stats.rx.reception_type[3]);
  2943. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2944. index = 0;
  2945. for (i = 0; i < MAX_MCS; i++) {
  2946. index += qdf_snprint(&rx_mcs[pkt_type][index],
  2947. DP_MCS_LENGTH - index,
  2948. " %d ",
  2949. peer->stats.rx.pkt_type[pkt_type].
  2950. mcs_count[i]);
  2951. }
  2952. }
  2953. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2954. rx_mcs[0]);
  2955. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2956. peer->stats.rx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2957. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2958. rx_mcs[1]);
  2959. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2960. peer->stats.rx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2961. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2962. rx_mcs[2]);
  2963. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2964. peer->stats.rx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2965. DP_TRACE_STATS(FATAL, "11AC MCS(0-9) = %s",
  2966. rx_mcs[3]);
  2967. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2968. peer->stats.rx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2969. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2970. rx_mcs[4]);
  2971. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2972. peer->stats.rx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2973. index = 0;
  2974. for (i = 0; i < SS_COUNT; i++) {
  2975. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2976. " %d", peer->stats.rx.nss[i]);
  2977. }
  2978. DP_TRACE_STATS(FATAL, "NSS(0-7) = %s\n",
  2979. nss);
  2980. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2981. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Ampdu = %d",
  2982. peer->stats.rx.ampdu_cnt);
  2983. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Mpdu Level Aggregation = %d",
  2984. peer->stats.rx.non_ampdu_cnt);
  2985. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu = %d",
  2986. peer->stats.rx.amsdu_cnt);
  2987. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation = %d",
  2988. peer->stats.rx.non_amsdu_cnt);
  2989. }
  2990. /**
  2991. * dp_print_host_stats()- Function to print the stats aggregated at host
  2992. * @vdev_handle: DP_VDEV handle
  2993. * @type: host stats type
  2994. *
  2995. * Available Stat types
  2996. * TXRX_CLEAR_STATS : Clear the stats
  2997. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  2998. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  2999. * TXRX_TX_HOST_STATS: Print Tx Stats
  3000. * TXRX_RX_HOST_STATS: Print Rx Stats
  3001. *
  3002. * Return: 0 on success, print error message in case of failure
  3003. */
  3004. static int
  3005. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  3006. {
  3007. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3008. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  3009. dp_aggregate_pdev_stats(pdev);
  3010. switch (type) {
  3011. case TXRX_CLEAR_STATS:
  3012. dp_txrx_host_stats_clr(vdev);
  3013. break;
  3014. case TXRX_RX_RATE_STATS:
  3015. dp_print_rx_rates(vdev);
  3016. break;
  3017. case TXRX_TX_RATE_STATS:
  3018. dp_print_tx_rates(vdev);
  3019. break;
  3020. case TXRX_TX_HOST_STATS:
  3021. dp_print_pdev_tx_stats(pdev);
  3022. dp_print_soc_tx_stats(pdev->soc);
  3023. break;
  3024. case TXRX_RX_HOST_STATS:
  3025. dp_print_pdev_rx_stats(pdev);
  3026. dp_print_soc_rx_stats(pdev->soc);
  3027. break;
  3028. default:
  3029. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  3030. break;
  3031. }
  3032. return 0;
  3033. }
  3034. /*
  3035. * dp_get_host_peer_stats()- function to print peer stats
  3036. * @pdev_handle: DP_PDEV handle
  3037. * @mac_addr: mac address of the peer
  3038. *
  3039. * Return: void
  3040. */
  3041. static void
  3042. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  3043. {
  3044. struct dp_peer *peer;
  3045. uint8_t local_id;
  3046. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  3047. &local_id);
  3048. if (!peer) {
  3049. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3050. "%s: Invalid peer\n", __func__);
  3051. return;
  3052. }
  3053. dp_print_peer_stats(peer);
  3054. dp_peer_rxtid_stats(peer);
  3055. return;
  3056. }
  3057. /*
  3058. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  3059. * @pdev_handle: DP_PDEV handle
  3060. *
  3061. * Return: void
  3062. */
  3063. static void
  3064. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  3065. {
  3066. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3067. pdev->enhanced_stats_en = 1;
  3068. }
  3069. /*
  3070. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  3071. * @pdev_handle: DP_PDEV handle
  3072. *
  3073. * Return: void
  3074. */
  3075. static void
  3076. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  3077. {
  3078. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3079. pdev->enhanced_stats_en = 0;
  3080. }
  3081. /*
  3082. * dp_get_fw_peer_stats()- function to print peer stats
  3083. * @pdev_handle: DP_PDEV handle
  3084. * @mac_addr: mac address of the peer
  3085. * @cap: Type of htt stats requested
  3086. *
  3087. * Currently Supporting only MAC ID based requests Only
  3088. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  3089. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  3090. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  3091. *
  3092. * Return: void
  3093. */
  3094. static void
  3095. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  3096. uint32_t cap)
  3097. {
  3098. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3099. uint32_t config_param0 = 0;
  3100. uint32_t config_param1 = 0;
  3101. uint32_t config_param2 = 0;
  3102. uint32_t config_param3 = 0;
  3103. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  3104. config_param0 |= (1 << (cap + 1));
  3105. config_param1 = 0x8f;
  3106. config_param2 |= (mac_addr[0] & 0x000000ff);
  3107. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  3108. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  3109. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  3110. config_param3 |= (mac_addr[4] & 0x000000ff);
  3111. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  3112. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  3113. config_param0, config_param1, config_param2,
  3114. config_param3);
  3115. }
  3116. /*
  3117. * dp_set_vdev_param: function to set parameters in vdev
  3118. * @param: parameter type to be set
  3119. * @val: value of parameter to be set
  3120. *
  3121. * return: void
  3122. */
  3123. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  3124. enum cdp_vdev_param_type param, uint32_t val)
  3125. {
  3126. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3127. switch (param) {
  3128. case CDP_ENABLE_WDS:
  3129. vdev->wds_enabled = val;
  3130. break;
  3131. case CDP_ENABLE_NAWDS:
  3132. vdev->nawds_enabled = val;
  3133. break;
  3134. case CDP_ENABLE_MCAST_EN:
  3135. vdev->mcast_enhancement_en = val;
  3136. break;
  3137. case CDP_ENABLE_PROXYSTA:
  3138. vdev->proxysta_vdev = val;
  3139. break;
  3140. case CDP_UPDATE_TDLS_FLAGS:
  3141. vdev->tdls_link_connected = val;
  3142. break;
  3143. default:
  3144. break;
  3145. }
  3146. dp_tx_vdev_update_search_flags(vdev);
  3147. }
  3148. /**
  3149. * dp_peer_set_nawds: set nawds bit in peer
  3150. * @peer_handle: pointer to peer
  3151. * @value: enable/disable nawds
  3152. *
  3153. * return: void
  3154. */
  3155. static void dp_peer_set_nawds(void *peer_handle, uint8_t value)
  3156. {
  3157. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3158. peer->nawds_enabled = value;
  3159. }
  3160. /*
  3161. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  3162. * @vdev_handle: DP_VDEV handle
  3163. * @map_id:ID of map that needs to be updated
  3164. *
  3165. * Return: void
  3166. */
  3167. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  3168. uint8_t map_id)
  3169. {
  3170. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3171. vdev->dscp_tid_map_id = map_id;
  3172. return;
  3173. }
  3174. /**
  3175. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  3176. * @pdev: DP_PDEV handle
  3177. * @map_id: ID of map that needs to be updated
  3178. * @tos: index value in map
  3179. * @tid: tid value passed by the user
  3180. *
  3181. * Return: void
  3182. */
  3183. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  3184. uint8_t map_id, uint8_t tos, uint8_t tid)
  3185. {
  3186. uint8_t dscp;
  3187. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  3188. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  3189. pdev->dscp_tid_map[map_id][dscp] = tid;
  3190. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  3191. map_id, dscp);
  3192. return;
  3193. }
  3194. /**
  3195. * dp_fw_stats_process(): Process TxRX FW stats request
  3196. * @vdev_handle: DP VDEV handle
  3197. * @val: value passed by user
  3198. *
  3199. * return: int
  3200. */
  3201. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle, uint32_t val)
  3202. {
  3203. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3204. struct dp_pdev *pdev = NULL;
  3205. if (!vdev) {
  3206. DP_TRACE(NONE, "VDEV not found");
  3207. return 1;
  3208. }
  3209. pdev = vdev->pdev;
  3210. return dp_h2t_ext_stats_msg_send(pdev, val, 0, 0, 0, 0);
  3211. }
  3212. /*
  3213. * dp_txrx_stats() - function to map to firmware and host stats
  3214. * @vdev: virtual handle
  3215. * @stats: type of statistics requested
  3216. *
  3217. * Return: integer
  3218. */
  3219. static int dp_txrx_stats(struct cdp_vdev *vdev, enum cdp_stats stats)
  3220. {
  3221. int host_stats;
  3222. int fw_stats;
  3223. if (stats >= CDP_TXRX_MAX_STATS)
  3224. return 0;
  3225. /*
  3226. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  3227. * has to be updated if new FW HTT stats added
  3228. */
  3229. if (stats > CDP_TXRX_STATS_HTT_MAX)
  3230. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  3231. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  3232. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  3233. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3234. "stats: %u fw_stats_type: %d host_stats_type: %d",
  3235. stats, fw_stats, host_stats);
  3236. if (fw_stats != TXRX_FW_STATS_INVALID)
  3237. return dp_fw_stats_process(vdev, fw_stats);
  3238. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  3239. (host_stats <= TXRX_HOST_STATS_MAX))
  3240. return dp_print_host_stats(vdev, host_stats);
  3241. else
  3242. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3243. "Wrong Input for TxRx Stats");
  3244. return 0;
  3245. }
  3246. /*
  3247. * dp_print_per_ring_stats(): Packet count per ring
  3248. * @soc - soc handle
  3249. */
  3250. static void dp_print_per_ring_stats(struct dp_soc *soc)
  3251. {
  3252. uint8_t core, ring;
  3253. uint64_t total_packets;
  3254. DP_TRACE(FATAL, "Reo packets per ring:");
  3255. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  3256. total_packets = 0;
  3257. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  3258. for (core = 0; core < NR_CPUS; core++) {
  3259. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  3260. core, soc->stats.rx.ring_packets[core][ring]);
  3261. total_packets += soc->stats.rx.ring_packets[core][ring];
  3262. }
  3263. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  3264. ring, total_packets);
  3265. }
  3266. }
  3267. /*
  3268. * dp_txrx_path_stats() - Function to display dump stats
  3269. * @soc - soc handle
  3270. *
  3271. * return: none
  3272. */
  3273. static void dp_txrx_path_stats(struct dp_soc *soc)
  3274. {
  3275. uint8_t error_code;
  3276. uint8_t loop_pdev;
  3277. struct dp_pdev *pdev;
  3278. uint8_t i;
  3279. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  3280. pdev = soc->pdev_list[loop_pdev];
  3281. dp_aggregate_pdev_stats(pdev);
  3282. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3283. "Tx path Statistics:");
  3284. DP_TRACE(FATAL, "from stack: %u msdus (%u bytes)",
  3285. pdev->stats.tx_i.rcvd.num,
  3286. pdev->stats.tx_i.rcvd.bytes);
  3287. DP_TRACE(FATAL, "processed from host: %u msdus (%u bytes)",
  3288. pdev->stats.tx_i.processed.num,
  3289. pdev->stats.tx_i.processed.bytes);
  3290. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%u bytes)",
  3291. pdev->stats.tx.tx_success.num,
  3292. pdev->stats.tx.tx_success.bytes);
  3293. DP_TRACE(FATAL, "Dropped in host:");
  3294. DP_TRACE(FATAL, "Total packets dropped: %u,",
  3295. pdev->stats.tx_i.dropped.dropped_pkt.num);
  3296. DP_TRACE(FATAL, "Descriptor not available: %u",
  3297. pdev->stats.tx_i.dropped.desc_na);
  3298. DP_TRACE(FATAL, "Ring full: %u",
  3299. pdev->stats.tx_i.dropped.ring_full);
  3300. DP_TRACE(FATAL, "Enqueue fail: %u",
  3301. pdev->stats.tx_i.dropped.enqueue_fail);
  3302. DP_TRACE(FATAL, "DMA Error: %u",
  3303. pdev->stats.tx_i.dropped.dma_error);
  3304. DP_TRACE(FATAL, "Dropped in hardware:");
  3305. DP_TRACE(FATAL, "total packets dropped: %u",
  3306. pdev->stats.tx.tx_failed);
  3307. DP_TRACE(FATAL, "mpdu age out: %u",
  3308. pdev->stats.tx.dropped.mpdu_age_out);
  3309. DP_TRACE(FATAL, "firmware discard reason1: %u",
  3310. pdev->stats.tx.dropped.fw_discard_reason1);
  3311. DP_TRACE(FATAL, "firmware discard reason2: %u",
  3312. pdev->stats.tx.dropped.fw_discard_reason2);
  3313. DP_TRACE(FATAL, "firmware discard reason3: %u",
  3314. pdev->stats.tx.dropped.fw_discard_reason3);
  3315. DP_TRACE(FATAL, "peer_invalid: %u",
  3316. pdev->soc->stats.tx.tx_invalid_peer.num);
  3317. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  3318. DP_TRACE(FATAL, "Single Packet: %u",
  3319. pdev->stats.tx_comp_histogram.pkts_1);
  3320. DP_TRACE(FATAL, "2-20 Packets: %u",
  3321. pdev->stats.tx_comp_histogram.pkts_2_20);
  3322. DP_TRACE(FATAL, "21-40 Packets: %u",
  3323. pdev->stats.tx_comp_histogram.pkts_21_40);
  3324. DP_TRACE(FATAL, "41-60 Packets: %u",
  3325. pdev->stats.tx_comp_histogram.pkts_41_60);
  3326. DP_TRACE(FATAL, "61-80 Packets: %u",
  3327. pdev->stats.tx_comp_histogram.pkts_61_80);
  3328. DP_TRACE(FATAL, "81-100 Packets: %u",
  3329. pdev->stats.tx_comp_histogram.pkts_81_100);
  3330. DP_TRACE(FATAL, "101-200 Packets: %u",
  3331. pdev->stats.tx_comp_histogram.pkts_101_200);
  3332. DP_TRACE(FATAL, " 201+ Packets: %u",
  3333. pdev->stats.tx_comp_histogram.pkts_201_plus);
  3334. DP_TRACE(FATAL, "Rx path statistics");
  3335. DP_TRACE(FATAL, "delivered %u msdus ( %u bytes),",
  3336. pdev->stats.rx.to_stack.num,
  3337. pdev->stats.rx.to_stack.bytes);
  3338. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  3339. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %u bytes),",
  3340. i, pdev->stats.rx.rcvd_reo[i].num,
  3341. pdev->stats.rx.rcvd_reo[i].bytes);
  3342. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %u bytes),",
  3343. pdev->stats.rx.intra_bss.pkts.num,
  3344. pdev->stats.rx.intra_bss.pkts.bytes);
  3345. DP_TRACE(FATAL, "raw packets %u msdus ( %u bytes),",
  3346. pdev->stats.rx.raw.num,
  3347. pdev->stats.rx.raw.bytes);
  3348. DP_TRACE(FATAL, "dropped: error %u msdus",
  3349. pdev->stats.rx.err.mic_err);
  3350. DP_TRACE(FATAL, "peer invalid %u",
  3351. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  3352. DP_TRACE(FATAL, "Reo Statistics");
  3353. DP_TRACE(FATAL, "rbm error: %u msdus",
  3354. pdev->soc->stats.rx.err.invalid_rbm);
  3355. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  3356. pdev->soc->stats.rx.err.hal_ring_access_fail);
  3357. DP_TRACE(FATAL, "Reo errors");
  3358. for (error_code = 0; error_code < REO_ERROR_TYPE_MAX;
  3359. error_code++) {
  3360. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  3361. error_code,
  3362. pdev->soc->stats.rx.err.reo_error[error_code]);
  3363. }
  3364. for (error_code = 0; error_code < MAX_RXDMA_ERRORS;
  3365. error_code++) {
  3366. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  3367. error_code,
  3368. pdev->soc->stats.rx.err
  3369. .rxdma_error[error_code]);
  3370. }
  3371. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  3372. DP_TRACE(FATAL, "Single Packet: %u",
  3373. pdev->stats.rx_ind_histogram.pkts_1);
  3374. DP_TRACE(FATAL, "2-20 Packets: %u",
  3375. pdev->stats.rx_ind_histogram.pkts_2_20);
  3376. DP_TRACE(FATAL, "21-40 Packets: %u",
  3377. pdev->stats.rx_ind_histogram.pkts_21_40);
  3378. DP_TRACE(FATAL, "41-60 Packets: %u",
  3379. pdev->stats.rx_ind_histogram.pkts_41_60);
  3380. DP_TRACE(FATAL, "61-80 Packets: %u",
  3381. pdev->stats.rx_ind_histogram.pkts_61_80);
  3382. DP_TRACE(FATAL, "81-100 Packets: %u",
  3383. pdev->stats.rx_ind_histogram.pkts_81_100);
  3384. DP_TRACE(FATAL, "101-200 Packets: %u",
  3385. pdev->stats.rx_ind_histogram.pkts_101_200);
  3386. DP_TRACE(FATAL, " 201+ Packets: %u",
  3387. pdev->stats.rx_ind_histogram.pkts_201_plus);
  3388. }
  3389. }
  3390. /*
  3391. * dp_txrx_dump_stats() - Dump statistics
  3392. * @value - Statistics option
  3393. */
  3394. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value)
  3395. {
  3396. struct dp_soc *soc =
  3397. (struct dp_soc *)psoc;
  3398. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3399. if (!soc) {
  3400. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3401. "%s: soc is NULL", __func__);
  3402. return QDF_STATUS_E_INVAL;
  3403. }
  3404. switch (value) {
  3405. case CDP_TXRX_PATH_STATS:
  3406. dp_txrx_path_stats(soc);
  3407. break;
  3408. case CDP_RX_RING_STATS:
  3409. dp_print_per_ring_stats(soc);
  3410. break;
  3411. case CDP_TXRX_TSO_STATS:
  3412. /* TODO: NOT IMPLEMENTED */
  3413. break;
  3414. case CDP_DUMP_TX_FLOW_POOL_INFO:
  3415. /* TODO: NOT IMPLEMENTED */
  3416. break;
  3417. case CDP_TXRX_DESC_STATS:
  3418. /* TODO: NOT IMPLEMENTED */
  3419. break;
  3420. default:
  3421. status = QDF_STATUS_E_INVAL;
  3422. break;
  3423. }
  3424. return status;
  3425. }
  3426. static struct cdp_wds_ops dp_ops_wds = {
  3427. .vdev_set_wds = dp_vdev_set_wds,
  3428. };
  3429. static struct cdp_cmn_ops dp_ops_cmn = {
  3430. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  3431. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  3432. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  3433. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  3434. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  3435. .txrx_peer_create = dp_peer_create_wifi3,
  3436. .txrx_peer_setup = dp_peer_setup_wifi3,
  3437. .txrx_peer_teardown = NULL,
  3438. .txrx_peer_delete = dp_peer_delete_wifi3,
  3439. .txrx_vdev_register = dp_vdev_register_wifi3,
  3440. .txrx_soc_detach = dp_soc_detach_wifi3,
  3441. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  3442. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  3443. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  3444. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  3445. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  3446. .delba_process = dp_delba_process_wifi3,
  3447. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  3448. .flush_cache_rx_queue = NULL,
  3449. /* TODO: get API's for dscp-tid need to be added*/
  3450. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  3451. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  3452. .txrx_stats = dp_txrx_stats,
  3453. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  3454. .display_stats = dp_txrx_dump_stats,
  3455. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  3456. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  3457. .txrx_intr_attach = dp_soc_interrupt_attach,
  3458. .txrx_intr_detach = dp_soc_interrupt_detach,
  3459. .set_pn_check = dp_set_pn_check_wifi3,
  3460. /* TODO: Add other functions */
  3461. };
  3462. static struct cdp_ctrl_ops dp_ops_ctrl = {
  3463. .txrx_peer_authorize = dp_peer_authorize,
  3464. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  3465. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  3466. #ifdef MESH_MODE_SUPPORT
  3467. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  3468. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  3469. #endif
  3470. .txrx_set_vdev_param = dp_set_vdev_param,
  3471. .txrx_peer_set_nawds = dp_peer_set_nawds,
  3472. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  3473. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  3474. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  3475. .txrx_update_filter_neighbour_peers =
  3476. dp_update_filter_neighbour_peers,
  3477. /* TODO: Add other functions */
  3478. .txrx_wdi_event_sub = dp_wdi_event_sub,
  3479. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  3480. };
  3481. static struct cdp_me_ops dp_ops_me = {
  3482. #ifdef ATH_SUPPORT_IQUE
  3483. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  3484. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  3485. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  3486. #endif
  3487. };
  3488. static struct cdp_mon_ops dp_ops_mon = {
  3489. .txrx_monitor_set_filter_ucast_data = NULL,
  3490. .txrx_monitor_set_filter_mcast_data = NULL,
  3491. .txrx_monitor_set_filter_non_data = NULL,
  3492. .txrx_monitor_get_filter_ucast_data = NULL,
  3493. .txrx_monitor_get_filter_mcast_data = NULL,
  3494. .txrx_monitor_get_filter_non_data = NULL,
  3495. .txrx_reset_monitor_mode = NULL,
  3496. };
  3497. static struct cdp_host_stats_ops dp_ops_host_stats = {
  3498. .txrx_per_peer_stats = dp_get_host_peer_stats,
  3499. .get_fw_peer_stats = dp_get_fw_peer_stats,
  3500. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  3501. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  3502. /* TODO */
  3503. };
  3504. static struct cdp_raw_ops dp_ops_raw = {
  3505. /* TODO */
  3506. };
  3507. #ifdef CONFIG_WIN
  3508. static struct cdp_pflow_ops dp_ops_pflow = {
  3509. /* TODO */
  3510. };
  3511. #endif /* CONFIG_WIN */
  3512. #ifdef DP_INTR_POLL_BASED
  3513. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  3514. {
  3515. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  3516. struct dp_soc *soc = pdev->soc;
  3517. qdf_timer_stop(&soc->int_timer);
  3518. return QDF_STATUS_SUCCESS;
  3519. }
  3520. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  3521. {
  3522. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  3523. struct dp_soc *soc = pdev->soc;
  3524. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3525. return QDF_STATUS_SUCCESS;
  3526. }
  3527. #else
  3528. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  3529. {
  3530. return QDF_STATUS_SUCCESS;
  3531. }
  3532. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  3533. {
  3534. return QDF_STATUS_SUCCESS;
  3535. }
  3536. #endif /* DP_INTR_POLL_BASED */
  3537. #ifndef CONFIG_WIN
  3538. static struct cdp_misc_ops dp_ops_misc = {
  3539. .get_opmode = dp_get_opmode,
  3540. #ifdef FEATURE_RUNTIME_PM
  3541. .runtime_suspend = dp_bus_suspend,
  3542. .runtime_resume = dp_bus_resume,
  3543. #endif
  3544. };
  3545. static struct cdp_flowctl_ops dp_ops_flowctl = {
  3546. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3547. };
  3548. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  3549. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3550. };
  3551. static struct cdp_ipa_ops dp_ops_ipa = {
  3552. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3553. };
  3554. static struct cdp_bus_ops dp_ops_bus = {
  3555. .bus_suspend = dp_bus_suspend,
  3556. .bus_resume = dp_bus_resume
  3557. };
  3558. static struct cdp_ocb_ops dp_ops_ocb = {
  3559. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3560. };
  3561. static struct cdp_throttle_ops dp_ops_throttle = {
  3562. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3563. };
  3564. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  3565. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3566. };
  3567. static struct cdp_cfg_ops dp_ops_cfg = {
  3568. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3569. };
  3570. static struct cdp_peer_ops dp_ops_peer = {
  3571. .register_peer = dp_register_peer,
  3572. .clear_peer = dp_clear_peer,
  3573. .find_peer_by_addr = dp_find_peer_by_addr,
  3574. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  3575. .local_peer_id = dp_local_peer_id,
  3576. .peer_find_by_local_id = dp_peer_find_by_local_id,
  3577. .peer_state_update = dp_peer_state_update,
  3578. .get_vdevid = dp_get_vdevid,
  3579. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  3580. .get_vdev_for_peer = dp_get_vdev_for_peer,
  3581. .get_peer_state = dp_get_peer_state,
  3582. .last_assoc_received = dp_get_last_assoc_received,
  3583. .last_disassoc_received = dp_get_last_disassoc_received,
  3584. .last_deauth_received = dp_get_last_deauth_received,
  3585. };
  3586. #endif
  3587. static struct cdp_ops dp_txrx_ops = {
  3588. .cmn_drv_ops = &dp_ops_cmn,
  3589. .ctrl_ops = &dp_ops_ctrl,
  3590. .me_ops = &dp_ops_me,
  3591. .mon_ops = &dp_ops_mon,
  3592. .host_stats_ops = &dp_ops_host_stats,
  3593. .wds_ops = &dp_ops_wds,
  3594. .raw_ops = &dp_ops_raw,
  3595. #ifdef CONFIG_WIN
  3596. .pflow_ops = &dp_ops_pflow,
  3597. #endif /* CONFIG_WIN */
  3598. #ifndef CONFIG_WIN
  3599. .misc_ops = &dp_ops_misc,
  3600. .cfg_ops = &dp_ops_cfg,
  3601. .flowctl_ops = &dp_ops_flowctl,
  3602. .l_flowctl_ops = &dp_ops_l_flowctl,
  3603. .ipa_ops = &dp_ops_ipa,
  3604. .bus_ops = &dp_ops_bus,
  3605. .ocb_ops = &dp_ops_ocb,
  3606. .peer_ops = &dp_ops_peer,
  3607. .throttle_ops = &dp_ops_throttle,
  3608. .mob_stats_ops = &dp_ops_mob_stats,
  3609. #endif
  3610. };
  3611. /*
  3612. * dp_soc_attach_wifi3() - Attach txrx SOC
  3613. * @osif_soc: Opaque SOC handle from OSIF/HDD
  3614. * @htc_handle: Opaque HTC handle
  3615. * @hif_handle: Opaque HIF handle
  3616. * @qdf_osdev: QDF device
  3617. *
  3618. * Return: DP SOC handle on success, NULL on failure
  3619. */
  3620. /*
  3621. * Local prototype added to temporarily address warning caused by
  3622. * -Wmissing-prototypes. A more correct solution, namely to expose
  3623. * a prototype in an appropriate header file, will come later.
  3624. */
  3625. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  3626. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  3627. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc);
  3628. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  3629. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  3630. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc)
  3631. {
  3632. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  3633. if (!soc) {
  3634. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3635. FL("DP SOC memory allocation failed"));
  3636. goto fail0;
  3637. }
  3638. soc->cdp_soc.ops = &dp_txrx_ops;
  3639. soc->cdp_soc.ol_ops = ol_ops;
  3640. soc->osif_soc = osif_soc;
  3641. soc->osdev = qdf_osdev;
  3642. soc->hif_handle = hif_handle;
  3643. soc->psoc = psoc;
  3644. soc->hal_soc = hif_get_hal_handle(hif_handle);
  3645. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  3646. soc->hal_soc, qdf_osdev);
  3647. if (!soc->htt_handle) {
  3648. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3649. FL("HTT attach failed"));
  3650. goto fail1;
  3651. }
  3652. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  3653. if (!soc->wlan_cfg_ctx) {
  3654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3655. FL("wlan_cfg_soc_attach failed"));
  3656. goto fail2;
  3657. }
  3658. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  3659. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc,
  3660. CDP_CFG_MAX_PEER_ID);
  3661. if (ret != -EINVAL) {
  3662. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  3663. }
  3664. }
  3665. qdf_spinlock_create(&soc->peer_ref_mutex);
  3666. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  3667. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  3668. return (void *)soc;
  3669. fail2:
  3670. htt_soc_detach(soc->htt_handle);
  3671. fail1:
  3672. qdf_mem_free(soc);
  3673. fail0:
  3674. return NULL;
  3675. }
  3676. #if defined(CONFIG_WIN) && WDI_EVENT_ENABLE
  3677. /*
  3678. * dp_set_pktlog_wifi3() - attach txrx vdev
  3679. * @pdev: Datapath PDEV handle
  3680. * @event: which event's notifications are being subscribed to
  3681. * @enable: WDI event subscribe or not. (True or False)
  3682. *
  3683. * Return: Success, NULL on failure
  3684. */
  3685. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  3686. bool enable)
  3687. {
  3688. struct dp_soc *soc = pdev->soc;
  3689. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  3690. if (enable) {
  3691. switch (event) {
  3692. case WDI_EVENT_RX_DESC:
  3693. if (pdev->monitor_vdev) {
  3694. /* Nothing needs to be done if monitor mode is
  3695. * enabled
  3696. */
  3697. return 0;
  3698. }
  3699. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  3700. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  3701. htt_tlv_filter.mpdu_start = 1;
  3702. htt_tlv_filter.msdu_start = 1;
  3703. htt_tlv_filter.msdu_end = 1;
  3704. htt_tlv_filter.mpdu_end = 1;
  3705. htt_tlv_filter.packet_header = 1;
  3706. htt_tlv_filter.attention = 1;
  3707. htt_tlv_filter.ppdu_start = 1;
  3708. htt_tlv_filter.ppdu_end = 1;
  3709. htt_tlv_filter.ppdu_end_user_stats = 1;
  3710. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3711. htt_tlv_filter.ppdu_end_status_done = 1;
  3712. htt_tlv_filter.enable_fp = 1;
  3713. htt_h2t_rx_ring_cfg(soc->htt_handle,
  3714. pdev->pdev_id,
  3715. pdev->rxdma_mon_status_ring.hal_srng,
  3716. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE,
  3717. &htt_tlv_filter);
  3718. }
  3719. break;
  3720. case WDI_EVENT_LITE_RX:
  3721. if (pdev->monitor_vdev) {
  3722. /* Nothing needs to be done if monitor mode is
  3723. * enabled
  3724. */
  3725. return 0;
  3726. }
  3727. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  3728. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  3729. htt_tlv_filter.ppdu_start = 1;
  3730. htt_tlv_filter.ppdu_end = 1;
  3731. htt_tlv_filter.ppdu_end_user_stats = 1;
  3732. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3733. htt_tlv_filter.ppdu_end_status_done = 1;
  3734. htt_tlv_filter.enable_fp = 1;
  3735. htt_h2t_rx_ring_cfg(soc->htt_handle,
  3736. pdev->pdev_id,
  3737. pdev->rxdma_mon_status_ring.hal_srng,
  3738. RXDMA_MONITOR_STATUS,
  3739. RX_BUFFER_SIZE_PKTLOG_LITE,
  3740. &htt_tlv_filter);
  3741. }
  3742. break;
  3743. default:
  3744. /* Nothing needs to be done for other pktlog types */
  3745. break;
  3746. }
  3747. } else {
  3748. switch (event) {
  3749. case WDI_EVENT_RX_DESC:
  3750. case WDI_EVENT_LITE_RX:
  3751. if (pdev->monitor_vdev) {
  3752. /* Nothing needs to be done if monitor mode is
  3753. * enabled
  3754. */
  3755. return 0;
  3756. }
  3757. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  3758. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  3759. /* htt_tlv_filter is initialized to 0 */
  3760. htt_h2t_rx_ring_cfg(soc->htt_handle,
  3761. pdev->pdev_id,
  3762. pdev->rxdma_mon_status_ring.hal_srng,
  3763. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE,
  3764. &htt_tlv_filter);
  3765. }
  3766. break;
  3767. default:
  3768. /* Nothing needs to be done for other pktlog types */
  3769. break;
  3770. }
  3771. }
  3772. return 0;
  3773. }
  3774. #endif