wcd937x.c 68 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/device.h>
  17. #include <linux/delay.h>
  18. #include <linux/kernel.h>
  19. #include <linux/component.h>
  20. #include <sound/soc.h>
  21. #include <sound/tlv.h>
  22. #include <soc/soundwire.h>
  23. #include <linux/regmap.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include "internal.h"
  27. #include "../wcdcal-hwdep.h"
  28. #include "wcd937x-registers.h"
  29. #include "../msm-cdc-pinctrl.h"
  30. #include <dt-bindings/sound/audio-codec-port-types.h>
  31. #include "../msm-cdc-supply.h"
  32. #define WCD9370_VARIANT 0
  33. #define WCD9375_VARIANT 5
  34. #define NUM_SWRS_DT_PARAMS 5
  35. #define WCD937X_VERSION_1_0 1
  36. #define WCD937X_VERSION_ENTRY_SIZE 32
  37. enum {
  38. CODEC_TX = 0,
  39. CODEC_RX,
  40. };
  41. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  42. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  43. static int wcd937x_handle_post_irq(void *data);
  44. static int wcd937x_reset(struct device *dev);
  45. static int wcd937x_reset_low(struct device *dev);
  46. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  47. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  48. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  49. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  57. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  58. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  59. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  60. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  63. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  64. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  65. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  66. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  67. };
  68. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  69. .name = "wcd937x",
  70. .irqs = wcd937x_irqs,
  71. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  72. .num_regs = 3,
  73. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  74. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  75. .ack_base = WCD937X_DIGITAL_INTR_CLEAR_0,
  76. .use_ack = 1,
  77. .clear_ack = 1,
  78. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  79. .runtime_pm = false,
  80. .handle_post_irq = wcd937x_handle_post_irq,
  81. .irq_drv_data = NULL,
  82. };
  83. static int wcd937x_handle_post_irq(void *data)
  84. {
  85. struct wcd937x_priv *wcd937x = data;
  86. u32 status1 = 0, status2 = 0, status3 = 0;
  87. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &status1);
  88. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &status2);
  89. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_2, &status3);
  90. wcd937x->tx_swr_dev->slave_irq_pending =
  91. ((status1 || status2 || status3) ? true : false);
  92. return IRQ_HANDLED;
  93. }
  94. static int wcd937x_init_reg(struct snd_soc_codec *codec)
  95. {
  96. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x0E, 0x0E);
  97. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x80, 0x80);
  98. usleep_range(1000, 1010);
  99. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x40, 0x40);
  100. usleep_range(1000, 1010);
  101. snd_soc_update_bits(codec, WCD937X_LDORXTX_CONFIG, 0x10, 0x00);
  102. snd_soc_update_bits(codec, WCD937X_BIAS_VBG_FINE_ADJ, 0xF0, 0x80);
  103. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x80, 0x80);
  104. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x40);
  105. usleep_range(10000, 10010);
  106. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x00);
  107. return 0;
  108. }
  109. static int wcd937x_set_port_params(struct snd_soc_codec *codec, u8 slv_prt_type,
  110. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  111. u8 *port_type, u8 path)
  112. {
  113. int i, j;
  114. u8 num_ports = 0;
  115. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  116. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  117. switch (path) {
  118. case CODEC_RX:
  119. map = &wcd937x->rx_port_mapping;
  120. num_ports = wcd937x->num_rx_ports;
  121. break;
  122. case CODEC_TX:
  123. map = &wcd937x->tx_port_mapping;
  124. num_ports = wcd937x->num_tx_ports;
  125. break;
  126. }
  127. for (i = 0; i <= num_ports; i++) {
  128. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  129. if ((*map)[i][j].slave_port_type == slv_prt_type)
  130. goto found;
  131. }
  132. }
  133. found:
  134. if (i > num_ports || j == MAX_CH_PER_PORT) {
  135. dev_err(codec->dev, "%s Failed to find slave port for type %u\n",
  136. __func__, slv_prt_type);
  137. return -EINVAL;
  138. }
  139. *port_id = i;
  140. *num_ch = (*map)[i][j].num_ch;
  141. *ch_mask = (*map)[i][j].ch_mask;
  142. *ch_rate = (*map)[i][j].ch_rate;
  143. *port_type = (*map)[i][j].master_port_type;
  144. return 0;
  145. }
  146. static int wcd937x_parse_port_mapping(struct device *dev,
  147. char *prop, u8 path)
  148. {
  149. u32 *dt_array, map_size, map_length;
  150. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  151. u32 slave_port_type, master_port_type;
  152. u32 i, ch_iter = 0;
  153. int ret = 0;
  154. u8 *num_ports = NULL;
  155. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  156. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  157. switch (path) {
  158. case CODEC_RX:
  159. map = &wcd937x->rx_port_mapping;
  160. num_ports = &wcd937x->num_rx_ports;
  161. break;
  162. case CODEC_TX:
  163. map = &wcd937x->tx_port_mapping;
  164. num_ports = &wcd937x->num_tx_ports;
  165. break;
  166. }
  167. if (!of_find_property(dev->of_node, prop,
  168. &map_size)) {
  169. dev_err(dev, "missing port mapping prop %s\n", prop);
  170. ret = -EINVAL;
  171. goto err;
  172. }
  173. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  174. dt_array = kzalloc(map_size, GFP_KERNEL);
  175. if (!dt_array) {
  176. ret = -ENOMEM;
  177. goto err;
  178. }
  179. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  180. NUM_SWRS_DT_PARAMS * map_length);
  181. if (ret) {
  182. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  183. __func__, prop);
  184. ret = -EINVAL;
  185. goto err_pdata_fail;
  186. }
  187. for (i = 0; i < map_length; i++) {
  188. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  189. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  190. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  191. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  192. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  193. if (port_num != old_port_num)
  194. ch_iter = 0;
  195. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  196. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  197. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  198. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  199. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  200. old_port_num = port_num;
  201. }
  202. *num_ports = port_num;
  203. kfree(dt_array);
  204. return 0;
  205. err_pdata_fail:
  206. kfree(dt_array);
  207. err:
  208. return ret;
  209. }
  210. static int wcd937x_tx_connect_port(struct snd_soc_codec *codec,
  211. u8 slv_port_type, u8 enable)
  212. {
  213. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  214. u8 port_id;
  215. u8 num_ch;
  216. u8 ch_mask;
  217. u32 ch_rate;
  218. u8 port_type;
  219. u8 num_port = 1;
  220. int ret = 0;
  221. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  222. &num_ch, &ch_mask, &ch_rate,
  223. &port_type, CODEC_TX);
  224. if (ret)
  225. return ret;
  226. if (enable)
  227. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  228. num_port, &ch_mask, &ch_rate,
  229. &num_ch, &port_type);
  230. else
  231. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  232. num_port, &ch_mask, &port_type);
  233. return ret;
  234. }
  235. static int wcd937x_rx_connect_port(struct snd_soc_codec *codec,
  236. u8 slv_port_type, u8 enable)
  237. {
  238. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  239. u8 port_id;
  240. u8 num_ch;
  241. u8 ch_mask;
  242. u32 ch_rate;
  243. u8 port_type;
  244. u8 num_port = 1;
  245. int ret = 0;
  246. ret = wcd937x_set_port_params(codec, slv_port_type, &port_id,
  247. &num_ch, &ch_mask, &ch_rate,
  248. &port_type, CODEC_RX);
  249. if (ret)
  250. return ret;
  251. if (enable)
  252. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  253. num_port, &ch_mask, &ch_rate,
  254. &num_ch, &port_type);
  255. else
  256. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  257. num_port, &ch_mask, &port_type);
  258. return ret;
  259. }
  260. static int wcd937x_rx_clk_enable(struct snd_soc_codec *codec)
  261. {
  262. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  263. if (wcd937x->rx_clk_cnt == 0) {
  264. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  265. 0x08, 0x08);
  266. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  267. 0x01, 0x01);
  268. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  269. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX0_CTL,
  270. 0x40, 0x00);
  271. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX1_CTL,
  272. 0x40, 0x00);
  273. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX2_CTL,
  274. 0x40, 0x00);
  275. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  276. 0x02, 0x02);
  277. }
  278. wcd937x->rx_clk_cnt++;
  279. return 0;
  280. }
  281. static int wcd937x_rx_clk_disable(struct snd_soc_codec *codec)
  282. {
  283. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  284. wcd937x->rx_clk_cnt--;
  285. if (wcd937x->rx_clk_cnt == 0) {
  286. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x40, 0x00);
  287. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x80, 0x00);
  288. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  289. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  290. 0x02, 0x00);
  291. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  292. 0x01, 0x00);
  293. }
  294. return 0;
  295. }
  296. /*
  297. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding codec
  298. * @codec: handle to snd_soc_codec *
  299. *
  300. * return wcd937x_mbhc handle or error code in case of failure
  301. */
  302. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec)
  303. {
  304. struct wcd937x_priv *wcd937x;
  305. if (!codec) {
  306. pr_err("%s: Invalid params, NULL codec\n", __func__);
  307. return NULL;
  308. }
  309. wcd937x = snd_soc_codec_get_drvdata(codec);
  310. if (!wcd937x) {
  311. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  312. return NULL;
  313. }
  314. return wcd937x->mbhc;
  315. }
  316. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  317. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  318. struct snd_kcontrol *kcontrol,
  319. int event)
  320. {
  321. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  322. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  323. int ret = 0;
  324. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  325. w->name, event);
  326. switch (event) {
  327. case SND_SOC_DAPM_PRE_PMU:
  328. wcd937x_rx_clk_enable(codec);
  329. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  330. 0x01, 0x01);
  331. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  332. 0x04, 0x04);
  333. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  334. 0x80, 0x00);
  335. break;
  336. case SND_SOC_DAPM_POST_PMU:
  337. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  338. 0x0F, 0x02);
  339. if (wcd937x->comp1_enable) {
  340. snd_soc_update_bits(codec,
  341. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  342. 0x02, 0x02);
  343. snd_soc_update_bits(codec,
  344. WCD937X_HPH_L_EN, 0x20, 0x00);
  345. } else {
  346. snd_soc_update_bits(codec,
  347. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  348. 0x02, 0x00);
  349. snd_soc_update_bits(codec,
  350. WCD937X_HPH_L_EN, 0x20, 0x20);
  351. }
  352. usleep_range(5000, 5010);
  353. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  354. 0x02, 0x00);
  355. break;
  356. case SND_SOC_DAPM_POST_PMD:
  357. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  358. wcd937x->rx_swr_dev->dev_num,
  359. false);
  360. break;
  361. }
  362. return ret;
  363. }
  364. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  365. struct snd_kcontrol *kcontrol,
  366. int event)
  367. {
  368. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  369. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  370. int ret = 0;
  371. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  372. w->name, event);
  373. switch (event) {
  374. case SND_SOC_DAPM_PRE_PMU:
  375. wcd937x_rx_clk_enable(codec);
  376. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  377. 0x02, 0x02);
  378. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  379. 0x08, 0x08);
  380. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  381. 0x80, 0x00);
  382. break;
  383. case SND_SOC_DAPM_POST_PMU:
  384. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  385. 0x0F, 0x02);
  386. if (wcd937x->comp2_enable) {
  387. snd_soc_update_bits(codec,
  388. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  389. 0x01, 0x01);
  390. snd_soc_update_bits(codec,
  391. WCD937X_HPH_R_EN, 0x20, 0x00);
  392. } else {
  393. snd_soc_update_bits(codec,
  394. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  395. 0x01, 0x00);
  396. snd_soc_update_bits(codec,
  397. WCD937X_HPH_R_EN, 0x20, 0x20);
  398. }
  399. usleep_range(5000, 5010);
  400. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  401. 0x02, 0x00);
  402. break;
  403. case SND_SOC_DAPM_POST_PMD:
  404. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  405. wcd937x->rx_swr_dev->dev_num,
  406. false);
  407. break;
  408. }
  409. return ret;
  410. }
  411. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  412. struct snd_kcontrol *kcontrol,
  413. int event)
  414. {
  415. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  416. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  417. int ret = 0;
  418. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  419. w->name, event);
  420. switch (event) {
  421. case SND_SOC_DAPM_PRE_PMU:
  422. wcd937x_rx_clk_enable(codec);
  423. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  424. 0x04, 0x04);
  425. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  426. 0x01, 0x01);
  427. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  428. 0x02, 0x02);
  429. usleep_range(5000, 5010);
  430. break;
  431. case SND_SOC_DAPM_POST_PMD:
  432. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  433. wcd937x->rx_swr_dev->dev_num,
  434. false);
  435. break;
  436. };
  437. return ret;
  438. }
  439. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  440. struct snd_kcontrol *kcontrol,
  441. int event)
  442. {
  443. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  444. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  445. int ret = 0;
  446. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  447. w->name, event);
  448. switch (event) {
  449. case SND_SOC_DAPM_PRE_PMU:
  450. wcd937x_rx_clk_enable(codec);
  451. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  452. 0x04, 0x04);
  453. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  454. 0x04, 0x04);
  455. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  456. 0x01, 0x01);
  457. break;
  458. case SND_SOC_DAPM_POST_PMD:
  459. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  460. wcd937x->rx_swr_dev->dev_num,
  461. false);
  462. wcd937x_rx_clk_disable(codec);
  463. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  464. 0x04, 0x00);
  465. break;
  466. };
  467. return ret;
  468. }
  469. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  470. struct snd_kcontrol *kcontrol,
  471. int event)
  472. {
  473. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  474. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  475. int ret = 0;
  476. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  477. w->name, event);
  478. switch (event) {
  479. case SND_SOC_DAPM_PRE_PMU:
  480. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x10);
  481. usleep_range(100, 110);
  482. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  483. wcd937x->rx_swr_dev->dev_num,
  484. true);
  485. break;
  486. case SND_SOC_DAPM_POST_PMU:
  487. usleep_range(7000, 7010);
  488. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  489. 0x02, 0x02);
  490. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  491. 0x02, 0x02);
  492. if (wcd937x->update_wcd_event)
  493. wcd937x->update_wcd_event(wcd937x->handle,
  494. WCD_BOLERO_EVT_RX_MUTE,
  495. (WCD_RX2 << 0x10));
  496. break;
  497. case SND_SOC_DAPM_PRE_PMD:
  498. if (wcd937x->update_wcd_event)
  499. wcd937x->update_wcd_event(wcd937x->handle,
  500. WCD_BOLERO_EVT_RX_MUTE,
  501. (WCD_RX2 << 0x10 | 0x1));
  502. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  503. WCD_EVENT_PRE_HPHR_PA_OFF,
  504. &wcd937x->mbhc->wcd_mbhc);
  505. break;
  506. case SND_SOC_DAPM_POST_PMD:
  507. usleep_range(7000, 7010);
  508. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  509. WCD_EVENT_POST_HPHR_PA_OFF,
  510. &wcd937x->mbhc->wcd_mbhc);
  511. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x00);
  512. break;
  513. };
  514. return ret;
  515. }
  516. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  517. struct snd_kcontrol *kcontrol,
  518. int event)
  519. {
  520. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  521. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  522. int ret = 0;
  523. switch (event) {
  524. case SND_SOC_DAPM_PRE_PMU:
  525. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x20);
  526. usleep_range(100, 110);
  527. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  528. wcd937x->rx_swr_dev->dev_num,
  529. true);
  530. break;
  531. case SND_SOC_DAPM_POST_PMU:
  532. usleep_range(7000, 7010);
  533. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  534. 0x02, 0x02);
  535. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  536. 0x02, 0x02);
  537. if (wcd937x->update_wcd_event)
  538. wcd937x->update_wcd_event(wcd937x->handle,
  539. WCD_BOLERO_EVT_RX_MUTE,
  540. (WCD_RX1 << 0x10));
  541. break;
  542. case SND_SOC_DAPM_PRE_PMD:
  543. if (wcd937x->update_wcd_event)
  544. wcd937x->update_wcd_event(wcd937x->handle,
  545. WCD_BOLERO_EVT_RX_MUTE,
  546. (WCD_RX1 << 0x10 | 0x1));
  547. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  548. WCD_EVENT_PRE_HPHL_PA_OFF,
  549. &wcd937x->mbhc->wcd_mbhc);
  550. break;
  551. case SND_SOC_DAPM_POST_PMD:
  552. usleep_range(7000, 7010);
  553. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  554. WCD_EVENT_POST_HPHL_PA_OFF,
  555. &wcd937x->mbhc->wcd_mbhc);
  556. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x00);
  557. break;
  558. };
  559. return ret;
  560. }
  561. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  562. struct snd_kcontrol *kcontrol,
  563. int event)
  564. {
  565. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  566. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  567. int ret = 0;
  568. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  569. w->name, event);
  570. switch (event) {
  571. case SND_SOC_DAPM_PRE_PMU:
  572. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  573. 0x80, 0x80);
  574. usleep_range(500, 510);
  575. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  576. usleep_range(500, 510);
  577. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  578. wcd937x->rx_swr_dev->dev_num,
  579. true);
  580. break;
  581. case SND_SOC_DAPM_POST_PMU:
  582. usleep_range(1000, 1010);
  583. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  584. 0x20, 0x20);
  585. if (wcd937x->update_wcd_event)
  586. wcd937x->update_wcd_event(wcd937x->handle,
  587. WCD_BOLERO_EVT_RX_MUTE,
  588. (WCD_RX3 << 0x10));
  589. break;
  590. case SND_SOC_DAPM_PRE_PMD:
  591. if (wcd937x->update_wcd_event)
  592. wcd937x->update_wcd_event(wcd937x->handle,
  593. WCD_BOLERO_EVT_RX_MUTE,
  594. (WCD_RX3 << 0x10 | 0x1));
  595. break;
  596. case SND_SOC_DAPM_POST_PMD:
  597. usleep_range(1000, 1010);
  598. usleep_range(1000, 1010);
  599. break;
  600. };
  601. return ret;
  602. }
  603. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  604. struct snd_kcontrol *kcontrol,
  605. int event)
  606. {
  607. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  608. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  609. int ret = 0;
  610. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  611. w->name, event);
  612. switch (event) {
  613. case SND_SOC_DAPM_PRE_PMU:
  614. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  615. 0x08, 0x08);
  616. usleep_range(500, 510);
  617. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  618. usleep_range(500, 510);
  619. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  620. wcd937x->rx_swr_dev->dev_num,
  621. true);
  622. break;
  623. case SND_SOC_DAPM_POST_PMU:
  624. usleep_range(6000, 6010);
  625. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  626. 0x02, 0x02);
  627. if (wcd937x->update_wcd_event)
  628. wcd937x->update_wcd_event(wcd937x->handle,
  629. WCD_BOLERO_EVT_RX_MUTE,
  630. (WCD_RX1 << 0x10));
  631. break;
  632. case SND_SOC_DAPM_PRE_PMD:
  633. if (wcd937x->update_wcd_event)
  634. wcd937x->update_wcd_event(wcd937x->handle,
  635. WCD_BOLERO_EVT_RX_MUTE,
  636. (WCD_RX1 << 0x10 | 0x1));
  637. break;
  638. case SND_SOC_DAPM_POST_PMD:
  639. usleep_range(7000, 7010);
  640. break;
  641. };
  642. return ret;
  643. }
  644. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  645. struct snd_kcontrol *kcontrol,
  646. int event)
  647. {
  648. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  649. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  650. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  651. w->name, event);
  652. switch (event) {
  653. case SND_SOC_DAPM_PRE_PMU:
  654. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  655. 0xF0, 0x80);
  656. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  657. 0xE0, 0xA0);
  658. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3,
  659. 0x02, 0x02);
  660. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2,
  661. 0xFF, 0x1C);
  662. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  663. 0x40, 0x40);
  664. usleep_range(100, 110);
  665. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  666. 0xE0, 0xE0);
  667. usleep_range(100, 110);
  668. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  669. 0x80, 0x80);
  670. usleep_range(500, 510);
  671. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  672. usleep_range(500, 510);
  673. wcd937x_rx_connect_port(codec, HPH_L, true);
  674. if (wcd937x->comp1_enable)
  675. wcd937x_rx_connect_port(codec, COMP_L, true);
  676. break;
  677. case SND_SOC_DAPM_POST_PMD:
  678. wcd937x_rx_connect_port(codec, HPH_L, false);
  679. if (wcd937x->comp1_enable)
  680. wcd937x_rx_connect_port(codec, COMP_L, false);
  681. wcd937x_rx_clk_disable(codec);
  682. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  683. 0x01, 0x00);
  684. break;
  685. };
  686. return 0;
  687. }
  688. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  689. struct snd_kcontrol *kcontrol, int event)
  690. {
  691. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  692. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  693. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  694. w->name, event);
  695. switch (event) {
  696. case SND_SOC_DAPM_PRE_PMU:
  697. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  698. 0xF0, 0x80);
  699. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  700. 0xE0, 0xA0);
  701. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  702. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  703. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  704. 0x40, 0x40);
  705. usleep_range(100, 110);
  706. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  707. 0xE0, 0xE0);
  708. usleep_range(100, 110);
  709. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  710. 0x80, 0x80);
  711. usleep_range(500, 510);
  712. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  713. usleep_range(500, 510);
  714. wcd937x_rx_connect_port(codec, HPH_R, true);
  715. if (wcd937x->comp2_enable)
  716. wcd937x_rx_connect_port(codec, COMP_R, true);
  717. break;
  718. case SND_SOC_DAPM_POST_PMD:
  719. wcd937x_rx_connect_port(codec, HPH_R, false);
  720. if (wcd937x->comp2_enable)
  721. wcd937x_rx_connect_port(codec, COMP_R, false);
  722. wcd937x_rx_clk_disable(codec);
  723. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  724. 0x02, 0x00);
  725. break;
  726. };
  727. return 0;
  728. }
  729. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  730. struct snd_kcontrol *kcontrol,
  731. int event)
  732. {
  733. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  734. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  735. w->name, event);
  736. switch (event) {
  737. case SND_SOC_DAPM_PRE_PMU:
  738. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  739. 0xE0, 0xA0);
  740. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  741. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  742. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  743. 0x40, 0x40);
  744. usleep_range(100, 110);
  745. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  746. 0xE0, 0xE0);
  747. usleep_range(100, 110);
  748. wcd937x_rx_connect_port(codec, LO, true);
  749. break;
  750. case SND_SOC_DAPM_POST_PMD:
  751. wcd937x_rx_connect_port(codec, LO, false);
  752. usleep_range(6000, 6010);
  753. wcd937x_rx_clk_disable(codec);
  754. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  755. 0x04, 0x00);
  756. break;
  757. }
  758. return 0;
  759. }
  760. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  761. struct snd_kcontrol *kcontrol,
  762. int event)
  763. {
  764. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  765. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  766. u16 dmic_clk_reg;
  767. s32 *dmic_clk_cnt;
  768. unsigned int dmic;
  769. char *wname;
  770. int ret = 0;
  771. wname = strpbrk(w->name, "012345");
  772. if (!wname) {
  773. dev_err(codec->dev, "%s: widget not found\n", __func__);
  774. return -EINVAL;
  775. }
  776. ret = kstrtouint(wname, 10, &dmic);
  777. if (ret < 0) {
  778. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  779. __func__);
  780. return -EINVAL;
  781. }
  782. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  783. w->name, event);
  784. switch (dmic) {
  785. case 0:
  786. case 1:
  787. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  788. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC0_CTL;
  789. break;
  790. case 2:
  791. case 3:
  792. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  793. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  794. break;
  795. case 4:
  796. case 5:
  797. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  798. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  799. break;
  800. default:
  801. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  802. __func__);
  803. return -EINVAL;
  804. };
  805. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  806. __func__, event, dmic, *dmic_clk_cnt);
  807. switch (event) {
  808. case SND_SOC_DAPM_PRE_PMU:
  809. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  810. 0x80, 0x80);
  811. snd_soc_update_bits(codec, dmic_clk_reg, 0x07, 0x02);
  812. snd_soc_update_bits(codec, dmic_clk_reg, 0x08, 0x08);
  813. snd_soc_update_bits(codec, dmic_clk_reg, 0x70, 0x20);
  814. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), true);
  815. break;
  816. case SND_SOC_DAPM_POST_PMD:
  817. wcd937x_tx_connect_port(codec, DMIC0 + (w->shift), false);
  818. break;
  819. };
  820. return 0;
  821. }
  822. /*
  823. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  824. * @micb_mv: micbias in mv
  825. *
  826. * return register value converted
  827. */
  828. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  829. {
  830. /* min micbias voltage is 1V and maximum is 2.85V */
  831. if (micb_mv < 1000 || micb_mv > 2850) {
  832. pr_err("%s: unsupported micbias voltage\n", __func__);
  833. return -EINVAL;
  834. }
  835. return (micb_mv - 1000) / 50;
  836. }
  837. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  838. /*
  839. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  840. * @codec: handle to snd_soc_codec *
  841. * @req_volt: micbias voltage to be set
  842. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  843. *
  844. * return 0 if adjustment is success or error code in case of failure
  845. */
  846. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
  847. int req_volt, int micb_num)
  848. {
  849. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  850. int cur_vout_ctl, req_vout_ctl;
  851. int micb_reg, micb_val, micb_en;
  852. int ret = 0;
  853. switch (micb_num) {
  854. case MIC_BIAS_1:
  855. micb_reg = WCD937X_ANA_MICB1;
  856. break;
  857. case MIC_BIAS_2:
  858. micb_reg = WCD937X_ANA_MICB2;
  859. break;
  860. case MIC_BIAS_3:
  861. micb_reg = WCD937X_ANA_MICB3;
  862. break;
  863. default:
  864. return -EINVAL;
  865. }
  866. mutex_lock(&wcd937x->micb_lock);
  867. /*
  868. * If requested micbias voltage is same as current micbias
  869. * voltage, then just return. Otherwise, adjust voltage as
  870. * per requested value. If micbias is already enabled, then
  871. * to avoid slow micbias ramp-up or down enable pull-up
  872. * momentarily, change the micbias value and then re-enable
  873. * micbias.
  874. */
  875. micb_val = snd_soc_read(codec, micb_reg);
  876. micb_en = (micb_val & 0xC0) >> 6;
  877. cur_vout_ctl = micb_val & 0x3F;
  878. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  879. if (req_vout_ctl < 0) {
  880. ret = -EINVAL;
  881. goto exit;
  882. }
  883. if (cur_vout_ctl == req_vout_ctl) {
  884. ret = 0;
  885. goto exit;
  886. }
  887. dev_dbg(codec->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  888. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  889. req_volt, micb_en);
  890. if (micb_en == 0x1)
  891. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  892. snd_soc_update_bits(codec, micb_reg, 0x3F, req_vout_ctl);
  893. if (micb_en == 0x1) {
  894. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  895. /*
  896. * Add 2ms delay as per HW requirement after enabling
  897. * micbias
  898. */
  899. usleep_range(2000, 2100);
  900. }
  901. exit:
  902. mutex_unlock(&wcd937x->micb_lock);
  903. return ret;
  904. }
  905. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  906. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  907. struct snd_kcontrol *kcontrol,
  908. int event)
  909. {
  910. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  911. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  912. int ret = 0;
  913. switch (event) {
  914. case SND_SOC_DAPM_PRE_PMU:
  915. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  916. wcd937x->tx_swr_dev->dev_num,
  917. true);
  918. break;
  919. case SND_SOC_DAPM_POST_PMD:
  920. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  921. wcd937x->tx_swr_dev->dev_num,
  922. false);
  923. break;
  924. };
  925. return ret;
  926. }
  927. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  928. struct snd_kcontrol *kcontrol,
  929. int event){
  930. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  931. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  932. w->name, event);
  933. switch (event) {
  934. case SND_SOC_DAPM_PRE_PMU:
  935. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  936. 0x80, 0x80);
  937. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  938. 0x08, 0x08);
  939. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  940. 0x10, 0x10);
  941. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), true);
  942. break;
  943. case SND_SOC_DAPM_POST_PMD:
  944. wcd937x_tx_connect_port(codec, ADC1 + (w->shift), false);
  945. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  946. 0x08, 0x00);
  947. break;
  948. };
  949. return 0;
  950. }
  951. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  952. struct snd_kcontrol *kcontrol, int event)
  953. {
  954. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  955. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  956. w->name, event);
  957. switch (event) {
  958. case SND_SOC_DAPM_PRE_PMU:
  959. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL,
  960. 0x02, 0x02);
  961. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL, 0x01,
  962. 0x00);
  963. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x40);
  964. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  965. 0x30, 0x30);
  966. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x80);
  967. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x00);
  968. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x80, 0x80);
  969. break;
  970. case SND_SOC_DAPM_POST_PMD:
  971. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x00);
  972. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  973. 0x10, 0x00);
  974. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  975. 0x10, 0x00);
  976. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  977. 0x80, 0x00);
  978. break;
  979. };
  980. return 0;
  981. }
  982. int wcd937x_micbias_control(struct snd_soc_codec *codec,
  983. int micb_num, int req, bool is_dapm)
  984. {
  985. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  986. int micb_index = micb_num - 1;
  987. u16 micb_reg;
  988. int pre_off_event = 0, post_off_event = 0;
  989. int post_on_event = 0, post_dapm_off = 0;
  990. int post_dapm_on = 0;
  991. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  992. dev_err(codec->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  993. __func__, micb_index);
  994. return -EINVAL;
  995. }
  996. switch (micb_num) {
  997. case MIC_BIAS_1:
  998. micb_reg = WCD937X_ANA_MICB1;
  999. break;
  1000. case MIC_BIAS_2:
  1001. micb_reg = WCD937X_ANA_MICB2;
  1002. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1003. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1004. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1005. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1006. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1007. break;
  1008. case MIC_BIAS_3:
  1009. micb_reg = WCD937X_ANA_MICB3;
  1010. break;
  1011. default:
  1012. dev_err(codec->dev, "%s: Invalid micbias number: %d\n",
  1013. __func__, micb_num);
  1014. return -EINVAL;
  1015. };
  1016. mutex_lock(&wcd937x->micb_lock);
  1017. switch (req) {
  1018. case MICB_PULLUP_ENABLE:
  1019. wcd937x->pullup_ref[micb_index]++;
  1020. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  1021. (wcd937x->micb_ref[micb_index] == 0))
  1022. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  1023. break;
  1024. case MICB_PULLUP_DISABLE:
  1025. if (wcd937x->pullup_ref[micb_index] > 0)
  1026. wcd937x->pullup_ref[micb_index]--;
  1027. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  1028. (wcd937x->micb_ref[micb_index] == 0))
  1029. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  1030. break;
  1031. case MICB_ENABLE:
  1032. wcd937x->micb_ref[micb_index]++;
  1033. if (wcd937x->micb_ref[micb_index] == 1) {
  1034. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0xE0, 0xE0);
  1035. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  1036. snd_soc_update_bits(codec, WCD937X_MICB1_TEST_CTL_2, 0x01, 0x01);
  1037. snd_soc_update_bits(codec, WCD937X_MICB2_TEST_CTL_2, 0x01, 0x01);
  1038. snd_soc_update_bits(codec, WCD937X_MICB3_TEST_CTL_2, 0x01, 0x01);
  1039. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  1040. if (post_on_event && wcd937x->mbhc)
  1041. blocking_notifier_call_chain(
  1042. &wcd937x->mbhc->notifier, post_on_event,
  1043. &wcd937x->mbhc->wcd_mbhc);
  1044. }
  1045. if (is_dapm && post_dapm_on && wcd937x->mbhc)
  1046. blocking_notifier_call_chain(
  1047. &wcd937x->mbhc->notifier, post_dapm_on,
  1048. &wcd937x->mbhc->wcd_mbhc);
  1049. break;
  1050. case MICB_DISABLE:
  1051. if (wcd937x->micb_ref[micb_index] > 0)
  1052. wcd937x->micb_ref[micb_index]--;
  1053. if ((wcd937x->micb_ref[micb_index] == 0) &&
  1054. (wcd937x->pullup_ref[micb_index] > 0))
  1055. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  1056. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  1057. (wcd937x->pullup_ref[micb_index] == 0)) {
  1058. if (pre_off_event && wcd937x->mbhc)
  1059. blocking_notifier_call_chain(
  1060. &wcd937x->mbhc->notifier, pre_off_event,
  1061. &wcd937x->mbhc->wcd_mbhc);
  1062. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  1063. if (post_off_event && wcd937x->mbhc)
  1064. blocking_notifier_call_chain(
  1065. &wcd937x->mbhc->notifier,
  1066. post_off_event,
  1067. &wcd937x->mbhc->wcd_mbhc);
  1068. }
  1069. if (is_dapm && post_dapm_off && wcd937x->mbhc)
  1070. blocking_notifier_call_chain(
  1071. &wcd937x->mbhc->notifier, post_dapm_off,
  1072. &wcd937x->mbhc->wcd_mbhc);
  1073. break;
  1074. };
  1075. dev_dbg(codec->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1076. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1077. wcd937x->pullup_ref[micb_index]);
  1078. mutex_unlock(&wcd937x->micb_lock);
  1079. return 0;
  1080. }
  1081. EXPORT_SYMBOL(wcd937x_micbias_control);
  1082. static int wcd937x_get_logical_addr(struct swr_device *swr_dev)
  1083. {
  1084. int ret = 0;
  1085. uint8_t devnum = 0;
  1086. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1087. if (ret) {
  1088. dev_err(&swr_dev->dev,
  1089. "%s get devnum %d for dev addr %lx failed\n",
  1090. __func__, devnum, swr_dev->addr);
  1091. swr_remove_device(swr_dev);
  1092. return ret;
  1093. }
  1094. swr_dev->dev_num = devnum;
  1095. return 0;
  1096. }
  1097. static int wcd937x_event_notify(struct notifier_block *block,
  1098. unsigned long val,
  1099. void *data)
  1100. {
  1101. u16 event = (val & 0xffff);
  1102. u16 amic = (val >> 0x10);
  1103. u16 mask = 0x40, reg = 0x0;
  1104. int ret = 0;
  1105. struct wcd937x_priv *wcd937x = dev_get_drvdata((struct device *)data);
  1106. struct snd_soc_codec *codec = wcd937x->codec;
  1107. struct wcd_mbhc *mbhc;
  1108. switch (event) {
  1109. case BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR:
  1110. if (amic == 0x1 || amic == 0x2)
  1111. reg = WCD937X_ANA_TX_CH2;
  1112. else if (amic == 0x3)
  1113. reg = WCD937X_ANA_TX_CH3_HPF;
  1114. else
  1115. return 0;
  1116. if (amic == 0x2)
  1117. mask = 0x20;
  1118. snd_soc_update_bits(codec, reg, mask, 0x00);
  1119. break;
  1120. case BOLERO_WCD_EVT_SSR_DOWN:
  1121. wcd937x_reset_low(wcd937x->dev);
  1122. break;
  1123. case BOLERO_WCD_EVT_SSR_UP:
  1124. wcd937x_reset(wcd937x->dev);
  1125. wcd937x_get_logical_addr(wcd937x->tx_swr_dev);
  1126. wcd937x_get_logical_addr(wcd937x->rx_swr_dev);
  1127. regcache_mark_dirty(wcd937x->regmap);
  1128. regcache_sync(wcd937x->regmap);
  1129. /* Initialize MBHC module */
  1130. mbhc = &wcd937x->mbhc->wcd_mbhc;
  1131. ret = wcd937x_mbhc_post_ssr_init(wcd937x->mbhc, codec);
  1132. if (ret) {
  1133. dev_err(codec->dev, "%s: mbhc initialization failed\n",
  1134. __func__);
  1135. } else {
  1136. wcd937x_mbhc_hs_detect(codec, mbhc->mbhc_cfg);
  1137. }
  1138. break;
  1139. default:
  1140. dev_err(codec->dev, "%s: invalid event %d\n", __func__, event);
  1141. break;
  1142. }
  1143. return 0;
  1144. }
  1145. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1146. int event)
  1147. {
  1148. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1149. int micb_num;
  1150. dev_dbg(codec->dev, "%s: wname: %s, event: %d\n",
  1151. __func__, w->name, event);
  1152. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1153. micb_num = MIC_BIAS_1;
  1154. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1155. micb_num = MIC_BIAS_2;
  1156. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1157. micb_num = MIC_BIAS_3;
  1158. else
  1159. return -EINVAL;
  1160. switch (event) {
  1161. case SND_SOC_DAPM_PRE_PMU:
  1162. wcd937x_micbias_control(codec, micb_num, MICB_ENABLE, true);
  1163. break;
  1164. case SND_SOC_DAPM_POST_PMU:
  1165. usleep_range(1000, 1100);
  1166. break;
  1167. case SND_SOC_DAPM_POST_PMD:
  1168. wcd937x_micbias_control(codec, micb_num, MICB_DISABLE, true);
  1169. break;
  1170. };
  1171. return 0;
  1172. }
  1173. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1174. struct snd_kcontrol *kcontrol,
  1175. int event)
  1176. {
  1177. return __wcd937x_codec_enable_micbias(w, event);
  1178. }
  1179. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1180. struct snd_ctl_elem_value *ucontrol)
  1181. {
  1182. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1183. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1184. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1185. return 0;
  1186. }
  1187. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1188. struct snd_ctl_elem_value *ucontrol)
  1189. {
  1190. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1191. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1192. u32 mode_val;
  1193. mode_val = ucontrol->value.enumerated.item[0];
  1194. dev_dbg(codec->dev, "%s: mode: %d\n", __func__, mode_val);
  1195. if (mode_val == 0) {
  1196. dev_warn(codec->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1197. __func__);
  1198. mode_val = 3; /* enum will be updated later */
  1199. }
  1200. wcd937x->hph_mode = mode_val;
  1201. return 0;
  1202. }
  1203. static int wcd937x_get_compander(struct snd_kcontrol *kcontrol,
  1204. struct snd_ctl_elem_value *ucontrol)
  1205. {
  1206. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1207. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1208. bool hphr;
  1209. struct soc_multi_mixer_control *mc;
  1210. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1211. hphr = mc->shift;
  1212. ucontrol->value.integer.value[0] = hphr ? wcd937x->comp2_enable :
  1213. wcd937x->comp1_enable;
  1214. return 0;
  1215. }
  1216. static int wcd937x_set_compander(struct snd_kcontrol *kcontrol,
  1217. struct snd_ctl_elem_value *ucontrol)
  1218. {
  1219. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  1220. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1221. int value = ucontrol->value.integer.value[0];
  1222. bool hphr;
  1223. struct soc_multi_mixer_control *mc;
  1224. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1225. hphr = mc->shift;
  1226. if (hphr)
  1227. wcd937x->comp2_enable = value;
  1228. else
  1229. wcd937x->comp1_enable = value;
  1230. return 0;
  1231. }
  1232. static int wcd937x_codec_enable_vdd_buck(struct snd_soc_dapm_widget *w,
  1233. struct snd_kcontrol *kcontrol,
  1234. int event)
  1235. {
  1236. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  1237. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1238. struct wcd937x_pdata *pdata = NULL;
  1239. int ret = 0;
  1240. pdata = dev_get_platdata(wcd937x->dev);
  1241. if (!pdata) {
  1242. dev_err(codec->dev, "%s: pdata is NULL\n", __func__);
  1243. return -EINVAL;
  1244. }
  1245. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  1246. w->name, event);
  1247. switch (event) {
  1248. case SND_SOC_DAPM_PRE_PMU:
  1249. ret = msm_cdc_enable_ondemand_supply(wcd937x->dev,
  1250. wcd937x->supplies,
  1251. pdata->regulator,
  1252. pdata->num_supplies,
  1253. "cdc-vdd-buck");
  1254. if (ret == -EINVAL) {
  1255. dev_err(codec->dev, "%s: vdd buck is not enabled\n",
  1256. __func__);
  1257. return ret;
  1258. }
  1259. /*
  1260. * 200us sleep is required after LDO15 is enabled as per
  1261. * HW requirement
  1262. */
  1263. usleep_range(200, 250);
  1264. break;
  1265. case SND_SOC_DAPM_POST_PMD:
  1266. ret = msm_cdc_disable_ondemand_supply(wcd937x->dev,
  1267. wcd937x->supplies,
  1268. pdata->regulator,
  1269. pdata->num_supplies,
  1270. "cdc-vdd-buck");
  1271. if (ret == -EINVAL) {
  1272. dev_err(codec->dev, "%s: vdd buck is not enabled\n",
  1273. __func__);
  1274. return ret;
  1275. }
  1276. break;
  1277. }
  1278. return 0;
  1279. }
  1280. static const char * const rx_hph_mode_mux_text[] = {
  1281. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1282. "CLS_H_ULP", "CLS_AB_HIFI",
  1283. };
  1284. static const struct soc_enum rx_hph_mode_mux_enum =
  1285. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1286. rx_hph_mode_mux_text);
  1287. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1288. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1289. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1290. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1291. wcd937x_get_compander, wcd937x_set_compander),
  1292. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1293. wcd937x_get_compander, wcd937x_set_compander),
  1294. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1295. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1296. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0, analog_gain),
  1297. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0, analog_gain),
  1298. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0, analog_gain),
  1299. };
  1300. static const struct snd_kcontrol_new adc1_switch[] = {
  1301. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1302. };
  1303. static const struct snd_kcontrol_new adc2_switch[] = {
  1304. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1305. };
  1306. static const struct snd_kcontrol_new adc3_switch[] = {
  1307. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1308. };
  1309. static const struct snd_kcontrol_new dmic1_switch[] = {
  1310. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1311. };
  1312. static const struct snd_kcontrol_new dmic2_switch[] = {
  1313. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1314. };
  1315. static const struct snd_kcontrol_new dmic3_switch[] = {
  1316. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1317. };
  1318. static const struct snd_kcontrol_new dmic4_switch[] = {
  1319. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1320. };
  1321. static const struct snd_kcontrol_new dmic5_switch[] = {
  1322. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1323. };
  1324. static const struct snd_kcontrol_new dmic6_switch[] = {
  1325. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1326. };
  1327. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1328. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1329. };
  1330. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1331. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1332. };
  1333. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1334. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1335. };
  1336. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1337. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1338. };
  1339. static const char * const adc2_mux_text[] = {
  1340. "INP2", "INP3"
  1341. };
  1342. static const char * const rdac3_mux_text[] = {
  1343. "RX1", "RX3"
  1344. };
  1345. static const struct soc_enum adc2_enum =
  1346. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1347. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1348. static const struct soc_enum rdac3_enum =
  1349. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1350. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1351. static const struct snd_kcontrol_new tx_adc2_mux =
  1352. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1353. static const struct snd_kcontrol_new rx_rdac3_mux =
  1354. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1355. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1356. /*input widgets*/
  1357. SND_SOC_DAPM_INPUT("AMIC1"),
  1358. SND_SOC_DAPM_INPUT("AMIC2"),
  1359. SND_SOC_DAPM_INPUT("AMIC3"),
  1360. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1361. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1362. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1363. /*tx widgets*/
  1364. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1365. wcd937x_codec_enable_adc,
  1366. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1367. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1368. wcd937x_codec_enable_adc,
  1369. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1370. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  1371. NULL, 0, wcd937x_enable_req,
  1372. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1373. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  1374. NULL, 0, wcd937x_enable_req,
  1375. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1376. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1377. &tx_adc2_mux),
  1378. /*tx mixers*/
  1379. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1380. adc1_switch, ARRAY_SIZE(adc1_switch),
  1381. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1382. SND_SOC_DAPM_POST_PMD),
  1383. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1384. adc2_switch, ARRAY_SIZE(adc2_switch),
  1385. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1386. SND_SOC_DAPM_POST_PMD),
  1387. /* micbias widgets*/
  1388. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1389. wcd937x_codec_enable_micbias,
  1390. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1391. SND_SOC_DAPM_POST_PMD),
  1392. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1393. wcd937x_codec_enable_micbias,
  1394. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1395. SND_SOC_DAPM_POST_PMD),
  1396. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1397. wcd937x_codec_enable_micbias,
  1398. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1399. SND_SOC_DAPM_POST_PMD),
  1400. SND_SOC_DAPM_SUPPLY("VDD_BUCK", SND_SOC_NOPM, 0, 0,
  1401. wcd937x_codec_enable_vdd_buck,
  1402. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1403. /*rx widgets*/
  1404. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  1405. wcd937x_codec_enable_ear_pa,
  1406. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1407. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1408. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  1409. wcd937x_codec_enable_aux_pa,
  1410. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1411. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1412. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  1413. wcd937x_codec_enable_hphl_pa,
  1414. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1415. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1416. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  1417. wcd937x_codec_enable_hphr_pa,
  1418. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1419. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1420. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1421. wcd937x_codec_hphl_dac_event,
  1422. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1423. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1424. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1425. wcd937x_codec_hphr_dac_event,
  1426. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1427. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1428. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1429. wcd937x_codec_ear_dac_event,
  1430. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1431. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1432. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  1433. wcd937x_codec_aux_dac_event,
  1434. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1435. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1436. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  1437. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1438. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1439. SND_SOC_DAPM_POST_PMD),
  1440. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1441. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1442. SND_SOC_DAPM_POST_PMD),
  1443. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  1444. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  1445. SND_SOC_DAPM_POST_PMD),
  1446. /* rx mixer widgets*/
  1447. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1448. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1449. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1450. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1451. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1452. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1453. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1454. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1455. /*output widgets tx*/
  1456. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1457. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1458. /*output widgets rx*/
  1459. SND_SOC_DAPM_OUTPUT("EAR"),
  1460. SND_SOC_DAPM_OUTPUT("AUX"),
  1461. SND_SOC_DAPM_OUTPUT("HPHL"),
  1462. SND_SOC_DAPM_OUTPUT("HPHR"),
  1463. };
  1464. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1465. /*input widgets*/
  1466. SND_SOC_DAPM_INPUT("AMIC4"),
  1467. /*tx widgets*/
  1468. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 2, 0,
  1469. wcd937x_codec_enable_adc,
  1470. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1471. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1472. NULL, 0, wcd937x_enable_req,
  1473. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1474. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1475. wcd937x_codec_enable_dmic,
  1476. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1477. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1478. wcd937x_codec_enable_dmic,
  1479. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1480. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 2, 0,
  1481. wcd937x_codec_enable_dmic,
  1482. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1483. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 3, 0,
  1484. wcd937x_codec_enable_dmic,
  1485. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1486. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 4, 0,
  1487. wcd937x_codec_enable_dmic,
  1488. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1489. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 5, 0,
  1490. wcd937x_codec_enable_dmic,
  1491. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1492. /*tx mixer widgets*/
  1493. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1494. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1495. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1496. SND_SOC_DAPM_POST_PMD),
  1497. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1498. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1499. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1500. SND_SOC_DAPM_POST_PMD),
  1501. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1502. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  1503. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1504. SND_SOC_DAPM_POST_PMD),
  1505. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1506. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  1507. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1508. SND_SOC_DAPM_POST_PMD),
  1509. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1510. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  1511. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1512. SND_SOC_DAPM_POST_PMD),
  1513. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1514. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  1515. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1516. SND_SOC_DAPM_POST_PMD),
  1517. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  1518. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  1519. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1520. /*output widgets*/
  1521. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1522. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1523. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1524. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1525. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1526. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1527. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1528. };
  1529. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1530. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1531. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1532. {"ADC1 REQ", NULL, "ADC1"},
  1533. {"ADC1", NULL, "AMIC1"},
  1534. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1535. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1536. {"ADC2 REQ", NULL, "ADC2"},
  1537. {"ADC2", NULL, "ADC2 MUX"},
  1538. {"ADC2 MUX", "INP3", "AMIC3"},
  1539. {"ADC2 MUX", "INP2", "AMIC2"},
  1540. {"RX1", NULL, "IN1_HPHL"},
  1541. {"RDAC1", NULL, "RX1"},
  1542. {"HPHL_RDAC", "Switch", "RDAC1"},
  1543. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1544. {"HPHL", NULL, "HPHL PGA"},
  1545. {"RX2", NULL, "IN2_HPHR"},
  1546. {"RDAC2", NULL, "RX2"},
  1547. {"HPHR_RDAC", "Switch", "RDAC2"},
  1548. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1549. {"HPHR", NULL, "HPHR PGA"},
  1550. {"RX3", NULL, "IN3_AUX"},
  1551. {"RDAC4", NULL, "RX3"},
  1552. {"AUX_RDAC", "Switch", "RDAC4"},
  1553. {"AUX PGA", NULL, "AUX_RDAC"},
  1554. {"AUX", NULL, "AUX PGA"},
  1555. {"RDAC3_MUX", "RX3", "RX3"},
  1556. {"RDAC3_MUX", "RX1", "RX1"},
  1557. {"RDAC3", NULL, "RDAC3_MUX"},
  1558. {"EAR_RDAC", "Switch", "RDAC3"},
  1559. {"EAR PGA", NULL, "EAR_RDAC"},
  1560. {"EAR", NULL, "EAR PGA"},
  1561. {"EAR", NULL, "VDD_BUCK"},
  1562. {"HPHR", NULL, "VDD_BUCK"},
  1563. {"HPHL", NULL, "VDD_BUCK"},
  1564. {"AUX", NULL, "VDD_BUCK"},
  1565. };
  1566. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1567. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1568. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1569. {"ADC3 REQ", NULL, "ADC3"},
  1570. {"ADC3", NULL, "AMIC4"},
  1571. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1572. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1573. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1574. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1575. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1576. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1577. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1578. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1579. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1580. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1581. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1582. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1583. };
  1584. static ssize_t wcd937x_version_read(struct snd_info_entry *entry,
  1585. void *file_private_data,
  1586. struct file *file,
  1587. char __user *buf, size_t count,
  1588. loff_t pos)
  1589. {
  1590. struct wcd937x_priv *priv;
  1591. char buffer[WCD937X_VERSION_ENTRY_SIZE];
  1592. int len = 0;
  1593. priv = (struct wcd937x_priv *) entry->private_data;
  1594. if (!priv) {
  1595. pr_err("%s: wcd937x priv is null\n", __func__);
  1596. return -EINVAL;
  1597. }
  1598. switch (priv->version) {
  1599. case WCD937X_VERSION_1_0:
  1600. len = snprintf(buffer, sizeof(buffer), "WCD937X_1_0\n");
  1601. break;
  1602. default:
  1603. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1604. }
  1605. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1606. }
  1607. static struct snd_info_entry_ops wcd937x_info_ops = {
  1608. .read = wcd937x_version_read,
  1609. };
  1610. /*
  1611. * wcd937x_info_create_codec_entry - creates wcd937x module
  1612. * @codec_root: The parent directory
  1613. * @codec: Codec instance
  1614. *
  1615. * Creates wcd937x module and version entry under the given
  1616. * parent directory.
  1617. *
  1618. * Return: 0 on success or negative error code on failure.
  1619. */
  1620. int wcd937x_info_create_codec_entry(struct snd_info_entry *codec_root,
  1621. struct snd_soc_codec *codec)
  1622. {
  1623. struct snd_info_entry *version_entry;
  1624. struct wcd937x_priv *priv;
  1625. struct snd_soc_card *card;
  1626. if (!codec_root || !codec)
  1627. return -EINVAL;
  1628. priv = snd_soc_codec_get_drvdata(codec);
  1629. if (priv->entry) {
  1630. dev_dbg(priv->dev,
  1631. "%s:wcd937x module already created\n", __func__);
  1632. return 0;
  1633. }
  1634. card = codec->component.card;
  1635. priv->entry = snd_info_create_subdir(codec_root->module,
  1636. "wcd937x", codec_root);
  1637. if (!priv->entry) {
  1638. dev_dbg(codec->dev, "%s: failed to create wcd937x entry\n",
  1639. __func__);
  1640. return -ENOMEM;
  1641. }
  1642. version_entry = snd_info_create_card_entry(card->snd_card,
  1643. "version",
  1644. priv->entry);
  1645. if (!version_entry) {
  1646. dev_dbg(codec->dev, "%s: failed to create wcd937x version entry\n",
  1647. __func__);
  1648. return -ENOMEM;
  1649. }
  1650. version_entry->private_data = priv;
  1651. version_entry->size = WCD937X_VERSION_ENTRY_SIZE;
  1652. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1653. version_entry->c.ops = &wcd937x_info_ops;
  1654. if (snd_info_register(version_entry) < 0) {
  1655. snd_info_free_entry(version_entry);
  1656. return -ENOMEM;
  1657. }
  1658. priv->version_entry = version_entry;
  1659. return 0;
  1660. }
  1661. EXPORT_SYMBOL(wcd937x_info_create_codec_entry);
  1662. static int wcd937x_soc_codec_probe(struct snd_soc_codec *codec)
  1663. {
  1664. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1665. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  1666. int variant;
  1667. int ret = -EINVAL;
  1668. dev_info(codec->dev, "%s()\n", __func__);
  1669. wcd937x = snd_soc_codec_get_drvdata(codec);
  1670. if (!wcd937x)
  1671. return -EINVAL;
  1672. wcd937x->codec = codec;
  1673. variant = (snd_soc_read(codec, WCD937X_DIGITAL_EFUSE_REG_0) & 0x0E) >> 1;
  1674. wcd937x->variant = variant;
  1675. wcd937x->fw_data = devm_kzalloc(codec->dev,
  1676. sizeof(*(wcd937x->fw_data)),
  1677. GFP_KERNEL);
  1678. if (!wcd937x->fw_data) {
  1679. dev_err(codec->dev, "Failed to allocate fw_data\n");
  1680. ret = -ENOMEM;
  1681. goto err;
  1682. }
  1683. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  1684. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  1685. WCD9XXX_CODEC_HWDEP_NODE, codec);
  1686. if (ret < 0) {
  1687. dev_err(codec->dev, "%s hwdep failed %d\n", __func__, ret);
  1688. goto err_hwdep;
  1689. }
  1690. ret = wcd937x_mbhc_init(&wcd937x->mbhc, codec, wcd937x->fw_data);
  1691. if (ret) {
  1692. pr_err("%s: mbhc initialization failed\n", __func__);
  1693. goto err_hwdep;
  1694. }
  1695. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1696. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1697. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1698. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1699. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1700. snd_soc_dapm_ignore_suspend(dapm, "IN3_AUX");
  1701. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1702. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1703. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1704. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  1705. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1706. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1707. snd_soc_dapm_sync(dapm);
  1708. wcd937x_init_reg(codec);
  1709. if (wcd937x->variant == WCD9375_VARIANT) {
  1710. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  1711. ARRAY_SIZE(wcd9375_dapm_widgets));
  1712. if (ret < 0) {
  1713. dev_err(codec->dev, "%s: Failed to add snd_ctls\n",
  1714. __func__);
  1715. goto err_hwdep;
  1716. }
  1717. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  1718. ARRAY_SIZE(wcd9375_audio_map));
  1719. if (ret < 0) {
  1720. dev_err(codec->dev, "%s: Failed to add routes\n",
  1721. __func__);
  1722. goto err_hwdep;
  1723. }
  1724. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  1725. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1726. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1727. snd_soc_dapm_ignore_suspend(dapm, "DMIC3_OUTPUT");
  1728. snd_soc_dapm_ignore_suspend(dapm, "DMIC4_OUTPUT");
  1729. snd_soc_dapm_ignore_suspend(dapm, "DMIC5_OUTPUT");
  1730. snd_soc_dapm_ignore_suspend(dapm, "DMIC6_OUTPUT");
  1731. snd_soc_dapm_ignore_suspend(dapm, "ADC3_OUTPUT");
  1732. snd_soc_dapm_sync(dapm);
  1733. }
  1734. wcd937x->version = WCD937X_VERSION_1_0;
  1735. /* Register event notifier */
  1736. wcd937x->nblock.notifier_call = wcd937x_event_notify;
  1737. if (wcd937x->register_notifier) {
  1738. ret = wcd937x->register_notifier(wcd937x->handle,
  1739. &wcd937x->nblock,
  1740. true);
  1741. if (ret) {
  1742. dev_err(codec->dev,
  1743. "%s: Failed to register notifier %d\n",
  1744. __func__, ret);
  1745. return ret;
  1746. }
  1747. }
  1748. return ret;
  1749. err_hwdep:
  1750. wcd937x->fw_data = NULL;
  1751. err:
  1752. return ret;
  1753. }
  1754. static int wcd937x_soc_codec_remove(struct snd_soc_codec *codec)
  1755. {
  1756. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1757. if (!wcd937x)
  1758. return -EINVAL;
  1759. if (wcd937x->register_notifier)
  1760. return wcd937x->register_notifier(wcd937x->handle,
  1761. &wcd937x->nblock,
  1762. false);
  1763. return 0;
  1764. }
  1765. static struct regmap *wcd937x_get_regmap(struct device *dev)
  1766. {
  1767. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1768. return wcd937x->regmap;
  1769. }
  1770. static struct snd_soc_codec_driver soc_codec_dev_wcd937x = {
  1771. .probe = wcd937x_soc_codec_probe,
  1772. .remove = wcd937x_soc_codec_remove,
  1773. .get_regmap = wcd937x_get_regmap,
  1774. .component_driver = {
  1775. .controls = wcd937x_snd_controls,
  1776. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  1777. .dapm_widgets = wcd937x_dapm_widgets,
  1778. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  1779. .dapm_routes = wcd937x_audio_map,
  1780. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  1781. },
  1782. };
  1783. static int wcd937x_reset(struct device *dev)
  1784. {
  1785. struct wcd937x_priv *wcd937x = NULL;
  1786. int rc = 0;
  1787. int value = 0;
  1788. if (!dev)
  1789. return -ENODEV;
  1790. wcd937x = dev_get_drvdata(dev);
  1791. if (!wcd937x)
  1792. return -EINVAL;
  1793. if (!wcd937x->rst_np) {
  1794. dev_err(dev, "%s: reset gpio device node not specified\n",
  1795. __func__);
  1796. return -EINVAL;
  1797. }
  1798. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  1799. if (value > 0)
  1800. return 0;
  1801. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1802. if (rc) {
  1803. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1804. __func__);
  1805. return rc;
  1806. }
  1807. /* 20ms sleep required after pulling the reset gpio to LOW */
  1808. usleep_range(20, 30);
  1809. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  1810. if (rc) {
  1811. dev_err(dev, "%s: wcd active state request fail!\n",
  1812. __func__);
  1813. return rc;
  1814. }
  1815. /* 20ms sleep required after pulling the reset gpio to HIGH */
  1816. usleep_range(20, 30);
  1817. return rc;
  1818. }
  1819. static int wcd937x_read_of_property_u32(struct device *dev, const char *name,
  1820. u32 *val)
  1821. {
  1822. int rc = 0;
  1823. rc = of_property_read_u32(dev->of_node, name, val);
  1824. if (rc)
  1825. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1826. __func__, name, dev->of_node->full_name);
  1827. return rc;
  1828. }
  1829. static void wcd937x_dt_parse_micbias_info(struct device *dev,
  1830. struct wcd937x_micbias_setting *mb)
  1831. {
  1832. u32 prop_val = 0;
  1833. int rc = 0;
  1834. /* MB1 */
  1835. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1836. NULL)) {
  1837. rc = wcd937x_read_of_property_u32(dev,
  1838. "qcom,cdc-micbias1-mv",
  1839. &prop_val);
  1840. if (!rc)
  1841. mb->micb1_mv = prop_val;
  1842. } else {
  1843. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1844. __func__);
  1845. }
  1846. /* MB2 */
  1847. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1848. NULL)) {
  1849. rc = wcd937x_read_of_property_u32(dev,
  1850. "qcom,cdc-micbias2-mv",
  1851. &prop_val);
  1852. if (!rc)
  1853. mb->micb2_mv = prop_val;
  1854. } else {
  1855. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1856. __func__);
  1857. }
  1858. /* MB3 */
  1859. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1860. NULL)) {
  1861. rc = wcd937x_read_of_property_u32(dev,
  1862. "qcom,cdc-micbias3-mv",
  1863. &prop_val);
  1864. if (!rc)
  1865. mb->micb3_mv = prop_val;
  1866. } else {
  1867. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1868. __func__);
  1869. }
  1870. }
  1871. static int wcd937x_reset_low(struct device *dev)
  1872. {
  1873. struct wcd937x_priv *wcd937x = NULL;
  1874. int rc = 0;
  1875. if (!dev)
  1876. return -ENODEV;
  1877. wcd937x = dev_get_drvdata(dev);
  1878. if (!wcd937x)
  1879. return -EINVAL;
  1880. if (!wcd937x->rst_np) {
  1881. dev_err(dev, "%s: reset gpio device node not specified\n",
  1882. __func__);
  1883. return -EINVAL;
  1884. }
  1885. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1886. if (rc) {
  1887. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1888. __func__);
  1889. return rc;
  1890. }
  1891. /* 20ms sleep required after pulling the reset gpio to LOW */
  1892. usleep_range(20, 30);
  1893. return rc;
  1894. }
  1895. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  1896. {
  1897. struct wcd937x_pdata *pdata = NULL;
  1898. pdata = devm_kzalloc(dev, sizeof(struct wcd937x_pdata),
  1899. GFP_KERNEL);
  1900. if (!pdata)
  1901. return NULL;
  1902. pdata->rst_np = of_parse_phandle(dev->of_node,
  1903. "qcom,wcd-rst-gpio-node", 0);
  1904. if (!pdata->rst_np) {
  1905. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1906. __func__, "qcom,wcd-rst-gpio-node",
  1907. dev->of_node->full_name);
  1908. return NULL;
  1909. }
  1910. /* Parse power supplies */
  1911. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  1912. &pdata->num_supplies);
  1913. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  1914. dev_err(dev, "%s: no power supplies defined for codec\n",
  1915. __func__);
  1916. return NULL;
  1917. }
  1918. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1919. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1920. wcd937x_dt_parse_micbias_info(dev, &pdata->micbias);
  1921. return pdata;
  1922. }
  1923. static int wcd937x_bind(struct device *dev)
  1924. {
  1925. int ret = 0, i = 0;
  1926. struct wcd937x_priv *wcd937x = NULL;
  1927. struct wcd937x_pdata *pdata = NULL;
  1928. struct wcd_ctrl_platform_data *plat_data = NULL;
  1929. wcd937x = devm_kzalloc(dev, sizeof(struct wcd937x_priv), GFP_KERNEL);
  1930. if (!wcd937x)
  1931. return -ENOMEM;
  1932. dev_set_drvdata(dev, wcd937x);
  1933. pdata = wcd937x_populate_dt_data(dev);
  1934. if (!pdata) {
  1935. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1936. return -EINVAL;
  1937. }
  1938. wcd937x->dev = dev;
  1939. wcd937x->dev->platform_data = pdata;
  1940. wcd937x->rst_np = pdata->rst_np;
  1941. ret = msm_cdc_init_supplies(dev, &wcd937x->supplies,
  1942. pdata->regulator, pdata->num_supplies);
  1943. if (!wcd937x->supplies) {
  1944. dev_err(dev, "%s: Cannot init wcd supplies\n",
  1945. __func__);
  1946. return ret;
  1947. }
  1948. plat_data = dev_get_platdata(dev->parent);
  1949. if (!plat_data) {
  1950. dev_err(dev, "%s: platform data from parent is NULL\n",
  1951. __func__);
  1952. return -EINVAL;
  1953. }
  1954. wcd937x->handle = (void *)plat_data->handle;
  1955. if (!wcd937x->handle) {
  1956. dev_err(dev, "%s: handle is NULL\n", __func__);
  1957. return -EINVAL;
  1958. }
  1959. wcd937x->update_wcd_event = plat_data->update_wcd_event;
  1960. if (!wcd937x->update_wcd_event) {
  1961. dev_err(dev, "%s: update_wcd_event api is null!\n",
  1962. __func__);
  1963. return -EINVAL;
  1964. }
  1965. wcd937x->register_notifier = plat_data->register_notifier;
  1966. if (!wcd937x->register_notifier) {
  1967. dev_err(dev, "%s: register_notifier api is null!\n",
  1968. __func__);
  1969. return -EINVAL;
  1970. }
  1971. ret = msm_cdc_enable_static_supplies(dev, wcd937x->supplies,
  1972. pdata->regulator,
  1973. pdata->num_supplies);
  1974. if (ret) {
  1975. dev_err(dev, "%s: wcd static supply enable failed!\n",
  1976. __func__);
  1977. return ret;
  1978. }
  1979. wcd937x_reset(dev);
  1980. /*
  1981. * Add 5msec delay to provide sufficient time for
  1982. * soundwire auto enumeration of slave devices as
  1983. * as per HW requirement.
  1984. */
  1985. usleep_range(5000, 5010);
  1986. ret = component_bind_all(dev, wcd937x);
  1987. if (ret) {
  1988. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  1989. __func__, ret);
  1990. return ret;
  1991. }
  1992. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  1993. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  1994. if (ret) {
  1995. dev_err(dev, "Failed to read port mapping\n");
  1996. goto err;
  1997. }
  1998. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  1999. if (!wcd937x->rx_swr_dev) {
  2000. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2001. __func__);
  2002. ret = -ENODEV;
  2003. goto err;
  2004. }
  2005. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2006. if (!wcd937x->tx_swr_dev) {
  2007. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2008. __func__);
  2009. ret = -ENODEV;
  2010. goto err;
  2011. }
  2012. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  2013. &wcd937x_regmap_config);
  2014. if (!wcd937x->regmap) {
  2015. dev_err(dev, "%s: Regmap init failed\n",
  2016. __func__);
  2017. goto err;
  2018. }
  2019. /* Set all interupts as edge triggered */
  2020. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  2021. regmap_write(wcd937x->regmap,
  2022. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  2023. wcd937x_regmap_irq_chip.irq_drv_data = wcd937x;
  2024. wcd937x->irq_info.wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  2025. wcd937x->irq_info.codec_name = "WCD937X";
  2026. wcd937x->irq_info.regmap = wcd937x->regmap;
  2027. wcd937x->irq_info.dev = dev;
  2028. ret = wcd_irq_init(&wcd937x->irq_info, &wcd937x->virq);
  2029. if (ret) {
  2030. dev_err(dev, "%s: IRQ init failed: %d\n",
  2031. __func__, ret);
  2032. goto err;
  2033. }
  2034. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  2035. mutex_init(&wcd937x->micb_lock);
  2036. ret = snd_soc_register_codec(dev, &soc_codec_dev_wcd937x,
  2037. NULL, 0);
  2038. if (ret) {
  2039. dev_err(dev, "%s: Codec registration failed\n",
  2040. __func__);
  2041. goto err_irq;
  2042. }
  2043. return ret;
  2044. err_irq:
  2045. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2046. err:
  2047. component_unbind_all(dev, wcd937x);
  2048. return ret;
  2049. }
  2050. static void wcd937x_unbind(struct device *dev)
  2051. {
  2052. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  2053. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2054. snd_soc_unregister_codec(dev);
  2055. component_unbind_all(dev, wcd937x);
  2056. mutex_destroy(&wcd937x->micb_lock);
  2057. }
  2058. static const struct of_device_id wcd937x_dt_match[] = {
  2059. { .compatible = "qcom,wcd937x-codec" },
  2060. {}
  2061. };
  2062. static const struct component_master_ops wcd937x_comp_ops = {
  2063. .bind = wcd937x_bind,
  2064. .unbind = wcd937x_unbind,
  2065. };
  2066. static int wcd937x_compare_of(struct device *dev, void *data)
  2067. {
  2068. return dev->of_node == data;
  2069. }
  2070. static void wcd937x_release_of(struct device *dev, void *data)
  2071. {
  2072. of_node_put(data);
  2073. }
  2074. static int wcd937x_add_slave_components(struct device *dev,
  2075. struct component_match **matchptr)
  2076. {
  2077. struct device_node *np, *rx_node, *tx_node;
  2078. np = dev->of_node;
  2079. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2080. if (!rx_node) {
  2081. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2082. return -ENODEV;
  2083. }
  2084. of_node_get(rx_node);
  2085. component_match_add_release(dev, matchptr,
  2086. wcd937x_release_of,
  2087. wcd937x_compare_of,
  2088. rx_node);
  2089. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2090. if (!tx_node) {
  2091. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2092. return -ENODEV;
  2093. }
  2094. of_node_get(tx_node);
  2095. component_match_add_release(dev, matchptr,
  2096. wcd937x_release_of,
  2097. wcd937x_compare_of,
  2098. tx_node);
  2099. return 0;
  2100. }
  2101. static int wcd937x_probe(struct platform_device *pdev)
  2102. {
  2103. struct component_match *match = NULL;
  2104. int ret;
  2105. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  2106. if (ret)
  2107. return ret;
  2108. return component_master_add_with_match(&pdev->dev,
  2109. &wcd937x_comp_ops, match);
  2110. }
  2111. static int wcd937x_remove(struct platform_device *pdev)
  2112. {
  2113. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  2114. return 0;
  2115. }
  2116. static struct platform_driver wcd937x_codec_driver = {
  2117. .probe = wcd937x_probe,
  2118. .remove = wcd937x_remove,
  2119. .driver = {
  2120. .name = "wcd937x_codec",
  2121. .owner = THIS_MODULE,
  2122. .of_match_table = of_match_ptr(wcd937x_dt_match),
  2123. },
  2124. };
  2125. module_platform_driver(wcd937x_codec_driver);
  2126. MODULE_DESCRIPTION("WCD937X Codec driver");
  2127. MODULE_LICENSE("GPL v2");