6c7fcf1d61
In BE architecture, HW provides basic vdev stats support for upto 48 vdevs. For each vdev, there is vdev_stats_id which represents the id of this vdev on HW. This vdev_stats_id is assigned by host and is conveyed to HW at the time of REO TID Queue setup for the peer. Add logic for allocation and deallocation of vdev_stats_id and convey this id to HW. Change-Id: If5611bf54d057ccf71c6444b5c79a26eb28df87e CRs-Fixed: 3067843
78 linhas
2.6 KiB
C
78 linhas
2.6 KiB
C
/*
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _HAL_LI_API_H_
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#define _HAL_LI_API_H_
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#include "hal_li_hw_headers.h"
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#include "hal_api.h"
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/**
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* hal_set_link_desc_addr_li - Setup link descriptor in a buffer_addr_info
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* HW structure
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*
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* @desc: Descriptor entry (from WBM_IDLE_LINK ring)
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* @cookie: SW cookie for the buffer/descriptor
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* @link_desc_paddr: Physical address of link descriptor entry
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* @bm_id: idle link BM id
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*/
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void hal_set_link_desc_addr_li(void *desc, uint32_t cookie,
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qdf_dma_addr_t link_desc_paddr,
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uint8_t bm_id);
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/**
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* hal_tx_init_data_ring_li() - Initialize all the TCL Descriptors in SRNG
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* @hal_soc_hdl: Handle to HAL SoC structure
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* @hal_srng: Handle to HAL SRNG structure
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*
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* Return: none
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*/
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void hal_tx_init_data_ring_li(hal_soc_handle_t hal_soc_hdl,
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hal_ring_handle_t hal_ring_hdl);
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/**
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* hal_hw_txrx_default_ops_attach_li(): Add default ops for Lithium chips
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* @ hal_soc_hdl: hal_soc handle
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*
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* Return: None
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*/
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void hal_hw_txrx_default_ops_attach_li(struct hal_soc *soc);
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uint32_t hal_rx_wbm_err_src_get_li(hal_ring_desc_t ring_desc);
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uint8_t hal_rx_ret_buf_manager_get_li(hal_ring_desc_t ring_desc);
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/**
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* hal_reo_qdesc_setup - Setup HW REO queue descriptor
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*
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* @hal_soc: Opaque HAL SOC handle
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* @ba_window_size: BlockAck window size
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* @start_seq: Starting sequence number
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* @hw_qdesc_vaddr: Virtual address of REO queue descriptor memory
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* @hw_qdesc_paddr: Physical address of REO queue descriptor memory
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* @pn_type: PN type (one of the types defined in 'enum hal_pn_type')
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* @vdev_stats_id: vdev_stats_id
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*/
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void hal_reo_qdesc_setup_li(hal_soc_handle_t hal_soc_hdl,
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int tid, uint32_t ba_window_size,
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uint32_t start_seq, void *hw_qdesc_vaddr,
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qdf_dma_addr_t hw_qdesc_paddr,
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int pn_type, uint8_t vdev_stats_id);
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#endif /* _HAL_LI_API_H_ */
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