dp_rx.c 54 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898
  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #ifdef RX_DESC_DEBUG_CHECK
  31. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  32. {
  33. rx_desc->magic = DP_RX_DESC_MAGIC;
  34. rx_desc->nbuf = nbuf;
  35. }
  36. #else
  37. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  38. {
  39. rx_desc->nbuf = nbuf;
  40. }
  41. #endif
  42. #ifdef CONFIG_WIN
  43. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  44. {
  45. return vdev->ap_bridge_enabled;
  46. }
  47. #else
  48. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  49. {
  50. if (vdev->opmode != wlan_op_mode_sta)
  51. return true;
  52. else
  53. return false;
  54. }
  55. #endif
  56. /*
  57. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  58. * called during dp rx initialization
  59. * and at the end of dp_rx_process.
  60. *
  61. * @soc: core txrx main context
  62. * @mac_id: mac_id which is one of 3 mac_ids
  63. * @dp_rxdma_srng: dp rxdma circular ring
  64. * @rx_desc_pool: Pointer to free Rx descriptor pool
  65. * @num_req_buffers: number of buffer to be replenished
  66. * @desc_list: list of descs if called from dp_rx_process
  67. * or NULL during dp rx initialization or out of buffer
  68. * interrupt.
  69. * @tail: tail of descs list
  70. * Return: return success or failure
  71. */
  72. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  73. struct dp_srng *dp_rxdma_srng,
  74. struct rx_desc_pool *rx_desc_pool,
  75. uint32_t num_req_buffers,
  76. union dp_rx_desc_list_elem_t **desc_list,
  77. union dp_rx_desc_list_elem_t **tail)
  78. {
  79. uint32_t num_alloc_desc;
  80. uint16_t num_desc_to_free = 0;
  81. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  82. uint32_t num_entries_avail;
  83. uint32_t count;
  84. int sync_hw_ptr = 1;
  85. qdf_dma_addr_t paddr;
  86. qdf_nbuf_t rx_netbuf;
  87. void *rxdma_ring_entry;
  88. union dp_rx_desc_list_elem_t *next;
  89. QDF_STATUS ret;
  90. void *rxdma_srng;
  91. rxdma_srng = dp_rxdma_srng->hal_srng;
  92. if (!rxdma_srng) {
  93. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  94. "rxdma srng not initialized");
  95. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  96. return QDF_STATUS_E_FAILURE;
  97. }
  98. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  99. "requested %d buffers for replenish", num_req_buffers);
  100. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  101. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  102. rxdma_srng,
  103. sync_hw_ptr);
  104. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  105. "no of available entries in rxdma ring: %d",
  106. num_entries_avail);
  107. if (!(*desc_list) && (num_entries_avail >
  108. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  109. num_req_buffers = num_entries_avail;
  110. } else if (num_entries_avail < num_req_buffers) {
  111. num_desc_to_free = num_req_buffers - num_entries_avail;
  112. num_req_buffers = num_entries_avail;
  113. }
  114. if (qdf_unlikely(!num_req_buffers)) {
  115. num_desc_to_free = num_req_buffers;
  116. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  117. goto free_descs;
  118. }
  119. /*
  120. * if desc_list is NULL, allocate the descs from freelist
  121. */
  122. if (!(*desc_list)) {
  123. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  124. rx_desc_pool,
  125. num_req_buffers,
  126. desc_list,
  127. tail);
  128. if (!num_alloc_desc) {
  129. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  130. "no free rx_descs in freelist");
  131. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  132. num_req_buffers);
  133. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  134. return QDF_STATUS_E_NOMEM;
  135. }
  136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  137. "%d rx desc allocated", num_alloc_desc);
  138. num_req_buffers = num_alloc_desc;
  139. }
  140. count = 0;
  141. while (count < num_req_buffers) {
  142. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  143. RX_BUFFER_SIZE,
  144. RX_BUFFER_RESERVATION,
  145. RX_BUFFER_ALIGNMENT,
  146. FALSE);
  147. if (rx_netbuf == NULL) {
  148. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  149. continue;
  150. }
  151. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  152. QDF_DMA_BIDIRECTIONAL);
  153. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  154. qdf_nbuf_free(rx_netbuf);
  155. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  156. continue;
  157. }
  158. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  159. /*
  160. * check if the physical address of nbuf->data is
  161. * less then 0x50000000 then free the nbuf and try
  162. * allocating new nbuf. We can try for 100 times.
  163. * this is a temp WAR till we fix it properly.
  164. */
  165. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  166. if (ret == QDF_STATUS_E_FAILURE) {
  167. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  168. break;
  169. }
  170. count++;
  171. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  172. rxdma_srng);
  173. qdf_assert_always(rxdma_ring_entry);
  174. next = (*desc_list)->next;
  175. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  176. (*desc_list)->rx_desc.in_use = 1;
  177. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  178. "rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  179. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  180. (unsigned long long)paddr, (*desc_list)->rx_desc.cookie);
  181. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  182. (*desc_list)->rx_desc.cookie,
  183. rx_desc_pool->owner);
  184. *desc_list = next;
  185. }
  186. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  187. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  188. "successfully replenished %d buffers", num_req_buffers);
  189. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  190. "%d rx desc added back to free list", num_desc_to_free);
  191. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, num_req_buffers,
  192. (RX_BUFFER_SIZE * num_req_buffers));
  193. free_descs:
  194. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  195. /*
  196. * add any available free desc back to the free list
  197. */
  198. if (*desc_list)
  199. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  200. mac_id, rx_desc_pool);
  201. return QDF_STATUS_SUCCESS;
  202. }
  203. /*
  204. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  205. * pkts to RAW mode simulation to
  206. * decapsulate the pkt.
  207. *
  208. * @vdev: vdev on which RAW mode is enabled
  209. * @nbuf_list: list of RAW pkts to process
  210. * @peer: peer object from which the pkt is rx
  211. *
  212. * Return: void
  213. */
  214. void
  215. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  216. struct dp_peer *peer)
  217. {
  218. qdf_nbuf_t deliver_list_head = NULL;
  219. qdf_nbuf_t deliver_list_tail = NULL;
  220. qdf_nbuf_t nbuf;
  221. nbuf = nbuf_list;
  222. while (nbuf) {
  223. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  224. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  225. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  226. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  227. /*
  228. * reset the chfrag_start and chfrag_end bits in nbuf cb
  229. * as this is a non-amsdu pkt and RAW mode simulation expects
  230. * these bit s to be 0 for non-amsdu pkt.
  231. */
  232. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  233. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  234. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  235. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  236. }
  237. nbuf = next;
  238. }
  239. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  240. &deliver_list_tail, (struct cdp_peer*) peer);
  241. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  242. }
  243. #ifdef DP_LFR
  244. /*
  245. * In case of LFR, data of a new peer might be sent up
  246. * even before peer is added.
  247. */
  248. static inline struct dp_vdev *
  249. dp_get_vdev_from_peer(struct dp_soc *soc,
  250. uint16_t peer_id,
  251. struct dp_peer *peer,
  252. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  253. {
  254. struct dp_vdev *vdev;
  255. uint8_t vdev_id;
  256. if (unlikely(!peer)) {
  257. if (peer_id != HTT_INVALID_PEER) {
  258. vdev_id = DP_PEER_METADATA_ID_GET(
  259. mpdu_desc_info.peer_meta_data);
  260. QDF_TRACE(QDF_MODULE_ID_DP,
  261. QDF_TRACE_LEVEL_DEBUG,
  262. FL("PeerID %d not found use vdevID %d"),
  263. peer_id, vdev_id);
  264. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  265. vdev_id);
  266. } else {
  267. QDF_TRACE(QDF_MODULE_ID_DP,
  268. QDF_TRACE_LEVEL_DEBUG,
  269. FL("Invalid PeerID %d"),
  270. peer_id);
  271. return NULL;
  272. }
  273. } else {
  274. vdev = peer->vdev;
  275. }
  276. return vdev;
  277. }
  278. #else
  279. static inline struct dp_vdev *
  280. dp_get_vdev_from_peer(struct dp_soc *soc,
  281. uint16_t peer_id,
  282. struct dp_peer *peer,
  283. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  284. {
  285. if (unlikely(!peer)) {
  286. QDF_TRACE(QDF_MODULE_ID_DP,
  287. QDF_TRACE_LEVEL_DEBUG,
  288. FL("Peer not found for peerID %d"),
  289. peer_id);
  290. return NULL;
  291. } else {
  292. return peer->vdev;
  293. }
  294. }
  295. #endif
  296. /**
  297. * dp_rx_da_learn() - Add AST entry based on DA lookup
  298. * This is a WAR for HK 1.0 and will
  299. * be removed in HK 2.0
  300. *
  301. * @soc: core txrx main context
  302. * @rx_tlv_hdr : start address of rx tlvs
  303. * @ta_peer : Transmitter peer entry
  304. * @nbuf : nbuf to retrieve destination mac for which AST will be added
  305. *
  306. */
  307. #ifdef FEATURE_WDS
  308. static void
  309. dp_rx_da_learn(struct dp_soc *soc,
  310. uint8_t *rx_tlv_hdr,
  311. struct dp_peer *ta_peer,
  312. qdf_nbuf_t nbuf)
  313. {
  314. /* For HKv2 DA port learing is not needed */
  315. if (qdf_likely(soc->ast_override_support))
  316. return;
  317. if (ta_peer && (ta_peer->vdev->opmode != wlan_op_mode_ap))
  318. return;
  319. if (qdf_unlikely(!hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  320. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  321. dp_peer_add_ast(soc,
  322. ta_peer,
  323. qdf_nbuf_data(nbuf),
  324. CDP_TXRX_AST_TYPE_DA,
  325. IEEE80211_NODE_F_WDS_HM);
  326. }
  327. }
  328. #else
  329. static void
  330. dp_rx_da_learn(struct dp_soc *soc,
  331. uint8_t *rx_tlv_hdr,
  332. struct dp_peer *ta_peer,
  333. qdf_nbuf_t nbuf)
  334. {
  335. }
  336. #endif
  337. /**
  338. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  339. *
  340. * @soc: core txrx main context
  341. * @ta_peer : source peer entry
  342. * @rx_tlv_hdr : start address of rx tlvs
  343. * @nbuf : nbuf that has to be intrabss forwarded
  344. *
  345. * Return: bool: true if it is forwarded else false
  346. */
  347. static bool
  348. dp_rx_intrabss_fwd(struct dp_soc *soc,
  349. struct dp_peer *ta_peer,
  350. uint8_t *rx_tlv_hdr,
  351. qdf_nbuf_t nbuf)
  352. {
  353. uint16_t da_idx;
  354. uint16_t len;
  355. struct dp_peer *da_peer;
  356. struct dp_ast_entry *ast_entry;
  357. qdf_nbuf_t nbuf_copy;
  358. /* check if the destination peer is available in peer table
  359. * and also check if the source peer and destination peer
  360. * belong to the same vap and destination peer is not bss peer.
  361. */
  362. if ((hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  363. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  364. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  365. ast_entry = soc->ast_table[da_idx];
  366. if (!ast_entry)
  367. return false;
  368. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  369. ast_entry->is_active = TRUE;
  370. return false;
  371. }
  372. da_peer = ast_entry->peer;
  373. if (!da_peer)
  374. return false;
  375. /* TA peer cannot be same as peer(DA) on which AST is present
  376. * this indicates a change in topology and that AST entries
  377. * are yet to be updated.
  378. */
  379. if (da_peer == ta_peer)
  380. return false;
  381. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  382. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  383. len = qdf_nbuf_len(nbuf);
  384. /* linearize the nbuf just before we send to
  385. * dp_tx_send()
  386. */
  387. if (qdf_unlikely(qdf_nbuf_get_ext_list(nbuf))) {
  388. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  389. return false;
  390. nbuf = qdf_nbuf_unshare(nbuf);
  391. if (!nbuf) {
  392. DP_STATS_INC_PKT(ta_peer,
  393. rx.intra_bss.fail,
  394. 1,
  395. len);
  396. /* return true even though the pkt is
  397. * not forwarded. Basically skb_unshare
  398. * failed and we want to continue with
  399. * next nbuf.
  400. */
  401. return true;
  402. }
  403. }
  404. if (!dp_tx_send(ta_peer->vdev, nbuf)) {
  405. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  406. len);
  407. return true;
  408. } else {
  409. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  410. len);
  411. return false;
  412. }
  413. }
  414. }
  415. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  416. * source, then clone the pkt and send the cloned pkt for
  417. * intra BSS forwarding and original pkt up the network stack
  418. * Note: how do we handle multicast pkts. do we forward
  419. * all multicast pkts as is or let a higher layer module
  420. * like igmpsnoop decide whether to forward or not with
  421. * Mcast enhancement.
  422. */
  423. else if (qdf_unlikely((hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  424. !ta_peer->bss_peer))) {
  425. nbuf_copy = qdf_nbuf_copy(nbuf);
  426. if (!nbuf_copy)
  427. return false;
  428. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  429. len = qdf_nbuf_len(nbuf_copy);
  430. if (dp_tx_send(ta_peer->vdev, nbuf_copy)) {
  431. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  432. qdf_nbuf_free(nbuf_copy);
  433. } else {
  434. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  435. }
  436. }
  437. /* return false as we have to still send the original pkt
  438. * up the stack
  439. */
  440. return false;
  441. }
  442. #ifdef MESH_MODE_SUPPORT
  443. /**
  444. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  445. *
  446. * @vdev: DP Virtual device handle
  447. * @nbuf: Buffer pointer
  448. * @rx_tlv_hdr: start of rx tlv header
  449. * @peer: pointer to peer
  450. *
  451. * This function allocated memory for mesh receive stats and fill the
  452. * required stats. Stores the memory address in skb cb.
  453. *
  454. * Return: void
  455. */
  456. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  457. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  458. {
  459. struct mesh_recv_hdr_s *rx_info = NULL;
  460. uint32_t pkt_type;
  461. uint32_t nss;
  462. uint32_t rate_mcs;
  463. uint32_t bw;
  464. /* fill recv mesh stats */
  465. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  466. /* upper layers are resposible to free this memory */
  467. if (rx_info == NULL) {
  468. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  469. "Memory allocation failed for mesh rx stats");
  470. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  471. return;
  472. }
  473. rx_info->rs_flags = MESH_RXHDR_VER1;
  474. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  475. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  476. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  477. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  478. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  479. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  480. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  481. if (vdev->osif_get_key)
  482. vdev->osif_get_key(vdev->osif_vdev,
  483. &rx_info->rs_decryptkey[0],
  484. &peer->mac_addr.raw[0],
  485. rx_info->rs_keyix);
  486. }
  487. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  488. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  489. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  490. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  491. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  492. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  493. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  494. (bw << 24);
  495. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  496. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  497. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  498. rx_info->rs_flags,
  499. rx_info->rs_rssi,
  500. rx_info->rs_channel,
  501. rx_info->rs_ratephy1,
  502. rx_info->rs_keyix);
  503. }
  504. /**
  505. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  506. *
  507. * @vdev: DP Virtual device handle
  508. * @nbuf: Buffer pointer
  509. * @rx_tlv_hdr: start of rx tlv header
  510. *
  511. * This checks if the received packet is matching any filter out
  512. * catogery and and drop the packet if it matches.
  513. *
  514. * Return: status(0 indicates drop, 1 indicate to no drop)
  515. */
  516. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  517. uint8_t *rx_tlv_hdr)
  518. {
  519. union dp_align_mac_addr mac_addr;
  520. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  521. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  522. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  523. return QDF_STATUS_SUCCESS;
  524. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  525. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  526. return QDF_STATUS_SUCCESS;
  527. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  528. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  529. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  530. return QDF_STATUS_SUCCESS;
  531. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  532. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  533. &mac_addr.raw[0]))
  534. return QDF_STATUS_E_FAILURE;
  535. if (!qdf_mem_cmp(&mac_addr.raw[0],
  536. &vdev->mac_addr.raw[0],
  537. DP_MAC_ADDR_LEN))
  538. return QDF_STATUS_SUCCESS;
  539. }
  540. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  541. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  542. &mac_addr.raw[0]))
  543. return QDF_STATUS_E_FAILURE;
  544. if (!qdf_mem_cmp(&mac_addr.raw[0],
  545. &vdev->mac_addr.raw[0],
  546. DP_MAC_ADDR_LEN))
  547. return QDF_STATUS_SUCCESS;
  548. }
  549. }
  550. return QDF_STATUS_E_FAILURE;
  551. }
  552. #else
  553. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  554. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  555. {
  556. }
  557. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  558. uint8_t *rx_tlv_hdr)
  559. {
  560. return QDF_STATUS_E_FAILURE;
  561. }
  562. #endif
  563. #ifdef CONFIG_WIN
  564. /**
  565. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  566. * clients
  567. * @pdev: DP pdev handle
  568. * @rx_pkt_hdr: Rx packet Header
  569. *
  570. * return: dp_vdev*
  571. */
  572. static
  573. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  574. uint8_t *rx_pkt_hdr)
  575. {
  576. struct ieee80211_frame *wh;
  577. struct dp_neighbour_peer *peer = NULL;
  578. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  579. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  580. return NULL;
  581. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  582. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  583. neighbour_peer_list_elem) {
  584. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  585. wh->i_addr2, DP_MAC_ADDR_LEN) == 0) {
  586. QDF_TRACE(
  587. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  588. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  589. peer->neighbour_peers_macaddr.raw[0],
  590. peer->neighbour_peers_macaddr.raw[1],
  591. peer->neighbour_peers_macaddr.raw[2],
  592. peer->neighbour_peers_macaddr.raw[3],
  593. peer->neighbour_peers_macaddr.raw[4],
  594. peer->neighbour_peers_macaddr.raw[5]);
  595. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  596. return pdev->monitor_vdev;
  597. }
  598. }
  599. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  600. return NULL;
  601. }
  602. /**
  603. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  604. * @soc: DP SOC handle
  605. * @mpdu: mpdu for which peer is invalid
  606. *
  607. * return: integer type
  608. */
  609. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  610. {
  611. struct dp_invalid_peer_msg msg;
  612. struct dp_vdev *vdev = NULL;
  613. struct dp_pdev *pdev = NULL;
  614. struct ieee80211_frame *wh;
  615. uint8_t i;
  616. qdf_nbuf_t curr_nbuf, next_nbuf;
  617. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  618. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  619. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  620. if (!DP_FRAME_IS_DATA(wh)) {
  621. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  622. "NAWDS valid only for data frames");
  623. goto free;
  624. }
  625. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  626. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  627. "Invalid nbuf length");
  628. goto free;
  629. }
  630. for (i = 0; i < MAX_PDEV_CNT; i++) {
  631. pdev = soc->pdev_list[i];
  632. if (!pdev) {
  633. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  634. "PDEV not found");
  635. continue;
  636. }
  637. if (pdev->filter_neighbour_peers) {
  638. /* Next Hop scenario not yet handle */
  639. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  640. if (vdev) {
  641. dp_rx_mon_deliver(soc, i,
  642. pdev->invalid_peer_head_msdu,
  643. pdev->invalid_peer_tail_msdu);
  644. pdev->invalid_peer_head_msdu = NULL;
  645. pdev->invalid_peer_tail_msdu = NULL;
  646. return 0;
  647. }
  648. }
  649. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  650. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  651. DP_MAC_ADDR_LEN) == 0) {
  652. goto out;
  653. }
  654. }
  655. }
  656. if (!vdev) {
  657. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  658. "VDEV not found");
  659. goto free;
  660. }
  661. out:
  662. msg.wh = wh;
  663. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  664. msg.nbuf = mpdu;
  665. msg.vdev_id = vdev->vdev_id;
  666. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  667. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  668. &msg);
  669. free:
  670. /* Drop and free packet */
  671. curr_nbuf = mpdu;
  672. while (curr_nbuf) {
  673. next_nbuf = qdf_nbuf_next(curr_nbuf);
  674. qdf_nbuf_free(curr_nbuf);
  675. curr_nbuf = next_nbuf;
  676. }
  677. return 0;
  678. }
  679. /**
  680. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  681. * @soc: DP SOC handle
  682. * @mpdu: mpdu for which peer is invalid
  683. * @mpdu_done: if an mpdu is completed
  684. *
  685. * return: integer type
  686. */
  687. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  688. qdf_nbuf_t mpdu, bool mpdu_done)
  689. {
  690. /* Only trigger the process when mpdu is completed */
  691. if (mpdu_done)
  692. dp_rx_process_invalid_peer(soc, mpdu);
  693. }
  694. #else
  695. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  696. {
  697. qdf_nbuf_t curr_nbuf, next_nbuf;
  698. struct dp_pdev *pdev;
  699. uint8_t i;
  700. struct dp_vdev *vdev = NULL;
  701. struct ieee80211_frame *wh;
  702. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  703. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  704. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  705. if (!DP_FRAME_IS_DATA(wh)) {
  706. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  707. "only for data frames");
  708. goto free;
  709. }
  710. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  711. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  712. "Invalid nbuf length");
  713. goto free;
  714. }
  715. /* reset the head and tail pointers */
  716. for (i = 0; i < MAX_PDEV_CNT; i++) {
  717. pdev = soc->pdev_list[i];
  718. if (!pdev) {
  719. QDF_TRACE(QDF_MODULE_ID_DP,
  720. QDF_TRACE_LEVEL_ERROR,
  721. "PDEV not found");
  722. continue;
  723. }
  724. pdev->invalid_peer_head_msdu = NULL;
  725. pdev->invalid_peer_tail_msdu = NULL;
  726. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  727. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  728. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  729. DP_MAC_ADDR_LEN) == 0) {
  730. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  731. goto out;
  732. }
  733. }
  734. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  735. }
  736. if (NULL == vdev) {
  737. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  738. "VDEV not found");
  739. goto free;
  740. }
  741. out:
  742. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  743. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  744. free:
  745. /* Drop and free packet */
  746. curr_nbuf = mpdu;
  747. while (curr_nbuf) {
  748. next_nbuf = qdf_nbuf_next(curr_nbuf);
  749. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  750. qdf_nbuf_len(curr_nbuf));
  751. qdf_nbuf_free(curr_nbuf);
  752. curr_nbuf = next_nbuf;
  753. }
  754. return 0;
  755. }
  756. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  757. qdf_nbuf_t mpdu, bool mpdu_done)
  758. {
  759. /* Process the nbuf */
  760. dp_rx_process_invalid_peer(soc, mpdu);
  761. }
  762. #endif
  763. #if defined(FEATURE_LRO)
  764. static void dp_rx_print_lro_info(uint8_t *rx_tlv)
  765. {
  766. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  767. FL("----------------------RX DESC LRO----------------------"));
  768. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  769. FL("lro_eligible 0x%x"), HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  770. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  771. FL("pure_ack 0x%x"), HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  772. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  773. FL("chksum 0x%x"), HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  774. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  775. FL("TCP seq num 0x%x"), HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  776. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  777. FL("TCP ack num 0x%x"), HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  778. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  779. FL("TCP window 0x%x"), HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  780. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  781. FL("TCP protocol 0x%x"), HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  782. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  783. FL("TCP offset 0x%x"), HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  784. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  785. FL("toeplitz 0x%x"), HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  786. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  787. FL("---------------------------------------------------------"));
  788. }
  789. /**
  790. * dp_rx_lro() - LRO related processing
  791. * @rx_tlv: TLV data extracted from the rx packet
  792. * @peer: destination peer of the msdu
  793. * @msdu: network buffer
  794. * @ctx: LRO context
  795. *
  796. * This function performs the LRO related processing of the msdu
  797. *
  798. * Return: true: LRO enabled false: LRO is not enabled
  799. */
  800. static void dp_rx_lro(uint8_t *rx_tlv, struct dp_peer *peer,
  801. qdf_nbuf_t msdu, qdf_lro_ctx_t ctx)
  802. {
  803. if (!peer || !peer->vdev || !peer->vdev->lro_enable) {
  804. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  805. FL("no peer, no vdev or LRO disabled"));
  806. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = 0;
  807. return;
  808. }
  809. qdf_assert(rx_tlv);
  810. dp_rx_print_lro_info(rx_tlv);
  811. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  812. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  813. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  814. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  815. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  816. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  817. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  818. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  819. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  820. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  821. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  822. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  823. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  824. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  825. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  826. HAL_RX_TLV_GET_IPV6(rx_tlv);
  827. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  828. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  829. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  830. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  831. QDF_NBUF_CB_RX_LRO_CTX(msdu) = (unsigned char *)ctx;
  832. }
  833. #else
  834. static void dp_rx_lro(uint8_t *rx_tlv, struct dp_peer *peer,
  835. qdf_nbuf_t msdu, qdf_lro_ctx_t ctx)
  836. {
  837. }
  838. #endif
  839. /**
  840. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  841. *
  842. * @nbuf: pointer to msdu.
  843. * @mpdu_len: mpdu length
  844. *
  845. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  846. */
  847. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  848. {
  849. bool last_nbuf;
  850. if (*mpdu_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  851. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  852. last_nbuf = false;
  853. } else {
  854. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  855. last_nbuf = true;
  856. }
  857. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  858. return last_nbuf;
  859. }
  860. /**
  861. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  862. * multiple nbufs.
  863. * @nbuf: pointer to the first msdu of an amsdu.
  864. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  865. *
  866. *
  867. * This function implements the creation of RX frag_list for cases
  868. * where an MSDU is spread across multiple nbufs.
  869. *
  870. * Return: returns the head nbuf which contains complete frag_list.
  871. */
  872. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  873. {
  874. qdf_nbuf_t parent, next, frag_list;
  875. uint16_t frag_list_len = 0;
  876. uint16_t mpdu_len;
  877. bool last_nbuf;
  878. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  879. /*
  880. * this is a case where the complete msdu fits in one single nbuf.
  881. * in this case HW sets both start and end bit and we only need to
  882. * reset these bits for RAW mode simulator to decap the pkt
  883. */
  884. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  885. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  886. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  887. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  888. return nbuf;
  889. }
  890. /*
  891. * This is a case where we have multiple msdus (A-MSDU) spread across
  892. * multiple nbufs. here we create a fraglist out of these nbufs.
  893. *
  894. * the moment we encounter a nbuf with continuation bit set we
  895. * know for sure we have an MSDU which is spread across multiple
  896. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  897. */
  898. parent = nbuf;
  899. frag_list = nbuf->next;
  900. nbuf = nbuf->next;
  901. /*
  902. * set the start bit in the first nbuf we encounter with continuation
  903. * bit set. This has the proper mpdu length set as it is the first
  904. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  905. * nbufs will form the frag_list of the parent nbuf.
  906. */
  907. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  908. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  909. /*
  910. * this is where we set the length of the fragments which are
  911. * associated to the parent nbuf. We iterate through the frag_list
  912. * till we hit the last_nbuf of the list.
  913. */
  914. do {
  915. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  916. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  917. frag_list_len += qdf_nbuf_len(nbuf);
  918. if (last_nbuf) {
  919. next = nbuf->next;
  920. nbuf->next = NULL;
  921. break;
  922. }
  923. nbuf = nbuf->next;
  924. } while (!last_nbuf);
  925. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  926. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  927. parent->next = next;
  928. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  929. return parent;
  930. }
  931. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  932. struct dp_peer *peer,
  933. qdf_nbuf_t nbuf_head,
  934. qdf_nbuf_t nbuf_tail)
  935. {
  936. /*
  937. * highly unlikely to have a vdev without a registered rx
  938. * callback function. if so let us free the nbuf_list.
  939. */
  940. if (qdf_unlikely(!vdev->osif_rx)) {
  941. qdf_nbuf_t nbuf;
  942. do {
  943. nbuf = nbuf_head;
  944. nbuf_head = nbuf_head->next;
  945. qdf_nbuf_free(nbuf);
  946. } while (nbuf_head);
  947. return;
  948. }
  949. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  950. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  951. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  952. &nbuf_tail, (struct cdp_peer *) peer);
  953. }
  954. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  955. }
  956. /**
  957. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  958. * @nbuf: pointer to the first msdu of an amsdu.
  959. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  960. *
  961. * The ipsumed field of the skb is set based on whether HW validated the
  962. * IP/TCP/UDP checksum.
  963. *
  964. * Return: void
  965. */
  966. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  967. qdf_nbuf_t nbuf,
  968. uint8_t *rx_tlv_hdr)
  969. {
  970. qdf_nbuf_rx_cksum_t cksum = {0};
  971. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  972. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  973. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  974. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  975. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  976. } else {
  977. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  978. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  979. }
  980. }
  981. /**
  982. * dp_rx_msdu_stats_update() - update per msdu stats.
  983. * @soc: core txrx main context
  984. * @nbuf: pointer to the first msdu of an amsdu.
  985. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  986. * @peer: pointer to the peer object.
  987. * @ring_id: reo dest ring number on which pkt is reaped.
  988. *
  989. * update all the per msdu stats for that nbuf.
  990. * Return: void
  991. */
  992. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  993. qdf_nbuf_t nbuf,
  994. uint8_t *rx_tlv_hdr,
  995. struct dp_peer *peer,
  996. uint8_t ring_id)
  997. {
  998. bool is_ampdu, is_not_amsdu;
  999. uint16_t peer_id;
  1000. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1001. struct dp_vdev *vdev = peer->vdev;
  1002. struct ether_header *eh;
  1003. uint16_t msdu_len = qdf_nbuf_len(nbuf);
  1004. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  1005. hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr));
  1006. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1007. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1008. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1009. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1010. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1011. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  1012. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1013. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  1014. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1015. if (IEEE80211_IS_BROADCAST(eh->ether_dhost)) {
  1016. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1017. }
  1018. }
  1019. /*
  1020. * currently we can return from here as we have similar stats
  1021. * updated at per ppdu level instead of msdu level
  1022. */
  1023. if (!soc->process_rx_status)
  1024. return;
  1025. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1026. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1027. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1028. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1029. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1030. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  1031. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1032. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1033. rx_tlv_hdr);
  1034. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1035. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1036. /* Save tid to skb->priority */
  1037. DP_RX_TID_SAVE(nbuf, tid);
  1038. DP_STATS_INC(peer, rx.bw[bw], 1);
  1039. DP_STATS_INC(peer, rx.nss[nss], 1);
  1040. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1041. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1042. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1043. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1044. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1045. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1046. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1047. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1048. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1049. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1050. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1051. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1052. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1053. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1054. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1055. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1056. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1057. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1058. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1059. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1060. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1061. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1062. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1063. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1064. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1065. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1066. ((mcs <= MAX_MCS) && (pkt_type == DOT11_AX)));
  1067. if ((soc->process_rx_status) &&
  1068. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1069. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1070. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1071. &peer->stats, peer_id,
  1072. UPDATE_PEER_STATS,
  1073. vdev->pdev->pdev_id);
  1074. #endif
  1075. }
  1076. }
  1077. #ifdef WDS_VENDOR_EXTENSION
  1078. int dp_wds_rx_policy_check(
  1079. uint8_t *rx_tlv_hdr,
  1080. struct dp_vdev *vdev,
  1081. struct dp_peer *peer,
  1082. int rx_mcast
  1083. )
  1084. {
  1085. struct dp_peer *bss_peer;
  1086. int fr_ds, to_ds, rx_3addr, rx_4addr;
  1087. int rx_policy_ucast, rx_policy_mcast;
  1088. if (vdev->opmode == wlan_op_mode_ap) {
  1089. TAILQ_FOREACH(bss_peer, &vdev->peer_list, peer_list_elem) {
  1090. if (bss_peer->bss_peer) {
  1091. /* if wds policy check is not enabled on this vdev, accept all frames */
  1092. if (!bss_peer->wds_ecm.wds_rx_filter) {
  1093. return 1;
  1094. }
  1095. break;
  1096. }
  1097. }
  1098. rx_policy_ucast = bss_peer->wds_ecm.wds_rx_ucast_4addr;
  1099. rx_policy_mcast = bss_peer->wds_ecm.wds_rx_mcast_4addr;
  1100. } else { /* sta mode */
  1101. if (!peer->wds_ecm.wds_rx_filter) {
  1102. return 1;
  1103. }
  1104. rx_policy_ucast = peer->wds_ecm.wds_rx_ucast_4addr;
  1105. rx_policy_mcast = peer->wds_ecm.wds_rx_mcast_4addr;
  1106. }
  1107. /* ------------------------------------------------
  1108. * self
  1109. * peer- rx rx-
  1110. * wds ucast mcast dir policy accept note
  1111. * ------------------------------------------------
  1112. * 1 1 0 11 x1 1 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint met; so, accept
  1113. * 1 1 0 01 x1 0 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint not met; so, drop
  1114. * 1 1 0 10 x1 0 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint not met; so, drop
  1115. * 1 1 0 00 x1 0 bad frame, won't see it
  1116. * 1 0 1 11 1x 1 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint met; so, accept
  1117. * 1 0 1 01 1x 0 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint not met; so, drop
  1118. * 1 0 1 10 1x 0 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint not met; so, drop
  1119. * 1 0 1 00 1x 0 bad frame, won't see it
  1120. * 1 1 0 11 x0 0 AP configured to accept from-ds Rx ucast from wds peers, constraint not met; so, drop
  1121. * 1 1 0 01 x0 0 AP configured to accept from-ds Rx ucast from wds peers, constraint not met; so, drop
  1122. * 1 1 0 10 x0 1 AP configured to accept from-ds Rx ucast from wds peers, constraint met; so, accept
  1123. * 1 1 0 00 x0 0 bad frame, won't see it
  1124. * 1 0 1 11 0x 0 AP configured to accept from-ds Rx mcast from wds peers, constraint not met; so, drop
  1125. * 1 0 1 01 0x 0 AP configured to accept from-ds Rx mcast from wds peers, constraint not met; so, drop
  1126. * 1 0 1 10 0x 1 AP configured to accept from-ds Rx mcast from wds peers, constraint met; so, accept
  1127. * 1 0 1 00 0x 0 bad frame, won't see it
  1128. *
  1129. * 0 x x 11 xx 0 we only accept td-ds Rx frames from non-wds peers in mode.
  1130. * 0 x x 01 xx 1
  1131. * 0 x x 10 xx 0
  1132. * 0 x x 00 xx 0 bad frame, won't see it
  1133. * ------------------------------------------------
  1134. */
  1135. fr_ds = hal_rx_mpdu_get_fr_ds(rx_tlv_hdr);
  1136. to_ds = hal_rx_mpdu_get_to_ds(rx_tlv_hdr);
  1137. rx_3addr = fr_ds ^ to_ds;
  1138. rx_4addr = fr_ds & to_ds;
  1139. if (vdev->opmode == wlan_op_mode_ap) {
  1140. if ((!peer->wds_enabled && rx_3addr && to_ds) ||
  1141. (peer->wds_enabled && !rx_mcast && (rx_4addr == rx_policy_ucast)) ||
  1142. (peer->wds_enabled && rx_mcast && (rx_4addr == rx_policy_mcast))) {
  1143. return 1;
  1144. }
  1145. } else { /* sta mode */
  1146. if ((!rx_mcast && (rx_4addr == rx_policy_ucast)) ||
  1147. (rx_mcast && (rx_4addr == rx_policy_mcast))) {
  1148. return 1;
  1149. }
  1150. }
  1151. return 0;
  1152. }
  1153. #else
  1154. int dp_wds_rx_policy_check(
  1155. uint8_t *rx_tlv_hdr,
  1156. struct dp_vdev *vdev,
  1157. struct dp_peer *peer,
  1158. int rx_mcast
  1159. )
  1160. {
  1161. return 1;
  1162. }
  1163. #endif
  1164. /**
  1165. * dp_rx_process() - Brain of the Rx processing functionality
  1166. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1167. * @soc: core txrx main context
  1168. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1169. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1170. * @quota: No. of units (packets) that can be serviced in one shot.
  1171. *
  1172. * This function implements the core of Rx functionality. This is
  1173. * expected to handle only non-error frames.
  1174. *
  1175. * Return: uint32_t: No. of elements processed
  1176. */
  1177. uint32_t dp_rx_process(struct dp_intr *int_ctx, void *hal_ring,
  1178. uint8_t reo_ring_num, uint32_t quota)
  1179. {
  1180. void *hal_soc;
  1181. void *ring_desc;
  1182. struct dp_rx_desc *rx_desc = NULL;
  1183. qdf_nbuf_t nbuf, next;
  1184. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  1185. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  1186. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1187. uint32_t l2_hdr_offset = 0;
  1188. uint16_t msdu_len = 0;
  1189. uint16_t peer_id;
  1190. struct dp_peer *peer = NULL;
  1191. struct dp_vdev *vdev = NULL;
  1192. uint32_t pkt_len = 0;
  1193. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  1194. struct hal_rx_msdu_desc_info msdu_desc_info = { 0 };
  1195. enum hal_reo_error_status error;
  1196. uint32_t peer_mdata;
  1197. uint8_t *rx_tlv_hdr;
  1198. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1199. uint8_t mac_id = 0;
  1200. struct dp_pdev *pdev;
  1201. struct dp_srng *dp_rxdma_srng;
  1202. struct rx_desc_pool *rx_desc_pool;
  1203. struct dp_soc *soc = int_ctx->soc;
  1204. uint8_t ring_id = 0;
  1205. uint8_t core_id = 0;
  1206. qdf_nbuf_t nbuf_head = NULL;
  1207. qdf_nbuf_t nbuf_tail = NULL;
  1208. qdf_nbuf_t deliver_list_head = NULL;
  1209. qdf_nbuf_t deliver_list_tail = NULL;
  1210. DP_HIST_INIT();
  1211. /* Debug -- Remove later */
  1212. qdf_assert(soc && hal_ring);
  1213. hal_soc = soc->hal_soc;
  1214. /* Debug -- Remove later */
  1215. qdf_assert(hal_soc);
  1216. hif_pm_runtime_mark_last_busy(soc->osdev->dev);
  1217. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  1218. /*
  1219. * Need API to convert from hal_ring pointer to
  1220. * Ring Type / Ring Id combo
  1221. */
  1222. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1223. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1224. FL("HAL RING Access Failed -- %pK"), hal_ring);
  1225. hal_srng_access_end(hal_soc, hal_ring);
  1226. goto done;
  1227. }
  1228. /*
  1229. * start reaping the buffers from reo ring and queue
  1230. * them in per vdev queue.
  1231. * Process the received pkts in a different per vdev loop.
  1232. */
  1233. while (qdf_likely(quota)) {
  1234. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring);
  1235. /*
  1236. * in case HW has updated hp after we cached the hp
  1237. * ring_desc can be NULL even there are entries
  1238. * available in the ring. Update the cached_hp
  1239. * and reap the buffers available to read complete
  1240. * mpdu in one reap
  1241. *
  1242. * This is needed for RAW mode we have to read all
  1243. * msdus corresponding to amsdu in one reap to create
  1244. * SG list properly but due to mismatch in cached_hp
  1245. * and actual hp sometimes we are unable to read
  1246. * complete mpdu in one reap.
  1247. */
  1248. if (qdf_unlikely(!ring_desc)) {
  1249. hal_srng_access_start_unlocked(hal_soc, hal_ring);
  1250. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring);
  1251. if (!ring_desc)
  1252. break;
  1253. DP_STATS_INC(soc, rx.hp_oos, 1);
  1254. /*
  1255. * update TP here in case loop takes long,
  1256. * then the ring is easily full.
  1257. */
  1258. hal_srng_access_end_unlocked(hal_soc, hal_ring);
  1259. }
  1260. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1261. ring_id = hal_srng_ring_id_get(hal_ring);
  1262. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1263. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1264. FL("HAL RING 0x%pK:error %d"), hal_ring, error);
  1265. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1266. /* Don't know how to deal with this -- assert */
  1267. qdf_assert(0);
  1268. }
  1269. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1270. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1271. qdf_assert(rx_desc);
  1272. rx_bufs_reaped[rx_desc->pool_id]++;
  1273. /* TODO */
  1274. /*
  1275. * Need a separate API for unmapping based on
  1276. * phyiscal address
  1277. */
  1278. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1279. QDF_DMA_BIDIRECTIONAL);
  1280. core_id = smp_processor_id();
  1281. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1282. /* Get MPDU DESC info */
  1283. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1284. hal_rx_mpdu_peer_meta_data_set(qdf_nbuf_data(rx_desc->nbuf),
  1285. mpdu_desc_info.peer_meta_data);
  1286. /* Get MSDU DESC info */
  1287. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1288. /*
  1289. * save msdu flags first, last and continuation msdu in
  1290. * nbuf->cb
  1291. */
  1292. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1293. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1294. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1295. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1296. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1297. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1298. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1299. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1300. /*
  1301. * if continuation bit is set then we have MSDU spread
  1302. * across multiple buffers, let us not decrement quota
  1303. * till we reap all buffers of that MSDU.
  1304. */
  1305. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1306. quota -= 1;
  1307. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1308. &tail[rx_desc->pool_id],
  1309. rx_desc);
  1310. }
  1311. done:
  1312. hal_srng_access_end(hal_soc, hal_ring);
  1313. if (nbuf_tail)
  1314. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1315. /* Update histogram statistics by looping through pdev's */
  1316. DP_RX_HIST_STATS_PER_PDEV();
  1317. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1318. /*
  1319. * continue with next mac_id if no pkts were reaped
  1320. * from that pool
  1321. */
  1322. if (!rx_bufs_reaped[mac_id])
  1323. continue;
  1324. pdev = soc->pdev_list[mac_id];
  1325. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1326. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1327. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1328. rx_desc_pool, rx_bufs_reaped[mac_id],
  1329. &head[mac_id], &tail[mac_id]);
  1330. }
  1331. /* Peer can be NULL is case of LFR */
  1332. if (qdf_likely(peer != NULL))
  1333. vdev = NULL;
  1334. /*
  1335. * BIG loop where each nbuf is dequeued from global queue,
  1336. * processed and queued back on a per vdev basis. These nbufs
  1337. * are sent to stack as and when we run out of nbufs
  1338. * or a new nbuf dequeued from global queue has a different
  1339. * vdev when compared to previous nbuf.
  1340. */
  1341. nbuf = nbuf_head;
  1342. while (nbuf) {
  1343. next = nbuf->next;
  1344. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1345. /*
  1346. * Check if DMA completed -- msdu_done is the last bit
  1347. * to be written
  1348. */
  1349. if (qdf_unlikely(!hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1350. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1351. FL("MSDU DONE failure"));
  1352. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1353. QDF_TRACE_LEVEL_INFO);
  1354. qdf_assert(0);
  1355. }
  1356. peer_mdata = hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr);
  1357. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1358. peer = dp_peer_find_by_id(soc, peer_id);
  1359. if (peer) {
  1360. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1361. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1362. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1363. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1364. QDF_NBUF_RX_PKT_DATA_TRACK;
  1365. }
  1366. rx_bufs_used++;
  1367. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1368. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1369. deliver_list_tail);
  1370. deliver_list_head = NULL;
  1371. deliver_list_tail = NULL;
  1372. }
  1373. if (qdf_likely(peer != NULL)) {
  1374. vdev = peer->vdev;
  1375. } else {
  1376. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1377. qdf_nbuf_len(nbuf));
  1378. qdf_nbuf_free(nbuf);
  1379. nbuf = next;
  1380. continue;
  1381. }
  1382. if (qdf_unlikely(vdev == NULL)) {
  1383. qdf_nbuf_free(nbuf);
  1384. nbuf = next;
  1385. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1386. dp_peer_unref_del_find_by_id(peer);
  1387. continue;
  1388. }
  1389. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1390. /*
  1391. * First IF condition:
  1392. * 802.11 Fragmented pkts are reinjected to REO
  1393. * HW block as SG pkts and for these pkts we only
  1394. * need to pull the RX TLVS header length.
  1395. * Second IF condition:
  1396. * The below condition happens when an MSDU is spread
  1397. * across multiple buffers. This can happen in two cases
  1398. * 1. The nbuf size is smaller then the received msdu.
  1399. * ex: we have set the nbuf size to 2048 during
  1400. * nbuf_alloc. but we received an msdu which is
  1401. * 2304 bytes in size then this msdu is spread
  1402. * across 2 nbufs.
  1403. *
  1404. * 2. AMSDUs when RAW mode is enabled.
  1405. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1406. * across 1st nbuf and 2nd nbuf and last MSDU is
  1407. * spread across 2nd nbuf and 3rd nbuf.
  1408. *
  1409. * for these scenarios let us create a skb frag_list and
  1410. * append these buffers till the last MSDU of the AMSDU
  1411. * Third condition:
  1412. * This is the most likely case, we receive 802.3 pkts
  1413. * decapsulated by HW, here we need to set the pkt length.
  1414. */
  1415. if (qdf_unlikely(qdf_nbuf_get_ext_list(nbuf)))
  1416. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1417. else if (qdf_unlikely(vdev->rx_decap_type ==
  1418. htt_cmn_pkt_type_raw)) {
  1419. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1420. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1421. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1422. DP_STATS_INC_PKT(peer, rx.raw, 1,
  1423. msdu_len);
  1424. next = nbuf->next;
  1425. } else {
  1426. l2_hdr_offset =
  1427. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1428. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1429. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1430. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1431. qdf_nbuf_pull_head(nbuf,
  1432. RX_PKT_TLVS_LEN +
  1433. l2_hdr_offset);
  1434. }
  1435. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer,
  1436. hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  1437. QDF_TRACE(QDF_MODULE_ID_DP,
  1438. QDF_TRACE_LEVEL_ERROR,
  1439. FL("Policy Check Drop pkt"));
  1440. /* Drop & free packet */
  1441. qdf_nbuf_free(nbuf);
  1442. /* Statistics */
  1443. nbuf = next;
  1444. dp_peer_unref_del_find_by_id(peer);
  1445. continue;
  1446. }
  1447. if (qdf_unlikely(peer && peer->bss_peer)) {
  1448. QDF_TRACE(QDF_MODULE_ID_DP,
  1449. QDF_TRACE_LEVEL_ERROR,
  1450. FL("received pkt with same src MAC"));
  1451. DP_STATS_INC_PKT(peer, rx.mec_drop, 1, msdu_len);
  1452. /* Drop & free packet */
  1453. qdf_nbuf_free(nbuf);
  1454. /* Statistics */
  1455. nbuf = next;
  1456. dp_peer_unref_del_find_by_id(peer);
  1457. continue;
  1458. }
  1459. if (qdf_unlikely(peer && (peer->nawds_enabled == true) &&
  1460. (hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr)) &&
  1461. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) == false))) {
  1462. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1463. qdf_nbuf_free(nbuf);
  1464. nbuf = next;
  1465. dp_peer_unref_del_find_by_id(peer);
  1466. continue;
  1467. }
  1468. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1469. dp_set_rx_queue(nbuf, ring_id);
  1470. /*
  1471. * HW structures call this L3 header padding --
  1472. * even though this is actually the offset from
  1473. * the buffer beginning where the L2 header
  1474. * begins.
  1475. */
  1476. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1477. FL("rxhash: flow id toeplitz: 0x%x"),
  1478. hal_rx_msdu_start_toeplitz_get(rx_tlv_hdr));
  1479. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer, ring_id);
  1480. if (qdf_unlikely(vdev->mesh_vdev)) {
  1481. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  1482. rx_tlv_hdr)
  1483. == QDF_STATUS_SUCCESS) {
  1484. QDF_TRACE(QDF_MODULE_ID_DP,
  1485. QDF_TRACE_LEVEL_INFO_MED,
  1486. FL("mesh pkt filtered"));
  1487. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1488. 1);
  1489. qdf_nbuf_free(nbuf);
  1490. nbuf = next;
  1491. dp_peer_unref_del_find_by_id(peer);
  1492. continue;
  1493. }
  1494. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1495. }
  1496. #ifdef QCA_WIFI_NAPIER_EMULATION_DBG /* Debug code, remove later */
  1497. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1498. "p_id %d msdu_len %d hdr_off %d",
  1499. peer_id, msdu_len, l2_hdr_offset);
  1500. print_hex_dump(KERN_ERR,
  1501. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  1502. qdf_nbuf_data(nbuf), 128, false);
  1503. #endif /* NAPIER_EMULATION */
  1504. if (qdf_likely(vdev->rx_decap_type ==
  1505. htt_cmn_pkt_type_ethernet) &&
  1506. qdf_likely(!vdev->mesh_vdev)) {
  1507. /* WDS Destination Address Learning */
  1508. if (vdev->da_war_enabled)
  1509. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1510. /* WDS Source Port Learning */
  1511. if (vdev->wds_enabled)
  1512. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1513. peer, nbuf);
  1514. /* Intrabss-fwd */
  1515. if (dp_rx_check_ap_bridge(vdev))
  1516. if (dp_rx_intrabss_fwd(soc,
  1517. peer,
  1518. rx_tlv_hdr,
  1519. nbuf)) {
  1520. nbuf = next;
  1521. dp_peer_unref_del_find_by_id(peer);
  1522. continue; /* Get next desc */
  1523. }
  1524. }
  1525. dp_rx_lro(rx_tlv_hdr, peer, nbuf, int_ctx->lro_ctx);
  1526. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1527. DP_RX_LIST_APPEND(deliver_list_head,
  1528. deliver_list_tail,
  1529. nbuf);
  1530. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1531. qdf_nbuf_len(nbuf));
  1532. nbuf = next;
  1533. dp_peer_unref_del_find_by_id(peer);
  1534. }
  1535. if (deliver_list_head)
  1536. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1537. deliver_list_tail);
  1538. return rx_bufs_used; /* Assume no scale factor for now */
  1539. }
  1540. /**
  1541. * dp_rx_detach() - detach dp rx
  1542. * @pdev: core txrx pdev context
  1543. *
  1544. * This function will detach DP RX into main device context
  1545. * will free DP Rx resources.
  1546. *
  1547. * Return: void
  1548. */
  1549. void
  1550. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1551. {
  1552. uint8_t pdev_id = pdev->pdev_id;
  1553. struct dp_soc *soc = pdev->soc;
  1554. struct rx_desc_pool *rx_desc_pool;
  1555. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1556. if (rx_desc_pool->pool_size != 0) {
  1557. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  1558. }
  1559. return;
  1560. }
  1561. /**
  1562. * dp_rx_attach() - attach DP RX
  1563. * @pdev: core txrx pdev context
  1564. *
  1565. * This function will attach a DP RX instance into the main
  1566. * device (SOC) context. Will allocate dp rx resource and
  1567. * initialize resources.
  1568. *
  1569. * Return: QDF_STATUS_SUCCESS: success
  1570. * QDF_STATUS_E_RESOURCES: Error return
  1571. */
  1572. QDF_STATUS
  1573. dp_rx_pdev_attach(struct dp_pdev *pdev)
  1574. {
  1575. uint8_t pdev_id = pdev->pdev_id;
  1576. struct dp_soc *soc = pdev->soc;
  1577. struct dp_srng rxdma_srng;
  1578. uint32_t rxdma_entries;
  1579. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1580. union dp_rx_desc_list_elem_t *tail = NULL;
  1581. struct dp_srng *dp_rxdma_srng;
  1582. struct rx_desc_pool *rx_desc_pool;
  1583. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  1584. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1585. "nss-wifi<4> skip Rx refil %d", pdev_id);
  1586. return QDF_STATUS_SUCCESS;
  1587. }
  1588. pdev = soc->pdev_list[pdev_id];
  1589. rxdma_srng = pdev->rx_refill_buf_ring;
  1590. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  1591. rxdma_entries = rxdma_srng.alloc_size/hal_srng_get_entrysize(
  1592. soc->hal_soc, RXDMA_BUF);
  1593. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1594. dp_rx_desc_pool_alloc(soc, pdev_id, rxdma_entries*3, rx_desc_pool);
  1595. rx_desc_pool->owner = DP_WBM2SW_RBM;
  1596. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  1597. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1598. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng, rx_desc_pool,
  1599. 0, &desc_list, &tail);
  1600. return QDF_STATUS_SUCCESS;
  1601. }
  1602. /*
  1603. * dp_rx_nbuf_prepare() - prepare RX nbuf
  1604. * @soc: core txrx main context
  1605. * @pdev: core txrx pdev context
  1606. *
  1607. * This function alloc & map nbuf for RX dma usage, retry it if failed
  1608. * until retry times reaches max threshold or succeeded.
  1609. *
  1610. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  1611. */
  1612. qdf_nbuf_t
  1613. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  1614. {
  1615. uint8_t *buf;
  1616. int32_t nbuf_retry_count;
  1617. QDF_STATUS ret;
  1618. qdf_nbuf_t nbuf = NULL;
  1619. for (nbuf_retry_count = 0; nbuf_retry_count <
  1620. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  1621. nbuf_retry_count++) {
  1622. /* Allocate a new skb */
  1623. nbuf = qdf_nbuf_alloc(soc->osdev,
  1624. RX_BUFFER_SIZE,
  1625. RX_BUFFER_RESERVATION,
  1626. RX_BUFFER_ALIGNMENT,
  1627. FALSE);
  1628. if (nbuf == NULL) {
  1629. DP_STATS_INC(pdev,
  1630. replenish.nbuf_alloc_fail, 1);
  1631. continue;
  1632. }
  1633. buf = qdf_nbuf_data(nbuf);
  1634. memset(buf, 0, RX_BUFFER_SIZE);
  1635. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  1636. QDF_DMA_BIDIRECTIONAL);
  1637. /* nbuf map failed */
  1638. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1639. qdf_nbuf_free(nbuf);
  1640. DP_STATS_INC(pdev, replenish.map_err, 1);
  1641. continue;
  1642. }
  1643. /* qdf_nbuf alloc and map succeeded */
  1644. break;
  1645. }
  1646. /* qdf_nbuf still alloc or map failed */
  1647. if (qdf_unlikely(nbuf_retry_count >=
  1648. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  1649. return NULL;
  1650. return nbuf;
  1651. }