cam_packet_util.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/types.h>
  6. #include <linux/slab.h>
  7. #include "cam_mem_mgr.h"
  8. #include "cam_packet_util.h"
  9. #include "cam_debug_util.h"
  10. #define CAM_UNIQUE_SRC_HDL_MAX 50
  11. struct cam_patch_unique_src_buf_tbl {
  12. int32_t hdl;
  13. dma_addr_t iova;
  14. size_t buf_size;
  15. };
  16. int cam_packet_util_get_cmd_mem_addr(int handle, uint32_t **buf_addr,
  17. size_t *len)
  18. {
  19. int rc = 0;
  20. uintptr_t kmd_buf_addr = 0;
  21. rc = cam_mem_get_cpu_buf(handle, &kmd_buf_addr, len);
  22. if (rc) {
  23. CAM_ERR(CAM_UTIL, "Unable to get the virtual address %d", rc);
  24. } else {
  25. if (kmd_buf_addr && *len) {
  26. *buf_addr = (uint32_t *)kmd_buf_addr;
  27. } else {
  28. CAM_ERR(CAM_UTIL, "Invalid addr and length :%zd", *len);
  29. rc = -ENOMEM;
  30. }
  31. }
  32. return rc;
  33. }
  34. int cam_packet_util_validate_cmd_desc(struct cam_cmd_buf_desc *cmd_desc)
  35. {
  36. if ((cmd_desc->length > cmd_desc->size) ||
  37. (cmd_desc->mem_handle <= 0)) {
  38. CAM_ERR(CAM_UTIL, "invalid cmd arg %d %d %d %d",
  39. cmd_desc->offset, cmd_desc->length,
  40. cmd_desc->mem_handle, cmd_desc->size);
  41. return -EINVAL;
  42. }
  43. return 0;
  44. }
  45. int cam_packet_util_validate_packet(struct cam_packet *packet,
  46. size_t remain_len)
  47. {
  48. size_t sum_cmd_desc = 0;
  49. size_t sum_io_cfgs = 0;
  50. size_t sum_patch_desc = 0;
  51. size_t pkt_wo_payload = 0;
  52. if (!packet)
  53. return -EINVAL;
  54. if ((size_t)packet->header.size > remain_len) {
  55. CAM_ERR(CAM_UTIL,
  56. "Invalid packet size: %zu, CPU buf length: %zu",
  57. (size_t)packet->header.size, remain_len);
  58. return -EINVAL;
  59. }
  60. CAM_DBG(CAM_UTIL, "num cmd buf:%d num of io config:%d kmd buf index:%d",
  61. packet->num_cmd_buf, packet->num_io_configs,
  62. packet->kmd_cmd_buf_index);
  63. sum_cmd_desc = packet->num_cmd_buf * sizeof(struct cam_cmd_buf_desc);
  64. sum_io_cfgs = packet->num_io_configs * sizeof(struct cam_buf_io_cfg);
  65. sum_patch_desc = packet->num_patches * sizeof(struct cam_patch_desc);
  66. pkt_wo_payload = offsetof(struct cam_packet, payload);
  67. if ((!packet->header.size) ||
  68. ((pkt_wo_payload + (size_t)packet->cmd_buf_offset +
  69. sum_cmd_desc) > (size_t)packet->header.size) ||
  70. ((pkt_wo_payload + (size_t)packet->io_configs_offset +
  71. sum_io_cfgs) > (size_t)packet->header.size) ||
  72. ((pkt_wo_payload + (size_t)packet->patch_offset +
  73. sum_patch_desc) > (size_t)packet->header.size)) {
  74. CAM_ERR(CAM_UTIL, "params not within mem len:%zu %zu %zu %zu",
  75. (size_t)packet->header.size, sum_cmd_desc,
  76. sum_io_cfgs, sum_patch_desc);
  77. return -EINVAL;
  78. }
  79. return 0;
  80. }
  81. int cam_packet_util_get_kmd_buffer(struct cam_packet *packet,
  82. struct cam_kmd_buf_info *kmd_buf)
  83. {
  84. int rc = 0;
  85. size_t len = 0;
  86. size_t remain_len = 0;
  87. struct cam_cmd_buf_desc *cmd_desc;
  88. uint32_t *cpu_addr;
  89. if (!packet || !kmd_buf) {
  90. CAM_ERR(CAM_UTIL, "Invalid arg %pK %pK", packet, kmd_buf);
  91. return -EINVAL;
  92. }
  93. if ((packet->kmd_cmd_buf_index < 0) ||
  94. (packet->kmd_cmd_buf_index >= packet->num_cmd_buf)) {
  95. CAM_ERR(CAM_UTIL, "Invalid kmd buf index: %d",
  96. packet->kmd_cmd_buf_index);
  97. return -EINVAL;
  98. }
  99. /* Take first command descriptor and add offset to it for kmd*/
  100. cmd_desc = (struct cam_cmd_buf_desc *) ((uint8_t *)
  101. &packet->payload + packet->cmd_buf_offset);
  102. cmd_desc += packet->kmd_cmd_buf_index;
  103. rc = cam_packet_util_validate_cmd_desc(cmd_desc);
  104. if (rc)
  105. return rc;
  106. rc = cam_packet_util_get_cmd_mem_addr(cmd_desc->mem_handle, &cpu_addr,
  107. &len);
  108. if (rc)
  109. return rc;
  110. remain_len = len;
  111. if (((size_t)cmd_desc->offset >= len) ||
  112. ((size_t)cmd_desc->size > (len - (size_t)cmd_desc->offset))) {
  113. CAM_ERR(CAM_UTIL, "invalid memory len:%zd and cmd desc size:%d",
  114. len, cmd_desc->size);
  115. return -EINVAL;
  116. }
  117. remain_len -= (size_t)cmd_desc->offset;
  118. if ((size_t)packet->kmd_cmd_buf_offset >= remain_len) {
  119. CAM_ERR(CAM_UTIL, "Invalid kmd cmd buf offset: %zu",
  120. (size_t)packet->kmd_cmd_buf_offset);
  121. return -EINVAL;
  122. }
  123. cpu_addr += (cmd_desc->offset / 4) + (packet->kmd_cmd_buf_offset / 4);
  124. CAM_DBG(CAM_UTIL, "total size %d, cmd size: %d, KMD buffer size: %d",
  125. cmd_desc->size, cmd_desc->length,
  126. cmd_desc->size - cmd_desc->length);
  127. CAM_DBG(CAM_UTIL, "hdl 0x%x, cmd offset %d, kmd offset %d, addr 0x%pK",
  128. cmd_desc->mem_handle, cmd_desc->offset,
  129. packet->kmd_cmd_buf_offset, cpu_addr);
  130. kmd_buf->cpu_addr = cpu_addr;
  131. kmd_buf->handle = cmd_desc->mem_handle;
  132. kmd_buf->offset = cmd_desc->offset + packet->kmd_cmd_buf_offset;
  133. kmd_buf->size = cmd_desc->size - cmd_desc->length;
  134. kmd_buf->used_bytes = 0;
  135. return rc;
  136. }
  137. void cam_packet_dump_patch_info(struct cam_packet *packet,
  138. int32_t iommu_hdl, int32_t sec_mmu_hdl)
  139. {
  140. struct cam_patch_desc *patch_desc = NULL;
  141. dma_addr_t iova_addr;
  142. size_t dst_buf_len;
  143. size_t src_buf_size;
  144. int i, rc = 0;
  145. int32_t hdl;
  146. uintptr_t cpu_addr = 0;
  147. uint32_t *dst_cpu_addr;
  148. uint64_t value = 0;
  149. patch_desc = (struct cam_patch_desc *)
  150. ((uint32_t *) &packet->payload +
  151. packet->patch_offset/4);
  152. for (i = 0; i < packet->num_patches; i++) {
  153. hdl = cam_mem_is_secure_buf(patch_desc[i].src_buf_hdl) ?
  154. sec_mmu_hdl : iommu_hdl;
  155. rc = cam_mem_get_io_buf(patch_desc[i].src_buf_hdl,
  156. hdl, &iova_addr, &src_buf_size);
  157. if (rc < 0) {
  158. CAM_ERR(CAM_UTIL,
  159. "unable to get src buf address for hdl 0x%x",
  160. hdl);
  161. return;
  162. }
  163. rc = cam_mem_get_cpu_buf(patch_desc[i].dst_buf_hdl,
  164. &cpu_addr, &dst_buf_len);
  165. if (rc < 0 || !cpu_addr || (dst_buf_len == 0)) {
  166. CAM_ERR(CAM_UTIL, "unable to get dst buf address");
  167. return;
  168. }
  169. dst_cpu_addr = (uint32_t *)cpu_addr;
  170. dst_cpu_addr = (uint32_t *)((uint8_t *)dst_cpu_addr +
  171. patch_desc[i].dst_offset);
  172. value = *((uint64_t *)dst_cpu_addr);
  173. CAM_INFO(CAM_UTIL,
  174. "i = %d src_buf 0x%llx src_hdl 0x%x src_buf_with_offset 0x%llx size 0x%llx dst %p dst_offset %u dst_hdl 0x%x value 0x%llx",
  175. i, iova_addr, patch_desc[i].src_buf_hdl,
  176. (iova_addr + patch_desc[i].src_offset),
  177. src_buf_size, dst_cpu_addr,
  178. patch_desc[i].dst_offset,
  179. patch_desc[i].dst_buf_hdl, value);
  180. if (!(*dst_cpu_addr))
  181. CAM_ERR(CAM_ICP, "Null at dst addr %p", dst_cpu_addr);
  182. }
  183. }
  184. static int cam_packet_util_get_patch_iova(
  185. struct cam_patch_unique_src_buf_tbl *tbl,
  186. int32_t hdl, uint32_t buf_hdl, dma_addr_t *iova, size_t *buf_size)
  187. {
  188. int idx = 0;
  189. int rc = 0;
  190. size_t src_buf_size;
  191. dma_addr_t iova_addr;
  192. bool is_found = false;
  193. for (idx = 0; idx < CAM_UNIQUE_SRC_HDL_MAX; idx++) {
  194. if (buf_hdl == tbl[idx].hdl) {
  195. CAM_DBG(CAM_UTIL,
  196. "Matched entry for src_buf_hdl: 0x%x with src_hdl[%d]: 0x%x",
  197. buf_hdl, idx, tbl[idx].hdl);
  198. *iova = tbl[idx].iova;
  199. *buf_size = tbl[idx].buf_size;
  200. is_found = true;
  201. break;
  202. } else if ((tbl[idx].hdl == 0) || (tbl[idx].iova == 0)) {
  203. CAM_DBG(CAM_UTIL, "New src handle detected 0x%x",
  204. buf_hdl);
  205. is_found = false;
  206. break;
  207. }
  208. CAM_DBG(CAM_UTIL,
  209. "Index: %d is filled with differnt src_hdl: 0x%x",
  210. idx, buf_hdl);
  211. }
  212. if (!is_found) {
  213. CAM_DBG(CAM_UTIL, "src_hdl 0x%x not found in table entries",
  214. buf_hdl);
  215. rc = cam_mem_get_io_buf(buf_hdl, hdl,
  216. &iova_addr, &src_buf_size);
  217. if (rc < 0) {
  218. CAM_ERR(CAM_UTIL,
  219. "unable to get iova for src_hdl: 0x%x",
  220. buf_hdl);
  221. return rc;
  222. }
  223. /* Update the table entry with unique src buf handle */
  224. if (idx < CAM_UNIQUE_SRC_HDL_MAX && tbl[idx].hdl == 0) {
  225. tbl[idx].buf_size = src_buf_size;
  226. tbl[idx].iova = iova_addr;
  227. tbl[idx].hdl = buf_hdl;
  228. CAM_DBG(CAM_UTIL,
  229. "Updated table index: %d with src_buf_hdl: 0x%x",
  230. idx, tbl[idx].hdl);
  231. }
  232. *iova = iova_addr;
  233. *buf_size = src_buf_size;
  234. }
  235. return rc;
  236. }
  237. int cam_packet_util_process_patches(struct cam_packet *packet,
  238. int32_t iommu_hdl, int32_t sec_mmu_hdl)
  239. {
  240. struct cam_patch_desc *patch_desc = NULL;
  241. dma_addr_t iova_addr;
  242. uintptr_t cpu_addr = 0;
  243. uint32_t temp;
  244. uint32_t *dst_cpu_addr;
  245. uint32_t *src_buf_iova_addr;
  246. size_t dst_buf_len;
  247. size_t src_buf_size;
  248. int i = 0;
  249. int rc = 0;
  250. int32_t hdl;
  251. struct cam_patch_unique_src_buf_tbl
  252. tbl[CAM_UNIQUE_SRC_HDL_MAX];
  253. memset(tbl, 0, CAM_UNIQUE_SRC_HDL_MAX *
  254. sizeof(struct cam_patch_unique_src_buf_tbl));
  255. /* process patch descriptor */
  256. patch_desc = (struct cam_patch_desc *)
  257. ((uint32_t *) &packet->payload +
  258. packet->patch_offset/4);
  259. CAM_DBG(CAM_UTIL, "packet = %pK patch_desc = %pK size = %lu",
  260. (void *)packet, (void *)patch_desc,
  261. sizeof(struct cam_patch_desc));
  262. for (i = 0; i < packet->num_patches; i++) {
  263. hdl = cam_mem_is_secure_buf(patch_desc[i].src_buf_hdl) ?
  264. sec_mmu_hdl : iommu_hdl;
  265. rc = cam_packet_util_get_patch_iova(&tbl[0], hdl,
  266. patch_desc[i].src_buf_hdl, &iova_addr, &src_buf_size);
  267. if (rc) {
  268. CAM_ERR(CAM_UTIL,
  269. "get_iova failed for patch[%d], src_buf_hdl: 0x%x: rc: %d",
  270. i, patch_desc[i].src_buf_hdl, rc);
  271. return rc;
  272. }
  273. if ((size_t)patch_desc[i].src_offset >= src_buf_size) {
  274. CAM_ERR(CAM_UTIL,
  275. "Invalid src buf patch offset: patch:src_offset: 0x%x, src_buf_size: %zu",
  276. patch_desc[i].src_offset, src_buf_size);
  277. return -EINVAL;
  278. }
  279. src_buf_iova_addr = (uint32_t *)iova_addr;
  280. temp = iova_addr;
  281. rc = cam_mem_get_cpu_buf(patch_desc[i].dst_buf_hdl,
  282. &cpu_addr, &dst_buf_len);
  283. if (rc < 0 || !cpu_addr || (dst_buf_len == 0)) {
  284. CAM_ERR(CAM_UTIL, "unable to get dst buf address");
  285. return rc;
  286. }
  287. dst_cpu_addr = (uint32_t *)cpu_addr;
  288. CAM_DBG(CAM_UTIL, "i = %d patch info = %x %x %x %x", i,
  289. patch_desc[i].dst_buf_hdl, patch_desc[i].dst_offset,
  290. patch_desc[i].src_buf_hdl, patch_desc[i].src_offset);
  291. if ((dst_buf_len < sizeof(void *)) ||
  292. ((dst_buf_len - sizeof(void *)) <
  293. (size_t)patch_desc[i].dst_offset)) {
  294. CAM_ERR(CAM_UTIL,
  295. "Invalid dst buf patch offset");
  296. return -EINVAL;
  297. }
  298. dst_cpu_addr = (uint32_t *)((uint8_t *)dst_cpu_addr +
  299. patch_desc[i].dst_offset);
  300. temp += patch_desc[i].src_offset;
  301. *dst_cpu_addr = temp;
  302. CAM_DBG(CAM_UTIL,
  303. "patch is done for dst %pK with src %pK value %llx",
  304. dst_cpu_addr, src_buf_iova_addr,
  305. *((uint64_t *)dst_cpu_addr));
  306. }
  307. return rc;
  308. }
  309. int cam_packet_util_process_generic_cmd_buffer(
  310. struct cam_cmd_buf_desc *cmd_buf,
  311. cam_packet_generic_blob_handler blob_handler_cb, void *user_data)
  312. {
  313. int rc = 0;
  314. uintptr_t cpu_addr = 0;
  315. size_t buf_size;
  316. size_t remain_len = 0;
  317. uint32_t *blob_ptr;
  318. uint32_t blob_type, blob_size, blob_block_size, len_read;
  319. if (!cmd_buf || !blob_handler_cb) {
  320. CAM_ERR(CAM_UTIL, "Invalid args %pK %pK",
  321. cmd_buf, blob_handler_cb);
  322. return -EINVAL;
  323. }
  324. if (!cmd_buf->length || !cmd_buf->size) {
  325. CAM_ERR(CAM_UTIL, "Invalid cmd buf size %d %d",
  326. cmd_buf->length, cmd_buf->size);
  327. return -EINVAL;
  328. }
  329. rc = cam_mem_get_cpu_buf(cmd_buf->mem_handle, &cpu_addr, &buf_size);
  330. if (rc || !cpu_addr || (buf_size == 0)) {
  331. CAM_ERR(CAM_UTIL, "Failed in Get cpu addr, rc=%d, cpu_addr=%pK",
  332. rc, (void *)cpu_addr);
  333. return rc;
  334. }
  335. remain_len = buf_size;
  336. if ((buf_size < sizeof(uint32_t)) ||
  337. ((size_t)cmd_buf->offset > (buf_size - sizeof(uint32_t)))) {
  338. CAM_ERR(CAM_UTIL, "Invalid offset for cmd buf: %zu",
  339. (size_t)cmd_buf->offset);
  340. return -EINVAL;
  341. }
  342. remain_len -= (size_t)cmd_buf->offset;
  343. if (remain_len < (size_t)cmd_buf->length) {
  344. CAM_ERR(CAM_UTIL, "Invalid length for cmd buf: %zu",
  345. (size_t)cmd_buf->length);
  346. return -EINVAL;
  347. }
  348. blob_ptr = (uint32_t *)(((uint8_t *)cpu_addr) +
  349. cmd_buf->offset);
  350. CAM_DBG(CAM_UTIL,
  351. "GenericCmdBuffer cpuaddr=%pK, blobptr=%pK, len=%d",
  352. (void *)cpu_addr, (void *)blob_ptr, cmd_buf->length);
  353. len_read = 0;
  354. while (len_read < cmd_buf->length) {
  355. blob_type =
  356. ((*blob_ptr) & CAM_GENERIC_BLOB_CMDBUFFER_TYPE_MASK) >>
  357. CAM_GENERIC_BLOB_CMDBUFFER_TYPE_SHIFT;
  358. blob_size =
  359. ((*blob_ptr) & CAM_GENERIC_BLOB_CMDBUFFER_SIZE_MASK) >>
  360. CAM_GENERIC_BLOB_CMDBUFFER_SIZE_SHIFT;
  361. blob_block_size = sizeof(uint32_t) +
  362. (((blob_size + sizeof(uint32_t) - 1) /
  363. sizeof(uint32_t)) * sizeof(uint32_t));
  364. CAM_DBG(CAM_UTIL,
  365. "Blob type=%d size=%d block_size=%d len_read=%d total=%d",
  366. blob_type, blob_size, blob_block_size, len_read,
  367. cmd_buf->length);
  368. if (len_read + blob_block_size > cmd_buf->length) {
  369. CAM_ERR(CAM_UTIL, "Invalid Blob %d %d %d %d",
  370. blob_type, blob_size, len_read,
  371. cmd_buf->length);
  372. rc = -EINVAL;
  373. goto end;
  374. }
  375. len_read += blob_block_size;
  376. rc = blob_handler_cb(user_data, blob_type, blob_size,
  377. (uint8_t *)(blob_ptr + 1));
  378. if (rc) {
  379. CAM_ERR(CAM_UTIL, "Error in handling blob type %d %d",
  380. blob_type, blob_size);
  381. goto end;
  382. }
  383. blob_ptr += (blob_block_size / sizeof(uint32_t));
  384. }
  385. end:
  386. return rc;
  387. }