main.c 94 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/pm_wakeup.h>
  14. #include <linux/reboot.h>
  15. #include <linux/rwsem.h>
  16. #include <linux/suspend.h>
  17. #include <linux/timer.h>
  18. #include <linux/version.h>
  19. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  20. #include <linux/panic_notifier.h>
  21. #endif
  22. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  23. #include <soc/qcom/minidump.h>
  24. #endif
  25. #include "cnss_plat_ipc_qmi.h"
  26. #include "main.h"
  27. #include "bus.h"
  28. #include "debug.h"
  29. #include "genl.h"
  30. #define CNSS_DUMP_FORMAT_VER 0x11
  31. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  32. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  33. #define CNSS_DUMP_NAME "CNSS_WLAN"
  34. #define CNSS_DUMP_DESC_SIZE 0x1000
  35. #define CNSS_DUMP_SEG_VER 0x1
  36. #define FILE_SYSTEM_READY 1
  37. #define FW_READY_TIMEOUT 20000
  38. #define FW_ASSERT_TIMEOUT 5000
  39. #define CNSS_EVENT_PENDING 2989
  40. #define POWER_RESET_MIN_DELAY_MS 100
  41. #define CNSS_QUIRKS_DEFAULT 0
  42. #ifdef CONFIG_CNSS_EMULATION
  43. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  44. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  45. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  46. #else
  47. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  48. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  49. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  50. #endif
  51. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  52. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  53. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  54. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  55. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  56. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  57. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  58. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  59. enum cnss_cal_db_op {
  60. CNSS_CAL_DB_UPLOAD,
  61. CNSS_CAL_DB_DOWNLOAD,
  62. CNSS_CAL_DB_INVALID_OP,
  63. };
  64. static struct cnss_plat_data *plat_env;
  65. static DECLARE_RWSEM(cnss_pm_sem);
  66. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  67. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  68. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  69. };
  70. static struct cnss_fw_files FW_FILES_DEFAULT = {
  71. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  72. "utfbd.bin", "epping.bin", "evicted.bin"
  73. };
  74. struct cnss_driver_event {
  75. struct list_head list;
  76. enum cnss_driver_event_type type;
  77. bool sync;
  78. struct completion complete;
  79. int ret;
  80. void *data;
  81. };
  82. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  83. struct cnss_plat_data *plat_priv)
  84. {
  85. plat_env = plat_priv;
  86. }
  87. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  88. {
  89. return plat_env;
  90. }
  91. /**
  92. * cnss_get_mem_seg_count - Get segment count of memory
  93. * @type: memory type
  94. * @seg: segment count
  95. *
  96. * Return: 0 on success, negative value on failure
  97. */
  98. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  99. {
  100. struct cnss_plat_data *plat_priv;
  101. plat_priv = cnss_get_plat_priv(NULL);
  102. if (!plat_priv)
  103. return -ENODEV;
  104. switch (type) {
  105. case CNSS_REMOTE_MEM_TYPE_FW:
  106. *seg = plat_priv->fw_mem_seg_len;
  107. break;
  108. case CNSS_REMOTE_MEM_TYPE_QDSS:
  109. *seg = plat_priv->qdss_mem_seg_len;
  110. break;
  111. default:
  112. return -EINVAL;
  113. }
  114. return 0;
  115. }
  116. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  117. /**
  118. * cnss_get_mem_segment_info - Get memory info of different type
  119. * @type: memory type
  120. * @segment: array to save the segment info
  121. * @seg: segment count
  122. *
  123. * Return: 0 on success, negative value on failure
  124. */
  125. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  126. struct cnss_mem_segment segment[],
  127. u32 segment_count)
  128. {
  129. struct cnss_plat_data *plat_priv;
  130. u32 i;
  131. plat_priv = cnss_get_plat_priv(NULL);
  132. if (!plat_priv)
  133. return -ENODEV;
  134. switch (type) {
  135. case CNSS_REMOTE_MEM_TYPE_FW:
  136. if (segment_count > plat_priv->fw_mem_seg_len)
  137. segment_count = plat_priv->fw_mem_seg_len;
  138. for (i = 0; i < segment_count; i++) {
  139. segment[i].size = plat_priv->fw_mem[i].size;
  140. segment[i].va = plat_priv->fw_mem[i].va;
  141. segment[i].pa = plat_priv->fw_mem[i].pa;
  142. }
  143. break;
  144. case CNSS_REMOTE_MEM_TYPE_QDSS:
  145. if (segment_count > plat_priv->qdss_mem_seg_len)
  146. segment_count = plat_priv->qdss_mem_seg_len;
  147. for (i = 0; i < segment_count; i++) {
  148. segment[i].size = plat_priv->qdss_mem[i].size;
  149. segment[i].va = plat_priv->qdss_mem[i].va;
  150. segment[i].pa = plat_priv->qdss_mem[i].pa;
  151. }
  152. break;
  153. default:
  154. return -EINVAL;
  155. }
  156. return 0;
  157. }
  158. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  159. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  160. enum cnss_feature_v01 feature)
  161. {
  162. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  163. return -EINVAL;
  164. plat_priv->feature_list |= 1 << feature;
  165. return 0;
  166. }
  167. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  168. u64 *feature_list)
  169. {
  170. if (unlikely(!plat_priv))
  171. return -EINVAL;
  172. *feature_list = plat_priv->feature_list;
  173. return 0;
  174. }
  175. static int cnss_pm_notify(struct notifier_block *b,
  176. unsigned long event, void *p)
  177. {
  178. switch (event) {
  179. case PM_SUSPEND_PREPARE:
  180. down_write(&cnss_pm_sem);
  181. break;
  182. case PM_POST_SUSPEND:
  183. up_write(&cnss_pm_sem);
  184. break;
  185. }
  186. return NOTIFY_DONE;
  187. }
  188. static struct notifier_block cnss_pm_notifier = {
  189. .notifier_call = cnss_pm_notify,
  190. };
  191. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  192. {
  193. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  194. return;
  195. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  196. plat_priv->driver_state,
  197. atomic_read(&plat_priv->pm_count));
  198. pm_stay_awake(&plat_priv->plat_dev->dev);
  199. }
  200. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  201. {
  202. int r = atomic_dec_return(&plat_priv->pm_count);
  203. WARN_ON(r < 0);
  204. if (r != 0)
  205. return;
  206. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  207. plat_priv->driver_state,
  208. atomic_read(&plat_priv->pm_count));
  209. pm_relax(&plat_priv->plat_dev->dev);
  210. }
  211. void cnss_lock_pm_sem(struct device *dev)
  212. {
  213. down_read(&cnss_pm_sem);
  214. }
  215. EXPORT_SYMBOL(cnss_lock_pm_sem);
  216. void cnss_release_pm_sem(struct device *dev)
  217. {
  218. up_read(&cnss_pm_sem);
  219. }
  220. EXPORT_SYMBOL(cnss_release_pm_sem);
  221. int cnss_get_fw_files_for_target(struct device *dev,
  222. struct cnss_fw_files *pfw_files,
  223. u32 target_type, u32 target_version)
  224. {
  225. if (!pfw_files)
  226. return -ENODEV;
  227. switch (target_version) {
  228. case QCA6174_REV3_VERSION:
  229. case QCA6174_REV3_2_VERSION:
  230. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  231. break;
  232. default:
  233. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  234. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  235. target_type, target_version);
  236. break;
  237. }
  238. return 0;
  239. }
  240. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  241. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  242. {
  243. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  244. if (!plat_priv)
  245. return -ENODEV;
  246. if (!cap)
  247. return -EINVAL;
  248. *cap = plat_priv->cap;
  249. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  250. return 0;
  251. }
  252. EXPORT_SYMBOL(cnss_get_platform_cap);
  253. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  254. {
  255. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  256. if (!plat_priv)
  257. return;
  258. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  259. }
  260. EXPORT_SYMBOL(cnss_request_pm_qos);
  261. void cnss_remove_pm_qos(struct device *dev)
  262. {
  263. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  264. if (!plat_priv)
  265. return;
  266. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  267. }
  268. EXPORT_SYMBOL(cnss_remove_pm_qos);
  269. int cnss_wlan_enable(struct device *dev,
  270. struct cnss_wlan_enable_cfg *config,
  271. enum cnss_driver_mode mode,
  272. const char *host_version)
  273. {
  274. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  275. int ret = 0;
  276. if (!plat_priv)
  277. return -ENODEV;
  278. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  279. return 0;
  280. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  281. return 0;
  282. if (!config || !host_version) {
  283. cnss_pr_err("Invalid config or host_version pointer\n");
  284. return -EINVAL;
  285. }
  286. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  287. mode, config, host_version);
  288. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  289. goto skip_cfg;
  290. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  291. if (ret)
  292. goto out;
  293. skip_cfg:
  294. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  295. out:
  296. return ret;
  297. }
  298. EXPORT_SYMBOL(cnss_wlan_enable);
  299. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  300. {
  301. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  302. int ret = 0;
  303. if (!plat_priv)
  304. return -ENODEV;
  305. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  306. return 0;
  307. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  308. return 0;
  309. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  310. cnss_bus_free_qdss_mem(plat_priv);
  311. return ret;
  312. }
  313. EXPORT_SYMBOL(cnss_wlan_disable);
  314. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  315. u32 data_len, u8 *output)
  316. {
  317. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  318. int ret = 0;
  319. if (!plat_priv) {
  320. cnss_pr_err("plat_priv is NULL!\n");
  321. return -EINVAL;
  322. }
  323. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  324. return 0;
  325. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  326. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  327. plat_priv->driver_state);
  328. ret = -EINVAL;
  329. goto out;
  330. }
  331. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  332. data_len, output);
  333. out:
  334. return ret;
  335. }
  336. EXPORT_SYMBOL(cnss_athdiag_read);
  337. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  338. u32 data_len, u8 *input)
  339. {
  340. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  341. int ret = 0;
  342. if (!plat_priv) {
  343. cnss_pr_err("plat_priv is NULL!\n");
  344. return -EINVAL;
  345. }
  346. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  347. return 0;
  348. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  349. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  350. plat_priv->driver_state);
  351. ret = -EINVAL;
  352. goto out;
  353. }
  354. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  355. data_len, input);
  356. out:
  357. return ret;
  358. }
  359. EXPORT_SYMBOL(cnss_athdiag_write);
  360. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  361. {
  362. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  363. if (!plat_priv)
  364. return -ENODEV;
  365. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  366. return 0;
  367. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  368. }
  369. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  370. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  371. {
  372. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  373. if (!plat_priv)
  374. return -EINVAL;
  375. if (plat_priv->device_id != QCA6490_DEVICE_ID ||
  376. !plat_priv->fw_pcie_gen_switch)
  377. return -EOPNOTSUPP;
  378. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  379. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  380. return -EINVAL;
  381. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  382. plat_priv->pcie_gen_speed = pcie_gen_speed;
  383. return 0;
  384. }
  385. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  386. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  387. {
  388. int ret = 0;
  389. if (!plat_priv)
  390. return -ENODEV;
  391. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  392. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  393. if (ret)
  394. goto out;
  395. if (plat_priv->hds_enabled)
  396. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  397. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  398. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  399. plat_priv->ctrl_params.bdf_type);
  400. if (ret)
  401. goto out;
  402. ret = cnss_bus_load_m3(plat_priv);
  403. if (ret)
  404. goto out;
  405. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  406. if (ret)
  407. goto out;
  408. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  409. return 0;
  410. out:
  411. return ret;
  412. }
  413. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  414. {
  415. int ret = 0;
  416. if (!plat_priv->antenna) {
  417. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  418. if (ret)
  419. goto out;
  420. }
  421. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  422. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  423. if (ret)
  424. goto out;
  425. }
  426. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  427. if (ret)
  428. goto out;
  429. return 0;
  430. out:
  431. return ret;
  432. }
  433. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  434. {
  435. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  436. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  437. }
  438. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  439. {
  440. u32 i;
  441. int ret = 0;
  442. struct cnss_plat_ipc_daemon_config *cfg;
  443. ret = cnss_qmi_get_dms_mac(plat_priv);
  444. if (ret == 0 && plat_priv->dms.mac_valid)
  445. goto qmi_send;
  446. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  447. * Thus assert on failure to get MAC from DMS even after retries
  448. */
  449. if (plat_priv->use_nv_mac) {
  450. /* Check if Daemon says platform support DMS MAC provisioning */
  451. cfg = cnss_plat_ipc_qmi_daemon_config();
  452. if (cfg) {
  453. if (!cfg->dms_mac_addr_supported) {
  454. cnss_pr_err("DMS MAC address not supported\n");
  455. CNSS_ASSERT(0);
  456. return -EINVAL;
  457. }
  458. }
  459. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  460. if (plat_priv->dms.mac_valid)
  461. break;
  462. ret = cnss_qmi_get_dms_mac(plat_priv);
  463. if (ret == 0)
  464. break;
  465. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  466. }
  467. if (!plat_priv->dms.mac_valid) {
  468. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  469. CNSS_ASSERT(0);
  470. return -EINVAL;
  471. }
  472. }
  473. qmi_send:
  474. if (plat_priv->dms.mac_valid)
  475. ret =
  476. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  477. ARRAY_SIZE(plat_priv->dms.mac));
  478. return ret;
  479. }
  480. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  481. enum cnss_cal_db_op op, u32 *size)
  482. {
  483. int ret = 0;
  484. u32 timeout = cnss_get_timeout(plat_priv,
  485. CNSS_TIMEOUT_DAEMON_CONNECTION);
  486. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  487. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  488. if (op >= CNSS_CAL_DB_INVALID_OP)
  489. return -EINVAL;
  490. if (!plat_priv->cbc_file_download) {
  491. cnss_pr_info("CAL DB file not required as per BDF\n");
  492. return 0;
  493. }
  494. if (*size == 0) {
  495. cnss_pr_err("Invalid cal file size\n");
  496. return -EINVAL;
  497. }
  498. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  499. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  500. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  501. msecs_to_jiffies(timeout));
  502. if (!ret) {
  503. cnss_pr_err("Daemon not yet connected\n");
  504. CNSS_ASSERT(0);
  505. return ret;
  506. }
  507. }
  508. if (!plat_priv->cal_mem->va) {
  509. cnss_pr_err("CAL DB Memory not setup for FW\n");
  510. return -EINVAL;
  511. }
  512. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  513. if (op == CNSS_CAL_DB_DOWNLOAD) {
  514. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  515. ret = cnss_plat_ipc_qmi_file_download(client_id,
  516. CNSS_CAL_DB_FILE_NAME,
  517. plat_priv->cal_mem->va,
  518. size);
  519. } else {
  520. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  521. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  522. CNSS_CAL_DB_FILE_NAME,
  523. plat_priv->cal_mem->va,
  524. *size);
  525. }
  526. if (ret)
  527. cnss_pr_err("Cal DB file %s %s failure\n",
  528. CNSS_CAL_DB_FILE_NAME,
  529. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  530. else
  531. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  532. CNSS_CAL_DB_FILE_NAME,
  533. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  534. *size);
  535. return ret;
  536. }
  537. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  538. {
  539. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  540. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  541. return -EINVAL;
  542. }
  543. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  544. &plat_priv->cal_file_size);
  545. }
  546. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  547. u32 *cal_file_size)
  548. {
  549. /* To download pass the total size of cal DB mem allocated.
  550. * After cal file is download to mem, its size is updated in
  551. * return pointer
  552. */
  553. *cal_file_size = plat_priv->cal_mem->size;
  554. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  555. cal_file_size);
  556. }
  557. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  558. {
  559. int ret = 0;
  560. u32 cal_file_size = 0;
  561. if (!plat_priv)
  562. return -ENODEV;
  563. cnss_pr_dbg("Processing FW Init Done..\n");
  564. del_timer(&plat_priv->fw_boot_timer);
  565. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  566. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  567. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  568. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  569. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  570. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  571. }
  572. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  573. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  574. CNSS_WALTEST);
  575. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  576. cnss_request_antenna_sharing(plat_priv);
  577. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  578. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  579. plat_priv->cal_time = jiffies;
  580. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  581. CNSS_CALIBRATION);
  582. } else {
  583. ret = cnss_setup_dms_mac(plat_priv);
  584. ret = cnss_bus_call_driver_probe(plat_priv);
  585. }
  586. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  587. goto out;
  588. else if (ret)
  589. goto shutdown;
  590. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  591. return 0;
  592. shutdown:
  593. cnss_bus_dev_shutdown(plat_priv);
  594. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  595. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  596. out:
  597. return ret;
  598. }
  599. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  600. {
  601. switch (type) {
  602. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  603. return "SERVER_ARRIVE";
  604. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  605. return "SERVER_EXIT";
  606. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  607. return "REQUEST_MEM";
  608. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  609. return "FW_MEM_READY";
  610. case CNSS_DRIVER_EVENT_FW_READY:
  611. return "FW_READY";
  612. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  613. return "COLD_BOOT_CAL_START";
  614. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  615. return "COLD_BOOT_CAL_DONE";
  616. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  617. return "REGISTER_DRIVER";
  618. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  619. return "UNREGISTER_DRIVER";
  620. case CNSS_DRIVER_EVENT_RECOVERY:
  621. return "RECOVERY";
  622. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  623. return "FORCE_FW_ASSERT";
  624. case CNSS_DRIVER_EVENT_POWER_UP:
  625. return "POWER_UP";
  626. case CNSS_DRIVER_EVENT_POWER_DOWN:
  627. return "POWER_DOWN";
  628. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  629. return "IDLE_RESTART";
  630. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  631. return "IDLE_SHUTDOWN";
  632. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  633. return "IMS_WFC_CALL_IND";
  634. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  635. return "WLFW_TWC_CFG_IND";
  636. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  637. return "QDSS_TRACE_REQ_MEM";
  638. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  639. return "FW_MEM_FILE_SAVE";
  640. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  641. return "QDSS_TRACE_FREE";
  642. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  643. return "QDSS_TRACE_REQ_DATA";
  644. case CNSS_DRIVER_EVENT_MAX:
  645. return "EVENT_MAX";
  646. }
  647. return "UNKNOWN";
  648. };
  649. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  650. enum cnss_driver_event_type type,
  651. u32 flags, void *data)
  652. {
  653. struct cnss_driver_event *event;
  654. unsigned long irq_flags;
  655. int gfp = GFP_KERNEL;
  656. int ret = 0;
  657. if (!plat_priv)
  658. return -ENODEV;
  659. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  660. cnss_driver_event_to_str(type), type,
  661. flags ? "-sync" : "", plat_priv->driver_state, flags);
  662. if (type >= CNSS_DRIVER_EVENT_MAX) {
  663. cnss_pr_err("Invalid Event type: %d, can't post", type);
  664. return -EINVAL;
  665. }
  666. if (in_interrupt() || irqs_disabled())
  667. gfp = GFP_ATOMIC;
  668. event = kzalloc(sizeof(*event), gfp);
  669. if (!event)
  670. return -ENOMEM;
  671. cnss_pm_stay_awake(plat_priv);
  672. event->type = type;
  673. event->data = data;
  674. init_completion(&event->complete);
  675. event->ret = CNSS_EVENT_PENDING;
  676. event->sync = !!(flags & CNSS_EVENT_SYNC);
  677. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  678. list_add_tail(&event->list, &plat_priv->event_list);
  679. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  680. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  681. if (!(flags & CNSS_EVENT_SYNC))
  682. goto out;
  683. if (flags & CNSS_EVENT_UNKILLABLE)
  684. wait_for_completion(&event->complete);
  685. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  686. ret = wait_for_completion_killable(&event->complete);
  687. else
  688. ret = wait_for_completion_interruptible(&event->complete);
  689. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  690. cnss_driver_event_to_str(type), type,
  691. plat_priv->driver_state, ret, event->ret);
  692. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  693. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  694. event->sync = false;
  695. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  696. ret = -EINTR;
  697. goto out;
  698. }
  699. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  700. ret = event->ret;
  701. kfree(event);
  702. out:
  703. cnss_pm_relax(plat_priv);
  704. return ret;
  705. }
  706. /**
  707. * cnss_get_timeout - Get timeout for corresponding type.
  708. * @plat_priv: Pointer to platform driver context.
  709. * @cnss_timeout_type: Timeout type.
  710. *
  711. * Return: Timeout in milliseconds.
  712. */
  713. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  714. enum cnss_timeout_type timeout_type)
  715. {
  716. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  717. switch (timeout_type) {
  718. case CNSS_TIMEOUT_QMI:
  719. return qmi_timeout;
  720. case CNSS_TIMEOUT_POWER_UP:
  721. return (qmi_timeout << 2);
  722. case CNSS_TIMEOUT_IDLE_RESTART:
  723. /* In idle restart power up sequence, we have fw_boot_timer to
  724. * handle FW initialization failure.
  725. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  726. * account for FW dump collection and FW re-initialization on
  727. * retry.
  728. */
  729. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  730. case CNSS_TIMEOUT_CALIBRATION:
  731. /* Similar to mission mode, in CBC if FW init fails
  732. * fw recovery is tried. Thus return 2x the CBC timeout.
  733. */
  734. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  735. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  736. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  737. case CNSS_TIMEOUT_RDDM:
  738. return CNSS_RDDM_TIMEOUT_MS;
  739. case CNSS_TIMEOUT_RECOVERY:
  740. return RECOVERY_TIMEOUT;
  741. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  742. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  743. default:
  744. return qmi_timeout;
  745. }
  746. }
  747. unsigned int cnss_get_boot_timeout(struct device *dev)
  748. {
  749. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  750. if (!plat_priv) {
  751. cnss_pr_err("plat_priv is NULL\n");
  752. return 0;
  753. }
  754. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  755. }
  756. EXPORT_SYMBOL(cnss_get_boot_timeout);
  757. int cnss_power_up(struct device *dev)
  758. {
  759. int ret = 0;
  760. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  761. unsigned int timeout;
  762. if (!plat_priv) {
  763. cnss_pr_err("plat_priv is NULL\n");
  764. return -ENODEV;
  765. }
  766. cnss_pr_dbg("Powering up device\n");
  767. ret = cnss_driver_event_post(plat_priv,
  768. CNSS_DRIVER_EVENT_POWER_UP,
  769. CNSS_EVENT_SYNC, NULL);
  770. if (ret)
  771. goto out;
  772. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  773. goto out;
  774. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  775. reinit_completion(&plat_priv->power_up_complete);
  776. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  777. msecs_to_jiffies(timeout));
  778. if (!ret) {
  779. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  780. timeout);
  781. ret = -EAGAIN;
  782. goto out;
  783. }
  784. return 0;
  785. out:
  786. return ret;
  787. }
  788. EXPORT_SYMBOL(cnss_power_up);
  789. int cnss_power_down(struct device *dev)
  790. {
  791. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  792. if (!plat_priv) {
  793. cnss_pr_err("plat_priv is NULL\n");
  794. return -ENODEV;
  795. }
  796. cnss_pr_dbg("Powering down device\n");
  797. return cnss_driver_event_post(plat_priv,
  798. CNSS_DRIVER_EVENT_POWER_DOWN,
  799. CNSS_EVENT_SYNC, NULL);
  800. }
  801. EXPORT_SYMBOL(cnss_power_down);
  802. int cnss_idle_restart(struct device *dev)
  803. {
  804. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  805. unsigned int timeout;
  806. int ret = 0;
  807. if (!plat_priv) {
  808. cnss_pr_err("plat_priv is NULL\n");
  809. return -ENODEV;
  810. }
  811. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  812. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  813. return -EBUSY;
  814. }
  815. cnss_pr_dbg("Doing idle restart\n");
  816. reinit_completion(&plat_priv->power_up_complete);
  817. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  818. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  819. ret = -EINVAL;
  820. goto out;
  821. }
  822. ret = cnss_driver_event_post(plat_priv,
  823. CNSS_DRIVER_EVENT_IDLE_RESTART,
  824. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  825. if (ret)
  826. goto out;
  827. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  828. ret = cnss_bus_call_driver_probe(plat_priv);
  829. goto out;
  830. }
  831. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  832. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  833. msecs_to_jiffies(timeout));
  834. if (plat_priv->power_up_error) {
  835. ret = plat_priv->power_up_error;
  836. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  837. cnss_pr_dbg("Power up error:%d, exiting\n",
  838. plat_priv->power_up_error);
  839. goto out;
  840. }
  841. if (!ret) {
  842. /* This exception occurs after attempting retry of FW recovery.
  843. * Thus we can safely power off the device.
  844. */
  845. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  846. timeout);
  847. ret = -ETIMEDOUT;
  848. cnss_power_down(dev);
  849. CNSS_ASSERT(0);
  850. goto out;
  851. }
  852. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  853. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  854. del_timer(&plat_priv->fw_boot_timer);
  855. ret = -EINVAL;
  856. goto out;
  857. }
  858. mutex_unlock(&plat_priv->driver_ops_lock);
  859. return 0;
  860. out:
  861. mutex_unlock(&plat_priv->driver_ops_lock);
  862. return ret;
  863. }
  864. EXPORT_SYMBOL(cnss_idle_restart);
  865. int cnss_idle_shutdown(struct device *dev)
  866. {
  867. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  868. unsigned int timeout;
  869. int ret;
  870. if (!plat_priv) {
  871. cnss_pr_err("plat_priv is NULL\n");
  872. return -ENODEV;
  873. }
  874. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  875. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  876. return -EAGAIN;
  877. }
  878. cnss_pr_dbg("Doing idle shutdown\n");
  879. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  880. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  881. goto skip_wait;
  882. reinit_completion(&plat_priv->recovery_complete);
  883. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  884. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  885. msecs_to_jiffies(timeout));
  886. if (!ret) {
  887. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  888. timeout);
  889. CNSS_ASSERT(0);
  890. }
  891. skip_wait:
  892. return cnss_driver_event_post(plat_priv,
  893. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  894. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  895. }
  896. EXPORT_SYMBOL(cnss_idle_shutdown);
  897. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  898. {
  899. int ret = 0;
  900. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  901. if (ret) {
  902. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  903. goto out;
  904. }
  905. ret = cnss_get_clk(plat_priv);
  906. if (ret) {
  907. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  908. goto put_vreg;
  909. }
  910. ret = cnss_get_pinctrl(plat_priv);
  911. if (ret) {
  912. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  913. goto put_clk;
  914. }
  915. return 0;
  916. put_clk:
  917. cnss_put_clk(plat_priv);
  918. put_vreg:
  919. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  920. out:
  921. return ret;
  922. }
  923. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  924. {
  925. cnss_put_clk(plat_priv);
  926. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  927. }
  928. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  929. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  930. unsigned long code,
  931. void *ss_handle)
  932. {
  933. struct cnss_plat_data *plat_priv =
  934. container_of(nb, struct cnss_plat_data, modem_nb);
  935. struct cnss_esoc_info *esoc_info;
  936. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  937. if (!plat_priv)
  938. return NOTIFY_DONE;
  939. esoc_info = &plat_priv->esoc_info;
  940. if (code == SUBSYS_AFTER_POWERUP)
  941. esoc_info->modem_current_status = 1;
  942. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  943. esoc_info->modem_current_status = 0;
  944. else
  945. return NOTIFY_DONE;
  946. if (!cnss_bus_call_driver_modem_status(plat_priv,
  947. esoc_info->modem_current_status))
  948. return NOTIFY_DONE;
  949. return NOTIFY_OK;
  950. }
  951. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  952. {
  953. int ret = 0;
  954. struct device *dev;
  955. struct cnss_esoc_info *esoc_info;
  956. struct esoc_desc *esoc_desc;
  957. const char *client_desc;
  958. dev = &plat_priv->plat_dev->dev;
  959. esoc_info = &plat_priv->esoc_info;
  960. esoc_info->notify_modem_status =
  961. of_property_read_bool(dev->of_node,
  962. "qcom,notify-modem-status");
  963. if (!esoc_info->notify_modem_status)
  964. goto out;
  965. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  966. &client_desc);
  967. if (ret) {
  968. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  969. } else {
  970. esoc_desc = devm_register_esoc_client(dev, client_desc);
  971. if (IS_ERR_OR_NULL(esoc_desc)) {
  972. ret = PTR_RET(esoc_desc);
  973. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  974. ret);
  975. goto out;
  976. }
  977. esoc_info->esoc_desc = esoc_desc;
  978. }
  979. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  980. esoc_info->modem_current_status = 0;
  981. esoc_info->modem_notify_handler =
  982. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  983. esoc_info->esoc_desc->name :
  984. "modem", &plat_priv->modem_nb);
  985. if (IS_ERR(esoc_info->modem_notify_handler)) {
  986. ret = PTR_ERR(esoc_info->modem_notify_handler);
  987. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  988. ret);
  989. goto unreg_esoc;
  990. }
  991. return 0;
  992. unreg_esoc:
  993. if (esoc_info->esoc_desc)
  994. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  995. out:
  996. return ret;
  997. }
  998. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  999. {
  1000. struct device *dev;
  1001. struct cnss_esoc_info *esoc_info;
  1002. dev = &plat_priv->plat_dev->dev;
  1003. esoc_info = &plat_priv->esoc_info;
  1004. if (esoc_info->notify_modem_status)
  1005. subsys_notif_unregister_notifier
  1006. (esoc_info->modem_notify_handler,
  1007. &plat_priv->modem_nb);
  1008. if (esoc_info->esoc_desc)
  1009. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1010. }
  1011. #else
  1012. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1013. {
  1014. return 0;
  1015. }
  1016. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1017. #endif
  1018. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1019. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1020. {
  1021. struct cnss_plat_data *plat_priv;
  1022. int ret = 0;
  1023. if (!subsys_desc->dev) {
  1024. cnss_pr_err("dev from subsys_desc is NULL\n");
  1025. return -ENODEV;
  1026. }
  1027. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1028. if (!plat_priv) {
  1029. cnss_pr_err("plat_priv is NULL\n");
  1030. return -ENODEV;
  1031. }
  1032. if (!plat_priv->driver_state) {
  1033. cnss_pr_dbg("Powerup is ignored\n");
  1034. return 0;
  1035. }
  1036. ret = cnss_bus_dev_powerup(plat_priv);
  1037. if (ret)
  1038. __pm_relax(plat_priv->recovery_ws);
  1039. return ret;
  1040. }
  1041. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1042. bool force_stop)
  1043. {
  1044. struct cnss_plat_data *plat_priv;
  1045. if (!subsys_desc->dev) {
  1046. cnss_pr_err("dev from subsys_desc is NULL\n");
  1047. return -ENODEV;
  1048. }
  1049. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1050. if (!plat_priv) {
  1051. cnss_pr_err("plat_priv is NULL\n");
  1052. return -ENODEV;
  1053. }
  1054. if (!plat_priv->driver_state) {
  1055. cnss_pr_dbg("shutdown is ignored\n");
  1056. return 0;
  1057. }
  1058. return cnss_bus_dev_shutdown(plat_priv);
  1059. }
  1060. void cnss_device_crashed(struct device *dev)
  1061. {
  1062. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1063. struct cnss_subsys_info *subsys_info;
  1064. if (!plat_priv)
  1065. return;
  1066. subsys_info = &plat_priv->subsys_info;
  1067. if (subsys_info->subsys_device) {
  1068. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1069. subsys_set_crash_status(subsys_info->subsys_device, true);
  1070. subsystem_restart_dev(subsys_info->subsys_device);
  1071. }
  1072. }
  1073. EXPORT_SYMBOL(cnss_device_crashed);
  1074. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1075. {
  1076. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1077. if (!plat_priv) {
  1078. cnss_pr_err("plat_priv is NULL\n");
  1079. return;
  1080. }
  1081. cnss_bus_dev_crash_shutdown(plat_priv);
  1082. }
  1083. static int cnss_subsys_ramdump(int enable,
  1084. const struct subsys_desc *subsys_desc)
  1085. {
  1086. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1087. if (!plat_priv) {
  1088. cnss_pr_err("plat_priv is NULL\n");
  1089. return -ENODEV;
  1090. }
  1091. if (!enable)
  1092. return 0;
  1093. return cnss_bus_dev_ramdump(plat_priv);
  1094. }
  1095. static void cnss_recovery_work_handler(struct work_struct *work)
  1096. {
  1097. }
  1098. #else
  1099. static void cnss_recovery_work_handler(struct work_struct *work)
  1100. {
  1101. int ret;
  1102. struct cnss_plat_data *plat_priv =
  1103. container_of(work, struct cnss_plat_data, recovery_work);
  1104. if (!plat_priv->recovery_enabled)
  1105. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1106. cnss_bus_dev_shutdown(plat_priv);
  1107. cnss_bus_dev_ramdump(plat_priv);
  1108. msleep(POWER_RESET_MIN_DELAY_MS);
  1109. ret = cnss_bus_dev_powerup(plat_priv);
  1110. if (ret)
  1111. __pm_relax(plat_priv->recovery_ws);
  1112. return;
  1113. }
  1114. void cnss_device_crashed(struct device *dev)
  1115. {
  1116. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1117. if (!plat_priv)
  1118. return;
  1119. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1120. schedule_work(&plat_priv->recovery_work);
  1121. }
  1122. EXPORT_SYMBOL(cnss_device_crashed);
  1123. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1124. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1125. {
  1126. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1127. struct cnss_ramdump_info *ramdump_info;
  1128. if (!plat_priv)
  1129. return NULL;
  1130. ramdump_info = &plat_priv->ramdump_info;
  1131. *size = ramdump_info->ramdump_size;
  1132. return ramdump_info->ramdump_va;
  1133. }
  1134. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1135. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1136. {
  1137. switch (reason) {
  1138. case CNSS_REASON_DEFAULT:
  1139. return "DEFAULT";
  1140. case CNSS_REASON_LINK_DOWN:
  1141. return "LINK_DOWN";
  1142. case CNSS_REASON_RDDM:
  1143. return "RDDM";
  1144. case CNSS_REASON_TIMEOUT:
  1145. return "TIMEOUT";
  1146. }
  1147. return "UNKNOWN";
  1148. };
  1149. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1150. enum cnss_recovery_reason reason)
  1151. {
  1152. plat_priv->recovery_count++;
  1153. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1154. goto self_recovery;
  1155. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1156. cnss_pr_dbg("Skip device recovery\n");
  1157. return 0;
  1158. }
  1159. /* FW recovery sequence has multiple steps and firmware load requires
  1160. * linux PM in awake state. Thus hold the cnss wake source until
  1161. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1162. * time taken in this process.
  1163. */
  1164. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1165. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1166. true);
  1167. switch (reason) {
  1168. case CNSS_REASON_LINK_DOWN:
  1169. if (!cnss_bus_check_link_status(plat_priv)) {
  1170. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1171. return 0;
  1172. }
  1173. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1174. &plat_priv->ctrl_params.quirks))
  1175. goto self_recovery;
  1176. if (!cnss_bus_recover_link_down(plat_priv)) {
  1177. /* clear recovery bit here to avoid skipping
  1178. * the recovery work for RDDM later
  1179. */
  1180. clear_bit(CNSS_DRIVER_RECOVERY,
  1181. &plat_priv->driver_state);
  1182. return 0;
  1183. }
  1184. break;
  1185. case CNSS_REASON_RDDM:
  1186. cnss_bus_collect_dump_info(plat_priv, false);
  1187. break;
  1188. case CNSS_REASON_DEFAULT:
  1189. case CNSS_REASON_TIMEOUT:
  1190. break;
  1191. default:
  1192. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1193. cnss_recovery_reason_to_str(reason), reason);
  1194. break;
  1195. }
  1196. cnss_bus_device_crashed(plat_priv);
  1197. return 0;
  1198. self_recovery:
  1199. cnss_pr_dbg("Going for self recovery\n");
  1200. cnss_bus_dev_shutdown(plat_priv);
  1201. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1202. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1203. &plat_priv->ctrl_params.quirks);
  1204. cnss_bus_dev_powerup(plat_priv);
  1205. return 0;
  1206. }
  1207. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1208. void *data)
  1209. {
  1210. struct cnss_recovery_data *recovery_data = data;
  1211. int ret = 0;
  1212. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1213. cnss_recovery_reason_to_str(recovery_data->reason),
  1214. recovery_data->reason);
  1215. if (!plat_priv->driver_state) {
  1216. cnss_pr_err("Improper driver state, ignore recovery\n");
  1217. ret = -EINVAL;
  1218. goto out;
  1219. }
  1220. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1221. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1222. ret = -EINVAL;
  1223. goto out;
  1224. }
  1225. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1226. cnss_pr_err("Recovery is already in progress\n");
  1227. CNSS_ASSERT(0);
  1228. ret = -EINVAL;
  1229. goto out;
  1230. }
  1231. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1232. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1233. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1234. ret = -EINVAL;
  1235. goto out;
  1236. }
  1237. switch (plat_priv->device_id) {
  1238. case QCA6174_DEVICE_ID:
  1239. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1240. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1241. &plat_priv->driver_state)) {
  1242. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1243. ret = -EINVAL;
  1244. goto out;
  1245. }
  1246. break;
  1247. default:
  1248. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1249. set_bit(CNSS_FW_BOOT_RECOVERY,
  1250. &plat_priv->driver_state);
  1251. }
  1252. break;
  1253. }
  1254. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1255. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1256. out:
  1257. kfree(data);
  1258. return ret;
  1259. }
  1260. int cnss_self_recovery(struct device *dev,
  1261. enum cnss_recovery_reason reason)
  1262. {
  1263. cnss_schedule_recovery(dev, reason);
  1264. return 0;
  1265. }
  1266. EXPORT_SYMBOL(cnss_self_recovery);
  1267. void cnss_schedule_recovery(struct device *dev,
  1268. enum cnss_recovery_reason reason)
  1269. {
  1270. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1271. struct cnss_recovery_data *data;
  1272. int gfp = GFP_KERNEL;
  1273. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1274. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1275. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1276. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1277. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1278. return;
  1279. }
  1280. if (in_interrupt() || irqs_disabled())
  1281. gfp = GFP_ATOMIC;
  1282. data = kzalloc(sizeof(*data), gfp);
  1283. if (!data)
  1284. return;
  1285. data->reason = reason;
  1286. cnss_driver_event_post(plat_priv,
  1287. CNSS_DRIVER_EVENT_RECOVERY,
  1288. 0, data);
  1289. }
  1290. EXPORT_SYMBOL(cnss_schedule_recovery);
  1291. int cnss_force_fw_assert(struct device *dev)
  1292. {
  1293. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1294. if (!plat_priv) {
  1295. cnss_pr_err("plat_priv is NULL\n");
  1296. return -ENODEV;
  1297. }
  1298. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1299. cnss_pr_info("Forced FW assert is not supported\n");
  1300. return -EOPNOTSUPP;
  1301. }
  1302. if (cnss_bus_is_device_down(plat_priv)) {
  1303. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1304. return 0;
  1305. }
  1306. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1307. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1308. return 0;
  1309. }
  1310. if (in_interrupt() || irqs_disabled())
  1311. cnss_driver_event_post(plat_priv,
  1312. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1313. 0, NULL);
  1314. else
  1315. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1316. return 0;
  1317. }
  1318. EXPORT_SYMBOL(cnss_force_fw_assert);
  1319. int cnss_force_collect_rddm(struct device *dev)
  1320. {
  1321. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1322. unsigned int timeout;
  1323. int ret = 0;
  1324. if (!plat_priv) {
  1325. cnss_pr_err("plat_priv is NULL\n");
  1326. return -ENODEV;
  1327. }
  1328. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1329. cnss_pr_info("Force collect rddm is not supported\n");
  1330. return -EOPNOTSUPP;
  1331. }
  1332. if (cnss_bus_is_device_down(plat_priv)) {
  1333. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1334. goto wait_rddm;
  1335. }
  1336. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1337. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1338. goto wait_rddm;
  1339. }
  1340. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1341. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1342. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1343. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1344. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1345. return 0;
  1346. }
  1347. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1348. if (ret)
  1349. return ret;
  1350. wait_rddm:
  1351. reinit_completion(&plat_priv->rddm_complete);
  1352. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1353. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1354. msecs_to_jiffies(timeout));
  1355. if (!ret) {
  1356. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1357. timeout);
  1358. ret = -ETIMEDOUT;
  1359. } else if (ret > 0) {
  1360. ret = 0;
  1361. }
  1362. return ret;
  1363. }
  1364. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1365. int cnss_qmi_send_get(struct device *dev)
  1366. {
  1367. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1368. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1369. return 0;
  1370. return cnss_bus_qmi_send_get(plat_priv);
  1371. }
  1372. EXPORT_SYMBOL(cnss_qmi_send_get);
  1373. int cnss_qmi_send_put(struct device *dev)
  1374. {
  1375. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1376. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1377. return 0;
  1378. return cnss_bus_qmi_send_put(plat_priv);
  1379. }
  1380. EXPORT_SYMBOL(cnss_qmi_send_put);
  1381. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1382. int cmd_len, void *cb_ctx,
  1383. int (*cb)(void *ctx, void *event, int event_len))
  1384. {
  1385. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1386. int ret;
  1387. if (!plat_priv)
  1388. return -ENODEV;
  1389. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1390. return -EINVAL;
  1391. plat_priv->get_info_cb = cb;
  1392. plat_priv->get_info_cb_ctx = cb_ctx;
  1393. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1394. if (ret) {
  1395. plat_priv->get_info_cb = NULL;
  1396. plat_priv->get_info_cb_ctx = NULL;
  1397. }
  1398. return ret;
  1399. }
  1400. EXPORT_SYMBOL(cnss_qmi_send);
  1401. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1402. {
  1403. int ret = 0;
  1404. u32 retry = 0;
  1405. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1406. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1407. goto out;
  1408. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1409. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1410. goto out;
  1411. }
  1412. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1413. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1414. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1415. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1416. CNSS_ASSERT(0);
  1417. return -EINVAL;
  1418. }
  1419. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1420. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1421. break;
  1422. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1423. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1424. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1425. CNSS_ASSERT(0);
  1426. ret = -EINVAL;
  1427. goto mark_cal_fail;
  1428. }
  1429. }
  1430. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1431. reinit_completion(&plat_priv->cal_complete);
  1432. ret = cnss_bus_dev_powerup(plat_priv);
  1433. mark_cal_fail:
  1434. if (ret) {
  1435. complete(&plat_priv->cal_complete);
  1436. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1437. /* Set CBC done in driver state to mark attempt and note error
  1438. * since calibration cannot be retried at boot.
  1439. */
  1440. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1441. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1442. }
  1443. out:
  1444. return ret;
  1445. }
  1446. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1447. void *data)
  1448. {
  1449. struct cnss_cal_info *cal_info = data;
  1450. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1451. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1452. goto out;
  1453. switch (cal_info->cal_status) {
  1454. case CNSS_CAL_DONE:
  1455. cnss_pr_dbg("Calibration completed successfully\n");
  1456. plat_priv->cal_done = true;
  1457. break;
  1458. case CNSS_CAL_TIMEOUT:
  1459. case CNSS_CAL_FAILURE:
  1460. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1461. cal_info->cal_status);
  1462. break;
  1463. default:
  1464. cnss_pr_err("Unknown calibration status: %u\n",
  1465. cal_info->cal_status);
  1466. break;
  1467. }
  1468. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1469. cnss_bus_free_qdss_mem(plat_priv);
  1470. cnss_release_antenna_sharing(plat_priv);
  1471. cnss_bus_dev_shutdown(plat_priv);
  1472. msleep(POWER_RESET_MIN_DELAY_MS);
  1473. complete(&plat_priv->cal_complete);
  1474. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1475. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1476. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1477. cnss_cal_mem_upload_to_file(plat_priv);
  1478. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work)
  1479. ) {
  1480. cnss_pr_dbg("Schedule WLAN driver load\n");
  1481. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1482. 0);
  1483. }
  1484. }
  1485. out:
  1486. kfree(data);
  1487. return 0;
  1488. }
  1489. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1490. {
  1491. int ret;
  1492. ret = cnss_bus_dev_powerup(plat_priv);
  1493. if (ret)
  1494. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1495. return ret;
  1496. }
  1497. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1498. {
  1499. cnss_bus_dev_shutdown(plat_priv);
  1500. return 0;
  1501. }
  1502. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1503. {
  1504. int ret = 0;
  1505. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1506. if (ret < 0)
  1507. return ret;
  1508. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1509. }
  1510. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1511. u32 mem_seg_len, u64 pa, u32 size)
  1512. {
  1513. int i = 0;
  1514. u64 offset = 0;
  1515. void *va = NULL;
  1516. u64 local_pa;
  1517. u32 local_size;
  1518. for (i = 0; i < mem_seg_len; i++) {
  1519. local_pa = (u64)fw_mem[i].pa;
  1520. local_size = (u32)fw_mem[i].size;
  1521. if (pa == local_pa && size <= local_size) {
  1522. va = fw_mem[i].va;
  1523. break;
  1524. }
  1525. if (pa > local_pa &&
  1526. pa < local_pa + local_size &&
  1527. pa + size <= local_pa + local_size) {
  1528. offset = pa - local_pa;
  1529. va = fw_mem[i].va + offset;
  1530. break;
  1531. }
  1532. }
  1533. return va;
  1534. }
  1535. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1536. void *data)
  1537. {
  1538. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1539. struct cnss_fw_mem *fw_mem_seg;
  1540. int ret = 0L;
  1541. void *va = NULL;
  1542. u32 i, fw_mem_seg_len;
  1543. switch (event_data->mem_type) {
  1544. case QMI_WLFW_MEM_TYPE_DDR_V01:
  1545. if (!plat_priv->fw_mem_seg_len)
  1546. goto invalid_mem_save;
  1547. fw_mem_seg = plat_priv->fw_mem;
  1548. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  1549. break;
  1550. case QMI_WLFW_MEM_QDSS_V01:
  1551. if (!plat_priv->qdss_mem_seg_len)
  1552. goto invalid_mem_save;
  1553. fw_mem_seg = plat_priv->qdss_mem;
  1554. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  1555. break;
  1556. default:
  1557. goto invalid_mem_save;
  1558. }
  1559. for (i = 0; i < event_data->mem_seg_len; i++) {
  1560. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  1561. event_data->mem_seg[i].addr,
  1562. event_data->mem_seg[i].size);
  1563. if (!va) {
  1564. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  1565. &event_data->mem_seg[i].addr,
  1566. event_data->mem_type);
  1567. ret = -EINVAL;
  1568. break;
  1569. }
  1570. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  1571. event_data->file_name,
  1572. event_data->mem_seg[i].size);
  1573. if (ret < 0) {
  1574. cnss_pr_err("Fail to save fw mem data: %d\n",
  1575. ret);
  1576. break;
  1577. }
  1578. }
  1579. kfree(data);
  1580. return ret;
  1581. invalid_mem_save:
  1582. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  1583. event_data->mem_type);
  1584. kfree(data);
  1585. return -EINVAL;
  1586. }
  1587. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  1588. {
  1589. cnss_bus_free_qdss_mem(plat_priv);
  1590. return 0;
  1591. }
  1592. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  1593. void *data)
  1594. {
  1595. int ret = 0;
  1596. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1597. if (!plat_priv)
  1598. return -ENODEV;
  1599. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  1600. event_data->total_size);
  1601. kfree(data);
  1602. return ret;
  1603. }
  1604. static void cnss_driver_event_work(struct work_struct *work)
  1605. {
  1606. struct cnss_plat_data *plat_priv =
  1607. container_of(work, struct cnss_plat_data, event_work);
  1608. struct cnss_driver_event *event;
  1609. unsigned long flags;
  1610. int ret = 0;
  1611. if (!plat_priv) {
  1612. cnss_pr_err("plat_priv is NULL!\n");
  1613. return;
  1614. }
  1615. cnss_pm_stay_awake(plat_priv);
  1616. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1617. while (!list_empty(&plat_priv->event_list)) {
  1618. event = list_first_entry(&plat_priv->event_list,
  1619. struct cnss_driver_event, list);
  1620. list_del(&event->list);
  1621. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1622. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  1623. cnss_driver_event_to_str(event->type),
  1624. event->sync ? "-sync" : "", event->type,
  1625. plat_priv->driver_state);
  1626. switch (event->type) {
  1627. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1628. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  1629. break;
  1630. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1631. ret = cnss_wlfw_server_exit(plat_priv);
  1632. break;
  1633. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1634. ret = cnss_bus_alloc_fw_mem(plat_priv);
  1635. if (ret)
  1636. break;
  1637. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  1638. break;
  1639. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1640. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  1641. break;
  1642. case CNSS_DRIVER_EVENT_FW_READY:
  1643. ret = cnss_fw_ready_hdlr(plat_priv);
  1644. break;
  1645. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1646. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  1647. break;
  1648. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1649. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  1650. event->data);
  1651. break;
  1652. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1653. ret = cnss_bus_register_driver_hdlr(plat_priv,
  1654. event->data);
  1655. break;
  1656. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1657. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  1658. break;
  1659. case CNSS_DRIVER_EVENT_RECOVERY:
  1660. ret = cnss_driver_recovery_hdlr(plat_priv,
  1661. event->data);
  1662. break;
  1663. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1664. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1665. break;
  1666. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1667. set_bit(CNSS_DRIVER_IDLE_RESTART,
  1668. &plat_priv->driver_state);
  1669. /* fall through */
  1670. case CNSS_DRIVER_EVENT_POWER_UP:
  1671. ret = cnss_power_up_hdlr(plat_priv);
  1672. break;
  1673. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1674. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  1675. &plat_priv->driver_state);
  1676. /* fall through */
  1677. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1678. ret = cnss_power_down_hdlr(plat_priv);
  1679. break;
  1680. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1681. ret = cnss_process_wfc_call_ind_event(plat_priv,
  1682. event->data);
  1683. break;
  1684. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1685. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  1686. event->data);
  1687. break;
  1688. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1689. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  1690. break;
  1691. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1692. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  1693. event->data);
  1694. break;
  1695. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1696. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  1697. break;
  1698. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1699. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  1700. event->data);
  1701. break;
  1702. default:
  1703. cnss_pr_err("Invalid driver event type: %d",
  1704. event->type);
  1705. kfree(event);
  1706. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1707. continue;
  1708. }
  1709. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1710. if (event->sync) {
  1711. event->ret = ret;
  1712. complete(&event->complete);
  1713. continue;
  1714. }
  1715. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1716. kfree(event);
  1717. spin_lock_irqsave(&plat_priv->event_lock, flags);
  1718. }
  1719. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  1720. cnss_pm_relax(plat_priv);
  1721. }
  1722. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1723. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1724. {
  1725. int ret = 0;
  1726. struct cnss_subsys_info *subsys_info;
  1727. subsys_info = &plat_priv->subsys_info;
  1728. subsys_info->subsys_desc.name = "wlan";
  1729. subsys_info->subsys_desc.owner = THIS_MODULE;
  1730. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  1731. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  1732. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  1733. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  1734. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  1735. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  1736. if (IS_ERR(subsys_info->subsys_device)) {
  1737. ret = PTR_ERR(subsys_info->subsys_device);
  1738. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  1739. goto out;
  1740. }
  1741. subsys_info->subsys_handle =
  1742. subsystem_get(subsys_info->subsys_desc.name);
  1743. if (!subsys_info->subsys_handle) {
  1744. cnss_pr_err("Failed to get subsys_handle!\n");
  1745. ret = -EINVAL;
  1746. goto unregister_subsys;
  1747. } else if (IS_ERR(subsys_info->subsys_handle)) {
  1748. ret = PTR_ERR(subsys_info->subsys_handle);
  1749. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  1750. goto unregister_subsys;
  1751. }
  1752. return 0;
  1753. unregister_subsys:
  1754. subsys_unregister(subsys_info->subsys_device);
  1755. out:
  1756. return ret;
  1757. }
  1758. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1759. {
  1760. struct cnss_subsys_info *subsys_info;
  1761. subsys_info = &plat_priv->subsys_info;
  1762. subsystem_put(subsys_info->subsys_handle);
  1763. subsys_unregister(subsys_info->subsys_device);
  1764. }
  1765. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1766. {
  1767. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  1768. return create_ramdump_device(subsys_info->subsys_desc.name,
  1769. subsys_info->subsys_desc.dev);
  1770. }
  1771. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1772. void *ramdump_dev)
  1773. {
  1774. destroy_ramdump_device(ramdump_dev);
  1775. }
  1776. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1777. {
  1778. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1779. struct ramdump_segment segment;
  1780. memset(&segment, 0, sizeof(segment));
  1781. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  1782. segment.size = ramdump_info->ramdump_size;
  1783. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  1784. }
  1785. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  1786. {
  1787. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  1788. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  1789. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  1790. struct ramdump_segment *ramdump_segs, *s;
  1791. struct cnss_dump_meta_info meta_info = {0};
  1792. int i, ret = 0;
  1793. ramdump_segs = kcalloc(dump_data->nentries + 1,
  1794. sizeof(*ramdump_segs),
  1795. GFP_KERNEL);
  1796. if (!ramdump_segs)
  1797. return -ENOMEM;
  1798. s = ramdump_segs + 1;
  1799. for (i = 0; i < dump_data->nentries; i++) {
  1800. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  1801. cnss_pr_err("Unsupported dump type: %d",
  1802. dump_seg->type);
  1803. continue;
  1804. }
  1805. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  1806. meta_info.entry[dump_seg->type].type = dump_seg->type;
  1807. meta_info.entry[dump_seg->type].entry_start = i + 1;
  1808. }
  1809. meta_info.entry[dump_seg->type].entry_num++;
  1810. s->address = dump_seg->address;
  1811. s->v_address = (void __iomem *)dump_seg->v_address;
  1812. s->size = dump_seg->size;
  1813. s++;
  1814. dump_seg++;
  1815. }
  1816. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  1817. meta_info.version = CNSS_RAMDUMP_VERSION;
  1818. meta_info.chipset = plat_priv->device_id;
  1819. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  1820. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  1821. ramdump_segs->size = sizeof(meta_info);
  1822. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  1823. dump_data->nentries + 1);
  1824. kfree(ramdump_segs);
  1825. return ret;
  1826. }
  1827. #else
  1828. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  1829. void *data)
  1830. {
  1831. struct cnss_plat_data *plat_priv =
  1832. container_of(nb, struct cnss_plat_data, panic_nb);
  1833. cnss_bus_dev_crash_shutdown(plat_priv);
  1834. return NOTIFY_DONE;
  1835. }
  1836. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  1837. {
  1838. int ret;
  1839. if (!plat_priv)
  1840. return -ENODEV;
  1841. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  1842. ret = atomic_notifier_chain_register(&panic_notifier_list,
  1843. &plat_priv->panic_nb);
  1844. if (ret) {
  1845. cnss_pr_err("Failed to register panic handler\n");
  1846. return -EINVAL;
  1847. }
  1848. return 0;
  1849. }
  1850. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  1851. {
  1852. int ret;
  1853. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  1854. &plat_priv->panic_nb);
  1855. if (ret)
  1856. cnss_pr_err("Failed to unregister panic handler\n");
  1857. }
  1858. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  1859. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  1860. {
  1861. return &plat_priv->plat_dev->dev;
  1862. }
  1863. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  1864. void *ramdump_dev)
  1865. {
  1866. }
  1867. #endif
  1868. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  1869. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1870. {
  1871. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  1872. struct qcom_dump_segment segment;
  1873. struct list_head head;
  1874. INIT_LIST_HEAD(&head);
  1875. memset(&segment, 0, sizeof(segment));
  1876. segment.va = ramdump_info->ramdump_va;
  1877. segment.size = ramdump_info->ramdump_size;
  1878. list_add(&segment.node, &head);
  1879. return qcom_dump(&head, ramdump_info->ramdump_dev);
  1880. }
  1881. #else
  1882. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  1883. {
  1884. return 0;
  1885. }
  1886. /* Using completion event inside dynamically allocated ramdump_desc
  1887. * may result a race between freeing the event after setting it to
  1888. * complete inside dev coredump free callback and the thread that is
  1889. * waiting for completion.
  1890. */
  1891. DECLARE_COMPLETION(dump_done);
  1892. #define TIMEOUT_SAVE_DUMP_MS 30000
  1893. #define SIZEOF_ELF_STRUCT(__xhdr) \
  1894. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  1895. { \
  1896. if (class == ELFCLASS32) \
  1897. return sizeof(struct elf32_##__xhdr); \
  1898. else \
  1899. return sizeof(struct elf64_##__xhdr); \
  1900. }
  1901. SIZEOF_ELF_STRUCT(phdr)
  1902. SIZEOF_ELF_STRUCT(hdr)
  1903. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  1904. do { \
  1905. if (class == ELFCLASS32) \
  1906. ((struct elf32_##__xhdr *)arg)->member = value; \
  1907. else \
  1908. ((struct elf64_##__xhdr *)arg)->member = value; \
  1909. } while (0)
  1910. #define set_ehdr_property(arg, class, member, value) \
  1911. set_xhdr_property(hdr, arg, class, member, value)
  1912. #define set_phdr_property(arg, class, member, value) \
  1913. set_xhdr_property(phdr, arg, class, member, value)
  1914. /* These replace qcom_ramdump driver APIs called from common API
  1915. * cnss_do_elf_dump() by the ones defined here.
  1916. */
  1917. #define qcom_dump_segment cnss_qcom_dump_segment
  1918. #define qcom_elf_dump cnss_qcom_elf_dump
  1919. #define dump_enabled cnss_dump_enabled
  1920. struct cnss_qcom_dump_segment {
  1921. struct list_head node;
  1922. dma_addr_t da;
  1923. void *va;
  1924. size_t size;
  1925. };
  1926. struct cnss_qcom_ramdump_desc {
  1927. void *data;
  1928. struct completion dump_done;
  1929. };
  1930. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  1931. void *data, size_t datalen)
  1932. {
  1933. struct cnss_qcom_ramdump_desc *desc = data;
  1934. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  1935. datalen);
  1936. }
  1937. static void cnss_qcom_devcd_freev(void *data)
  1938. {
  1939. struct cnss_qcom_ramdump_desc *desc = data;
  1940. cnss_pr_dbg("Free dump data for dev coredump\n");
  1941. complete(&dump_done);
  1942. vfree(desc->data);
  1943. kfree(desc);
  1944. }
  1945. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  1946. gfp_t gfp)
  1947. {
  1948. struct cnss_qcom_ramdump_desc *desc;
  1949. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  1950. int ret;
  1951. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  1952. if (!desc)
  1953. return -ENOMEM;
  1954. desc->data = data;
  1955. reinit_completion(&dump_done);
  1956. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  1957. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  1958. ret = wait_for_completion_timeout(&dump_done,
  1959. msecs_to_jiffies(timeout));
  1960. if (!ret)
  1961. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  1962. timeout);
  1963. return ret ? 0 : -ETIMEDOUT;
  1964. }
  1965. /* Since the elf32 and elf64 identification is identical apart from
  1966. * the class, use elf32 by default.
  1967. */
  1968. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  1969. {
  1970. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  1971. ehdr->e_ident[EI_CLASS] = class;
  1972. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  1973. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  1974. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  1975. }
  1976. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  1977. unsigned char class)
  1978. {
  1979. struct cnss_qcom_dump_segment *segment;
  1980. void *phdr, *ehdr;
  1981. size_t data_size, offset;
  1982. int phnum = 0;
  1983. void *data;
  1984. void __iomem *ptr;
  1985. if (!segs || list_empty(segs))
  1986. return -EINVAL;
  1987. data_size = sizeof_elf_hdr(class);
  1988. list_for_each_entry(segment, segs, node) {
  1989. data_size += sizeof_elf_phdr(class) + segment->size;
  1990. phnum++;
  1991. }
  1992. data = vmalloc(data_size);
  1993. if (!data)
  1994. return -ENOMEM;
  1995. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  1996. ehdr = data;
  1997. memset(ehdr, 0, sizeof_elf_hdr(class));
  1998. init_elf_identification(ehdr, class);
  1999. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2000. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2001. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2002. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2003. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2004. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2005. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2006. phdr = data + sizeof_elf_hdr(class);
  2007. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2008. list_for_each_entry(segment, segs, node) {
  2009. memset(phdr, 0, sizeof_elf_phdr(class));
  2010. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2011. set_phdr_property(phdr, class, p_offset, offset);
  2012. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2013. set_phdr_property(phdr, class, p_paddr, segment->da);
  2014. set_phdr_property(phdr, class, p_filesz, segment->size);
  2015. set_phdr_property(phdr, class, p_memsz, segment->size);
  2016. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2017. set_phdr_property(phdr, class, p_align, 0);
  2018. if (segment->va) {
  2019. memcpy(data + offset, segment->va, segment->size);
  2020. } else {
  2021. ptr = devm_ioremap(dev, segment->da, segment->size);
  2022. if (!ptr) {
  2023. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2024. &segment->da, segment->size);
  2025. memset(data + offset, 0xff, segment->size);
  2026. } else {
  2027. memcpy_fromio(data + offset, ptr,
  2028. segment->size);
  2029. }
  2030. }
  2031. offset += segment->size;
  2032. phdr += sizeof_elf_phdr(class);
  2033. }
  2034. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2035. }
  2036. /* Saving dump to file system is always needed in this case. */
  2037. static bool cnss_dump_enabled(void)
  2038. {
  2039. return true;
  2040. }
  2041. #endif /* CONFIG_QCOM_RAMDUMP */
  2042. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2043. {
  2044. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2045. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2046. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2047. struct qcom_dump_segment *seg;
  2048. struct cnss_dump_meta_info meta_info = {0};
  2049. struct list_head head;
  2050. int i, ret = 0;
  2051. if (!dump_enabled()) {
  2052. cnss_pr_info("Dump collection is not enabled\n");
  2053. return ret;
  2054. }
  2055. INIT_LIST_HEAD(&head);
  2056. for (i = 0; i < dump_data->nentries; i++) {
  2057. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2058. cnss_pr_err("Unsupported dump type: %d",
  2059. dump_seg->type);
  2060. continue;
  2061. }
  2062. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2063. if (!seg)
  2064. continue;
  2065. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2066. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2067. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2068. }
  2069. meta_info.entry[dump_seg->type].entry_num++;
  2070. seg->da = dump_seg->address;
  2071. seg->va = dump_seg->v_address;
  2072. seg->size = dump_seg->size;
  2073. list_add_tail(&seg->node, &head);
  2074. dump_seg++;
  2075. }
  2076. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2077. if (!seg)
  2078. goto do_elf_dump;
  2079. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2080. meta_info.version = CNSS_RAMDUMP_VERSION;
  2081. meta_info.chipset = plat_priv->device_id;
  2082. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2083. seg->va = &meta_info;
  2084. seg->size = sizeof(meta_info);
  2085. list_add(&seg->node, &head);
  2086. do_elf_dump:
  2087. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2088. while (!list_empty(&head)) {
  2089. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2090. list_del(&seg->node);
  2091. kfree(seg);
  2092. }
  2093. return ret;
  2094. }
  2095. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2096. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2097. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2098. {
  2099. struct cnss_ramdump_info *ramdump_info;
  2100. struct msm_dump_entry dump_entry;
  2101. ramdump_info = &plat_priv->ramdump_info;
  2102. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2103. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2104. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2105. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2106. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2107. sizeof(ramdump_info->dump_data.name));
  2108. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2109. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2110. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2111. &dump_entry);
  2112. }
  2113. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2114. {
  2115. int ret = 0;
  2116. struct device *dev;
  2117. struct cnss_ramdump_info *ramdump_info;
  2118. u32 ramdump_size = 0;
  2119. dev = &plat_priv->plat_dev->dev;
  2120. ramdump_info = &plat_priv->ramdump_info;
  2121. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2122. &ramdump_size) == 0) {
  2123. ramdump_info->ramdump_va =
  2124. dma_alloc_coherent(dev, ramdump_size,
  2125. &ramdump_info->ramdump_pa,
  2126. GFP_KERNEL);
  2127. if (ramdump_info->ramdump_va)
  2128. ramdump_info->ramdump_size = ramdump_size;
  2129. }
  2130. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2131. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2132. if (ramdump_info->ramdump_size == 0) {
  2133. cnss_pr_info("Ramdump will not be collected");
  2134. goto out;
  2135. }
  2136. ret = cnss_init_dump_entry(plat_priv);
  2137. if (ret) {
  2138. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2139. goto free_ramdump;
  2140. }
  2141. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2142. if (!ramdump_info->ramdump_dev) {
  2143. cnss_pr_err("Failed to create ramdump device!");
  2144. ret = -ENOMEM;
  2145. goto free_ramdump;
  2146. }
  2147. return 0;
  2148. free_ramdump:
  2149. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2150. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2151. out:
  2152. return ret;
  2153. }
  2154. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2155. {
  2156. struct device *dev;
  2157. struct cnss_ramdump_info *ramdump_info;
  2158. dev = &plat_priv->plat_dev->dev;
  2159. ramdump_info = &plat_priv->ramdump_info;
  2160. if (ramdump_info->ramdump_dev)
  2161. cnss_destroy_ramdump_device(plat_priv,
  2162. ramdump_info->ramdump_dev);
  2163. if (ramdump_info->ramdump_va)
  2164. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2165. ramdump_info->ramdump_va,
  2166. ramdump_info->ramdump_pa);
  2167. }
  2168. /**
  2169. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2170. * @ret: Error returned by msm_dump_data_register_nominidump
  2171. *
  2172. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2173. * ignore failure.
  2174. *
  2175. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2176. */
  2177. static int cnss_ignore_dump_data_reg_fail(int ret)
  2178. {
  2179. return ret;
  2180. }
  2181. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2182. {
  2183. int ret = 0;
  2184. struct cnss_ramdump_info_v2 *info_v2;
  2185. struct cnss_dump_data *dump_data;
  2186. struct msm_dump_entry dump_entry;
  2187. struct device *dev = &plat_priv->plat_dev->dev;
  2188. u32 ramdump_size = 0;
  2189. info_v2 = &plat_priv->ramdump_info_v2;
  2190. dump_data = &info_v2->dump_data;
  2191. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2192. &ramdump_size) == 0)
  2193. info_v2->ramdump_size = ramdump_size;
  2194. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2195. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2196. if (!info_v2->dump_data_vaddr)
  2197. return -ENOMEM;
  2198. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2199. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2200. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2201. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2202. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2203. sizeof(dump_data->name));
  2204. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2205. dump_entry.addr = virt_to_phys(dump_data);
  2206. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2207. &dump_entry);
  2208. if (ret) {
  2209. ret = cnss_ignore_dump_data_reg_fail(ret);
  2210. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2211. ret ? "Error" : "Ignoring", ret);
  2212. goto free_ramdump;
  2213. }
  2214. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2215. if (!info_v2->ramdump_dev) {
  2216. cnss_pr_err("Failed to create ramdump device!\n");
  2217. ret = -ENOMEM;
  2218. goto free_ramdump;
  2219. }
  2220. return 0;
  2221. free_ramdump:
  2222. kfree(info_v2->dump_data_vaddr);
  2223. info_v2->dump_data_vaddr = NULL;
  2224. return ret;
  2225. }
  2226. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2227. {
  2228. struct cnss_ramdump_info_v2 *info_v2;
  2229. info_v2 = &plat_priv->ramdump_info_v2;
  2230. if (info_v2->ramdump_dev)
  2231. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2232. kfree(info_v2->dump_data_vaddr);
  2233. info_v2->dump_data_vaddr = NULL;
  2234. info_v2->dump_data_valid = false;
  2235. }
  2236. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2237. {
  2238. int ret = 0;
  2239. switch (plat_priv->device_id) {
  2240. case QCA6174_DEVICE_ID:
  2241. ret = cnss_register_ramdump_v1(plat_priv);
  2242. break;
  2243. case QCA6290_DEVICE_ID:
  2244. case QCA6390_DEVICE_ID:
  2245. case QCA6490_DEVICE_ID:
  2246. case KIWI_DEVICE_ID:
  2247. ret = cnss_register_ramdump_v2(plat_priv);
  2248. break;
  2249. default:
  2250. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2251. ret = -ENODEV;
  2252. break;
  2253. }
  2254. return ret;
  2255. }
  2256. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2257. {
  2258. switch (plat_priv->device_id) {
  2259. case QCA6174_DEVICE_ID:
  2260. cnss_unregister_ramdump_v1(plat_priv);
  2261. break;
  2262. case QCA6290_DEVICE_ID:
  2263. case QCA6390_DEVICE_ID:
  2264. case QCA6490_DEVICE_ID:
  2265. case KIWI_DEVICE_ID:
  2266. cnss_unregister_ramdump_v2(plat_priv);
  2267. break;
  2268. default:
  2269. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2270. break;
  2271. }
  2272. }
  2273. #else
  2274. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2275. {
  2276. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2277. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2278. struct device *dev = &plat_priv->plat_dev->dev;
  2279. u32 ramdump_size = 0;
  2280. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2281. &ramdump_size) == 0)
  2282. info_v2->ramdump_size = ramdump_size;
  2283. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2284. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2285. if (!info_v2->dump_data_vaddr)
  2286. return -ENOMEM;
  2287. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2288. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2289. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2290. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2291. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2292. sizeof(dump_data->name));
  2293. info_v2->ramdump_dev = dev;
  2294. return 0;
  2295. }
  2296. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2297. {
  2298. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2299. info_v2->ramdump_dev = NULL;
  2300. kfree(info_v2->dump_data_vaddr);
  2301. info_v2->dump_data_vaddr = NULL;
  2302. info_v2->dump_data_valid = false;
  2303. }
  2304. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2305. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2306. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2307. phys_addr_t *pa, unsigned long attrs)
  2308. {
  2309. struct sg_table sgt;
  2310. int ret;
  2311. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2312. if (ret) {
  2313. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2314. va, &dma, size, attrs);
  2315. return -EINVAL;
  2316. }
  2317. *pa = page_to_phys(sg_page(sgt.sgl));
  2318. sg_free_table(&sgt);
  2319. return 0;
  2320. }
  2321. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2322. enum cnss_fw_dump_type type, int seg_no,
  2323. void *va, phys_addr_t pa, size_t size)
  2324. {
  2325. struct md_region md_entry;
  2326. int ret;
  2327. switch (type) {
  2328. case CNSS_FW_IMAGE:
  2329. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2330. seg_no);
  2331. break;
  2332. case CNSS_FW_RDDM:
  2333. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2334. seg_no);
  2335. break;
  2336. case CNSS_FW_REMOTE_HEAP:
  2337. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2338. seg_no);
  2339. break;
  2340. default:
  2341. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2342. return -EINVAL;
  2343. }
  2344. md_entry.phys_addr = pa;
  2345. md_entry.virt_addr = (uintptr_t)va;
  2346. md_entry.size = size;
  2347. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2348. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2349. md_entry.name, va, &pa, size);
  2350. ret = msm_minidump_add_region(&md_entry);
  2351. if (ret < 0)
  2352. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2353. return ret;
  2354. }
  2355. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2356. enum cnss_fw_dump_type type, int seg_no,
  2357. void *va, phys_addr_t pa, size_t size)
  2358. {
  2359. struct md_region md_entry;
  2360. int ret;
  2361. switch (type) {
  2362. case CNSS_FW_IMAGE:
  2363. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2364. seg_no);
  2365. break;
  2366. case CNSS_FW_RDDM:
  2367. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2368. seg_no);
  2369. break;
  2370. case CNSS_FW_REMOTE_HEAP:
  2371. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2372. seg_no);
  2373. break;
  2374. default:
  2375. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2376. return -EINVAL;
  2377. }
  2378. md_entry.phys_addr = pa;
  2379. md_entry.virt_addr = (uintptr_t)va;
  2380. md_entry.size = size;
  2381. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2382. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2383. md_entry.name, va, &pa, size);
  2384. ret = msm_minidump_remove_region(&md_entry);
  2385. if (ret)
  2386. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2387. ret);
  2388. return ret;
  2389. }
  2390. #else
  2391. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2392. phys_addr_t *pa, unsigned long attrs)
  2393. {
  2394. return 0;
  2395. }
  2396. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2397. enum cnss_fw_dump_type type, int seg_no,
  2398. void *va, phys_addr_t pa, size_t size)
  2399. {
  2400. return 0;
  2401. }
  2402. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2403. enum cnss_fw_dump_type type, int seg_no,
  2404. void *va, phys_addr_t pa, size_t size)
  2405. {
  2406. return 0;
  2407. }
  2408. #endif /* CONFIG_QCOM_MINIDUMP */
  2409. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2410. const struct firmware **fw_entry,
  2411. const char *filename)
  2412. {
  2413. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2414. return request_firmware_direct(fw_entry, filename,
  2415. &plat_priv->plat_dev->dev);
  2416. else
  2417. return firmware_request_nowarn(fw_entry, filename,
  2418. &plat_priv->plat_dev->dev);
  2419. }
  2420. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2421. /**
  2422. * cnss_register_bus_scale() - Setup interconnect voting data
  2423. * @plat_priv: Platform data structure
  2424. *
  2425. * For different interconnect path configured in device tree setup voting data
  2426. * for list of bandwidth requirements.
  2427. *
  2428. * Result: 0 for success. -EINVAL if not configured
  2429. */
  2430. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2431. {
  2432. int ret = -EINVAL;
  2433. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  2434. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2435. struct device *dev = &plat_priv->plat_dev->dev;
  2436. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  2437. ret = of_property_read_u32(dev->of_node,
  2438. "qcom,icc-path-count",
  2439. &plat_priv->icc.path_count);
  2440. if (ret) {
  2441. cnss_pr_err("Platform Bus Interconnect path not configured\n");
  2442. return -EINVAL;
  2443. }
  2444. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  2445. "qcom,bus-bw-cfg-count",
  2446. &plat_priv->icc.bus_bw_cfg_count);
  2447. if (ret) {
  2448. cnss_pr_err("Failed to get Bus BW Config table size\n");
  2449. goto cleanup;
  2450. }
  2451. cfg_arr_size = plat_priv->icc.path_count *
  2452. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  2453. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  2454. if (!cfg_arr) {
  2455. cnss_pr_err("Failed to alloc cfg table mem\n");
  2456. ret = -ENOMEM;
  2457. goto cleanup;
  2458. }
  2459. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  2460. "qcom,bus-bw-cfg", cfg_arr,
  2461. cfg_arr_size);
  2462. if (ret) {
  2463. cnss_pr_err("Invalid Bus BW Config Table\n");
  2464. goto cleanup;
  2465. }
  2466. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  2467. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  2468. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  2469. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  2470. GFP_KERNEL);
  2471. if (!bus_bw_info) {
  2472. ret = -ENOMEM;
  2473. goto out;
  2474. }
  2475. ret = of_property_read_string_index(dev->of_node,
  2476. "interconnect-names", idx,
  2477. &bus_bw_info->icc_name);
  2478. if (ret)
  2479. goto out;
  2480. bus_bw_info->icc_path =
  2481. of_icc_get(&plat_priv->plat_dev->dev,
  2482. bus_bw_info->icc_name);
  2483. if (IS_ERR(bus_bw_info->icc_path)) {
  2484. ret = PTR_ERR(bus_bw_info->icc_path);
  2485. if (ret != -EPROBE_DEFER) {
  2486. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  2487. bus_bw_info->icc_name, ret);
  2488. goto out;
  2489. }
  2490. }
  2491. bus_bw_info->cfg_table =
  2492. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  2493. sizeof(*bus_bw_info->cfg_table),
  2494. GFP_KERNEL);
  2495. if (!bus_bw_info->cfg_table) {
  2496. ret = -ENOMEM;
  2497. goto out;
  2498. }
  2499. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  2500. bus_bw_info->icc_name);
  2501. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  2502. CNSS_ICC_VOTE_MAX);
  2503. i < plat_priv->icc.bus_bw_cfg_count;
  2504. i++, j += 2) {
  2505. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  2506. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  2507. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  2508. i, bus_bw_info->cfg_table[i].avg_bw,
  2509. bus_bw_info->cfg_table[i].peak_bw);
  2510. }
  2511. list_add_tail(&bus_bw_info->list,
  2512. &plat_priv->icc.list_head);
  2513. }
  2514. kfree(cfg_arr);
  2515. return 0;
  2516. out:
  2517. list_for_each_entry_safe(bus_bw_info, tmp,
  2518. &plat_priv->icc.list_head, list) {
  2519. list_del(&bus_bw_info->list);
  2520. }
  2521. cleanup:
  2522. kfree(cfg_arr);
  2523. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2524. return ret;
  2525. }
  2526. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  2527. {
  2528. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  2529. list_for_each_entry_safe(bus_bw_info, tmp,
  2530. &plat_priv->icc.list_head, list) {
  2531. list_del(&bus_bw_info->list);
  2532. if (bus_bw_info->icc_path)
  2533. icc_put(bus_bw_info->icc_path);
  2534. }
  2535. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  2536. }
  2537. #else
  2538. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  2539. {
  2540. return 0;
  2541. }
  2542. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  2543. #endif /* CONFIG_INTERCONNECT */
  2544. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  2545. {
  2546. struct cnss_plat_data *plat_priv = cb_ctx;
  2547. if (!plat_priv) {
  2548. cnss_pr_err("%s: Invalid context\n", __func__);
  2549. return;
  2550. }
  2551. if (status) {
  2552. cnss_pr_info("CNSS Daemon connected\n");
  2553. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2554. complete(&plat_priv->daemon_connected);
  2555. } else {
  2556. cnss_pr_info("CNSS Daemon disconnected\n");
  2557. reinit_completion(&plat_priv->daemon_connected);
  2558. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  2559. }
  2560. }
  2561. static ssize_t enable_hds_store(struct device *dev,
  2562. struct device_attribute *attr,
  2563. const char *buf, size_t count)
  2564. {
  2565. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2566. unsigned int enable_hds = 0;
  2567. if (!plat_priv)
  2568. return -ENODEV;
  2569. if (sscanf(buf, "%du", &enable_hds) != 1) {
  2570. cnss_pr_err("Invalid enable_hds sysfs command\n");
  2571. return -EINVAL;
  2572. }
  2573. if (enable_hds)
  2574. plat_priv->hds_enabled = true;
  2575. else
  2576. plat_priv->hds_enabled = false;
  2577. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  2578. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  2579. return count;
  2580. }
  2581. static ssize_t recovery_store(struct device *dev,
  2582. struct device_attribute *attr,
  2583. const char *buf, size_t count)
  2584. {
  2585. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2586. unsigned int recovery = 0;
  2587. if (!plat_priv)
  2588. return -ENODEV;
  2589. if (sscanf(buf, "%du", &recovery) != 1) {
  2590. cnss_pr_err("Invalid recovery sysfs command\n");
  2591. return -EINVAL;
  2592. }
  2593. if (recovery)
  2594. plat_priv->recovery_enabled = true;
  2595. else
  2596. plat_priv->recovery_enabled = false;
  2597. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  2598. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  2599. return count;
  2600. }
  2601. static ssize_t shutdown_store(struct device *dev,
  2602. struct device_attribute *attr,
  2603. const char *buf, size_t count)
  2604. {
  2605. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2606. if (plat_priv) {
  2607. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2608. del_timer(&plat_priv->fw_boot_timer);
  2609. complete_all(&plat_priv->power_up_complete);
  2610. complete_all(&plat_priv->cal_complete);
  2611. }
  2612. cnss_pr_dbg("Received shutdown notification\n");
  2613. return count;
  2614. }
  2615. static ssize_t fs_ready_store(struct device *dev,
  2616. struct device_attribute *attr,
  2617. const char *buf, size_t count)
  2618. {
  2619. int fs_ready = 0;
  2620. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2621. if (sscanf(buf, "%du", &fs_ready) != 1)
  2622. return -EINVAL;
  2623. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  2624. fs_ready, count);
  2625. if (!plat_priv) {
  2626. cnss_pr_err("plat_priv is NULL\n");
  2627. return count;
  2628. }
  2629. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  2630. cnss_pr_dbg("QMI is bypassed\n");
  2631. return count;
  2632. }
  2633. switch (plat_priv->device_id) {
  2634. case QCA6290_DEVICE_ID:
  2635. case QCA6390_DEVICE_ID:
  2636. case QCA6490_DEVICE_ID:
  2637. case KIWI_DEVICE_ID:
  2638. break;
  2639. default:
  2640. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2641. plat_priv->device_id);
  2642. return count;
  2643. }
  2644. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  2645. cnss_driver_event_post(plat_priv,
  2646. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  2647. 0, NULL);
  2648. }
  2649. return count;
  2650. }
  2651. static ssize_t qdss_trace_start_store(struct device *dev,
  2652. struct device_attribute *attr,
  2653. const char *buf, size_t count)
  2654. {
  2655. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2656. wlfw_qdss_trace_start(plat_priv);
  2657. cnss_pr_dbg("Received QDSS start command\n");
  2658. return count;
  2659. }
  2660. static ssize_t qdss_trace_stop_store(struct device *dev,
  2661. struct device_attribute *attr,
  2662. const char *buf, size_t count)
  2663. {
  2664. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2665. u32 option = 0;
  2666. if (sscanf(buf, "%du", &option) != 1)
  2667. return -EINVAL;
  2668. wlfw_qdss_trace_stop(plat_priv, option);
  2669. cnss_pr_dbg("Received QDSS stop command\n");
  2670. return count;
  2671. }
  2672. static ssize_t qdss_conf_download_store(struct device *dev,
  2673. struct device_attribute *attr,
  2674. const char *buf, size_t count)
  2675. {
  2676. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2677. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  2678. cnss_pr_dbg("Received QDSS download config command\n");
  2679. return count;
  2680. }
  2681. static ssize_t hw_trace_override_store(struct device *dev,
  2682. struct device_attribute *attr,
  2683. const char *buf, size_t count)
  2684. {
  2685. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  2686. int tmp = 0;
  2687. if (sscanf(buf, "%du", &tmp) != 1)
  2688. return -EINVAL;
  2689. plat_priv->hw_trc_override = tmp;
  2690. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2691. return count;
  2692. }
  2693. static DEVICE_ATTR_WO(fs_ready);
  2694. static DEVICE_ATTR_WO(shutdown);
  2695. static DEVICE_ATTR_WO(recovery);
  2696. static DEVICE_ATTR_WO(enable_hds);
  2697. static DEVICE_ATTR_WO(qdss_trace_start);
  2698. static DEVICE_ATTR_WO(qdss_trace_stop);
  2699. static DEVICE_ATTR_WO(qdss_conf_download);
  2700. static DEVICE_ATTR_WO(hw_trace_override);
  2701. static struct attribute *cnss_attrs[] = {
  2702. &dev_attr_fs_ready.attr,
  2703. &dev_attr_shutdown.attr,
  2704. &dev_attr_recovery.attr,
  2705. &dev_attr_enable_hds.attr,
  2706. &dev_attr_qdss_trace_start.attr,
  2707. &dev_attr_qdss_trace_stop.attr,
  2708. &dev_attr_qdss_conf_download.attr,
  2709. &dev_attr_hw_trace_override.attr,
  2710. NULL,
  2711. };
  2712. static struct attribute_group cnss_attr_group = {
  2713. .attrs = cnss_attrs,
  2714. };
  2715. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  2716. {
  2717. struct device *dev = &plat_priv->plat_dev->dev;
  2718. int ret;
  2719. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "cnss");
  2720. if (ret) {
  2721. cnss_pr_err("Failed to create cnss link, err = %d\n",
  2722. ret);
  2723. goto out;
  2724. }
  2725. /* This is only for backward compatibility. */
  2726. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "shutdown_wlan");
  2727. if (ret) {
  2728. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  2729. ret);
  2730. goto rm_cnss_link;
  2731. }
  2732. return 0;
  2733. rm_cnss_link:
  2734. sysfs_remove_link(kernel_kobj, "cnss");
  2735. out:
  2736. return ret;
  2737. }
  2738. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  2739. {
  2740. sysfs_remove_link(kernel_kobj, "shutdown_wlan");
  2741. sysfs_remove_link(kernel_kobj, "cnss");
  2742. }
  2743. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  2744. {
  2745. int ret = 0;
  2746. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  2747. &cnss_attr_group);
  2748. if (ret) {
  2749. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  2750. ret);
  2751. goto out;
  2752. }
  2753. cnss_create_sysfs_link(plat_priv);
  2754. return 0;
  2755. out:
  2756. return ret;
  2757. }
  2758. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  2759. {
  2760. cnss_remove_sysfs_link(plat_priv);
  2761. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  2762. }
  2763. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  2764. {
  2765. spin_lock_init(&plat_priv->event_lock);
  2766. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  2767. WQ_UNBOUND, 1);
  2768. if (!plat_priv->event_wq) {
  2769. cnss_pr_err("Failed to create event workqueue!\n");
  2770. return -EFAULT;
  2771. }
  2772. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  2773. INIT_LIST_HEAD(&plat_priv->event_list);
  2774. return 0;
  2775. }
  2776. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  2777. {
  2778. destroy_workqueue(plat_priv->event_wq);
  2779. }
  2780. static int cnss_reboot_notifier(struct notifier_block *nb,
  2781. unsigned long action,
  2782. void *data)
  2783. {
  2784. struct cnss_plat_data *plat_priv =
  2785. container_of(nb, struct cnss_plat_data, reboot_nb);
  2786. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  2787. del_timer(&plat_priv->fw_boot_timer);
  2788. complete_all(&plat_priv->power_up_complete);
  2789. complete_all(&plat_priv->cal_complete);
  2790. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  2791. return NOTIFY_DONE;
  2792. }
  2793. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  2794. {
  2795. int ret;
  2796. timer_setup(&plat_priv->fw_boot_timer,
  2797. cnss_bus_fw_boot_timeout_hdlr, 0);
  2798. ret = register_pm_notifier(&cnss_pm_notifier);
  2799. if (ret)
  2800. cnss_pr_err("Failed to register PM notifier, err = %d\n", ret);
  2801. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  2802. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  2803. if (ret)
  2804. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  2805. ret);
  2806. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  2807. if (ret)
  2808. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  2809. ret);
  2810. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  2811. init_completion(&plat_priv->power_up_complete);
  2812. init_completion(&plat_priv->cal_complete);
  2813. init_completion(&plat_priv->rddm_complete);
  2814. init_completion(&plat_priv->recovery_complete);
  2815. init_completion(&plat_priv->daemon_connected);
  2816. mutex_init(&plat_priv->dev_lock);
  2817. mutex_init(&plat_priv->driver_ops_lock);
  2818. plat_priv->recovery_ws =
  2819. wakeup_source_register(&plat_priv->plat_dev->dev,
  2820. "CNSS_FW_RECOVERY");
  2821. if (!plat_priv->recovery_ws)
  2822. cnss_pr_err("Failed to setup FW recovery wake source\n");
  2823. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  2824. cnss_daemon_connection_update_cb,
  2825. plat_priv);
  2826. if (ret)
  2827. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  2828. ret);
  2829. return 0;
  2830. }
  2831. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  2832. {
  2833. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  2834. plat_priv);
  2835. complete_all(&plat_priv->recovery_complete);
  2836. complete_all(&plat_priv->rddm_complete);
  2837. complete_all(&plat_priv->cal_complete);
  2838. complete_all(&plat_priv->power_up_complete);
  2839. complete_all(&plat_priv->daemon_connected);
  2840. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  2841. unregister_reboot_notifier(&plat_priv->reboot_nb);
  2842. unregister_pm_notifier(&cnss_pm_notifier);
  2843. del_timer(&plat_priv->fw_boot_timer);
  2844. wakeup_source_unregister(plat_priv->recovery_ws);
  2845. }
  2846. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  2847. {
  2848. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  2849. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  2850. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2851. "qcom,wlan-cbc-enabled");
  2852. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  2853. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  2854. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  2855. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  2856. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  2857. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  2858. * enabled by default
  2859. */
  2860. plat_priv->adsp_pc_enabled = true;
  2861. }
  2862. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  2863. {
  2864. struct device *dev = &plat_priv->plat_dev->dev;
  2865. plat_priv->use_pm_domain =
  2866. of_property_read_bool(dev->of_node, "use-pm-domain");
  2867. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  2868. }
  2869. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  2870. {
  2871. struct device *dev = &plat_priv->plat_dev->dev;
  2872. plat_priv->set_wlaon_pwr_ctrl =
  2873. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  2874. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  2875. plat_priv->set_wlaon_pwr_ctrl);
  2876. }
  2877. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  2878. {
  2879. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2880. "qcom,converged-dt") ||
  2881. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2882. "qcom,same-dt-multi-dev"));
  2883. }
  2884. static const struct platform_device_id cnss_platform_id_table[] = {
  2885. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  2886. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  2887. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  2888. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  2889. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  2890. { },
  2891. };
  2892. static const struct of_device_id cnss_of_match_table[] = {
  2893. {
  2894. .compatible = "qcom,cnss",
  2895. .data = (void *)&cnss_platform_id_table[0]},
  2896. {
  2897. .compatible = "qcom,cnss-qca6290",
  2898. .data = (void *)&cnss_platform_id_table[1]},
  2899. {
  2900. .compatible = "qcom,cnss-qca6390",
  2901. .data = (void *)&cnss_platform_id_table[2]},
  2902. {
  2903. .compatible = "qcom,cnss-qca6490",
  2904. .data = (void *)&cnss_platform_id_table[3]},
  2905. {
  2906. .compatible = "qcom,cnss-kiwi",
  2907. .data = (void *)&cnss_platform_id_table[4]},
  2908. { },
  2909. };
  2910. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  2911. static inline bool
  2912. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  2913. {
  2914. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  2915. "use-nv-mac");
  2916. }
  2917. static int cnss_probe(struct platform_device *plat_dev)
  2918. {
  2919. int ret = 0;
  2920. struct cnss_plat_data *plat_priv;
  2921. const struct of_device_id *of_id;
  2922. const struct platform_device_id *device_id;
  2923. int retry = 0;
  2924. if (cnss_get_plat_priv(plat_dev)) {
  2925. cnss_pr_err("Driver is already initialized!\n");
  2926. ret = -EEXIST;
  2927. goto out;
  2928. }
  2929. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  2930. if (!of_id || !of_id->data) {
  2931. cnss_pr_err("Failed to find of match device!\n");
  2932. ret = -ENODEV;
  2933. goto out;
  2934. }
  2935. device_id = of_id->data;
  2936. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  2937. GFP_KERNEL);
  2938. if (!plat_priv) {
  2939. ret = -ENOMEM;
  2940. goto out;
  2941. }
  2942. plat_priv->plat_dev = plat_dev;
  2943. plat_priv->device_id = device_id->driver_data;
  2944. plat_priv->bus_type = cnss_get_bus_type(plat_priv->device_id);
  2945. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  2946. plat_priv->use_fw_path_with_prefix =
  2947. cnss_use_fw_path_with_prefix(plat_priv);
  2948. cnss_set_plat_priv(plat_dev, plat_priv);
  2949. platform_set_drvdata(plat_dev, plat_priv);
  2950. INIT_LIST_HEAD(&plat_priv->vreg_list);
  2951. INIT_LIST_HEAD(&plat_priv->clk_list);
  2952. cnss_get_pm_domain_info(plat_priv);
  2953. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  2954. cnss_get_tcs_info(plat_priv);
  2955. cnss_get_cpr_info(plat_priv);
  2956. cnss_aop_mbox_init(plat_priv);
  2957. cnss_init_control_params(plat_priv);
  2958. ret = cnss_get_resources(plat_priv);
  2959. if (ret)
  2960. goto reset_ctx;
  2961. ret = cnss_register_esoc(plat_priv);
  2962. if (ret)
  2963. goto free_res;
  2964. ret = cnss_register_bus_scale(plat_priv);
  2965. if (ret)
  2966. goto unreg_esoc;
  2967. ret = cnss_create_sysfs(plat_priv);
  2968. if (ret)
  2969. goto unreg_bus_scale;
  2970. ret = cnss_event_work_init(plat_priv);
  2971. if (ret)
  2972. goto remove_sysfs;
  2973. ret = cnss_qmi_init(plat_priv);
  2974. if (ret)
  2975. goto deinit_event_work;
  2976. ret = cnss_dms_init(plat_priv);
  2977. if (ret)
  2978. goto deinit_qmi;
  2979. ret = cnss_debugfs_create(plat_priv);
  2980. if (ret)
  2981. goto deinit_dms;
  2982. ret = cnss_misc_init(plat_priv);
  2983. if (ret)
  2984. goto destroy_debugfs;
  2985. /* Make sure all platform related init are done before
  2986. * device power on and bus init.
  2987. */
  2988. if (!test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks)) {
  2989. retry:
  2990. ret = cnss_power_on_device(plat_priv);
  2991. if (ret)
  2992. goto deinit_misc;
  2993. ret = cnss_bus_init(plat_priv);
  2994. if (ret) {
  2995. if ((ret != -EPROBE_DEFER) &&
  2996. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  2997. cnss_power_off_device(plat_priv);
  2998. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  2999. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3000. goto retry;
  3001. }
  3002. goto power_off;
  3003. }
  3004. }
  3005. cnss_register_coex_service(plat_priv);
  3006. cnss_register_ims_service(plat_priv);
  3007. ret = cnss_genl_init();
  3008. if (ret < 0)
  3009. cnss_pr_err("CNSS genl init failed %d\n", ret);
  3010. cnss_pr_info("Platform driver probed successfully.\n");
  3011. return 0;
  3012. power_off:
  3013. if (!test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3014. cnss_power_off_device(plat_priv);
  3015. deinit_misc:
  3016. cnss_misc_deinit(plat_priv);
  3017. destroy_debugfs:
  3018. cnss_debugfs_destroy(plat_priv);
  3019. deinit_dms:
  3020. cnss_dms_deinit(plat_priv);
  3021. deinit_qmi:
  3022. cnss_qmi_deinit(plat_priv);
  3023. deinit_event_work:
  3024. cnss_event_work_deinit(plat_priv);
  3025. remove_sysfs:
  3026. cnss_remove_sysfs(plat_priv);
  3027. unreg_bus_scale:
  3028. cnss_unregister_bus_scale(plat_priv);
  3029. unreg_esoc:
  3030. cnss_unregister_esoc(plat_priv);
  3031. free_res:
  3032. cnss_put_resources(plat_priv);
  3033. reset_ctx:
  3034. platform_set_drvdata(plat_dev, NULL);
  3035. cnss_set_plat_priv(plat_dev, NULL);
  3036. out:
  3037. return ret;
  3038. }
  3039. static int cnss_remove(struct platform_device *plat_dev)
  3040. {
  3041. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3042. cnss_genl_exit();
  3043. cnss_unregister_ims_service(plat_priv);
  3044. cnss_unregister_coex_service(plat_priv);
  3045. cnss_bus_deinit(plat_priv);
  3046. cnss_misc_deinit(plat_priv);
  3047. cnss_debugfs_destroy(plat_priv);
  3048. cnss_dms_deinit(plat_priv);
  3049. cnss_qmi_deinit(plat_priv);
  3050. cnss_event_work_deinit(plat_priv);
  3051. cnss_remove_sysfs(plat_priv);
  3052. cnss_unregister_bus_scale(plat_priv);
  3053. cnss_unregister_esoc(plat_priv);
  3054. cnss_put_resources(plat_priv);
  3055. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3056. mbox_free_channel(plat_priv->mbox_chan);
  3057. platform_set_drvdata(plat_dev, NULL);
  3058. plat_env = NULL;
  3059. return 0;
  3060. }
  3061. static struct platform_driver cnss_platform_driver = {
  3062. .probe = cnss_probe,
  3063. .remove = cnss_remove,
  3064. .driver = {
  3065. .name = "cnss2",
  3066. .of_match_table = cnss_of_match_table,
  3067. #ifdef CONFIG_CNSS_ASYNC
  3068. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3069. #endif
  3070. },
  3071. };
  3072. /**
  3073. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3074. *
  3075. * Valid device tree node means a node with "compatible" property from the
  3076. * device match table and "status" property is not disabled.
  3077. *
  3078. * Return: true if valid device tree node found, false if not found
  3079. */
  3080. static bool cnss_is_valid_dt_node_found(void)
  3081. {
  3082. struct device_node *dn = NULL;
  3083. for_each_matching_node(dn, cnss_of_match_table) {
  3084. if (of_device_is_available(dn))
  3085. break;
  3086. }
  3087. if (dn)
  3088. return true;
  3089. return false;
  3090. }
  3091. static int __init cnss_initialize(void)
  3092. {
  3093. int ret = 0;
  3094. if (!cnss_is_valid_dt_node_found())
  3095. return -ENODEV;
  3096. cnss_debug_init();
  3097. ret = platform_driver_register(&cnss_platform_driver);
  3098. if (ret)
  3099. cnss_debug_deinit();
  3100. return ret;
  3101. }
  3102. static void __exit cnss_exit(void)
  3103. {
  3104. platform_driver_unregister(&cnss_platform_driver);
  3105. cnss_debug_deinit();
  3106. }
  3107. module_init(cnss_initialize);
  3108. module_exit(cnss_exit);
  3109. MODULE_LICENSE("GPL v2");
  3110. MODULE_DESCRIPTION("CNSS2 Platform Driver");