dp_rx_mon_dest.c 29 KB

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  1. /*
  2. * Copyright (c) 2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #include "hal_api_mon.h"
  26. #include "dp_rx_mon.h"
  27. #include "wlan_cfg.h"
  28. /**
  29. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  30. * (WBM), following error handling
  31. *
  32. * @dp_pdev: core txrx pdev context
  33. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  34. * Return: QDF_STATUS
  35. */
  36. static QDF_STATUS
  37. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  38. void *buf_addr_info)
  39. {
  40. struct dp_srng *dp_srng;
  41. void *hal_srng;
  42. void *hal_soc;
  43. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  44. void *src_srng_desc;
  45. hal_soc = dp_pdev->soc->hal_soc;
  46. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  47. hal_srng = dp_srng->hal_srng;
  48. qdf_assert(hal_srng);
  49. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  50. /* TODO */
  51. /*
  52. * Need API to convert from hal_ring pointer to
  53. * Ring Type / Ring Id combo
  54. */
  55. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  56. "%s %d : \
  57. HAL RING Access For WBM Release SRNG Failed -- %pK\n",
  58. __func__, __LINE__, hal_srng);
  59. goto done;
  60. }
  61. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  62. if (qdf_likely(src_srng_desc)) {
  63. /* Return link descriptor through WBM ring (SW2WBM)*/
  64. hal_rx_mon_msdu_link_desc_set(hal_soc,
  65. src_srng_desc, buf_addr_info);
  66. status = QDF_STATUS_SUCCESS;
  67. } else {
  68. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  69. "%s %d -- Monitor Link Desc WBM Release Ring Full\n",
  70. __func__, __LINE__);
  71. }
  72. done:
  73. hal_srng_access_end(hal_soc, hal_srng);
  74. return status;
  75. }
  76. /**
  77. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  78. * multiple nbufs. This function
  79. * is to return data length in
  80. * fragmented buffer
  81. *
  82. * @total_len: pointer to remaining data length.
  83. * @frag_len: poiter to data length in this fragment.
  84. */
  85. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  86. uint32_t *frag_len)
  87. {
  88. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  89. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  90. *total_len -= *frag_len;
  91. } else {
  92. *frag_len = *total_len;
  93. *total_len = 0;
  94. }
  95. }
  96. /**
  97. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  98. * (WBM), following error handling
  99. *
  100. * @soc: core DP main context
  101. * @mac_id: mac id which is one of 3 mac_ids
  102. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  103. * @head_msdu: head of msdu to be popped
  104. * @tail_msdu: tail of msdu to be popped
  105. * @npackets: number of packet to be popped
  106. * @ppdu_id: ppdu id of processing ppdu
  107. * @head: head of descs list to be freed
  108. * @tail: tail of decs list to be freed
  109. * Return: number of msdu in MPDU to be popped
  110. */
  111. static inline uint32_t
  112. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  113. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  114. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  115. union dp_rx_desc_list_elem_t **head,
  116. union dp_rx_desc_list_elem_t **tail)
  117. {
  118. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  119. void *rx_desc_tlv;
  120. void *rx_msdu_link_desc;
  121. qdf_nbuf_t msdu;
  122. qdf_nbuf_t last;
  123. struct hal_rx_msdu_list msdu_list;
  124. uint16_t num_msdus;
  125. uint32_t rx_buf_size, rx_pkt_offset;
  126. struct hal_buf_info buf_info;
  127. void *p_buf_addr_info;
  128. void *p_last_buf_addr_info;
  129. uint32_t rx_bufs_used = 0;
  130. uint32_t msdu_ppdu_id, msdu_cnt;
  131. uint8_t *data;
  132. uint32_t i;
  133. uint32_t total_frag_len, frag_len;
  134. bool is_frag, is_first_msdu;
  135. msdu = 0;
  136. last = NULL;
  137. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  138. &p_last_buf_addr_info, &msdu_cnt);
  139. is_frag = false;
  140. is_first_msdu = true;
  141. do {
  142. rx_msdu_link_desc =
  143. dp_rx_cookie_2_mon_link_desc_va(dp_pdev, &buf_info);
  144. qdf_assert(rx_msdu_link_desc);
  145. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  146. for (i = 0; i < num_msdus; i++) {
  147. uint32_t l2_hdr_offset;
  148. struct dp_rx_desc *rx_desc =
  149. dp_rx_cookie_2_va_mon_buf(soc,
  150. msdu_list.sw_cookie[i]);
  151. qdf_assert(rx_desc);
  152. msdu = rx_desc->nbuf;
  153. qdf_nbuf_unmap_single(soc->osdev, msdu,
  154. QDF_DMA_FROM_DEVICE);
  155. data = qdf_nbuf_data(msdu);
  156. QDF_TRACE(QDF_MODULE_ID_DP,
  157. QDF_TRACE_LEVEL_DEBUG,
  158. "[%s][%d] msdu_nbuf=%pK, data=%pK\n",
  159. __func__, __LINE__, msdu, data);
  160. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  161. if(is_first_msdu) {
  162. msdu_ppdu_id =
  163. HAL_RX_MON_HW_DESC_GET_PPDUID_GET(rx_desc_tlv);
  164. is_first_msdu = false;
  165. }
  166. QDF_TRACE(QDF_MODULE_ID_DP,
  167. QDF_TRACE_LEVEL_DEBUG,
  168. "[%s][%d] i=%d, ppdu_id=%x, msdu_ppdu_id=%x\n",
  169. __func__, __LINE__, i, *ppdu_id, msdu_ppdu_id);
  170. if (*ppdu_id > msdu_ppdu_id)
  171. QDF_TRACE(QDF_MODULE_ID_DP,
  172. QDF_TRACE_LEVEL_WARN,
  173. "[%s][%d] ppdu_id=%id \
  174. msdu_ppdu_id=%d\n",
  175. __func__, __LINE__, *ppdu_id,
  176. msdu_ppdu_id);
  177. if (*ppdu_id < msdu_ppdu_id) {
  178. *ppdu_id = msdu_ppdu_id;
  179. return rx_bufs_used;
  180. }
  181. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  182. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc_tlv,
  183. &(dp_pdev->ppdu_info.rx_status));
  184. if(msdu_list.msdu_info[i].msdu_flags &
  185. HAL_MSDU_F_MSDU_CONTINUATION) {
  186. if(!is_frag) {
  187. total_frag_len =
  188. msdu_list.msdu_info[i].msdu_len;
  189. is_frag = true;
  190. }
  191. dp_mon_adjust_frag_len(
  192. &total_frag_len, &frag_len);
  193. } else {
  194. if(is_frag) {
  195. dp_mon_adjust_frag_len(
  196. &total_frag_len, &frag_len);
  197. } else {
  198. frag_len =
  199. msdu_list.msdu_info[i].msdu_len;
  200. }
  201. is_frag = false;
  202. msdu_cnt--;
  203. }
  204. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  205. /*
  206. * HW structures call this L3 header padding
  207. * -- even though this is actually the offset
  208. * from the buffer beginning where the L2
  209. * header begins.
  210. */
  211. l2_hdr_offset =
  212. hal_rx_msdu_end_l3_hdr_padding_get(data);
  213. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  214. + frag_len;
  215. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  216. #if 0
  217. /* Disble it.see packet on msdu done set to 0 */
  218. /*
  219. * Check if DMA completed -- msdu_done is the
  220. * last bit to be written
  221. */
  222. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  223. QDF_TRACE(QDF_MODULE_ID_DP,
  224. QDF_TRACE_LEVEL_ERROR,
  225. "%s %d\n",
  226. __func__, __LINE__);
  227. print_hex_dump(KERN_ERR,
  228. "\t Pkt Desc:",
  229. DUMP_PREFIX_NONE, 32, 4,
  230. rx_desc_tlv, 128, false);
  231. qdf_assert(0);
  232. }
  233. #endif
  234. rx_bufs_used++;
  235. QDF_TRACE(QDF_MODULE_ID_DP,
  236. QDF_TRACE_LEVEL_DEBUG,
  237. "rx_pkt_offset=%d, \
  238. l2_hdr_offset=%d, msdu_len=%d, \
  239. addr=%pK\n",
  240. rx_pkt_offset,
  241. l2_hdr_offset,
  242. msdu_list.msdu_info[i].msdu_len,
  243. qdf_nbuf_data(msdu));
  244. if (*head_msdu == NULL)
  245. *head_msdu = msdu;
  246. else
  247. qdf_nbuf_set_next(last, msdu);
  248. last = msdu;
  249. dp_rx_add_to_free_desc_list(head,
  250. tail, rx_desc);
  251. }
  252. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  253. &p_buf_addr_info);
  254. dp_rx_mon_link_desc_return(dp_pdev, p_last_buf_addr_info);
  255. p_last_buf_addr_info = p_buf_addr_info;
  256. } while (buf_info.paddr && msdu_cnt);
  257. qdf_nbuf_set_next(last, NULL);
  258. *tail_msdu = msdu;
  259. return rx_bufs_used;
  260. }
  261. static inline
  262. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  263. {
  264. uint8_t *data;
  265. uint32_t rx_pkt_offset, l2_hdr_offset;
  266. data = qdf_nbuf_data(msdu);
  267. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  268. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  269. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  270. }
  271. static inline
  272. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  273. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  274. struct cdp_mon_status *rx_status)
  275. {
  276. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  277. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  278. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  279. is_amsdu, is_first_frag, amsdu_pad;
  280. void *rx_desc;
  281. char *hdr_desc;
  282. unsigned char *dest;
  283. struct ieee80211_frame *wh;
  284. struct ieee80211_qoscntl *qos;
  285. head_frag_list = NULL;
  286. /* The nbuf has been pulled just beyond the status and points to the
  287. * payload
  288. */
  289. msdu_orig = head_msdu;
  290. rx_desc = qdf_nbuf_data(msdu_orig);
  291. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  292. /* It looks like there is some issue on MPDU len err */
  293. /* Need further investigate if drop the packet */
  294. /* return NULL; */
  295. }
  296. rx_desc = qdf_nbuf_data(last_msdu);
  297. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  298. /* Fill out the rx_status from the PPDU start and end fields */
  299. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  300. rx_desc = qdf_nbuf_data(head_msdu);
  301. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  302. /* Easy case - The MSDU status indicates that this is a non-decapped
  303. * packet in RAW mode.
  304. */
  305. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  306. /* Note that this path might suffer from headroom unavailabilty
  307. * - but the RX status is usually enough
  308. */
  309. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  310. "[%s][%d] decap format raw\n", __func__, __LINE__);
  311. dp_rx_msdus_set_payload(head_msdu);
  312. mpdu_buf = head_msdu;
  313. if (!mpdu_buf)
  314. goto mpdu_stitch_fail;
  315. prev_buf = mpdu_buf;
  316. frag_list_sum_len = 0;
  317. msdu = qdf_nbuf_next(head_msdu);
  318. is_first_frag = 1;
  319. while (msdu) {
  320. dp_rx_msdus_set_payload(msdu);
  321. if (is_first_frag) {
  322. is_first_frag = 0;
  323. head_frag_list = msdu;
  324. }
  325. frag_list_sum_len += qdf_nbuf_len(msdu);
  326. /* Maintain the linking of the cloned MSDUS */
  327. qdf_nbuf_set_next_ext(prev_buf, msdu);
  328. /* Move to the next */
  329. prev_buf = msdu;
  330. msdu = qdf_nbuf_next(msdu);
  331. }
  332. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  333. /* If there were more fragments to this RAW frame */
  334. if (head_frag_list) {
  335. frag_list_sum_len -= HAL_RX_FCS_LEN;
  336. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  337. frag_list_sum_len);
  338. }
  339. goto mpdu_stitch_done;
  340. }
  341. /* Decap mode:
  342. * Calculate the amount of header in decapped packet to knock off based
  343. * on the decap type and the corresponding number of raw bytes to copy
  344. * status header
  345. */
  346. rx_desc = qdf_nbuf_data(head_msdu);
  347. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  348. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  349. "[%s][%d] decap format not raw\n", __func__, __LINE__);
  350. /* Base size */
  351. wifi_hdr_len = sizeof(struct ieee80211_frame);
  352. wh = (struct ieee80211_frame *)hdr_desc;
  353. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  354. if (dir == IEEE80211_FC1_DIR_DSTODS)
  355. wifi_hdr_len += 6;
  356. is_amsdu = 0;
  357. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  358. qos = (struct ieee80211_qoscntl *)
  359. (hdr_desc + wifi_hdr_len);
  360. wifi_hdr_len += 2;
  361. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  362. }
  363. /*Calculate security header length based on 'Protected'
  364. * and 'EXT_IV' flag
  365. * */
  366. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  367. char *iv = (char *)wh + wifi_hdr_len;
  368. if (iv[3] & KEY_EXTIV)
  369. sec_hdr_len = 8;
  370. else
  371. sec_hdr_len = 4;
  372. } else {
  373. sec_hdr_len = 0;
  374. }
  375. wifi_hdr_len += sec_hdr_len;
  376. /* MSDU related stuff LLC - AMSDU subframe header etc */
  377. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  378. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  379. /* "Decap" header to remove from MSDU buffer */
  380. decap_hdr_pull_bytes = 14;
  381. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  382. * status of the now decapped first msdu. Leave enough headroom for
  383. * accomodating any radio-tap /prism like PHY header
  384. */
  385. #define MAX_MONITOR_HEADER (512)
  386. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  387. MAX_MONITOR_HEADER + mpdu_buf_len,
  388. MAX_MONITOR_HEADER, 4, FALSE);
  389. if (!mpdu_buf)
  390. goto mpdu_stitch_done;
  391. /* Copy the MPDU related header and enc headers into the first buffer
  392. * - Note that there can be a 2 byte pad between heaader and enc header
  393. */
  394. prev_buf = mpdu_buf;
  395. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  396. if (!dest)
  397. goto mpdu_stitch_fail;
  398. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  399. hdr_desc += wifi_hdr_len;
  400. #if 0
  401. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  402. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  403. hdr_desc += sec_hdr_len;
  404. #endif
  405. /* The first LLC len is copied into the MPDU buffer */
  406. frag_list_sum_len = 0;
  407. frag_list_sum_len -= msdu_llc_len;
  408. msdu_orig = head_msdu;
  409. is_first_frag = 1;
  410. amsdu_pad = 0;
  411. while (msdu_orig) {
  412. /* TODO: intra AMSDU padding - do we need it ??? */
  413. msdu = msdu_orig;
  414. if (is_first_frag) {
  415. head_frag_list = msdu;
  416. } else {
  417. /* Reload the hdr ptr only on non-first MSDUs */
  418. rx_desc = qdf_nbuf_data(msdu_orig);
  419. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  420. }
  421. /* Copy this buffers MSDU related status into the prev buffer */
  422. if (is_first_frag) {
  423. is_first_frag = 0;
  424. }
  425. dest = qdf_nbuf_put_tail(prev_buf,
  426. msdu_llc_len + amsdu_pad);
  427. if (!dest)
  428. goto mpdu_stitch_fail;
  429. dest += amsdu_pad;
  430. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  431. dp_rx_msdus_set_payload(msdu);
  432. /* Push the MSDU buffer beyond the decap header */
  433. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  434. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  435. + amsdu_pad;
  436. /* Set up intra-AMSDU pad to be added to start of next buffer -
  437. * AMSDU pad is 4 byte pad on AMSDU subframe */
  438. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  439. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  440. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  441. * probably iterate all the frags cloning them along the way and
  442. * and also updating the prev_buf pointer
  443. */
  444. /* Move to the next */
  445. prev_buf = msdu;
  446. msdu_orig = qdf_nbuf_next(msdu_orig);
  447. }
  448. #if 0
  449. /* Add in the trailer section - encryption trailer + FCS */
  450. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  451. frag_list_sum_len += HAL_RX_FCS_LEN;
  452. #endif
  453. /* TODO: Convert this to suitable adf routines */
  454. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  455. frag_list_sum_len);
  456. mpdu_stitch_done:
  457. /* Check if this buffer contains the PPDU end status for TSF */
  458. /* Need revist this code to see where we can get tsf timestamp */
  459. #if 0
  460. /* PPDU end TLV will be retrived from monitor status ring */
  461. last_mpdu =
  462. (*(((u_int32_t *)&rx_desc->attention)) &
  463. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  464. RX_ATTENTION_0_LAST_MPDU_LSB;
  465. if (last_mpdu)
  466. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  467. #endif
  468. return mpdu_buf;
  469. mpdu_stitch_fail:
  470. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  471. /* Free the head buffer */
  472. qdf_nbuf_free(mpdu_buf);
  473. }
  474. return NULL;
  475. }
  476. /**
  477. * dp_rx_extract_radiotap_info(): Extract and populate information in
  478. * struct mon_rx_status type
  479. * @rx_status: Receive status
  480. * @mon_rx_status: Monitor mode status
  481. *
  482. * Returns: None
  483. */
  484. static inline
  485. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  486. struct mon_rx_status *rx_mon_status)
  487. {
  488. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  489. rx_mon_status->chan_freq = rx_status->rs_freq;
  490. rx_mon_status->chan_num = rx_status->rs_channel;
  491. rx_mon_status->chan_flags = rx_status->rs_flags;
  492. rx_mon_status->rate = rx_status->rs_datarate;
  493. /* TODO: rx_mon_status->ant_signal_db */
  494. /* TODO: rx_mon_status->nr_ant */
  495. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  496. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  497. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  498. /* TODO: rx_mon_status->ldpc */
  499. /* TODO: rx_mon_status->beamformed */
  500. /* TODO: rx_mon_status->vht_flags */
  501. /* TODO: rx_mon_status->vht_flag_values1 */
  502. }
  503. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  504. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  505. {
  506. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  507. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  508. qdf_nbuf_t mon_skb, skb_next;
  509. qdf_nbuf_t mon_mpdu = NULL;
  510. if ((pdev->monitor_vdev == NULL) ||
  511. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  512. goto mon_deliver_fail;
  513. }
  514. /* restitch mon MPDU for delivery via monitor interface */
  515. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  516. tail_msdu, rs);
  517. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev) {
  518. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  519. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  520. pdev->monitor_vdev->osif_rx_mon(
  521. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  522. } else {
  523. goto mon_deliver_fail;
  524. }
  525. return QDF_STATUS_SUCCESS;
  526. mon_deliver_fail:
  527. mon_skb = head_msdu;
  528. while (mon_skb) {
  529. skb_next = qdf_nbuf_next(mon_skb);
  530. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  531. "[%s][%d] mon_skb=%pK\n", __func__, __LINE__, mon_skb);
  532. qdf_nbuf_free(mon_skb);
  533. mon_skb = skb_next;
  534. }
  535. return QDF_STATUS_E_INVAL;
  536. }
  537. /**
  538. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  539. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  540. * @soc: core txrx main contex
  541. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  542. * @quota: No. of units (packets) that can be serviced in one shot.
  543. *
  544. * This function implements the core of Rx functionality. This is
  545. * expected to handle only non-error frames.
  546. *
  547. * Return: none
  548. */
  549. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  550. {
  551. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  552. uint8_t pdev_id;
  553. void *hal_soc;
  554. void *rxdma_dst_ring_desc;
  555. void *mon_dst_srng;
  556. union dp_rx_desc_list_elem_t *head = NULL;
  557. union dp_rx_desc_list_elem_t *tail = NULL;
  558. uint32_t ppdu_id;
  559. uint32_t rx_bufs_used;
  560. pdev_id = pdev->pdev_id;
  561. mon_dst_srng = pdev->rxdma_mon_dst_ring.hal_srng;
  562. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  563. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  564. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK\n",
  565. __func__, __LINE__, mon_dst_srng);
  566. return;
  567. }
  568. hal_soc = soc->hal_soc;
  569. qdf_assert(hal_soc);
  570. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  571. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  572. "%s %d : HAL Monitor Destination Ring access Failed -- %pK\n",
  573. __func__, __LINE__, mon_dst_srng);
  574. return;
  575. }
  576. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  577. rx_bufs_used = 0;
  578. while (qdf_likely(rxdma_dst_ring_desc =
  579. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  580. qdf_nbuf_t head_msdu, tail_msdu;
  581. uint32_t npackets;
  582. head_msdu = (qdf_nbuf_t) NULL;
  583. tail_msdu = (qdf_nbuf_t) NULL;
  584. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  585. rxdma_dst_ring_desc,
  586. &head_msdu, &tail_msdu,
  587. &npackets, &ppdu_id,
  588. &head, &tail);
  589. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  590. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  591. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  592. sizeof(pdev->ppdu_info.rx_status));
  593. break;
  594. }
  595. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  596. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  597. mon_dst_srng);
  598. }
  599. hal_srng_access_end(hal_soc, mon_dst_srng);
  600. if (rx_bufs_used) {
  601. dp_rx_buffers_replenish(soc, pdev_id,
  602. &pdev->rxdma_mon_buf_ring, &soc->rx_desc_mon[pdev_id],
  603. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  604. }
  605. }
  606. static QDF_STATUS
  607. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev) {
  608. uint8_t pdev_id = pdev->pdev_id;
  609. struct dp_soc *soc = pdev->soc;
  610. union dp_rx_desc_list_elem_t *desc_list = NULL;
  611. union dp_rx_desc_list_elem_t *tail = NULL;
  612. struct dp_srng *rxdma_srng;
  613. uint32_t rxdma_entries;
  614. struct rx_desc_pool *rx_desc_pool;
  615. QDF_STATUS status;
  616. rxdma_srng = &pdev->rxdma_mon_buf_ring;
  617. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  618. soc->hal_soc,
  619. RXDMA_MONITOR_BUF);
  620. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  621. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  622. "%s: Mon RX Desc Pool[%d] allocation size=%d\n"
  623. , __func__, pdev_id, rxdma_entries*3);
  624. status = dp_rx_desc_pool_alloc(soc, pdev_id,
  625. rxdma_entries*3, rx_desc_pool);
  626. if (!QDF_IS_STATUS_SUCCESS(status)) {
  627. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  628. "%s: dp_rx_desc_pool_alloc() failed \n", __func__);
  629. return status;
  630. }
  631. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  632. "%s: Mon RX Buffers Replenish pdev_id=%d\n",
  633. __func__, pdev_id);
  634. status = dp_rx_buffers_replenish(soc, pdev_id, rxdma_srng, rx_desc_pool,
  635. rxdma_entries, &desc_list, &tail,
  636. HAL_RX_BUF_RBM_SW3_BM);
  637. if (!QDF_IS_STATUS_SUCCESS(status)) {
  638. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  639. "%s: dp_rx_buffers_replenish() failed \n", __func__);
  640. return status;
  641. }
  642. return QDF_STATUS_SUCCESS;
  643. }
  644. static QDF_STATUS
  645. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev) {
  646. uint8_t pdev_id = pdev->pdev_id;
  647. struct dp_soc *soc = pdev->soc;
  648. struct rx_desc_pool *rx_desc_pool;
  649. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  650. if (rx_desc_pool->pool_size != 0) {
  651. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  652. }
  653. return QDF_STATUS_SUCCESS;
  654. }
  655. /*
  656. * Allocate and setup link descriptor pool that will be used by HW for
  657. * various link and queue descriptors and managed by WBM
  658. */
  659. static int dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  660. {
  661. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  662. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  663. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  664. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  665. uint32_t total_link_descs, total_mem_size;
  666. uint32_t num_link_desc_banks;
  667. uint32_t last_bank_size = 0;
  668. uint32_t entry_size, num_entries;
  669. void *mon_desc_srng;
  670. uint32_t num_replenish_buf;
  671. struct dp_srng *dp_srng;
  672. int i;
  673. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  674. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  675. soc->hal_soc, RXDMA_MONITOR_DESC);
  676. /* Round up to power of 2 */
  677. total_link_descs = 1;
  678. while (total_link_descs < num_entries)
  679. total_link_descs <<= 1;
  680. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  681. "%s: total_link_descs: %u, link_desc_size: %d\n",
  682. __func__, total_link_descs, link_desc_size);
  683. total_mem_size = total_link_descs * link_desc_size;
  684. total_mem_size += link_desc_align;
  685. if (total_mem_size <= max_alloc_size) {
  686. num_link_desc_banks = 0;
  687. last_bank_size = total_mem_size;
  688. } else {
  689. num_link_desc_banks = (total_mem_size) /
  690. (max_alloc_size - link_desc_align);
  691. last_bank_size = total_mem_size %
  692. (max_alloc_size - link_desc_align);
  693. }
  694. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  695. "%s: total_mem_size: %d, num_link_desc_banks: %u, \
  696. max_alloc_size: %d last_bank_size: %d\n",
  697. __func__, total_mem_size, num_link_desc_banks, max_alloc_size,
  698. last_bank_size);
  699. for (i = 0; i < num_link_desc_banks; i++) {
  700. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  701. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  702. max_alloc_size,
  703. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  704. if (!dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  705. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  706. "%s: Link desc memory allocation failed\n",
  707. __func__);
  708. goto fail;
  709. }
  710. dp_pdev->link_desc_banks[i].size = max_alloc_size;
  711. dp_pdev->link_desc_banks[i].base_vaddr =
  712. (void *)((unsigned long)
  713. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  714. ((unsigned long)
  715. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  716. link_desc_align));
  717. dp_pdev->link_desc_banks[i].base_paddr =
  718. (unsigned long)
  719. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  720. ((unsigned long)
  721. (dp_pdev->link_desc_banks[i].base_vaddr) -
  722. (unsigned long)
  723. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  724. }
  725. if (last_bank_size) {
  726. /* Allocate last bank in case total memory required is not exact
  727. * multiple of max_alloc_size
  728. */
  729. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  730. qdf_mem_alloc_consistent(soc->osdev,
  731. soc->osdev->dev, last_bank_size,
  732. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  733. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned == NULL) {
  734. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  735. "%s: allocation failed for mon link desc pool\n",
  736. __func__);
  737. goto fail;
  738. }
  739. dp_pdev->link_desc_banks[i].size = last_bank_size;
  740. dp_pdev->link_desc_banks[i].base_vaddr =
  741. (void *)((unsigned long)
  742. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  743. ((unsigned long)
  744. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  745. link_desc_align));
  746. dp_pdev->link_desc_banks[i].base_paddr =
  747. (unsigned long)
  748. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  749. ((unsigned long)
  750. (dp_pdev->link_desc_banks[i].base_vaddr) -
  751. (unsigned long)
  752. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  753. }
  754. /* Allocate and setup link descriptor idle list for HW internal use */
  755. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  756. total_mem_size = entry_size * total_link_descs;
  757. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring.hal_srng;
  758. num_replenish_buf = 0;
  759. if (total_mem_size <= max_alloc_size) {
  760. void *desc;
  761. hal_srng_access_start_unlocked(soc->hal_soc, mon_desc_srng);
  762. for (i = 0; i < MAX_MON_LINK_DESC_BANKS &&
  763. dp_pdev->link_desc_banks[i].base_paddr; i++) {
  764. uint32_t num_entries =
  765. (dp_pdev->link_desc_banks[i].size -
  766. (unsigned long)
  767. (dp_pdev->link_desc_banks[i].base_vaddr) -
  768. (unsigned long)
  769. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned))
  770. / link_desc_size;
  771. unsigned long paddr =
  772. (unsigned long)
  773. (dp_pdev->link_desc_banks[i].base_paddr);
  774. unsigned long vaddr =
  775. (unsigned long)
  776. (dp_pdev->link_desc_banks[i].base_vaddr);
  777. while (num_entries && (desc =
  778. hal_srng_src_get_next(soc->hal_soc,
  779. mon_desc_srng))) {
  780. hal_set_link_desc_addr(desc, i, paddr);
  781. num_entries--;
  782. num_replenish_buf++;
  783. paddr += link_desc_size;
  784. vaddr += link_desc_size;
  785. }
  786. }
  787. hal_srng_access_end_unlocked(soc->hal_soc, mon_desc_srng);
  788. } else {
  789. qdf_assert(0);
  790. }
  791. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  792. "%s: successfully replenished %d buffer\n",
  793. __func__, num_replenish_buf);
  794. return 0;
  795. fail:
  796. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  797. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  798. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  799. dp_pdev->link_desc_banks[i].size,
  800. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  801. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  802. }
  803. }
  804. return QDF_STATUS_E_FAILURE;
  805. }
  806. /*
  807. * Free link descriptor pool that was setup HW
  808. */
  809. static void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  810. {
  811. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  812. int i;
  813. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  814. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  815. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  816. dp_pdev->link_desc_banks[i].size,
  817. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  818. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  819. }
  820. }
  821. }
  822. /**
  823. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  824. * @pdev: core txrx pdev context
  825. *
  826. * This function will attach a DP RX for monitor mode instance into
  827. * the main device (SOC) context. Will allocate dp rx resource and
  828. * initialize resources.
  829. *
  830. * Return: QDF_STATUS_SUCCESS: success
  831. * QDF_STATUS_E_RESOURCES: Error return
  832. */
  833. QDF_STATUS
  834. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  835. uint8_t pdev_id = pdev->pdev_id;
  836. struct dp_soc *soc = pdev->soc;
  837. QDF_STATUS status;
  838. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  839. "%s: pdev attach id=%d\n", __func__, pdev_id);
  840. status = dp_rx_pdev_mon_buf_attach(pdev);
  841. if (!QDF_IS_STATUS_SUCCESS(status)) {
  842. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  843. "%s: dp_rx_pdev_mon_buf_attach() failed \n", __func__);
  844. return status;
  845. }
  846. status = dp_rx_pdev_mon_status_attach(pdev);
  847. if (!QDF_IS_STATUS_SUCCESS(status)) {
  848. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  849. "%s: dp_rx_pdev_mon_status_attach() failed \n",
  850. __func__);
  851. return status;
  852. }
  853. status = dp_mon_link_desc_pool_setup(soc, pdev_id);
  854. if (!QDF_IS_STATUS_SUCCESS(status)) {
  855. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  856. "%s: dp_mon_link_desc_pool_setup() failed \n",
  857. __func__);
  858. return status;
  859. }
  860. return QDF_STATUS_SUCCESS;
  861. }
  862. /**
  863. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  864. * @pdev: core txrx pdev context
  865. *
  866. * This function will detach DP RX for monitor mode from
  867. * main device context. will free DP Rx resources for
  868. * monitor mode
  869. *
  870. * Return: QDF_STATUS_SUCCESS: success
  871. * QDF_STATUS_E_RESOURCES: Error return
  872. */
  873. QDF_STATUS
  874. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  875. uint8_t pdev_id = pdev->pdev_id;
  876. struct dp_soc *soc = pdev->soc;
  877. dp_mon_link_desc_pool_cleanup(soc, pdev_id);
  878. dp_rx_pdev_mon_status_detach(pdev);
  879. dp_rx_pdev_mon_buf_detach(pdev);
  880. return QDF_STATUS_SUCCESS;
  881. }