dp_rx.c 40 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_nbuf.h"
  24. #ifdef MESH_MODE_SUPPORT
  25. #include "if_meta_hdr.h"
  26. #endif
  27. #include "dp_internal.h"
  28. #include "dp_rx_mon.h"
  29. #ifdef RX_DESC_DEBUG_CHECK
  30. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  31. {
  32. rx_desc->magic = DP_RX_DESC_MAGIC;
  33. rx_desc->nbuf = nbuf;
  34. }
  35. #else
  36. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  37. {
  38. rx_desc->nbuf = nbuf;
  39. }
  40. #endif
  41. #ifdef CONFIG_WIN
  42. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  43. {
  44. return vdev->ap_bridge_enabled;
  45. }
  46. #else
  47. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  48. {
  49. if (vdev->opmode != wlan_op_mode_sta)
  50. return true;
  51. else
  52. return false;
  53. }
  54. #endif
  55. /*
  56. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  57. * called during dp rx initialization
  58. * and at the end of dp_rx_process.
  59. *
  60. * @soc: core txrx main context
  61. * @mac_id: mac_id which is one of 3 mac_ids
  62. * @dp_rxdma_srng: dp rxdma circular ring
  63. * @rx_desc_pool: Poiter to free Rx descriptor pool
  64. * @num_req_buffers: number of buffer to be replenished
  65. * @desc_list: list of descs if called from dp_rx_process
  66. * or NULL during dp rx initialization or out of buffer
  67. * interrupt.
  68. * @tail: tail of descs list
  69. * @owner: who owns the nbuf (host, NSS etc...)
  70. * Return: return success or failure
  71. */
  72. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  73. struct dp_srng *dp_rxdma_srng,
  74. struct rx_desc_pool *rx_desc_pool,
  75. uint32_t num_req_buffers,
  76. union dp_rx_desc_list_elem_t **desc_list,
  77. union dp_rx_desc_list_elem_t **tail,
  78. uint8_t owner)
  79. {
  80. uint32_t num_alloc_desc;
  81. uint16_t num_desc_to_free = 0;
  82. struct dp_pdev *dp_pdev = dp_soc->pdev_list[mac_id];
  83. uint32_t num_entries_avail;
  84. uint32_t count;
  85. int sync_hw_ptr = 1;
  86. qdf_dma_addr_t paddr;
  87. qdf_nbuf_t rx_netbuf;
  88. void *rxdma_ring_entry;
  89. union dp_rx_desc_list_elem_t *next;
  90. QDF_STATUS ret;
  91. void *rxdma_srng;
  92. rxdma_srng = dp_rxdma_srng->hal_srng;
  93. if (!rxdma_srng) {
  94. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  95. "rxdma srng not initialized");
  96. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  97. return QDF_STATUS_E_FAILURE;
  98. }
  99. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  100. "requested %d buffers for replenish", num_req_buffers);
  101. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  102. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  103. rxdma_srng,
  104. sync_hw_ptr);
  105. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  106. "no of availble entries in rxdma ring: %d",
  107. num_entries_avail);
  108. if (!(*desc_list) && (num_entries_avail >
  109. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  110. num_req_buffers = num_entries_avail;
  111. } else if (num_entries_avail < num_req_buffers) {
  112. num_desc_to_free = num_req_buffers - num_entries_avail;
  113. num_req_buffers = num_entries_avail;
  114. }
  115. if (qdf_unlikely(!num_req_buffers)) {
  116. num_desc_to_free = num_req_buffers;
  117. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  118. goto free_descs;
  119. }
  120. /*
  121. * if desc_list is NULL, allocate the descs from freelist
  122. */
  123. if (!(*desc_list)) {
  124. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  125. rx_desc_pool,
  126. num_req_buffers,
  127. desc_list,
  128. tail);
  129. if (!num_alloc_desc) {
  130. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  131. "no free rx_descs in freelist");
  132. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  133. num_req_buffers);
  134. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  135. return QDF_STATUS_E_NOMEM;
  136. }
  137. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  138. "%d rx desc allocated", num_alloc_desc);
  139. num_req_buffers = num_alloc_desc;
  140. }
  141. count = 0;
  142. while (count < num_req_buffers) {
  143. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  144. RX_BUFFER_SIZE,
  145. RX_BUFFER_RESERVATION,
  146. RX_BUFFER_ALIGNMENT,
  147. FALSE);
  148. if (rx_netbuf == NULL) {
  149. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  150. continue;
  151. }
  152. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  153. QDF_DMA_BIDIRECTIONAL);
  154. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  155. qdf_nbuf_free(rx_netbuf);
  156. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  157. continue;
  158. }
  159. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  160. /*
  161. * check if the physical address of nbuf->data is
  162. * less then 0x50000000 then free the nbuf and try
  163. * allocating new nbuf. We can try for 100 times.
  164. * this is a temp WAR till we fix it properly.
  165. */
  166. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  167. if (ret == QDF_STATUS_E_FAILURE) {
  168. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  169. break;
  170. }
  171. count++;
  172. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  173. rxdma_srng);
  174. next = (*desc_list)->next;
  175. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  176. (*desc_list)->rx_desc.in_use = 1;
  177. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  178. "rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d\n",
  179. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  180. (unsigned long long)paddr, (*desc_list)->rx_desc.cookie);
  181. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  182. (*desc_list)->rx_desc.cookie,
  183. owner);
  184. *desc_list = next;
  185. }
  186. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  187. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  188. "successfully replenished %d buffers", num_req_buffers);
  189. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  190. "%d rx desc added back to free list", num_desc_to_free);
  191. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, num_req_buffers,
  192. (RX_BUFFER_SIZE * num_req_buffers));
  193. free_descs:
  194. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  195. /*
  196. * add any available free desc back to the free list
  197. */
  198. if (*desc_list)
  199. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  200. mac_id, rx_desc_pool);
  201. return QDF_STATUS_SUCCESS;
  202. }
  203. /*
  204. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  205. * pkts to RAW mode simulation to
  206. * decapsulate the pkt.
  207. *
  208. * @vdev: vdev on which RAW mode is enabled
  209. * @nbuf_list: list of RAW pkts to process
  210. * @peer: peer object from which the pkt is rx
  211. *
  212. * Return: void
  213. */
  214. void
  215. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  216. struct dp_peer *peer)
  217. {
  218. qdf_nbuf_t deliver_list_head = NULL;
  219. qdf_nbuf_t deliver_list_tail = NULL;
  220. qdf_nbuf_t nbuf;
  221. nbuf = nbuf_list;
  222. while (nbuf) {
  223. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  224. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  225. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  226. /*
  227. * reset the chfrag_start and chfrag_end bits in nbuf cb
  228. * as this is a non-amsdu pkt and RAW mode simulation expects
  229. * these bit s to be 0 for non-amsdu pkt.
  230. */
  231. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  232. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  233. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  234. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  235. }
  236. nbuf = next;
  237. }
  238. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  239. &deliver_list_tail, (struct cdp_peer*) peer);
  240. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  241. }
  242. #ifdef DP_LFR
  243. /*
  244. * In case of LFR, data of a new peer might be sent up
  245. * even before peer is added.
  246. */
  247. static inline struct dp_vdev *
  248. dp_get_vdev_from_peer(struct dp_soc *soc,
  249. uint16_t peer_id,
  250. struct dp_peer *peer,
  251. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  252. {
  253. struct dp_vdev *vdev;
  254. uint8_t vdev_id;
  255. if (unlikely(!peer)) {
  256. if (peer_id != HTT_INVALID_PEER) {
  257. vdev_id = DP_PEER_METADATA_ID_GET(
  258. mpdu_desc_info.peer_meta_data);
  259. QDF_TRACE(QDF_MODULE_ID_DP,
  260. QDF_TRACE_LEVEL_DEBUG,
  261. FL("PeerID %d not found use vdevID %d"),
  262. peer_id, vdev_id);
  263. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  264. vdev_id);
  265. } else {
  266. QDF_TRACE(QDF_MODULE_ID_DP,
  267. QDF_TRACE_LEVEL_DEBUG,
  268. FL("Invalid PeerID %d"),
  269. peer_id);
  270. return NULL;
  271. }
  272. } else {
  273. vdev = peer->vdev;
  274. }
  275. return vdev;
  276. }
  277. /*
  278. * In case of LFR, this is an empty inline function
  279. */
  280. static inline void dp_rx_peer_validity_check(struct dp_peer *peer)
  281. {
  282. }
  283. #else
  284. static inline struct dp_vdev *
  285. dp_get_vdev_from_peer(struct dp_soc *soc,
  286. uint16_t peer_id,
  287. struct dp_peer *peer,
  288. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  289. {
  290. if (unlikely(!peer)) {
  291. QDF_TRACE(QDF_MODULE_ID_DP,
  292. QDF_TRACE_LEVEL_DEBUG,
  293. FL("Peer not found for peerID %d"),
  294. peer_id);
  295. return NULL;
  296. } else {
  297. return peer->vdev;
  298. }
  299. }
  300. /*
  301. * Assert if PEER is NULL
  302. */
  303. static inline void dp_rx_peer_validity_check(struct dp_peer *peer)
  304. {
  305. qdf_assert_always(peer);
  306. }
  307. #endif
  308. /**
  309. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  310. *
  311. * @soc: core txrx main context
  312. * @sa_peer : source peer entry
  313. * @rx_tlv_hdr : start address of rx tlvs
  314. * @nbuf : nbuf that has to be intrabss forwarded
  315. *
  316. * Return: bool: true if it is forwarded else false
  317. */
  318. static bool
  319. dp_rx_intrabss_fwd(struct dp_soc *soc,
  320. struct dp_peer *sa_peer,
  321. uint8_t *rx_tlv_hdr,
  322. qdf_nbuf_t nbuf)
  323. {
  324. uint16_t da_idx;
  325. uint16_t len;
  326. struct dp_peer *da_peer;
  327. struct dp_ast_entry *ast_entry;
  328. qdf_nbuf_t nbuf_copy;
  329. /* check if the destination peer is available in peer table
  330. * and also check if the source peer and destination peer
  331. * belong to the same vap and destination peer is not bss peer.
  332. */
  333. if ((hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  334. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  335. da_idx = hal_rx_msdu_end_da_idx_get(rx_tlv_hdr);
  336. ast_entry = soc->ast_table[da_idx];
  337. if (!ast_entry)
  338. return false;
  339. da_peer = ast_entry->peer;
  340. if (!da_peer)
  341. return false;
  342. if (da_peer->vdev == sa_peer->vdev && !da_peer->bss_peer) {
  343. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  344. len = qdf_nbuf_len(nbuf);
  345. if (!dp_tx_send(sa_peer->vdev, nbuf)) {
  346. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.pkts,
  347. 1, len);
  348. return true;
  349. } else {
  350. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.fail, 1,
  351. len);
  352. return false;
  353. }
  354. }
  355. }
  356. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  357. * source, then clone the pkt and send the cloned pkt for
  358. * intra BSS forwarding and original pkt up the network stack
  359. * Note: how do we handle multicast pkts. do we forward
  360. * all multicast pkts as is or let a higher layer module
  361. * like igmpsnoop decide whether to forward or not with
  362. * Mcast enhancement.
  363. */
  364. else if (qdf_unlikely((hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  365. !sa_peer->bss_peer))) {
  366. nbuf_copy = qdf_nbuf_copy(nbuf);
  367. if (!nbuf_copy)
  368. return false;
  369. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  370. len = qdf_nbuf_len(nbuf_copy);
  371. if (dp_tx_send(sa_peer->vdev, nbuf_copy)) {
  372. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.fail, 1, len);
  373. qdf_nbuf_free(nbuf_copy);
  374. } else
  375. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.pkts, 1, len);
  376. }
  377. /* return false as we have to still send the original pkt
  378. * up the stack
  379. */
  380. return false;
  381. }
  382. #ifdef MESH_MODE_SUPPORT
  383. /**
  384. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  385. *
  386. * @vdev: DP Virtual device handle
  387. * @nbuf: Buffer pointer
  388. * @rx_tlv_hdr: start of rx tlv header
  389. * @peer: pointer to peer
  390. *
  391. * This function allocated memory for mesh receive stats and fill the
  392. * required stats. Stores the memory address in skb cb.
  393. *
  394. * Return: void
  395. */
  396. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  397. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  398. {
  399. struct mesh_recv_hdr_s *rx_info = NULL;
  400. uint32_t pkt_type;
  401. uint32_t nss;
  402. uint32_t rate_mcs;
  403. uint32_t bw;
  404. /* fill recv mesh stats */
  405. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  406. /* upper layers are resposible to free this memory */
  407. if (rx_info == NULL) {
  408. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  409. "Memory allocation failed for mesh rx stats");
  410. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  411. return;
  412. }
  413. rx_info->rs_flags = MESH_RXHDR_VER1;
  414. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  415. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  416. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  417. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  418. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  419. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  420. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  421. if (vdev->osif_get_key)
  422. vdev->osif_get_key(vdev->osif_vdev,
  423. &rx_info->rs_decryptkey[0],
  424. &peer->mac_addr.raw[0],
  425. rx_info->rs_keyix);
  426. }
  427. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  428. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  429. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  430. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  431. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  432. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  433. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  434. (bw << 24);
  435. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  436. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  437. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  438. rx_info->rs_flags,
  439. rx_info->rs_rssi,
  440. rx_info->rs_channel,
  441. rx_info->rs_ratephy1,
  442. rx_info->rs_keyix);
  443. }
  444. /**
  445. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  446. *
  447. * @vdev: DP Virtual device handle
  448. * @nbuf: Buffer pointer
  449. * @rx_tlv_hdr: start of rx tlv header
  450. *
  451. * This checks if the received packet is matching any filter out
  452. * catogery and and drop the packet if it matches.
  453. *
  454. * Return: status(0 indicates drop, 1 indicate to no drop)
  455. */
  456. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  457. uint8_t *rx_tlv_hdr)
  458. {
  459. union dp_align_mac_addr mac_addr;
  460. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  461. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  462. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  463. return QDF_STATUS_SUCCESS;
  464. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  465. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  466. return QDF_STATUS_SUCCESS;
  467. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  468. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  469. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  470. return QDF_STATUS_SUCCESS;
  471. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  472. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  473. &mac_addr.raw[0]))
  474. return QDF_STATUS_E_FAILURE;
  475. if (!qdf_mem_cmp(&mac_addr.raw[0],
  476. &vdev->mac_addr.raw[0],
  477. DP_MAC_ADDR_LEN))
  478. return QDF_STATUS_SUCCESS;
  479. }
  480. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  481. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  482. &mac_addr.raw[0]))
  483. return QDF_STATUS_E_FAILURE;
  484. if (!qdf_mem_cmp(&mac_addr.raw[0],
  485. &vdev->mac_addr.raw[0],
  486. DP_MAC_ADDR_LEN))
  487. return QDF_STATUS_SUCCESS;
  488. }
  489. }
  490. return QDF_STATUS_E_FAILURE;
  491. }
  492. #else
  493. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  494. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  495. {
  496. }
  497. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  498. uint8_t *rx_tlv_hdr)
  499. {
  500. return QDF_STATUS_E_FAILURE;
  501. }
  502. #endif
  503. #ifdef CONFIG_WIN
  504. /**
  505. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  506. * clients
  507. * @pdev: DP pdev handle
  508. * @rx_pkt_hdr: Rx packet Header
  509. *
  510. * return: dp_vdev*
  511. */
  512. static
  513. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  514. uint8_t *rx_pkt_hdr)
  515. {
  516. struct ieee80211_frame *wh;
  517. struct dp_neighbour_peer *peer = NULL;
  518. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  519. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  520. return NULL;
  521. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  522. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  523. neighbour_peer_list_elem) {
  524. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  525. wh->i_addr2, DP_MAC_ADDR_LEN) == 0) {
  526. QDF_TRACE(
  527. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  528. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  529. peer->neighbour_peers_macaddr.raw[0],
  530. peer->neighbour_peers_macaddr.raw[1],
  531. peer->neighbour_peers_macaddr.raw[2],
  532. peer->neighbour_peers_macaddr.raw[3],
  533. peer->neighbour_peers_macaddr.raw[4],
  534. peer->neighbour_peers_macaddr.raw[5]);
  535. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  536. return pdev->monitor_vdev;
  537. }
  538. }
  539. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  540. return NULL;
  541. }
  542. /**
  543. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  544. * @soc: DP SOC handle
  545. * @mpdu: mpdu for which peer is invalid
  546. *
  547. * return: integer type
  548. */
  549. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  550. {
  551. struct dp_invalid_peer_msg msg;
  552. struct dp_vdev *vdev = NULL;
  553. struct dp_pdev *pdev = NULL;
  554. struct ieee80211_frame *wh;
  555. uint8_t i;
  556. uint8_t *rx_pkt_hdr;
  557. rx_pkt_hdr = hal_rx_pkt_hdr_get(qdf_nbuf_data(mpdu));
  558. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  559. if (!DP_FRAME_IS_DATA(wh)) {
  560. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  561. "NAWDS valid only for data frames");
  562. return 1;
  563. }
  564. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  565. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  566. "Invalid nbuf length");
  567. return 1;
  568. }
  569. for (i = 0; i < MAX_PDEV_CNT; i++) {
  570. pdev = soc->pdev_list[i];
  571. if (!pdev) {
  572. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  573. "PDEV not found");
  574. continue;
  575. }
  576. if (pdev->filter_neighbour_peers) {
  577. /* Next Hop scenario not yet handle */
  578. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  579. if (vdev) {
  580. dp_rx_mon_deliver(soc, i,
  581. pdev->invalid_peer_head_msdu,
  582. pdev->invalid_peer_tail_msdu);
  583. return 0;
  584. }
  585. }
  586. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  587. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  588. DP_MAC_ADDR_LEN) == 0) {
  589. goto out;
  590. }
  591. }
  592. }
  593. if (!vdev) {
  594. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  595. "VDEV not found");
  596. return 1;
  597. }
  598. out:
  599. msg.wh = wh;
  600. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  601. msg.nbuf = mpdu;
  602. msg.vdev_id = vdev->vdev_id;
  603. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  604. return pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  605. pdev->osif_pdev, &msg);
  606. return 0;
  607. }
  608. #else
  609. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  610. {
  611. return 0;
  612. }
  613. #endif
  614. #if defined(FEATURE_LRO)
  615. static void dp_rx_print_lro_info(uint8_t *rx_tlv)
  616. {
  617. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  618. FL("----------------------RX DESC LRO----------------------\n"));
  619. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  620. FL("lro_eligible 0x%x"), HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  621. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  622. FL("pure_ack 0x%x"), HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  623. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  624. FL("chksum 0x%x"), HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  625. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  626. FL("TCP seq num 0x%x"), HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  627. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  628. FL("TCP ack num 0x%x"), HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  629. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  630. FL("TCP window 0x%x"), HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  631. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  632. FL("TCP protocol 0x%x"), HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  633. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  634. FL("TCP offset 0x%x"), HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  635. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  636. FL("toeplitz 0x%x"), HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  637. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  638. FL("---------------------------------------------------------\n"));
  639. }
  640. /**
  641. * dp_rx_lro() - LRO related processing
  642. * @rx_tlv: TLV data extracted from the rx packet
  643. * @peer: destination peer of the msdu
  644. * @msdu: network buffer
  645. * @ctx: LRO context
  646. *
  647. * This function performs the LRO related processing of the msdu
  648. *
  649. * Return: true: LRO enabled false: LRO is not enabled
  650. */
  651. static void dp_rx_lro(uint8_t *rx_tlv, struct dp_peer *peer,
  652. qdf_nbuf_t msdu, qdf_lro_ctx_t ctx)
  653. {
  654. if (!peer || !peer->vdev || !peer->vdev->lro_enable) {
  655. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  656. FL("no peer, no vdev or LRO disabled"));
  657. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = 0;
  658. return;
  659. }
  660. qdf_assert(rx_tlv);
  661. dp_rx_print_lro_info(rx_tlv);
  662. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  663. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  664. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  665. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  666. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  667. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  668. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  669. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  670. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  671. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  672. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  673. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  674. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  675. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  676. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  677. HAL_RX_TLV_GET_IPV6(rx_tlv);
  678. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  679. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  680. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  681. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  682. QDF_NBUF_CB_RX_LRO_CTX(msdu) = (unsigned char *)ctx;
  683. }
  684. #else
  685. static void dp_rx_lro(uint8_t *rx_tlv, struct dp_peer *peer,
  686. qdf_nbuf_t msdu, qdf_lro_ctx_t ctx)
  687. {
  688. }
  689. #endif
  690. static inline void dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  691. {
  692. if (*mpdu_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN))
  693. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  694. else
  695. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  696. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  697. }
  698. /**
  699. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  700. * multiple nbufs.
  701. * @nbuf: nbuf which can may be part of frag_list.
  702. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  703. * @mpdu_len: mpdu length.
  704. * @is_first_frag: is this the first nbuf in the fragmented MSDU.
  705. * @frag_list_len: length of all the fragments combined.
  706. * @head_frag_nbuf: parent nbuf
  707. * @frag_list_head: pointer to the first nbuf in the frag_list.
  708. * @frag_list_tail: pointer to the last nbuf in the frag_list.
  709. *
  710. * This function implements the creation of RX frag_list for cases
  711. * where an MSDU is spread across multiple nbufs.
  712. *
  713. */
  714. void dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  715. uint16_t *mpdu_len, bool *is_first_frag,
  716. uint16_t *frag_list_len, qdf_nbuf_t *head_frag_nbuf,
  717. qdf_nbuf_t *frag_list_head, qdf_nbuf_t *frag_list_tail)
  718. {
  719. if (qdf_unlikely(qdf_nbuf_is_rx_chfrag_cont(nbuf))) {
  720. if (!(*is_first_frag)) {
  721. *is_first_frag = 1;
  722. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  723. *mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  724. dp_rx_adjust_nbuf_len(nbuf, mpdu_len);
  725. *head_frag_nbuf = nbuf;
  726. } else {
  727. dp_rx_adjust_nbuf_len(nbuf, mpdu_len);
  728. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  729. *frag_list_len += qdf_nbuf_len(nbuf);
  730. DP_RX_LIST_APPEND(*frag_list_head,
  731. *frag_list_tail,
  732. nbuf);
  733. }
  734. } else {
  735. if (qdf_unlikely(*is_first_frag)) {
  736. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  737. dp_rx_adjust_nbuf_len(nbuf, mpdu_len);
  738. qdf_nbuf_pull_head(nbuf,
  739. RX_PKT_TLVS_LEN);
  740. *frag_list_len += qdf_nbuf_len(nbuf);
  741. DP_RX_LIST_APPEND(*frag_list_head,
  742. *frag_list_tail,
  743. nbuf);
  744. qdf_nbuf_append_ext_list(*head_frag_nbuf,
  745. *frag_list_head,
  746. *frag_list_len);
  747. *is_first_frag = 0;
  748. return;
  749. }
  750. *head_frag_nbuf = nbuf;
  751. }
  752. }
  753. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  754. struct dp_peer *peer,
  755. qdf_nbuf_t nbuf_list)
  756. {
  757. /*
  758. * highly unlikely to have a vdev without a registerd rx
  759. * callback function. if so let us free the nbuf_list.
  760. */
  761. if (qdf_unlikely(!vdev->osif_rx)) {
  762. qdf_nbuf_t nbuf;
  763. do {
  764. nbuf = nbuf_list;
  765. nbuf_list = nbuf_list->next;
  766. qdf_nbuf_free(nbuf);
  767. } while (nbuf_list);
  768. return;
  769. }
  770. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  771. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi))
  772. dp_rx_deliver_raw(vdev, nbuf_list, peer);
  773. else
  774. vdev->osif_rx(vdev->osif_vdev, nbuf_list);
  775. }
  776. /**
  777. * dp_rx_process() - Brain of the Rx processing functionality
  778. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  779. * @soc: core txrx main context
  780. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  781. * @quota: No. of units (packets) that can be serviced in one shot.
  782. *
  783. * This function implements the core of Rx functionality. This is
  784. * expected to handle only non-error frames.
  785. *
  786. * Return: uint32_t: No. of elements processed
  787. */
  788. uint32_t
  789. dp_rx_process(struct dp_intr *int_ctx, void *hal_ring, uint32_t quota)
  790. {
  791. void *hal_soc;
  792. void *ring_desc;
  793. struct dp_rx_desc *rx_desc = NULL;
  794. qdf_nbuf_t nbuf, next;
  795. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  796. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  797. uint32_t rx_bufs_used = 0, rx_buf_cookie, l2_hdr_offset;
  798. uint16_t msdu_len;
  799. uint16_t peer_id;
  800. struct dp_peer *peer = NULL;
  801. struct dp_vdev *vdev = NULL;
  802. uint32_t pkt_len;
  803. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  804. struct hal_rx_msdu_desc_info msdu_desc_info = { 0 };
  805. enum hal_reo_error_status error;
  806. uint32_t peer_mdata;
  807. uint8_t *rx_tlv_hdr;
  808. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  809. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  810. uint8_t mac_id = 0;
  811. uint32_t ampdu_flag, amsdu_flag;
  812. struct dp_pdev *pdev;
  813. struct dp_srng *dp_rxdma_srng;
  814. struct rx_desc_pool *rx_desc_pool;
  815. struct dp_soc *soc = int_ctx->soc;
  816. uint8_t ring_id = 0;
  817. uint8_t core_id = 0;
  818. bool is_first_frag = 0;
  819. uint16_t mpdu_len = 0;
  820. qdf_nbuf_t head_frag_nbuf = NULL;
  821. qdf_nbuf_t frag_list_head = NULL;
  822. qdf_nbuf_t frag_list_tail = NULL;
  823. uint16_t frag_list_len = 0;
  824. qdf_nbuf_t nbuf_head = NULL;
  825. qdf_nbuf_t nbuf_tail = NULL;
  826. qdf_nbuf_t deliver_list_head = NULL;
  827. qdf_nbuf_t deliver_list_tail = NULL;
  828. DP_HIST_INIT();
  829. /* Debug -- Remove later */
  830. qdf_assert(soc && hal_ring);
  831. hal_soc = soc->hal_soc;
  832. /* Debug -- Remove later */
  833. qdf_assert(hal_soc);
  834. hif_pm_runtime_mark_last_busy(soc->osdev->dev);
  835. sgi = mcs = tid = nss = bw = reception_type = pkt_type = 0;
  836. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  837. /*
  838. * Need API to convert from hal_ring pointer to
  839. * Ring Type / Ring Id combo
  840. */
  841. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  842. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  843. FL("HAL RING Access Failed -- %pK"), hal_ring);
  844. hal_srng_access_end(hal_soc, hal_ring);
  845. goto done;
  846. }
  847. /*
  848. * start reaping the buffers from reo ring and queue
  849. * them in per vdev queue.
  850. * Process the received pkts in a different per vdev loop.
  851. */
  852. while (qdf_likely(quota && (ring_desc =
  853. hal_srng_dst_get_next(hal_soc, hal_ring)))) {
  854. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  855. ring_id = hal_srng_ring_id_get(hal_ring);
  856. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  857. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  858. FL("HAL RING 0x%pK:error %d"), hal_ring, error);
  859. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  860. /* Don't know how to deal with this -- assert */
  861. qdf_assert(0);
  862. }
  863. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  864. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  865. qdf_assert(rx_desc);
  866. rx_bufs_reaped[rx_desc->pool_id]++;
  867. /* TODO */
  868. /*
  869. * Need a separate API for unmapping based on
  870. * phyiscal address
  871. */
  872. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  873. QDF_DMA_BIDIRECTIONAL);
  874. core_id = smp_processor_id();
  875. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  876. /* Get MPDU DESC info */
  877. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  878. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  879. mpdu_desc_info.peer_meta_data);
  880. hal_rx_mpdu_peer_meta_data_set(qdf_nbuf_data(rx_desc->nbuf),
  881. mpdu_desc_info.peer_meta_data);
  882. peer = dp_peer_find_by_id(soc, peer_id);
  883. vdev = dp_get_vdev_from_peer(soc, peer_id, peer,
  884. mpdu_desc_info);
  885. if (!vdev) {
  886. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  887. FL("vdev is NULL"));
  888. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  889. qdf_nbuf_free(rx_desc->nbuf);
  890. goto fail;
  891. }
  892. /* Get MSDU DESC info */
  893. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  894. /*
  895. * save msdu flags first, last and continuation msdu in
  896. * nbuf->cb
  897. */
  898. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  899. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  900. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  901. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  902. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  903. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  904. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1,
  905. qdf_nbuf_len(rx_desc->nbuf));
  906. ampdu_flag = (mpdu_desc_info.mpdu_flags &
  907. HAL_MPDU_F_AMPDU_FLAG);
  908. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, ampdu_flag);
  909. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(ampdu_flag));
  910. amsdu_flag = ((msdu_desc_info.msdu_flags &
  911. HAL_MSDU_F_FIRST_MSDU_IN_MPDU) &&
  912. (msdu_desc_info.msdu_flags &
  913. HAL_MSDU_F_LAST_MSDU_IN_MPDU));
  914. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1,
  915. amsdu_flag);
  916. DP_STATS_INCC(peer, rx.amsdu_cnt, 1,
  917. !(amsdu_flag));
  918. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  919. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  920. fail:
  921. /*
  922. * if continuation bit is set then we have MSDU spread
  923. * across multiple buffers, let us not decrement quota
  924. * till we reap all buffers of that MSDU.
  925. */
  926. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  927. quota -= 1;
  928. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  929. &tail[rx_desc->pool_id],
  930. rx_desc);
  931. }
  932. done:
  933. hal_srng_access_end(hal_soc, hal_ring);
  934. /* Update histogram statistics by looping through pdev's */
  935. DP_RX_HIST_STATS_PER_PDEV();
  936. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  937. /*
  938. * continue with next mac_id if no pkts were reaped
  939. * from that pool
  940. */
  941. if (!rx_bufs_reaped[mac_id])
  942. continue;
  943. pdev = soc->pdev_list[mac_id];
  944. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  945. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  946. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  947. rx_desc_pool, rx_bufs_reaped[mac_id],
  948. &head[mac_id], &tail[mac_id],
  949. HAL_RX_BUF_RBM_SW3_BM);
  950. }
  951. /* Peer can be NULL is case of LFR */
  952. if (qdf_likely(peer != NULL))
  953. vdev = NULL;
  954. nbuf = nbuf_head;
  955. while (nbuf) {
  956. next = nbuf->next;
  957. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  958. peer_mdata = hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr);
  959. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  960. peer = dp_peer_find_by_id(soc, peer_id);
  961. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  962. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head);
  963. deliver_list_head = NULL;
  964. deliver_list_tail = NULL;
  965. }
  966. if (qdf_likely(peer != NULL))
  967. vdev = peer->vdev;
  968. /*
  969. * Check if DMA completed -- msdu_done is the last bit
  970. * to be written
  971. */
  972. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  973. QDF_TRACE(QDF_MODULE_ID_DP,
  974. QDF_TRACE_LEVEL_ERROR,
  975. FL("MSDU DONE failure"));
  976. DP_STATS_INC(vdev->pdev, dropped.msdu_not_done,
  977. 1);
  978. hal_rx_dump_pkt_tlvs(rx_tlv_hdr, QDF_TRACE_LEVEL_INFO);
  979. qdf_assert(0);
  980. }
  981. /*
  982. * The below condition happens when an MSDU is spread
  983. * across multiple buffers. This can happen in two cases
  984. * 1. The nbuf size is smaller then the received msdu.
  985. * ex: we have set the nbuf size to 2048 during
  986. * nbuf_alloc. but we received an msdu which is
  987. * 2304 bytes in size then this msdu is spread
  988. * across 2 nbufs.
  989. *
  990. * 2. AMSDUs when RAW mode is enabled.
  991. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  992. * across 1st nbuf and 2nd nbuf and last MSDU is
  993. * spread across 2nd nbuf and 3rd nbuf.
  994. *
  995. * for these scenarios let us create a skb frag_list and
  996. * append these buffers till the last MSDU of the AMSDU
  997. */
  998. if (qdf_unlikely(vdev->rx_decap_type ==
  999. htt_cmn_pkt_type_raw)) {
  1000. dp_rx_sg_create(nbuf, rx_tlv_hdr, &mpdu_len,
  1001. &is_first_frag, &frag_list_len,
  1002. &head_frag_nbuf,
  1003. &frag_list_head,
  1004. &frag_list_tail);
  1005. if (is_first_frag) {
  1006. nbuf = next;
  1007. continue;
  1008. } else {
  1009. frag_list_head = NULL;
  1010. frag_list_tail = NULL;
  1011. nbuf = head_frag_nbuf;
  1012. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1013. }
  1014. }
  1015. /*
  1016. * This is a redundant sanity check, Ideally peer
  1017. * should never be NULL here. if for any reason it
  1018. * is NULL we will assert.
  1019. * Do nothing for LFR case.
  1020. */
  1021. dp_rx_peer_validity_check(peer);
  1022. if (qdf_unlikely(peer && peer->bss_peer)) {
  1023. QDF_TRACE(QDF_MODULE_ID_DP,
  1024. QDF_TRACE_LEVEL_ERROR,
  1025. FL("received pkt with same src MAC"));
  1026. DP_STATS_INC(vdev->pdev, dropped.mec, 1);
  1027. /* Drop & free packet */
  1028. qdf_nbuf_free(nbuf);
  1029. /* Statistics */
  1030. nbuf = next;
  1031. continue;
  1032. }
  1033. pdev = vdev->pdev;
  1034. if (qdf_unlikely(peer && (peer->nawds_enabled == true) &&
  1035. (hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr)) &&
  1036. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) == false))) {
  1037. DP_STATS_INC_PKT(peer, rx.nawds_mcast_drop, 1,
  1038. qdf_nbuf_len(nbuf));
  1039. qdf_nbuf_free(nbuf);
  1040. nbuf = next;
  1041. continue;
  1042. }
  1043. if (qdf_likely(
  1044. !hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr)
  1045. &&
  1046. !hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr))) {
  1047. qdf_nbuf_rx_cksum_t cksum = {0};
  1048. cksum.l4_result =
  1049. QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1050. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1051. }
  1052. tid = hal_rx_mpdu_start_tid_get(rx_tlv_hdr);
  1053. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1054. "%s: %d, SGI: %d, tid: %d",
  1055. __func__, __LINE__, sgi, tid);
  1056. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1057. reception_type = hal_rx_msdu_start_reception_type_get(
  1058. rx_tlv_hdr);
  1059. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  1060. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1061. DP_STATS_INC(vdev->pdev,
  1062. rx.reception_type[reception_type], 1);
  1063. DP_STATS_INCC(vdev->pdev, rx.nss[nss], 1,
  1064. ((reception_type == REPT_MU_MIMO) ||
  1065. (reception_type == REPT_MU_OFDMA_MIMO))
  1066. );
  1067. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1068. hal_rx_mpdu_end_mic_err_get(
  1069. rx_tlv_hdr));
  1070. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1071. hal_rx_mpdu_end_decrypt_err_get(
  1072. rx_tlv_hdr));
  1073. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)],
  1074. 1);
  1075. DP_STATS_INC(peer, rx.reception_type[reception_type],
  1076. 1);
  1077. if (soc->process_rx_status) {
  1078. ampdu_flag = (mpdu_desc_info.mpdu_flags &
  1079. HAL_MPDU_F_AMPDU_FLAG);
  1080. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1081. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1082. DP_STATS_INC(peer, rx.bw[bw], 1);
  1083. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1084. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, ampdu_flag);
  1085. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(ampdu_flag));
  1086. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1087. mcs_count[MAX_MCS], 1,
  1088. ((mcs >= MAX_MCS_11A) &&
  1089. (pkt_type == DOT11_A)));
  1090. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1091. mcs_count[mcs], 1,
  1092. ((mcs < MAX_MCS_11A) &&
  1093. (pkt_type == DOT11_A)));
  1094. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1095. mcs_count[MAX_MCS], 1,
  1096. ((mcs >= MAX_MCS_11B) &&
  1097. (pkt_type == DOT11_B)));
  1098. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1099. mcs_count[mcs], 1,
  1100. ((mcs < MAX_MCS_11B) &&
  1101. (pkt_type == DOT11_B)));
  1102. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1103. mcs_count[MAX_MCS], 1,
  1104. ((mcs >= MAX_MCS_11A) &&
  1105. (pkt_type == DOT11_N)));
  1106. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1107. mcs_count[mcs], 1,
  1108. ((mcs < MAX_MCS_11A) &&
  1109. (pkt_type == DOT11_N)));
  1110. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1111. mcs_count[MAX_MCS], 1,
  1112. ((mcs >= MAX_MCS_11AC) &&
  1113. (pkt_type == DOT11_AC)));
  1114. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1115. mcs_count[mcs], 1,
  1116. ((mcs < MAX_MCS_11AC) &&
  1117. (pkt_type == DOT11_AC)));
  1118. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1119. mcs_count[MAX_MCS], 1,
  1120. ((mcs >= (MAX_MCS - 1)) &&
  1121. (pkt_type == DOT11_AX)));
  1122. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1123. mcs_count[mcs], 1,
  1124. ((mcs < (MAX_MCS - 1)) &&
  1125. (pkt_type == DOT11_AX)));
  1126. }
  1127. /*
  1128. * HW structures call this L3 header padding --
  1129. * even though this is actually the offset from
  1130. * the buffer beginning where the L2 header
  1131. * begins.
  1132. */
  1133. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1134. FL("rxhash: flow id toeplitz: 0x%x\n"),
  1135. hal_rx_msdu_start_toeplitz_get(rx_tlv_hdr));
  1136. l2_hdr_offset =
  1137. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1138. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1139. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1140. if (unlikely(qdf_nbuf_get_ext_list(nbuf)))
  1141. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1142. else {
  1143. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1144. qdf_nbuf_pull_head(nbuf,
  1145. RX_PKT_TLVS_LEN +
  1146. l2_hdr_offset);
  1147. }
  1148. if (qdf_unlikely(vdev->mesh_vdev)) {
  1149. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  1150. rx_tlv_hdr)
  1151. == QDF_STATUS_SUCCESS) {
  1152. QDF_TRACE(QDF_MODULE_ID_DP,
  1153. QDF_TRACE_LEVEL_INFO_MED,
  1154. FL("mesh pkt filtered"));
  1155. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1156. 1);
  1157. qdf_nbuf_free(nbuf);
  1158. nbuf = next;
  1159. continue;
  1160. }
  1161. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1162. }
  1163. #ifdef QCA_WIFI_NAPIER_EMULATION_DBG /* Debug code, remove later */
  1164. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1165. "p_id %d msdu_len %d hdr_off %d",
  1166. peer_id, msdu_len, l2_hdr_offset);
  1167. print_hex_dump(KERN_ERR,
  1168. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  1169. qdf_nbuf_data(nbuf), 128, false);
  1170. #endif /* NAPIER_EMULATION */
  1171. if (qdf_likely(vdev->rx_decap_type ==
  1172. htt_cmn_pkt_type_ethernet) &&
  1173. (qdf_likely(!vdev->mesh_vdev))) {
  1174. /* WDS Source Port Learning */
  1175. dp_rx_wds_srcport_learn(soc,
  1176. rx_tlv_hdr,
  1177. peer,
  1178. nbuf);
  1179. /* Intrabss-fwd */
  1180. if (dp_rx_check_ap_bridge(vdev))
  1181. if (dp_rx_intrabss_fwd(soc,
  1182. peer,
  1183. rx_tlv_hdr,
  1184. nbuf)) {
  1185. nbuf = next;
  1186. continue; /* Get next desc */
  1187. }
  1188. }
  1189. rx_bufs_used++;
  1190. dp_rx_lro(rx_tlv_hdr, peer, nbuf, int_ctx->lro_ctx);
  1191. DP_RX_LIST_APPEND(deliver_list_head,
  1192. deliver_list_tail,
  1193. nbuf);
  1194. DP_STATS_INCC_PKT(peer, rx.multicast, 1, pkt_len,
  1195. hal_rx_msdu_end_da_is_mcbc_get(
  1196. rx_tlv_hdr));
  1197. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1198. pkt_len);
  1199. if ((pdev->enhanced_stats_en) && likely(peer) &&
  1200. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1201. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  1202. soc->cdp_soc.ol_ops->update_dp_stats(
  1203. vdev->pdev->osif_pdev,
  1204. &peer->stats,
  1205. peer_id,
  1206. UPDATE_PEER_STATS);
  1207. dp_aggregate_vdev_stats(peer->vdev);
  1208. soc->cdp_soc.ol_ops->update_dp_stats(
  1209. vdev->pdev->osif_pdev,
  1210. &peer->vdev->stats,
  1211. peer->vdev->vdev_id,
  1212. UPDATE_VDEV_STATS);
  1213. }
  1214. }
  1215. nbuf = next;
  1216. }
  1217. if (deliver_list_head)
  1218. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head);
  1219. return rx_bufs_used; /* Assume no scale factor for now */
  1220. }
  1221. /**
  1222. * dp_rx_detach() - detach dp rx
  1223. * @pdev: core txrx pdev context
  1224. *
  1225. * This function will detach DP RX into main device context
  1226. * will free DP Rx resources.
  1227. *
  1228. * Return: void
  1229. */
  1230. void
  1231. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1232. {
  1233. uint8_t pdev_id = pdev->pdev_id;
  1234. struct dp_soc *soc = pdev->soc;
  1235. struct rx_desc_pool *rx_desc_pool;
  1236. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1237. if (rx_desc_pool->pool_size != 0) {
  1238. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  1239. qdf_spinlock_destroy(&soc->rx_desc_mutex[pdev_id]);
  1240. }
  1241. return;
  1242. }
  1243. /**
  1244. * dp_rx_attach() - attach DP RX
  1245. * @pdev: core txrx pdev context
  1246. *
  1247. * This function will attach a DP RX instance into the main
  1248. * device (SOC) context. Will allocate dp rx resource and
  1249. * initialize resources.
  1250. *
  1251. * Return: QDF_STATUS_SUCCESS: success
  1252. * QDF_STATUS_E_RESOURCES: Error return
  1253. */
  1254. QDF_STATUS
  1255. dp_rx_pdev_attach(struct dp_pdev *pdev)
  1256. {
  1257. uint8_t pdev_id = pdev->pdev_id;
  1258. struct dp_soc *soc = pdev->soc;
  1259. struct dp_srng rxdma_srng;
  1260. uint32_t rxdma_entries;
  1261. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1262. union dp_rx_desc_list_elem_t *tail = NULL;
  1263. struct dp_srng *dp_rxdma_srng;
  1264. struct rx_desc_pool *rx_desc_pool;
  1265. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  1266. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1267. "nss-wifi<4> skip Rx refil %d", pdev_id);
  1268. return QDF_STATUS_SUCCESS;
  1269. }
  1270. qdf_spinlock_create(&soc->rx_desc_mutex[pdev_id]);
  1271. pdev = soc->pdev_list[pdev_id];
  1272. rxdma_srng = pdev->rx_refill_buf_ring;
  1273. soc->process_rx_status = 0;
  1274. rxdma_entries = rxdma_srng.alloc_size/hal_srng_get_entrysize(
  1275. soc->hal_soc, RXDMA_BUF);
  1276. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1277. dp_rx_desc_pool_alloc(soc, pdev_id, rxdma_entries*3, rx_desc_pool);
  1278. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  1279. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1280. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng, rx_desc_pool,
  1281. 0, &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  1282. return QDF_STATUS_SUCCESS;
  1283. }