dp_rx.h 57 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _DP_RX_H
  20. #define _DP_RX_H
  21. #include "hal_rx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #include <qdf_tracepoint.h>
  25. #ifdef RXDMA_OPTIMIZATION
  26. #ifndef RX_DATA_BUFFER_ALIGNMENT
  27. #define RX_DATA_BUFFER_ALIGNMENT 128
  28. #endif
  29. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  30. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  31. #endif
  32. #else /* RXDMA_OPTIMIZATION */
  33. #define RX_DATA_BUFFER_ALIGNMENT 4
  34. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  35. #endif /* RXDMA_OPTIMIZATION */
  36. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  37. #define DP_WBM2SW_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW1_BM(sw0_bm_id)
  38. /* RBM value used for re-injecting defragmented packets into REO */
  39. #define DP_DEFRAG_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW3_BM(sw0_bm_id)
  40. #endif
  41. #define RX_BUFFER_RESERVATION 0
  42. #ifdef QCA_WIFI_QCN9224
  43. #define RX_MON_MIN_HEAD_ROOM 64
  44. #endif
  45. #define DP_DEFAULT_NOISEFLOOR (-96)
  46. #define DP_RX_DESC_MAGIC 0xdec0de
  47. #define dp_rx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX, params)
  48. #define dp_rx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX, params)
  49. #define dp_rx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX, params)
  50. #define dp_rx_info(params...) \
  51. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  52. #define dp_rx_info_rl(params...) \
  53. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  54. #define dp_rx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX, params)
  55. /**
  56. * enum dp_rx_desc_state
  57. *
  58. * @RX_DESC_REPLENISH: rx desc replenished
  59. * @RX_DESC_FREELIST: rx desc in freelist
  60. */
  61. enum dp_rx_desc_state {
  62. RX_DESC_REPLENISHED,
  63. RX_DESC_IN_FREELIST,
  64. };
  65. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  66. /**
  67. * struct dp_rx_desc_dbg_info
  68. *
  69. * @freelist_caller: name of the function that put the
  70. * the rx desc in freelist
  71. * @freelist_ts: timestamp when the rx desc is put in
  72. * a freelist
  73. * @replenish_caller: name of the function that last
  74. * replenished the rx desc
  75. * @replenish_ts: last replenish timestamp
  76. * @prev_nbuf: previous nbuf info
  77. * @prev_nbuf_data_addr: previous nbuf data address
  78. */
  79. struct dp_rx_desc_dbg_info {
  80. char freelist_caller[QDF_MEM_FUNC_NAME_SIZE];
  81. uint64_t freelist_ts;
  82. char replenish_caller[QDF_MEM_FUNC_NAME_SIZE];
  83. uint64_t replenish_ts;
  84. qdf_nbuf_t prev_nbuf;
  85. uint8_t *prev_nbuf_data_addr;
  86. };
  87. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  88. /**
  89. * struct dp_rx_desc
  90. *
  91. * @nbuf : VA of the "skb" posted
  92. * @rx_buf_start : VA of the original Rx buffer, before
  93. * movement of any skb->data pointer
  94. * @paddr_buf_start : PA of the original Rx buffer, before
  95. * movement of any frag pointer
  96. * @cookie : index into the sw array which holds
  97. * the sw Rx descriptors
  98. * Cookie space is 21 bits:
  99. * lower 18 bits -- index
  100. * upper 3 bits -- pool_id
  101. * @pool_id : pool Id for which this allocated.
  102. * Can only be used if there is no flow
  103. * steering
  104. * @in_use rx_desc is in use
  105. * @unmapped used to mark rx_desc an unmapped if the corresponding
  106. * nbuf is already unmapped
  107. * @in_err_state : Nbuf sanity failed for this descriptor.
  108. * @nbuf_data_addr : VA of nbuf data posted
  109. */
  110. struct dp_rx_desc {
  111. qdf_nbuf_t nbuf;
  112. uint8_t *rx_buf_start;
  113. qdf_dma_addr_t paddr_buf_start;
  114. uint32_t cookie;
  115. uint8_t pool_id;
  116. #ifdef RX_DESC_DEBUG_CHECK
  117. uint32_t magic;
  118. uint8_t *nbuf_data_addr;
  119. struct dp_rx_desc_dbg_info *dbg_info;
  120. #endif
  121. uint8_t in_use:1,
  122. unmapped:1,
  123. in_err_state:1;
  124. };
  125. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  126. #ifdef ATH_RX_PRI_SAVE
  127. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  128. (qdf_nbuf_set_priority(_nbuf, _tid))
  129. #else
  130. #define DP_RX_TID_SAVE(_nbuf, _tid)
  131. #endif
  132. /* RX Descriptor Multi Page memory alloc related */
  133. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  134. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  135. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  136. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  137. #define DP_RX_DESC_POOL_ID_SHIFT \
  138. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  139. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  140. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  141. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  142. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  143. DP_RX_DESC_PAGE_ID_SHIFT)
  144. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  145. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  146. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  147. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  148. DP_RX_DESC_POOL_ID_SHIFT)
  149. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  150. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  151. DP_RX_DESC_PAGE_ID_SHIFT)
  152. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  153. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  154. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  155. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  156. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  157. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  158. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  159. #define DP_RX_DESC_COOKIE_MAX \
  160. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  161. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  162. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  163. RX_DESC_COOKIE_POOL_ID_SHIFT)
  164. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  165. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  166. RX_DESC_COOKIE_INDEX_SHIFT)
  167. #define dp_rx_add_to_free_desc_list(head, tail, new) \
  168. __dp_rx_add_to_free_desc_list(head, tail, new, __func__)
  169. #define dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  170. num_buffers, desc_list, tail) \
  171. __dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  172. num_buffers, desc_list, tail, __func__)
  173. #ifdef DP_RX_SPECIAL_FRAME_NEED
  174. /**
  175. * dp_rx_is_special_frame() - check is RX frame special needed
  176. *
  177. * @nbuf: RX skb pointer
  178. * @frame_mask: the mask for speical frame needed
  179. *
  180. * Check is RX frame wanted matched with mask
  181. *
  182. * Return: true - special frame needed, false - no
  183. */
  184. static inline
  185. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  186. {
  187. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  188. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  189. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  190. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  191. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  192. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  193. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  194. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  195. return true;
  196. return false;
  197. }
  198. /**
  199. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  200. * if matches mask
  201. *
  202. * @soc: Datapath soc handler
  203. * @peer: pointer to DP peer
  204. * @nbuf: pointer to the skb of RX frame
  205. * @frame_mask: the mask for speical frame needed
  206. * @rx_tlv_hdr: start of rx tlv header
  207. *
  208. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  209. * single nbuf is expected.
  210. *
  211. * return: true - nbuf has been delivered to stack, false - not.
  212. */
  213. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  214. qdf_nbuf_t nbuf, uint32_t frame_mask,
  215. uint8_t *rx_tlv_hdr);
  216. #else
  217. static inline
  218. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  219. {
  220. return false;
  221. }
  222. static inline
  223. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  224. qdf_nbuf_t nbuf, uint32_t frame_mask,
  225. uint8_t *rx_tlv_hdr)
  226. {
  227. return false;
  228. }
  229. #endif
  230. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  231. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  232. static inline
  233. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  234. {
  235. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  236. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  237. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  238. return false;
  239. }
  240. return true;
  241. }
  242. #else
  243. static inline
  244. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  245. {
  246. return true;
  247. }
  248. #endif
  249. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  250. /* DOC: Offset to obtain LLC hdr
  251. *
  252. * In the case of Wifi parse error
  253. * to reach LLC header from beginning
  254. * of VLAN tag we need to skip 8 bytes.
  255. * Vlan_tag(4)+length(2)+length added
  256. * by HW(2) = 8 bytes.
  257. */
  258. #define DP_SKIP_VLAN 8
  259. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  260. /**
  261. * struct dp_rx_cached_buf - rx cached buffer
  262. * @list: linked list node
  263. * @buf: skb buffer
  264. */
  265. struct dp_rx_cached_buf {
  266. qdf_list_node_t node;
  267. qdf_nbuf_t buf;
  268. };
  269. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  270. /*
  271. *dp_rx_xor_block() - xor block of data
  272. *@b: destination data block
  273. *@a: source data block
  274. *@len: length of the data to process
  275. *
  276. *Returns: None
  277. */
  278. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  279. {
  280. qdf_size_t i;
  281. for (i = 0; i < len; i++)
  282. b[i] ^= a[i];
  283. }
  284. /*
  285. *dp_rx_rotl() - rotate the bits left
  286. *@val: unsigned integer input value
  287. *@bits: number of bits
  288. *
  289. *Returns: Integer with left rotated by number of 'bits'
  290. */
  291. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  292. {
  293. return (val << bits) | (val >> (32 - bits));
  294. }
  295. /*
  296. *dp_rx_rotr() - rotate the bits right
  297. *@val: unsigned integer input value
  298. *@bits: number of bits
  299. *
  300. *Returns: Integer with right rotated by number of 'bits'
  301. */
  302. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  303. {
  304. return (val >> bits) | (val << (32 - bits));
  305. }
  306. /*
  307. * dp_set_rx_queue() - set queue_mapping in skb
  308. * @nbuf: skb
  309. * @queue_id: rx queue_id
  310. *
  311. * Return: void
  312. */
  313. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  314. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  315. {
  316. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  317. return;
  318. }
  319. #else
  320. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  321. {
  322. }
  323. #endif
  324. /*
  325. *dp_rx_xswap() - swap the bits left
  326. *@val: unsigned integer input value
  327. *
  328. *Returns: Integer with bits swapped
  329. */
  330. static inline uint32_t dp_rx_xswap(uint32_t val)
  331. {
  332. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  333. }
  334. /*
  335. *dp_rx_get_le32_split() - get little endian 32 bits split
  336. *@b0: byte 0
  337. *@b1: byte 1
  338. *@b2: byte 2
  339. *@b3: byte 3
  340. *
  341. *Returns: Integer with split little endian 32 bits
  342. */
  343. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  344. uint8_t b3)
  345. {
  346. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  347. }
  348. /*
  349. *dp_rx_get_le32() - get little endian 32 bits
  350. *@b0: byte 0
  351. *@b1: byte 1
  352. *@b2: byte 2
  353. *@b3: byte 3
  354. *
  355. *Returns: Integer with little endian 32 bits
  356. */
  357. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  358. {
  359. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  360. }
  361. /*
  362. * dp_rx_put_le32() - put little endian 32 bits
  363. * @p: destination char array
  364. * @v: source 32-bit integer
  365. *
  366. * Returns: None
  367. */
  368. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  369. {
  370. p[0] = (v) & 0xff;
  371. p[1] = (v >> 8) & 0xff;
  372. p[2] = (v >> 16) & 0xff;
  373. p[3] = (v >> 24) & 0xff;
  374. }
  375. /* Extract michal mic block of data */
  376. #define dp_rx_michael_block(l, r) \
  377. do { \
  378. r ^= dp_rx_rotl(l, 17); \
  379. l += r; \
  380. r ^= dp_rx_xswap(l); \
  381. l += r; \
  382. r ^= dp_rx_rotl(l, 3); \
  383. l += r; \
  384. r ^= dp_rx_rotr(l, 2); \
  385. l += r; \
  386. } while (0)
  387. /**
  388. * struct dp_rx_desc_list_elem_t
  389. *
  390. * @next : Next pointer to form free list
  391. * @rx_desc : DP Rx descriptor
  392. */
  393. union dp_rx_desc_list_elem_t {
  394. union dp_rx_desc_list_elem_t *next;
  395. struct dp_rx_desc rx_desc;
  396. };
  397. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  398. /**
  399. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  400. * @page_id: Page ID
  401. * @offset: Offset of the descriptor element
  402. *
  403. * Return: RX descriptor element
  404. */
  405. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  406. struct rx_desc_pool *rx_pool);
  407. static inline
  408. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  409. struct rx_desc_pool *pool,
  410. uint32_t cookie)
  411. {
  412. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  413. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  414. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  415. struct rx_desc_pool *rx_desc_pool;
  416. union dp_rx_desc_list_elem_t *rx_desc_elem;
  417. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  418. return NULL;
  419. rx_desc_pool = &pool[pool_id];
  420. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  421. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  422. rx_desc_pool->elem_size * offset);
  423. return &rx_desc_elem->rx_desc;
  424. }
  425. /**
  426. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  427. * the Rx descriptor on Rx DMA source ring buffer
  428. * @soc: core txrx main context
  429. * @cookie: cookie used to lookup virtual address
  430. *
  431. * Return: Pointer to the Rx descriptor
  432. */
  433. static inline
  434. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  435. uint32_t cookie)
  436. {
  437. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  438. }
  439. /**
  440. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  441. * the Rx descriptor on monitor ring buffer
  442. * @soc: core txrx main context
  443. * @cookie: cookie used to lookup virtual address
  444. *
  445. * Return: Pointer to the Rx descriptor
  446. */
  447. static inline
  448. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  449. uint32_t cookie)
  450. {
  451. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  452. }
  453. /**
  454. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  455. * the Rx descriptor on monitor status ring buffer
  456. * @soc: core txrx main context
  457. * @cookie: cookie used to lookup virtual address
  458. *
  459. * Return: Pointer to the Rx descriptor
  460. */
  461. static inline
  462. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  463. uint32_t cookie)
  464. {
  465. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  466. }
  467. #else
  468. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  469. uint32_t pool_size,
  470. struct rx_desc_pool *rx_desc_pool);
  471. /**
  472. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  473. * the Rx descriptor on Rx DMA source ring buffer
  474. * @soc: core txrx main context
  475. * @cookie: cookie used to lookup virtual address
  476. *
  477. * Return: void *: Virtual Address of the Rx descriptor
  478. */
  479. static inline
  480. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  481. {
  482. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  483. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  484. struct rx_desc_pool *rx_desc_pool;
  485. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  486. return NULL;
  487. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  488. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  489. return NULL;
  490. return &rx_desc_pool->array[index].rx_desc;
  491. }
  492. /**
  493. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  494. * the Rx descriptor on monitor ring buffer
  495. * @soc: core txrx main context
  496. * @cookie: cookie used to lookup virtual address
  497. *
  498. * Return: void *: Virtual Address of the Rx descriptor
  499. */
  500. static inline
  501. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  502. {
  503. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  504. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  505. /* TODO */
  506. /* Add sanity for pool_id & index */
  507. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  508. }
  509. /**
  510. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  511. * the Rx descriptor on monitor status ring buffer
  512. * @soc: core txrx main context
  513. * @cookie: cookie used to lookup virtual address
  514. *
  515. * Return: void *: Virtual Address of the Rx descriptor
  516. */
  517. static inline
  518. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  519. {
  520. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  521. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  522. /* TODO */
  523. /* Add sanity for pool_id & index */
  524. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  525. }
  526. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  527. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  528. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  529. {
  530. return vdev->ap_bridge_enabled;
  531. }
  532. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  533. static inline QDF_STATUS
  534. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  535. {
  536. if (qdf_unlikely(HAL_RX_REO_BUF_COOKIE_INVALID_GET(ring_desc)))
  537. return QDF_STATUS_E_FAILURE;
  538. HAL_RX_REO_BUF_COOKIE_INVALID_SET(ring_desc);
  539. return QDF_STATUS_SUCCESS;
  540. }
  541. /**
  542. * dp_rx_cookie_reset_invalid_bit() - Reset the invalid bit of the cookie
  543. * field in ring descriptor
  544. * @ring_desc: ring descriptor
  545. *
  546. * Return: None
  547. */
  548. static inline void
  549. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  550. {
  551. HAL_RX_REO_BUF_COOKIE_INVALID_RESET(ring_desc);
  552. }
  553. #else
  554. static inline QDF_STATUS
  555. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  556. {
  557. return QDF_STATUS_SUCCESS;
  558. }
  559. static inline void
  560. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  561. {
  562. }
  563. #endif
  564. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  565. QDF_STATUS dp_rx_desc_pool_is_allocated(struct rx_desc_pool *rx_desc_pool);
  566. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  567. uint32_t pool_size,
  568. struct rx_desc_pool *rx_desc_pool);
  569. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  570. uint32_t pool_size,
  571. struct rx_desc_pool *rx_desc_pool);
  572. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  573. union dp_rx_desc_list_elem_t **local_desc_list,
  574. union dp_rx_desc_list_elem_t **tail,
  575. uint16_t pool_id,
  576. struct rx_desc_pool *rx_desc_pool);
  577. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  578. struct rx_desc_pool *rx_desc_pool,
  579. uint16_t num_descs,
  580. union dp_rx_desc_list_elem_t **desc_list,
  581. union dp_rx_desc_list_elem_t **tail);
  582. QDF_STATUS dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev);
  583. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev);
  584. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev);
  585. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev);
  586. void dp_rx_desc_pool_deinit(struct dp_soc *soc,
  587. struct rx_desc_pool *rx_desc_pool,
  588. uint32_t pool_id);
  589. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  590. QDF_STATUS dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev);
  591. void dp_rx_pdev_buffers_free(struct dp_pdev *pdev);
  592. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  593. void dp_print_napi_stats(struct dp_soc *soc);
  594. /**
  595. * dp_rx_vdev_detach() - detach vdev from dp rx
  596. * @vdev: virtual device instance
  597. *
  598. * Return: QDF_STATUS_SUCCESS: success
  599. * QDF_STATUS_E_RESOURCES: Error return
  600. */
  601. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  602. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  603. uint32_t
  604. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  605. uint8_t reo_ring_num,
  606. uint32_t quota);
  607. /**
  608. * dp_rx_err_process() - Processes error frames routed to REO error ring
  609. * @int_ctx: pointer to DP interrupt context
  610. * @soc: core txrx main context
  611. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  612. * @quota: No. of units (packets) that can be serviced in one shot.
  613. *
  614. * This function implements error processing and top level demultiplexer
  615. * for all the frames routed to REO error ring.
  616. *
  617. * Return: uint32_t: No. of elements processed
  618. */
  619. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  620. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  621. /**
  622. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  623. * @int_ctx: pointer to DP interrupt context
  624. * @soc: core txrx main context
  625. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  626. * @quota: No. of units (packets) that can be serviced in one shot.
  627. *
  628. * This function implements error processing and top level demultiplexer
  629. * for all the frames routed to WBM2HOST sw release ring.
  630. *
  631. * Return: uint32_t: No. of elements processed
  632. */
  633. uint32_t
  634. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  635. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  636. /**
  637. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  638. * multiple nbufs.
  639. * @soc: core txrx main context
  640. * @nbuf: pointer to the first msdu of an amsdu.
  641. *
  642. * This function implements the creation of RX frag_list for cases
  643. * where an MSDU is spread across multiple nbufs.
  644. *
  645. * Return: returns the head nbuf which contains complete frag_list.
  646. */
  647. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf);
  648. /*
  649. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  650. * de-initialization of wifi module.
  651. *
  652. * @soc: core txrx main context
  653. * @pool_id: pool_id which is one of 3 mac_ids
  654. * @rx_desc_pool: rx descriptor pool pointer
  655. *
  656. * Return: None
  657. */
  658. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  659. struct rx_desc_pool *rx_desc_pool);
  660. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  661. /*
  662. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  663. * de-initialization of wifi module.
  664. *
  665. * @soc: core txrx main context
  666. * @pool_id: pool_id which is one of 3 mac_ids
  667. * @rx_desc_pool: rx descriptor pool pointer
  668. *
  669. * Return: None
  670. */
  671. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  672. struct rx_desc_pool *rx_desc_pool);
  673. #ifdef DP_RX_MON_MEM_FRAG
  674. /*
  675. * dp_rx_desc_frag_free() - free the sw rx desc frag called during
  676. * de-initialization of wifi module.
  677. *
  678. * @soc: core txrx main context
  679. * @rx_desc_pool: rx descriptor pool pointer
  680. *
  681. * Return: None
  682. */
  683. void dp_rx_desc_frag_free(struct dp_soc *soc,
  684. struct rx_desc_pool *rx_desc_pool);
  685. #else
  686. static inline
  687. void dp_rx_desc_frag_free(struct dp_soc *soc,
  688. struct rx_desc_pool *rx_desc_pool)
  689. {
  690. }
  691. #endif
  692. /*
  693. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  694. * de-initialization of wifi module.
  695. *
  696. * @soc: core txrx main context
  697. * @rx_desc_pool: rx descriptor pool pointer
  698. *
  699. * Return: None
  700. */
  701. void dp_rx_desc_pool_free(struct dp_soc *soc,
  702. struct rx_desc_pool *rx_desc_pool);
  703. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  704. struct dp_peer *peer);
  705. #ifdef RX_DESC_LOGGING
  706. /*
  707. * dp_rx_desc_alloc_dbg_info() - Alloc memory for rx descriptor debug
  708. * structure
  709. * @rx_desc: rx descriptor pointer
  710. *
  711. * Return: None
  712. */
  713. static inline
  714. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  715. {
  716. rx_desc->dbg_info = qdf_mem_malloc(sizeof(struct dp_rx_desc_dbg_info));
  717. }
  718. /*
  719. * dp_rx_desc_free_dbg_info() - Free rx descriptor debug
  720. * structure memory
  721. * @rx_desc: rx descriptor pointer
  722. *
  723. * Return: None
  724. */
  725. static inline
  726. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  727. {
  728. qdf_mem_free(rx_desc->dbg_info);
  729. }
  730. /*
  731. * dp_rx_desc_update_dbg_info() - Update rx descriptor debug info
  732. * structure memory
  733. * @rx_desc: rx descriptor pointer
  734. *
  735. * Return: None
  736. */
  737. static
  738. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  739. const char *func_name, uint8_t flag)
  740. {
  741. struct dp_rx_desc_dbg_info *info = rx_desc->dbg_info;
  742. if (!info)
  743. return;
  744. if (flag == RX_DESC_REPLENISHED) {
  745. qdf_str_lcopy(info->replenish_caller, func_name,
  746. QDF_MEM_FUNC_NAME_SIZE);
  747. info->replenish_ts = qdf_get_log_timestamp();
  748. } else {
  749. qdf_str_lcopy(info->freelist_caller, func_name,
  750. QDF_MEM_FUNC_NAME_SIZE);
  751. info->freelist_ts = qdf_get_log_timestamp();
  752. info->prev_nbuf = rx_desc->nbuf;
  753. info->prev_nbuf_data_addr = rx_desc->nbuf_data_addr;
  754. rx_desc->nbuf_data_addr = NULL;
  755. }
  756. }
  757. #else
  758. static inline
  759. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  760. {
  761. }
  762. static inline
  763. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  764. {
  765. }
  766. static inline
  767. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  768. const char *func_name, uint8_t flag)
  769. {
  770. }
  771. #endif /* RX_DESC_LOGGING */
  772. /**
  773. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  774. *
  775. * @head: pointer to the head of local free list
  776. * @tail: pointer to the tail of local free list
  777. * @new: new descriptor that is added to the free list
  778. * @func_name: caller func name
  779. *
  780. * Return: void:
  781. */
  782. static inline
  783. void __dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  784. union dp_rx_desc_list_elem_t **tail,
  785. struct dp_rx_desc *new, const char *func_name)
  786. {
  787. qdf_assert(head && new);
  788. dp_rx_desc_update_dbg_info(new, func_name, RX_DESC_IN_FREELIST);
  789. new->nbuf = NULL;
  790. new->in_use = 0;
  791. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  792. *head = (union dp_rx_desc_list_elem_t *)new;
  793. /* reset tail if head->next is NULL */
  794. if (!*tail || !(*head)->next)
  795. *tail = *head;
  796. }
  797. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  798. uint8_t mac_id);
  799. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  800. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  801. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  802. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  803. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  804. uint16_t peer_id, uint8_t tid);
  805. #define DP_RX_HEAD_APPEND(head, elem) \
  806. do { \
  807. qdf_nbuf_set_next((elem), (head)); \
  808. (head) = (elem); \
  809. } while (0)
  810. #define DP_RX_LIST_APPEND(head, tail, elem) \
  811. do { \
  812. if (!(head)) { \
  813. (head) = (elem); \
  814. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  815. } else { \
  816. qdf_nbuf_set_next((tail), (elem)); \
  817. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  818. } \
  819. (tail) = (elem); \
  820. qdf_nbuf_set_next((tail), NULL); \
  821. } while (0)
  822. #define DP_RX_MERGE_TWO_LIST(phead, ptail, chead, ctail) \
  823. do { \
  824. if (!(phead)) { \
  825. (phead) = (chead); \
  826. } else { \
  827. qdf_nbuf_set_next((ptail), (chead)); \
  828. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(phead) += \
  829. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(chead); \
  830. } \
  831. (ptail) = (ctail); \
  832. qdf_nbuf_set_next((ptail), NULL); \
  833. } while (0)
  834. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM)
  835. /*
  836. * on some third-party platform, the memory below 0x2000
  837. * is reserved for target use, so any memory allocated in this
  838. * region should not be used by host
  839. */
  840. #define MAX_RETRY 50
  841. #define DP_PHY_ADDR_RESERVED 0x2000
  842. #elif defined(BUILD_X86)
  843. /*
  844. * in M2M emulation platforms (x86) the memory below 0x50000000
  845. * is reserved for target use, so any memory allocated in this
  846. * region should not be used by host
  847. */
  848. #define MAX_RETRY 100
  849. #define DP_PHY_ADDR_RESERVED 0x50000000
  850. #endif
  851. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM) || defined(BUILD_X86)
  852. /**
  853. * dp_check_paddr() - check if current phy address is valid or not
  854. * @dp_soc: core txrx main context
  855. * @rx_netbuf: skb buffer
  856. * @paddr: physical address
  857. * @rx_desc_pool: struct of rx descriptor pool
  858. * check if the physical address of the nbuf->data is less
  859. * than DP_PHY_ADDR_RESERVED then free the nbuf and try
  860. * allocating new nbuf. We can try for 100 times.
  861. *
  862. * This is a temp WAR till we fix it properly.
  863. *
  864. * Return: success or failure.
  865. */
  866. static inline
  867. int dp_check_paddr(struct dp_soc *dp_soc,
  868. qdf_nbuf_t *rx_netbuf,
  869. qdf_dma_addr_t *paddr,
  870. struct rx_desc_pool *rx_desc_pool)
  871. {
  872. uint32_t nbuf_retry = 0;
  873. int32_t ret;
  874. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  875. return QDF_STATUS_SUCCESS;
  876. do {
  877. dp_debug("invalid phy addr 0x%llx, trying again",
  878. (uint64_t)(*paddr));
  879. nbuf_retry++;
  880. if ((*rx_netbuf)) {
  881. /* Not freeing buffer intentionally.
  882. * Observed that same buffer is getting
  883. * re-allocated resulting in longer load time
  884. * WMI init timeout.
  885. * This buffer is anyway not useful so skip it.
  886. *.Add such buffer to invalid list and free
  887. *.them when driver unload.
  888. **/
  889. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  890. *rx_netbuf,
  891. QDF_DMA_FROM_DEVICE,
  892. rx_desc_pool->buf_size);
  893. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  894. *rx_netbuf);
  895. }
  896. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  897. rx_desc_pool->buf_size,
  898. RX_BUFFER_RESERVATION,
  899. rx_desc_pool->buf_alignment,
  900. FALSE);
  901. if (qdf_unlikely(!(*rx_netbuf)))
  902. return QDF_STATUS_E_FAILURE;
  903. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  904. *rx_netbuf,
  905. QDF_DMA_FROM_DEVICE,
  906. rx_desc_pool->buf_size);
  907. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  908. qdf_nbuf_free(*rx_netbuf);
  909. *rx_netbuf = NULL;
  910. continue;
  911. }
  912. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  913. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  914. return QDF_STATUS_SUCCESS;
  915. } while (nbuf_retry < MAX_RETRY);
  916. if ((*rx_netbuf)) {
  917. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  918. *rx_netbuf,
  919. QDF_DMA_FROM_DEVICE,
  920. rx_desc_pool->buf_size);
  921. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  922. *rx_netbuf);
  923. }
  924. return QDF_STATUS_E_FAILURE;
  925. }
  926. #else
  927. static inline
  928. int dp_check_paddr(struct dp_soc *dp_soc,
  929. qdf_nbuf_t *rx_netbuf,
  930. qdf_dma_addr_t *paddr,
  931. struct rx_desc_pool *rx_desc_pool)
  932. {
  933. return QDF_STATUS_SUCCESS;
  934. }
  935. #endif
  936. /**
  937. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  938. * the MSDU Link Descriptor
  939. * @soc: core txrx main context
  940. * @buf_info: buf_info includes cookie that is used to lookup
  941. * virtual address of link descriptor after deriving the page id
  942. * and the offset or index of the desc on the associatde page.
  943. *
  944. * This is the VA of the link descriptor, that HAL layer later uses to
  945. * retrieve the list of MSDU's for a given MPDU.
  946. *
  947. * Return: void *: Virtual Address of the Rx descriptor
  948. */
  949. static inline
  950. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  951. struct hal_buf_info *buf_info)
  952. {
  953. void *link_desc_va;
  954. struct qdf_mem_multi_page_t *pages;
  955. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  956. pages = &soc->link_desc_pages;
  957. if (!pages)
  958. return NULL;
  959. if (qdf_unlikely(page_id >= pages->num_pages))
  960. return NULL;
  961. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  962. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  963. return link_desc_va;
  964. }
  965. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  966. #ifdef DISABLE_EAPOL_INTRABSS_FWD
  967. #ifdef WLAN_FEATURE_11BE_MLO
  968. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  969. qdf_nbuf_t nbuf)
  970. {
  971. struct qdf_mac_addr *self_mld_mac_addr =
  972. (struct qdf_mac_addr *)vdev->mld_mac_addr.raw;
  973. return qdf_is_macaddr_equal(self_mld_mac_addr,
  974. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  975. QDF_NBUF_DEST_MAC_OFFSET);
  976. }
  977. #else
  978. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  979. qdf_nbuf_t nbuf)
  980. {
  981. return false;
  982. }
  983. #endif
  984. static inline bool dp_nbuf_dst_addr_is_self_addr(struct dp_vdev *vdev,
  985. qdf_nbuf_t nbuf)
  986. {
  987. return qdf_is_macaddr_equal((struct qdf_mac_addr *)vdev->mac_addr.raw,
  988. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  989. QDF_NBUF_DEST_MAC_OFFSET);
  990. }
  991. /*
  992. * dp_rx_intrabss_eapol_drop_check() - API For EAPOL
  993. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  994. * @soc: core txrx main context
  995. * @ta_peer: source peer entry
  996. * @rx_tlv_hdr: start address of rx tlvs
  997. * @nbuf: nbuf that has to be intrabss forwarded
  998. *
  999. * Return: true if it is forwarded else false
  1000. */
  1001. static inline
  1002. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1003. struct dp_peer *ta_peer,
  1004. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1005. {
  1006. if (qdf_unlikely(qdf_nbuf_is_ipv4_eapol_pkt(nbuf) &&
  1007. !(dp_nbuf_dst_addr_is_self_addr(ta_peer->vdev, nbuf) ||
  1008. dp_nbuf_dst_addr_is_mld_addr(ta_peer->vdev, nbuf)))) {
  1009. qdf_nbuf_free(nbuf);
  1010. DP_STATS_INC(soc, rx.err.intrabss_eapol_drop, 1);
  1011. return true;
  1012. }
  1013. return false;
  1014. }
  1015. #else /* DISABLE_EAPOL_INTRABSS_FWD */
  1016. static inline
  1017. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1018. struct dp_peer *ta_peer,
  1019. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1020. {
  1021. return false;
  1022. }
  1023. #endif /* DISABLE_EAPOL_INTRABSS_FWD */
  1024. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_peer *ta_peer,
  1025. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1026. struct cdp_tid_rx_stats *tid_stats);
  1027. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_peer *ta_peer,
  1028. uint8_t tx_vdev_id,
  1029. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1030. struct cdp_tid_rx_stats *tid_stats);
  1031. /**
  1032. * dp_rx_defrag_concat() - Concatenate the fragments
  1033. *
  1034. * @dst: destination pointer to the buffer
  1035. * @src: source pointer from where the fragment payload is to be copied
  1036. *
  1037. * Return: QDF_STATUS
  1038. */
  1039. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  1040. {
  1041. /*
  1042. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  1043. * to provide space for src, the headroom portion is copied from
  1044. * the original dst buffer to the larger new dst buffer.
  1045. * (This is needed, because the headroom of the dst buffer
  1046. * contains the rx desc.)
  1047. */
  1048. if (!qdf_nbuf_cat(dst, src)) {
  1049. /*
  1050. * qdf_nbuf_cat does not free the src memory.
  1051. * Free src nbuf before returning
  1052. * For failure case the caller takes of freeing the nbuf
  1053. */
  1054. qdf_nbuf_free(src);
  1055. return QDF_STATUS_SUCCESS;
  1056. }
  1057. return QDF_STATUS_E_DEFRAG_ERROR;
  1058. }
  1059. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1060. #ifndef FEATURE_WDS
  1061. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  1062. struct dp_peer *ta_peer, qdf_nbuf_t nbuf);
  1063. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  1064. {
  1065. return QDF_STATUS_SUCCESS;
  1066. }
  1067. static inline void
  1068. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  1069. uint8_t *rx_tlv_hdr,
  1070. struct dp_peer *ta_peer,
  1071. qdf_nbuf_t nbuf,
  1072. struct hal_rx_msdu_metadata msdu_metadata)
  1073. {
  1074. }
  1075. #endif
  1076. /*
  1077. * dp_rx_desc_dump() - dump the sw rx descriptor
  1078. *
  1079. * @rx_desc: sw rx descriptor
  1080. */
  1081. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  1082. {
  1083. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  1084. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  1085. rx_desc->in_use, rx_desc->unmapped);
  1086. }
  1087. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1088. /*
  1089. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  1090. * In qwrap mode, packets originated from
  1091. * any vdev should not loopback and
  1092. * should be dropped.
  1093. * @vdev: vdev on which rx packet is received
  1094. * @nbuf: rx pkt
  1095. *
  1096. */
  1097. #if ATH_SUPPORT_WRAP
  1098. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1099. qdf_nbuf_t nbuf)
  1100. {
  1101. struct dp_vdev *psta_vdev;
  1102. struct dp_pdev *pdev = vdev->pdev;
  1103. uint8_t *data = qdf_nbuf_data(nbuf);
  1104. if (qdf_unlikely(vdev->proxysta_vdev)) {
  1105. /* In qwrap isolation mode, allow loopback packets as all
  1106. * packets go to RootAP and Loopback on the mpsta.
  1107. */
  1108. if (vdev->isolation_vdev)
  1109. return false;
  1110. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  1111. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  1112. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  1113. &data[QDF_MAC_ADDR_SIZE],
  1114. QDF_MAC_ADDR_SIZE))) {
  1115. /* Drop packet if source address is equal to
  1116. * any of the vdev addresses.
  1117. */
  1118. return true;
  1119. }
  1120. }
  1121. }
  1122. return false;
  1123. }
  1124. #else
  1125. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1126. qdf_nbuf_t nbuf)
  1127. {
  1128. return false;
  1129. }
  1130. #endif
  1131. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1132. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  1133. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  1134. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1135. #include "dp_rx_tag.h"
  1136. #endif
  1137. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  1138. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1139. /**
  1140. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  1141. * and set the corresponding tag in QDF packet
  1142. * @soc: core txrx main context
  1143. * @vdev: vdev on which the packet is received
  1144. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1145. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1146. * @ring_index: REO ring number, not used for error & monitor ring
  1147. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  1148. * @is_update_stats: flag to indicate whether to update stats or not
  1149. * Return: void
  1150. */
  1151. static inline void
  1152. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1153. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1154. uint16_t ring_index,
  1155. bool is_reo_exception, bool is_update_stats)
  1156. {
  1157. }
  1158. #endif
  1159. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1160. /**
  1161. * dp_rx_err_cce_drop() - Reads CCE metadata from the RX MSDU end TLV
  1162. * and returns whether cce metadata matches
  1163. * @soc: core txrx main context
  1164. * @vdev: vdev on which the packet is received
  1165. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1166. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1167. * Return: bool
  1168. */
  1169. static inline bool
  1170. dp_rx_err_cce_drop(struct dp_soc *soc, struct dp_vdev *vdev,
  1171. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  1172. {
  1173. return false;
  1174. }
  1175. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1176. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  1177. /**
  1178. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  1179. * and set the corresponding tag in QDF packet
  1180. * @soc: core txrx main context
  1181. * @vdev: vdev on which the packet is received
  1182. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1183. * @rx_tlv_hdr: base address where the RX TLVs starts
  1184. * @is_update_stats: flag to indicate whether to update stats or not
  1185. *
  1186. * Return: void
  1187. */
  1188. static inline void
  1189. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1190. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  1191. {
  1192. }
  1193. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  1194. /*
  1195. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  1196. * called during dp rx initialization
  1197. * and at the end of dp_rx_process.
  1198. *
  1199. * @soc: core txrx main context
  1200. * @mac_id: mac_id which is one of 3 mac_ids
  1201. * @dp_rxdma_srng: dp rxdma circular ring
  1202. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1203. * @num_req_buffers: number of buffer to be replenished
  1204. * @desc_list: list of descs if called from dp_rx_process
  1205. * or NULL during dp rx initialization or out of buffer
  1206. * interrupt.
  1207. * @tail: tail of descs list
  1208. * @func_name: name of the caller function
  1209. * Return: return success or failure
  1210. */
  1211. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1212. struct dp_srng *dp_rxdma_srng,
  1213. struct rx_desc_pool *rx_desc_pool,
  1214. uint32_t num_req_buffers,
  1215. union dp_rx_desc_list_elem_t **desc_list,
  1216. union dp_rx_desc_list_elem_t **tail,
  1217. const char *func_name);
  1218. /*
  1219. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  1220. * called during dp rx initialization
  1221. *
  1222. * @soc: core txrx main context
  1223. * @mac_id: mac_id which is one of 3 mac_ids
  1224. * @dp_rxdma_srng: dp rxdma circular ring
  1225. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1226. * @num_req_buffers: number of buffer to be replenished
  1227. *
  1228. * Return: return success or failure
  1229. */
  1230. QDF_STATUS
  1231. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1232. struct dp_srng *dp_rxdma_srng,
  1233. struct rx_desc_pool *rx_desc_pool,
  1234. uint32_t num_req_buffers);
  1235. /**
  1236. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1237. * (WBM), following error handling
  1238. *
  1239. * @soc: core DP main context
  1240. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1241. * @buf_addr_info: void pointer to the buffer_addr_info
  1242. * @bm_action: put to idle_list or release to msdu_list
  1243. *
  1244. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1245. */
  1246. QDF_STATUS
  1247. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  1248. uint8_t bm_action);
  1249. /**
  1250. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1251. * (WBM) by address
  1252. *
  1253. * @soc: core DP main context
  1254. * @link_desc_addr: link descriptor addr
  1255. *
  1256. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1257. */
  1258. QDF_STATUS
  1259. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  1260. hal_buff_addrinfo_t link_desc_addr,
  1261. uint8_t bm_action);
  1262. /**
  1263. * dp_rxdma_err_process() - RxDMA error processing functionality
  1264. * @soc: core txrx main contex
  1265. * @mac_id: mac id which is one of 3 mac_ids
  1266. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1267. * @quota: No. of units (packets) that can be serviced in one shot.
  1268. *
  1269. * Return: num of buffers processed
  1270. */
  1271. uint32_t
  1272. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1273. uint32_t mac_id, uint32_t quota);
  1274. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1275. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  1276. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1277. uint8_t *rx_tlv_hdr);
  1278. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1279. struct dp_peer *peer);
  1280. /*
  1281. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  1282. *
  1283. * @soc: core txrx main context
  1284. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1285. * @ring_desc: opaque pointer to the RX ring descriptor
  1286. * @rx_desc: host rx descriptor
  1287. *
  1288. * Return: void
  1289. */
  1290. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  1291. hal_ring_handle_t hal_ring_hdl,
  1292. hal_ring_desc_t ring_desc,
  1293. struct dp_rx_desc *rx_desc);
  1294. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1295. #ifdef QCA_PEER_EXT_STATS
  1296. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1297. qdf_nbuf_t nbuf);
  1298. #endif /* QCA_PEER_EXT_STATS */
  1299. #ifdef RX_DESC_DEBUG_CHECK
  1300. /**
  1301. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1302. * @rx_desc: rx descriptor pointer
  1303. *
  1304. * Return: true, if magic is correct, else false.
  1305. */
  1306. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1307. {
  1308. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1309. return false;
  1310. rx_desc->magic = 0;
  1311. return true;
  1312. }
  1313. /**
  1314. * dp_rx_desc_prep() - prepare rx desc
  1315. * @rx_desc: rx descriptor pointer to be prepared
  1316. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1317. *
  1318. * Note: assumption is that we are associating a nbuf which is mapped
  1319. *
  1320. * Return: none
  1321. */
  1322. static inline
  1323. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1324. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1325. {
  1326. rx_desc->magic = DP_RX_DESC_MAGIC;
  1327. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1328. rx_desc->unmapped = 0;
  1329. rx_desc->nbuf_data_addr = (uint8_t *)qdf_nbuf_data(rx_desc->nbuf);
  1330. }
  1331. /**
  1332. * dp_rx_desc_frag_prep() - prepare rx desc
  1333. * @rx_desc: rx descriptor pointer to be prepared
  1334. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1335. *
  1336. * Note: assumption is that we frag address is mapped
  1337. *
  1338. * Return: none
  1339. */
  1340. #ifdef DP_RX_MON_MEM_FRAG
  1341. static inline
  1342. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1343. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1344. {
  1345. rx_desc->magic = DP_RX_DESC_MAGIC;
  1346. rx_desc->rx_buf_start =
  1347. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1348. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1349. rx_desc->unmapped = 0;
  1350. }
  1351. #else
  1352. static inline
  1353. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1354. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1355. {
  1356. }
  1357. #endif /* DP_RX_MON_MEM_FRAG */
  1358. /**
  1359. * dp_rx_desc_paddr_sanity_check() - paddr sanity for ring desc vs rx_desc
  1360. * @rx_desc: rx descriptor
  1361. * @ring_paddr: paddr obatined from the ring
  1362. *
  1363. * Returns: QDF_STATUS
  1364. */
  1365. static inline
  1366. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1367. uint64_t ring_paddr)
  1368. {
  1369. return (ring_paddr == qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1370. }
  1371. #else
  1372. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1373. {
  1374. return true;
  1375. }
  1376. static inline
  1377. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1378. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1379. {
  1380. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1381. rx_desc->unmapped = 0;
  1382. }
  1383. #ifdef DP_RX_MON_MEM_FRAG
  1384. static inline
  1385. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1386. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1387. {
  1388. rx_desc->rx_buf_start =
  1389. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1390. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1391. rx_desc->unmapped = 0;
  1392. }
  1393. #else
  1394. static inline
  1395. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1396. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1397. {
  1398. }
  1399. #endif /* DP_RX_MON_MEM_FRAG */
  1400. static inline
  1401. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1402. uint64_t ring_paddr)
  1403. {
  1404. return true;
  1405. }
  1406. #endif /* RX_DESC_DEBUG_CHECK */
  1407. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  1408. bool is_mon_dest_desc);
  1409. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1410. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1411. uint8_t err_code, uint8_t mac_id);
  1412. #ifndef QCA_MULTIPASS_SUPPORT
  1413. static inline
  1414. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf, uint8_t tid)
  1415. {
  1416. return false;
  1417. }
  1418. #else
  1419. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf,
  1420. uint8_t tid);
  1421. #endif
  1422. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1423. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1424. static inline
  1425. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1426. struct dp_peer *peer_handle,
  1427. bool value, uint8_t *mac_addr)
  1428. {
  1429. return QDF_STATUS_SUCCESS;
  1430. }
  1431. #endif
  1432. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1433. /**
  1434. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1435. * Caller to hold peer refcount and check for valid peer
  1436. * @soc: soc
  1437. * @vdev: vdev
  1438. * @peer: peer
  1439. * @nbuf_head: skb list head
  1440. * @nbuf_tail: skb list tail
  1441. *
  1442. * Return: QDF_STATUS
  1443. */
  1444. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1445. struct dp_vdev *vdev,
  1446. struct dp_peer *peer,
  1447. qdf_nbuf_t nbuf_head,
  1448. qdf_nbuf_t nbuf_tail);
  1449. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1450. /**
  1451. * dp_rx_eapol_deliver_to_stack() - deliver pkts to network stack
  1452. * caller to hold peer refcount and check for valid peer
  1453. * @soc: soc
  1454. * @vdev: vdev
  1455. * @peer: peer
  1456. * @nbuf_head: skb list head
  1457. * @nbuf_tail: skb list tail
  1458. *
  1459. * return: QDF_STATUS
  1460. */
  1461. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1462. struct dp_vdev *vdev,
  1463. struct dp_peer *peer,
  1464. qdf_nbuf_t nbuf_head,
  1465. qdf_nbuf_t nbuf_tail);
  1466. #endif
  1467. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1468. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1469. /*
  1470. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1471. * @int_ctx: pointer to DP interrupt context
  1472. * @dp_soc - DP soc structure pointer
  1473. * @hal_ring_hdl - HAL ring handle
  1474. *
  1475. * Return: 0 on success; error on failure
  1476. */
  1477. static inline int
  1478. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1479. hal_ring_handle_t hal_ring_hdl)
  1480. {
  1481. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1482. }
  1483. /*
  1484. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1485. * @int_ctx: pointer to DP interrupt context
  1486. * @dp_soc - DP soc structure pointer
  1487. * @hal_ring_hdl - HAL ring handle
  1488. *
  1489. * Return - None
  1490. */
  1491. static inline void
  1492. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1493. hal_ring_handle_t hal_ring_hdl)
  1494. {
  1495. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1496. }
  1497. #else
  1498. static inline int
  1499. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1500. hal_ring_handle_t hal_ring_hdl)
  1501. {
  1502. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1503. }
  1504. static inline void
  1505. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1506. hal_ring_handle_t hal_ring_hdl)
  1507. {
  1508. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1509. }
  1510. #endif
  1511. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1512. /*
  1513. * dp_rx_wbm_sg_list_reset() - Initialize sg list
  1514. *
  1515. * This api should be called at soc init and afterevery sg processing.
  1516. *@soc: DP SOC handle
  1517. */
  1518. static inline void dp_rx_wbm_sg_list_reset(struct dp_soc *soc)
  1519. {
  1520. if (soc) {
  1521. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = false;
  1522. soc->wbm_sg_param.wbm_sg_nbuf_head = NULL;
  1523. soc->wbm_sg_param.wbm_sg_nbuf_tail = NULL;
  1524. soc->wbm_sg_param.wbm_sg_desc_msdu_len = 0;
  1525. }
  1526. }
  1527. /*
  1528. * dp_rx_wbm_sg_list_deinit() - De-initialize sg list
  1529. *
  1530. * This api should be called in down path, to avoid any leak.
  1531. *@soc: DP SOC handle
  1532. */
  1533. static inline void dp_rx_wbm_sg_list_deinit(struct dp_soc *soc)
  1534. {
  1535. if (soc) {
  1536. if (soc->wbm_sg_param.wbm_sg_nbuf_head)
  1537. qdf_nbuf_list_free(soc->wbm_sg_param.wbm_sg_nbuf_head);
  1538. dp_rx_wbm_sg_list_reset(soc);
  1539. }
  1540. }
  1541. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1542. #ifdef WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL
  1543. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1544. do { \
  1545. if (!soc->rx_buff_pool[rx_desc->pool_id].is_initialized) { \
  1546. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf); \
  1547. break; \
  1548. } \
  1549. DP_RX_LIST_APPEND(ebuf_head, ebuf_tail, rx_desc->nbuf); \
  1550. if (!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)) { \
  1551. if (!dp_rx_buffer_pool_refill(soc, ebuf_head, \
  1552. rx_desc->pool_id)) \
  1553. DP_RX_MERGE_TWO_LIST(head, tail, \
  1554. ebuf_head, ebuf_tail);\
  1555. ebuf_head = NULL; \
  1556. ebuf_tail = NULL; \
  1557. } \
  1558. } while (0)
  1559. #else
  1560. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1561. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf)
  1562. #endif /* WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL */
  1563. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1564. /*
  1565. * dp_rx_link_desc_refill_duplicate_check() - check if link desc duplicate
  1566. to refill
  1567. * @soc: DP SOC handle
  1568. * @buf_info: the last link desc buf info
  1569. * @ring_buf_info: current buf address pointor including link desc
  1570. *
  1571. * return: none.
  1572. */
  1573. void dp_rx_link_desc_refill_duplicate_check(
  1574. struct dp_soc *soc,
  1575. struct hal_buf_info *buf_info,
  1576. hal_buff_addrinfo_t ring_buf_info);
  1577. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  1578. /**
  1579. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  1580. * @soc : dp_soc handle
  1581. * @pdev: dp_pdev handle
  1582. * @peer_id: peer_id of the peer for which completion came
  1583. * @ppdu_id: ppdu_id
  1584. * @netbuf: Buffer pointer
  1585. *
  1586. * This function is used to deliver rx packet to packet capture
  1587. */
  1588. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1589. uint16_t peer_id, uint32_t is_offload,
  1590. qdf_nbuf_t netbuf);
  1591. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1592. uint32_t is_offload);
  1593. #else
  1594. static inline void
  1595. dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1596. uint16_t peer_id, uint32_t is_offload,
  1597. qdf_nbuf_t netbuf)
  1598. {
  1599. }
  1600. static inline void
  1601. dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1602. uint32_t is_offload)
  1603. {
  1604. }
  1605. #endif
  1606. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1607. #ifdef FEATURE_MEC
  1608. /**
  1609. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  1610. * back on same vap or a different vap.
  1611. * @soc: core DP main context
  1612. * @peer: dp peer handler
  1613. * @rx_tlv_hdr: start of the rx TLV header
  1614. * @nbuf: pkt buffer
  1615. *
  1616. * Return: bool (true if it is a looped back pkt else false)
  1617. *
  1618. */
  1619. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1620. struct dp_peer *peer,
  1621. uint8_t *rx_tlv_hdr,
  1622. qdf_nbuf_t nbuf);
  1623. #else
  1624. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1625. struct dp_peer *peer,
  1626. uint8_t *rx_tlv_hdr,
  1627. qdf_nbuf_t nbuf)
  1628. {
  1629. return false;
  1630. }
  1631. #endif /* FEATURE_MEC */
  1632. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1633. #ifdef RECEIVE_OFFLOAD
  1634. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1635. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt);
  1636. #else
  1637. static inline
  1638. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1639. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1640. {
  1641. }
  1642. #endif
  1643. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1644. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1645. uint8_t ring_id,
  1646. struct cdp_tid_rx_stats *tid_stats);
  1647. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1648. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1649. hal_ring_handle_t hal_ring_hdl,
  1650. uint32_t num_entries,
  1651. bool *near_full);
  1652. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1653. void dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1654. hal_ring_desc_t ring_desc);
  1655. #else
  1656. static inline void
  1657. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1658. hal_ring_desc_t ring_desc)
  1659. {
  1660. }
  1661. #endif
  1662. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1663. #ifdef RX_DESC_SANITY_WAR
  1664. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1665. hal_ring_handle_t hal_ring_hdl,
  1666. hal_ring_desc_t ring_desc,
  1667. struct dp_rx_desc *rx_desc);
  1668. #else
  1669. static inline
  1670. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1671. hal_ring_handle_t hal_ring_hdl,
  1672. hal_ring_desc_t ring_desc,
  1673. struct dp_rx_desc *rx_desc)
  1674. {
  1675. return QDF_STATUS_SUCCESS;
  1676. }
  1677. #endif
  1678. #ifdef DP_RX_DROP_RAW_FRM
  1679. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf);
  1680. #else
  1681. static inline
  1682. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1683. {
  1684. return false;
  1685. }
  1686. #endif
  1687. #ifdef RX_DESC_DEBUG_CHECK
  1688. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1689. hal_ring_desc_t ring_desc,
  1690. struct dp_rx_desc *rx_desc);
  1691. #else
  1692. static inline
  1693. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1694. hal_ring_desc_t ring_desc,
  1695. struct dp_rx_desc *rx_desc)
  1696. {
  1697. return QDF_STATUS_SUCCESS;
  1698. }
  1699. #endif
  1700. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1701. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1702. #else
  1703. static inline
  1704. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1705. {
  1706. }
  1707. #endif
  1708. /**
  1709. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1710. * @nbuf: pointer to the first msdu of an amsdu.
  1711. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1712. *
  1713. * The ipsumed field of the skb is set based on whether HW validated the
  1714. * IP/TCP/UDP checksum.
  1715. *
  1716. * Return: void
  1717. */
  1718. static inline
  1719. void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1720. qdf_nbuf_t nbuf,
  1721. uint8_t *rx_tlv_hdr)
  1722. {
  1723. qdf_nbuf_rx_cksum_t cksum = {0};
  1724. //TODO - Move this to ring desc api
  1725. //HAL_RX_MSDU_DESC_IP_CHKSUM_FAIL_GET
  1726. //HAL_RX_MSDU_DESC_TCP_UDP_CHKSUM_FAIL_GET
  1727. uint32_t ip_csum_err, tcp_udp_csum_er;
  1728. hal_rx_tlv_csum_err_get(pdev->soc->hal_soc, rx_tlv_hdr, &ip_csum_err,
  1729. &tcp_udp_csum_er);
  1730. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1731. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1732. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1733. } else {
  1734. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1735. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1736. }
  1737. }
  1738. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1739. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1740. static inline
  1741. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1742. int max_reap_limit)
  1743. {
  1744. bool limit_hit = false;
  1745. limit_hit =
  1746. (num_reaped >= max_reap_limit) ? true : false;
  1747. if (limit_hit)
  1748. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1749. return limit_hit;
  1750. }
  1751. static inline
  1752. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1753. {
  1754. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1755. }
  1756. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1757. {
  1758. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1759. return cfg->rx_reap_loop_pkt_limit;
  1760. }
  1761. #else
  1762. static inline
  1763. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1764. int max_reap_limit)
  1765. {
  1766. return false;
  1767. }
  1768. static inline
  1769. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1770. {
  1771. return false;
  1772. }
  1773. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1774. {
  1775. return 0;
  1776. }
  1777. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1778. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1779. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1780. /**
  1781. * dp_rx_is_list_ready() - Make different lists for 4-address
  1782. and 3-address frames
  1783. * @nbuf_head: skb list head
  1784. * @vdev: vdev
  1785. * @peer: peer
  1786. * @peer_id: peer id of new received frame
  1787. * @vdev_id: vdev_id of new received frame
  1788. *
  1789. * Return: true if peer_ids are different.
  1790. */
  1791. static inline bool
  1792. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1793. struct dp_vdev *vdev,
  1794. struct dp_peer *peer,
  1795. uint16_t peer_id,
  1796. uint8_t vdev_id)
  1797. {
  1798. if (nbuf_head && peer && (peer->peer_id != peer_id))
  1799. return true;
  1800. return false;
  1801. }
  1802. #else
  1803. static inline bool
  1804. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1805. struct dp_vdev *vdev,
  1806. struct dp_peer *peer,
  1807. uint16_t peer_id,
  1808. uint8_t vdev_id)
  1809. {
  1810. if (nbuf_head && vdev && (vdev->vdev_id != vdev_id))
  1811. return true;
  1812. return false;
  1813. }
  1814. #endif
  1815. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  1816. static inline uint8_t
  1817. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  1818. {
  1819. return DP_DEFRAG_RBM(soc->wbm_sw0_bm_id);
  1820. }
  1821. static inline uint8_t
  1822. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  1823. {
  1824. return DP_WBM2SW_RBM(soc->wbm_sw0_bm_id);
  1825. }
  1826. #else
  1827. static inline uint8_t
  1828. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  1829. {
  1830. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  1831. uint8_t wbm2_sw_rx_rel_ring_id;
  1832. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  1833. return HAL_RX_BUF_RBM_SW_BM(soc->wbm_sw0_bm_id,
  1834. wbm2_sw_rx_rel_ring_id);
  1835. }
  1836. static inline uint8_t
  1837. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  1838. {
  1839. return dp_rx_get_rx_bm_id(soc);
  1840. }
  1841. #endif
  1842. static inline uint16_t
  1843. dp_rx_peer_metadata_peer_id_get(struct dp_soc *soc, uint32_t peer_metadata)
  1844. {
  1845. return soc->arch_ops.dp_rx_peer_metadata_peer_id_get(soc,
  1846. peer_metadata);
  1847. }
  1848. /**
  1849. * dp_rx_desc_pool_init_generic() - Generic Rx descriptors initialization
  1850. * @soc: SOC handle
  1851. * @rx_desc_pool: pointer to RX descriptor pool
  1852. * @pool_id: pool ID
  1853. *
  1854. * Return: None
  1855. */
  1856. QDF_STATUS dp_rx_desc_pool_init_generic(struct dp_soc *soc,
  1857. struct rx_desc_pool *rx_desc_pool,
  1858. uint32_t pool_id);
  1859. void dp_rx_desc_pool_deinit_generic(struct dp_soc *soc,
  1860. struct rx_desc_pool *rx_desc_pool,
  1861. uint32_t pool_id);
  1862. /**
  1863. * dp_rx_pkt_tracepoints_enabled() - Get the state of rx pkt tracepoint
  1864. *
  1865. * Return: True if any rx pkt tracepoint is enabled else false
  1866. */
  1867. static inline
  1868. bool dp_rx_pkt_tracepoints_enabled(void)
  1869. {
  1870. return (qdf_trace_dp_rx_tcp_pkt_enabled() ||
  1871. qdf_trace_dp_rx_udp_pkt_enabled() ||
  1872. qdf_trace_dp_rx_pkt_enabled());
  1873. }
  1874. #endif /* _DP_RX_H */