dp_rx.c 71 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_api.h"
  26. #include "qdf_nbuf.h"
  27. #ifdef MESH_MODE_SUPPORT
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #include "dp_internal.h"
  31. #include "dp_ipa.h"
  32. #include "dp_hist.h"
  33. #include "dp_rx_buffer_pool.h"
  34. #ifdef WIFI_MONITOR_SUPPORT
  35. #include "dp_htt.h"
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #ifdef DUP_RX_DESC_WAR
  42. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  43. hal_ring_handle_t hal_ring,
  44. hal_ring_desc_t ring_desc,
  45. struct dp_rx_desc *rx_desc)
  46. {
  47. void *hal_soc = soc->hal_soc;
  48. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  49. dp_rx_desc_dump(rx_desc);
  50. }
  51. #else
  52. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  53. hal_ring_handle_t hal_ring_hdl,
  54. hal_ring_desc_t ring_desc,
  55. struct dp_rx_desc *rx_desc)
  56. {
  57. hal_soc_handle_t hal_soc = soc->hal_soc;
  58. dp_rx_desc_dump(rx_desc);
  59. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  60. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  61. qdf_assert_always(0);
  62. }
  63. #endif
  64. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  65. #ifdef RX_DESC_SANITY_WAR
  66. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  67. hal_ring_handle_t hal_ring_hdl,
  68. hal_ring_desc_t ring_desc,
  69. struct dp_rx_desc *rx_desc)
  70. {
  71. uint8_t return_buffer_manager;
  72. if (qdf_unlikely(!rx_desc)) {
  73. /*
  74. * This is an unlikely case where the cookie obtained
  75. * from the ring_desc is invalid and hence we are not
  76. * able to find the corresponding rx_desc
  77. */
  78. goto fail;
  79. }
  80. return_buffer_manager = hal_rx_ret_buf_manager_get(hal_soc, ring_desc);
  81. if (qdf_unlikely(!(return_buffer_manager ==
  82. HAL_RX_BUF_RBM_SW1_BM(soc->wbm_sw0_bm_id) ||
  83. return_buffer_manager ==
  84. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id)))) {
  85. goto fail;
  86. }
  87. return QDF_STATUS_SUCCESS;
  88. fail:
  89. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  90. dp_err("Ring Desc:");
  91. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  92. ring_desc);
  93. return QDF_STATUS_E_NULL_VALUE;
  94. }
  95. #endif
  96. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  97. /**
  98. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  99. *
  100. * @dp_soc: struct dp_soc *
  101. * @nbuf_frag_info_t: nbuf frag info
  102. * @dp_pdev: struct dp_pdev *
  103. * @rx_desc_pool: Rx desc pool
  104. *
  105. * Return: QDF_STATUS
  106. */
  107. #ifdef DP_RX_MON_MEM_FRAG
  108. static inline QDF_STATUS
  109. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  110. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  111. struct dp_pdev *dp_pdev,
  112. struct rx_desc_pool *rx_desc_pool)
  113. {
  114. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  115. (nbuf_frag_info_t->virt_addr).vaddr =
  116. qdf_frag_alloc(rx_desc_pool->buf_size);
  117. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  118. dp_err("Frag alloc failed");
  119. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  120. return QDF_STATUS_E_NOMEM;
  121. }
  122. ret = qdf_mem_map_page(dp_soc->osdev,
  123. (nbuf_frag_info_t->virt_addr).vaddr,
  124. QDF_DMA_FROM_DEVICE,
  125. rx_desc_pool->buf_size,
  126. &nbuf_frag_info_t->paddr);
  127. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  128. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  129. dp_err("Frag map failed");
  130. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  131. return QDF_STATUS_E_FAULT;
  132. }
  133. return QDF_STATUS_SUCCESS;
  134. }
  135. #else
  136. static inline QDF_STATUS
  137. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  138. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  139. struct dp_pdev *dp_pdev,
  140. struct rx_desc_pool *rx_desc_pool)
  141. {
  142. return QDF_STATUS_SUCCESS;
  143. }
  144. #endif /* DP_RX_MON_MEM_FRAG */
  145. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  146. /**
  147. * dp_rx_refill_ring_record_entry() - Record an entry into refill_ring history
  148. * @soc: Datapath soc structure
  149. * @ring_num: Refill ring number
  150. * @num_req: number of buffers requested for refill
  151. * @num_refill: number of buffers refilled
  152. *
  153. * Returns: None
  154. */
  155. static inline void
  156. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  157. hal_ring_handle_t hal_ring_hdl,
  158. uint32_t num_req, uint32_t num_refill)
  159. {
  160. struct dp_refill_info_record *record;
  161. uint32_t idx;
  162. uint32_t tp;
  163. uint32_t hp;
  164. if (qdf_unlikely(ring_num >= MAX_PDEV_CNT ||
  165. !soc->rx_refill_ring_history[ring_num]))
  166. return;
  167. idx = dp_history_get_next_index(&soc->rx_refill_ring_history[ring_num]->index,
  168. DP_RX_REFILL_HIST_MAX);
  169. /* No NULL check needed for record since its an array */
  170. record = &soc->rx_refill_ring_history[ring_num]->entry[idx];
  171. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &tp, &hp);
  172. record->timestamp = qdf_get_log_timestamp();
  173. record->num_req = num_req;
  174. record->num_refill = num_refill;
  175. record->hp = hp;
  176. record->tp = tp;
  177. }
  178. #else
  179. static inline void
  180. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  181. hal_ring_handle_t hal_ring_hdl,
  182. uint32_t num_req, uint32_t num_refill)
  183. {
  184. }
  185. #endif
  186. /**
  187. * dp_pdev_nbuf_alloc_and_map() - Allocate nbuf for desc buffer and map
  188. *
  189. * @dp_soc: struct dp_soc *
  190. * @mac_id: Mac id
  191. * @num_entries_avail: num_entries_avail
  192. * @nbuf_frag_info_t: nbuf frag info
  193. * @dp_pdev: struct dp_pdev *
  194. * @rx_desc_pool: Rx desc pool
  195. *
  196. * Return: QDF_STATUS
  197. */
  198. static inline QDF_STATUS
  199. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  200. uint32_t mac_id,
  201. uint32_t num_entries_avail,
  202. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  203. struct dp_pdev *dp_pdev,
  204. struct rx_desc_pool *rx_desc_pool)
  205. {
  206. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  207. (nbuf_frag_info_t->virt_addr).nbuf =
  208. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  209. mac_id,
  210. rx_desc_pool,
  211. num_entries_avail);
  212. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  213. dp_err("nbuf alloc failed");
  214. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  215. return QDF_STATUS_E_NOMEM;
  216. }
  217. ret = dp_rx_buffer_pool_nbuf_map(dp_soc, rx_desc_pool,
  218. nbuf_frag_info_t);
  219. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  220. dp_rx_buffer_pool_nbuf_free(dp_soc,
  221. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  222. dp_err("nbuf map failed");
  223. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  224. return QDF_STATUS_E_FAULT;
  225. }
  226. nbuf_frag_info_t->paddr =
  227. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  228. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc,
  229. (qdf_nbuf_t)((nbuf_frag_info_t->virt_addr).nbuf),
  230. rx_desc_pool->buf_size,
  231. true);
  232. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  233. &nbuf_frag_info_t->paddr,
  234. rx_desc_pool);
  235. if (ret == QDF_STATUS_E_FAILURE) {
  236. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  237. return QDF_STATUS_E_ADDRNOTAVAIL;
  238. }
  239. return QDF_STATUS_SUCCESS;
  240. }
  241. /*
  242. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  243. * called during dp rx initialization
  244. * and at the end of dp_rx_process.
  245. *
  246. * @soc: core txrx main context
  247. * @mac_id: mac_id which is one of 3 mac_ids
  248. * @dp_rxdma_srng: dp rxdma circular ring
  249. * @rx_desc_pool: Pointer to free Rx descriptor pool
  250. * @num_req_buffers: number of buffer to be replenished
  251. * @desc_list: list of descs if called from dp_rx_process
  252. * or NULL during dp rx initialization or out of buffer
  253. * interrupt.
  254. * @tail: tail of descs list
  255. * @func_name: name of the caller function
  256. * Return: return success or failure
  257. */
  258. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  259. struct dp_srng *dp_rxdma_srng,
  260. struct rx_desc_pool *rx_desc_pool,
  261. uint32_t num_req_buffers,
  262. union dp_rx_desc_list_elem_t **desc_list,
  263. union dp_rx_desc_list_elem_t **tail,
  264. const char *func_name)
  265. {
  266. uint32_t num_alloc_desc;
  267. uint16_t num_desc_to_free = 0;
  268. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  269. uint32_t num_entries_avail;
  270. uint32_t count;
  271. int sync_hw_ptr = 1;
  272. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  273. void *rxdma_ring_entry;
  274. union dp_rx_desc_list_elem_t *next;
  275. QDF_STATUS ret;
  276. void *rxdma_srng;
  277. rxdma_srng = dp_rxdma_srng->hal_srng;
  278. if (qdf_unlikely(!dp_pdev)) {
  279. dp_rx_err("%pK: pdev is null for mac_id = %d",
  280. dp_soc, mac_id);
  281. return QDF_STATUS_E_FAILURE;
  282. }
  283. if (qdf_unlikely(!rxdma_srng)) {
  284. dp_rx_debug("%pK: rxdma srng not initialized", dp_soc);
  285. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  286. return QDF_STATUS_E_FAILURE;
  287. }
  288. dp_rx_debug("%pK: requested %d buffers for replenish",
  289. dp_soc, num_req_buffers);
  290. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  291. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  292. rxdma_srng,
  293. sync_hw_ptr);
  294. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  295. dp_soc, num_entries_avail);
  296. if (!(*desc_list) && (num_entries_avail >
  297. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  298. num_req_buffers = num_entries_avail;
  299. } else if (num_entries_avail < num_req_buffers) {
  300. num_desc_to_free = num_req_buffers - num_entries_avail;
  301. num_req_buffers = num_entries_avail;
  302. }
  303. if (qdf_unlikely(!num_req_buffers)) {
  304. num_desc_to_free = num_req_buffers;
  305. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  306. goto free_descs;
  307. }
  308. /*
  309. * if desc_list is NULL, allocate the descs from freelist
  310. */
  311. if (!(*desc_list)) {
  312. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  313. rx_desc_pool,
  314. num_req_buffers,
  315. desc_list,
  316. tail);
  317. if (!num_alloc_desc) {
  318. dp_rx_err("%pK: no free rx_descs in freelist", dp_soc);
  319. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  320. num_req_buffers);
  321. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  322. return QDF_STATUS_E_NOMEM;
  323. }
  324. dp_rx_debug("%pK: %d rx desc allocated", dp_soc, num_alloc_desc);
  325. num_req_buffers = num_alloc_desc;
  326. }
  327. count = 0;
  328. while (count < num_req_buffers) {
  329. /* Flag is set while pdev rx_desc_pool initialization */
  330. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  331. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  332. &nbuf_frag_info,
  333. dp_pdev,
  334. rx_desc_pool);
  335. else
  336. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  337. mac_id,
  338. num_entries_avail, &nbuf_frag_info,
  339. dp_pdev, rx_desc_pool);
  340. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  341. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  342. continue;
  343. break;
  344. }
  345. count++;
  346. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  347. rxdma_srng);
  348. qdf_assert_always(rxdma_ring_entry);
  349. next = (*desc_list)->next;
  350. /* Flag is set while pdev rx_desc_pool initialization */
  351. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  352. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  353. &nbuf_frag_info);
  354. else
  355. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  356. &nbuf_frag_info);
  357. /* rx_desc.in_use should be zero at this time*/
  358. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  359. (*desc_list)->rx_desc.in_use = 1;
  360. (*desc_list)->rx_desc.in_err_state = 0;
  361. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  362. func_name, RX_DESC_REPLENISHED);
  363. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  364. nbuf_frag_info.virt_addr.nbuf,
  365. (unsigned long long)(nbuf_frag_info.paddr),
  366. (*desc_list)->rx_desc.cookie);
  367. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc, rxdma_ring_entry,
  368. nbuf_frag_info.paddr,
  369. (*desc_list)->rx_desc.cookie,
  370. rx_desc_pool->owner);
  371. *desc_list = next;
  372. }
  373. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id, rxdma_srng,
  374. num_req_buffers, count);
  375. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  376. dp_rx_schedule_refill_thread(dp_soc);
  377. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  378. count, num_desc_to_free);
  379. /* No need to count the number of bytes received during replenish.
  380. * Therefore set replenish.pkts.bytes as 0.
  381. */
  382. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  383. free_descs:
  384. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  385. /*
  386. * add any available free desc back to the free list
  387. */
  388. if (*desc_list)
  389. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  390. mac_id, rx_desc_pool);
  391. return QDF_STATUS_SUCCESS;
  392. }
  393. qdf_export_symbol(__dp_rx_buffers_replenish);
  394. /*
  395. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  396. * pkts to RAW mode simulation to
  397. * decapsulate the pkt.
  398. *
  399. * @vdev: vdev on which RAW mode is enabled
  400. * @nbuf_list: list of RAW pkts to process
  401. * @peer: peer object from which the pkt is rx
  402. *
  403. * Return: void
  404. */
  405. void
  406. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  407. struct dp_peer *peer)
  408. {
  409. qdf_nbuf_t deliver_list_head = NULL;
  410. qdf_nbuf_t deliver_list_tail = NULL;
  411. qdf_nbuf_t nbuf;
  412. nbuf = nbuf_list;
  413. while (nbuf) {
  414. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  415. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  416. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  417. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  418. /*
  419. * reset the chfrag_start and chfrag_end bits in nbuf cb
  420. * as this is a non-amsdu pkt and RAW mode simulation expects
  421. * these bit s to be 0 for non-amsdu pkt.
  422. */
  423. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  424. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  425. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  426. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  427. }
  428. nbuf = next;
  429. }
  430. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  431. &deliver_list_tail, peer->mac_addr.raw);
  432. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  433. }
  434. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  435. #ifndef FEATURE_WDS
  436. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  437. struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  438. {
  439. }
  440. #endif
  441. /*
  442. * dp_rx_intrabss_mcbc_fwd() - Does intrabss forward for mcast packets
  443. *
  444. * @soc: core txrx main context
  445. * @ta_peer : source peer entry
  446. * @rx_tlv_hdr : start address of rx tlvs
  447. * @nbuf : nbuf that has to be intrabss forwarded
  448. * @tid_stats : tid stats pointer
  449. *
  450. * Return: bool: true if it is forwarded else false
  451. */
  452. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_peer *ta_peer,
  453. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  454. struct cdp_tid_rx_stats *tid_stats)
  455. {
  456. uint16_t len;
  457. qdf_nbuf_t nbuf_copy;
  458. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  459. nbuf))
  460. return true;
  461. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  462. return false;
  463. /* If the source peer in the isolation list
  464. * then dont forward instead push to bridge stack
  465. */
  466. if (dp_get_peer_isolation(ta_peer))
  467. return false;
  468. nbuf_copy = qdf_nbuf_copy(nbuf);
  469. if (!nbuf_copy)
  470. return false;
  471. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  472. if (dp_tx_send((struct cdp_soc_t *)soc,
  473. ta_peer->vdev->vdev_id, nbuf_copy)) {
  474. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  475. tid_stats->fail_cnt[INTRABSS_DROP]++;
  476. qdf_nbuf_free(nbuf_copy);
  477. } else {
  478. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  479. tid_stats->intrabss_cnt++;
  480. }
  481. return false;
  482. }
  483. /*
  484. * dp_rx_intrabss_ucast_fwd() - Does intrabss forward for unicast packets
  485. *
  486. * @soc: core txrx main context
  487. * @ta_peer: source peer entry
  488. * @tx_vdev_id: VDEV ID for Intra-BSS TX
  489. * @rx_tlv_hdr: start address of rx tlvs
  490. * @nbuf: nbuf that has to be intrabss forwarded
  491. * @tid_stats: tid stats pointer
  492. *
  493. * Return: bool: true if it is forwarded else false
  494. */
  495. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_peer *ta_peer,
  496. uint8_t tx_vdev_id,
  497. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  498. struct cdp_tid_rx_stats *tid_stats)
  499. {
  500. uint16_t len;
  501. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  502. /* linearize the nbuf just before we send to
  503. * dp_tx_send()
  504. */
  505. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  506. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  507. return false;
  508. nbuf = qdf_nbuf_unshare(nbuf);
  509. if (!nbuf) {
  510. DP_STATS_INC_PKT(ta_peer,
  511. rx.intra_bss.fail, 1, len);
  512. /* return true even though the pkt is
  513. * not forwarded. Basically skb_unshare
  514. * failed and we want to continue with
  515. * next nbuf.
  516. */
  517. tid_stats->fail_cnt[INTRABSS_DROP]++;
  518. return false;
  519. }
  520. }
  521. if (!dp_tx_send((struct cdp_soc_t *)soc,
  522. tx_vdev_id, nbuf)) {
  523. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  524. len);
  525. } else {
  526. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  527. len);
  528. tid_stats->fail_cnt[INTRABSS_DROP]++;
  529. return false;
  530. }
  531. return true;
  532. }
  533. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  534. #ifdef MESH_MODE_SUPPORT
  535. /**
  536. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  537. *
  538. * @vdev: DP Virtual device handle
  539. * @nbuf: Buffer pointer
  540. * @rx_tlv_hdr: start of rx tlv header
  541. * @peer: pointer to peer
  542. *
  543. * This function allocated memory for mesh receive stats and fill the
  544. * required stats. Stores the memory address in skb cb.
  545. *
  546. * Return: void
  547. */
  548. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  549. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  550. {
  551. struct mesh_recv_hdr_s *rx_info = NULL;
  552. uint32_t pkt_type;
  553. uint32_t nss;
  554. uint32_t rate_mcs;
  555. uint32_t bw;
  556. uint8_t primary_chan_num;
  557. uint32_t center_chan_freq;
  558. struct dp_soc *soc = vdev->pdev->soc;
  559. /* fill recv mesh stats */
  560. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  561. /* upper layers are resposible to free this memory */
  562. if (!rx_info) {
  563. dp_rx_err("%pK: Memory allocation failed for mesh rx stats",
  564. vdev->pdev->soc);
  565. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  566. return;
  567. }
  568. rx_info->rs_flags = MESH_RXHDR_VER1;
  569. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  570. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  571. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  572. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  573. if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
  574. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  575. rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
  576. rx_tlv_hdr);
  577. if (vdev->osif_get_key)
  578. vdev->osif_get_key(vdev->osif_vdev,
  579. &rx_info->rs_decryptkey[0],
  580. &peer->mac_addr.raw[0],
  581. rx_info->rs_keyix);
  582. }
  583. rx_info->rs_snr = peer->stats.rx.snr;
  584. rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
  585. soc = vdev->pdev->soc;
  586. primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
  587. center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
  588. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  589. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  590. soc->ctrl_psoc,
  591. vdev->pdev->pdev_id,
  592. center_chan_freq);
  593. }
  594. rx_info->rs_channel = primary_chan_num;
  595. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  596. rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  597. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  598. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  599. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  600. (bw << 24);
  601. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  602. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  603. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x, snr %x"),
  604. rx_info->rs_flags,
  605. rx_info->rs_rssi,
  606. rx_info->rs_channel,
  607. rx_info->rs_ratephy1,
  608. rx_info->rs_keyix,
  609. rx_info->rs_snr);
  610. }
  611. /**
  612. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  613. *
  614. * @vdev: DP Virtual device handle
  615. * @nbuf: Buffer pointer
  616. * @rx_tlv_hdr: start of rx tlv header
  617. *
  618. * This checks if the received packet is matching any filter out
  619. * catogery and and drop the packet if it matches.
  620. *
  621. * Return: status(0 indicates drop, 1 indicate to no drop)
  622. */
  623. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  624. uint8_t *rx_tlv_hdr)
  625. {
  626. union dp_align_mac_addr mac_addr;
  627. struct dp_soc *soc = vdev->pdev->soc;
  628. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  629. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  630. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  631. rx_tlv_hdr))
  632. return QDF_STATUS_SUCCESS;
  633. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  634. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  635. rx_tlv_hdr))
  636. return QDF_STATUS_SUCCESS;
  637. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  638. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  639. rx_tlv_hdr) &&
  640. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  641. rx_tlv_hdr))
  642. return QDF_STATUS_SUCCESS;
  643. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  644. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  645. rx_tlv_hdr,
  646. &mac_addr.raw[0]))
  647. return QDF_STATUS_E_FAILURE;
  648. if (!qdf_mem_cmp(&mac_addr.raw[0],
  649. &vdev->mac_addr.raw[0],
  650. QDF_MAC_ADDR_SIZE))
  651. return QDF_STATUS_SUCCESS;
  652. }
  653. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  654. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  655. rx_tlv_hdr,
  656. &mac_addr.raw[0]))
  657. return QDF_STATUS_E_FAILURE;
  658. if (!qdf_mem_cmp(&mac_addr.raw[0],
  659. &vdev->mac_addr.raw[0],
  660. QDF_MAC_ADDR_SIZE))
  661. return QDF_STATUS_SUCCESS;
  662. }
  663. }
  664. return QDF_STATUS_E_FAILURE;
  665. }
  666. #else
  667. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  668. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  669. {
  670. }
  671. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  672. uint8_t *rx_tlv_hdr)
  673. {
  674. return QDF_STATUS_E_FAILURE;
  675. }
  676. #endif
  677. #ifdef FEATURE_NAC_RSSI
  678. /**
  679. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  680. * @soc: DP SOC handle
  681. * @mpdu: mpdu for which peer is invalid
  682. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  683. * pool_id has same mapping)
  684. *
  685. * return: integer type
  686. */
  687. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  688. uint8_t mac_id)
  689. {
  690. struct dp_invalid_peer_msg msg;
  691. struct dp_vdev *vdev = NULL;
  692. struct dp_pdev *pdev = NULL;
  693. struct ieee80211_frame *wh;
  694. qdf_nbuf_t curr_nbuf, next_nbuf;
  695. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  696. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  697. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  698. dp_rx_debug("%pK: Drop decapped frames", soc);
  699. goto free;
  700. }
  701. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  702. if (!DP_FRAME_IS_DATA(wh)) {
  703. dp_rx_debug("%pK: NAWDS valid only for data frames", soc);
  704. goto free;
  705. }
  706. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  707. dp_rx_err("%pK: Invalid nbuf length", soc);
  708. goto free;
  709. }
  710. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  711. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  712. dp_rx_err("%pK: PDEV %s", soc, !pdev ? "not found" : "down");
  713. goto free;
  714. }
  715. if (dp_monitor_filter_neighbour_peer(pdev, rx_pkt_hdr) ==
  716. QDF_STATUS_SUCCESS)
  717. return 0;
  718. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  719. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  720. QDF_MAC_ADDR_SIZE) == 0) {
  721. goto out;
  722. }
  723. }
  724. if (!vdev) {
  725. dp_rx_err("%pK: VDEV not found", soc);
  726. goto free;
  727. }
  728. out:
  729. msg.wh = wh;
  730. qdf_nbuf_pull_head(mpdu, soc->rx_pkt_tlv_size);
  731. msg.nbuf = mpdu;
  732. msg.vdev_id = vdev->vdev_id;
  733. /*
  734. * NOTE: Only valid for HKv1.
  735. * If smart monitor mode is enabled on RE, we are getting invalid
  736. * peer frames with RA as STA mac of RE and the TA not matching
  737. * with any NAC list or the the BSSID.Such frames need to dropped
  738. * in order to avoid HM_WDS false addition.
  739. */
  740. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  741. if (dp_monitor_drop_inv_peer_pkts(vdev) == QDF_STATUS_SUCCESS) {
  742. dp_rx_warn("%pK: Drop inv peer pkts with STA RA:%pm",
  743. soc, wh->i_addr1);
  744. goto free;
  745. }
  746. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  747. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  748. pdev->pdev_id, &msg);
  749. }
  750. free:
  751. /* Drop and free packet */
  752. curr_nbuf = mpdu;
  753. while (curr_nbuf) {
  754. next_nbuf = qdf_nbuf_next(curr_nbuf);
  755. qdf_nbuf_free(curr_nbuf);
  756. curr_nbuf = next_nbuf;
  757. }
  758. return 0;
  759. }
  760. /**
  761. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  762. * @soc: DP SOC handle
  763. * @mpdu: mpdu for which peer is invalid
  764. * @mpdu_done: if an mpdu is completed
  765. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  766. * pool_id has same mapping)
  767. *
  768. * return: integer type
  769. */
  770. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  771. qdf_nbuf_t mpdu, bool mpdu_done,
  772. uint8_t mac_id)
  773. {
  774. /* Only trigger the process when mpdu is completed */
  775. if (mpdu_done)
  776. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  777. }
  778. #else
  779. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  780. uint8_t mac_id)
  781. {
  782. qdf_nbuf_t curr_nbuf, next_nbuf;
  783. struct dp_pdev *pdev;
  784. struct dp_vdev *vdev = NULL;
  785. struct ieee80211_frame *wh;
  786. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  787. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  788. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  789. if (!DP_FRAME_IS_DATA(wh)) {
  790. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  791. "only for data frames");
  792. goto free;
  793. }
  794. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  795. dp_rx_info_rl("%pK: Invalid nbuf length", soc);
  796. goto free;
  797. }
  798. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  799. if (!pdev) {
  800. dp_rx_info_rl("%pK: PDEV not found", soc);
  801. goto free;
  802. }
  803. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  804. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  805. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  806. QDF_MAC_ADDR_SIZE) == 0) {
  807. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  808. goto out;
  809. }
  810. }
  811. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  812. if (!vdev) {
  813. dp_rx_info_rl("%pK: VDEV not found", soc);
  814. goto free;
  815. }
  816. out:
  817. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  818. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  819. free:
  820. /* reset the head and tail pointers */
  821. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  822. if (pdev) {
  823. pdev->invalid_peer_head_msdu = NULL;
  824. pdev->invalid_peer_tail_msdu = NULL;
  825. }
  826. /* Drop and free packet */
  827. curr_nbuf = mpdu;
  828. while (curr_nbuf) {
  829. next_nbuf = qdf_nbuf_next(curr_nbuf);
  830. qdf_nbuf_free(curr_nbuf);
  831. curr_nbuf = next_nbuf;
  832. }
  833. /* Reset the head and tail pointers */
  834. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  835. if (pdev) {
  836. pdev->invalid_peer_head_msdu = NULL;
  837. pdev->invalid_peer_tail_msdu = NULL;
  838. }
  839. return 0;
  840. }
  841. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  842. qdf_nbuf_t mpdu, bool mpdu_done,
  843. uint8_t mac_id)
  844. {
  845. /* Process the nbuf */
  846. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  847. }
  848. #endif
  849. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  850. #ifdef RECEIVE_OFFLOAD
  851. /**
  852. * dp_rx_print_offload_info() - Print offload info from RX TLV
  853. * @soc: dp soc handle
  854. * @msdu: MSDU for which the offload info is to be printed
  855. *
  856. * Return: None
  857. */
  858. static void dp_rx_print_offload_info(struct dp_soc *soc,
  859. qdf_nbuf_t msdu)
  860. {
  861. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  862. dp_verbose_debug("lro_eligible 0x%x",
  863. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu));
  864. dp_verbose_debug("pure_ack 0x%x", QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu));
  865. dp_verbose_debug("chksum 0x%x", QDF_NBUF_CB_RX_TCP_CHKSUM(msdu));
  866. dp_verbose_debug("TCP seq num 0x%x", QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu));
  867. dp_verbose_debug("TCP ack num 0x%x", QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu));
  868. dp_verbose_debug("TCP window 0x%x", QDF_NBUF_CB_RX_TCP_WIN(msdu));
  869. dp_verbose_debug("TCP protocol 0x%x", QDF_NBUF_CB_RX_TCP_PROTO(msdu));
  870. dp_verbose_debug("TCP offset 0x%x", QDF_NBUF_CB_RX_TCP_OFFSET(msdu));
  871. dp_verbose_debug("toeplitz 0x%x", QDF_NBUF_CB_RX_FLOW_ID(msdu));
  872. dp_verbose_debug("---------------------------------------------------------");
  873. }
  874. /**
  875. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  876. * @soc: DP SOC handle
  877. * @rx_tlv: RX TLV received for the msdu
  878. * @msdu: msdu for which GRO info needs to be filled
  879. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  880. *
  881. * Return: None
  882. */
  883. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  884. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  885. {
  886. struct hal_offload_info offload_info;
  887. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  888. return;
  889. if (hal_rx_tlv_get_offload_info(soc->hal_soc, rx_tlv, &offload_info))
  890. return;
  891. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  892. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = offload_info.lro_eligible;
  893. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = offload_info.tcp_pure_ack;
  894. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  895. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  896. rx_tlv);
  897. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = offload_info.tcp_seq_num;
  898. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = offload_info.tcp_ack_num;
  899. QDF_NBUF_CB_RX_TCP_WIN(msdu) = offload_info.tcp_win;
  900. QDF_NBUF_CB_RX_TCP_PROTO(msdu) = offload_info.tcp_proto;
  901. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = offload_info.ipv6_proto;
  902. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = offload_info.tcp_offset;
  903. QDF_NBUF_CB_RX_FLOW_ID(msdu) = offload_info.flow_id;
  904. dp_rx_print_offload_info(soc, msdu);
  905. }
  906. #endif /* RECEIVE_OFFLOAD */
  907. /**
  908. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  909. *
  910. * @soc: DP soc handle
  911. * @nbuf: pointer to msdu.
  912. * @mpdu_len: mpdu length
  913. * @l3_pad_len: L3 padding length by HW
  914. *
  915. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  916. */
  917. static inline bool dp_rx_adjust_nbuf_len(struct dp_soc *soc,
  918. qdf_nbuf_t nbuf,
  919. uint16_t *mpdu_len,
  920. uint32_t l3_pad_len)
  921. {
  922. bool last_nbuf;
  923. uint32_t pkt_hdr_size;
  924. pkt_hdr_size = soc->rx_pkt_tlv_size + l3_pad_len;
  925. if ((*mpdu_len + pkt_hdr_size) > RX_DATA_BUFFER_SIZE) {
  926. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  927. last_nbuf = false;
  928. *mpdu_len -= (RX_DATA_BUFFER_SIZE - pkt_hdr_size);
  929. } else {
  930. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + pkt_hdr_size));
  931. last_nbuf = true;
  932. *mpdu_len = 0;
  933. }
  934. return last_nbuf;
  935. }
  936. /**
  937. * dp_get_l3_hdr_pad_len() - get L3 header padding length.
  938. *
  939. * @soc: DP soc handle
  940. * @nbuf: pointer to msdu.
  941. *
  942. * Return: returns padding length in bytes.
  943. */
  944. static inline uint32_t dp_get_l3_hdr_pad_len(struct dp_soc *soc,
  945. qdf_nbuf_t nbuf)
  946. {
  947. uint32_t l3_hdr_pad = 0;
  948. uint8_t *rx_tlv_hdr;
  949. struct hal_rx_msdu_metadata msdu_metadata;
  950. while (nbuf) {
  951. if (!qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  952. /* scattered msdu end with continuation is 0 */
  953. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  954. hal_rx_msdu_metadata_get(soc->hal_soc,
  955. rx_tlv_hdr,
  956. &msdu_metadata);
  957. l3_hdr_pad = msdu_metadata.l3_hdr_pad;
  958. break;
  959. }
  960. nbuf = nbuf->next;
  961. }
  962. return l3_hdr_pad;
  963. }
  964. /**
  965. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  966. * multiple nbufs.
  967. * @soc: DP SOC handle
  968. * @nbuf: pointer to the first msdu of an amsdu.
  969. *
  970. * This function implements the creation of RX frag_list for cases
  971. * where an MSDU is spread across multiple nbufs.
  972. *
  973. * Return: returns the head nbuf which contains complete frag_list.
  974. */
  975. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  976. {
  977. qdf_nbuf_t parent, frag_list, next = NULL;
  978. uint16_t frag_list_len = 0;
  979. uint16_t mpdu_len;
  980. bool last_nbuf;
  981. uint32_t l3_hdr_pad_offset = 0;
  982. /*
  983. * Use msdu len got from REO entry descriptor instead since
  984. * there is case the RX PKT TLV is corrupted while msdu_len
  985. * from REO descriptor is right for non-raw RX scatter msdu.
  986. */
  987. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  988. /*
  989. * this is a case where the complete msdu fits in one single nbuf.
  990. * in this case HW sets both start and end bit and we only need to
  991. * reset these bits for RAW mode simulator to decap the pkt
  992. */
  993. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  994. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  995. qdf_nbuf_set_pktlen(nbuf, mpdu_len + soc->rx_pkt_tlv_size);
  996. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  997. return nbuf;
  998. }
  999. l3_hdr_pad_offset = dp_get_l3_hdr_pad_len(soc, nbuf);
  1000. /*
  1001. * This is a case where we have multiple msdus (A-MSDU) spread across
  1002. * multiple nbufs. here we create a fraglist out of these nbufs.
  1003. *
  1004. * the moment we encounter a nbuf with continuation bit set we
  1005. * know for sure we have an MSDU which is spread across multiple
  1006. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1007. */
  1008. parent = nbuf;
  1009. frag_list = nbuf->next;
  1010. nbuf = nbuf->next;
  1011. /*
  1012. * set the start bit in the first nbuf we encounter with continuation
  1013. * bit set. This has the proper mpdu length set as it is the first
  1014. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1015. * nbufs will form the frag_list of the parent nbuf.
  1016. */
  1017. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1018. /*
  1019. * L3 header padding is only needed for the 1st buffer
  1020. * in a scattered msdu
  1021. */
  1022. last_nbuf = dp_rx_adjust_nbuf_len(soc, parent, &mpdu_len,
  1023. l3_hdr_pad_offset);
  1024. /*
  1025. * MSDU cont bit is set but reported MPDU length can fit
  1026. * in to single buffer
  1027. *
  1028. * Increment error stats and avoid SG list creation
  1029. */
  1030. if (last_nbuf) {
  1031. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1032. qdf_nbuf_pull_head(parent,
  1033. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1034. return parent;
  1035. }
  1036. /*
  1037. * this is where we set the length of the fragments which are
  1038. * associated to the parent nbuf. We iterate through the frag_list
  1039. * till we hit the last_nbuf of the list.
  1040. */
  1041. do {
  1042. last_nbuf = dp_rx_adjust_nbuf_len(soc, nbuf, &mpdu_len, 0);
  1043. qdf_nbuf_pull_head(nbuf,
  1044. soc->rx_pkt_tlv_size);
  1045. frag_list_len += qdf_nbuf_len(nbuf);
  1046. if (last_nbuf) {
  1047. next = nbuf->next;
  1048. nbuf->next = NULL;
  1049. break;
  1050. }
  1051. nbuf = nbuf->next;
  1052. } while (!last_nbuf);
  1053. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1054. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1055. parent->next = next;
  1056. qdf_nbuf_pull_head(parent,
  1057. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1058. return parent;
  1059. }
  1060. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1061. #ifdef QCA_PEER_EXT_STATS
  1062. /*
  1063. * dp_rx_compute_tid_delay - Computer per TID delay stats
  1064. * @peer: DP soc context
  1065. * @nbuf: NBuffer
  1066. *
  1067. * Return: Void
  1068. */
  1069. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1070. qdf_nbuf_t nbuf)
  1071. {
  1072. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1073. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1074. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1075. }
  1076. #endif /* QCA_PEER_EXT_STATS */
  1077. /**
  1078. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1079. * to pass in correct fields
  1080. *
  1081. * @vdev: pdev handle
  1082. * @tx_desc: tx descriptor
  1083. * @tid: tid value
  1084. * Return: none
  1085. */
  1086. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1087. {
  1088. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1089. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1090. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1091. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1092. uint32_t interframe_delay =
  1093. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1094. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  1095. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1096. /*
  1097. * Update interframe delay stats calculated at deliver_data_ol point.
  1098. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1099. * interframe delay will not be calculate correctly for 1st frame.
  1100. * On the other side, this will help in avoiding extra per packet check
  1101. * of vdev->prev_rx_deliver_tstamp.
  1102. */
  1103. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1104. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1105. vdev->prev_rx_deliver_tstamp = current_ts;
  1106. }
  1107. /**
  1108. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1109. * @pdev: dp pdev reference
  1110. * @buf_list: buffer list to be dropepd
  1111. *
  1112. * Return: int (number of bufs dropped)
  1113. */
  1114. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1115. qdf_nbuf_t buf_list)
  1116. {
  1117. struct cdp_tid_rx_stats *stats = NULL;
  1118. uint8_t tid = 0, ring_id = 0;
  1119. int num_dropped = 0;
  1120. qdf_nbuf_t buf, next_buf;
  1121. buf = buf_list;
  1122. while (buf) {
  1123. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1124. next_buf = qdf_nbuf_queue_next(buf);
  1125. tid = qdf_nbuf_get_tid_val(buf);
  1126. if (qdf_likely(pdev)) {
  1127. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1128. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1129. stats->delivered_to_stack--;
  1130. }
  1131. qdf_nbuf_free(buf);
  1132. buf = next_buf;
  1133. num_dropped++;
  1134. }
  1135. return num_dropped;
  1136. }
  1137. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1138. /**
  1139. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1140. * @soc: core txrx main context
  1141. * @vdev: vdev
  1142. * @peer: peer
  1143. * @nbuf_head: skb list head
  1144. *
  1145. * Return: true if packet is delivered to netdev per STA.
  1146. */
  1147. static inline bool
  1148. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1149. struct dp_peer *peer, qdf_nbuf_t nbuf_head)
  1150. {
  1151. /*
  1152. * When extended WDS is disabled, frames are sent to AP netdevice.
  1153. */
  1154. if (qdf_likely(!vdev->wds_ext_enabled))
  1155. return false;
  1156. /*
  1157. * There can be 2 cases:
  1158. * 1. Send frame to parent netdev if its not for netdev per STA
  1159. * 2. If frame is meant for netdev per STA:
  1160. * a. Send frame to appropriate netdev using registered fp.
  1161. * b. If fp is NULL, drop the frames.
  1162. */
  1163. if (!peer->wds_ext.init)
  1164. return false;
  1165. if (peer->osif_rx)
  1166. peer->osif_rx(peer->wds_ext.osif_peer, nbuf_head);
  1167. else
  1168. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1169. return true;
  1170. }
  1171. #else
  1172. static inline bool
  1173. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1174. struct dp_peer *peer, qdf_nbuf_t nbuf_head)
  1175. {
  1176. return false;
  1177. }
  1178. #endif
  1179. #ifdef PEER_CACHE_RX_PKTS
  1180. /**
  1181. * dp_rx_flush_rx_cached() - flush cached rx frames
  1182. * @peer: peer
  1183. * @drop: flag to drop frames or forward to net stack
  1184. *
  1185. * Return: None
  1186. */
  1187. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1188. {
  1189. struct dp_peer_cached_bufq *bufqi;
  1190. struct dp_rx_cached_buf *cache_buf = NULL;
  1191. ol_txrx_rx_fp data_rx = NULL;
  1192. int num_buff_elem;
  1193. QDF_STATUS status;
  1194. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1195. qdf_atomic_dec(&peer->flush_in_progress);
  1196. return;
  1197. }
  1198. qdf_spin_lock_bh(&peer->peer_info_lock);
  1199. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1200. data_rx = peer->vdev->osif_rx;
  1201. else
  1202. drop = true;
  1203. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1204. bufqi = &peer->bufq_info;
  1205. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1206. qdf_list_remove_front(&bufqi->cached_bufq,
  1207. (qdf_list_node_t **)&cache_buf);
  1208. while (cache_buf) {
  1209. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1210. cache_buf->buf);
  1211. bufqi->entries -= num_buff_elem;
  1212. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1213. if (drop) {
  1214. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1215. cache_buf->buf);
  1216. } else {
  1217. /* Flush the cached frames to OSIF DEV */
  1218. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1219. if (status != QDF_STATUS_SUCCESS)
  1220. bufqi->dropped = dp_rx_drop_nbuf_list(
  1221. peer->vdev->pdev,
  1222. cache_buf->buf);
  1223. }
  1224. qdf_mem_free(cache_buf);
  1225. cache_buf = NULL;
  1226. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1227. qdf_list_remove_front(&bufqi->cached_bufq,
  1228. (qdf_list_node_t **)&cache_buf);
  1229. }
  1230. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1231. qdf_atomic_dec(&peer->flush_in_progress);
  1232. }
  1233. /**
  1234. * dp_rx_enqueue_rx() - cache rx frames
  1235. * @peer: peer
  1236. * @rx_buf_list: cache buffer list
  1237. *
  1238. * Return: None
  1239. */
  1240. static QDF_STATUS
  1241. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1242. {
  1243. struct dp_rx_cached_buf *cache_buf;
  1244. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1245. int num_buff_elem;
  1246. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1247. bufqi->dropped);
  1248. if (!peer->valid) {
  1249. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1250. rx_buf_list);
  1251. return QDF_STATUS_E_INVAL;
  1252. }
  1253. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1254. if (bufqi->entries >= bufqi->thresh) {
  1255. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1256. rx_buf_list);
  1257. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1258. return QDF_STATUS_E_RESOURCES;
  1259. }
  1260. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1261. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1262. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1263. if (!cache_buf) {
  1264. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1265. "Failed to allocate buf to cache rx frames");
  1266. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1267. rx_buf_list);
  1268. return QDF_STATUS_E_NOMEM;
  1269. }
  1270. cache_buf->buf = rx_buf_list;
  1271. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1272. qdf_list_insert_back(&bufqi->cached_bufq,
  1273. &cache_buf->node);
  1274. bufqi->entries += num_buff_elem;
  1275. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1276. return QDF_STATUS_SUCCESS;
  1277. }
  1278. static inline
  1279. bool dp_rx_is_peer_cache_bufq_supported(void)
  1280. {
  1281. return true;
  1282. }
  1283. #else
  1284. static inline
  1285. bool dp_rx_is_peer_cache_bufq_supported(void)
  1286. {
  1287. return false;
  1288. }
  1289. static inline QDF_STATUS
  1290. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1291. {
  1292. return QDF_STATUS_SUCCESS;
  1293. }
  1294. #endif
  1295. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1296. /**
  1297. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1298. * using the appropriate call back functions.
  1299. * @soc: soc
  1300. * @vdev: vdev
  1301. * @peer: peer
  1302. * @nbuf_head: skb list head
  1303. * @nbuf_tail: skb list tail
  1304. *
  1305. * Return: None
  1306. */
  1307. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1308. struct dp_vdev *vdev,
  1309. struct dp_peer *peer,
  1310. qdf_nbuf_t nbuf_head)
  1311. {
  1312. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1313. peer, nbuf_head)))
  1314. return;
  1315. /* Function pointer initialized only when FISA is enabled */
  1316. if (vdev->osif_fisa_rx)
  1317. /* on failure send it via regular path */
  1318. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1319. else
  1320. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1321. }
  1322. #else
  1323. /**
  1324. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1325. * using the appropriate call back functions.
  1326. * @soc: soc
  1327. * @vdev: vdev
  1328. * @peer: peer
  1329. * @nbuf_head: skb list head
  1330. * @nbuf_tail: skb list tail
  1331. *
  1332. * Check the return status of the call back function and drop
  1333. * the packets if the return status indicates a failure.
  1334. *
  1335. * Return: None
  1336. */
  1337. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1338. struct dp_vdev *vdev,
  1339. struct dp_peer *peer,
  1340. qdf_nbuf_t nbuf_head)
  1341. {
  1342. int num_nbuf = 0;
  1343. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1344. /* Function pointer initialized only when FISA is enabled */
  1345. if (vdev->osif_fisa_rx)
  1346. /* on failure send it via regular path */
  1347. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1348. else if (vdev->osif_rx)
  1349. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1350. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1351. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1352. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1353. if (peer)
  1354. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1355. }
  1356. }
  1357. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1358. /*
  1359. * dp_rx_validate_rx_callbacks() - validate rx callbacks
  1360. * @soc DP soc
  1361. * @vdev: DP vdev handle
  1362. * @peer: pointer to the peer object
  1363. * nbuf_head: skb list head
  1364. *
  1365. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  1366. * QDF_STATUS_E_FAILURE
  1367. */
  1368. static inline QDF_STATUS
  1369. dp_rx_validate_rx_callbacks(struct dp_soc *soc,
  1370. struct dp_vdev *vdev,
  1371. struct dp_peer *peer,
  1372. qdf_nbuf_t nbuf_head)
  1373. {
  1374. int num_nbuf;
  1375. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1376. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1377. /*
  1378. * This is a special case where vdev is invalid,
  1379. * so we cannot know the pdev to which this packet
  1380. * belonged. Hence we update the soc rx error stats.
  1381. */
  1382. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1383. return QDF_STATUS_E_FAILURE;
  1384. }
  1385. /*
  1386. * highly unlikely to have a vdev without a registered rx
  1387. * callback function. if so let us free the nbuf_list.
  1388. */
  1389. if (qdf_unlikely(!vdev->osif_rx)) {
  1390. if (peer && dp_rx_is_peer_cache_bufq_supported()) {
  1391. dp_rx_enqueue_rx(peer, nbuf_head);
  1392. } else {
  1393. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1394. nbuf_head);
  1395. DP_PEER_TO_STACK_DECC(peer, num_nbuf,
  1396. vdev->pdev->enhanced_stats_en);
  1397. }
  1398. return QDF_STATUS_E_FAILURE;
  1399. }
  1400. return QDF_STATUS_SUCCESS;
  1401. }
  1402. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1403. struct dp_vdev *vdev,
  1404. struct dp_peer *peer,
  1405. qdf_nbuf_t nbuf_head,
  1406. qdf_nbuf_t nbuf_tail)
  1407. {
  1408. if (dp_rx_validate_rx_callbacks(soc, vdev, peer, nbuf_head) !=
  1409. QDF_STATUS_SUCCESS)
  1410. return QDF_STATUS_E_FAILURE;
  1411. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1412. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1413. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1414. &nbuf_tail, peer->mac_addr.raw);
  1415. }
  1416. dp_rx_check_delivery_to_stack(soc, vdev, peer, nbuf_head);
  1417. return QDF_STATUS_SUCCESS;
  1418. }
  1419. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1420. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1421. struct dp_vdev *vdev,
  1422. struct dp_peer *peer,
  1423. qdf_nbuf_t nbuf_head,
  1424. qdf_nbuf_t nbuf_tail)
  1425. {
  1426. if (dp_rx_validate_rx_callbacks(soc, vdev, peer, nbuf_head) !=
  1427. QDF_STATUS_SUCCESS)
  1428. return QDF_STATUS_E_FAILURE;
  1429. vdev->osif_rx_eapol(vdev->osif_vdev, nbuf_head);
  1430. return QDF_STATUS_SUCCESS;
  1431. }
  1432. #endif
  1433. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1434. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1435. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer) \
  1436. { \
  1437. qdf_nbuf_t nbuf_local; \
  1438. struct dp_peer *peer_local; \
  1439. struct dp_vdev *vdev_local = vdev_hdl; \
  1440. do { \
  1441. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1442. break; \
  1443. nbuf_local = nbuf; \
  1444. peer_local = peer; \
  1445. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1446. break; \
  1447. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1448. break; \
  1449. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1450. (nbuf_local), \
  1451. (peer_local), 0, 1); \
  1452. } while (0); \
  1453. }
  1454. #else
  1455. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer)
  1456. #endif
  1457. /**
  1458. * dp_rx_msdu_stats_update() - update per msdu stats.
  1459. * @soc: core txrx main context
  1460. * @nbuf: pointer to the first msdu of an amsdu.
  1461. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1462. * @peer: pointer to the peer object.
  1463. * @ring_id: reo dest ring number on which pkt is reaped.
  1464. * @tid_stats: per tid rx stats.
  1465. *
  1466. * update all the per msdu stats for that nbuf.
  1467. * Return: void
  1468. */
  1469. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1470. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1471. uint8_t ring_id,
  1472. struct cdp_tid_rx_stats *tid_stats)
  1473. {
  1474. bool is_ampdu, is_not_amsdu;
  1475. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1476. struct dp_vdev *vdev = peer->vdev;
  1477. bool enh_flag;
  1478. qdf_ether_header_t *eh;
  1479. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1480. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, peer);
  1481. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1482. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1483. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1484. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1485. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1486. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1487. tid_stats->msdu_cnt++;
  1488. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1489. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1490. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1491. enh_flag = vdev->pdev->enhanced_stats_en;
  1492. DP_PEER_MC_INCC_PKT(peer, 1, msdu_len, enh_flag);
  1493. tid_stats->mcast_msdu_cnt++;
  1494. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1495. DP_PEER_BC_INCC_PKT(peer, 1, msdu_len, enh_flag);
  1496. tid_stats->bcast_msdu_cnt++;
  1497. }
  1498. }
  1499. /*
  1500. * currently we can return from here as we have similar stats
  1501. * updated at per ppdu level instead of msdu level
  1502. */
  1503. if (!soc->process_rx_status)
  1504. return;
  1505. peer->stats.rx.last_rx_ts = qdf_system_ticks();
  1506. /*
  1507. * TODO - For WCN7850 this field is present in ring_desc
  1508. * Try to use ring desc instead of tlv.
  1509. */
  1510. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(soc->hal_soc, rx_tlv_hdr);
  1511. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1512. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1513. sgi = hal_rx_tlv_sgi_get(soc->hal_soc, rx_tlv_hdr);
  1514. mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1515. tid = qdf_nbuf_get_tid_val(nbuf);
  1516. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1517. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1518. rx_tlv_hdr);
  1519. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1520. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1521. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[mcs], 1,
  1522. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1523. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1524. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1525. DP_STATS_INC(peer, rx.bw[bw], 1);
  1526. /*
  1527. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1528. * then increase index [nss - 1] in array counter.
  1529. */
  1530. if (nss > 0 && (pkt_type == DOT11_N ||
  1531. pkt_type == DOT11_AC ||
  1532. pkt_type == DOT11_AX))
  1533. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1534. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1535. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1536. hal_rx_tlv_mic_err_get(soc->hal_soc, rx_tlv_hdr));
  1537. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1538. hal_rx_tlv_decrypt_err_get(soc->hal_soc, rx_tlv_hdr));
  1539. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1540. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1541. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1542. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1543. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1544. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1545. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1546. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1547. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1548. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1549. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1550. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1551. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1552. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1553. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1554. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1555. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1556. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1557. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1558. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1559. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1560. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1561. }
  1562. #ifndef WDS_VENDOR_EXTENSION
  1563. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1564. struct dp_vdev *vdev,
  1565. struct dp_peer *peer)
  1566. {
  1567. return 1;
  1568. }
  1569. #endif
  1570. #ifdef RX_DESC_DEBUG_CHECK
  1571. /**
  1572. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1573. * corruption
  1574. *
  1575. * @ring_desc: REO ring descriptor
  1576. * @rx_desc: Rx descriptor
  1577. *
  1578. * Return: NONE
  1579. */
  1580. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1581. hal_ring_desc_t ring_desc,
  1582. struct dp_rx_desc *rx_desc)
  1583. {
  1584. struct hal_buf_info hbi;
  1585. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1586. /* Sanity check for possible buffer paddr corruption */
  1587. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  1588. return QDF_STATUS_SUCCESS;
  1589. return QDF_STATUS_E_FAILURE;
  1590. }
  1591. /**
  1592. * dp_rx_desc_nbuf_len_sanity_check - Add sanity check to catch Rx buffer
  1593. * out of bound access from H.W
  1594. *
  1595. * @soc: DP soc
  1596. * @pkt_len: Packet length received from H.W
  1597. *
  1598. * Return: NONE
  1599. */
  1600. static inline void
  1601. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc,
  1602. uint32_t pkt_len)
  1603. {
  1604. struct rx_desc_pool *rx_desc_pool;
  1605. rx_desc_pool = &soc->rx_desc_buf[0];
  1606. qdf_assert_always(pkt_len <= rx_desc_pool->buf_size);
  1607. }
  1608. #else
  1609. static inline void
  1610. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc, uint32_t pkt_len) { }
  1611. #endif
  1612. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1613. /**
  1614. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1615. * no corresbonding peer found
  1616. * @soc: core txrx main context
  1617. * @nbuf: pkt skb pointer
  1618. *
  1619. * This function will try to deliver some RX special frames to stack
  1620. * even there is no peer matched found. for instance, LFR case, some
  1621. * eapol data will be sent to host before peer_map done.
  1622. *
  1623. * Return: None
  1624. */
  1625. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1626. {
  1627. uint16_t peer_id;
  1628. uint8_t vdev_id;
  1629. struct dp_vdev *vdev = NULL;
  1630. uint32_t l2_hdr_offset = 0;
  1631. uint16_t msdu_len = 0;
  1632. uint32_t pkt_len = 0;
  1633. uint8_t *rx_tlv_hdr;
  1634. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  1635. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  1636. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1637. if (peer_id > soc->max_peer_id)
  1638. goto deliver_fail;
  1639. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1640. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  1641. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  1642. goto deliver_fail;
  1643. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  1644. goto deliver_fail;
  1645. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1646. l2_hdr_offset =
  1647. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1648. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1649. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  1650. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  1651. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1652. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size + l2_hdr_offset);
  1653. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  1654. qdf_nbuf_set_exc_frame(nbuf, 1);
  1655. if (QDF_STATUS_SUCCESS !=
  1656. vdev->osif_rx(vdev->osif_vdev, nbuf))
  1657. goto deliver_fail;
  1658. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1659. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  1660. return;
  1661. }
  1662. deliver_fail:
  1663. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1664. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1665. qdf_nbuf_free(nbuf);
  1666. if (vdev)
  1667. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  1668. }
  1669. #else
  1670. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1671. {
  1672. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1673. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1674. qdf_nbuf_free(nbuf);
  1675. }
  1676. #endif
  1677. /**
  1678. * dp_rx_srng_get_num_pending() - get number of pending entries
  1679. * @hal_soc: hal soc opaque pointer
  1680. * @hal_ring: opaque pointer to the HAL Rx Ring
  1681. * @num_entries: number of entries in the hal_ring.
  1682. * @near_full: pointer to a boolean. This is set if ring is near full.
  1683. *
  1684. * The function returns the number of entries in a destination ring which are
  1685. * yet to be reaped. The function also checks if the ring is near full.
  1686. * If more than half of the ring needs to be reaped, the ring is considered
  1687. * approaching full.
  1688. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1689. * entries. It should not be called within a SRNG lock. HW pointer value is
  1690. * synced into cached_hp.
  1691. *
  1692. * Return: Number of pending entries if any
  1693. */
  1694. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1695. hal_ring_handle_t hal_ring_hdl,
  1696. uint32_t num_entries,
  1697. bool *near_full)
  1698. {
  1699. uint32_t num_pending = 0;
  1700. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1701. hal_ring_hdl,
  1702. true);
  1703. if (num_entries && (num_pending >= num_entries >> 1))
  1704. *near_full = true;
  1705. else
  1706. *near_full = false;
  1707. return num_pending;
  1708. }
  1709. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1710. #ifdef WLAN_SUPPORT_RX_FISA
  1711. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  1712. {
  1713. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1714. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  1715. }
  1716. /**
  1717. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  1718. * @nbuf: pkt skb pointer
  1719. * @l3_padding: l3 padding
  1720. *
  1721. * Return: None
  1722. */
  1723. static inline
  1724. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1725. {
  1726. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1727. }
  1728. #else
  1729. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  1730. {
  1731. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  1732. }
  1733. static inline
  1734. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1735. {
  1736. }
  1737. #endif
  1738. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1739. #ifdef DP_RX_DROP_RAW_FRM
  1740. /**
  1741. * dp_rx_is_raw_frame_dropped() - if raw frame nbuf, free and drop
  1742. * @nbuf: pkt skb pointer
  1743. *
  1744. * Return: true - raw frame, dropped
  1745. * false - not raw frame, do nothing
  1746. */
  1747. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1748. {
  1749. if (qdf_nbuf_is_raw_frame(nbuf)) {
  1750. qdf_nbuf_free(nbuf);
  1751. return true;
  1752. }
  1753. return false;
  1754. }
  1755. #endif
  1756. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1757. /**
  1758. * dp_rx_ring_record_entry() - Record an entry into the rx ring history.
  1759. * @soc: Datapath soc structure
  1760. * @ring_num: REO ring number
  1761. * @ring_desc: REO ring descriptor
  1762. *
  1763. * Returns: None
  1764. */
  1765. void
  1766. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1767. hal_ring_desc_t ring_desc)
  1768. {
  1769. struct dp_buf_info_record *record;
  1770. struct hal_buf_info hbi;
  1771. uint32_t idx;
  1772. if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
  1773. return;
  1774. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1775. /* buffer_addr_info is the first element of ring_desc */
  1776. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,
  1777. &hbi);
  1778. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  1779. DP_RX_HIST_MAX);
  1780. /* No NULL check needed for record since its an array */
  1781. record = &soc->rx_ring_history[ring_num]->entry[idx];
  1782. record->timestamp = qdf_get_log_timestamp();
  1783. record->hbi.paddr = hbi.paddr;
  1784. record->hbi.sw_cookie = hbi.sw_cookie;
  1785. record->hbi.rbm = hbi.rbm;
  1786. }
  1787. #endif
  1788. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1789. /**
  1790. * dp_rx_update_stats() - Update soc level rx packet count
  1791. * @soc: DP soc handle
  1792. * @nbuf: nbuf received
  1793. *
  1794. * Returns: none
  1795. */
  1796. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1797. {
  1798. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  1799. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1800. }
  1801. #endif
  1802. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  1803. /**
  1804. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  1805. * @soc : dp_soc handle
  1806. * @pdev: dp_pdev handle
  1807. * @peer_id: peer_id of the peer for which completion came
  1808. * @ppdu_id: ppdu_id
  1809. * @netbuf: Buffer pointer
  1810. *
  1811. * This function is used to deliver rx packet to packet capture
  1812. */
  1813. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1814. uint16_t peer_id, uint32_t is_offload,
  1815. qdf_nbuf_t netbuf)
  1816. {
  1817. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  1818. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA, soc, netbuf,
  1819. peer_id, is_offload, pdev->pdev_id);
  1820. }
  1821. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1822. uint32_t is_offload)
  1823. {
  1824. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  1825. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA_NO_PEER,
  1826. soc, nbuf, HTT_INVALID_VDEV,
  1827. is_offload, 0);
  1828. }
  1829. #endif
  1830. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1831. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  1832. {
  1833. QDF_STATUS ret;
  1834. if (vdev->osif_rx_flush) {
  1835. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  1836. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  1837. dp_err("Failed to flush rx pkts for vdev %d\n",
  1838. vdev->vdev_id);
  1839. return ret;
  1840. }
  1841. }
  1842. return QDF_STATUS_SUCCESS;
  1843. }
  1844. static QDF_STATUS
  1845. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  1846. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  1847. struct dp_pdev *dp_pdev,
  1848. struct rx_desc_pool *rx_desc_pool)
  1849. {
  1850. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1851. (nbuf_frag_info_t->virt_addr).nbuf =
  1852. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  1853. RX_BUFFER_RESERVATION,
  1854. rx_desc_pool->buf_alignment, FALSE);
  1855. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  1856. dp_err("nbuf alloc failed");
  1857. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  1858. return ret;
  1859. }
  1860. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  1861. (nbuf_frag_info_t->virt_addr).nbuf,
  1862. QDF_DMA_FROM_DEVICE,
  1863. rx_desc_pool->buf_size);
  1864. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1865. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  1866. dp_err("nbuf map failed");
  1867. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  1868. return ret;
  1869. }
  1870. nbuf_frag_info_t->paddr =
  1871. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  1872. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  1873. &nbuf_frag_info_t->paddr,
  1874. rx_desc_pool);
  1875. if (ret == QDF_STATUS_E_FAILURE) {
  1876. dp_err("nbuf check x86 failed");
  1877. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  1878. return ret;
  1879. }
  1880. return QDF_STATUS_SUCCESS;
  1881. }
  1882. QDF_STATUS
  1883. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1884. struct dp_srng *dp_rxdma_srng,
  1885. struct rx_desc_pool *rx_desc_pool,
  1886. uint32_t num_req_buffers)
  1887. {
  1888. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  1889. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  1890. union dp_rx_desc_list_elem_t *next;
  1891. void *rxdma_ring_entry;
  1892. qdf_dma_addr_t paddr;
  1893. struct dp_rx_nbuf_frag_info *nf_info;
  1894. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  1895. uint32_t buffer_index, nbuf_ptrs_per_page;
  1896. qdf_nbuf_t nbuf;
  1897. QDF_STATUS ret;
  1898. int page_idx, total_pages;
  1899. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1900. union dp_rx_desc_list_elem_t *tail = NULL;
  1901. int sync_hw_ptr = 1;
  1902. uint32_t num_entries_avail;
  1903. if (qdf_unlikely(!dp_pdev)) {
  1904. dp_rx_err("%pK: pdev is null for mac_id = %d",
  1905. dp_soc, mac_id);
  1906. return QDF_STATUS_E_FAILURE;
  1907. }
  1908. if (qdf_unlikely(!rxdma_srng)) {
  1909. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1910. return QDF_STATUS_E_FAILURE;
  1911. }
  1912. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  1913. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1914. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  1915. rxdma_srng,
  1916. sync_hw_ptr);
  1917. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  1918. if (!num_entries_avail) {
  1919. dp_err("Num of available entries is zero, nothing to do");
  1920. return QDF_STATUS_E_NOMEM;
  1921. }
  1922. if (num_entries_avail < num_req_buffers)
  1923. num_req_buffers = num_entries_avail;
  1924. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  1925. num_req_buffers, &desc_list, &tail);
  1926. if (!nr_descs) {
  1927. dp_err("no free rx_descs in freelist");
  1928. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  1929. return QDF_STATUS_E_NOMEM;
  1930. }
  1931. dp_debug("got %u RX descs for driver attach", nr_descs);
  1932. /*
  1933. * Try to allocate pointers to the nbuf one page at a time.
  1934. * Take pointers that can fit in one page of memory and
  1935. * iterate through the total descriptors that need to be
  1936. * allocated in order of pages. Reuse the pointers that
  1937. * have been allocated to fit in one page across each
  1938. * iteration to index into the nbuf.
  1939. */
  1940. total_pages = (nr_descs * sizeof(*nf_info)) / PAGE_SIZE;
  1941. /*
  1942. * Add an extra page to store the remainder if any
  1943. */
  1944. if ((nr_descs * sizeof(*nf_info)) % PAGE_SIZE)
  1945. total_pages++;
  1946. nf_info = qdf_mem_malloc(PAGE_SIZE);
  1947. if (!nf_info) {
  1948. dp_err("failed to allocate nbuf array");
  1949. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1950. QDF_BUG(0);
  1951. return QDF_STATUS_E_NOMEM;
  1952. }
  1953. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*nf_info);
  1954. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  1955. qdf_mem_zero(nf_info, PAGE_SIZE);
  1956. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  1957. /*
  1958. * The last page of buffer pointers may not be required
  1959. * completely based on the number of descriptors. Below
  1960. * check will ensure we are allocating only the
  1961. * required number of descriptors.
  1962. */
  1963. if (nr_nbuf_total >= nr_descs)
  1964. break;
  1965. /* Flag is set while pdev rx_desc_pool initialization */
  1966. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  1967. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  1968. &nf_info[nr_nbuf], dp_pdev,
  1969. rx_desc_pool);
  1970. else
  1971. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  1972. &nf_info[nr_nbuf], dp_pdev,
  1973. rx_desc_pool);
  1974. if (QDF_IS_STATUS_ERROR(ret))
  1975. break;
  1976. nr_nbuf_total++;
  1977. }
  1978. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1979. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  1980. rxdma_ring_entry =
  1981. hal_srng_src_get_next(dp_soc->hal_soc,
  1982. rxdma_srng);
  1983. qdf_assert_always(rxdma_ring_entry);
  1984. next = desc_list->next;
  1985. paddr = nf_info[buffer_index].paddr;
  1986. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  1987. /* Flag is set while pdev rx_desc_pool initialization */
  1988. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  1989. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  1990. &nf_info[buffer_index]);
  1991. else
  1992. dp_rx_desc_prep(&desc_list->rx_desc,
  1993. &nf_info[buffer_index]);
  1994. desc_list->rx_desc.in_use = 1;
  1995. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  1996. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  1997. __func__,
  1998. RX_DESC_REPLENISHED);
  1999. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc ,rxdma_ring_entry, paddr,
  2000. desc_list->rx_desc.cookie,
  2001. rx_desc_pool->owner);
  2002. dp_ipa_handle_rx_buf_smmu_mapping(
  2003. dp_soc, nbuf,
  2004. rx_desc_pool->buf_size,
  2005. true);
  2006. desc_list = next;
  2007. }
  2008. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id,
  2009. rxdma_srng, nr_nbuf, nr_nbuf);
  2010. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2011. }
  2012. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2013. qdf_mem_free(nf_info);
  2014. if (!nr_nbuf_total) {
  2015. dp_err("No nbuf's allocated");
  2016. QDF_BUG(0);
  2017. return QDF_STATUS_E_RESOURCES;
  2018. }
  2019. /* No need to count the number of bytes received during replenish.
  2020. * Therefore set replenish.pkts.bytes as 0.
  2021. */
  2022. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2023. return QDF_STATUS_SUCCESS;
  2024. }
  2025. qdf_export_symbol(dp_pdev_rx_buffers_attach);
  2026. /**
  2027. * dp_rx_enable_mon_dest_frag() - Enable frag processing for
  2028. * monitor destination ring via frag.
  2029. *
  2030. * Enable this flag only for monitor destination buffer processing
  2031. * if DP_RX_MON_MEM_FRAG feature is enabled.
  2032. * If flag is set then frag based function will be called for alloc,
  2033. * map, prep desc and free ops for desc buffer else normal nbuf based
  2034. * function will be called.
  2035. *
  2036. * @rx_desc_pool: Rx desc pool
  2037. * @is_mon_dest_desc: Is it for monitor dest buffer
  2038. *
  2039. * Return: None
  2040. */
  2041. #ifdef DP_RX_MON_MEM_FRAG
  2042. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2043. bool is_mon_dest_desc)
  2044. {
  2045. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2046. if (is_mon_dest_desc)
  2047. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2048. }
  2049. #else
  2050. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2051. bool is_mon_dest_desc)
  2052. {
  2053. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2054. if (is_mon_dest_desc)
  2055. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2056. }
  2057. #endif
  2058. qdf_export_symbol(dp_rx_enable_mon_dest_frag);
  2059. /*
  2060. * dp_rx_pdev_desc_pool_alloc() - allocate memory for software rx descriptor
  2061. * pool
  2062. *
  2063. * @pdev: core txrx pdev context
  2064. *
  2065. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2066. * QDF_STATUS_E_NOMEM
  2067. */
  2068. QDF_STATUS
  2069. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2070. {
  2071. struct dp_soc *soc = pdev->soc;
  2072. uint32_t rxdma_entries;
  2073. uint32_t rx_sw_desc_num;
  2074. struct dp_srng *dp_rxdma_srng;
  2075. struct rx_desc_pool *rx_desc_pool;
  2076. uint32_t status = QDF_STATUS_SUCCESS;
  2077. int mac_for_pdev;
  2078. mac_for_pdev = pdev->lmac_id;
  2079. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2080. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2081. soc, mac_for_pdev);
  2082. return status;
  2083. }
  2084. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2085. rxdma_entries = dp_rxdma_srng->num_entries;
  2086. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2087. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2088. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2089. status = dp_rx_desc_pool_alloc(soc,
  2090. rx_sw_desc_num,
  2091. rx_desc_pool);
  2092. if (status != QDF_STATUS_SUCCESS)
  2093. return status;
  2094. return status;
  2095. }
  2096. /*
  2097. * dp_rx_pdev_desc_pool_free() - free software rx descriptor pool
  2098. *
  2099. * @pdev: core txrx pdev context
  2100. */
  2101. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2102. {
  2103. int mac_for_pdev = pdev->lmac_id;
  2104. struct dp_soc *soc = pdev->soc;
  2105. struct rx_desc_pool *rx_desc_pool;
  2106. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2107. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2108. }
  2109. /*
  2110. * dp_rx_pdev_desc_pool_init() - initialize software rx descriptors
  2111. *
  2112. * @pdev: core txrx pdev context
  2113. *
  2114. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2115. * QDF_STATUS_E_NOMEM
  2116. */
  2117. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2118. {
  2119. int mac_for_pdev = pdev->lmac_id;
  2120. struct dp_soc *soc = pdev->soc;
  2121. uint32_t rxdma_entries;
  2122. uint32_t rx_sw_desc_num;
  2123. struct dp_srng *dp_rxdma_srng;
  2124. struct rx_desc_pool *rx_desc_pool;
  2125. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2126. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2127. /**
  2128. * If NSS is enabled, rx_desc_pool is already filled.
  2129. * Hence, just disable desc_pool frag flag.
  2130. */
  2131. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2132. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2133. soc, mac_for_pdev);
  2134. return QDF_STATUS_SUCCESS;
  2135. }
  2136. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2137. return QDF_STATUS_E_NOMEM;
  2138. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2139. rxdma_entries = dp_rxdma_srng->num_entries;
  2140. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2141. rx_sw_desc_num =
  2142. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2143. rx_desc_pool->owner = dp_rx_get_rx_bm_id(soc);
  2144. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2145. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2146. /* Disable monitor dest processing via frag */
  2147. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2148. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2149. rx_sw_desc_num, rx_desc_pool);
  2150. return QDF_STATUS_SUCCESS;
  2151. }
  2152. /*
  2153. * dp_rx_pdev_desc_pool_deinit() - de-initialize software rx descriptor pools
  2154. * @pdev: core txrx pdev context
  2155. *
  2156. * This function resets the freelist of rx descriptors and destroys locks
  2157. * associated with this list of descriptors.
  2158. */
  2159. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2160. {
  2161. int mac_for_pdev = pdev->lmac_id;
  2162. struct dp_soc *soc = pdev->soc;
  2163. struct rx_desc_pool *rx_desc_pool;
  2164. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2165. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_for_pdev);
  2166. }
  2167. /*
  2168. * dp_rx_pdev_buffers_alloc() - Allocate nbufs (skbs) and replenish RxDMA ring
  2169. *
  2170. * @pdev: core txrx pdev context
  2171. *
  2172. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2173. * QDF_STATUS_E_NOMEM
  2174. */
  2175. QDF_STATUS
  2176. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2177. {
  2178. int mac_for_pdev = pdev->lmac_id;
  2179. struct dp_soc *soc = pdev->soc;
  2180. struct dp_srng *dp_rxdma_srng;
  2181. struct rx_desc_pool *rx_desc_pool;
  2182. uint32_t rxdma_entries;
  2183. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2184. rxdma_entries = dp_rxdma_srng->num_entries;
  2185. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2186. /* Initialize RX buffer pool which will be
  2187. * used during low memory conditions
  2188. */
  2189. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2190. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev, dp_rxdma_srng,
  2191. rx_desc_pool, rxdma_entries - 1);
  2192. }
  2193. /*
  2194. * dp_rx_pdev_buffers_free - Free nbufs (skbs)
  2195. *
  2196. * @pdev: core txrx pdev context
  2197. */
  2198. void
  2199. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2200. {
  2201. int mac_for_pdev = pdev->lmac_id;
  2202. struct dp_soc *soc = pdev->soc;
  2203. struct rx_desc_pool *rx_desc_pool;
  2204. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2205. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2206. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2207. }
  2208. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2209. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  2210. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2211. uint8_t *rx_tlv_hdr)
  2212. {
  2213. uint32_t l2_hdr_offset = 0;
  2214. uint16_t msdu_len = 0;
  2215. uint32_t skip_len;
  2216. l2_hdr_offset =
  2217. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2218. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2219. skip_len = l2_hdr_offset;
  2220. } else {
  2221. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2222. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  2223. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2224. }
  2225. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2226. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2227. qdf_nbuf_pull_head(nbuf, skip_len);
  2228. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2229. dp_info("special frame, mpdu sn 0x%x",
  2230. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  2231. qdf_nbuf_set_exc_frame(nbuf, 1);
  2232. dp_rx_deliver_to_stack(soc, peer->vdev, peer,
  2233. nbuf, NULL);
  2234. return true;
  2235. }
  2236. return false;
  2237. }
  2238. #endif