dp_main.c 182 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include <qdf_util.h>
  38. #include "dp_peer.h"
  39. #include "dp_rx_mon.h"
  40. #include "htt_stats.h"
  41. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  42. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  43. #include "cdp_txrx_flow_ctrl_v2.h"
  44. #else
  45. static inline void
  46. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  47. {
  48. return;
  49. }
  50. #endif
  51. #include "dp_ipa.h"
  52. #ifdef CONFIG_MCL
  53. static void dp_service_mon_rings(void *arg);
  54. #ifndef REMOVE_PKT_LOG
  55. #include <pktlog_ac_api.h>
  56. #include <pktlog_ac.h>
  57. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  58. #endif
  59. #endif
  60. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  61. #define DP_INTR_POLL_TIMER_MS 10
  62. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  63. #define DP_MCS_LENGTH (6*MAX_MCS)
  64. #define DP_NSS_LENGTH (6*SS_COUNT)
  65. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  66. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  67. #define DP_MAX_MCS_STRING_LEN 30
  68. #define DP_CURR_FW_STATS_AVAIL 19
  69. #define DP_HTT_DBG_EXT_STATS_MAX 256
  70. #ifdef IPA_OFFLOAD
  71. /* Exclude IPA rings from the interrupt context */
  72. #define TX_RING_MASK_VAL 0xb
  73. #define RX_RING_MASK_VAL 0x7
  74. #else
  75. #define TX_RING_MASK_VAL 0xF
  76. #define RX_RING_MASK_VAL 0xF
  77. #endif
  78. bool rx_hash = 1;
  79. qdf_declare_param(rx_hash, bool);
  80. #define STR_MAXLEN 64
  81. #define DP_PPDU_STATS_CFG_ALL 0xffff
  82. /**
  83. * default_dscp_tid_map - Default DSCP-TID mapping
  84. *
  85. * DSCP TID AC
  86. * 000000 0 WME_AC_BE
  87. * 001000 1 WME_AC_BK
  88. * 010000 1 WME_AC_BK
  89. * 011000 0 WME_AC_BE
  90. * 100000 5 WME_AC_VI
  91. * 101000 5 WME_AC_VI
  92. * 110000 6 WME_AC_VO
  93. * 111000 6 WME_AC_VO
  94. */
  95. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  96. 0, 0, 0, 0, 0, 0, 0, 0,
  97. 1, 1, 1, 1, 1, 1, 1, 1,
  98. 1, 1, 1, 1, 1, 1, 1, 1,
  99. 0, 0, 0, 0, 0, 0, 0, 0,
  100. 5, 5, 5, 5, 5, 5, 5, 5,
  101. 5, 5, 5, 5, 5, 5, 5, 5,
  102. 6, 6, 6, 6, 6, 6, 6, 6,
  103. 6, 6, 6, 6, 6, 6, 6, 6,
  104. };
  105. /*
  106. * struct dp_rate_debug
  107. *
  108. * @mcs_type: print string for a given mcs
  109. * @valid: valid mcs rate?
  110. */
  111. struct dp_rate_debug {
  112. char mcs_type[DP_MAX_MCS_STRING_LEN];
  113. uint8_t valid;
  114. };
  115. #define MCS_VALID 1
  116. #define MCS_INVALID 0
  117. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  118. {
  119. {"OFDM 48 Mbps", MCS_VALID},
  120. {"OFDM 24 Mbps", MCS_VALID},
  121. {"OFDM 12 Mbps", MCS_VALID},
  122. {"OFDM 6 Mbps ", MCS_VALID},
  123. {"OFDM 54 Mbps", MCS_VALID},
  124. {"OFDM 36 Mbps", MCS_VALID},
  125. {"OFDM 18 Mbps", MCS_VALID},
  126. {"OFDM 9 Mbps ", MCS_VALID},
  127. {"INVALID ", MCS_INVALID},
  128. {"INVALID ", MCS_INVALID},
  129. {"INVALID ", MCS_INVALID},
  130. {"INVALID ", MCS_INVALID},
  131. {"INVALID ", MCS_VALID},
  132. },
  133. {
  134. {"CCK 11 Mbps Long ", MCS_VALID},
  135. {"CCK 5.5 Mbps Long ", MCS_VALID},
  136. {"CCK 2 Mbps Long ", MCS_VALID},
  137. {"CCK 1 Mbps Long ", MCS_VALID},
  138. {"CCK 11 Mbps Short ", MCS_VALID},
  139. {"CCK 5.5 Mbps Short", MCS_VALID},
  140. {"CCK 2 Mbps Short ", MCS_VALID},
  141. {"INVALID ", MCS_INVALID},
  142. {"INVALID ", MCS_INVALID},
  143. {"INVALID ", MCS_INVALID},
  144. {"INVALID ", MCS_INVALID},
  145. {"INVALID ", MCS_INVALID},
  146. {"INVALID ", MCS_VALID},
  147. },
  148. {
  149. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  150. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  151. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  152. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  153. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  154. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  155. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  156. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  157. {"INVALID ", MCS_INVALID},
  158. {"INVALID ", MCS_INVALID},
  159. {"INVALID ", MCS_INVALID},
  160. {"INVALID ", MCS_INVALID},
  161. {"INVALID ", MCS_VALID},
  162. },
  163. {
  164. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  165. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  166. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  167. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  168. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  169. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  170. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  171. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  172. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  173. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  174. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  175. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  176. {"INVALID ", MCS_VALID},
  177. },
  178. {
  179. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  180. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  181. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  182. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  183. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  184. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  185. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  186. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  187. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  188. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  189. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  190. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  191. {"INVALID ", MCS_VALID},
  192. }
  193. };
  194. /**
  195. * @brief Cpu ring map types
  196. */
  197. enum dp_cpu_ring_map_types {
  198. DP_DEFAULT_MAP,
  199. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  200. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  201. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  202. DP_CPU_RING_MAP_MAX
  203. };
  204. /**
  205. * @brief Cpu to tx ring map
  206. */
  207. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  208. {0x0, 0x1, 0x2, 0x0},
  209. {0x1, 0x2, 0x1, 0x2},
  210. {0x0, 0x2, 0x0, 0x2},
  211. {0x2, 0x2, 0x2, 0x2}
  212. };
  213. /**
  214. * @brief Select the type of statistics
  215. */
  216. enum dp_stats_type {
  217. STATS_FW = 0,
  218. STATS_HOST = 1,
  219. STATS_TYPE_MAX = 2,
  220. };
  221. /**
  222. * @brief General Firmware statistics options
  223. *
  224. */
  225. enum dp_fw_stats {
  226. TXRX_FW_STATS_INVALID = -1,
  227. };
  228. /**
  229. * dp_stats_mapping_table - Firmware and Host statistics
  230. * currently supported
  231. */
  232. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  233. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  234. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  235. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  236. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  237. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  238. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  239. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  240. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  241. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  242. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  243. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  244. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  245. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  246. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  247. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  248. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  249. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  250. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  252. /* Last ENUM for HTT FW STATS */
  253. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  254. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  255. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  256. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  257. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  258. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  259. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  260. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  261. };
  262. /**
  263. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  264. * @ring_num: ring num of the ring being queried
  265. * @grp_mask: the grp_mask array for the ring type in question.
  266. *
  267. * The grp_mask array is indexed by group number and the bit fields correspond
  268. * to ring numbers. We are finding which interrupt group a ring belongs to.
  269. *
  270. * Return: the index in the grp_mask array with the ring number.
  271. * -QDF_STATUS_E_NOENT if no entry is found
  272. */
  273. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  274. {
  275. int ext_group_num;
  276. int mask = 1 << ring_num;
  277. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  278. ext_group_num++) {
  279. if (mask & grp_mask[ext_group_num])
  280. return ext_group_num;
  281. }
  282. return -QDF_STATUS_E_NOENT;
  283. }
  284. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  285. enum hal_ring_type ring_type,
  286. int ring_num)
  287. {
  288. int *grp_mask;
  289. switch (ring_type) {
  290. case WBM2SW_RELEASE:
  291. /* dp_tx_comp_handler - soc->tx_comp_ring */
  292. if (ring_num < 3)
  293. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  294. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  295. else if (ring_num == 3) {
  296. /* sw treats this as a separate ring type */
  297. grp_mask = &soc->wlan_cfg_ctx->
  298. int_rx_wbm_rel_ring_mask[0];
  299. ring_num = 0;
  300. } else {
  301. qdf_assert(0);
  302. return -QDF_STATUS_E_NOENT;
  303. }
  304. break;
  305. case REO_EXCEPTION:
  306. /* dp_rx_err_process - &soc->reo_exception_ring */
  307. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  308. break;
  309. case REO_DST:
  310. /* dp_rx_process - soc->reo_dest_ring */
  311. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  312. break;
  313. case REO_STATUS:
  314. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  315. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  316. break;
  317. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  318. case RXDMA_MONITOR_STATUS:
  319. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  320. case RXDMA_MONITOR_DST:
  321. /* dp_mon_process */
  322. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  323. break;
  324. case RXDMA_DST:
  325. /* dp_rxdma_err_process */
  326. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  327. break;
  328. case RXDMA_BUF:
  329. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  330. break;
  331. case RXDMA_MONITOR_BUF:
  332. /* TODO: support low_thresh interrupt */
  333. return -QDF_STATUS_E_NOENT;
  334. break;
  335. case TCL_DATA:
  336. case TCL_CMD:
  337. case REO_CMD:
  338. case SW2WBM_RELEASE:
  339. case WBM_IDLE_LINK:
  340. /* normally empty SW_TO_HW rings */
  341. return -QDF_STATUS_E_NOENT;
  342. break;
  343. case TCL_STATUS:
  344. case REO_REINJECT:
  345. /* misc unused rings */
  346. return -QDF_STATUS_E_NOENT;
  347. break;
  348. case CE_SRC:
  349. case CE_DST:
  350. case CE_DST_STATUS:
  351. /* CE_rings - currently handled by hif */
  352. default:
  353. return -QDF_STATUS_E_NOENT;
  354. break;
  355. }
  356. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  357. }
  358. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  359. *ring_params, int ring_type, int ring_num)
  360. {
  361. int msi_group_number;
  362. int msi_data_count;
  363. int ret;
  364. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  365. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  366. &msi_data_count, &msi_data_start,
  367. &msi_irq_start);
  368. if (ret)
  369. return;
  370. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  371. ring_num);
  372. if (msi_group_number < 0) {
  373. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  374. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  375. ring_type, ring_num);
  376. ring_params->msi_addr = 0;
  377. ring_params->msi_data = 0;
  378. return;
  379. }
  380. if (msi_group_number > msi_data_count) {
  381. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  382. FL("2 msi_groups will share an msi; msi_group_num %d"),
  383. msi_group_number);
  384. QDF_ASSERT(0);
  385. }
  386. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  387. ring_params->msi_addr = addr_low;
  388. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  389. ring_params->msi_data = (msi_group_number % msi_data_count)
  390. + msi_data_start;
  391. ring_params->flags |= HAL_SRNG_MSI_INTR;
  392. }
  393. /**
  394. * dp_print_ast_stats() - Dump AST table contents
  395. * @soc: Datapath soc handle
  396. *
  397. * return void
  398. */
  399. #ifdef FEATURE_WDS
  400. static void dp_print_ast_stats(struct dp_soc *soc)
  401. {
  402. uint8_t i;
  403. uint8_t num_entries = 0;
  404. struct dp_vdev *vdev;
  405. struct dp_pdev *pdev;
  406. struct dp_peer *peer;
  407. struct dp_ast_entry *ase, *tmp_ase;
  408. DP_PRINT_STATS("AST Stats:");
  409. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  410. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  411. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  412. DP_PRINT_STATS("AST Table:");
  413. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  414. pdev = soc->pdev_list[i];
  415. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  416. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  417. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  418. DP_PRINT_STATS("%6d mac_addr = %pM"
  419. " peer_mac_addr = %pM"
  420. " type = %d"
  421. " next_hop = %d"
  422. " is_active = %d"
  423. " is_bss = %d",
  424. ++num_entries,
  425. ase->mac_addr.raw,
  426. ase->peer->mac_addr.raw,
  427. ase->type,
  428. ase->next_hop,
  429. ase->is_active,
  430. ase->is_bss);
  431. }
  432. }
  433. }
  434. }
  435. }
  436. #else
  437. static void dp_print_ast_stats(struct dp_soc *soc)
  438. {
  439. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_WDS");
  440. return;
  441. }
  442. #endif
  443. /*
  444. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  445. */
  446. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  447. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  448. {
  449. void *hal_soc = soc->hal_soc;
  450. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  451. /* TODO: See if we should get align size from hal */
  452. uint32_t ring_base_align = 8;
  453. struct hal_srng_params ring_params;
  454. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  455. /* TODO: Currently hal layer takes care of endianness related settings.
  456. * See if these settings need to passed from DP layer
  457. */
  458. ring_params.flags = 0;
  459. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  460. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  461. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  462. srng->hal_srng = NULL;
  463. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  464. srng->num_entries = num_entries;
  465. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  466. soc->osdev, soc->osdev->dev, srng->alloc_size,
  467. &(srng->base_paddr_unaligned));
  468. if (!srng->base_vaddr_unaligned) {
  469. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  470. FL("alloc failed - ring_type: %d, ring_num %d"),
  471. ring_type, ring_num);
  472. return QDF_STATUS_E_NOMEM;
  473. }
  474. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  475. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  476. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  477. ((unsigned long)(ring_params.ring_base_vaddr) -
  478. (unsigned long)srng->base_vaddr_unaligned);
  479. ring_params.num_entries = num_entries;
  480. if (soc->intr_mode == DP_INTR_MSI) {
  481. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  482. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  483. FL("Using MSI for ring_type: %d, ring_num %d"),
  484. ring_type, ring_num);
  485. } else {
  486. ring_params.msi_data = 0;
  487. ring_params.msi_addr = 0;
  488. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  489. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  490. ring_type, ring_num);
  491. }
  492. /*
  493. * Setup interrupt timer and batch counter thresholds for
  494. * interrupt mitigation based on ring type
  495. */
  496. if (ring_type == REO_DST) {
  497. ring_params.intr_timer_thres_us =
  498. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  499. ring_params.intr_batch_cntr_thres_entries =
  500. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  501. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  502. ring_params.intr_timer_thres_us =
  503. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  504. ring_params.intr_batch_cntr_thres_entries =
  505. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  506. } else {
  507. ring_params.intr_timer_thres_us =
  508. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  509. ring_params.intr_batch_cntr_thres_entries =
  510. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  511. }
  512. /* Enable low threshold interrupts for rx buffer rings (regular and
  513. * monitor buffer rings.
  514. * TODO: See if this is required for any other ring
  515. */
  516. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  517. /* TODO: Setting low threshold to 1/8th of ring size
  518. * see if this needs to be configurable
  519. */
  520. ring_params.low_threshold = num_entries >> 3;
  521. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  522. ring_params.intr_timer_thres_us = 0x1000;
  523. }
  524. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  525. mac_id, &ring_params);
  526. if (!srng->hal_srng) {
  527. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  528. srng->alloc_size,
  529. srng->base_vaddr_unaligned,
  530. srng->base_paddr_unaligned, 0);
  531. }
  532. return 0;
  533. }
  534. /**
  535. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  536. * Any buffers allocated and attached to ring entries are expected to be freed
  537. * before calling this function.
  538. */
  539. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  540. int ring_type, int ring_num)
  541. {
  542. if (!srng->hal_srng) {
  543. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  544. FL("Ring type: %d, num:%d not setup"),
  545. ring_type, ring_num);
  546. return;
  547. }
  548. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  549. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  550. srng->alloc_size,
  551. srng->base_vaddr_unaligned,
  552. srng->base_paddr_unaligned, 0);
  553. srng->hal_srng = NULL;
  554. }
  555. /* TODO: Need this interface from HIF */
  556. void *hif_get_hal_handle(void *hif_handle);
  557. /*
  558. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  559. * @dp_ctx: DP SOC handle
  560. * @budget: Number of frames/descriptors that can be processed in one shot
  561. *
  562. * Return: remaining budget/quota for the soc device
  563. */
  564. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  565. {
  566. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  567. struct dp_soc *soc = int_ctx->soc;
  568. int ring = 0;
  569. uint32_t work_done = 0;
  570. int budget = dp_budget;
  571. uint8_t tx_mask = int_ctx->tx_ring_mask;
  572. uint8_t rx_mask = int_ctx->rx_ring_mask;
  573. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  574. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  575. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  576. uint32_t remaining_quota = dp_budget;
  577. struct dp_pdev *pdev = NULL;
  578. /* Process Tx completion interrupts first to return back buffers */
  579. while (tx_mask) {
  580. if (tx_mask & 0x1) {
  581. work_done = dp_tx_comp_handler(soc,
  582. soc->tx_comp_ring[ring].hal_srng,
  583. remaining_quota);
  584. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  585. "tx mask 0x%x ring %d, budget %d, work_done %d",
  586. tx_mask, ring, budget, work_done);
  587. budget -= work_done;
  588. if (budget <= 0)
  589. goto budget_done;
  590. remaining_quota = budget;
  591. }
  592. tx_mask = tx_mask >> 1;
  593. ring++;
  594. }
  595. /* Process REO Exception ring interrupt */
  596. if (rx_err_mask) {
  597. work_done = dp_rx_err_process(soc,
  598. soc->reo_exception_ring.hal_srng,
  599. remaining_quota);
  600. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  601. "REO Exception Ring: work_done %d budget %d",
  602. work_done, budget);
  603. budget -= work_done;
  604. if (budget <= 0) {
  605. goto budget_done;
  606. }
  607. remaining_quota = budget;
  608. }
  609. /* Process Rx WBM release ring interrupt */
  610. if (rx_wbm_rel_mask) {
  611. work_done = dp_rx_wbm_err_process(soc,
  612. soc->rx_rel_ring.hal_srng, remaining_quota);
  613. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  614. "WBM Release Ring: work_done %d budget %d",
  615. work_done, budget);
  616. budget -= work_done;
  617. if (budget <= 0) {
  618. goto budget_done;
  619. }
  620. remaining_quota = budget;
  621. }
  622. /* Process Rx interrupts */
  623. if (rx_mask) {
  624. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  625. if (rx_mask & (1 << ring)) {
  626. work_done = dp_rx_process(int_ctx,
  627. soc->reo_dest_ring[ring].hal_srng,
  628. remaining_quota);
  629. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  630. "rx mask 0x%x ring %d, work_done %d budget %d",
  631. rx_mask, ring, work_done, budget);
  632. budget -= work_done;
  633. if (budget <= 0)
  634. goto budget_done;
  635. remaining_quota = budget;
  636. }
  637. }
  638. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  639. /* Need to check on this, why is required */
  640. work_done = dp_rxdma_err_process(soc, ring,
  641. remaining_quota);
  642. budget -= work_done;
  643. }
  644. }
  645. if (reo_status_mask)
  646. dp_reo_status_ring_handler(soc);
  647. /* Process LMAC interrupts */
  648. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  649. pdev = soc->pdev_list[ring];
  650. if (pdev == NULL)
  651. continue;
  652. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  653. work_done = dp_mon_process(soc, ring, remaining_quota);
  654. budget -= work_done;
  655. if (budget <= 0)
  656. goto budget_done;
  657. remaining_quota = budget;
  658. }
  659. if (int_ctx->rxdma2host_ring_mask & (1 << ring)) {
  660. work_done = dp_rxdma_err_process(soc, ring,
  661. remaining_quota);
  662. budget -= work_done;
  663. if (budget <= 0)
  664. goto budget_done;
  665. remaining_quota = budget;
  666. }
  667. if (int_ctx->host2rxdma_ring_mask & (1 << ring)) {
  668. union dp_rx_desc_list_elem_t *desc_list = NULL;
  669. union dp_rx_desc_list_elem_t *tail = NULL;
  670. struct dp_srng *rx_refill_buf_ring =
  671. &pdev->rx_refill_buf_ring;
  672. DP_STATS_INC(pdev, replenish.low_thresh_intrs, 1);
  673. dp_rx_buffers_replenish(soc, ring,
  674. rx_refill_buf_ring,
  675. &soc->rx_desc_buf[ring], 0,
  676. &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  677. }
  678. }
  679. qdf_lro_flush(int_ctx->lro_ctx);
  680. budget_done:
  681. return dp_budget - budget;
  682. }
  683. #ifdef DP_INTR_POLL_BASED
  684. /* dp_interrupt_timer()- timer poll for interrupts
  685. *
  686. * @arg: SoC Handle
  687. *
  688. * Return:
  689. *
  690. */
  691. static void dp_interrupt_timer(void *arg)
  692. {
  693. struct dp_soc *soc = (struct dp_soc *) arg;
  694. int i;
  695. if (qdf_atomic_read(&soc->cmn_init_done)) {
  696. for (i = 0;
  697. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  698. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  699. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  700. }
  701. }
  702. /*
  703. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  704. * @txrx_soc: DP SOC handle
  705. *
  706. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  707. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  708. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  709. *
  710. * Return: 0 for success. nonzero for failure.
  711. */
  712. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  713. {
  714. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  715. int i;
  716. soc->intr_mode = DP_INTR_POLL;
  717. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  718. soc->intr_ctx[i].dp_intr_id = i;
  719. soc->intr_ctx[i].tx_ring_mask =
  720. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  721. soc->intr_ctx[i].rx_ring_mask =
  722. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  723. soc->intr_ctx[i].rx_mon_ring_mask =
  724. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  725. soc->intr_ctx[i].rx_err_ring_mask =
  726. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  727. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  728. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  729. soc->intr_ctx[i].reo_status_ring_mask =
  730. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  731. soc->intr_ctx[i].rxdma2host_ring_mask =
  732. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  733. soc->intr_ctx[i].soc = soc;
  734. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  735. }
  736. qdf_timer_init(soc->osdev, &soc->int_timer,
  737. dp_interrupt_timer, (void *)soc,
  738. QDF_TIMER_TYPE_WAKE_APPS);
  739. return QDF_STATUS_SUCCESS;
  740. }
  741. #if defined(CONFIG_MCL)
  742. extern int con_mode_monitor;
  743. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  744. /*
  745. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  746. * @txrx_soc: DP SOC handle
  747. *
  748. * Call the appropriate attach function based on the mode of operation.
  749. * This is a WAR for enabling monitor mode.
  750. *
  751. * Return: 0 for success. nonzero for failure.
  752. */
  753. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  754. {
  755. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  756. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  757. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  758. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  759. "%s: Poll mode", __func__);
  760. return dp_soc_interrupt_attach_poll(txrx_soc);
  761. } else {
  762. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  763. "%s: Interrupt mode", __func__);
  764. return dp_soc_interrupt_attach(txrx_soc);
  765. }
  766. }
  767. #else
  768. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  769. {
  770. return dp_soc_interrupt_attach_poll(txrx_soc);
  771. }
  772. #endif
  773. #endif
  774. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  775. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  776. {
  777. int j;
  778. int num_irq = 0;
  779. int tx_mask =
  780. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  781. int rx_mask =
  782. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  783. int rx_mon_mask =
  784. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  785. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  786. soc->wlan_cfg_ctx, intr_ctx_num);
  787. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  788. soc->wlan_cfg_ctx, intr_ctx_num);
  789. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  790. soc->wlan_cfg_ctx, intr_ctx_num);
  791. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  792. soc->wlan_cfg_ctx, intr_ctx_num);
  793. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  794. soc->wlan_cfg_ctx, intr_ctx_num);
  795. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  796. if (tx_mask & (1 << j)) {
  797. irq_id_map[num_irq++] =
  798. (wbm2host_tx_completions_ring1 - j);
  799. }
  800. if (rx_mask & (1 << j)) {
  801. irq_id_map[num_irq++] =
  802. (reo2host_destination_ring1 - j);
  803. }
  804. if (rxdma2host_ring_mask & (1 << j)) {
  805. irq_id_map[num_irq++] =
  806. rxdma2host_destination_ring_mac1 -
  807. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  808. }
  809. if (host2rxdma_ring_mask & (1 << j)) {
  810. irq_id_map[num_irq++] =
  811. host2rxdma_host_buf_ring_mac1 -
  812. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  813. }
  814. if (rx_mon_mask & (1 << j)) {
  815. irq_id_map[num_irq++] =
  816. ppdu_end_interrupts_mac1 -
  817. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  818. }
  819. if (rx_wbm_rel_ring_mask & (1 << j))
  820. irq_id_map[num_irq++] = wbm2host_rx_release;
  821. if (rx_err_ring_mask & (1 << j))
  822. irq_id_map[num_irq++] = reo2host_exception;
  823. if (reo_status_ring_mask & (1 << j))
  824. irq_id_map[num_irq++] = reo2host_status;
  825. }
  826. *num_irq_r = num_irq;
  827. }
  828. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  829. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  830. int msi_vector_count, int msi_vector_start)
  831. {
  832. int tx_mask = wlan_cfg_get_tx_ring_mask(
  833. soc->wlan_cfg_ctx, intr_ctx_num);
  834. int rx_mask = wlan_cfg_get_rx_ring_mask(
  835. soc->wlan_cfg_ctx, intr_ctx_num);
  836. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  837. soc->wlan_cfg_ctx, intr_ctx_num);
  838. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  839. soc->wlan_cfg_ctx, intr_ctx_num);
  840. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  841. soc->wlan_cfg_ctx, intr_ctx_num);
  842. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  843. soc->wlan_cfg_ctx, intr_ctx_num);
  844. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  845. soc->wlan_cfg_ctx, intr_ctx_num);
  846. unsigned int vector =
  847. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  848. int num_irq = 0;
  849. soc->intr_mode = DP_INTR_MSI;
  850. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  851. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  852. irq_id_map[num_irq++] =
  853. pld_get_msi_irq(soc->osdev->dev, vector);
  854. *num_irq_r = num_irq;
  855. }
  856. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  857. int *irq_id_map, int *num_irq)
  858. {
  859. int msi_vector_count, ret;
  860. uint32_t msi_base_data, msi_vector_start;
  861. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  862. &msi_vector_count,
  863. &msi_base_data,
  864. &msi_vector_start);
  865. if (ret)
  866. return dp_soc_interrupt_map_calculate_integrated(soc,
  867. intr_ctx_num, irq_id_map, num_irq);
  868. else
  869. dp_soc_interrupt_map_calculate_msi(soc,
  870. intr_ctx_num, irq_id_map, num_irq,
  871. msi_vector_count, msi_vector_start);
  872. }
  873. /*
  874. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  875. * @txrx_soc: DP SOC handle
  876. *
  877. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  878. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  879. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  880. *
  881. * Return: 0 for success. nonzero for failure.
  882. */
  883. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  884. {
  885. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  886. int i = 0;
  887. int num_irq = 0;
  888. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  889. int ret = 0;
  890. /* Map of IRQ ids registered with one interrupt context */
  891. int irq_id_map[HIF_MAX_GRP_IRQ];
  892. int tx_mask =
  893. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  894. int rx_mask =
  895. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  896. int rx_mon_mask =
  897. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  898. int rx_err_ring_mask =
  899. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  900. int rx_wbm_rel_ring_mask =
  901. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  902. int reo_status_ring_mask =
  903. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  904. int rxdma2host_ring_mask =
  905. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  906. int host2rxdma_ring_mask =
  907. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  908. soc->intr_ctx[i].dp_intr_id = i;
  909. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  910. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  911. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  912. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  913. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  914. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  915. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  916. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  917. soc->intr_ctx[i].soc = soc;
  918. num_irq = 0;
  919. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  920. &num_irq);
  921. ret = hif_register_ext_group(soc->hif_handle,
  922. num_irq, irq_id_map, dp_service_srngs,
  923. &soc->intr_ctx[i], "dp_intr",
  924. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  925. if (ret) {
  926. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  927. FL("failed, ret = %d"), ret);
  928. return QDF_STATUS_E_FAILURE;
  929. }
  930. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  931. }
  932. hif_configure_ext_group_interrupts(soc->hif_handle);
  933. return QDF_STATUS_SUCCESS;
  934. }
  935. /*
  936. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  937. * @txrx_soc: DP SOC handle
  938. *
  939. * Return: void
  940. */
  941. static void dp_soc_interrupt_detach(void *txrx_soc)
  942. {
  943. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  944. int i;
  945. if (soc->intr_mode == DP_INTR_POLL) {
  946. qdf_timer_stop(&soc->int_timer);
  947. qdf_timer_free(&soc->int_timer);
  948. } else {
  949. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  950. }
  951. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  952. soc->intr_ctx[i].tx_ring_mask = 0;
  953. soc->intr_ctx[i].rx_ring_mask = 0;
  954. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  955. soc->intr_ctx[i].rx_err_ring_mask = 0;
  956. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  957. soc->intr_ctx[i].reo_status_ring_mask = 0;
  958. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  959. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  960. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  961. }
  962. }
  963. #define AVG_MAX_MPDUS_PER_TID 128
  964. #define AVG_TIDS_PER_CLIENT 2
  965. #define AVG_FLOWS_PER_TID 2
  966. #define AVG_MSDUS_PER_FLOW 128
  967. #define AVG_MSDUS_PER_MPDU 4
  968. /*
  969. * Allocate and setup link descriptor pool that will be used by HW for
  970. * various link and queue descriptors and managed by WBM
  971. */
  972. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  973. {
  974. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  975. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  976. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  977. uint32_t num_mpdus_per_link_desc =
  978. hal_num_mpdus_per_link_desc(soc->hal_soc);
  979. uint32_t num_msdus_per_link_desc =
  980. hal_num_msdus_per_link_desc(soc->hal_soc);
  981. uint32_t num_mpdu_links_per_queue_desc =
  982. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  983. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  984. uint32_t total_link_descs, total_mem_size;
  985. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  986. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  987. uint32_t num_link_desc_banks;
  988. uint32_t last_bank_size = 0;
  989. uint32_t entry_size, num_entries;
  990. int i;
  991. uint32_t desc_id = 0;
  992. /* Only Tx queue descriptors are allocated from common link descriptor
  993. * pool Rx queue descriptors are not included in this because (REO queue
  994. * extension descriptors) they are expected to be allocated contiguously
  995. * with REO queue descriptors
  996. */
  997. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  998. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  999. num_mpdu_queue_descs = num_mpdu_link_descs /
  1000. num_mpdu_links_per_queue_desc;
  1001. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1002. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1003. num_msdus_per_link_desc;
  1004. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1005. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1006. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1007. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1008. /* Round up to power of 2 */
  1009. total_link_descs = 1;
  1010. while (total_link_descs < num_entries)
  1011. total_link_descs <<= 1;
  1012. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1013. FL("total_link_descs: %u, link_desc_size: %d"),
  1014. total_link_descs, link_desc_size);
  1015. total_mem_size = total_link_descs * link_desc_size;
  1016. total_mem_size += link_desc_align;
  1017. if (total_mem_size <= max_alloc_size) {
  1018. num_link_desc_banks = 0;
  1019. last_bank_size = total_mem_size;
  1020. } else {
  1021. num_link_desc_banks = (total_mem_size) /
  1022. (max_alloc_size - link_desc_align);
  1023. last_bank_size = total_mem_size %
  1024. (max_alloc_size - link_desc_align);
  1025. }
  1026. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1027. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1028. total_mem_size, num_link_desc_banks);
  1029. for (i = 0; i < num_link_desc_banks; i++) {
  1030. soc->link_desc_banks[i].base_vaddr_unaligned =
  1031. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1032. max_alloc_size,
  1033. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1034. soc->link_desc_banks[i].size = max_alloc_size;
  1035. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1036. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1037. ((unsigned long)(
  1038. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1039. link_desc_align));
  1040. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1041. soc->link_desc_banks[i].base_paddr_unaligned) +
  1042. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1043. (unsigned long)(
  1044. soc->link_desc_banks[i].base_vaddr_unaligned));
  1045. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1046. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1047. FL("Link descriptor memory alloc failed"));
  1048. goto fail;
  1049. }
  1050. }
  1051. if (last_bank_size) {
  1052. /* Allocate last bank in case total memory required is not exact
  1053. * multiple of max_alloc_size
  1054. */
  1055. soc->link_desc_banks[i].base_vaddr_unaligned =
  1056. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1057. last_bank_size,
  1058. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1059. soc->link_desc_banks[i].size = last_bank_size;
  1060. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1061. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1062. ((unsigned long)(
  1063. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1064. link_desc_align));
  1065. soc->link_desc_banks[i].base_paddr =
  1066. (unsigned long)(
  1067. soc->link_desc_banks[i].base_paddr_unaligned) +
  1068. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1069. (unsigned long)(
  1070. soc->link_desc_banks[i].base_vaddr_unaligned));
  1071. }
  1072. /* Allocate and setup link descriptor idle list for HW internal use */
  1073. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1074. total_mem_size = entry_size * total_link_descs;
  1075. if (total_mem_size <= max_alloc_size) {
  1076. void *desc;
  1077. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1078. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1079. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1080. FL("Link desc idle ring setup failed"));
  1081. goto fail;
  1082. }
  1083. hal_srng_access_start_unlocked(soc->hal_soc,
  1084. soc->wbm_idle_link_ring.hal_srng);
  1085. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1086. soc->link_desc_banks[i].base_paddr; i++) {
  1087. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1088. ((unsigned long)(
  1089. soc->link_desc_banks[i].base_vaddr) -
  1090. (unsigned long)(
  1091. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1092. / link_desc_size;
  1093. unsigned long paddr = (unsigned long)(
  1094. soc->link_desc_banks[i].base_paddr);
  1095. while (num_entries && (desc = hal_srng_src_get_next(
  1096. soc->hal_soc,
  1097. soc->wbm_idle_link_ring.hal_srng))) {
  1098. hal_set_link_desc_addr(desc,
  1099. LINK_DESC_COOKIE(desc_id, i), paddr);
  1100. num_entries--;
  1101. desc_id++;
  1102. paddr += link_desc_size;
  1103. }
  1104. }
  1105. hal_srng_access_end_unlocked(soc->hal_soc,
  1106. soc->wbm_idle_link_ring.hal_srng);
  1107. } else {
  1108. uint32_t num_scatter_bufs;
  1109. uint32_t num_entries_per_buf;
  1110. uint32_t rem_entries;
  1111. uint8_t *scatter_buf_ptr;
  1112. uint16_t scatter_buf_num;
  1113. soc->wbm_idle_scatter_buf_size =
  1114. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1115. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1116. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1117. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1118. soc->hal_soc, total_mem_size,
  1119. soc->wbm_idle_scatter_buf_size);
  1120. for (i = 0; i < num_scatter_bufs; i++) {
  1121. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1122. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1123. soc->wbm_idle_scatter_buf_size,
  1124. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1125. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1126. QDF_TRACE(QDF_MODULE_ID_DP,
  1127. QDF_TRACE_LEVEL_ERROR,
  1128. FL("Scatter list memory alloc failed"));
  1129. goto fail;
  1130. }
  1131. }
  1132. /* Populate idle list scatter buffers with link descriptor
  1133. * pointers
  1134. */
  1135. scatter_buf_num = 0;
  1136. scatter_buf_ptr = (uint8_t *)(
  1137. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1138. rem_entries = num_entries_per_buf;
  1139. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1140. soc->link_desc_banks[i].base_paddr; i++) {
  1141. uint32_t num_link_descs =
  1142. (soc->link_desc_banks[i].size -
  1143. ((unsigned long)(
  1144. soc->link_desc_banks[i].base_vaddr) -
  1145. (unsigned long)(
  1146. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1147. / link_desc_size;
  1148. unsigned long paddr = (unsigned long)(
  1149. soc->link_desc_banks[i].base_paddr);
  1150. while (num_link_descs) {
  1151. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1152. LINK_DESC_COOKIE(desc_id, i), paddr);
  1153. num_link_descs--;
  1154. desc_id++;
  1155. paddr += link_desc_size;
  1156. rem_entries--;
  1157. if (rem_entries) {
  1158. scatter_buf_ptr += entry_size;
  1159. } else {
  1160. rem_entries = num_entries_per_buf;
  1161. scatter_buf_num++;
  1162. if (scatter_buf_num >= num_scatter_bufs)
  1163. break;
  1164. scatter_buf_ptr = (uint8_t *)(
  1165. soc->wbm_idle_scatter_buf_base_vaddr[
  1166. scatter_buf_num]);
  1167. }
  1168. }
  1169. }
  1170. /* Setup link descriptor idle list in HW */
  1171. hal_setup_link_idle_list(soc->hal_soc,
  1172. soc->wbm_idle_scatter_buf_base_paddr,
  1173. soc->wbm_idle_scatter_buf_base_vaddr,
  1174. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1175. (uint32_t)(scatter_buf_ptr -
  1176. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1177. scatter_buf_num-1])), total_link_descs);
  1178. }
  1179. return 0;
  1180. fail:
  1181. if (soc->wbm_idle_link_ring.hal_srng) {
  1182. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1183. WBM_IDLE_LINK, 0);
  1184. }
  1185. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1186. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1187. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1188. soc->wbm_idle_scatter_buf_size,
  1189. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1190. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1191. }
  1192. }
  1193. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1194. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1195. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1196. soc->link_desc_banks[i].size,
  1197. soc->link_desc_banks[i].base_vaddr_unaligned,
  1198. soc->link_desc_banks[i].base_paddr_unaligned,
  1199. 0);
  1200. }
  1201. }
  1202. return QDF_STATUS_E_FAILURE;
  1203. }
  1204. /*
  1205. * Free link descriptor pool that was setup HW
  1206. */
  1207. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1208. {
  1209. int i;
  1210. if (soc->wbm_idle_link_ring.hal_srng) {
  1211. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1212. WBM_IDLE_LINK, 0);
  1213. }
  1214. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1215. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1216. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1217. soc->wbm_idle_scatter_buf_size,
  1218. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1219. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1220. }
  1221. }
  1222. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1223. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1224. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1225. soc->link_desc_banks[i].size,
  1226. soc->link_desc_banks[i].base_vaddr_unaligned,
  1227. soc->link_desc_banks[i].base_paddr_unaligned,
  1228. 0);
  1229. }
  1230. }
  1231. }
  1232. /* TODO: Following should be configurable */
  1233. #define WBM_RELEASE_RING_SIZE 64
  1234. #define TCL_CMD_RING_SIZE 32
  1235. #define TCL_STATUS_RING_SIZE 32
  1236. #if defined(QCA_WIFI_QCA6290)
  1237. #define REO_DST_RING_SIZE 1024
  1238. #else
  1239. #define REO_DST_RING_SIZE 2048
  1240. #endif
  1241. #define REO_REINJECT_RING_SIZE 32
  1242. #define RX_RELEASE_RING_SIZE 1024
  1243. #define REO_EXCEPTION_RING_SIZE 128
  1244. #define REO_CMD_RING_SIZE 32
  1245. #define REO_STATUS_RING_SIZE 32
  1246. #define RXDMA_BUF_RING_SIZE 1024
  1247. #define RXDMA_REFILL_RING_SIZE 4096
  1248. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1249. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1250. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1251. #define RXDMA_MONITOR_DESC_RING_SIZE 2048
  1252. #define RXDMA_ERR_DST_RING_SIZE 1024
  1253. /*
  1254. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1255. * @soc: Datapath SOC handle
  1256. *
  1257. * This is a timer function used to age out stale WDS nodes from
  1258. * AST table
  1259. */
  1260. #ifdef FEATURE_WDS
  1261. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1262. {
  1263. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1264. struct dp_pdev *pdev;
  1265. struct dp_vdev *vdev;
  1266. struct dp_peer *peer;
  1267. struct dp_ast_entry *ase, *temp_ase;
  1268. int i;
  1269. qdf_spin_lock_bh(&soc->ast_lock);
  1270. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1271. pdev = soc->pdev_list[i];
  1272. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1273. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1274. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1275. /*
  1276. * Do not expire static ast entries
  1277. */
  1278. if (ase->type == CDP_TXRX_AST_TYPE_STATIC)
  1279. continue;
  1280. if (ase->is_active) {
  1281. ase->is_active = FALSE;
  1282. continue;
  1283. }
  1284. DP_STATS_INC(soc, ast.aged_out, 1);
  1285. soc->cdp_soc.ol_ops->peer_del_wds_entry(
  1286. vdev->osif_vdev,
  1287. ase->mac_addr.raw);
  1288. dp_peer_del_ast(soc, ase);
  1289. }
  1290. }
  1291. }
  1292. }
  1293. qdf_spin_unlock_bh(&soc->ast_lock);
  1294. if (qdf_atomic_read(&soc->cmn_init_done))
  1295. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1296. }
  1297. /*
  1298. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1299. * @soc: Datapath SOC handle
  1300. *
  1301. * Return: None
  1302. */
  1303. static void dp_soc_wds_attach(struct dp_soc *soc)
  1304. {
  1305. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1306. dp_wds_aging_timer_fn, (void *)soc,
  1307. QDF_TIMER_TYPE_WAKE_APPS);
  1308. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1309. }
  1310. /*
  1311. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1312. * @txrx_soc: DP SOC handle
  1313. *
  1314. * Return: None
  1315. */
  1316. static void dp_soc_wds_detach(struct dp_soc *soc)
  1317. {
  1318. qdf_timer_stop(&soc->wds_aging_timer);
  1319. qdf_timer_free(&soc->wds_aging_timer);
  1320. }
  1321. #else
  1322. static void dp_soc_wds_attach(struct dp_soc *soc)
  1323. {
  1324. }
  1325. static void dp_soc_wds_detach(struct dp_soc *soc)
  1326. {
  1327. }
  1328. #endif
  1329. /*
  1330. * dp_soc_reset_ring_map() - Reset cpu ring map
  1331. * @soc: Datapath soc handler
  1332. *
  1333. * This api resets the default cpu ring map
  1334. */
  1335. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1336. {
  1337. uint8_t i;
  1338. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1339. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1340. if (nss_config == 1) {
  1341. /*
  1342. * Setting Tx ring map for one nss offloaded radio
  1343. */
  1344. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1345. } else if (nss_config == 2) {
  1346. /*
  1347. * Setting Tx ring for two nss offloaded radios
  1348. */
  1349. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1350. } else {
  1351. /*
  1352. * Setting Tx ring map for all nss offloaded radios
  1353. */
  1354. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1355. }
  1356. }
  1357. }
  1358. /*
  1359. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1360. * @dp_soc - DP soc handle
  1361. * @ring_type - ring type
  1362. * @ring_num - ring_num
  1363. *
  1364. * return 0 or 1
  1365. */
  1366. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1367. {
  1368. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1369. uint8_t status = 0;
  1370. switch (ring_type) {
  1371. case WBM2SW_RELEASE:
  1372. case REO_DST:
  1373. case RXDMA_BUF:
  1374. status = ((nss_config) & (1 << ring_num));
  1375. break;
  1376. default:
  1377. break;
  1378. }
  1379. return status;
  1380. }
  1381. /*
  1382. * dp_soc_reset_intr_mask() - reset interrupt mask
  1383. * @dp_soc - DP Soc handle
  1384. *
  1385. * Return: Return void
  1386. */
  1387. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1388. {
  1389. uint8_t j;
  1390. int *grp_mask = NULL;
  1391. int group_number, mask, num_ring;
  1392. /* number of tx ring */
  1393. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1394. /*
  1395. * group mask for tx completion ring.
  1396. */
  1397. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1398. /* loop and reset the mask for only offloaded ring */
  1399. for (j = 0; j < num_ring; j++) {
  1400. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1401. continue;
  1402. }
  1403. /*
  1404. * Group number corresponding to tx offloaded ring.
  1405. */
  1406. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1407. if (group_number < 0) {
  1408. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1409. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1410. WBM2SW_RELEASE, j);
  1411. return;
  1412. }
  1413. /* reset the tx mask for offloaded ring */
  1414. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1415. mask &= (~(1 << j));
  1416. /*
  1417. * reset the interrupt mask for offloaded ring.
  1418. */
  1419. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1420. }
  1421. /* number of rx rings */
  1422. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1423. /*
  1424. * group mask for reo destination ring.
  1425. */
  1426. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1427. /* loop and reset the mask for only offloaded ring */
  1428. for (j = 0; j < num_ring; j++) {
  1429. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1430. continue;
  1431. }
  1432. /*
  1433. * Group number corresponding to rx offloaded ring.
  1434. */
  1435. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1436. if (group_number < 0) {
  1437. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1438. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1439. REO_DST, j);
  1440. return;
  1441. }
  1442. /* set the interrupt mask for offloaded ring */
  1443. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1444. mask &= (~(1 << j));
  1445. /*
  1446. * set the interrupt mask to zero for rx offloaded radio.
  1447. */
  1448. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1449. }
  1450. /*
  1451. * group mask for Rx buffer refill ring
  1452. */
  1453. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1454. /* loop and reset the mask for only offloaded ring */
  1455. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1456. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1457. continue;
  1458. }
  1459. /*
  1460. * Group number corresponding to rx offloaded ring.
  1461. */
  1462. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1463. if (group_number < 0) {
  1464. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1465. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1466. REO_DST, j);
  1467. return;
  1468. }
  1469. /* set the interrupt mask for offloaded ring */
  1470. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1471. group_number);
  1472. mask &= (~(1 << j));
  1473. /*
  1474. * set the interrupt mask to zero for rx offloaded radio.
  1475. */
  1476. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1477. group_number, mask);
  1478. }
  1479. }
  1480. #ifdef IPA_OFFLOAD
  1481. /**
  1482. * dp_reo_remap_config() - configure reo remap register value based
  1483. * nss configuration.
  1484. * based on offload_radio value below remap configuration
  1485. * get applied.
  1486. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1487. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1488. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1489. * 3 - both Radios handled by NSS (remap not required)
  1490. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1491. *
  1492. * @remap1: output parameter indicates reo remap 1 register value
  1493. * @remap2: output parameter indicates reo remap 2 register value
  1494. * Return: bool type, true if remap is configured else false.
  1495. */
  1496. static bool dp_reo_remap_config(struct dp_soc *soc,
  1497. uint32_t *remap1,
  1498. uint32_t *remap2)
  1499. {
  1500. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1501. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1502. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1503. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1504. return true;
  1505. }
  1506. #else
  1507. static bool dp_reo_remap_config(struct dp_soc *soc,
  1508. uint32_t *remap1,
  1509. uint32_t *remap2)
  1510. {
  1511. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1512. switch (offload_radio) {
  1513. case 0:
  1514. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1515. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1516. (0x3 << 18) | (0x4 << 21)) << 8;
  1517. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1518. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1519. (0x3 << 18) | (0x4 << 21)) << 8;
  1520. break;
  1521. case 1:
  1522. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1523. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1524. (0x2 << 18) | (0x3 << 21)) << 8;
  1525. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1526. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1527. (0x4 << 18) | (0x2 << 21)) << 8;
  1528. break;
  1529. case 2:
  1530. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1531. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1532. (0x1 << 18) | (0x3 << 21)) << 8;
  1533. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1534. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1535. (0x4 << 18) | (0x1 << 21)) << 8;
  1536. break;
  1537. case 3:
  1538. /* return false if both radios are offloaded to NSS */
  1539. return false;
  1540. }
  1541. return true;
  1542. }
  1543. #endif
  1544. /*
  1545. * dp_soc_cmn_setup() - Common SoC level initializion
  1546. * @soc: Datapath SOC handle
  1547. *
  1548. * This is an internal function used to setup common SOC data structures,
  1549. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1550. */
  1551. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1552. {
  1553. int i;
  1554. struct hal_reo_params reo_params;
  1555. int tx_ring_size;
  1556. int tx_comp_ring_size;
  1557. if (qdf_atomic_read(&soc->cmn_init_done))
  1558. return 0;
  1559. if (dp_peer_find_attach(soc))
  1560. goto fail0;
  1561. if (dp_hw_link_desc_pool_setup(soc))
  1562. goto fail1;
  1563. /* Setup SRNG rings */
  1564. /* Common rings */
  1565. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1566. WBM_RELEASE_RING_SIZE)) {
  1567. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1568. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1569. goto fail1;
  1570. }
  1571. soc->num_tcl_data_rings = 0;
  1572. /* Tx data rings */
  1573. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1574. soc->num_tcl_data_rings =
  1575. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1576. tx_comp_ring_size =
  1577. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1578. tx_ring_size =
  1579. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1580. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1581. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1582. TCL_DATA, i, 0, tx_ring_size)) {
  1583. QDF_TRACE(QDF_MODULE_ID_DP,
  1584. QDF_TRACE_LEVEL_ERROR,
  1585. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1586. goto fail1;
  1587. }
  1588. /*
  1589. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1590. * count
  1591. */
  1592. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1593. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1594. QDF_TRACE(QDF_MODULE_ID_DP,
  1595. QDF_TRACE_LEVEL_ERROR,
  1596. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1597. goto fail1;
  1598. }
  1599. }
  1600. } else {
  1601. /* This will be incremented during per pdev ring setup */
  1602. soc->num_tcl_data_rings = 0;
  1603. }
  1604. if (dp_tx_soc_attach(soc)) {
  1605. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1606. FL("dp_tx_soc_attach failed"));
  1607. goto fail1;
  1608. }
  1609. /* TCL command and status rings */
  1610. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1611. TCL_CMD_RING_SIZE)) {
  1612. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1613. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1614. goto fail1;
  1615. }
  1616. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1617. TCL_STATUS_RING_SIZE)) {
  1618. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1619. FL("dp_srng_setup failed for tcl_status_ring"));
  1620. goto fail1;
  1621. }
  1622. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1623. * descriptors
  1624. */
  1625. /* Rx data rings */
  1626. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1627. soc->num_reo_dest_rings =
  1628. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1629. QDF_TRACE(QDF_MODULE_ID_DP,
  1630. QDF_TRACE_LEVEL_ERROR,
  1631. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1632. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1633. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1634. i, 0, REO_DST_RING_SIZE)) {
  1635. QDF_TRACE(QDF_MODULE_ID_DP,
  1636. QDF_TRACE_LEVEL_ERROR,
  1637. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1638. goto fail1;
  1639. }
  1640. }
  1641. } else {
  1642. /* This will be incremented during per pdev ring setup */
  1643. soc->num_reo_dest_rings = 0;
  1644. }
  1645. /* LMAC RxDMA to SW Rings configuration */
  1646. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1647. /* Only valid for MCL */
  1648. struct dp_pdev *pdev = soc->pdev_list[0];
  1649. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1650. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1651. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1652. QDF_TRACE(QDF_MODULE_ID_DP,
  1653. QDF_TRACE_LEVEL_ERROR,
  1654. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1655. goto fail1;
  1656. }
  1657. }
  1658. }
  1659. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1660. /* REO reinjection ring */
  1661. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1662. REO_REINJECT_RING_SIZE)) {
  1663. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1664. FL("dp_srng_setup failed for reo_reinject_ring"));
  1665. goto fail1;
  1666. }
  1667. /* Rx release ring */
  1668. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1669. RX_RELEASE_RING_SIZE)) {
  1670. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1671. FL("dp_srng_setup failed for rx_rel_ring"));
  1672. goto fail1;
  1673. }
  1674. /* Rx exception ring */
  1675. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1676. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1677. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1678. FL("dp_srng_setup failed for reo_exception_ring"));
  1679. goto fail1;
  1680. }
  1681. /* REO command and status rings */
  1682. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1683. REO_CMD_RING_SIZE)) {
  1684. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1685. FL("dp_srng_setup failed for reo_cmd_ring"));
  1686. goto fail1;
  1687. }
  1688. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1689. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1690. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1691. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1692. REO_STATUS_RING_SIZE)) {
  1693. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1694. FL("dp_srng_setup failed for reo_status_ring"));
  1695. goto fail1;
  1696. }
  1697. qdf_spinlock_create(&soc->ast_lock);
  1698. dp_soc_wds_attach(soc);
  1699. /* Reset the cpu ring map if radio is NSS offloaded */
  1700. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1701. dp_soc_reset_cpu_ring_map(soc);
  1702. dp_soc_reset_intr_mask(soc);
  1703. }
  1704. /* Setup HW REO */
  1705. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1706. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1707. /*
  1708. * Reo ring remap is not required if both radios
  1709. * are offloaded to NSS
  1710. */
  1711. if (!dp_reo_remap_config(soc,
  1712. &reo_params.remap1,
  1713. &reo_params.remap2))
  1714. goto out;
  1715. reo_params.rx_hash_enabled = true;
  1716. }
  1717. out:
  1718. hal_reo_setup(soc->hal_soc, &reo_params);
  1719. qdf_atomic_set(&soc->cmn_init_done, 1);
  1720. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1721. return 0;
  1722. fail1:
  1723. /*
  1724. * Cleanup will be done as part of soc_detach, which will
  1725. * be called on pdev attach failure
  1726. */
  1727. fail0:
  1728. return QDF_STATUS_E_FAILURE;
  1729. }
  1730. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1731. static void dp_lro_hash_setup(struct dp_soc *soc)
  1732. {
  1733. struct cdp_lro_hash_config lro_hash;
  1734. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1735. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1736. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1737. FL("LRO disabled RX hash disabled"));
  1738. return;
  1739. }
  1740. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  1741. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  1742. lro_hash.lro_enable = 1;
  1743. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  1744. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  1745. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  1746. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  1747. }
  1748. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  1749. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  1750. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1751. LRO_IPV4_SEED_ARR_SZ));
  1752. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  1753. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1754. LRO_IPV6_SEED_ARR_SZ));
  1755. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  1756. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  1757. lro_hash.lro_enable, lro_hash.tcp_flag,
  1758. lro_hash.tcp_flag_mask);
  1759. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1760. QDF_TRACE_LEVEL_ERROR,
  1761. (void *)lro_hash.toeplitz_hash_ipv4,
  1762. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1763. LRO_IPV4_SEED_ARR_SZ));
  1764. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1765. QDF_TRACE_LEVEL_ERROR,
  1766. (void *)lro_hash.toeplitz_hash_ipv6,
  1767. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1768. LRO_IPV6_SEED_ARR_SZ));
  1769. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  1770. if (soc->cdp_soc.ol_ops->lro_hash_config)
  1771. (void)soc->cdp_soc.ol_ops->lro_hash_config
  1772. (soc->osif_soc, &lro_hash);
  1773. }
  1774. /*
  1775. * dp_rxdma_ring_setup() - configure the RX DMA rings
  1776. * @soc: data path SoC handle
  1777. * @pdev: Physical device handle
  1778. *
  1779. * Return: 0 - success, > 0 - failure
  1780. */
  1781. #ifdef QCA_HOST2FW_RXBUF_RING
  1782. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1783. struct dp_pdev *pdev)
  1784. {
  1785. int max_mac_rings =
  1786. wlan_cfg_get_num_mac_rings
  1787. (pdev->wlan_cfg_ctx);
  1788. int i;
  1789. for (i = 0; i < max_mac_rings; i++) {
  1790. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1791. "%s: pdev_id %d mac_id %d\n",
  1792. __func__, pdev->pdev_id, i);
  1793. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  1794. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  1795. QDF_TRACE(QDF_MODULE_ID_DP,
  1796. QDF_TRACE_LEVEL_ERROR,
  1797. FL("failed rx mac ring setup"));
  1798. return QDF_STATUS_E_FAILURE;
  1799. }
  1800. }
  1801. return QDF_STATUS_SUCCESS;
  1802. }
  1803. #else
  1804. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1805. struct dp_pdev *pdev)
  1806. {
  1807. return QDF_STATUS_SUCCESS;
  1808. }
  1809. #endif
  1810. /**
  1811. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  1812. * @pdev - DP_PDEV handle
  1813. *
  1814. * Return: void
  1815. */
  1816. static inline void
  1817. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1818. {
  1819. uint8_t map_id;
  1820. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1821. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  1822. sizeof(default_dscp_tid_map));
  1823. }
  1824. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  1825. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  1826. pdev->dscp_tid_map[map_id],
  1827. map_id);
  1828. }
  1829. }
  1830. #ifdef QCA_SUPPORT_SON
  1831. /**
  1832. * dp_mark_peer_inact(): Update peer inactivity status
  1833. * @peer_handle - datapath peer handle
  1834. *
  1835. * Return: void
  1836. */
  1837. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  1838. {
  1839. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1840. struct dp_pdev *pdev;
  1841. struct dp_soc *soc;
  1842. bool inactive_old;
  1843. if (!peer)
  1844. return;
  1845. pdev = peer->vdev->pdev;
  1846. soc = pdev->soc;
  1847. inactive_old = peer->peer_bs_inact_flag == 1;
  1848. if (!inactive)
  1849. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1850. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  1851. if (inactive_old != inactive) {
  1852. struct ieee80211com *ic;
  1853. struct ol_ath_softc_net80211 *scn;
  1854. scn = (struct ol_ath_softc_net80211 *)pdev->osif_pdev;
  1855. ic = &scn->sc_ic;
  1856. /**
  1857. * Note: a node lookup can happen in RX datapath context
  1858. * when a node changes from inactive to active (at most once
  1859. * per inactivity timeout threshold)
  1860. */
  1861. if (soc->cdp_soc.ol_ops->record_act_change) {
  1862. soc->cdp_soc.ol_ops->record_act_change(ic->ic_pdev_obj,
  1863. peer->mac_addr.raw, !inactive);
  1864. }
  1865. }
  1866. }
  1867. /**
  1868. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  1869. *
  1870. * Periodically checks the inactivity status
  1871. */
  1872. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  1873. {
  1874. struct dp_pdev *pdev;
  1875. struct dp_vdev *vdev;
  1876. struct dp_peer *peer;
  1877. struct dp_soc *soc;
  1878. int i;
  1879. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  1880. qdf_spin_lock(&soc->peer_ref_mutex);
  1881. for (i = 0; i < soc->pdev_count; i++) {
  1882. pdev = soc->pdev_list[i];
  1883. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1884. if (vdev->opmode != wlan_op_mode_ap)
  1885. continue;
  1886. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1887. if (!peer->authorize) {
  1888. /**
  1889. * Inactivity check only interested in
  1890. * connected node
  1891. */
  1892. continue;
  1893. }
  1894. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  1895. /**
  1896. * This check ensures we do not wait extra long
  1897. * due to the potential race condition
  1898. */
  1899. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1900. }
  1901. if (peer->peer_bs_inact > 0) {
  1902. /* Do not let it wrap around */
  1903. peer->peer_bs_inact--;
  1904. }
  1905. if (peer->peer_bs_inact == 0)
  1906. dp_mark_peer_inact(peer, true);
  1907. }
  1908. }
  1909. }
  1910. qdf_spin_unlock(&soc->peer_ref_mutex);
  1911. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  1912. soc->pdev_bs_inact_interval * 1000);
  1913. }
  1914. #endif
  1915. /*
  1916. * dp_pdev_attach_wifi3() - attach txrx pdev
  1917. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  1918. * @txrx_soc: Datapath SOC handle
  1919. * @htc_handle: HTC handle for host-target interface
  1920. * @qdf_osdev: QDF OS device
  1921. * @pdev_id: PDEV ID
  1922. *
  1923. * Return: DP PDEV handle on success, NULL on failure
  1924. */
  1925. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  1926. struct cdp_cfg *ctrl_pdev,
  1927. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  1928. {
  1929. int tx_ring_size;
  1930. int tx_comp_ring_size;
  1931. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1932. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  1933. if (!pdev) {
  1934. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1935. FL("DP PDEV memory allocation failed"));
  1936. goto fail0;
  1937. }
  1938. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  1939. if (!pdev->wlan_cfg_ctx) {
  1940. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1941. FL("pdev cfg_attach failed"));
  1942. qdf_mem_free(pdev);
  1943. goto fail0;
  1944. }
  1945. /*
  1946. * set nss pdev config based on soc config
  1947. */
  1948. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  1949. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  1950. pdev->soc = soc;
  1951. pdev->osif_pdev = ctrl_pdev;
  1952. pdev->pdev_id = pdev_id;
  1953. soc->pdev_list[pdev_id] = pdev;
  1954. soc->pdev_count++;
  1955. TAILQ_INIT(&pdev->vdev_list);
  1956. pdev->vdev_count = 0;
  1957. qdf_spinlock_create(&pdev->tx_mutex);
  1958. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  1959. TAILQ_INIT(&pdev->neighbour_peers_list);
  1960. if (dp_soc_cmn_setup(soc)) {
  1961. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1962. FL("dp_soc_cmn_setup failed"));
  1963. goto fail1;
  1964. }
  1965. /* Setup per PDEV TCL rings if configured */
  1966. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1967. tx_ring_size =
  1968. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1969. tx_comp_ring_size =
  1970. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1971. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  1972. pdev_id, pdev_id, tx_ring_size)) {
  1973. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1974. FL("dp_srng_setup failed for tcl_data_ring"));
  1975. goto fail1;
  1976. }
  1977. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  1978. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  1979. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1980. FL("dp_srng_setup failed for tx_comp_ring"));
  1981. goto fail1;
  1982. }
  1983. soc->num_tcl_data_rings++;
  1984. }
  1985. /* Tx specific init */
  1986. if (dp_tx_pdev_attach(pdev)) {
  1987. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1988. FL("dp_tx_pdev_attach failed"));
  1989. goto fail1;
  1990. }
  1991. /* Setup per PDEV REO rings if configured */
  1992. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1993. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  1994. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  1995. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1996. FL("dp_srng_setup failed for reo_dest_ringn"));
  1997. goto fail1;
  1998. }
  1999. soc->num_reo_dest_rings++;
  2000. }
  2001. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2002. RXDMA_REFILL_RING_SIZE)) {
  2003. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2004. FL("dp_srng_setup failed rx refill ring"));
  2005. goto fail1;
  2006. }
  2007. if (dp_rxdma_ring_setup(soc, pdev)) {
  2008. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2009. FL("RXDMA ring config failed"));
  2010. goto fail1;
  2011. }
  2012. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  2013. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  2014. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2015. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2016. goto fail1;
  2017. }
  2018. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  2019. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  2020. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2021. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2022. goto fail1;
  2023. }
  2024. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  2025. RXDMA_MONITOR_STATUS, 0, pdev_id,
  2026. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2027. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2028. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2029. goto fail1;
  2030. }
  2031. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  2032. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  2033. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2034. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2035. goto fail1;
  2036. }
  2037. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2038. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2039. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2040. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2041. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2042. goto fail1;
  2043. }
  2044. }
  2045. /* Setup second Rx refill buffer ring */
  2046. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF, 2,
  2047. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2048. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2049. FL("dp_srng_setup failed second rx refill ring"));
  2050. goto fail1;
  2051. }
  2052. if (dp_ipa_ring_resource_setup(soc, pdev))
  2053. goto fail1;
  2054. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2055. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2056. FL("dp_ipa_uc_attach failed"));
  2057. goto fail1;
  2058. }
  2059. /* Rx specific init */
  2060. if (dp_rx_pdev_attach(pdev)) {
  2061. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2062. FL("dp_rx_pdev_attach failed"));
  2063. goto fail0;
  2064. }
  2065. DP_STATS_INIT(pdev);
  2066. /* Monitor filter init */
  2067. pdev->mon_filter_mode = MON_FILTER_ALL;
  2068. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2069. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2070. pdev->fp_data_filter = FILTER_DATA_ALL;
  2071. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2072. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2073. pdev->mo_data_filter = FILTER_DATA_ALL;
  2074. #ifndef CONFIG_WIN
  2075. /* MCL */
  2076. dp_local_peer_id_pool_init(pdev);
  2077. #endif
  2078. dp_dscp_tid_map_setup(pdev);
  2079. /* Rx monitor mode specific init */
  2080. if (dp_rx_pdev_mon_attach(pdev)) {
  2081. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2082. "dp_rx_pdev_attach failed\n");
  2083. goto fail1;
  2084. }
  2085. if (dp_wdi_event_attach(pdev)) {
  2086. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2087. "dp_wdi_evet_attach failed\n");
  2088. goto fail1;
  2089. }
  2090. #ifdef QCA_SUPPORT_SON
  2091. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  2092. dp_txrx_peer_find_inact_timeout_handler,
  2093. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  2094. #endif
  2095. /* set the reo destination during initialization */
  2096. pdev->reo_dest = pdev->pdev_id + 1;
  2097. return (struct cdp_pdev *)pdev;
  2098. fail1:
  2099. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2100. fail0:
  2101. return NULL;
  2102. }
  2103. /*
  2104. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2105. * @soc: data path SoC handle
  2106. * @pdev: Physical device handle
  2107. *
  2108. * Return: void
  2109. */
  2110. #ifdef QCA_HOST2FW_RXBUF_RING
  2111. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2112. struct dp_pdev *pdev)
  2113. {
  2114. int max_mac_rings =
  2115. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2116. int i;
  2117. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2118. max_mac_rings : MAX_RX_MAC_RINGS;
  2119. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2120. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2121. RXDMA_BUF, 1);
  2122. qdf_timer_free(&soc->mon_reap_timer);
  2123. }
  2124. #else
  2125. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2126. struct dp_pdev *pdev)
  2127. {
  2128. }
  2129. #endif
  2130. /*
  2131. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2132. * @pdev: device object
  2133. *
  2134. * Return: void
  2135. */
  2136. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2137. {
  2138. struct dp_neighbour_peer *peer = NULL;
  2139. struct dp_neighbour_peer *temp_peer = NULL;
  2140. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2141. neighbour_peer_list_elem, temp_peer) {
  2142. /* delete this peer from the list */
  2143. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2144. peer, neighbour_peer_list_elem);
  2145. qdf_mem_free(peer);
  2146. }
  2147. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2148. }
  2149. /*
  2150. * dp_pdev_detach_wifi3() - detach txrx pdev
  2151. * @txrx_pdev: Datapath PDEV handle
  2152. * @force: Force detach
  2153. *
  2154. */
  2155. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2156. {
  2157. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2158. struct dp_soc *soc = pdev->soc;
  2159. qdf_nbuf_t curr_nbuf, next_nbuf;
  2160. dp_wdi_event_detach(pdev);
  2161. dp_tx_pdev_detach(pdev);
  2162. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2163. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2164. TCL_DATA, pdev->pdev_id);
  2165. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2166. WBM2SW_RELEASE, pdev->pdev_id);
  2167. }
  2168. dp_pktlogmod_exit(pdev);
  2169. dp_rx_pdev_detach(pdev);
  2170. dp_rx_pdev_mon_detach(pdev);
  2171. dp_neighbour_peers_detach(pdev);
  2172. qdf_spinlock_destroy(&pdev->tx_mutex);
  2173. dp_ipa_uc_detach(soc, pdev);
  2174. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF, 2);
  2175. /* Cleanup per PDEV REO rings if configured */
  2176. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2177. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2178. REO_DST, pdev->pdev_id);
  2179. }
  2180. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2181. dp_rxdma_ring_cleanup(soc, pdev);
  2182. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  2183. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  2184. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  2185. RXDMA_MONITOR_STATUS, 0);
  2186. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  2187. RXDMA_MONITOR_DESC, 0);
  2188. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2189. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST, 0);
  2190. } else {
  2191. int i;
  2192. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2193. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[i],
  2194. RXDMA_DST, 0);
  2195. }
  2196. curr_nbuf = pdev->invalid_peer_head_msdu;
  2197. while (curr_nbuf) {
  2198. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2199. qdf_nbuf_free(curr_nbuf);
  2200. curr_nbuf = next_nbuf;
  2201. }
  2202. soc->pdev_list[pdev->pdev_id] = NULL;
  2203. soc->pdev_count--;
  2204. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2205. qdf_mem_free(pdev->dp_txrx_handle);
  2206. qdf_mem_free(pdev);
  2207. }
  2208. /*
  2209. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2210. * @soc: DP SOC handle
  2211. */
  2212. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2213. {
  2214. struct reo_desc_list_node *desc;
  2215. struct dp_rx_tid *rx_tid;
  2216. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2217. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2218. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2219. rx_tid = &desc->rx_tid;
  2220. qdf_mem_unmap_nbytes_single(soc->osdev,
  2221. rx_tid->hw_qdesc_paddr,
  2222. QDF_DMA_BIDIRECTIONAL,
  2223. rx_tid->hw_qdesc_alloc_size);
  2224. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2225. qdf_mem_free(desc);
  2226. }
  2227. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2228. qdf_list_destroy(&soc->reo_desc_freelist);
  2229. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2230. }
  2231. /*
  2232. * dp_soc_detach_wifi3() - Detach txrx SOC
  2233. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2234. */
  2235. static void dp_soc_detach_wifi3(void *txrx_soc)
  2236. {
  2237. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2238. int i;
  2239. qdf_atomic_set(&soc->cmn_init_done, 0);
  2240. qdf_flush_work(&soc->htt_stats.work);
  2241. qdf_disable_work(&soc->htt_stats.work);
  2242. /* Free pending htt stats messages */
  2243. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2244. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2245. if (soc->pdev_list[i])
  2246. dp_pdev_detach_wifi3(
  2247. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2248. }
  2249. dp_peer_find_detach(soc);
  2250. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2251. * SW descriptors
  2252. */
  2253. /* Free the ring memories */
  2254. /* Common rings */
  2255. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2256. dp_tx_soc_detach(soc);
  2257. /* Tx data rings */
  2258. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2259. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2260. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2261. TCL_DATA, i);
  2262. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2263. WBM2SW_RELEASE, i);
  2264. }
  2265. }
  2266. /* TCL command and status rings */
  2267. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2268. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2269. /* Rx data rings */
  2270. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2271. soc->num_reo_dest_rings =
  2272. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2273. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2274. /* TODO: Get number of rings and ring sizes
  2275. * from wlan_cfg
  2276. */
  2277. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2278. REO_DST, i);
  2279. }
  2280. }
  2281. /* REO reinjection ring */
  2282. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2283. /* Rx release ring */
  2284. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2285. /* Rx exception ring */
  2286. /* TODO: Better to store ring_type and ring_num in
  2287. * dp_srng during setup
  2288. */
  2289. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2290. /* REO command and status rings */
  2291. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2292. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2293. dp_hw_link_desc_pool_cleanup(soc);
  2294. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2295. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2296. htt_soc_detach(soc->htt_handle);
  2297. dp_reo_cmdlist_destroy(soc);
  2298. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2299. dp_reo_desc_freelist_destroy(soc);
  2300. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2301. dp_soc_wds_detach(soc);
  2302. qdf_spinlock_destroy(&soc->ast_lock);
  2303. qdf_mem_free(soc);
  2304. }
  2305. /*
  2306. * dp_rxdma_ring_config() - configure the RX DMA rings
  2307. *
  2308. * This function is used to configure the MAC rings.
  2309. * On MCL host provides buffers in Host2FW ring
  2310. * FW refills (copies) buffers to the ring and updates
  2311. * ring_idx in register
  2312. *
  2313. * @soc: data path SoC handle
  2314. *
  2315. * Return: void
  2316. */
  2317. #ifdef QCA_HOST2FW_RXBUF_RING
  2318. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2319. {
  2320. int i;
  2321. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2322. struct dp_pdev *pdev = soc->pdev_list[i];
  2323. if (pdev) {
  2324. int mac_id = 0;
  2325. int j;
  2326. bool dbs_enable = 0;
  2327. int max_mac_rings =
  2328. wlan_cfg_get_num_mac_rings
  2329. (pdev->wlan_cfg_ctx);
  2330. htt_srng_setup(soc->htt_handle, 0,
  2331. pdev->rx_refill_buf_ring.hal_srng,
  2332. RXDMA_BUF);
  2333. if (pdev->rx_refill_buf_ring2.hal_srng)
  2334. htt_srng_setup(soc->htt_handle, 0,
  2335. pdev->rx_refill_buf_ring2.hal_srng,
  2336. RXDMA_BUF);
  2337. if (soc->cdp_soc.ol_ops->
  2338. is_hw_dbs_2x2_capable) {
  2339. dbs_enable = soc->cdp_soc.ol_ops->
  2340. is_hw_dbs_2x2_capable(soc->psoc);
  2341. }
  2342. if (dbs_enable) {
  2343. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2344. QDF_TRACE_LEVEL_ERROR,
  2345. FL("DBS enabled max_mac_rings %d\n"),
  2346. max_mac_rings);
  2347. } else {
  2348. max_mac_rings = 1;
  2349. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2350. QDF_TRACE_LEVEL_ERROR,
  2351. FL("DBS disabled, max_mac_rings %d\n"),
  2352. max_mac_rings);
  2353. }
  2354. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2355. FL("pdev_id %d max_mac_rings %d\n"),
  2356. pdev->pdev_id, max_mac_rings);
  2357. for (j = 0; j < max_mac_rings; j++) {
  2358. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2359. QDF_TRACE_LEVEL_ERROR,
  2360. FL("mac_id %d\n"), mac_id);
  2361. htt_srng_setup(soc->htt_handle, mac_id,
  2362. pdev->rx_mac_buf_ring[j]
  2363. .hal_srng,
  2364. RXDMA_BUF);
  2365. htt_srng_setup(soc->htt_handle, mac_id,
  2366. pdev->rxdma_err_dst_ring[j]
  2367. .hal_srng,
  2368. RXDMA_DST);
  2369. mac_id++;
  2370. }
  2371. /* Configure monitor mode rings */
  2372. htt_srng_setup(soc->htt_handle, i,
  2373. pdev->rxdma_mon_buf_ring.hal_srng,
  2374. RXDMA_MONITOR_BUF);
  2375. htt_srng_setup(soc->htt_handle, i,
  2376. pdev->rxdma_mon_dst_ring.hal_srng,
  2377. RXDMA_MONITOR_DST);
  2378. htt_srng_setup(soc->htt_handle, i,
  2379. pdev->rxdma_mon_status_ring.hal_srng,
  2380. RXDMA_MONITOR_STATUS);
  2381. htt_srng_setup(soc->htt_handle, i,
  2382. pdev->rxdma_mon_desc_ring.hal_srng,
  2383. RXDMA_MONITOR_DESC);
  2384. }
  2385. }
  2386. /*
  2387. * Timer to reap rxdma status rings.
  2388. * Needed until we enable ppdu end interrupts
  2389. */
  2390. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2391. dp_service_mon_rings, (void *)soc,
  2392. QDF_TIMER_TYPE_WAKE_APPS);
  2393. soc->reap_timer_init = 1;
  2394. }
  2395. #else
  2396. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2397. {
  2398. int i;
  2399. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2400. struct dp_pdev *pdev = soc->pdev_list[i];
  2401. if (pdev) {
  2402. int ring_idx = dp_get_ring_id_for_mac_id(soc, i);
  2403. htt_srng_setup(soc->htt_handle, i,
  2404. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2405. htt_srng_setup(soc->htt_handle, i,
  2406. pdev->rxdma_mon_buf_ring.hal_srng,
  2407. RXDMA_MONITOR_BUF);
  2408. htt_srng_setup(soc->htt_handle, i,
  2409. pdev->rxdma_mon_dst_ring.hal_srng,
  2410. RXDMA_MONITOR_DST);
  2411. htt_srng_setup(soc->htt_handle, i,
  2412. pdev->rxdma_mon_status_ring.hal_srng,
  2413. RXDMA_MONITOR_STATUS);
  2414. htt_srng_setup(soc->htt_handle, i,
  2415. pdev->rxdma_mon_desc_ring.hal_srng,
  2416. RXDMA_MONITOR_DESC);
  2417. htt_srng_setup(soc->htt_handle, i,
  2418. pdev->rxdma_err_dst_ring[ring_idx].hal_srng,
  2419. RXDMA_DST);
  2420. }
  2421. }
  2422. }
  2423. #endif
  2424. /*
  2425. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2426. * @txrx_soc: Datapath SOC handle
  2427. */
  2428. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2429. {
  2430. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2431. htt_soc_attach_target(soc->htt_handle);
  2432. dp_rxdma_ring_config(soc);
  2433. DP_STATS_INIT(soc);
  2434. /* initialize work queue for stats processing */
  2435. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2436. return 0;
  2437. }
  2438. /*
  2439. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2440. * @txrx_soc: Datapath SOC handle
  2441. */
  2442. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2443. {
  2444. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2445. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2446. }
  2447. /*
  2448. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2449. * @txrx_soc: Datapath SOC handle
  2450. * @nss_cfg: nss config
  2451. */
  2452. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2453. {
  2454. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2455. wlan_cfg_set_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx, config);
  2456. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2457. FL("nss-wifi<0> nss config is enabled"));
  2458. }
  2459. /*
  2460. * dp_vdev_attach_wifi3() - attach txrx vdev
  2461. * @txrx_pdev: Datapath PDEV handle
  2462. * @vdev_mac_addr: MAC address of the virtual interface
  2463. * @vdev_id: VDEV Id
  2464. * @wlan_op_mode: VDEV operating mode
  2465. *
  2466. * Return: DP VDEV handle on success, NULL on failure
  2467. */
  2468. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2469. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2470. {
  2471. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2472. struct dp_soc *soc = pdev->soc;
  2473. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2474. int tx_ring_size;
  2475. if (!vdev) {
  2476. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2477. FL("DP VDEV memory allocation failed"));
  2478. goto fail0;
  2479. }
  2480. vdev->pdev = pdev;
  2481. vdev->vdev_id = vdev_id;
  2482. vdev->opmode = op_mode;
  2483. vdev->osdev = soc->osdev;
  2484. vdev->osif_rx = NULL;
  2485. vdev->osif_rsim_rx_decap = NULL;
  2486. vdev->osif_get_key = NULL;
  2487. vdev->osif_rx_mon = NULL;
  2488. vdev->osif_tx_free_ext = NULL;
  2489. vdev->osif_vdev = NULL;
  2490. vdev->delete.pending = 0;
  2491. vdev->safemode = 0;
  2492. vdev->drop_unenc = 1;
  2493. vdev->sec_type = cdp_sec_type_none;
  2494. #ifdef notyet
  2495. vdev->filters_num = 0;
  2496. #endif
  2497. qdf_mem_copy(
  2498. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2499. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2500. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2501. vdev->dscp_tid_map_id = 0;
  2502. vdev->mcast_enhancement_en = 0;
  2503. tx_ring_size = wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2504. /* TODO: Initialize default HTT meta data that will be used in
  2505. * TCL descriptors for packets transmitted from this VDEV
  2506. */
  2507. TAILQ_INIT(&vdev->peer_list);
  2508. /* add this vdev into the pdev's list */
  2509. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2510. pdev->vdev_count++;
  2511. dp_tx_vdev_attach(vdev);
  2512. if (QDF_STATUS_SUCCESS != dp_tx_flow_pool_map_handler(pdev, vdev_id,
  2513. FLOW_TYPE_VDEV, vdev_id, tx_ring_size))
  2514. goto fail1;
  2515. if ((soc->intr_mode == DP_INTR_POLL) &&
  2516. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2517. if (pdev->vdev_count == 1)
  2518. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2519. }
  2520. dp_lro_hash_setup(soc);
  2521. /* LRO */
  2522. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2523. wlan_op_mode_sta == vdev->opmode)
  2524. vdev->lro_enable = true;
  2525. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2526. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2527. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2528. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2529. DP_STATS_INIT(vdev);
  2530. return (struct cdp_vdev *)vdev;
  2531. fail1:
  2532. dp_tx_vdev_detach(vdev);
  2533. qdf_mem_free(vdev);
  2534. fail0:
  2535. return NULL;
  2536. }
  2537. /**
  2538. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2539. * @vdev: Datapath VDEV handle
  2540. * @osif_vdev: OSIF vdev handle
  2541. * @txrx_ops: Tx and Rx operations
  2542. *
  2543. * Return: DP VDEV handle on success, NULL on failure
  2544. */
  2545. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2546. void *osif_vdev,
  2547. struct ol_txrx_ops *txrx_ops)
  2548. {
  2549. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2550. vdev->osif_vdev = osif_vdev;
  2551. vdev->osif_rx = txrx_ops->rx.rx;
  2552. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2553. vdev->osif_get_key = txrx_ops->get_key;
  2554. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2555. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2556. #ifdef notyet
  2557. #if ATH_SUPPORT_WAPI
  2558. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2559. #endif
  2560. #endif
  2561. #ifdef UMAC_SUPPORT_PROXY_ARP
  2562. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2563. #endif
  2564. vdev->me_convert = txrx_ops->me_convert;
  2565. /* TODO: Enable the following once Tx code is integrated */
  2566. if (vdev->mesh_vdev)
  2567. txrx_ops->tx.tx = dp_tx_send_mesh;
  2568. else
  2569. txrx_ops->tx.tx = dp_tx_send;
  2570. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2571. "DP Vdev Register success");
  2572. }
  2573. /*
  2574. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2575. * @txrx_vdev: Datapath VDEV handle
  2576. * @callback: Callback OL_IF on completion of detach
  2577. * @cb_context: Callback context
  2578. *
  2579. */
  2580. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2581. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2582. {
  2583. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2584. struct dp_pdev *pdev = vdev->pdev;
  2585. struct dp_soc *soc = pdev->soc;
  2586. /* preconditions */
  2587. qdf_assert(vdev);
  2588. /* remove the vdev from its parent pdev's list */
  2589. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2590. /*
  2591. * Use peer_ref_mutex while accessing peer_list, in case
  2592. * a peer is in the process of being removed from the list.
  2593. */
  2594. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2595. /* check that the vdev has no peers allocated */
  2596. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  2597. /* debug print - will be removed later */
  2598. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  2599. FL("not deleting vdev object %pK (%pM)"
  2600. "until deletion finishes for all its peers"),
  2601. vdev, vdev->mac_addr.raw);
  2602. /* indicate that the vdev needs to be deleted */
  2603. vdev->delete.pending = 1;
  2604. vdev->delete.callback = callback;
  2605. vdev->delete.context = cb_context;
  2606. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2607. return;
  2608. }
  2609. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2610. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id, FLOW_TYPE_VDEV,
  2611. vdev->vdev_id);
  2612. dp_tx_vdev_detach(vdev);
  2613. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2614. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  2615. qdf_mem_free(vdev);
  2616. if (callback)
  2617. callback(cb_context);
  2618. }
  2619. /*
  2620. * dp_peer_create_wifi3() - attach txrx peer
  2621. * @txrx_vdev: Datapath VDEV handle
  2622. * @peer_mac_addr: Peer MAC address
  2623. *
  2624. * Return: DP peeer handle on success, NULL on failure
  2625. */
  2626. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  2627. uint8_t *peer_mac_addr)
  2628. {
  2629. struct dp_peer *peer;
  2630. int i;
  2631. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2632. struct dp_pdev *pdev;
  2633. struct dp_soc *soc;
  2634. /* preconditions */
  2635. qdf_assert(vdev);
  2636. qdf_assert(peer_mac_addr);
  2637. pdev = vdev->pdev;
  2638. soc = pdev->soc;
  2639. #ifdef notyet
  2640. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  2641. soc->mempool_ol_ath_peer);
  2642. #else
  2643. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  2644. #endif
  2645. if (!peer)
  2646. return NULL; /* failure */
  2647. qdf_mem_zero(peer, sizeof(struct dp_peer));
  2648. TAILQ_INIT(&peer->ast_entry_list);
  2649. /* store provided params */
  2650. peer->vdev = vdev;
  2651. dp_peer_add_ast(soc, peer, peer_mac_addr, dp_ast_type_static);
  2652. qdf_spinlock_create(&peer->peer_info_lock);
  2653. qdf_mem_copy(
  2654. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2655. /* TODO: See of rx_opt_proc is really required */
  2656. peer->rx_opt_proc = soc->rx_opt_proc;
  2657. /* initialize the peer_id */
  2658. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2659. peer->peer_ids[i] = HTT_INVALID_PEER;
  2660. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2661. qdf_atomic_init(&peer->ref_cnt);
  2662. /* keep one reference for attach */
  2663. qdf_atomic_inc(&peer->ref_cnt);
  2664. /* add this peer into the vdev's list */
  2665. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  2666. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2667. /* TODO: See if hash based search is required */
  2668. dp_peer_find_hash_add(soc, peer);
  2669. /* Initialize the peer state */
  2670. peer->state = OL_TXRX_PEER_STATE_DISC;
  2671. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2672. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  2673. vdev, peer, peer->mac_addr.raw,
  2674. qdf_atomic_read(&peer->ref_cnt));
  2675. /*
  2676. * For every peer MAp message search and set if bss_peer
  2677. */
  2678. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  2679. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2680. "vdev bss_peer!!!!");
  2681. peer->bss_peer = 1;
  2682. vdev->vap_bss_peer = peer;
  2683. }
  2684. #ifndef CONFIG_WIN
  2685. dp_local_peer_id_alloc(pdev, peer);
  2686. #endif
  2687. DP_STATS_INIT(peer);
  2688. return (void *)peer;
  2689. }
  2690. /*
  2691. * dp_peer_setup_wifi3() - initialize the peer
  2692. * @vdev_hdl: virtual device object
  2693. * @peer: Peer object
  2694. *
  2695. * Return: void
  2696. */
  2697. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  2698. {
  2699. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  2700. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2701. struct dp_pdev *pdev;
  2702. struct dp_soc *soc;
  2703. bool hash_based = 0;
  2704. enum cdp_host_reo_dest_ring reo_dest;
  2705. /* preconditions */
  2706. qdf_assert(vdev);
  2707. qdf_assert(peer);
  2708. pdev = vdev->pdev;
  2709. soc = pdev->soc;
  2710. dp_peer_rx_init(pdev, peer);
  2711. peer->last_assoc_rcvd = 0;
  2712. peer->last_disassoc_rcvd = 0;
  2713. peer->last_deauth_rcvd = 0;
  2714. /*
  2715. * hash based steering is disabled for Radios which are offloaded
  2716. * to NSS
  2717. */
  2718. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2719. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2720. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2721. FL("hash based steering for pdev: %d is %d\n"),
  2722. pdev->pdev_id, hash_based);
  2723. /*
  2724. * Below line of code will ensure the proper reo_dest ring is choosen
  2725. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2726. */
  2727. reo_dest = pdev->reo_dest;
  2728. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  2729. /* TODO: Check the destination ring number to be passed to FW */
  2730. soc->cdp_soc.ol_ops->peer_set_default_routing(
  2731. pdev->osif_pdev, peer->mac_addr.raw,
  2732. peer->vdev->vdev_id, hash_based, reo_dest);
  2733. }
  2734. return;
  2735. }
  2736. /*
  2737. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  2738. * @vdev_handle: virtual device object
  2739. * @htt_pkt_type: type of pkt
  2740. *
  2741. * Return: void
  2742. */
  2743. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  2744. enum htt_cmn_pkt_type val)
  2745. {
  2746. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2747. vdev->tx_encap_type = val;
  2748. }
  2749. /*
  2750. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  2751. * @vdev_handle: virtual device object
  2752. * @htt_pkt_type: type of pkt
  2753. *
  2754. * Return: void
  2755. */
  2756. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  2757. enum htt_cmn_pkt_type val)
  2758. {
  2759. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2760. vdev->rx_decap_type = val;
  2761. }
  2762. /*
  2763. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  2764. * @pdev_handle: physical device object
  2765. * @val: reo destination ring index (1 - 4)
  2766. *
  2767. * Return: void
  2768. */
  2769. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  2770. enum cdp_host_reo_dest_ring val)
  2771. {
  2772. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2773. if (pdev)
  2774. pdev->reo_dest = val;
  2775. }
  2776. /*
  2777. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  2778. * @pdev_handle: physical device object
  2779. *
  2780. * Return: reo destination ring index
  2781. */
  2782. static enum cdp_host_reo_dest_ring
  2783. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  2784. {
  2785. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2786. if (pdev)
  2787. return pdev->reo_dest;
  2788. else
  2789. return cdp_host_reo_dest_ring_unknown;
  2790. }
  2791. #ifdef QCA_SUPPORT_SON
  2792. static void dp_son_peer_authorize(struct dp_peer *peer)
  2793. {
  2794. struct dp_soc *soc;
  2795. soc = peer->vdev->pdev->soc;
  2796. peer->peer_bs_inact_flag = 0;
  2797. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2798. return;
  2799. }
  2800. #else
  2801. static void dp_son_peer_authorize(struct dp_peer *peer)
  2802. {
  2803. return;
  2804. }
  2805. #endif
  2806. /*
  2807. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  2808. * @pdev_handle: device object
  2809. * @val: value to be set
  2810. *
  2811. * Return: void
  2812. */
  2813. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  2814. uint32_t val)
  2815. {
  2816. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2817. /* Enable/Disable smart mesh filtering. This flag will be checked
  2818. * during rx processing to check if packets are from NAC clients.
  2819. */
  2820. pdev->filter_neighbour_peers = val;
  2821. return 0;
  2822. }
  2823. /*
  2824. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  2825. * address for smart mesh filtering
  2826. * @pdev_handle: device object
  2827. * @cmd: Add/Del command
  2828. * @macaddr: nac client mac address
  2829. *
  2830. * Return: void
  2831. */
  2832. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  2833. uint32_t cmd, uint8_t *macaddr)
  2834. {
  2835. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2836. struct dp_neighbour_peer *peer = NULL;
  2837. if (!macaddr)
  2838. goto fail0;
  2839. /* Store address of NAC (neighbour peer) which will be checked
  2840. * against TA of received packets.
  2841. */
  2842. if (cmd == DP_NAC_PARAM_ADD) {
  2843. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  2844. sizeof(*peer));
  2845. if (!peer) {
  2846. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2847. FL("DP neighbour peer node memory allocation failed"));
  2848. goto fail0;
  2849. }
  2850. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  2851. macaddr, DP_MAC_ADDR_LEN);
  2852. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  2853. /* add this neighbour peer into the list */
  2854. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  2855. neighbour_peer_list_elem);
  2856. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  2857. return 1;
  2858. } else if (cmd == DP_NAC_PARAM_DEL) {
  2859. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  2860. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  2861. neighbour_peer_list_elem) {
  2862. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  2863. macaddr, DP_MAC_ADDR_LEN)) {
  2864. /* delete this peer from the list */
  2865. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2866. peer, neighbour_peer_list_elem);
  2867. qdf_mem_free(peer);
  2868. break;
  2869. }
  2870. }
  2871. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  2872. return 1;
  2873. }
  2874. fail0:
  2875. return 0;
  2876. }
  2877. /*
  2878. * dp_get_sec_type() - Get the security type
  2879. * @peer: Datapath peer handle
  2880. * @sec_idx: Security id (mcast, ucast)
  2881. *
  2882. * return sec_type: Security type
  2883. */
  2884. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  2885. {
  2886. struct dp_peer *dpeer = (struct dp_peer *)peer;
  2887. return dpeer->security[sec_idx].sec_type;
  2888. }
  2889. /*
  2890. * dp_peer_authorize() - authorize txrx peer
  2891. * @peer_handle: Datapath peer handle
  2892. * @authorize
  2893. *
  2894. */
  2895. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  2896. {
  2897. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2898. struct dp_soc *soc;
  2899. if (peer != NULL) {
  2900. soc = peer->vdev->pdev->soc;
  2901. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2902. dp_son_peer_authorize(peer);
  2903. peer->authorize = authorize ? 1 : 0;
  2904. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2905. }
  2906. }
  2907. #ifdef QCA_SUPPORT_SON
  2908. /*
  2909. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  2910. * @pdev_handle: Device handle
  2911. * @new_threshold : updated threshold value
  2912. *
  2913. */
  2914. static void
  2915. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  2916. u_int16_t new_threshold)
  2917. {
  2918. struct dp_vdev *vdev;
  2919. struct dp_peer *peer;
  2920. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2921. struct dp_soc *soc = pdev->soc;
  2922. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  2923. if (old_threshold == new_threshold)
  2924. return;
  2925. soc->pdev_bs_inact_reload = new_threshold;
  2926. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2927. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2928. if (vdev->opmode != wlan_op_mode_ap)
  2929. continue;
  2930. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2931. if (!peer->authorize)
  2932. continue;
  2933. if (old_threshold - peer->peer_bs_inact >=
  2934. new_threshold) {
  2935. dp_mark_peer_inact((void *)peer, true);
  2936. peer->peer_bs_inact = 0;
  2937. } else {
  2938. peer->peer_bs_inact = new_threshold -
  2939. (old_threshold - peer->peer_bs_inact);
  2940. }
  2941. }
  2942. }
  2943. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2944. }
  2945. /**
  2946. * dp_txrx_reset_inact_count(): Reset inact count
  2947. * @pdev_handle - device handle
  2948. *
  2949. * Return: void
  2950. */
  2951. static void
  2952. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  2953. {
  2954. struct dp_vdev *vdev = NULL;
  2955. struct dp_peer *peer = NULL;
  2956. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2957. struct dp_soc *soc = pdev->soc;
  2958. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2959. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2960. if (vdev->opmode != wlan_op_mode_ap)
  2961. continue;
  2962. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2963. if (!peer->authorize)
  2964. continue;
  2965. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2966. }
  2967. }
  2968. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2969. }
  2970. /**
  2971. * dp_set_inact_params(): set inactivity params
  2972. * @pdev_handle - device handle
  2973. * @inact_check_interval - inactivity interval
  2974. * @inact_normal - Inactivity normal
  2975. * @inact_overload - Inactivity overload
  2976. *
  2977. * Return: bool
  2978. */
  2979. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  2980. u_int16_t inact_check_interval,
  2981. u_int16_t inact_normal, u_int16_t inact_overload)
  2982. {
  2983. struct dp_soc *soc;
  2984. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2985. if (!pdev)
  2986. return false;
  2987. soc = pdev->soc;
  2988. if (!soc)
  2989. return false;
  2990. soc->pdev_bs_inact_interval = inact_check_interval;
  2991. soc->pdev_bs_inact_normal = inact_normal;
  2992. soc->pdev_bs_inact_overload = inact_overload;
  2993. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  2994. soc->pdev_bs_inact_normal);
  2995. return true;
  2996. }
  2997. /**
  2998. * dp_start_inact_timer(): Inactivity timer start
  2999. * @pdev_handle - device handle
  3000. * @enable - Inactivity timer start/stop
  3001. *
  3002. * Return: bool
  3003. */
  3004. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3005. {
  3006. struct dp_soc *soc;
  3007. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3008. if (!pdev)
  3009. return false;
  3010. soc = pdev->soc;
  3011. if (!soc)
  3012. return false;
  3013. if (enable) {
  3014. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3015. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3016. soc->pdev_bs_inact_interval * 1000);
  3017. } else {
  3018. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3019. }
  3020. return true;
  3021. }
  3022. /**
  3023. * dp_set_overload(): Set inactivity overload
  3024. * @pdev_handle - device handle
  3025. * @overload - overload status
  3026. *
  3027. * Return: void
  3028. */
  3029. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3030. {
  3031. struct dp_soc *soc;
  3032. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3033. if (!pdev)
  3034. return;
  3035. soc = pdev->soc;
  3036. if (!soc)
  3037. return;
  3038. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3039. overload ? soc->pdev_bs_inact_overload :
  3040. soc->pdev_bs_inact_normal);
  3041. }
  3042. /**
  3043. * dp_peer_is_inact(): check whether peer is inactive
  3044. * @peer_handle - datapath peer handle
  3045. *
  3046. * Return: bool
  3047. */
  3048. bool dp_peer_is_inact(void *peer_handle)
  3049. {
  3050. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3051. if (!peer)
  3052. return false;
  3053. return peer->peer_bs_inact_flag == 1;
  3054. }
  3055. #else
  3056. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3057. u_int16_t inact_normal, u_int16_t inact_overload)
  3058. {
  3059. return false;
  3060. }
  3061. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3062. {
  3063. return false;
  3064. }
  3065. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3066. {
  3067. return;
  3068. }
  3069. bool dp_peer_is_inact(void *peer)
  3070. {
  3071. return false;
  3072. }
  3073. void dp_mark_peer_inact(void *peer, bool inactive)
  3074. {
  3075. return;
  3076. }
  3077. #endif
  3078. /*
  3079. * dp_peer_unref_delete() - unref and delete peer
  3080. * @peer_handle: Datapath peer handle
  3081. *
  3082. */
  3083. void dp_peer_unref_delete(void *peer_handle)
  3084. {
  3085. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3086. struct dp_peer *bss_peer = NULL;
  3087. struct dp_vdev *vdev = peer->vdev;
  3088. struct dp_pdev *pdev = vdev->pdev;
  3089. struct dp_soc *soc = pdev->soc;
  3090. struct dp_peer *tmppeer;
  3091. int found = 0;
  3092. uint16_t peer_id;
  3093. /*
  3094. * Hold the lock all the way from checking if the peer ref count
  3095. * is zero until the peer references are removed from the hash
  3096. * table and vdev list (if the peer ref count is zero).
  3097. * This protects against a new HL tx operation starting to use the
  3098. * peer object just after this function concludes it's done being used.
  3099. * Furthermore, the lock needs to be held while checking whether the
  3100. * vdev's list of peers is empty, to make sure that list is not modified
  3101. * concurrently with the empty check.
  3102. */
  3103. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3104. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3105. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3106. peer, qdf_atomic_read(&peer->ref_cnt));
  3107. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3108. peer_id = peer->peer_ids[0];
  3109. /*
  3110. * Make sure that the reference to the peer in
  3111. * peer object map is removed
  3112. */
  3113. if (peer_id != HTT_INVALID_PEER)
  3114. soc->peer_id_to_obj_map[peer_id] = NULL;
  3115. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3116. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3117. /* remove the reference to the peer from the hash table */
  3118. dp_peer_find_hash_remove(soc, peer);
  3119. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3120. if (tmppeer == peer) {
  3121. found = 1;
  3122. break;
  3123. }
  3124. }
  3125. if (found) {
  3126. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3127. peer_list_elem);
  3128. } else {
  3129. /*Ignoring the remove operation as peer not found*/
  3130. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3131. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3132. peer, vdev, &peer->vdev->peer_list);
  3133. }
  3134. /* cleanup the peer data */
  3135. dp_peer_cleanup(vdev, peer);
  3136. /* check whether the parent vdev has no peers left */
  3137. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3138. /*
  3139. * Now that there are no references to the peer, we can
  3140. * release the peer reference lock.
  3141. */
  3142. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3143. /*
  3144. * Check if the parent vdev was waiting for its peers
  3145. * to be deleted, in order for it to be deleted too.
  3146. */
  3147. if (vdev->delete.pending) {
  3148. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3149. vdev->delete.callback;
  3150. void *vdev_delete_context =
  3151. vdev->delete.context;
  3152. QDF_TRACE(QDF_MODULE_ID_DP,
  3153. QDF_TRACE_LEVEL_INFO_HIGH,
  3154. FL("deleting vdev object %pK (%pM)"
  3155. " - its last peer is done"),
  3156. vdev, vdev->mac_addr.raw);
  3157. /* all peers are gone, go ahead and delete it */
  3158. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id,
  3159. FLOW_TYPE_VDEV,
  3160. vdev->vdev_id);
  3161. dp_tx_vdev_detach(vdev);
  3162. QDF_TRACE(QDF_MODULE_ID_DP,
  3163. QDF_TRACE_LEVEL_INFO_HIGH,
  3164. FL("deleting vdev object %pK (%pM)"),
  3165. vdev, vdev->mac_addr.raw);
  3166. qdf_mem_free(vdev);
  3167. if (vdev_delete_cb)
  3168. vdev_delete_cb(vdev_delete_context);
  3169. }
  3170. } else {
  3171. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3172. }
  3173. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3174. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3175. vdev->vdev_id, peer->mac_addr.raw);
  3176. }
  3177. #ifdef notyet
  3178. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3179. #else
  3180. if (!vdev || !vdev->vap_bss_peer)
  3181. goto free_peer;
  3182. bss_peer = vdev->vap_bss_peer;
  3183. DP_UPDATE_STATS(bss_peer, peer);
  3184. free_peer:
  3185. qdf_mem_free(peer);
  3186. #endif
  3187. } else {
  3188. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3189. }
  3190. }
  3191. /*
  3192. * dp_peer_detach_wifi3() – Detach txrx peer
  3193. * @peer_handle: Datapath peer handle
  3194. * @bitmap: bitmap indicating special handling of request.
  3195. *
  3196. */
  3197. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3198. {
  3199. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3200. /* redirect the peer's rx delivery function to point to a
  3201. * discard func
  3202. */
  3203. peer->rx_opt_proc = dp_rx_discard;
  3204. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3205. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3206. #ifndef CONFIG_WIN
  3207. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3208. #endif
  3209. qdf_spinlock_destroy(&peer->peer_info_lock);
  3210. /*
  3211. * Remove the reference added during peer_attach.
  3212. * The peer will still be left allocated until the
  3213. * PEER_UNMAP message arrives to remove the other
  3214. * reference, added by the PEER_MAP message.
  3215. */
  3216. dp_peer_unref_delete(peer_handle);
  3217. }
  3218. /*
  3219. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3220. * @peer_handle: Datapath peer handle
  3221. *
  3222. */
  3223. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3224. {
  3225. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3226. return vdev->mac_addr.raw;
  3227. }
  3228. /*
  3229. * dp_vdev_set_wds() - Enable per packet stats
  3230. * @vdev_handle: DP VDEV handle
  3231. * @val: value
  3232. *
  3233. * Return: none
  3234. */
  3235. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3236. {
  3237. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3238. vdev->wds_enabled = val;
  3239. return 0;
  3240. }
  3241. /*
  3242. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3243. * @peer_handle: Datapath peer handle
  3244. *
  3245. */
  3246. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3247. uint8_t vdev_id)
  3248. {
  3249. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3250. struct dp_vdev *vdev = NULL;
  3251. if (qdf_unlikely(!pdev))
  3252. return NULL;
  3253. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3254. if (vdev->vdev_id == vdev_id)
  3255. break;
  3256. }
  3257. return (struct cdp_vdev *)vdev;
  3258. }
  3259. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3260. {
  3261. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3262. return vdev->opmode;
  3263. }
  3264. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3265. {
  3266. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3267. struct dp_pdev *pdev = vdev->pdev;
  3268. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3269. }
  3270. /**
  3271. * dp_reset_monitor_mode() - Disable monitor mode
  3272. * @pdev_handle: Datapath PDEV handle
  3273. *
  3274. * Return: 0 on success, not 0 on failure
  3275. */
  3276. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3277. {
  3278. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3279. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3280. struct dp_soc *soc;
  3281. uint8_t pdev_id;
  3282. pdev_id = pdev->pdev_id;
  3283. soc = pdev->soc;
  3284. pdev->monitor_vdev = NULL;
  3285. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3286. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3287. pdev->rxdma_mon_buf_ring.hal_srng,
  3288. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3289. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3290. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3291. RX_BUFFER_SIZE, &htt_tlv_filter);
  3292. return 0;
  3293. }
  3294. /**
  3295. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3296. * @vdev_handle: Datapath VDEV handle
  3297. * @smart_monitor: Flag to denote if its smart monitor mode
  3298. *
  3299. * Return: 0 on success, not 0 on failure
  3300. */
  3301. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3302. uint8_t smart_monitor)
  3303. {
  3304. /* Many monitor VAPs can exists in a system but only one can be up at
  3305. * anytime
  3306. */
  3307. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3308. struct dp_pdev *pdev;
  3309. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3310. struct dp_soc *soc;
  3311. uint8_t pdev_id;
  3312. qdf_assert(vdev);
  3313. pdev = vdev->pdev;
  3314. pdev_id = pdev->pdev_id;
  3315. soc = pdev->soc;
  3316. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3317. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3318. pdev, pdev_id, soc, vdev);
  3319. /*Check if current pdev's monitor_vdev exists */
  3320. if (pdev->monitor_vdev) {
  3321. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3322. "vdev=%pK\n", vdev);
  3323. qdf_assert(vdev);
  3324. }
  3325. pdev->monitor_vdev = vdev;
  3326. /* If smart monitor mode, do not configure monitor ring */
  3327. if (smart_monitor)
  3328. return QDF_STATUS_SUCCESS;
  3329. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3330. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3331. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3332. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3333. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3334. pdev->mo_data_filter);
  3335. htt_tlv_filter.mpdu_start = 1;
  3336. htt_tlv_filter.msdu_start = 1;
  3337. htt_tlv_filter.packet = 1;
  3338. htt_tlv_filter.msdu_end = 1;
  3339. htt_tlv_filter.mpdu_end = 1;
  3340. htt_tlv_filter.packet_header = 1;
  3341. htt_tlv_filter.attention = 1;
  3342. htt_tlv_filter.ppdu_start = 0;
  3343. htt_tlv_filter.ppdu_end = 0;
  3344. htt_tlv_filter.ppdu_end_user_stats = 0;
  3345. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3346. htt_tlv_filter.ppdu_end_status_done = 0;
  3347. htt_tlv_filter.header_per_msdu = 1;
  3348. htt_tlv_filter.enable_fp =
  3349. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3350. htt_tlv_filter.enable_md = 0;
  3351. htt_tlv_filter.enable_mo =
  3352. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3353. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3354. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3355. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3356. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3357. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3358. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3359. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3360. pdev->rxdma_mon_buf_ring.hal_srng,
  3361. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3362. htt_tlv_filter.mpdu_start = 1;
  3363. htt_tlv_filter.msdu_start = 1;
  3364. htt_tlv_filter.packet = 0;
  3365. htt_tlv_filter.msdu_end = 1;
  3366. htt_tlv_filter.mpdu_end = 1;
  3367. htt_tlv_filter.packet_header = 1;
  3368. htt_tlv_filter.attention = 1;
  3369. htt_tlv_filter.ppdu_start = 1;
  3370. htt_tlv_filter.ppdu_end = 1;
  3371. htt_tlv_filter.ppdu_end_user_stats = 1;
  3372. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3373. htt_tlv_filter.ppdu_end_status_done = 1;
  3374. htt_tlv_filter.header_per_msdu = 0;
  3375. htt_tlv_filter.enable_fp =
  3376. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3377. htt_tlv_filter.enable_md = 0;
  3378. htt_tlv_filter.enable_mo =
  3379. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3380. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3381. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3382. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3383. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3384. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3385. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3386. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3387. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3388. RX_BUFFER_SIZE, &htt_tlv_filter);
  3389. return QDF_STATUS_SUCCESS;
  3390. }
  3391. /**
  3392. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3393. * @pdev_handle: Datapath PDEV handle
  3394. * @filter_val: Flag to select Filter for monitor mode
  3395. * Return: 0 on success, not 0 on failure
  3396. */
  3397. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3398. struct cdp_monitor_filter *filter_val)
  3399. {
  3400. /* Many monitor VAPs can exists in a system but only one can be up at
  3401. * anytime
  3402. */
  3403. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3404. struct dp_vdev *vdev = pdev->monitor_vdev;
  3405. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3406. struct dp_soc *soc;
  3407. uint8_t pdev_id;
  3408. pdev_id = pdev->pdev_id;
  3409. soc = pdev->soc;
  3410. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3411. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3412. pdev, pdev_id, soc, vdev);
  3413. /*Check if current pdev's monitor_vdev exists */
  3414. if (!pdev->monitor_vdev) {
  3415. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3416. "vdev=%pK\n", vdev);
  3417. qdf_assert(vdev);
  3418. }
  3419. /* update filter mode, type in pdev structure */
  3420. pdev->mon_filter_mode = filter_val->mode;
  3421. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3422. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3423. pdev->fp_data_filter = filter_val->fp_data;
  3424. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3425. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3426. pdev->mo_data_filter = filter_val->mo_data;
  3427. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3428. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3429. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3430. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3431. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3432. pdev->mo_data_filter);
  3433. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3434. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3435. pdev->rxdma_mon_buf_ring.hal_srng,
  3436. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3437. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3438. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3439. RX_BUFFER_SIZE, &htt_tlv_filter);
  3440. htt_tlv_filter.mpdu_start = 1;
  3441. htt_tlv_filter.msdu_start = 1;
  3442. htt_tlv_filter.packet = 1;
  3443. htt_tlv_filter.msdu_end = 1;
  3444. htt_tlv_filter.mpdu_end = 1;
  3445. htt_tlv_filter.packet_header = 1;
  3446. htt_tlv_filter.attention = 1;
  3447. htt_tlv_filter.ppdu_start = 0;
  3448. htt_tlv_filter.ppdu_end = 0;
  3449. htt_tlv_filter.ppdu_end_user_stats = 0;
  3450. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3451. htt_tlv_filter.ppdu_end_status_done = 0;
  3452. htt_tlv_filter.header_per_msdu = 1;
  3453. htt_tlv_filter.enable_fp =
  3454. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3455. htt_tlv_filter.enable_md = 0;
  3456. htt_tlv_filter.enable_mo =
  3457. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3458. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3459. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3460. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3461. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3462. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3463. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3464. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3465. pdev->rxdma_mon_buf_ring.hal_srng, RXDMA_MONITOR_BUF,
  3466. RX_BUFFER_SIZE, &htt_tlv_filter);
  3467. htt_tlv_filter.mpdu_start = 1;
  3468. htt_tlv_filter.msdu_start = 1;
  3469. htt_tlv_filter.packet = 0;
  3470. htt_tlv_filter.msdu_end = 1;
  3471. htt_tlv_filter.mpdu_end = 1;
  3472. htt_tlv_filter.packet_header = 1;
  3473. htt_tlv_filter.attention = 1;
  3474. htt_tlv_filter.ppdu_start = 1;
  3475. htt_tlv_filter.ppdu_end = 1;
  3476. htt_tlv_filter.ppdu_end_user_stats = 1;
  3477. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3478. htt_tlv_filter.ppdu_end_status_done = 1;
  3479. htt_tlv_filter.header_per_msdu = 0;
  3480. htt_tlv_filter.enable_fp =
  3481. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3482. htt_tlv_filter.enable_md = 0;
  3483. htt_tlv_filter.enable_mo =
  3484. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3485. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3486. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3487. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3488. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3489. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3490. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3491. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3492. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3493. RX_BUFFER_SIZE, &htt_tlv_filter);
  3494. return QDF_STATUS_SUCCESS;
  3495. }
  3496. #ifdef MESH_MODE_SUPPORT
  3497. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  3498. {
  3499. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3500. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3501. FL("val %d"), val);
  3502. vdev->mesh_vdev = val;
  3503. }
  3504. /*
  3505. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  3506. * @vdev_hdl: virtual device object
  3507. * @val: value to be set
  3508. *
  3509. * Return: void
  3510. */
  3511. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  3512. {
  3513. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3514. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3515. FL("val %d"), val);
  3516. vdev->mesh_rx_filter = val;
  3517. }
  3518. #endif
  3519. /*
  3520. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  3521. * Current scope is bar recieved count
  3522. *
  3523. * @pdev_handle: DP_PDEV handle
  3524. *
  3525. * Return: void
  3526. */
  3527. #define STATS_PROC_TIMEOUT (HZ/10)
  3528. static void
  3529. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  3530. {
  3531. struct dp_vdev *vdev;
  3532. struct dp_peer *peer;
  3533. uint32_t waitcnt;
  3534. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3535. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3536. if (!peer) {
  3537. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3538. FL("DP Invalid Peer refernce"));
  3539. return;
  3540. }
  3541. waitcnt = 0;
  3542. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  3543. while (!(qdf_atomic_read(&(pdev->stats.cmd_complete)))
  3544. && waitcnt < 10) {
  3545. schedule_timeout_interruptible(
  3546. STATS_PROC_TIMEOUT);
  3547. waitcnt++;
  3548. }
  3549. qdf_atomic_set(&(pdev->stats.cmd_complete), 0);
  3550. }
  3551. }
  3552. }
  3553. /**
  3554. * dp_rx_bar_stats_cb(): BAR received stats callback
  3555. * @soc: SOC handle
  3556. * @cb_ctxt: Call back context
  3557. * @reo_status: Reo status
  3558. *
  3559. * return: void
  3560. */
  3561. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  3562. union hal_reo_status *reo_status)
  3563. {
  3564. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  3565. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  3566. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  3567. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  3568. queue_status->header.status);
  3569. qdf_atomic_set(&(pdev->stats.cmd_complete), 1);
  3570. return;
  3571. }
  3572. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  3573. qdf_atomic_set(&(pdev->stats.cmd_complete), 1);
  3574. }
  3575. /**
  3576. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  3577. * @vdev: DP VDEV handle
  3578. *
  3579. * return: void
  3580. */
  3581. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  3582. {
  3583. struct dp_peer *peer = NULL;
  3584. struct dp_soc *soc = vdev->pdev->soc;
  3585. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  3586. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  3587. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  3588. DP_UPDATE_STATS(vdev, peer);
  3589. if (soc->cdp_soc.ol_ops->update_dp_stats)
  3590. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  3591. &vdev->stats, (uint16_t) vdev->vdev_id,
  3592. UPDATE_VDEV_STATS);
  3593. }
  3594. /**
  3595. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  3596. * @pdev: DP PDEV handle
  3597. *
  3598. * return: void
  3599. */
  3600. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  3601. {
  3602. struct dp_vdev *vdev = NULL;
  3603. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  3604. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  3605. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  3606. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3607. dp_aggregate_vdev_stats(vdev);
  3608. DP_UPDATE_STATS(pdev, vdev);
  3609. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  3610. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  3611. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  3612. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  3613. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  3614. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  3615. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  3616. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  3617. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  3618. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  3619. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  3620. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  3621. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  3622. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  3623. DP_STATS_AGGR(pdev, vdev,
  3624. tx_i.mcast_en.dropped_map_error);
  3625. DP_STATS_AGGR(pdev, vdev,
  3626. tx_i.mcast_en.dropped_self_mac);
  3627. DP_STATS_AGGR(pdev, vdev,
  3628. tx_i.mcast_en.dropped_send_fail);
  3629. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  3630. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  3631. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  3632. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  3633. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  3634. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  3635. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  3636. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  3637. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  3638. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  3639. pdev->stats.tx_i.dropped.dropped_pkt.num =
  3640. pdev->stats.tx_i.dropped.dma_error +
  3641. pdev->stats.tx_i.dropped.ring_full +
  3642. pdev->stats.tx_i.dropped.enqueue_fail +
  3643. pdev->stats.tx_i.dropped.desc_na +
  3644. pdev->stats.tx_i.dropped.res_full;
  3645. pdev->stats.tx.last_ack_rssi =
  3646. vdev->stats.tx.last_ack_rssi;
  3647. pdev->stats.tx_i.tso.num_seg =
  3648. vdev->stats.tx_i.tso.num_seg;
  3649. }
  3650. }
  3651. /**
  3652. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  3653. * @pdev: DP_PDEV Handle
  3654. *
  3655. * Return:void
  3656. */
  3657. static inline void
  3658. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  3659. {
  3660. DP_PRINT_STATS("PDEV Tx Stats:\n");
  3661. DP_PRINT_STATS("Received From Stack:");
  3662. DP_PRINT_STATS(" Packets = %d",
  3663. pdev->stats.tx_i.rcvd.num);
  3664. DP_PRINT_STATS(" Bytes = %llu",
  3665. pdev->stats.tx_i.rcvd.bytes);
  3666. DP_PRINT_STATS("Processed:");
  3667. DP_PRINT_STATS(" Packets = %d",
  3668. pdev->stats.tx_i.processed.num);
  3669. DP_PRINT_STATS(" Bytes = %llu",
  3670. pdev->stats.tx_i.processed.bytes);
  3671. DP_PRINT_STATS("Completions:");
  3672. DP_PRINT_STATS(" Packets = %d",
  3673. pdev->stats.tx.comp_pkt.num);
  3674. DP_PRINT_STATS(" Bytes = %llu",
  3675. pdev->stats.tx.comp_pkt.bytes);
  3676. DP_PRINT_STATS("Dropped:");
  3677. DP_PRINT_STATS(" Total = %d",
  3678. pdev->stats.tx_i.dropped.dropped_pkt.num);
  3679. DP_PRINT_STATS(" Dma_map_error = %d",
  3680. pdev->stats.tx_i.dropped.dma_error);
  3681. DP_PRINT_STATS(" Ring Full = %d",
  3682. pdev->stats.tx_i.dropped.ring_full);
  3683. DP_PRINT_STATS(" Descriptor Not available = %d",
  3684. pdev->stats.tx_i.dropped.desc_na);
  3685. DP_PRINT_STATS(" HW enqueue failed= %d",
  3686. pdev->stats.tx_i.dropped.enqueue_fail);
  3687. DP_PRINT_STATS(" Resources Full = %d",
  3688. pdev->stats.tx_i.dropped.res_full);
  3689. DP_PRINT_STATS(" FW removed = %d",
  3690. pdev->stats.tx.dropped.fw_rem);
  3691. DP_PRINT_STATS(" FW removed transmitted = %d",
  3692. pdev->stats.tx.dropped.fw_rem_tx);
  3693. DP_PRINT_STATS(" FW removed untransmitted = %d",
  3694. pdev->stats.tx.dropped.fw_rem_notx);
  3695. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  3696. pdev->stats.tx.dropped.age_out);
  3697. DP_PRINT_STATS("Scatter Gather:");
  3698. DP_PRINT_STATS(" Packets = %d",
  3699. pdev->stats.tx_i.sg.sg_pkt.num);
  3700. DP_PRINT_STATS(" Bytes = %llu",
  3701. pdev->stats.tx_i.sg.sg_pkt.bytes);
  3702. DP_PRINT_STATS(" Dropped By Host = %d",
  3703. pdev->stats.tx_i.sg.dropped_host);
  3704. DP_PRINT_STATS(" Dropped By Target = %d",
  3705. pdev->stats.tx_i.sg.dropped_target);
  3706. DP_PRINT_STATS("TSO:");
  3707. DP_PRINT_STATS(" Number of Segments = %d",
  3708. pdev->stats.tx_i.tso.num_seg);
  3709. DP_PRINT_STATS(" Packets = %d",
  3710. pdev->stats.tx_i.tso.tso_pkt.num);
  3711. DP_PRINT_STATS(" Bytes = %llu",
  3712. pdev->stats.tx_i.tso.tso_pkt.bytes);
  3713. DP_PRINT_STATS(" Dropped By Host = %d",
  3714. pdev->stats.tx_i.tso.dropped_host);
  3715. DP_PRINT_STATS("Mcast Enhancement:");
  3716. DP_PRINT_STATS(" Packets = %d",
  3717. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  3718. DP_PRINT_STATS(" Bytes = %llu",
  3719. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  3720. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  3721. pdev->stats.tx_i.mcast_en.dropped_map_error);
  3722. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  3723. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  3724. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  3725. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  3726. DP_PRINT_STATS(" Unicast sent = %d",
  3727. pdev->stats.tx_i.mcast_en.ucast);
  3728. DP_PRINT_STATS("Raw:");
  3729. DP_PRINT_STATS(" Packets = %d",
  3730. pdev->stats.tx_i.raw.raw_pkt.num);
  3731. DP_PRINT_STATS(" Bytes = %llu",
  3732. pdev->stats.tx_i.raw.raw_pkt.bytes);
  3733. DP_PRINT_STATS(" DMA map error = %d",
  3734. pdev->stats.tx_i.raw.dma_map_error);
  3735. DP_PRINT_STATS("Reinjected:");
  3736. DP_PRINT_STATS(" Packets = %d",
  3737. pdev->stats.tx_i.reinject_pkts.num);
  3738. DP_PRINT_STATS("Bytes = %llu\n",
  3739. pdev->stats.tx_i.reinject_pkts.bytes);
  3740. DP_PRINT_STATS("Inspected:");
  3741. DP_PRINT_STATS(" Packets = %d",
  3742. pdev->stats.tx_i.inspect_pkts.num);
  3743. DP_PRINT_STATS(" Bytes = %llu",
  3744. pdev->stats.tx_i.inspect_pkts.bytes);
  3745. DP_PRINT_STATS("Nawds Multicast:");
  3746. DP_PRINT_STATS(" Packets = %d",
  3747. pdev->stats.tx_i.nawds_mcast.num);
  3748. DP_PRINT_STATS(" Bytes = %llu",
  3749. pdev->stats.tx_i.nawds_mcast.bytes);
  3750. DP_PRINT_STATS("CCE Classified:");
  3751. DP_PRINT_STATS(" CCE Classified Packets: %u",
  3752. pdev->stats.tx_i.cce_classified);
  3753. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  3754. pdev->stats.tx_i.cce_classified_raw);
  3755. DP_PRINT_STATS("Mesh stats:");
  3756. DP_PRINT_STATS(" frames to firmware: %u",
  3757. pdev->stats.tx_i.mesh.exception_fw);
  3758. DP_PRINT_STATS(" completions from fw: %u",
  3759. pdev->stats.tx_i.mesh.completion_fw);
  3760. }
  3761. /**
  3762. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  3763. * @pdev: DP_PDEV Handle
  3764. *
  3765. * Return: void
  3766. */
  3767. static inline void
  3768. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  3769. {
  3770. DP_PRINT_STATS("PDEV Rx Stats:\n");
  3771. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  3772. DP_PRINT_STATS(" Packets = %d %d %d %d",
  3773. pdev->stats.rx.rcvd_reo[0].num,
  3774. pdev->stats.rx.rcvd_reo[1].num,
  3775. pdev->stats.rx.rcvd_reo[2].num,
  3776. pdev->stats.rx.rcvd_reo[3].num);
  3777. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  3778. pdev->stats.rx.rcvd_reo[0].bytes,
  3779. pdev->stats.rx.rcvd_reo[1].bytes,
  3780. pdev->stats.rx.rcvd_reo[2].bytes,
  3781. pdev->stats.rx.rcvd_reo[3].bytes);
  3782. DP_PRINT_STATS("Replenished:");
  3783. DP_PRINT_STATS(" Packets = %d",
  3784. pdev->stats.replenish.pkts.num);
  3785. DP_PRINT_STATS(" Bytes = %llu",
  3786. pdev->stats.replenish.pkts.bytes);
  3787. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  3788. pdev->stats.buf_freelist);
  3789. DP_PRINT_STATS(" Low threshold intr = %d",
  3790. pdev->stats.replenish.low_thresh_intrs);
  3791. DP_PRINT_STATS("Dropped:");
  3792. DP_PRINT_STATS(" msdu_not_done = %d",
  3793. pdev->stats.dropped.msdu_not_done);
  3794. DP_PRINT_STATS("Sent To Stack:");
  3795. DP_PRINT_STATS(" Packets = %d",
  3796. pdev->stats.rx.to_stack.num);
  3797. DP_PRINT_STATS(" Bytes = %llu",
  3798. pdev->stats.rx.to_stack.bytes);
  3799. DP_PRINT_STATS("Multicast/Broadcast:");
  3800. DP_PRINT_STATS(" Packets = %d",
  3801. pdev->stats.rx.multicast.num);
  3802. DP_PRINT_STATS(" Bytes = %llu",
  3803. pdev->stats.rx.multicast.bytes);
  3804. DP_PRINT_STATS("Errors:");
  3805. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  3806. pdev->stats.replenish.rxdma_err);
  3807. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  3808. pdev->stats.err.desc_alloc_fail);
  3809. /* Get bar_recv_cnt */
  3810. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  3811. DP_PRINT_STATS("BAR Received Count: = %d",
  3812. pdev->stats.rx.bar_recv_cnt);
  3813. }
  3814. /**
  3815. * dp_print_soc_tx_stats(): Print SOC level stats
  3816. * @soc DP_SOC Handle
  3817. *
  3818. * Return: void
  3819. */
  3820. static inline void
  3821. dp_print_soc_tx_stats(struct dp_soc *soc)
  3822. {
  3823. DP_PRINT_STATS("SOC Tx Stats:\n");
  3824. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  3825. soc->stats.tx.desc_in_use);
  3826. DP_PRINT_STATS("Invalid peer:");
  3827. DP_PRINT_STATS(" Packets = %d",
  3828. soc->stats.tx.tx_invalid_peer.num);
  3829. DP_PRINT_STATS(" Bytes = %llu",
  3830. soc->stats.tx.tx_invalid_peer.bytes);
  3831. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  3832. soc->stats.tx.tcl_ring_full[0],
  3833. soc->stats.tx.tcl_ring_full[1],
  3834. soc->stats.tx.tcl_ring_full[2]);
  3835. }
  3836. /**
  3837. * dp_print_soc_rx_stats: Print SOC level Rx stats
  3838. * @soc: DP_SOC Handle
  3839. *
  3840. * Return:void
  3841. */
  3842. static inline void
  3843. dp_print_soc_rx_stats(struct dp_soc *soc)
  3844. {
  3845. uint32_t i;
  3846. char reo_error[DP_REO_ERR_LENGTH];
  3847. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  3848. uint8_t index = 0;
  3849. DP_PRINT_STATS("SOC Rx Stats:\n");
  3850. DP_PRINT_STATS("Errors:\n");
  3851. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  3852. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  3853. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  3854. DP_PRINT_STATS("Invalid RBM = %d",
  3855. soc->stats.rx.err.invalid_rbm);
  3856. DP_PRINT_STATS("Invalid Vdev = %d",
  3857. soc->stats.rx.err.invalid_vdev);
  3858. DP_PRINT_STATS("Invalid Pdev = %d",
  3859. soc->stats.rx.err.invalid_pdev);
  3860. DP_PRINT_STATS("Invalid Peer = %d",
  3861. soc->stats.rx.err.rx_invalid_peer.num);
  3862. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  3863. soc->stats.rx.err.hal_ring_access_fail);
  3864. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  3865. index += qdf_snprint(&rxdma_error[index],
  3866. DP_RXDMA_ERR_LENGTH - index,
  3867. " %d", soc->stats.rx.err.rxdma_error[i]);
  3868. }
  3869. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  3870. rxdma_error);
  3871. index = 0;
  3872. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  3873. index += qdf_snprint(&reo_error[index],
  3874. DP_REO_ERR_LENGTH - index,
  3875. " %d", soc->stats.rx.err.reo_error[i]);
  3876. }
  3877. DP_PRINT_STATS("REO Error(0-14):%s",
  3878. reo_error);
  3879. }
  3880. /**
  3881. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  3882. * @soc: DP_SOC handle
  3883. * @srng: DP_SRNG handle
  3884. * @ring_name: SRNG name
  3885. *
  3886. * Return: void
  3887. */
  3888. static inline void
  3889. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  3890. char *ring_name)
  3891. {
  3892. uint32_t tailp;
  3893. uint32_t headp;
  3894. if (srng->hal_srng != NULL) {
  3895. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  3896. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  3897. ring_name, headp, tailp);
  3898. }
  3899. }
  3900. /**
  3901. * dp_print_ring_stats(): Print tail and head pointer
  3902. * @pdev: DP_PDEV handle
  3903. *
  3904. * Return:void
  3905. */
  3906. static inline void
  3907. dp_print_ring_stats(struct dp_pdev *pdev)
  3908. {
  3909. uint32_t i;
  3910. char ring_name[STR_MAXLEN + 1];
  3911. dp_print_ring_stat_from_hal(pdev->soc,
  3912. &pdev->soc->reo_exception_ring,
  3913. "Reo Exception Ring");
  3914. dp_print_ring_stat_from_hal(pdev->soc,
  3915. &pdev->soc->reo_reinject_ring,
  3916. "Reo Inject Ring");
  3917. dp_print_ring_stat_from_hal(pdev->soc,
  3918. &pdev->soc->reo_cmd_ring,
  3919. "Reo Command Ring");
  3920. dp_print_ring_stat_from_hal(pdev->soc,
  3921. &pdev->soc->reo_status_ring,
  3922. "Reo Status Ring");
  3923. dp_print_ring_stat_from_hal(pdev->soc,
  3924. &pdev->soc->rx_rel_ring,
  3925. "Rx Release ring");
  3926. dp_print_ring_stat_from_hal(pdev->soc,
  3927. &pdev->soc->tcl_cmd_ring,
  3928. "Tcl command Ring");
  3929. dp_print_ring_stat_from_hal(pdev->soc,
  3930. &pdev->soc->tcl_status_ring,
  3931. "Tcl Status Ring");
  3932. dp_print_ring_stat_from_hal(pdev->soc,
  3933. &pdev->soc->wbm_desc_rel_ring,
  3934. "Wbm Desc Rel Ring");
  3935. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  3936. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  3937. dp_print_ring_stat_from_hal(pdev->soc,
  3938. &pdev->soc->reo_dest_ring[i],
  3939. ring_name);
  3940. }
  3941. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  3942. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  3943. dp_print_ring_stat_from_hal(pdev->soc,
  3944. &pdev->soc->tcl_data_ring[i],
  3945. ring_name);
  3946. }
  3947. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  3948. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  3949. dp_print_ring_stat_from_hal(pdev->soc,
  3950. &pdev->soc->tx_comp_ring[i],
  3951. ring_name);
  3952. }
  3953. dp_print_ring_stat_from_hal(pdev->soc,
  3954. &pdev->rx_refill_buf_ring,
  3955. "Rx Refill Buf Ring");
  3956. dp_print_ring_stat_from_hal(pdev->soc,
  3957. &pdev->rx_refill_buf_ring2,
  3958. "Second Rx Refill Buf Ring");
  3959. dp_print_ring_stat_from_hal(pdev->soc,
  3960. &pdev->rxdma_mon_buf_ring,
  3961. "Rxdma Mon Buf Ring");
  3962. dp_print_ring_stat_from_hal(pdev->soc,
  3963. &pdev->rxdma_mon_dst_ring,
  3964. "Rxdma Mon Dst Ring");
  3965. dp_print_ring_stat_from_hal(pdev->soc,
  3966. &pdev->rxdma_mon_status_ring,
  3967. "Rxdma Mon Status Ring");
  3968. dp_print_ring_stat_from_hal(pdev->soc,
  3969. &pdev->rxdma_mon_desc_ring,
  3970. "Rxdma mon desc Ring");
  3971. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  3972. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  3973. dp_print_ring_stat_from_hal(pdev->soc,
  3974. &pdev->rxdma_err_dst_ring[i],
  3975. ring_name);
  3976. }
  3977. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  3978. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  3979. dp_print_ring_stat_from_hal(pdev->soc,
  3980. &pdev->rx_mac_buf_ring[i],
  3981. ring_name);
  3982. }
  3983. }
  3984. /**
  3985. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  3986. * @vdev: DP_VDEV handle
  3987. *
  3988. * Return:void
  3989. */
  3990. static inline void
  3991. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  3992. {
  3993. struct dp_peer *peer = NULL;
  3994. DP_STATS_CLR(vdev->pdev);
  3995. DP_STATS_CLR(vdev->pdev->soc);
  3996. DP_STATS_CLR(vdev);
  3997. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3998. if (!peer)
  3999. return;
  4000. DP_STATS_CLR(peer);
  4001. }
  4002. }
  4003. /**
  4004. * dp_print_rx_rates(): Print Rx rate stats
  4005. * @vdev: DP_VDEV handle
  4006. *
  4007. * Return:void
  4008. */
  4009. static inline void
  4010. dp_print_rx_rates(struct dp_vdev *vdev)
  4011. {
  4012. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4013. uint8_t i, mcs, pkt_type;
  4014. uint8_t index = 0;
  4015. char nss[DP_NSS_LENGTH];
  4016. DP_PRINT_STATS("Rx Rate Info:\n");
  4017. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4018. index = 0;
  4019. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4020. if (!dp_rate_string[pkt_type][mcs].valid)
  4021. continue;
  4022. DP_PRINT_STATS(" %s = %d",
  4023. dp_rate_string[pkt_type][mcs].mcs_type,
  4024. pdev->stats.rx.pkt_type[pkt_type].
  4025. mcs_count[mcs]);
  4026. }
  4027. DP_PRINT_STATS("\n");
  4028. }
  4029. index = 0;
  4030. for (i = 0; i < SS_COUNT; i++) {
  4031. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4032. " %d", pdev->stats.rx.nss[i]);
  4033. }
  4034. DP_PRINT_STATS("NSS(1-8) = %s",
  4035. nss);
  4036. DP_PRINT_STATS("SGI ="
  4037. " 0.8us %d,"
  4038. " 0.4us %d,"
  4039. " 1.6us %d,"
  4040. " 3.2us %d,",
  4041. pdev->stats.rx.sgi_count[0],
  4042. pdev->stats.rx.sgi_count[1],
  4043. pdev->stats.rx.sgi_count[2],
  4044. pdev->stats.rx.sgi_count[3]);
  4045. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4046. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4047. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4048. DP_PRINT_STATS("Reception Type ="
  4049. " SU: %d,"
  4050. " MU_MIMO:%d,"
  4051. " MU_OFDMA:%d,"
  4052. " MU_OFDMA_MIMO:%d\n",
  4053. pdev->stats.rx.reception_type[0],
  4054. pdev->stats.rx.reception_type[1],
  4055. pdev->stats.rx.reception_type[2],
  4056. pdev->stats.rx.reception_type[3]);
  4057. DP_PRINT_STATS("Aggregation:\n");
  4058. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4059. pdev->stats.rx.ampdu_cnt);
  4060. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4061. pdev->stats.rx.non_ampdu_cnt);
  4062. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4063. pdev->stats.rx.amsdu_cnt);
  4064. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4065. pdev->stats.rx.non_amsdu_cnt);
  4066. }
  4067. /**
  4068. * dp_print_tx_rates(): Print tx rates
  4069. * @vdev: DP_VDEV handle
  4070. *
  4071. * Return:void
  4072. */
  4073. static inline void
  4074. dp_print_tx_rates(struct dp_vdev *vdev)
  4075. {
  4076. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4077. uint8_t mcs, pkt_type;
  4078. uint32_t index;
  4079. DP_PRINT_STATS("Tx Rate Info:\n");
  4080. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4081. index = 0;
  4082. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4083. if (!dp_rate_string[pkt_type][mcs].valid)
  4084. continue;
  4085. DP_PRINT_STATS(" %s = %d",
  4086. dp_rate_string[pkt_type][mcs].mcs_type,
  4087. pdev->stats.tx.pkt_type[pkt_type].
  4088. mcs_count[mcs]);
  4089. }
  4090. DP_PRINT_STATS("\n");
  4091. }
  4092. DP_PRINT_STATS("SGI ="
  4093. " 0.8us %d"
  4094. " 0.4us %d"
  4095. " 1.6us %d"
  4096. " 3.2us %d",
  4097. pdev->stats.tx.sgi_count[0],
  4098. pdev->stats.tx.sgi_count[1],
  4099. pdev->stats.tx.sgi_count[2],
  4100. pdev->stats.tx.sgi_count[3]);
  4101. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4102. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4103. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4104. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4105. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4106. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4107. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4108. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4109. DP_PRINT_STATS("Aggregation:\n");
  4110. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4111. pdev->stats.tx.amsdu_cnt);
  4112. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4113. pdev->stats.tx.non_amsdu_cnt);
  4114. }
  4115. /**
  4116. * dp_print_peer_stats():print peer stats
  4117. * @peer: DP_PEER handle
  4118. *
  4119. * return void
  4120. */
  4121. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4122. {
  4123. uint8_t i, mcs, pkt_type;
  4124. uint32_t index;
  4125. char nss[DP_NSS_LENGTH];
  4126. DP_PRINT_STATS("Node Tx Stats:\n");
  4127. DP_PRINT_STATS("Total Packet Completions = %d",
  4128. peer->stats.tx.comp_pkt.num);
  4129. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4130. peer->stats.tx.comp_pkt.bytes);
  4131. DP_PRINT_STATS("Success Packets = %d",
  4132. peer->stats.tx.tx_success.num);
  4133. DP_PRINT_STATS("Success Bytes = %llu",
  4134. peer->stats.tx.tx_success.bytes);
  4135. DP_PRINT_STATS("Unicast Success Packets = %d",
  4136. peer->stats.tx.ucast.num);
  4137. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4138. peer->stats.tx.ucast.bytes);
  4139. DP_PRINT_STATS("Multicast Success Packets = %d",
  4140. peer->stats.tx.mcast.num);
  4141. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4142. peer->stats.tx.mcast.bytes);
  4143. DP_PRINT_STATS("Packets Failed = %d",
  4144. peer->stats.tx.tx_failed);
  4145. DP_PRINT_STATS("Packets In OFDMA = %d",
  4146. peer->stats.tx.ofdma);
  4147. DP_PRINT_STATS("Packets In STBC = %d",
  4148. peer->stats.tx.stbc);
  4149. DP_PRINT_STATS("Packets In LDPC = %d",
  4150. peer->stats.tx.ldpc);
  4151. DP_PRINT_STATS("Packet Retries = %d",
  4152. peer->stats.tx.retries);
  4153. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4154. peer->stats.tx.amsdu_cnt);
  4155. DP_PRINT_STATS("Last Packet RSSI = %d",
  4156. peer->stats.tx.last_ack_rssi);
  4157. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4158. peer->stats.tx.dropped.fw_rem);
  4159. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4160. peer->stats.tx.dropped.fw_rem_tx);
  4161. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4162. peer->stats.tx.dropped.fw_rem_notx);
  4163. DP_PRINT_STATS("Dropped : Age Out = %d",
  4164. peer->stats.tx.dropped.age_out);
  4165. DP_PRINT_STATS("NAWDS : ");
  4166. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4167. peer->stats.tx.nawds_mcast_drop);
  4168. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4169. peer->stats.tx.nawds_mcast.num);
  4170. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4171. peer->stats.tx.nawds_mcast.bytes);
  4172. DP_PRINT_STATS("Rate Info:");
  4173. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4174. index = 0;
  4175. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4176. if (!dp_rate_string[pkt_type][mcs].valid)
  4177. continue;
  4178. DP_PRINT_STATS(" %s = %d",
  4179. dp_rate_string[pkt_type][mcs].mcs_type,
  4180. peer->stats.tx.pkt_type[pkt_type].
  4181. mcs_count[mcs]);
  4182. }
  4183. DP_PRINT_STATS("\n");
  4184. }
  4185. DP_PRINT_STATS("SGI = "
  4186. " 0.8us %d"
  4187. " 0.4us %d"
  4188. " 1.6us %d"
  4189. " 3.2us %d",
  4190. peer->stats.tx.sgi_count[0],
  4191. peer->stats.tx.sgi_count[1],
  4192. peer->stats.tx.sgi_count[2],
  4193. peer->stats.tx.sgi_count[3]);
  4194. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4195. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4196. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4197. index = 0;
  4198. for (i = 0; i < SS_COUNT; i++) {
  4199. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4200. " %d", peer->stats.tx.nss[i]);
  4201. }
  4202. DP_PRINT_STATS("NSS(1-8) = %s",
  4203. nss);
  4204. DP_PRINT_STATS("Aggregation:");
  4205. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4206. peer->stats.tx.amsdu_cnt);
  4207. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4208. peer->stats.tx.non_amsdu_cnt);
  4209. DP_PRINT_STATS("Node Rx Stats:");
  4210. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4211. peer->stats.rx.to_stack.num);
  4212. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4213. peer->stats.rx.to_stack.bytes);
  4214. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4215. DP_PRINT_STATS("Ring Id = %d", i);
  4216. DP_PRINT_STATS(" Packets Received = %d",
  4217. peer->stats.rx.rcvd_reo[i].num);
  4218. DP_PRINT_STATS(" Bytes Received = %llu",
  4219. peer->stats.rx.rcvd_reo[i].bytes);
  4220. }
  4221. DP_PRINT_STATS("Multicast Packets Received = %d",
  4222. peer->stats.rx.multicast.num);
  4223. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4224. peer->stats.rx.multicast.bytes);
  4225. DP_PRINT_STATS("WDS Packets Received = %d",
  4226. peer->stats.rx.wds.num);
  4227. DP_PRINT_STATS("WDS Bytes Received = %llu",
  4228. peer->stats.rx.wds.bytes);
  4229. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4230. peer->stats.rx.intra_bss.pkts.num);
  4231. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4232. peer->stats.rx.intra_bss.pkts.bytes);
  4233. DP_PRINT_STATS("Raw Packets Received = %d",
  4234. peer->stats.rx.raw.num);
  4235. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4236. peer->stats.rx.raw.bytes);
  4237. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4238. peer->stats.rx.err.mic_err);
  4239. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4240. peer->stats.rx.err.decrypt_err);
  4241. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4242. peer->stats.rx.non_ampdu_cnt);
  4243. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4244. peer->stats.rx.ampdu_cnt);
  4245. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4246. peer->stats.rx.non_amsdu_cnt);
  4247. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  4248. peer->stats.rx.amsdu_cnt);
  4249. DP_PRINT_STATS("NAWDS : ");
  4250. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  4251. peer->stats.rx.nawds_mcast_drop.num);
  4252. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet Bytes = %llu",
  4253. peer->stats.rx.nawds_mcast_drop.bytes);
  4254. DP_PRINT_STATS("SGI ="
  4255. " 0.8us %d"
  4256. " 0.4us %d"
  4257. " 1.6us %d"
  4258. " 3.2us %d",
  4259. peer->stats.rx.sgi_count[0],
  4260. peer->stats.rx.sgi_count[1],
  4261. peer->stats.rx.sgi_count[2],
  4262. peer->stats.rx.sgi_count[3]);
  4263. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  4264. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  4265. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  4266. DP_PRINT_STATS("Reception Type ="
  4267. " SU %d,"
  4268. " MU_MIMO %d,"
  4269. " MU_OFDMA %d,"
  4270. " MU_OFDMA_MIMO %d",
  4271. peer->stats.rx.reception_type[0],
  4272. peer->stats.rx.reception_type[1],
  4273. peer->stats.rx.reception_type[2],
  4274. peer->stats.rx.reception_type[3]);
  4275. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4276. index = 0;
  4277. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4278. if (!dp_rate_string[pkt_type][mcs].valid)
  4279. continue;
  4280. DP_PRINT_STATS(" %s = %d",
  4281. dp_rate_string[pkt_type][mcs].mcs_type,
  4282. peer->stats.rx.pkt_type[pkt_type].
  4283. mcs_count[mcs]);
  4284. }
  4285. DP_PRINT_STATS("\n");
  4286. }
  4287. index = 0;
  4288. for (i = 0; i < SS_COUNT; i++) {
  4289. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4290. " %d", peer->stats.rx.nss[i]);
  4291. }
  4292. DP_PRINT_STATS("NSS(1-8) = %s",
  4293. nss);
  4294. DP_PRINT_STATS("Aggregation:");
  4295. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  4296. peer->stats.rx.ampdu_cnt);
  4297. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  4298. peer->stats.rx.non_ampdu_cnt);
  4299. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  4300. peer->stats.rx.amsdu_cnt);
  4301. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  4302. peer->stats.rx.non_amsdu_cnt);
  4303. }
  4304. /**
  4305. * dp_print_host_stats()- Function to print the stats aggregated at host
  4306. * @vdev_handle: DP_VDEV handle
  4307. * @type: host stats type
  4308. *
  4309. * Available Stat types
  4310. * TXRX_CLEAR_STATS : Clear the stats
  4311. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  4312. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  4313. * TXRX_TX_HOST_STATS: Print Tx Stats
  4314. * TXRX_RX_HOST_STATS: Print Rx Stats
  4315. * TXRX_AST_STATS: Print AST Stats
  4316. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  4317. *
  4318. * Return: 0 on success, print error message in case of failure
  4319. */
  4320. static int
  4321. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  4322. {
  4323. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4324. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4325. dp_aggregate_pdev_stats(pdev);
  4326. switch (type) {
  4327. case TXRX_CLEAR_STATS:
  4328. dp_txrx_host_stats_clr(vdev);
  4329. break;
  4330. case TXRX_RX_RATE_STATS:
  4331. dp_print_rx_rates(vdev);
  4332. break;
  4333. case TXRX_TX_RATE_STATS:
  4334. dp_print_tx_rates(vdev);
  4335. break;
  4336. case TXRX_TX_HOST_STATS:
  4337. dp_print_pdev_tx_stats(pdev);
  4338. dp_print_soc_tx_stats(pdev->soc);
  4339. break;
  4340. case TXRX_RX_HOST_STATS:
  4341. dp_print_pdev_rx_stats(pdev);
  4342. dp_print_soc_rx_stats(pdev->soc);
  4343. break;
  4344. case TXRX_AST_STATS:
  4345. dp_print_ast_stats(pdev->soc);
  4346. break;
  4347. case TXRX_SRNG_PTR_STATS:
  4348. dp_print_ring_stats(pdev);
  4349. break;
  4350. default:
  4351. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  4352. break;
  4353. }
  4354. return 0;
  4355. }
  4356. /*
  4357. * dp_get_host_peer_stats()- function to print peer stats
  4358. * @pdev_handle: DP_PDEV handle
  4359. * @mac_addr: mac address of the peer
  4360. *
  4361. * Return: void
  4362. */
  4363. static void
  4364. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  4365. {
  4366. struct dp_peer *peer;
  4367. uint8_t local_id;
  4368. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  4369. &local_id);
  4370. if (!peer) {
  4371. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4372. "%s: Invalid peer\n", __func__);
  4373. return;
  4374. }
  4375. dp_print_peer_stats(peer);
  4376. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  4377. return;
  4378. }
  4379. /*
  4380. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  4381. * @pdev: DP_PDEV handle
  4382. *
  4383. * Return: void
  4384. */
  4385. static void
  4386. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  4387. {
  4388. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4389. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4390. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4391. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4392. RX_BUFFER_SIZE, &htt_tlv_filter);
  4393. }
  4394. /*
  4395. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  4396. * @pdev: DP_PDEV handle
  4397. *
  4398. * Return: void
  4399. */
  4400. static void
  4401. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  4402. {
  4403. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  4404. htt_tlv_filter.mpdu_start = 0;
  4405. htt_tlv_filter.msdu_start = 0;
  4406. htt_tlv_filter.packet = 0;
  4407. htt_tlv_filter.msdu_end = 0;
  4408. htt_tlv_filter.mpdu_end = 0;
  4409. htt_tlv_filter.packet_header = 1;
  4410. htt_tlv_filter.attention = 1;
  4411. htt_tlv_filter.ppdu_start = 1;
  4412. htt_tlv_filter.ppdu_end = 1;
  4413. htt_tlv_filter.ppdu_end_user_stats = 1;
  4414. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4415. htt_tlv_filter.ppdu_end_status_done = 1;
  4416. htt_tlv_filter.enable_fp = 1;
  4417. htt_tlv_filter.enable_md = 0;
  4418. htt_tlv_filter.enable_mo = 0;
  4419. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4420. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4421. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4422. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4423. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4424. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4425. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4426. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4427. RX_BUFFER_SIZE, &htt_tlv_filter);
  4428. }
  4429. /*
  4430. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  4431. * @pdev_handle: DP_PDEV handle
  4432. * @val: user provided value
  4433. *
  4434. * Return: void
  4435. */
  4436. static void
  4437. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  4438. {
  4439. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4440. switch (val) {
  4441. case 0:
  4442. pdev->tx_sniffer_enable = 0;
  4443. pdev->mcopy_mode = 0;
  4444. if (!pdev->enhanced_stats_en) {
  4445. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4446. dp_ppdu_ring_reset(pdev);
  4447. }
  4448. break;
  4449. case 1:
  4450. pdev->tx_sniffer_enable = 1;
  4451. pdev->mcopy_mode = 0;
  4452. if (!pdev->enhanced_stats_en)
  4453. dp_h2t_cfg_stats_msg_send(pdev,
  4454. DP_PPDU_STATS_CFG_ALL, pdev->pdev_id);
  4455. break;
  4456. case 2:
  4457. pdev->mcopy_mode = 1;
  4458. pdev->tx_sniffer_enable = 0;
  4459. if (!pdev->enhanced_stats_en) {
  4460. dp_ppdu_ring_cfg(pdev);
  4461. dp_h2t_cfg_stats_msg_send(pdev,
  4462. DP_PPDU_STATS_CFG_ALL, pdev->pdev_id);
  4463. }
  4464. break;
  4465. default:
  4466. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4467. "Invalid value\n");
  4468. break;
  4469. }
  4470. }
  4471. /*
  4472. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  4473. * @pdev_handle: DP_PDEV handle
  4474. *
  4475. * Return: void
  4476. */
  4477. static void
  4478. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4479. {
  4480. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4481. pdev->enhanced_stats_en = 1;
  4482. if (!pdev->mcopy_mode)
  4483. dp_ppdu_ring_cfg(pdev);
  4484. if (!pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4485. dp_h2t_cfg_stats_msg_send(pdev, 0xffff, pdev->pdev_id);
  4486. }
  4487. /*
  4488. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  4489. * @pdev_handle: DP_PDEV handle
  4490. *
  4491. * Return: void
  4492. */
  4493. static void
  4494. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4495. {
  4496. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4497. pdev->enhanced_stats_en = 0;
  4498. if (!pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4499. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4500. if (!pdev->mcopy_mode)
  4501. dp_ppdu_ring_reset(pdev);
  4502. }
  4503. /*
  4504. * dp_get_fw_peer_stats()- function to print peer stats
  4505. * @pdev_handle: DP_PDEV handle
  4506. * @mac_addr: mac address of the peer
  4507. * @cap: Type of htt stats requested
  4508. *
  4509. * Currently Supporting only MAC ID based requests Only
  4510. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  4511. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  4512. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  4513. *
  4514. * Return: void
  4515. */
  4516. static void
  4517. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  4518. uint32_t cap)
  4519. {
  4520. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4521. int i;
  4522. uint32_t config_param0 = 0;
  4523. uint32_t config_param1 = 0;
  4524. uint32_t config_param2 = 0;
  4525. uint32_t config_param3 = 0;
  4526. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  4527. config_param0 |= (1 << (cap + 1));
  4528. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  4529. config_param1 |= (1 << i);
  4530. }
  4531. config_param2 |= (mac_addr[0] & 0x000000ff);
  4532. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  4533. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  4534. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  4535. config_param3 |= (mac_addr[4] & 0x000000ff);
  4536. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  4537. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  4538. config_param0, config_param1, config_param2,
  4539. config_param3, 0);
  4540. }
  4541. /* This struct definition will be removed from here
  4542. * once it get added in FW headers*/
  4543. struct httstats_cmd_req {
  4544. uint32_t config_param0;
  4545. uint32_t config_param1;
  4546. uint32_t config_param2;
  4547. uint32_t config_param3;
  4548. int cookie;
  4549. u_int8_t stats_id;
  4550. };
  4551. /*
  4552. * dp_get_htt_stats: function to process the httstas request
  4553. * @pdev_handle: DP pdev handle
  4554. * @data: pointer to request data
  4555. * @data_len: length for request data
  4556. *
  4557. * return: void
  4558. */
  4559. static void
  4560. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  4561. {
  4562. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4563. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  4564. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  4565. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  4566. req->config_param0, req->config_param1,
  4567. req->config_param2, req->config_param3,
  4568. req->cookie);
  4569. }
  4570. /*
  4571. * dp_set_pdev_param: function to set parameters in pdev
  4572. * @pdev_handle: DP pdev handle
  4573. * @param: parameter type to be set
  4574. * @val: value of parameter to be set
  4575. *
  4576. * return: void
  4577. */
  4578. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  4579. enum cdp_pdev_param_type param, uint8_t val)
  4580. {
  4581. switch (param) {
  4582. case CDP_CONFIG_DEBUG_SNIFFER:
  4583. dp_config_debug_sniffer(pdev_handle, val);
  4584. break;
  4585. default:
  4586. break;
  4587. }
  4588. }
  4589. /*
  4590. * dp_set_vdev_param: function to set parameters in vdev
  4591. * @param: parameter type to be set
  4592. * @val: value of parameter to be set
  4593. *
  4594. * return: void
  4595. */
  4596. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  4597. enum cdp_vdev_param_type param, uint32_t val)
  4598. {
  4599. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4600. switch (param) {
  4601. case CDP_ENABLE_WDS:
  4602. vdev->wds_enabled = val;
  4603. break;
  4604. case CDP_ENABLE_NAWDS:
  4605. vdev->nawds_enabled = val;
  4606. break;
  4607. case CDP_ENABLE_MCAST_EN:
  4608. vdev->mcast_enhancement_en = val;
  4609. break;
  4610. case CDP_ENABLE_PROXYSTA:
  4611. vdev->proxysta_vdev = val;
  4612. break;
  4613. case CDP_UPDATE_TDLS_FLAGS:
  4614. vdev->tdls_link_connected = val;
  4615. break;
  4616. case CDP_CFG_WDS_AGING_TIMER:
  4617. if (val == 0)
  4618. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  4619. else if (val != vdev->wds_aging_timer_val)
  4620. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  4621. vdev->wds_aging_timer_val = val;
  4622. break;
  4623. case CDP_ENABLE_AP_BRIDGE:
  4624. if (wlan_op_mode_sta != vdev->opmode)
  4625. vdev->ap_bridge_enabled = val;
  4626. else
  4627. vdev->ap_bridge_enabled = false;
  4628. break;
  4629. case CDP_ENABLE_CIPHER:
  4630. vdev->sec_type = val;
  4631. break;
  4632. case CDP_ENABLE_QWRAP_ISOLATION:
  4633. vdev->isolation_vdev = val;
  4634. break;
  4635. default:
  4636. break;
  4637. }
  4638. dp_tx_vdev_update_search_flags(vdev);
  4639. }
  4640. /**
  4641. * dp_peer_set_nawds: set nawds bit in peer
  4642. * @peer_handle: pointer to peer
  4643. * @value: enable/disable nawds
  4644. *
  4645. * return: void
  4646. */
  4647. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  4648. {
  4649. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4650. peer->nawds_enabled = value;
  4651. }
  4652. /*
  4653. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  4654. * @vdev_handle: DP_VDEV handle
  4655. * @map_id:ID of map that needs to be updated
  4656. *
  4657. * Return: void
  4658. */
  4659. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  4660. uint8_t map_id)
  4661. {
  4662. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4663. vdev->dscp_tid_map_id = map_id;
  4664. return;
  4665. }
  4666. /**
  4667. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  4668. * @pdev: DP_PDEV handle
  4669. * @map_id: ID of map that needs to be updated
  4670. * @tos: index value in map
  4671. * @tid: tid value passed by the user
  4672. *
  4673. * Return: void
  4674. */
  4675. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  4676. uint8_t map_id, uint8_t tos, uint8_t tid)
  4677. {
  4678. uint8_t dscp;
  4679. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  4680. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  4681. pdev->dscp_tid_map[map_id][dscp] = tid;
  4682. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  4683. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  4684. map_id, dscp);
  4685. return;
  4686. }
  4687. /**
  4688. * dp_fw_stats_process(): Process TxRX FW stats request
  4689. * @vdev_handle: DP VDEV handle
  4690. * @req: stats request
  4691. *
  4692. * return: int
  4693. */
  4694. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  4695. struct cdp_txrx_stats_req *req)
  4696. {
  4697. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4698. struct dp_pdev *pdev = NULL;
  4699. uint32_t stats = req->stats;
  4700. if (!vdev) {
  4701. DP_TRACE(NONE, "VDEV not found");
  4702. return 1;
  4703. }
  4704. pdev = vdev->pdev;
  4705. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  4706. req->param1, req->param2, req->param3, 0);
  4707. }
  4708. /**
  4709. * dp_txrx_stats_request - function to map to firmware and host stats
  4710. * @vdev: virtual handle
  4711. * @req: stats request
  4712. *
  4713. * Return: integer
  4714. */
  4715. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  4716. struct cdp_txrx_stats_req *req)
  4717. {
  4718. int host_stats;
  4719. int fw_stats;
  4720. enum cdp_stats stats;
  4721. if (!vdev || !req) {
  4722. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4723. "Invalid vdev/req instance");
  4724. return 0;
  4725. }
  4726. stats = req->stats;
  4727. if (stats >= CDP_TXRX_MAX_STATS)
  4728. return 0;
  4729. /*
  4730. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  4731. * has to be updated if new FW HTT stats added
  4732. */
  4733. if (stats > CDP_TXRX_STATS_HTT_MAX)
  4734. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  4735. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  4736. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  4737. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4738. "stats: %u fw_stats_type: %d host_stats_type: %d",
  4739. stats, fw_stats, host_stats);
  4740. if (fw_stats != TXRX_FW_STATS_INVALID) {
  4741. /* update request with FW stats type */
  4742. req->stats = fw_stats;
  4743. return dp_fw_stats_process(vdev, req);
  4744. }
  4745. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  4746. (host_stats <= TXRX_HOST_STATS_MAX))
  4747. return dp_print_host_stats(vdev, host_stats);
  4748. else
  4749. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4750. "Wrong Input for TxRx Stats");
  4751. return 0;
  4752. }
  4753. /**
  4754. * dp_txrx_stats() - function to map to firmware and host stats
  4755. * @vdev: virtual handle
  4756. * @stats: type of statistics requested
  4757. *
  4758. * Return: integer
  4759. */
  4760. static int dp_txrx_stats(struct cdp_vdev *vdev, enum cdp_stats stats)
  4761. {
  4762. struct cdp_txrx_stats_req req = {0,};
  4763. req.stats = stats;
  4764. return dp_txrx_stats_request(vdev, &req);
  4765. }
  4766. /*
  4767. * dp_print_napi_stats(): NAPI stats
  4768. * @soc - soc handle
  4769. */
  4770. static void dp_print_napi_stats(struct dp_soc *soc)
  4771. {
  4772. hif_print_napi_stats(soc->hif_handle);
  4773. }
  4774. /*
  4775. * dp_print_per_ring_stats(): Packet count per ring
  4776. * @soc - soc handle
  4777. */
  4778. static void dp_print_per_ring_stats(struct dp_soc *soc)
  4779. {
  4780. uint8_t ring;
  4781. uint16_t core;
  4782. uint64_t total_packets;
  4783. DP_TRACE(FATAL, "Reo packets per ring:");
  4784. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  4785. total_packets = 0;
  4786. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  4787. for (core = 0; core < NR_CPUS; core++) {
  4788. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  4789. core, soc->stats.rx.ring_packets[core][ring]);
  4790. total_packets += soc->stats.rx.ring_packets[core][ring];
  4791. }
  4792. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  4793. ring, total_packets);
  4794. }
  4795. }
  4796. /*
  4797. * dp_txrx_path_stats() - Function to display dump stats
  4798. * @soc - soc handle
  4799. *
  4800. * return: none
  4801. */
  4802. static void dp_txrx_path_stats(struct dp_soc *soc)
  4803. {
  4804. uint8_t error_code;
  4805. uint8_t loop_pdev;
  4806. struct dp_pdev *pdev;
  4807. uint8_t i;
  4808. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  4809. pdev = soc->pdev_list[loop_pdev];
  4810. dp_aggregate_pdev_stats(pdev);
  4811. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4812. "Tx path Statistics:");
  4813. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  4814. pdev->stats.tx_i.rcvd.num,
  4815. pdev->stats.tx_i.rcvd.bytes);
  4816. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  4817. pdev->stats.tx_i.processed.num,
  4818. pdev->stats.tx_i.processed.bytes);
  4819. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  4820. pdev->stats.tx.tx_success.num,
  4821. pdev->stats.tx.tx_success.bytes);
  4822. DP_TRACE(FATAL, "Dropped in host:");
  4823. DP_TRACE(FATAL, "Total packets dropped: %u,",
  4824. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4825. DP_TRACE(FATAL, "Descriptor not available: %u",
  4826. pdev->stats.tx_i.dropped.desc_na);
  4827. DP_TRACE(FATAL, "Ring full: %u",
  4828. pdev->stats.tx_i.dropped.ring_full);
  4829. DP_TRACE(FATAL, "Enqueue fail: %u",
  4830. pdev->stats.tx_i.dropped.enqueue_fail);
  4831. DP_TRACE(FATAL, "DMA Error: %u",
  4832. pdev->stats.tx_i.dropped.dma_error);
  4833. DP_TRACE(FATAL, "Dropped in hardware:");
  4834. DP_TRACE(FATAL, "total packets dropped: %u",
  4835. pdev->stats.tx.tx_failed);
  4836. DP_TRACE(FATAL, "mpdu age out: %u",
  4837. pdev->stats.tx.dropped.age_out);
  4838. DP_TRACE(FATAL, "firmware removed: %u",
  4839. pdev->stats.tx.dropped.fw_rem);
  4840. DP_TRACE(FATAL, "firmware removed tx: %u",
  4841. pdev->stats.tx.dropped.fw_rem_tx);
  4842. DP_TRACE(FATAL, "firmware removed notx %u",
  4843. pdev->stats.tx.dropped.fw_rem_notx);
  4844. DP_TRACE(FATAL, "peer_invalid: %u",
  4845. pdev->soc->stats.tx.tx_invalid_peer.num);
  4846. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  4847. DP_TRACE(FATAL, "Single Packet: %u",
  4848. pdev->stats.tx_comp_histogram.pkts_1);
  4849. DP_TRACE(FATAL, "2-20 Packets: %u",
  4850. pdev->stats.tx_comp_histogram.pkts_2_20);
  4851. DP_TRACE(FATAL, "21-40 Packets: %u",
  4852. pdev->stats.tx_comp_histogram.pkts_21_40);
  4853. DP_TRACE(FATAL, "41-60 Packets: %u",
  4854. pdev->stats.tx_comp_histogram.pkts_41_60);
  4855. DP_TRACE(FATAL, "61-80 Packets: %u",
  4856. pdev->stats.tx_comp_histogram.pkts_61_80);
  4857. DP_TRACE(FATAL, "81-100 Packets: %u",
  4858. pdev->stats.tx_comp_histogram.pkts_81_100);
  4859. DP_TRACE(FATAL, "101-200 Packets: %u",
  4860. pdev->stats.tx_comp_histogram.pkts_101_200);
  4861. DP_TRACE(FATAL, " 201+ Packets: %u",
  4862. pdev->stats.tx_comp_histogram.pkts_201_plus);
  4863. DP_TRACE(FATAL, "Rx path statistics");
  4864. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  4865. pdev->stats.rx.to_stack.num,
  4866. pdev->stats.rx.to_stack.bytes);
  4867. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  4868. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  4869. i, pdev->stats.rx.rcvd_reo[i].num,
  4870. pdev->stats.rx.rcvd_reo[i].bytes);
  4871. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  4872. pdev->stats.rx.intra_bss.pkts.num,
  4873. pdev->stats.rx.intra_bss.pkts.bytes);
  4874. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  4875. pdev->stats.rx.intra_bss.fail.num,
  4876. pdev->stats.rx.intra_bss.fail.bytes);
  4877. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  4878. pdev->stats.rx.raw.num,
  4879. pdev->stats.rx.raw.bytes);
  4880. DP_TRACE(FATAL, "dropped: error %u msdus",
  4881. pdev->stats.rx.err.mic_err);
  4882. DP_TRACE(FATAL, "peer invalid %u",
  4883. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  4884. DP_TRACE(FATAL, "Reo Statistics");
  4885. DP_TRACE(FATAL, "rbm error: %u msdus",
  4886. pdev->soc->stats.rx.err.invalid_rbm);
  4887. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  4888. pdev->soc->stats.rx.err.hal_ring_access_fail);
  4889. DP_TRACE(FATAL, "Reo errors");
  4890. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  4891. error_code++) {
  4892. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  4893. error_code,
  4894. pdev->soc->stats.rx.err.reo_error[error_code]);
  4895. }
  4896. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  4897. error_code++) {
  4898. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  4899. error_code,
  4900. pdev->soc->stats.rx.err
  4901. .rxdma_error[error_code]);
  4902. }
  4903. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  4904. DP_TRACE(FATAL, "Single Packet: %u",
  4905. pdev->stats.rx_ind_histogram.pkts_1);
  4906. DP_TRACE(FATAL, "2-20 Packets: %u",
  4907. pdev->stats.rx_ind_histogram.pkts_2_20);
  4908. DP_TRACE(FATAL, "21-40 Packets: %u",
  4909. pdev->stats.rx_ind_histogram.pkts_21_40);
  4910. DP_TRACE(FATAL, "41-60 Packets: %u",
  4911. pdev->stats.rx_ind_histogram.pkts_41_60);
  4912. DP_TRACE(FATAL, "61-80 Packets: %u",
  4913. pdev->stats.rx_ind_histogram.pkts_61_80);
  4914. DP_TRACE(FATAL, "81-100 Packets: %u",
  4915. pdev->stats.rx_ind_histogram.pkts_81_100);
  4916. DP_TRACE(FATAL, "101-200 Packets: %u",
  4917. pdev->stats.rx_ind_histogram.pkts_101_200);
  4918. DP_TRACE(FATAL, " 201+ Packets: %u",
  4919. pdev->stats.rx_ind_histogram.pkts_201_plus);
  4920. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  4921. __func__,
  4922. pdev->soc->wlan_cfg_ctx->tso_enabled,
  4923. pdev->soc->wlan_cfg_ctx->lro_enabled,
  4924. pdev->soc->wlan_cfg_ctx->rx_hash,
  4925. pdev->soc->wlan_cfg_ctx->napi_enabled);
  4926. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  4927. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  4928. __func__,
  4929. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  4930. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  4931. #endif
  4932. }
  4933. }
  4934. /*
  4935. * dp_txrx_dump_stats() - Dump statistics
  4936. * @value - Statistics option
  4937. */
  4938. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  4939. enum qdf_stats_verbosity_level level)
  4940. {
  4941. struct dp_soc *soc =
  4942. (struct dp_soc *)psoc;
  4943. QDF_STATUS status = QDF_STATUS_SUCCESS;
  4944. if (!soc) {
  4945. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4946. "%s: soc is NULL", __func__);
  4947. return QDF_STATUS_E_INVAL;
  4948. }
  4949. switch (value) {
  4950. case CDP_TXRX_PATH_STATS:
  4951. dp_txrx_path_stats(soc);
  4952. break;
  4953. case CDP_RX_RING_STATS:
  4954. dp_print_per_ring_stats(soc);
  4955. break;
  4956. case CDP_TXRX_TSO_STATS:
  4957. /* TODO: NOT IMPLEMENTED */
  4958. break;
  4959. case CDP_DUMP_TX_FLOW_POOL_INFO:
  4960. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  4961. break;
  4962. case CDP_DP_NAPI_STATS:
  4963. dp_print_napi_stats(soc);
  4964. break;
  4965. case CDP_TXRX_DESC_STATS:
  4966. /* TODO: NOT IMPLEMENTED */
  4967. break;
  4968. default:
  4969. status = QDF_STATUS_E_INVAL;
  4970. break;
  4971. }
  4972. return status;
  4973. }
  4974. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  4975. /**
  4976. * dp_update_flow_control_parameters() - API to store datapath
  4977. * config parameters
  4978. * @soc: soc handle
  4979. * @cfg: ini parameter handle
  4980. *
  4981. * Return: void
  4982. */
  4983. static inline
  4984. void dp_update_flow_control_parameters(struct dp_soc *soc,
  4985. struct cdp_config_params *params)
  4986. {
  4987. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  4988. params->tx_flow_stop_queue_threshold;
  4989. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  4990. params->tx_flow_start_queue_offset;
  4991. }
  4992. #else
  4993. static inline
  4994. void dp_update_flow_control_parameters(struct dp_soc *soc,
  4995. struct cdp_config_params *params)
  4996. {
  4997. }
  4998. #endif
  4999. /**
  5000. * dp_update_config_parameters() - API to store datapath
  5001. * config parameters
  5002. * @soc: soc handle
  5003. * @cfg: ini parameter handle
  5004. *
  5005. * Return: status
  5006. */
  5007. static
  5008. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5009. struct cdp_config_params *params)
  5010. {
  5011. struct dp_soc *soc = (struct dp_soc *)psoc;
  5012. if (!(soc)) {
  5013. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5014. "%s: Invalid handle", __func__);
  5015. return QDF_STATUS_E_INVAL;
  5016. }
  5017. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5018. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5019. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5020. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5021. params->tcp_udp_checksumoffload;
  5022. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5023. dp_update_flow_control_parameters(soc, params);
  5024. return QDF_STATUS_SUCCESS;
  5025. }
  5026. /**
  5027. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5028. * config parameters
  5029. * @vdev_handle - datapath vdev handle
  5030. * @cfg: ini parameter handle
  5031. *
  5032. * Return: status
  5033. */
  5034. #ifdef WDS_VENDOR_EXTENSION
  5035. void
  5036. dp_txrx_set_wds_rx_policy(
  5037. struct cdp_vdev *vdev_handle,
  5038. u_int32_t val)
  5039. {
  5040. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5041. struct dp_peer *peer;
  5042. if (vdev->opmode == wlan_op_mode_ap) {
  5043. /* for ap, set it on bss_peer */
  5044. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5045. if (peer->bss_peer) {
  5046. peer->wds_ecm.wds_rx_filter = 1;
  5047. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5048. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5049. break;
  5050. }
  5051. }
  5052. } else if (vdev->opmode == wlan_op_mode_sta) {
  5053. peer = TAILQ_FIRST(&vdev->peer_list);
  5054. peer->wds_ecm.wds_rx_filter = 1;
  5055. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5056. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5057. }
  5058. }
  5059. /**
  5060. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5061. *
  5062. * @peer_handle - datapath peer handle
  5063. * @wds_tx_ucast: policy for unicast transmission
  5064. * @wds_tx_mcast: policy for multicast transmission
  5065. *
  5066. * Return: void
  5067. */
  5068. void
  5069. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5070. int wds_tx_ucast, int wds_tx_mcast)
  5071. {
  5072. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5073. if (wds_tx_ucast || wds_tx_mcast) {
  5074. peer->wds_enabled = 1;
  5075. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5076. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5077. } else {
  5078. peer->wds_enabled = 0;
  5079. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5080. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5081. }
  5082. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5083. FL("Policy Update set to :\
  5084. peer->wds_enabled %d\
  5085. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5086. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5087. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5088. peer->wds_ecm.wds_tx_mcast_4addr);
  5089. return;
  5090. }
  5091. #endif
  5092. static struct cdp_wds_ops dp_ops_wds = {
  5093. .vdev_set_wds = dp_vdev_set_wds,
  5094. #ifdef WDS_VENDOR_EXTENSION
  5095. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5096. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5097. #endif
  5098. };
  5099. /*
  5100. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5101. * @soc - datapath soc handle
  5102. * @peer - datapath peer handle
  5103. *
  5104. * Delete the AST entries belonging to a peer
  5105. */
  5106. #ifdef FEATURE_WDS
  5107. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5108. struct dp_peer *peer)
  5109. {
  5110. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5111. qdf_spin_lock_bh(&soc->ast_lock);
  5112. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry) {
  5113. if (ast_entry->next_hop) {
  5114. soc->cdp_soc.ol_ops->peer_del_wds_entry(
  5115. peer->vdev->osif_vdev,
  5116. ast_entry->mac_addr.raw);
  5117. }
  5118. dp_peer_del_ast(soc, ast_entry);
  5119. }
  5120. qdf_spin_unlock_bh(&soc->ast_lock);
  5121. }
  5122. #else
  5123. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5124. struct dp_peer *peer)
  5125. {
  5126. }
  5127. #endif
  5128. /*
  5129. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5130. * @vdev_handle - datapath vdev handle
  5131. * @callback - callback function
  5132. * @ctxt: callback context
  5133. *
  5134. */
  5135. static void
  5136. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5137. ol_txrx_data_tx_cb callback, void *ctxt)
  5138. {
  5139. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5140. vdev->tx_non_std_data_callback.func = callback;
  5141. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5142. }
  5143. /**
  5144. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5145. * @pdev_hdl: datapath pdev handle
  5146. *
  5147. * Return: opaque pointer to dp txrx handle
  5148. */
  5149. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5150. {
  5151. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5152. return pdev->dp_txrx_handle;
  5153. }
  5154. /**
  5155. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  5156. * @pdev_hdl: datapath pdev handle
  5157. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  5158. *
  5159. * Return: void
  5160. */
  5161. static void
  5162. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  5163. {
  5164. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5165. pdev->dp_txrx_handle = dp_txrx_hdl;
  5166. }
  5167. #ifdef CONFIG_WIN
  5168. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  5169. {
  5170. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  5171. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  5172. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5173. peer->delete_in_progress = true;
  5174. dp_peer_delete_ast_entries(soc, peer);
  5175. }
  5176. #endif
  5177. static struct cdp_cmn_ops dp_ops_cmn = {
  5178. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  5179. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  5180. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  5181. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  5182. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  5183. .txrx_peer_create = dp_peer_create_wifi3,
  5184. .txrx_peer_setup = dp_peer_setup_wifi3,
  5185. #ifdef CONFIG_WIN
  5186. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  5187. #else
  5188. .txrx_peer_teardown = NULL,
  5189. #endif
  5190. .txrx_peer_delete = dp_peer_delete_wifi3,
  5191. .txrx_vdev_register = dp_vdev_register_wifi3,
  5192. .txrx_soc_detach = dp_soc_detach_wifi3,
  5193. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  5194. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  5195. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  5196. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  5197. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  5198. .delba_process = dp_delba_process_wifi3,
  5199. .set_addba_response = dp_set_addba_response,
  5200. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  5201. .flush_cache_rx_queue = NULL,
  5202. /* TODO: get API's for dscp-tid need to be added*/
  5203. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  5204. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  5205. .txrx_stats = dp_txrx_stats,
  5206. .txrx_stats_request = dp_txrx_stats_request,
  5207. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  5208. .display_stats = dp_txrx_dump_stats,
  5209. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  5210. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  5211. #ifdef DP_INTR_POLL_BASED
  5212. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  5213. #else
  5214. .txrx_intr_attach = dp_soc_interrupt_attach,
  5215. #endif
  5216. .txrx_intr_detach = dp_soc_interrupt_detach,
  5217. .set_pn_check = dp_set_pn_check_wifi3,
  5218. .update_config_parameters = dp_update_config_parameters,
  5219. /* TODO: Add other functions */
  5220. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  5221. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  5222. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  5223. };
  5224. static struct cdp_ctrl_ops dp_ops_ctrl = {
  5225. .txrx_peer_authorize = dp_peer_authorize,
  5226. #ifdef QCA_SUPPORT_SON
  5227. .txrx_set_inact_params = dp_set_inact_params,
  5228. .txrx_start_inact_timer = dp_start_inact_timer,
  5229. .txrx_set_overload = dp_set_overload,
  5230. .txrx_peer_is_inact = dp_peer_is_inact,
  5231. .txrx_mark_peer_inact = dp_mark_peer_inact,
  5232. #endif
  5233. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  5234. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  5235. #ifdef MESH_MODE_SUPPORT
  5236. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  5237. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  5238. #endif
  5239. .txrx_set_vdev_param = dp_set_vdev_param,
  5240. .txrx_peer_set_nawds = dp_peer_set_nawds,
  5241. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  5242. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  5243. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  5244. .txrx_update_filter_neighbour_peers =
  5245. dp_update_filter_neighbour_peers,
  5246. .txrx_get_sec_type = dp_get_sec_type,
  5247. /* TODO: Add other functions */
  5248. .txrx_wdi_event_sub = dp_wdi_event_sub,
  5249. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  5250. #ifdef WDI_EVENT_ENABLE
  5251. .txrx_get_pldev = dp_get_pldev,
  5252. #endif
  5253. .txrx_set_pdev_param = dp_set_pdev_param,
  5254. };
  5255. static struct cdp_me_ops dp_ops_me = {
  5256. #ifdef ATH_SUPPORT_IQUE
  5257. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  5258. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  5259. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  5260. #endif
  5261. };
  5262. static struct cdp_mon_ops dp_ops_mon = {
  5263. .txrx_monitor_set_filter_ucast_data = NULL,
  5264. .txrx_monitor_set_filter_mcast_data = NULL,
  5265. .txrx_monitor_set_filter_non_data = NULL,
  5266. .txrx_monitor_get_filter_ucast_data = NULL,
  5267. .txrx_monitor_get_filter_mcast_data = NULL,
  5268. .txrx_monitor_get_filter_non_data = NULL,
  5269. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  5270. /* Added support for HK advance filter */
  5271. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  5272. };
  5273. static struct cdp_host_stats_ops dp_ops_host_stats = {
  5274. .txrx_per_peer_stats = dp_get_host_peer_stats,
  5275. .get_fw_peer_stats = dp_get_fw_peer_stats,
  5276. .get_htt_stats = dp_get_htt_stats,
  5277. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  5278. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  5279. /* TODO */
  5280. };
  5281. static struct cdp_raw_ops dp_ops_raw = {
  5282. /* TODO */
  5283. };
  5284. #ifdef CONFIG_WIN
  5285. static struct cdp_pflow_ops dp_ops_pflow = {
  5286. /* TODO */
  5287. };
  5288. #endif /* CONFIG_WIN */
  5289. #ifdef FEATURE_RUNTIME_PM
  5290. /**
  5291. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  5292. * @opaque_pdev: DP pdev context
  5293. *
  5294. * DP is ready to runtime suspend if there are no pending TX packets.
  5295. *
  5296. * Return: QDF_STATUS
  5297. */
  5298. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  5299. {
  5300. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5301. struct dp_soc *soc = pdev->soc;
  5302. /* Call DP TX flow control API to check if there is any
  5303. pending packets */
  5304. if (soc->intr_mode == DP_INTR_POLL)
  5305. qdf_timer_stop(&soc->int_timer);
  5306. return QDF_STATUS_SUCCESS;
  5307. }
  5308. /**
  5309. * dp_runtime_resume() - ensure DP is ready to runtime resume
  5310. * @opaque_pdev: DP pdev context
  5311. *
  5312. * Resume DP for runtime PM.
  5313. *
  5314. * Return: QDF_STATUS
  5315. */
  5316. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  5317. {
  5318. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5319. struct dp_soc *soc = pdev->soc;
  5320. void *hal_srng;
  5321. int i;
  5322. if (soc->intr_mode == DP_INTR_POLL)
  5323. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5324. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  5325. hal_srng = soc->tcl_data_ring[i].hal_srng;
  5326. if (hal_srng) {
  5327. /* We actually only need to acquire the lock */
  5328. hal_srng_access_start(soc->hal_soc, hal_srng);
  5329. /* Update SRC ring head pointer for HW to send
  5330. all pending packets */
  5331. hal_srng_access_end(soc->hal_soc, hal_srng);
  5332. }
  5333. }
  5334. return QDF_STATUS_SUCCESS;
  5335. }
  5336. #endif /* FEATURE_RUNTIME_PM */
  5337. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  5338. {
  5339. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5340. struct dp_soc *soc = pdev->soc;
  5341. if (soc->intr_mode == DP_INTR_POLL)
  5342. qdf_timer_stop(&soc->int_timer);
  5343. return QDF_STATUS_SUCCESS;
  5344. }
  5345. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  5346. {
  5347. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5348. struct dp_soc *soc = pdev->soc;
  5349. if (soc->intr_mode == DP_INTR_POLL)
  5350. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5351. return QDF_STATUS_SUCCESS;
  5352. }
  5353. #ifndef CONFIG_WIN
  5354. static struct cdp_misc_ops dp_ops_misc = {
  5355. .tx_non_std = dp_tx_non_std,
  5356. .get_opmode = dp_get_opmode,
  5357. #ifdef FEATURE_RUNTIME_PM
  5358. .runtime_suspend = dp_runtime_suspend,
  5359. .runtime_resume = dp_runtime_resume,
  5360. #endif /* FEATURE_RUNTIME_PM */
  5361. .pkt_log_init = dp_pkt_log_init,
  5362. .pkt_log_con_service = dp_pkt_log_con_service,
  5363. };
  5364. static struct cdp_flowctl_ops dp_ops_flowctl = {
  5365. /* WIFI 3.0 DP implement as required. */
  5366. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5367. .register_pause_cb = dp_txrx_register_pause_cb,
  5368. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  5369. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  5370. };
  5371. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  5372. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5373. };
  5374. #ifdef IPA_OFFLOAD
  5375. static struct cdp_ipa_ops dp_ops_ipa = {
  5376. .ipa_get_resource = dp_ipa_get_resource,
  5377. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  5378. .ipa_op_response = dp_ipa_op_response,
  5379. .ipa_register_op_cb = dp_ipa_register_op_cb,
  5380. .ipa_get_stat = dp_ipa_get_stat,
  5381. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  5382. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  5383. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  5384. .ipa_setup = dp_ipa_setup,
  5385. .ipa_cleanup = dp_ipa_cleanup,
  5386. .ipa_setup_iface = dp_ipa_setup_iface,
  5387. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  5388. .ipa_enable_pipes = dp_ipa_enable_pipes,
  5389. .ipa_disable_pipes = dp_ipa_disable_pipes,
  5390. .ipa_set_perf_level = dp_ipa_set_perf_level
  5391. };
  5392. #endif
  5393. static struct cdp_bus_ops dp_ops_bus = {
  5394. .bus_suspend = dp_bus_suspend,
  5395. .bus_resume = dp_bus_resume
  5396. };
  5397. static struct cdp_ocb_ops dp_ops_ocb = {
  5398. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5399. };
  5400. static struct cdp_throttle_ops dp_ops_throttle = {
  5401. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5402. };
  5403. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  5404. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5405. };
  5406. static struct cdp_cfg_ops dp_ops_cfg = {
  5407. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5408. };
  5409. /*
  5410. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  5411. * @dev: physical device instance
  5412. * @peer_mac_addr: peer mac address
  5413. * @local_id: local id for the peer
  5414. * @debug_id: to track enum peer access
  5415. * Return: peer instance pointer
  5416. */
  5417. static inline void *
  5418. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  5419. u8 *local_id,
  5420. enum peer_debug_id_type debug_id)
  5421. {
  5422. /*
  5423. * Currently this function does not implement the "get ref"
  5424. * functionality and is mapped to dp_find_peer_by_addr which does not
  5425. * increment the peer ref count. So the peer state is uncertain after
  5426. * calling this API. The functionality needs to be implemented.
  5427. * Accordingly the corresponding release_ref function is NULL.
  5428. */
  5429. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  5430. }
  5431. static struct cdp_peer_ops dp_ops_peer = {
  5432. .register_peer = dp_register_peer,
  5433. .clear_peer = dp_clear_peer,
  5434. .find_peer_by_addr = dp_find_peer_by_addr,
  5435. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  5436. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  5437. .peer_release_ref = NULL,
  5438. .local_peer_id = dp_local_peer_id,
  5439. .peer_find_by_local_id = dp_peer_find_by_local_id,
  5440. .peer_state_update = dp_peer_state_update,
  5441. .get_vdevid = dp_get_vdevid,
  5442. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  5443. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  5444. .get_vdev_for_peer = dp_get_vdev_for_peer,
  5445. .get_peer_state = dp_get_peer_state,
  5446. .last_assoc_received = dp_get_last_assoc_received,
  5447. .last_disassoc_received = dp_get_last_disassoc_received,
  5448. .last_deauth_received = dp_get_last_deauth_received,
  5449. };
  5450. #endif
  5451. static struct cdp_ops dp_txrx_ops = {
  5452. .cmn_drv_ops = &dp_ops_cmn,
  5453. .ctrl_ops = &dp_ops_ctrl,
  5454. .me_ops = &dp_ops_me,
  5455. .mon_ops = &dp_ops_mon,
  5456. .host_stats_ops = &dp_ops_host_stats,
  5457. .wds_ops = &dp_ops_wds,
  5458. .raw_ops = &dp_ops_raw,
  5459. #ifdef CONFIG_WIN
  5460. .pflow_ops = &dp_ops_pflow,
  5461. #endif /* CONFIG_WIN */
  5462. #ifndef CONFIG_WIN
  5463. .misc_ops = &dp_ops_misc,
  5464. .cfg_ops = &dp_ops_cfg,
  5465. .flowctl_ops = &dp_ops_flowctl,
  5466. .l_flowctl_ops = &dp_ops_l_flowctl,
  5467. #ifdef IPA_OFFLOAD
  5468. .ipa_ops = &dp_ops_ipa,
  5469. #endif
  5470. .bus_ops = &dp_ops_bus,
  5471. .ocb_ops = &dp_ops_ocb,
  5472. .peer_ops = &dp_ops_peer,
  5473. .throttle_ops = &dp_ops_throttle,
  5474. .mob_stats_ops = &dp_ops_mob_stats,
  5475. #endif
  5476. };
  5477. /*
  5478. * dp_soc_set_txrx_ring_map()
  5479. * @dp_soc: DP handler for soc
  5480. *
  5481. * Return: Void
  5482. */
  5483. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  5484. {
  5485. uint32_t i;
  5486. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  5487. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  5488. }
  5489. }
  5490. /*
  5491. * dp_soc_attach_wifi3() - Attach txrx SOC
  5492. * @osif_soc: Opaque SOC handle from OSIF/HDD
  5493. * @htc_handle: Opaque HTC handle
  5494. * @hif_handle: Opaque HIF handle
  5495. * @qdf_osdev: QDF device
  5496. *
  5497. * Return: DP SOC handle on success, NULL on failure
  5498. */
  5499. /*
  5500. * Local prototype added to temporarily address warning caused by
  5501. * -Wmissing-prototypes. A more correct solution, namely to expose
  5502. * a prototype in an appropriate header file, will come later.
  5503. */
  5504. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  5505. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  5506. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc);
  5507. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  5508. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  5509. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc)
  5510. {
  5511. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  5512. if (!soc) {
  5513. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5514. FL("DP SOC memory allocation failed"));
  5515. goto fail0;
  5516. }
  5517. soc->cdp_soc.ops = &dp_txrx_ops;
  5518. soc->cdp_soc.ol_ops = ol_ops;
  5519. soc->osif_soc = osif_soc;
  5520. soc->osdev = qdf_osdev;
  5521. soc->hif_handle = hif_handle;
  5522. soc->psoc = psoc;
  5523. soc->hal_soc = hif_get_hal_handle(hif_handle);
  5524. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  5525. soc->hal_soc, qdf_osdev);
  5526. if (!soc->htt_handle) {
  5527. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5528. FL("HTT attach failed"));
  5529. goto fail1;
  5530. }
  5531. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  5532. if (!soc->wlan_cfg_ctx) {
  5533. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5534. FL("wlan_cfg_soc_attach failed"));
  5535. goto fail2;
  5536. }
  5537. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  5538. soc->cce_disable = false;
  5539. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  5540. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->osif_soc,
  5541. CDP_CFG_MAX_PEER_ID);
  5542. if (ret != -EINVAL) {
  5543. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  5544. }
  5545. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->osif_soc,
  5546. CDP_CFG_CCE_DISABLE);
  5547. if (ret)
  5548. soc->cce_disable = true;
  5549. }
  5550. qdf_spinlock_create(&soc->peer_ref_mutex);
  5551. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  5552. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  5553. /* fill the tx/rx cpu ring map*/
  5554. dp_soc_set_txrx_ring_map(soc);
  5555. qdf_spinlock_create(&soc->htt_stats.lock);
  5556. /* initialize work queue for stats processing */
  5557. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  5558. return (void *)soc;
  5559. fail2:
  5560. htt_soc_detach(soc->htt_handle);
  5561. fail1:
  5562. qdf_mem_free(soc);
  5563. fail0:
  5564. return NULL;
  5565. }
  5566. /*
  5567. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  5568. *
  5569. * @soc: handle to DP soc
  5570. * @mac_id: MAC id
  5571. *
  5572. * Return: Return pdev corresponding to MAC
  5573. */
  5574. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  5575. {
  5576. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  5577. return soc->pdev_list[mac_id];
  5578. /* Typically for MCL as there only 1 PDEV*/
  5579. return soc->pdev_list[0];
  5580. }
  5581. /*
  5582. * dp_get_ring_id_for_mac_id() - Return pdev for mac_id
  5583. *
  5584. * @soc: handle to DP soc
  5585. * @mac_id: MAC id
  5586. *
  5587. * Return: ring id
  5588. */
  5589. int dp_get_ring_id_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  5590. {
  5591. /*
  5592. * Single pdev using both MACs will operate on both MAC rings,
  5593. * which is the case for MCL.
  5594. */
  5595. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  5596. return mac_id;
  5597. /* For WIN each PDEV will operate one ring, so index is zero. */
  5598. return 0;
  5599. }
  5600. /*
  5601. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  5602. * @soc: DP SoC context
  5603. * @max_mac_rings: No of MAC rings
  5604. *
  5605. * Return: None
  5606. */
  5607. static
  5608. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  5609. int *max_mac_rings)
  5610. {
  5611. bool dbs_enable = false;
  5612. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  5613. dbs_enable = soc->cdp_soc.ol_ops->
  5614. is_hw_dbs_2x2_capable(soc->psoc);
  5615. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  5616. }
  5617. /*
  5618. * dp_set_pktlog_wifi3() - attach txrx vdev
  5619. * @pdev: Datapath PDEV handle
  5620. * @event: which event's notifications are being subscribed to
  5621. * @enable: WDI event subscribe or not. (True or False)
  5622. *
  5623. * Return: Success, NULL on failure
  5624. */
  5625. #ifdef WDI_EVENT_ENABLE
  5626. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  5627. bool enable)
  5628. {
  5629. struct dp_soc *soc = pdev->soc;
  5630. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5631. int max_mac_rings = wlan_cfg_get_num_mac_rings
  5632. (pdev->wlan_cfg_ctx);
  5633. uint8_t mac_id = 0;
  5634. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  5635. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  5636. FL("Max_mac_rings %d \n"),
  5637. max_mac_rings);
  5638. if (enable) {
  5639. switch (event) {
  5640. case WDI_EVENT_RX_DESC:
  5641. if (pdev->monitor_vdev) {
  5642. /* Nothing needs to be done if monitor mode is
  5643. * enabled
  5644. */
  5645. return 0;
  5646. }
  5647. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  5648. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  5649. htt_tlv_filter.mpdu_start = 1;
  5650. htt_tlv_filter.msdu_start = 1;
  5651. htt_tlv_filter.msdu_end = 1;
  5652. htt_tlv_filter.mpdu_end = 1;
  5653. htt_tlv_filter.packet_header = 1;
  5654. htt_tlv_filter.attention = 1;
  5655. htt_tlv_filter.ppdu_start = 1;
  5656. htt_tlv_filter.ppdu_end = 1;
  5657. htt_tlv_filter.ppdu_end_user_stats = 1;
  5658. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5659. htt_tlv_filter.ppdu_end_status_done = 1;
  5660. htt_tlv_filter.enable_fp = 1;
  5661. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5662. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5663. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5664. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5665. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5666. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5667. for (mac_id = 0; mac_id < max_mac_rings;
  5668. mac_id++) {
  5669. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5670. pdev->pdev_id + mac_id,
  5671. pdev->rxdma_mon_status_ring
  5672. .hal_srng,
  5673. RXDMA_MONITOR_STATUS,
  5674. RX_BUFFER_SIZE,
  5675. &htt_tlv_filter);
  5676. }
  5677. if (soc->reap_timer_init)
  5678. qdf_timer_mod(&soc->mon_reap_timer,
  5679. DP_INTR_POLL_TIMER_MS);
  5680. }
  5681. break;
  5682. case WDI_EVENT_LITE_RX:
  5683. if (pdev->monitor_vdev) {
  5684. /* Nothing needs to be done if monitor mode is
  5685. * enabled
  5686. */
  5687. return 0;
  5688. }
  5689. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  5690. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  5691. htt_tlv_filter.ppdu_start = 1;
  5692. htt_tlv_filter.ppdu_end = 1;
  5693. htt_tlv_filter.ppdu_end_user_stats = 1;
  5694. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5695. htt_tlv_filter.ppdu_end_status_done = 1;
  5696. htt_tlv_filter.mpdu_start = 1;
  5697. htt_tlv_filter.enable_fp = 1;
  5698. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5699. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5700. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5701. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5702. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5703. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5704. for (mac_id = 0; mac_id < max_mac_rings;
  5705. mac_id++) {
  5706. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5707. pdev->pdev_id + mac_id,
  5708. pdev->rxdma_mon_status_ring
  5709. .hal_srng,
  5710. RXDMA_MONITOR_STATUS,
  5711. RX_BUFFER_SIZE_PKTLOG_LITE,
  5712. &htt_tlv_filter);
  5713. }
  5714. if (soc->reap_timer_init)
  5715. qdf_timer_mod(&soc->mon_reap_timer,
  5716. DP_INTR_POLL_TIMER_MS);
  5717. }
  5718. break;
  5719. case WDI_EVENT_LITE_T2H:
  5720. if (pdev->monitor_vdev) {
  5721. /* Nothing needs to be done if monitor mode is
  5722. * enabled
  5723. */
  5724. return 0;
  5725. }
  5726. /* To enable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  5727. * passing value 0xffff. Once these macros will define
  5728. * in htt header file will use proper macros
  5729. */
  5730. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  5731. dp_h2t_cfg_stats_msg_send(pdev, 0xffff,
  5732. pdev->pdev_id + mac_id);
  5733. }
  5734. break;
  5735. default:
  5736. /* Nothing needs to be done for other pktlog types */
  5737. break;
  5738. }
  5739. } else {
  5740. switch (event) {
  5741. case WDI_EVENT_RX_DESC:
  5742. case WDI_EVENT_LITE_RX:
  5743. if (pdev->monitor_vdev) {
  5744. /* Nothing needs to be done if monitor mode is
  5745. * enabled
  5746. */
  5747. return 0;
  5748. }
  5749. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  5750. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  5751. for (mac_id = 0; mac_id < max_mac_rings;
  5752. mac_id++) {
  5753. htt_h2t_rx_ring_cfg(soc->htt_handle,
  5754. pdev->pdev_id + mac_id,
  5755. pdev->rxdma_mon_status_ring
  5756. .hal_srng,
  5757. RXDMA_MONITOR_STATUS,
  5758. RX_BUFFER_SIZE,
  5759. &htt_tlv_filter);
  5760. }
  5761. if (soc->reap_timer_init)
  5762. qdf_timer_stop(&soc->mon_reap_timer);
  5763. }
  5764. break;
  5765. case WDI_EVENT_LITE_T2H:
  5766. if (pdev->monitor_vdev) {
  5767. /* Nothing needs to be done if monitor mode is
  5768. * enabled
  5769. */
  5770. return 0;
  5771. }
  5772. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  5773. * passing value 0. Once these macros will define in htt
  5774. * header file will use proper macros
  5775. */
  5776. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  5777. dp_h2t_cfg_stats_msg_send(pdev, 0,
  5778. pdev->pdev_id + mac_id);
  5779. }
  5780. break;
  5781. default:
  5782. /* Nothing needs to be done for other pktlog types */
  5783. break;
  5784. }
  5785. }
  5786. return 0;
  5787. }
  5788. #endif
  5789. #ifdef CONFIG_MCL
  5790. /*
  5791. * dp_service_mon_rings()- timer to reap monitor rings
  5792. * reqd as we are not getting ppdu end interrupts
  5793. * @arg: SoC Handle
  5794. *
  5795. * Return:
  5796. *
  5797. */
  5798. static void dp_service_mon_rings(void *arg)
  5799. {
  5800. struct dp_soc *soc = (struct dp_soc *) arg;
  5801. int ring = 0, work_done;
  5802. work_done = dp_mon_process(soc, ring, QCA_NAPI_BUDGET);
  5803. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  5804. FL("Reaped %d descs from Monitor rings"), work_done);
  5805. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  5806. }
  5807. #ifndef REMOVE_PKT_LOG
  5808. /**
  5809. * dp_pkt_log_init() - API to initialize packet log
  5810. * @ppdev: physical device handle
  5811. * @scn: HIF context
  5812. *
  5813. * Return: none
  5814. */
  5815. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  5816. {
  5817. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  5818. if (handle->pkt_log_init) {
  5819. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5820. "%s: Packet log not initialized", __func__);
  5821. return;
  5822. }
  5823. pktlog_sethandle(&handle->pl_dev, scn);
  5824. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  5825. if (pktlogmod_init(scn)) {
  5826. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5827. "%s: pktlogmod_init failed", __func__);
  5828. handle->pkt_log_init = false;
  5829. } else {
  5830. handle->pkt_log_init = true;
  5831. }
  5832. }
  5833. /**
  5834. * dp_pkt_log_con_service() - connect packet log service
  5835. * @ppdev: physical device handle
  5836. * @scn: device context
  5837. *
  5838. * Return: none
  5839. */
  5840. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  5841. {
  5842. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  5843. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  5844. pktlog_htc_attach();
  5845. }
  5846. /**
  5847. * dp_pktlogmod_exit() - API to cleanup pktlog info
  5848. * @handle: Pdev handle
  5849. *
  5850. * Return: none
  5851. */
  5852. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  5853. {
  5854. void *scn = (void *)handle->soc->hif_handle;
  5855. if (!scn) {
  5856. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5857. "%s: Invalid hif(scn) handle", __func__);
  5858. return;
  5859. }
  5860. pktlogmod_exit(scn);
  5861. handle->pkt_log_init = false;
  5862. }
  5863. #endif
  5864. #else
  5865. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  5866. #endif