dp_rx_mon_status.c 64 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331
  1. /*
  2. * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #include "htt.h"
  31. #ifdef FEATURE_PERPKT_INFO
  32. #include "dp_ratetable.h"
  33. #endif
  34. static inline
  35. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  36. uint32_t mac_id,
  37. struct dp_srng *dp_rxdma_srng,
  38. struct rx_desc_pool *rx_desc_pool,
  39. uint32_t num_req_buffers,
  40. union dp_rx_desc_list_elem_t **desc_list,
  41. union dp_rx_desc_list_elem_t **tail,
  42. uint8_t owner);
  43. static inline void
  44. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  45. struct hal_rx_ppdu_info *ppdu_info,
  46. struct cdp_rx_indication_ppdu *cdp_rx_ppdu);
  47. #ifndef QCA_SUPPORT_FULL_MON
  48. /**
  49. * dp_rx_mon_process () - Core brain processing for monitor mode
  50. *
  51. * This API processes monitor destination ring followed by monitor status ring
  52. * Called from bottom half (tasklet/NET_RX_SOFTIRQ)
  53. *
  54. * @soc: datapath soc context
  55. * @int_ctx: interrupt context
  56. * @mac_id: mac_id on which interrupt is received
  57. * @quota: Number of status ring entry that can be serviced in one shot.
  58. *
  59. * @Return: Number of reaped status ring entries
  60. */
  61. static inline uint32_t
  62. dp_rx_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  63. uint32_t mac_id, uint32_t quota)
  64. {
  65. return quota;
  66. }
  67. #endif
  68. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  69. #include "dp_rx_mon_feature.h"
  70. #else
  71. static QDF_STATUS
  72. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  73. struct hal_rx_ppdu_info *ppdu_info)
  74. {
  75. return QDF_STATUS_SUCCESS;
  76. }
  77. static void
  78. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  79. qdf_nbuf_t status_nbuf,
  80. struct hal_rx_ppdu_info *ppdu_info,
  81. bool *nbuf_used)
  82. {
  83. }
  84. #endif
  85. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  86. #include "dp_rx_mon_feature.h"
  87. #else
  88. static QDF_STATUS
  89. dp_send_ack_frame_to_stack(struct dp_soc *soc,
  90. struct dp_pdev *pdev,
  91. struct hal_rx_ppdu_info *ppdu_info)
  92. {
  93. return QDF_STATUS_SUCCESS;
  94. }
  95. #endif
  96. #ifdef FEATURE_PERPKT_INFO
  97. static inline void
  98. dp_rx_populate_rx_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  99. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  100. {
  101. uint8_t chain, bw;
  102. int8_t rssi;
  103. for (chain = 0; chain < SS_COUNT; chain++) {
  104. for (bw = 0; bw < MAX_BW; bw++) {
  105. rssi = ppdu_info->rx_status.rssi_chain[chain][bw];
  106. if (rssi != DP_RSSI_INVAL)
  107. cdp_rx_ppdu->rssi_chain[chain][bw] = rssi;
  108. else
  109. cdp_rx_ppdu->rssi_chain[chain][bw] = 0;
  110. }
  111. }
  112. }
  113. /*
  114. * dp_rx_populate_su_evm_details() - Populate su evm info
  115. * @ppdu_info: ppdu info structure from ppdu ring
  116. * @cdp_rx_ppdu: rx ppdu indication structure
  117. */
  118. static inline void
  119. dp_rx_populate_su_evm_details(struct hal_rx_ppdu_info *ppdu_info,
  120. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  121. {
  122. uint8_t pilot_evm;
  123. uint8_t nss_count;
  124. uint8_t pilot_count;
  125. nss_count = ppdu_info->evm_info.nss_count;
  126. pilot_count = ppdu_info->evm_info.pilot_count;
  127. if ((nss_count * pilot_count) > DP_RX_MAX_SU_EVM_COUNT) {
  128. qdf_err("pilot evm count is more than expected");
  129. return;
  130. }
  131. cdp_rx_ppdu->evm_info.pilot_count = pilot_count;
  132. cdp_rx_ppdu->evm_info.nss_count = nss_count;
  133. /* Populate evm for pilot_evm = nss_count*pilot_count */
  134. for (pilot_evm = 0; pilot_evm < nss_count * pilot_count; pilot_evm++) {
  135. cdp_rx_ppdu->evm_info.pilot_evm[pilot_evm] =
  136. ppdu_info->evm_info.pilot_evm[pilot_evm];
  137. }
  138. }
  139. /**
  140. * dp_rx_inc_rusize_cnt() - increment pdev stats based on RU size
  141. * @pdev: pdev ctx
  142. * @rx_user_status: mon rx user status
  143. *
  144. * Return: bool
  145. */
  146. static inline bool
  147. dp_rx_inc_rusize_cnt(struct dp_pdev *pdev,
  148. struct mon_rx_user_status *rx_user_status)
  149. {
  150. uint32_t ru_size;
  151. bool is_data;
  152. ru_size = rx_user_status->ofdma_ru_size;
  153. if (dp_is_subtype_data(rx_user_status->frame_control)) {
  154. DP_STATS_INC(pdev,
  155. ul_ofdma.data_rx_ru_size[ru_size], 1);
  156. is_data = true;
  157. } else {
  158. DP_STATS_INC(pdev,
  159. ul_ofdma.nondata_rx_ru_size[ru_size], 1);
  160. is_data = false;
  161. }
  162. return is_data;
  163. }
  164. /**
  165. * dp_rx_populate_cdp_indication_ppdu_user() - Populate per user cdp indication
  166. * @pdev: pdev ctx
  167. * @ppdu_info: ppdu info structure from ppdu ring
  168. * @cdp_rx_ppdu: Rx PPDU indication structure
  169. *
  170. * Return: none
  171. */
  172. static inline void
  173. dp_rx_populate_cdp_indication_ppdu_user(struct dp_pdev *pdev,
  174. struct hal_rx_ppdu_info *ppdu_info,
  175. struct cdp_rx_indication_ppdu
  176. *cdp_rx_ppdu)
  177. {
  178. struct dp_peer *peer;
  179. struct dp_soc *soc = pdev->soc;
  180. struct dp_ast_entry *ast_entry;
  181. uint32_t ast_index;
  182. int i;
  183. struct mon_rx_user_status *rx_user_status;
  184. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  185. int ru_size;
  186. bool is_data = false;
  187. uint32_t num_users;
  188. num_users = ppdu_info->com_info.num_users;
  189. for (i = 0; i < num_users; i++) {
  190. if (i > OFDMA_NUM_USERS)
  191. return;
  192. rx_user_status = &ppdu_info->rx_user_status[i];
  193. rx_stats_peruser = &cdp_rx_ppdu->user[i];
  194. ast_index = rx_user_status->ast_index;
  195. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  196. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  197. continue;
  198. }
  199. ast_entry = soc->ast_table[ast_index];
  200. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  201. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  202. continue;
  203. }
  204. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  205. DP_MOD_ID_RX_PPDU_STATS);
  206. if (!peer) {
  207. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  208. continue;
  209. }
  210. rx_stats_peruser->first_data_seq_ctrl =
  211. rx_user_status->first_data_seq_ctrl;
  212. rx_stats_peruser->frame_control_info_valid =
  213. rx_user_status->frame_control_info_valid;
  214. rx_stats_peruser->frame_control =
  215. rx_user_status->frame_control;
  216. rx_stats_peruser->tcp_msdu_count =
  217. rx_user_status->tcp_msdu_count;
  218. rx_stats_peruser->udp_msdu_count =
  219. rx_user_status->udp_msdu_count;
  220. rx_stats_peruser->other_msdu_count =
  221. rx_user_status->other_msdu_count;
  222. rx_stats_peruser->num_msdu =
  223. rx_stats_peruser->tcp_msdu_count +
  224. rx_stats_peruser->udp_msdu_count +
  225. rx_stats_peruser->other_msdu_count;
  226. rx_stats_peruser->preamble_type =
  227. rx_user_status->preamble_type;
  228. rx_stats_peruser->mpdu_cnt_fcs_ok =
  229. rx_user_status->mpdu_cnt_fcs_ok;
  230. rx_stats_peruser->mpdu_cnt_fcs_err =
  231. rx_user_status->mpdu_cnt_fcs_err;
  232. qdf_mem_copy(&rx_stats_peruser->mpdu_fcs_ok_bitmap,
  233. &rx_user_status->mpdu_fcs_ok_bitmap,
  234. HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
  235. sizeof(rx_user_status->mpdu_fcs_ok_bitmap[0]));
  236. rx_stats_peruser->mpdu_ok_byte_count =
  237. rx_user_status->mpdu_ok_byte_count;
  238. rx_stats_peruser->mpdu_err_byte_count =
  239. rx_user_status->mpdu_err_byte_count;
  240. cdp_rx_ppdu->num_mpdu += rx_user_status->mpdu_cnt_fcs_ok;
  241. cdp_rx_ppdu->num_msdu += rx_stats_peruser->num_msdu;
  242. rx_stats_peruser->retries =
  243. CDP_FC_IS_RETRY_SET(rx_stats_peruser->frame_control) ?
  244. rx_stats_peruser->mpdu_cnt_fcs_ok : 0;
  245. if (rx_stats_peruser->mpdu_cnt_fcs_ok > 1)
  246. rx_stats_peruser->is_ampdu = 1;
  247. else
  248. rx_stats_peruser->is_ampdu = 0;
  249. rx_stats_peruser->tid = ppdu_info->rx_status.tid;
  250. qdf_mem_copy(rx_stats_peruser->mac_addr,
  251. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  252. rx_stats_peruser->peer_id = peer->peer_id;
  253. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  254. rx_stats_peruser->vdev_id = peer->vdev->vdev_id;
  255. rx_stats_peruser->mu_ul_info_valid = 0;
  256. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  257. if (cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_OFDMA ||
  258. cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_MIMO) {
  259. if (rx_user_status->mu_ul_info_valid) {
  260. rx_stats_peruser->nss = rx_user_status->nss;
  261. rx_stats_peruser->mcs = rx_user_status->mcs;
  262. rx_stats_peruser->mu_ul_info_valid =
  263. rx_user_status->mu_ul_info_valid;
  264. rx_stats_peruser->ofdma_ru_start_index =
  265. rx_user_status->ofdma_ru_start_index;
  266. rx_stats_peruser->ofdma_ru_width =
  267. rx_user_status->ofdma_ru_width;
  268. rx_stats_peruser->user_index = i;
  269. ru_size = rx_user_status->ofdma_ru_size;
  270. /*
  271. * max RU size will be equal to
  272. * HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  273. */
  274. if (ru_size >= OFDMA_NUM_RU_SIZE) {
  275. dp_err("invalid ru_size %d\n",
  276. ru_size);
  277. return;
  278. }
  279. is_data = dp_rx_inc_rusize_cnt(pdev,
  280. rx_user_status);
  281. }
  282. if (is_data) {
  283. /* counter to get number of MU OFDMA */
  284. pdev->stats.ul_ofdma.data_rx_ppdu++;
  285. pdev->stats.ul_ofdma.data_users[num_users]++;
  286. }
  287. }
  288. }
  289. }
  290. /**
  291. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  292. * @pdev: pdev ctx
  293. * @ppdu_info: ppdu info structure from ppdu ring
  294. * @cdp_rx_ppdu: Rx PPDU indication structure
  295. *
  296. * Return: none
  297. */
  298. static inline void
  299. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  300. struct hal_rx_ppdu_info *ppdu_info,
  301. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  302. {
  303. struct dp_peer *peer;
  304. struct dp_soc *soc = pdev->soc;
  305. struct dp_ast_entry *ast_entry;
  306. uint32_t ast_index;
  307. uint32_t i;
  308. cdp_rx_ppdu->first_data_seq_ctrl =
  309. ppdu_info->rx_status.first_data_seq_ctrl;
  310. cdp_rx_ppdu->frame_ctrl =
  311. ppdu_info->rx_status.frame_control;
  312. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  313. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  314. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  315. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  316. /* num mpdu is consolidated and added together in num user loop */
  317. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  318. /* num msdu is consolidated and added together in num user loop */
  319. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  320. cdp_rx_ppdu->udp_msdu_count +
  321. cdp_rx_ppdu->other_msdu_count);
  322. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  323. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  324. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  325. cdp_rx_ppdu->is_ampdu = 1;
  326. else
  327. cdp_rx_ppdu->is_ampdu = 0;
  328. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  329. ast_index = ppdu_info->rx_status.ast_index;
  330. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  331. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  332. cdp_rx_ppdu->num_users = 0;
  333. goto end;
  334. }
  335. ast_entry = soc->ast_table[ast_index];
  336. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  337. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  338. cdp_rx_ppdu->num_users = 0;
  339. goto end;
  340. }
  341. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  342. DP_MOD_ID_RX_PPDU_STATS);
  343. if (!peer) {
  344. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  345. cdp_rx_ppdu->num_users = 0;
  346. goto end;
  347. }
  348. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  349. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  350. cdp_rx_ppdu->peer_id = peer->peer_id;
  351. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  352. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  353. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  354. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  355. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  356. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  357. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  358. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  359. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  360. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  361. else
  362. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  363. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  364. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  365. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  366. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  367. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  368. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  369. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  370. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  371. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  372. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  373. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  374. dp_rx_populate_rx_rssi_chain(ppdu_info, cdp_rx_ppdu);
  375. dp_rx_populate_su_evm_details(ppdu_info, cdp_rx_ppdu);
  376. cdp_rx_ppdu->rx_antenna = ppdu_info->rx_status.rx_antenna;
  377. cdp_rx_ppdu->nf = ppdu_info->rx_status.chan_noise_floor;
  378. for (i = 0; i < MAX_CHAIN; i++)
  379. cdp_rx_ppdu->per_chain_rssi[i] = ppdu_info->rx_status.rssi[i];
  380. cdp_rx_ppdu->is_mcast_bcast = ppdu_info->nac_info.mcast_bcast;
  381. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  382. cdp_rx_ppdu->num_mpdu = 0;
  383. cdp_rx_ppdu->num_msdu = 0;
  384. dp_rx_populate_cdp_indication_ppdu_user(pdev, ppdu_info, cdp_rx_ppdu);
  385. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  386. return;
  387. end:
  388. dp_rx_populate_cfr_non_assoc_sta(pdev, ppdu_info, cdp_rx_ppdu);
  389. }
  390. #else
  391. static inline void
  392. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  393. struct hal_rx_ppdu_info *ppdu_info,
  394. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  395. {
  396. }
  397. #endif
  398. /**
  399. * dp_rx_stats_update() - Update per-peer statistics
  400. * @soc: Datapath SOC handle
  401. * @peer: Datapath peer handle
  402. * @ppdu: PPDU Descriptor
  403. *
  404. * Return: None
  405. */
  406. #ifdef FEATURE_PERPKT_INFO
  407. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  408. struct cdp_rx_indication_ppdu *ppdu,
  409. uint32_t user)
  410. {
  411. uint32_t ratekbps = 0;
  412. uint32_t ppdu_rx_rate = 0;
  413. uint32_t nss = 0;
  414. uint8_t mcs = 0;
  415. uint32_t rix;
  416. uint16_t ratecode;
  417. struct cdp_rx_stats_ppdu_user *ppdu_user = NULL;
  418. if (!peer || !ppdu)
  419. return;
  420. if (ppdu->u.ppdu_type != HAL_RX_TYPE_SU) {
  421. ppdu_user = &ppdu->user[user];
  422. if (ppdu_user->nss == 0)
  423. nss = 0;
  424. else
  425. nss = ppdu_user->nss - 1;
  426. mcs = ppdu_user->mcs;
  427. } else {
  428. if (ppdu->u.nss == 0)
  429. nss = 0;
  430. else
  431. nss = ppdu->u.nss - 1;
  432. mcs = ppdu->u.mcs;
  433. }
  434. ratekbps = dp_getrateindex(ppdu->u.gi,
  435. mcs,
  436. nss,
  437. ppdu->u.preamble,
  438. ppdu->u.bw,
  439. &rix,
  440. &ratecode);
  441. if (!ratekbps)
  442. return;
  443. ppdu->rix = rix;
  444. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  445. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  446. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  447. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  448. ppdu->rx_ratekbps = ratekbps;
  449. ppdu->rx_ratecode = ratecode;
  450. if (peer->vdev)
  451. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  452. }
  453. static void dp_rx_stats_update(struct dp_pdev *pdev,
  454. struct cdp_rx_indication_ppdu *ppdu)
  455. {
  456. struct dp_soc *soc = NULL;
  457. uint8_t mcs, preamble, ac = 0, nss, ppdu_type;
  458. uint16_t num_msdu;
  459. uint8_t pkt_bw_offset;
  460. struct dp_peer *peer;
  461. struct cdp_rx_stats_ppdu_user *ppdu_user;
  462. uint32_t i;
  463. enum cdp_mu_packet_type mu_pkt_type;
  464. if (pdev)
  465. soc = pdev->soc;
  466. else
  467. return;
  468. if (!soc || soc->process_rx_status)
  469. return;
  470. preamble = ppdu->u.preamble;
  471. ppdu_type = ppdu->u.ppdu_type;
  472. for (i = 0; i < ppdu->num_users && i < CDP_MU_MAX_USERS; i++) {
  473. peer = NULL;
  474. ppdu_user = &ppdu->user[i];
  475. if (ppdu_user->peer_id != HTT_INVALID_PEER)
  476. peer = dp_peer_find_hash_find(soc, ppdu_user->mac_addr,
  477. 0, ppdu_user->vdev_id,
  478. DP_MOD_ID_RX_PPDU_STATS);
  479. if (!peer)
  480. peer = pdev->invalid_peer;
  481. if (ppdu_type == HAL_RX_TYPE_SU) {
  482. mcs = ppdu->u.mcs;
  483. nss = ppdu->u.nss;
  484. } else {
  485. mcs = ppdu_user->mcs;
  486. nss = ppdu_user->nss;
  487. }
  488. num_msdu = ppdu_user->num_msdu;
  489. switch (ppdu->u.bw) {
  490. case CMN_BW_20MHZ:
  491. pkt_bw_offset = PKT_BW_GAIN_20MHZ;
  492. break;
  493. case CMN_BW_40MHZ:
  494. pkt_bw_offset = PKT_BW_GAIN_40MHZ;
  495. break;
  496. case CMN_BW_80MHZ:
  497. pkt_bw_offset = PKT_BW_GAIN_80MHZ;
  498. break;
  499. case CMN_BW_160MHZ:
  500. pkt_bw_offset = PKT_BW_GAIN_160MHZ;
  501. break;
  502. default:
  503. pkt_bw_offset = 0;
  504. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  505. "Invalid BW index = %d", ppdu->u.bw);
  506. }
  507. DP_STATS_UPD(peer, rx.rssi, (ppdu->rssi + pkt_bw_offset));
  508. if (peer->stats.rx.avg_rssi == INVALID_RSSI)
  509. peer->stats.rx.avg_rssi =
  510. CDP_RSSI_IN(peer->stats.rx.rssi);
  511. else
  512. CDP_RSSI_UPDATE_AVG(peer->stats.rx.avg_rssi,
  513. peer->stats.rx.rssi);
  514. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  515. nss = 1;
  516. if (ppdu_type == HAL_RX_TYPE_SU) {
  517. if (nss) {
  518. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  519. DP_STATS_INC(peer, rx.ppdu_nss[nss - 1], 1);
  520. }
  521. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_ok,
  522. ppdu_user->mpdu_cnt_fcs_ok);
  523. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_err,
  524. ppdu_user->mpdu_cnt_fcs_err);
  525. }
  526. if (ppdu_type >= HAL_RX_TYPE_MU_MIMO &&
  527. ppdu_type <= HAL_RX_TYPE_MU_OFDMA) {
  528. if (ppdu_type == HAL_RX_TYPE_MU_MIMO)
  529. mu_pkt_type = RX_TYPE_MU_MIMO;
  530. else
  531. mu_pkt_type = RX_TYPE_MU_OFDMA;
  532. if (nss) {
  533. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  534. DP_STATS_INC(peer,
  535. rx.rx_mu[mu_pkt_type].ppdu_nss[nss - 1],
  536. 1);
  537. }
  538. DP_STATS_INC(peer,
  539. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_ok,
  540. ppdu_user->mpdu_cnt_fcs_ok);
  541. DP_STATS_INC(peer,
  542. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_err,
  543. ppdu_user->mpdu_cnt_fcs_err);
  544. }
  545. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  546. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  547. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type],
  548. num_msdu);
  549. DP_STATS_INC(peer, rx.ppdu_cnt[ppdu->u.ppdu_type], 1);
  550. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu,
  551. ppdu_user->is_ampdu);
  552. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu,
  553. !(ppdu_user->is_ampdu));
  554. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  555. DP_STATS_INCC(peer,
  556. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  557. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  558. DP_STATS_INCC(peer,
  559. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  560. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  561. DP_STATS_INCC(peer,
  562. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  563. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  564. DP_STATS_INCC(peer,
  565. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  566. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  567. DP_STATS_INCC(peer,
  568. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  569. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  570. DP_STATS_INCC(peer,
  571. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  572. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  573. DP_STATS_INCC(peer,
  574. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  575. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  576. DP_STATS_INCC(peer,
  577. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  578. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  579. DP_STATS_INCC(peer,
  580. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  581. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  582. DP_STATS_INCC(peer,
  583. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  584. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  585. DP_STATS_INCC(peer,
  586. rx.su_ax_ppdu_cnt.mcs_count[MAX_MCS - 1], 1,
  587. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  588. (ppdu_type == HAL_RX_TYPE_SU)));
  589. DP_STATS_INCC(peer,
  590. rx.su_ax_ppdu_cnt.mcs_count[mcs], 1,
  591. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  592. (ppdu_type == HAL_RX_TYPE_SU)));
  593. DP_STATS_INCC(peer,
  594. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[MAX_MCS - 1],
  595. 1, ((mcs >= (MAX_MCS - 1)) &&
  596. (preamble == DOT11_AX) &&
  597. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  598. DP_STATS_INCC(peer,
  599. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[mcs],
  600. 1, ((mcs < (MAX_MCS - 1)) &&
  601. (preamble == DOT11_AX) &&
  602. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  603. DP_STATS_INCC(peer,
  604. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[MAX_MCS - 1],
  605. 1, ((mcs >= (MAX_MCS - 1)) &&
  606. (preamble == DOT11_AX) &&
  607. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  608. DP_STATS_INCC(peer,
  609. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[mcs],
  610. 1, ((mcs < (MAX_MCS - 1)) &&
  611. (preamble == DOT11_AX) &&
  612. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  613. /*
  614. * If invalid TID, it could be a non-qos frame, hence do not
  615. * update any AC counters
  616. */
  617. ac = TID_TO_WME_AC(ppdu_user->tid);
  618. if (ppdu->tid != HAL_TID_INVALID)
  619. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  620. dp_peer_stats_notify(pdev, peer);
  621. DP_STATS_UPD(peer, rx.last_rssi, ppdu->rssi);
  622. if (peer == pdev->invalid_peer)
  623. continue;
  624. if (dp_is_subtype_data(ppdu->frame_ctrl))
  625. dp_rx_rate_stats_update(peer, ppdu, i);
  626. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  627. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  628. &peer->stats, ppdu->peer_id,
  629. UPDATE_PEER_STATS, pdev->pdev_id);
  630. #endif
  631. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  632. }
  633. }
  634. #endif
  635. /**
  636. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  637. * @soc: core txrx main context
  638. * @pdev: pdev structure
  639. * @ppdu_info: structure for rx ppdu ring
  640. * @nbuf: QDF nbuf
  641. * @fcs_ok_mpdu_cnt: fcs passsed mpdu index
  642. * @deliver_frame: flag to deliver wdi event
  643. *
  644. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  645. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  646. */
  647. #ifdef FEATURE_PERPKT_INFO
  648. static inline QDF_STATUS
  649. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  650. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  651. uint8_t fcs_ok_mpdu_cnt, bool deliver_frame)
  652. {
  653. uint16_t size = 0;
  654. struct ieee80211_frame *wh;
  655. uint32_t *nbuf_data;
  656. if (!ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload)
  657. return QDF_STATUS_SUCCESS;
  658. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  659. if (pdev->mcopy_mode == M_COPY) {
  660. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  661. return QDF_STATUS_SUCCESS;
  662. }
  663. wh = (struct ieee80211_frame *)(ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload + 4);
  664. size = (ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload -
  665. qdf_nbuf_data(nbuf));
  666. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  667. return QDF_STATUS_SUCCESS;
  668. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  669. IEEE80211_FC0_TYPE_MGT) ||
  670. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  671. IEEE80211_FC0_TYPE_CTL)) {
  672. return QDF_STATUS_SUCCESS;
  673. }
  674. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  675. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  676. /* only retain RX MSDU payload in the skb */
  677. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) - ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].payload_len);
  678. if (deliver_frame) {
  679. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  680. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  681. nbuf, HTT_INVALID_PEER,
  682. WDI_NO_VAL, pdev->pdev_id);
  683. }
  684. return QDF_STATUS_E_ALREADY;
  685. }
  686. #else
  687. static inline QDF_STATUS
  688. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  689. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  690. uint8_t fcs_ok_cnt, bool deliver_frame)
  691. {
  692. return QDF_STATUS_SUCCESS;
  693. }
  694. #endif
  695. /**
  696. * dp_rx_mcopy_handle_last_mpdu() - cache and delive last MPDU header in a
  697. * status buffer if MPDU end tlv is received in different buffer
  698. * @soc: core txrx main context
  699. * @pdev: pdev structure
  700. * @ppdu_info: structure for rx ppdu ring
  701. * @status_nbuf: QDF nbuf
  702. *
  703. * Return: void
  704. */
  705. #ifdef FEATURE_PERPKT_INFO
  706. static inline void
  707. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  708. struct hal_rx_ppdu_info *ppdu_info,
  709. qdf_nbuf_t status_nbuf)
  710. {
  711. QDF_STATUS mcopy_status;
  712. qdf_nbuf_t nbuf_clone = NULL;
  713. /* If the MPDU end tlv and RX header are received in different buffers,
  714. * process the RX header based on fcs status.
  715. */
  716. if (pdev->mcopy_status_nbuf) {
  717. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  718. if (pdev->mcopy_mode == M_COPY) {
  719. if (pdev->m_copy_id.rx_ppdu_id ==
  720. ppdu_info->com_info.ppdu_id)
  721. goto end1;
  722. }
  723. if (ppdu_info->is_fcs_passed) {
  724. nbuf_clone = qdf_nbuf_clone(pdev->mcopy_status_nbuf);
  725. if (!nbuf_clone) {
  726. QDF_TRACE(QDF_MODULE_ID_TXRX,
  727. QDF_TRACE_LEVEL_ERROR,
  728. "Failed to clone nbuf",
  729. __func__, __LINE__);
  730. goto end1;
  731. }
  732. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  733. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  734. nbuf_clone,
  735. HTT_INVALID_PEER,
  736. WDI_NO_VAL, pdev->pdev_id);
  737. ppdu_info->is_fcs_passed = false;
  738. }
  739. end1:
  740. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  741. pdev->mcopy_status_nbuf = NULL;
  742. }
  743. /* If the MPDU end tlv and RX header are received in different buffers,
  744. * preserve the RX header as the fcs status will be received in MPDU
  745. * end tlv in next buffer. So, cache the buffer to be processd in next
  746. * iteration
  747. */
  748. if ((ppdu_info->fcs_ok_cnt + ppdu_info->fcs_err_cnt) !=
  749. ppdu_info->com_info.mpdu_cnt) {
  750. pdev->mcopy_status_nbuf = qdf_nbuf_clone(status_nbuf);
  751. if (pdev->mcopy_status_nbuf) {
  752. mcopy_status = dp_rx_handle_mcopy_mode(
  753. soc, pdev,
  754. ppdu_info,
  755. pdev->mcopy_status_nbuf,
  756. ppdu_info->fcs_ok_cnt,
  757. false);
  758. if (mcopy_status == QDF_STATUS_SUCCESS) {
  759. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  760. pdev->mcopy_status_nbuf = NULL;
  761. }
  762. }
  763. }
  764. }
  765. #else
  766. static inline void
  767. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  768. struct hal_rx_ppdu_info *ppdu_info,
  769. qdf_nbuf_t status_nbuf)
  770. {
  771. }
  772. #endif
  773. /**
  774. * dp_rx_mcopy_process_ppdu_info() - update mcopy ppdu info
  775. * @ppdu_info: structure for rx ppdu ring
  776. * @tlv_status: processed TLV status
  777. *
  778. * Return: void
  779. */
  780. #ifdef FEATURE_PERPKT_INFO
  781. static inline void
  782. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  783. struct hal_rx_ppdu_info *ppdu_info,
  784. uint32_t tlv_status)
  785. {
  786. if (!pdev->mcopy_mode)
  787. return;
  788. /* The fcs status is received in MPDU end tlv. If the RX header
  789. * and its MPDU end tlv are received in different status buffer then
  790. * to process that header ppdu_info->is_fcs_passed is used.
  791. * If end tlv is received in next status buffer then com_info.mpdu_cnt
  792. * will be 0 at the time of receiving MPDU end tlv and we update the
  793. * is_fcs_passed flag based on ppdu_info->fcs_err.
  794. */
  795. if (tlv_status != HAL_TLV_STATUS_MPDU_END)
  796. return;
  797. if (!ppdu_info->fcs_err) {
  798. if (ppdu_info->fcs_ok_cnt >
  799. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER) {
  800. dp_err("No. of MPDUs(%d) per status buff exceeded",
  801. ppdu_info->fcs_ok_cnt);
  802. return;
  803. }
  804. if (ppdu_info->com_info.mpdu_cnt)
  805. ppdu_info->fcs_ok_cnt++;
  806. else
  807. ppdu_info->is_fcs_passed = true;
  808. } else {
  809. if (ppdu_info->com_info.mpdu_cnt)
  810. ppdu_info->fcs_err_cnt++;
  811. else
  812. ppdu_info->is_fcs_passed = false;
  813. }
  814. }
  815. #else
  816. static inline void
  817. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  818. struct hal_rx_ppdu_info *ppdu_info,
  819. uint32_t tlv_status)
  820. {
  821. }
  822. #endif
  823. #ifdef FEATURE_PERPKT_INFO
  824. static inline void
  825. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  826. struct hal_rx_ppdu_info *ppdu_info,
  827. uint32_t tlv_status,
  828. qdf_nbuf_t status_nbuf)
  829. {
  830. QDF_STATUS mcopy_status;
  831. qdf_nbuf_t nbuf_clone = NULL;
  832. uint8_t fcs_ok_mpdu_cnt = 0;
  833. dp_rx_mcopy_handle_last_mpdu(soc, pdev, ppdu_info, status_nbuf);
  834. if (qdf_unlikely(!ppdu_info->com_info.mpdu_cnt))
  835. goto end;
  836. if (qdf_unlikely(!ppdu_info->fcs_ok_cnt))
  837. goto end;
  838. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  839. if (pdev->mcopy_mode == M_COPY)
  840. ppdu_info->fcs_ok_cnt = 1;
  841. while (fcs_ok_mpdu_cnt < ppdu_info->fcs_ok_cnt) {
  842. nbuf_clone = qdf_nbuf_clone(status_nbuf);
  843. if (!nbuf_clone) {
  844. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  845. "Failed to clone nbuf",
  846. __func__, __LINE__);
  847. goto end;
  848. }
  849. mcopy_status = dp_rx_handle_mcopy_mode(soc, pdev,
  850. ppdu_info,
  851. nbuf_clone,
  852. fcs_ok_mpdu_cnt,
  853. true);
  854. if (mcopy_status == QDF_STATUS_SUCCESS)
  855. qdf_nbuf_free(nbuf_clone);
  856. fcs_ok_mpdu_cnt++;
  857. }
  858. end:
  859. qdf_nbuf_free(status_nbuf);
  860. ppdu_info->fcs_ok_cnt = 0;
  861. ppdu_info->fcs_err_cnt = 0;
  862. ppdu_info->com_info.mpdu_cnt = 0;
  863. qdf_mem_zero(&ppdu_info->ppdu_msdu_info,
  864. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER
  865. * sizeof(struct hal_rx_msdu_payload_info));
  866. }
  867. #else
  868. static inline void
  869. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  870. struct hal_rx_ppdu_info *ppdu_info,
  871. uint32_t tlv_status,
  872. qdf_nbuf_t status_nbuf)
  873. {
  874. }
  875. #endif
  876. /**
  877. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  878. * @soc: Datapath SOC handle
  879. * @pdev: Datapath PDEV handle
  880. * @ppdu_info: Structure for rx ppdu info
  881. * @nbuf: Qdf nbuf abstraction for linux skb
  882. *
  883. * Return: 0 on success, 1 on failure
  884. */
  885. static inline int
  886. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  887. struct hal_rx_ppdu_info *ppdu_info,
  888. qdf_nbuf_t nbuf)
  889. {
  890. uint8_t size = 0;
  891. if (!pdev->monitor_vdev) {
  892. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  893. "[%s]:[%d] Monitor vdev is NULL !!",
  894. __func__, __LINE__);
  895. return 1;
  896. }
  897. if (!ppdu_info->msdu_info.first_msdu_payload) {
  898. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  899. "[%s]:[%d] First msdu payload not present",
  900. __func__, __LINE__);
  901. return 1;
  902. }
  903. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  904. size = (ppdu_info->msdu_info.first_msdu_payload -
  905. qdf_nbuf_data(nbuf)) + 4;
  906. ppdu_info->msdu_info.first_msdu_payload = NULL;
  907. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  908. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  909. "[%s]:[%d] No header present",
  910. __func__, __LINE__);
  911. return 1;
  912. }
  913. /* Only retain RX MSDU payload in the skb */
  914. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  915. ppdu_info->msdu_info.payload_len);
  916. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, nbuf,
  917. qdf_nbuf_headroom(nbuf))) {
  918. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  919. return 1;
  920. }
  921. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  922. nbuf, NULL);
  923. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  924. return 0;
  925. }
  926. #if defined(WLAN_CFR_ENABLE) && defined(WLAN_ENH_CFR_ENABLE)
  927. /*
  928. * dp_rx_mon_handle_cfr_mu_info() - Gather macaddr and ast_index of peer(s) in
  929. * the PPDU received, this will be used for correlation of CFR data captured
  930. * for an UL-MU-PPDU
  931. * @pdev: pdev ctx
  932. * @ppdu_info: pointer to ppdu info structure populated from ppdu status TLVs
  933. * @cdp_rx_ppdu: Rx PPDU indication structure
  934. *
  935. * Return: none
  936. */
  937. static inline void
  938. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  939. struct hal_rx_ppdu_info *ppdu_info,
  940. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  941. {
  942. struct dp_peer *peer;
  943. struct dp_soc *soc = pdev->soc;
  944. struct dp_ast_entry *ast_entry;
  945. struct mon_rx_user_status *rx_user_status;
  946. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  947. uint32_t num_users;
  948. int user_id;
  949. uint32_t ast_index;
  950. qdf_spin_lock_bh(&soc->ast_lock);
  951. num_users = ppdu_info->com_info.num_users;
  952. for (user_id = 0; user_id < num_users; user_id++) {
  953. if (user_id > OFDMA_NUM_USERS) {
  954. qdf_spin_unlock_bh(&soc->ast_lock);
  955. return;
  956. }
  957. rx_user_status = &ppdu_info->rx_user_status[user_id];
  958. rx_stats_peruser = &cdp_rx_ppdu->user[user_id];
  959. ast_index = rx_user_status->ast_index;
  960. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  961. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  962. continue;
  963. }
  964. ast_entry = soc->ast_table[ast_index];
  965. if (!ast_entry || ast_entry->peer_id == HTT_INVALID_PEER) {
  966. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  967. continue;
  968. }
  969. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  970. DP_MOD_ID_RX_PPDU_STATS);
  971. if (!peer) {
  972. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  973. continue;
  974. }
  975. qdf_mem_copy(rx_stats_peruser->mac_addr,
  976. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  977. dp_peer_unref_delete(peer, DP_MOD_ID_RX_PPDU_STATS);
  978. }
  979. qdf_spin_unlock_bh(&soc->ast_lock);
  980. }
  981. /*
  982. * dp_rx_mon_populate_cfr_ppdu_info() - Populate cdp ppdu info from hal ppdu
  983. * info
  984. * @pdev: pdev ctx
  985. * @ppdu_info: ppdu info structure from ppdu ring
  986. * @cdp_rx_ppdu : Rx PPDU indication structure
  987. *
  988. * Return: none
  989. */
  990. static inline void
  991. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  992. struct hal_rx_ppdu_info *ppdu_info,
  993. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  994. {
  995. int chain;
  996. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  997. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  998. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  999. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  1000. for (chain = 0; chain < MAX_CHAIN; chain++)
  1001. cdp_rx_ppdu->per_chain_rssi[chain] =
  1002. ppdu_info->rx_status.rssi[chain];
  1003. dp_rx_mon_handle_cfr_mu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1004. }
  1005. /**
  1006. * dp_cfr_rcc_mode_status() - Return status of cfr rcc mode
  1007. * @pdev: pdev ctx
  1008. *
  1009. * Return: True or False
  1010. */
  1011. static inline bool
  1012. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1013. {
  1014. return pdev->cfr_rcc_mode;
  1015. }
  1016. /*
  1017. * dp_rx_mon_populate_cfr_info() - Populate cdp ppdu info from hal cfr info
  1018. * @pdev: pdev ctx
  1019. * @ppdu_info: ppdu info structure from ppdu ring
  1020. * @cdp_rx_ppdu: Rx PPDU indication structure
  1021. *
  1022. * Return: none
  1023. */
  1024. static inline void
  1025. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1026. struct hal_rx_ppdu_info *ppdu_info,
  1027. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1028. {
  1029. struct cdp_rx_ppdu_cfr_info *cfr_info;
  1030. if (!dp_cfr_rcc_mode_status(pdev))
  1031. return;
  1032. cfr_info = &cdp_rx_ppdu->cfr_info;
  1033. cfr_info->bb_captured_channel
  1034. = ppdu_info->cfr_info.bb_captured_channel;
  1035. cfr_info->bb_captured_timeout
  1036. = ppdu_info->cfr_info.bb_captured_timeout;
  1037. cfr_info->bb_captured_reason
  1038. = ppdu_info->cfr_info.bb_captured_reason;
  1039. cfr_info->rx_location_info_valid
  1040. = ppdu_info->cfr_info.rx_location_info_valid;
  1041. cfr_info->chan_capture_status
  1042. = ppdu_info->cfr_info.chan_capture_status;
  1043. cfr_info->rtt_che_buffer_pointer_high8
  1044. = ppdu_info->cfr_info.rtt_che_buffer_pointer_high8;
  1045. cfr_info->rtt_che_buffer_pointer_low32
  1046. = ppdu_info->cfr_info.rtt_che_buffer_pointer_low32;
  1047. }
  1048. /**
  1049. * dp_update_cfr_dbg_stats() - Increment RCC debug statistics
  1050. * @pdev: pdev structure
  1051. * @ppdu_info: structure for rx ppdu ring
  1052. *
  1053. * Return: none
  1054. */
  1055. static inline void
  1056. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1057. struct hal_rx_ppdu_info *ppdu_info)
  1058. {
  1059. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1060. DP_STATS_INC(pdev,
  1061. rcc.chan_capture_status[cfr->chan_capture_status], 1);
  1062. if (cfr->rx_location_info_valid) {
  1063. DP_STATS_INC(pdev, rcc.rx_loc_info_valid_cnt, 1);
  1064. if (cfr->bb_captured_channel) {
  1065. DP_STATS_INC(pdev, rcc.bb_captured_channel_cnt, 1);
  1066. DP_STATS_INC(pdev,
  1067. rcc.reason_cnt[cfr->bb_captured_reason],
  1068. 1);
  1069. } else if (cfr->bb_captured_timeout) {
  1070. DP_STATS_INC(pdev, rcc.bb_captured_timeout_cnt, 1);
  1071. DP_STATS_INC(pdev,
  1072. rcc.reason_cnt[cfr->bb_captured_reason],
  1073. 1);
  1074. }
  1075. }
  1076. }
  1077. /*
  1078. * dp_rx_handle_cfr() - Gather cfr info from hal ppdu info
  1079. * @soc: core txrx main context
  1080. * @pdev: pdev ctx
  1081. * @ppdu_info: ppdu info structure from ppdu ring
  1082. *
  1083. * Return: none
  1084. */
  1085. static inline void
  1086. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1087. struct hal_rx_ppdu_info *ppdu_info)
  1088. {
  1089. qdf_nbuf_t ppdu_nbuf;
  1090. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1091. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1092. if (!ppdu_info->cfr_info.bb_captured_channel)
  1093. return;
  1094. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1095. sizeof(struct cdp_rx_indication_ppdu),
  1096. 0,
  1097. 0,
  1098. FALSE);
  1099. if (ppdu_nbuf) {
  1100. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1101. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1102. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1103. qdf_nbuf_put_tail(ppdu_nbuf,
  1104. sizeof(struct cdp_rx_indication_ppdu));
  1105. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1106. ppdu_nbuf, HTT_INVALID_PEER,
  1107. WDI_NO_VAL, pdev->pdev_id);
  1108. }
  1109. }
  1110. /**
  1111. * dp_rx_populate_cfr_non_assoc_sta() - Populate cfr ppdu info for PPDUs from
  1112. * non-associated stations
  1113. * @pdev: pdev ctx
  1114. * @ppdu_info: ppdu info structure from ppdu ring
  1115. * @cdp_rx_ppdu: Rx PPDU indication structure
  1116. *
  1117. * Return: none
  1118. */
  1119. static inline void
  1120. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1121. struct hal_rx_ppdu_info *ppdu_info,
  1122. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1123. {
  1124. if (!dp_cfr_rcc_mode_status(pdev))
  1125. return;
  1126. if (ppdu_info->cfr_info.bb_captured_channel)
  1127. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1128. }
  1129. /**
  1130. * dp_bb_captured_chan_status() - Get the bb_captured_channel status
  1131. * @ppdu_info: structure for rx ppdu ring
  1132. *
  1133. * Return: Success/ Failure
  1134. */
  1135. static inline QDF_STATUS
  1136. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1137. struct hal_rx_ppdu_info *ppdu_info)
  1138. {
  1139. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  1140. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1141. if (dp_cfr_rcc_mode_status(pdev)) {
  1142. if (cfr->bb_captured_channel)
  1143. status = QDF_STATUS_SUCCESS;
  1144. }
  1145. return status;
  1146. }
  1147. #else
  1148. static inline void
  1149. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  1150. struct hal_rx_ppdu_info *ppdu_info,
  1151. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1152. {
  1153. }
  1154. static inline void
  1155. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  1156. struct hal_rx_ppdu_info *ppdu_info,
  1157. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1158. {
  1159. }
  1160. static inline void
  1161. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1162. struct hal_rx_ppdu_info *ppdu_info,
  1163. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1164. {
  1165. }
  1166. static inline void
  1167. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1168. struct hal_rx_ppdu_info *ppdu_info)
  1169. {
  1170. }
  1171. static inline void
  1172. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1173. struct hal_rx_ppdu_info *ppdu_info,
  1174. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1175. {
  1176. }
  1177. static inline void
  1178. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1179. struct hal_rx_ppdu_info *ppdu_info)
  1180. {
  1181. }
  1182. static inline QDF_STATUS
  1183. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1184. struct hal_rx_ppdu_info *ppdu_info)
  1185. {
  1186. return QDF_STATUS_E_NOSUPPORT;
  1187. }
  1188. static inline bool
  1189. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1190. {
  1191. return false;
  1192. }
  1193. #endif
  1194. /**
  1195. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  1196. * @soc: core txrx main context
  1197. * @pdev: pdev strcuture
  1198. * @ppdu_info: structure for rx ppdu ring
  1199. *
  1200. * Return: none
  1201. */
  1202. #ifdef FEATURE_PERPKT_INFO
  1203. static inline void
  1204. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1205. struct hal_rx_ppdu_info *ppdu_info)
  1206. {
  1207. qdf_nbuf_t ppdu_nbuf;
  1208. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1209. /*
  1210. * Do not allocate if fcs error,
  1211. * ast idx invalid / fctl invalid
  1212. *
  1213. * In CFR RCC mode - PPDU status TLVs of error pkts are also needed
  1214. */
  1215. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  1216. return;
  1217. if (ppdu_info->nac_info.fc_valid &&
  1218. ppdu_info->nac_info.to_ds_flag &&
  1219. ppdu_info->nac_info.mac_addr2_valid) {
  1220. struct dp_neighbour_peer *peer = NULL;
  1221. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  1222. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1223. if (pdev->neighbour_peers_added) {
  1224. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1225. neighbour_peer_list_elem) {
  1226. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  1227. &ppdu_info->nac_info.mac_addr2,
  1228. QDF_MAC_ADDR_SIZE)) {
  1229. peer->rssi = rssi;
  1230. break;
  1231. }
  1232. }
  1233. }
  1234. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1235. }
  1236. /* need not generate wdi event when mcopy, cfr rcc mode and
  1237. * enhanced stats are not enabled
  1238. */
  1239. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en &&
  1240. !dp_cfr_rcc_mode_status(pdev))
  1241. return;
  1242. if (dp_cfr_rcc_mode_status(pdev))
  1243. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1244. if (!ppdu_info->rx_status.frame_control_info_valid ||
  1245. (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)) {
  1246. if (!(pdev->mcopy_mode ||
  1247. (dp_bb_captured_chan_status(pdev, ppdu_info) ==
  1248. QDF_STATUS_SUCCESS)))
  1249. return;
  1250. }
  1251. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1252. sizeof(struct cdp_rx_indication_ppdu),
  1253. 0, 0, FALSE);
  1254. if (ppdu_nbuf) {
  1255. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1256. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1257. dp_rx_populate_cdp_indication_ppdu(pdev,
  1258. ppdu_info, cdp_rx_ppdu);
  1259. if (!qdf_nbuf_put_tail(ppdu_nbuf,
  1260. sizeof(struct cdp_rx_indication_ppdu)))
  1261. return;
  1262. dp_rx_stats_update(pdev, cdp_rx_ppdu);
  1263. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  1264. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  1265. soc, ppdu_nbuf,
  1266. cdp_rx_ppdu->peer_id,
  1267. WDI_NO_VAL, pdev->pdev_id);
  1268. } else if (pdev->mcopy_mode || dp_cfr_rcc_mode_status(pdev)) {
  1269. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1270. ppdu_nbuf, HTT_INVALID_PEER,
  1271. WDI_NO_VAL, pdev->pdev_id);
  1272. } else {
  1273. qdf_nbuf_free(ppdu_nbuf);
  1274. }
  1275. }
  1276. }
  1277. #else
  1278. static inline void
  1279. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1280. struct hal_rx_ppdu_info *ppdu_info)
  1281. {
  1282. }
  1283. #endif
  1284. /**
  1285. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  1286. * filtering enabled
  1287. * @soc: core txrx main context
  1288. * @ppdu_info: Structure for rx ppdu info
  1289. * @status_nbuf: Qdf nbuf abstraction for linux skb
  1290. * @pdev_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1291. *
  1292. * Return: none
  1293. */
  1294. static inline void
  1295. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  1296. struct hal_rx_ppdu_info *ppdu_info,
  1297. qdf_nbuf_t status_nbuf, uint32_t pdev_id)
  1298. {
  1299. struct dp_peer *peer;
  1300. struct dp_ast_entry *ast_entry;
  1301. uint32_t ast_index;
  1302. ast_index = ppdu_info->rx_status.ast_index;
  1303. if (ast_index < wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  1304. ast_entry = soc->ast_table[ast_index];
  1305. if (ast_entry) {
  1306. peer = dp_peer_get_ref_by_id(soc, ast_entry->peer_id,
  1307. DP_MOD_ID_RX_PPDU_STATS);
  1308. if (peer) {
  1309. if ((peer->peer_id != HTT_INVALID_PEER) &&
  1310. (peer->peer_based_pktlog_filter)) {
  1311. dp_wdi_event_handler(
  1312. WDI_EVENT_RX_DESC, soc,
  1313. status_nbuf,
  1314. peer->peer_id,
  1315. WDI_NO_VAL, pdev_id);
  1316. }
  1317. dp_peer_unref_delete(peer,
  1318. DP_MOD_ID_RX_PPDU_STATS);
  1319. }
  1320. }
  1321. }
  1322. }
  1323. #if defined(HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M)
  1324. static inline void
  1325. dp_rx_ul_ofdma_ru_size_to_width(
  1326. uint32_t ru_size,
  1327. uint32_t *ru_width)
  1328. {
  1329. uint32_t width;
  1330. width = 0;
  1331. switch (ru_size) {
  1332. case HTT_UL_OFDMA_V0_RU_SIZE_RU_26:
  1333. width = 1;
  1334. break;
  1335. case HTT_UL_OFDMA_V0_RU_SIZE_RU_52:
  1336. width = 2;
  1337. break;
  1338. case HTT_UL_OFDMA_V0_RU_SIZE_RU_106:
  1339. width = 4;
  1340. break;
  1341. case HTT_UL_OFDMA_V0_RU_SIZE_RU_242:
  1342. width = 9;
  1343. break;
  1344. case HTT_UL_OFDMA_V0_RU_SIZE_RU_484:
  1345. width = 18;
  1346. break;
  1347. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996:
  1348. width = 37;
  1349. break;
  1350. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2:
  1351. width = 74;
  1352. break;
  1353. default:
  1354. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1355. "RU size to width convert err");
  1356. break;
  1357. }
  1358. *ru_width = width;
  1359. }
  1360. static inline void
  1361. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1362. {
  1363. struct mon_rx_user_status *mon_rx_user_status;
  1364. uint32_t num_users;
  1365. uint32_t i;
  1366. uint32_t mu_ul_user_v0_word0;
  1367. uint32_t mu_ul_user_v0_word1;
  1368. uint32_t ru_width;
  1369. uint32_t ru_size;
  1370. if (!(ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_OFDMA ||
  1371. ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_MIMO))
  1372. return;
  1373. num_users = ppdu_info->com_info.num_users;
  1374. if (num_users > HAL_MAX_UL_MU_USERS)
  1375. num_users = HAL_MAX_UL_MU_USERS;
  1376. for (i = 0; i < num_users; i++) {
  1377. mon_rx_user_status = &ppdu_info->rx_user_status[i];
  1378. mu_ul_user_v0_word0 =
  1379. mon_rx_user_status->mu_ul_user_v0_word0;
  1380. mu_ul_user_v0_word1 =
  1381. mon_rx_user_status->mu_ul_user_v0_word1;
  1382. if (HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_GET(
  1383. mu_ul_user_v0_word0) &&
  1384. !HTT_UL_OFDMA_USER_INFO_V0_W0_VER_GET(
  1385. mu_ul_user_v0_word0)) {
  1386. mon_rx_user_status->mcs =
  1387. HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_GET(
  1388. mu_ul_user_v0_word1);
  1389. mon_rx_user_status->nss =
  1390. HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_GET(
  1391. mu_ul_user_v0_word1) + 1;
  1392. mon_rx_user_status->mu_ul_info_valid = 1;
  1393. mon_rx_user_status->ofdma_ru_start_index =
  1394. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_GET(
  1395. mu_ul_user_v0_word1);
  1396. ru_size =
  1397. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_GET(
  1398. mu_ul_user_v0_word1);
  1399. dp_rx_ul_ofdma_ru_size_to_width(ru_size, &ru_width);
  1400. mon_rx_user_status->ofdma_ru_width = ru_width;
  1401. mon_rx_user_status->ofdma_ru_size = ru_size;
  1402. }
  1403. }
  1404. }
  1405. #else
  1406. static inline void
  1407. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1408. {
  1409. }
  1410. #endif
  1411. /**
  1412. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  1413. * buffer on Rx status Queue posted by status SRNG processing.
  1414. * @soc: core txrx main context
  1415. * @int_ctx: interrupt context
  1416. * @mac_id: mac_id which is one of 3 mac_ids _ring
  1417. * @quota: amount of work which can be done
  1418. *
  1419. * Return: none
  1420. */
  1421. static inline void
  1422. dp_rx_mon_status_process_tlv(struct dp_soc *soc, struct dp_intr *int_ctx,
  1423. uint32_t mac_id, uint32_t quota)
  1424. {
  1425. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1426. struct hal_rx_ppdu_info *ppdu_info;
  1427. qdf_nbuf_t status_nbuf;
  1428. uint8_t *rx_tlv;
  1429. uint8_t *rx_tlv_start;
  1430. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  1431. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  1432. struct cdp_pdev_mon_stats *rx_mon_stats;
  1433. int smart_mesh_status;
  1434. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  1435. bool nbuf_used;
  1436. uint32_t rx_enh_capture_mode;
  1437. if (!pdev) {
  1438. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1439. "pdev is null for mac_id = %d", mac_id);
  1440. return;
  1441. }
  1442. ppdu_info = &pdev->ppdu_info;
  1443. rx_mon_stats = &pdev->rx_mon_stats;
  1444. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  1445. return;
  1446. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  1447. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  1448. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  1449. rx_tlv = qdf_nbuf_data(status_nbuf);
  1450. rx_tlv_start = rx_tlv;
  1451. nbuf_used = false;
  1452. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  1453. (pdev->mcopy_mode) || (dp_cfr_rcc_mode_status(pdev)) ||
  1454. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  1455. do {
  1456. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  1457. ppdu_info, pdev->soc->hal_soc,
  1458. status_nbuf);
  1459. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  1460. rx_mon_stats);
  1461. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  1462. status_nbuf, ppdu_info,
  1463. &nbuf_used);
  1464. dp_rx_mcopy_process_ppdu_info(pdev,
  1465. ppdu_info,
  1466. tlv_status);
  1467. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  1468. if ((rx_tlv - rx_tlv_start) >=
  1469. RX_MON_STATUS_BUF_SIZE)
  1470. break;
  1471. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  1472. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  1473. (tlv_status == HAL_TLV_STATUS_MPDU_END) ||
  1474. (tlv_status == HAL_TLV_STATUS_MSDU_END));
  1475. }
  1476. if (pdev->dp_peer_based_pktlog) {
  1477. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  1478. status_nbuf,
  1479. pdev->pdev_id);
  1480. } else {
  1481. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  1482. pktlog_mode = WDI_EVENT_RX_DESC;
  1483. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  1484. pktlog_mode = WDI_EVENT_LITE_RX;
  1485. if (pktlog_mode != WDI_NO_VAL)
  1486. dp_wdi_event_handler(pktlog_mode, soc,
  1487. status_nbuf,
  1488. HTT_INVALID_PEER,
  1489. WDI_NO_VAL, pdev->pdev_id);
  1490. }
  1491. /* smart monitor vap and m_copy cannot co-exist */
  1492. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  1493. && pdev->monitor_vdev) {
  1494. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  1495. pdev, ppdu_info, status_nbuf);
  1496. if (smart_mesh_status)
  1497. qdf_nbuf_free(status_nbuf);
  1498. } else if (qdf_unlikely(pdev->mcopy_mode)) {
  1499. dp_rx_process_mcopy_mode(soc, pdev,
  1500. ppdu_info, tlv_status,
  1501. status_nbuf);
  1502. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  1503. if (!nbuf_used)
  1504. qdf_nbuf_free(status_nbuf);
  1505. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  1506. enh_log_status =
  1507. dp_rx_handle_enh_capture(soc,
  1508. pdev, ppdu_info);
  1509. } else {
  1510. qdf_nbuf_free(status_nbuf);
  1511. }
  1512. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  1513. dp_rx_mon_deliver_non_std(soc, mac_id);
  1514. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  1515. rx_mon_stats->status_ppdu_done++;
  1516. dp_rx_mon_handle_mu_ul_info(ppdu_info);
  1517. if (pdev->tx_capture_enabled
  1518. != CDP_TX_ENH_CAPTURE_DISABLED)
  1519. dp_send_ack_frame_to_stack(soc, pdev,
  1520. ppdu_info);
  1521. if (pdev->enhanced_stats_en ||
  1522. pdev->mcopy_mode || pdev->neighbour_peers_added)
  1523. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  1524. else if (dp_cfr_rcc_mode_status(pdev))
  1525. dp_rx_handle_cfr(soc, pdev, ppdu_info);
  1526. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  1527. /*
  1528. * if chan_num is not fetched correctly from ppdu RX TLV,
  1529. * get it from pdev saved.
  1530. */
  1531. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_num == 0))
  1532. pdev->ppdu_info.rx_status.chan_num = pdev->mon_chan_num;
  1533. /*
  1534. * if chan_freq is not fetched correctly from ppdu RX TLV,
  1535. * get it from pdev saved.
  1536. */
  1537. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_freq == 0)) {
  1538. pdev->ppdu_info.rx_status.chan_freq =
  1539. pdev->mon_chan_freq;
  1540. }
  1541. if (!soc->full_mon_mode)
  1542. dp_rx_mon_dest_process(soc, int_ctx, mac_id,
  1543. quota);
  1544. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1545. }
  1546. }
  1547. return;
  1548. }
  1549. /*
  1550. * dp_rx_nbuf_prepare() - prepare RX nbuf
  1551. * @soc: core txrx main context
  1552. * @pdev: core txrx pdev context
  1553. *
  1554. * This function alloc & map nbuf for RX dma usage, retry it if failed
  1555. * until retry times reaches max threshold or succeeded.
  1556. *
  1557. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  1558. */
  1559. static inline qdf_nbuf_t
  1560. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  1561. {
  1562. uint8_t *buf;
  1563. int32_t nbuf_retry_count;
  1564. QDF_STATUS ret;
  1565. qdf_nbuf_t nbuf = NULL;
  1566. for (nbuf_retry_count = 0; nbuf_retry_count <
  1567. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  1568. nbuf_retry_count++) {
  1569. /* Allocate a new skb using alloc_skb */
  1570. nbuf = qdf_nbuf_alloc_no_recycler(RX_MON_STATUS_BUF_SIZE,
  1571. RX_BUFFER_RESERVATION,
  1572. RX_DATA_BUFFER_ALIGNMENT);
  1573. if (!nbuf) {
  1574. DP_STATS_INC(pdev, replenish.nbuf_alloc_fail, 1);
  1575. continue;
  1576. }
  1577. buf = qdf_nbuf_data(nbuf);
  1578. memset(buf, 0, RX_MON_STATUS_BUF_SIZE);
  1579. ret = qdf_nbuf_map_nbytes_single(soc->osdev, nbuf,
  1580. QDF_DMA_FROM_DEVICE,
  1581. RX_MON_STATUS_BUF_SIZE);
  1582. /* nbuf map failed */
  1583. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1584. qdf_nbuf_free(nbuf);
  1585. DP_STATS_INC(pdev, replenish.map_err, 1);
  1586. continue;
  1587. }
  1588. /* qdf_nbuf alloc and map succeeded */
  1589. break;
  1590. }
  1591. /* qdf_nbuf still alloc or map failed */
  1592. if (qdf_unlikely(nbuf_retry_count >=
  1593. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  1594. return NULL;
  1595. return nbuf;
  1596. }
  1597. /*
  1598. * dp_rx_mon_status_srng_process() - Process monitor status ring
  1599. * post the status ring buffer to Rx status Queue for later
  1600. * processing when status ring is filled with status TLV.
  1601. * Allocate a new buffer to status ring if the filled buffer
  1602. * is posted.
  1603. * @soc: core txrx main context
  1604. * @int_ctx: interrupt context
  1605. * @mac_id: mac_id which is one of 3 mac_ids
  1606. * @quota: No. of ring entry that can be serviced in one shot.
  1607. * Return: uint32_t: No. of ring entry that is processed.
  1608. */
  1609. static inline uint32_t
  1610. dp_rx_mon_status_srng_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1611. uint32_t mac_id, uint32_t quota)
  1612. {
  1613. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1614. hal_soc_handle_t hal_soc;
  1615. void *mon_status_srng;
  1616. void *rxdma_mon_status_ring_entry;
  1617. QDF_STATUS status;
  1618. uint32_t work_done = 0;
  1619. if (!pdev) {
  1620. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1621. "pdev is null for mac_id = %d", mac_id);
  1622. return work_done;
  1623. }
  1624. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  1625. qdf_assert(mon_status_srng);
  1626. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  1627. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1628. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  1629. __func__, __LINE__, mon_status_srng);
  1630. return work_done;
  1631. }
  1632. hal_soc = soc->hal_soc;
  1633. qdf_assert(hal_soc);
  1634. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, mon_status_srng)))
  1635. goto done;
  1636. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  1637. * BUFFER_ADDR_INFO STRUCT
  1638. */
  1639. while (qdf_likely((rxdma_mon_status_ring_entry =
  1640. hal_srng_src_peek_n_get_next(hal_soc, mon_status_srng))
  1641. && quota--)) {
  1642. uint32_t rx_buf_cookie;
  1643. qdf_nbuf_t status_nbuf;
  1644. struct dp_rx_desc *rx_desc;
  1645. uint8_t *status_buf;
  1646. qdf_dma_addr_t paddr;
  1647. uint64_t buf_addr;
  1648. struct rx_desc_pool *rx_desc_pool;
  1649. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1650. buf_addr =
  1651. (HAL_RX_BUFFER_ADDR_31_0_GET(
  1652. rxdma_mon_status_ring_entry) |
  1653. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  1654. rxdma_mon_status_ring_entry)) << 32));
  1655. if (qdf_likely(buf_addr)) {
  1656. rx_buf_cookie =
  1657. HAL_RX_BUF_COOKIE_GET(
  1658. rxdma_mon_status_ring_entry);
  1659. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  1660. rx_buf_cookie);
  1661. qdf_assert(rx_desc);
  1662. status_nbuf = rx_desc->nbuf;
  1663. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  1664. QDF_DMA_FROM_DEVICE);
  1665. status_buf = qdf_nbuf_data(status_nbuf);
  1666. status = hal_get_rx_status_done(status_buf);
  1667. if (status != QDF_STATUS_SUCCESS) {
  1668. uint32_t hp, tp;
  1669. hal_get_sw_hptp(hal_soc, mon_status_srng,
  1670. &tp, &hp);
  1671. dp_info_rl("tlv tag status error hp:%u, tp:%u",
  1672. hp, tp);
  1673. pdev->rx_mon_stats.tlv_tag_status_err++;
  1674. /* RxDMA status done bit might not be set even
  1675. * though tp is moved by HW.
  1676. * So Hold on to current entry on
  1677. * monitor status ring
  1678. */
  1679. /* If done status is missing, hold onto status
  1680. * ring until status is done for this status
  1681. * ring buffer.
  1682. * Keep HP in mon_status_ring unchanged,
  1683. * and break from here.
  1684. * Check status for same buffer for next time
  1685. * dp_rx_mon_status_srng_process
  1686. */
  1687. break;
  1688. }
  1689. qdf_nbuf_set_pktlen(status_nbuf,
  1690. RX_MON_STATUS_BUF_SIZE);
  1691. qdf_nbuf_unmap_nbytes_single(soc->osdev, status_nbuf,
  1692. QDF_DMA_FROM_DEVICE,
  1693. rx_desc_pool->buf_size);
  1694. /* Put the status_nbuf to queue */
  1695. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  1696. } else {
  1697. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1698. union dp_rx_desc_list_elem_t *tail = NULL;
  1699. uint32_t num_alloc_desc;
  1700. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  1701. rx_desc_pool,
  1702. 1,
  1703. &desc_list,
  1704. &tail);
  1705. /*
  1706. * No free descriptors available
  1707. */
  1708. if (qdf_unlikely(num_alloc_desc == 0)) {
  1709. work_done++;
  1710. break;
  1711. }
  1712. rx_desc = &desc_list->rx_desc;
  1713. }
  1714. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  1715. /*
  1716. * qdf_nbuf alloc or map failed,
  1717. * free the dp rx desc to free list,
  1718. * fill in NULL dma address at current HP entry,
  1719. * keep HP in mon_status_ring unchanged,
  1720. * wait next time dp_rx_mon_status_srng_process
  1721. * to fill in buffer at current HP.
  1722. */
  1723. if (qdf_unlikely(!status_nbuf)) {
  1724. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1725. union dp_rx_desc_list_elem_t *tail = NULL;
  1726. struct rx_desc_pool *rx_desc_pool;
  1727. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1728. dp_info_rl("fail to allocate or map qdf_nbuf");
  1729. dp_rx_add_to_free_desc_list(&desc_list,
  1730. &tail, rx_desc);
  1731. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  1732. &tail, mac_id, rx_desc_pool);
  1733. hal_rxdma_buff_addr_info_set(
  1734. rxdma_mon_status_ring_entry,
  1735. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  1736. work_done++;
  1737. break;
  1738. }
  1739. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  1740. rx_desc->nbuf = status_nbuf;
  1741. rx_desc->in_use = 1;
  1742. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  1743. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  1744. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1745. work_done++;
  1746. }
  1747. done:
  1748. dp_srng_access_end(int_ctx, soc, mon_status_srng);
  1749. return work_done;
  1750. }
  1751. uint32_t
  1752. dp_rx_mon_status_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1753. uint32_t mac_id, uint32_t quota)
  1754. {
  1755. uint32_t work_done;
  1756. work_done = dp_rx_mon_status_srng_process(soc, int_ctx, mac_id, quota);
  1757. quota -= work_done;
  1758. dp_rx_mon_status_process_tlv(soc, int_ctx, mac_id, quota);
  1759. return work_done;
  1760. }
  1761. #ifndef DISABLE_MON_CONFIG
  1762. uint32_t
  1763. dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1764. uint32_t mac_id, uint32_t quota)
  1765. {
  1766. if (qdf_unlikely(soc->full_mon_mode))
  1767. return dp_rx_mon_process(soc, int_ctx, mac_id, quota);
  1768. return dp_rx_mon_status_process(soc, int_ctx, mac_id, quota);
  1769. }
  1770. #else
  1771. uint32_t
  1772. dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1773. uint32_t mac_id, uint32_t quota)
  1774. {
  1775. return 0;
  1776. }
  1777. #endif
  1778. QDF_STATUS
  1779. dp_rx_pdev_mon_status_buffers_alloc(struct dp_pdev *pdev, uint32_t mac_id)
  1780. {
  1781. uint8_t pdev_id = pdev->pdev_id;
  1782. struct dp_soc *soc = pdev->soc;
  1783. struct dp_srng *mon_status_ring;
  1784. uint32_t num_entries;
  1785. struct rx_desc_pool *rx_desc_pool;
  1786. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1787. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1788. union dp_rx_desc_list_elem_t *tail = NULL;
  1789. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1790. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1791. num_entries = mon_status_ring->num_entries;
  1792. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1793. dp_debug("Mon RX Desc Pool[%d] entries=%u",
  1794. pdev_id, num_entries);
  1795. return dp_rx_mon_status_buffers_replenish(soc, mac_id, mon_status_ring,
  1796. rx_desc_pool, num_entries,
  1797. &desc_list, &tail,
  1798. HAL_RX_BUF_RBM_SW3_BM);
  1799. }
  1800. QDF_STATUS
  1801. dp_rx_pdev_mon_status_desc_pool_alloc(struct dp_pdev *pdev, uint32_t mac_id)
  1802. {
  1803. uint8_t pdev_id = pdev->pdev_id;
  1804. struct dp_soc *soc = pdev->soc;
  1805. struct dp_srng *mon_status_ring;
  1806. uint32_t num_entries;
  1807. struct rx_desc_pool *rx_desc_pool;
  1808. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1809. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1810. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1811. num_entries = mon_status_ring->num_entries;
  1812. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1813. dp_debug("Mon RX Desc Pool[%d] entries=%u", pdev_id, num_entries);
  1814. return dp_rx_desc_pool_alloc(soc, num_entries + 1, rx_desc_pool);
  1815. }
  1816. void
  1817. dp_rx_pdev_mon_status_desc_pool_init(struct dp_pdev *pdev, uint32_t mac_id)
  1818. {
  1819. uint32_t i;
  1820. uint8_t pdev_id = pdev->pdev_id;
  1821. struct dp_soc *soc = pdev->soc;
  1822. struct dp_srng *mon_status_ring;
  1823. uint32_t num_entries;
  1824. struct rx_desc_pool *rx_desc_pool;
  1825. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1826. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1827. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1828. num_entries = mon_status_ring->num_entries;
  1829. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1830. dp_debug("Mon RX Desc status Pool[%d] init entries=%u",
  1831. pdev_id, num_entries);
  1832. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  1833. rx_desc_pool->buf_size = RX_MON_STATUS_BUF_SIZE;
  1834. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  1835. /* Disable frag processing flag */
  1836. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  1837. dp_rx_desc_pool_init(soc, mac_id, num_entries + 1, rx_desc_pool);
  1838. qdf_nbuf_queue_init(&pdev->rx_status_q);
  1839. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1840. qdf_mem_zero(&pdev->ppdu_info, sizeof(pdev->ppdu_info));
  1841. /*
  1842. * Set last_ppdu_id to HAL_INVALID_PPDU_ID in order to avoid ppdu_id
  1843. * match with '0' ppdu_id from monitor status ring
  1844. */
  1845. pdev->ppdu_info.com_info.last_ppdu_id = HAL_INVALID_PPDU_ID;
  1846. qdf_mem_zero(&pdev->rx_mon_stats, sizeof(pdev->rx_mon_stats));
  1847. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  1848. &pdev->rx_mon_stats);
  1849. for (i = 0; i < MAX_MU_USERS; i++) {
  1850. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  1851. pdev->is_mpdu_hdr[i] = true;
  1852. }
  1853. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  1854. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  1855. }
  1856. void
  1857. dp_rx_pdev_mon_status_desc_pool_deinit(struct dp_pdev *pdev, uint32_t mac_id) {
  1858. uint8_t pdev_id = pdev->pdev_id;
  1859. struct dp_soc *soc = pdev->soc;
  1860. struct rx_desc_pool *rx_desc_pool;
  1861. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1862. dp_debug("Mon RX Desc status Pool[%d] deinit", pdev_id);
  1863. dp_rx_desc_pool_deinit(soc, rx_desc_pool);
  1864. }
  1865. void
  1866. dp_rx_pdev_mon_status_desc_pool_free(struct dp_pdev *pdev, uint32_t mac_id) {
  1867. uint8_t pdev_id = pdev->pdev_id;
  1868. struct dp_soc *soc = pdev->soc;
  1869. struct rx_desc_pool *rx_desc_pool;
  1870. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1871. dp_debug("Mon RX Status Desc Pool Free pdev[%d]", pdev_id);
  1872. dp_rx_desc_pool_free(soc, rx_desc_pool);
  1873. }
  1874. void
  1875. dp_rx_pdev_mon_status_buffers_free(struct dp_pdev *pdev, uint32_t mac_id)
  1876. {
  1877. uint8_t pdev_id = pdev->pdev_id;
  1878. struct dp_soc *soc = pdev->soc;
  1879. struct rx_desc_pool *rx_desc_pool;
  1880. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1881. dp_debug("Mon RX Status Desc Pool Free pdev[%d]", pdev_id);
  1882. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1883. }
  1884. /*
  1885. * dp_rx_buffers_replenish() - replenish monitor status ring with
  1886. * rx nbufs called during dp rx
  1887. * monitor status ring initialization
  1888. *
  1889. * @soc: core txrx main context
  1890. * @mac_id: mac_id which is one of 3 mac_ids
  1891. * @dp_rxdma_srng: dp monitor status circular ring
  1892. * @rx_desc_pool; Pointer to Rx descriptor pool
  1893. * @num_req_buffers: number of buffer to be replenished
  1894. * @desc_list: list of descs if called from dp rx monitor status
  1895. * process or NULL during dp rx initialization or
  1896. * out of buffer interrupt
  1897. * @tail: tail of descs list
  1898. * @owner: who owns the nbuf (host, NSS etc...)
  1899. * Return: return success or failure
  1900. */
  1901. static inline
  1902. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  1903. uint32_t mac_id,
  1904. struct dp_srng *dp_rxdma_srng,
  1905. struct rx_desc_pool *rx_desc_pool,
  1906. uint32_t num_req_buffers,
  1907. union dp_rx_desc_list_elem_t **desc_list,
  1908. union dp_rx_desc_list_elem_t **tail,
  1909. uint8_t owner)
  1910. {
  1911. uint32_t num_alloc_desc;
  1912. uint16_t num_desc_to_free = 0;
  1913. uint32_t num_entries_avail;
  1914. uint32_t count = 0;
  1915. int sync_hw_ptr = 1;
  1916. qdf_dma_addr_t paddr;
  1917. qdf_nbuf_t rx_netbuf;
  1918. void *rxdma_ring_entry;
  1919. union dp_rx_desc_list_elem_t *next;
  1920. void *rxdma_srng;
  1921. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  1922. if (!dp_pdev) {
  1923. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1924. "pdev is null for mac_id = %d", mac_id);
  1925. return QDF_STATUS_E_FAILURE;
  1926. }
  1927. rxdma_srng = dp_rxdma_srng->hal_srng;
  1928. qdf_assert(rxdma_srng);
  1929. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1930. "[%s][%d] requested %d buffers for replenish",
  1931. __func__, __LINE__, num_req_buffers);
  1932. /*
  1933. * if desc_list is NULL, allocate the descs from freelist
  1934. */
  1935. if (!(*desc_list)) {
  1936. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  1937. rx_desc_pool,
  1938. num_req_buffers,
  1939. desc_list,
  1940. tail);
  1941. if (!num_alloc_desc) {
  1942. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1943. "[%s][%d] no free rx_descs in freelist",
  1944. __func__, __LINE__);
  1945. return QDF_STATUS_E_NOMEM;
  1946. }
  1947. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1948. "[%s][%d] %d rx desc allocated", __func__, __LINE__,
  1949. num_alloc_desc);
  1950. num_req_buffers = num_alloc_desc;
  1951. }
  1952. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1953. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  1954. rxdma_srng, sync_hw_ptr);
  1955. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1956. "[%s][%d] no of available entries in rxdma ring: %d",
  1957. __func__, __LINE__, num_entries_avail);
  1958. if (num_entries_avail < num_req_buffers) {
  1959. num_desc_to_free = num_req_buffers - num_entries_avail;
  1960. num_req_buffers = num_entries_avail;
  1961. }
  1962. while (count <= num_req_buffers) {
  1963. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  1964. /*
  1965. * qdf_nbuf alloc or map failed,
  1966. * keep HP in mon_status_ring unchanged,
  1967. * wait dp_rx_mon_status_srng_process
  1968. * to fill in buffer at current HP.
  1969. */
  1970. if (qdf_unlikely(!rx_netbuf)) {
  1971. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1972. "%s: qdf_nbuf allocate or map fail, count %d",
  1973. __func__, count);
  1974. break;
  1975. }
  1976. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  1977. next = (*desc_list)->next;
  1978. rxdma_ring_entry = hal_srng_src_get_cur_hp_n_move_next(
  1979. dp_soc->hal_soc,
  1980. rxdma_srng);
  1981. if (qdf_unlikely(!rxdma_ring_entry)) {
  1982. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1983. "[%s][%d] rxdma_ring_entry is NULL, count - %d",
  1984. __func__, __LINE__, count);
  1985. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev, rx_netbuf,
  1986. QDF_DMA_FROM_DEVICE,
  1987. rx_desc_pool->buf_size);
  1988. qdf_nbuf_free(rx_netbuf);
  1989. break;
  1990. }
  1991. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  1992. (*desc_list)->rx_desc.in_use = 1;
  1993. count++;
  1994. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  1995. (*desc_list)->rx_desc.cookie, owner);
  1996. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1997. "[%s][%d] rx_desc=%pK, cookie=%d, nbuf=%pK, \
  1998. paddr=%pK",
  1999. __func__, __LINE__, &(*desc_list)->rx_desc,
  2000. (*desc_list)->rx_desc.cookie, rx_netbuf,
  2001. (void *)paddr);
  2002. *desc_list = next;
  2003. }
  2004. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2005. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2006. "successfully replenished %d buffers", num_req_buffers);
  2007. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  2008. "%d rx desc added back to free list", num_desc_to_free);
  2009. /*
  2010. * add any available free desc back to the free list
  2011. */
  2012. if (*desc_list) {
  2013. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  2014. mac_id, rx_desc_pool);
  2015. }
  2016. return QDF_STATUS_SUCCESS;
  2017. }