dp_rx.c 90 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #include "dp_hist.h"
  35. #include "dp_rx_buffer_pool.h"
  36. #ifdef ATH_RX_PRI_SAVE
  37. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  38. (qdf_nbuf_set_priority(_nbuf, _tid))
  39. #else
  40. #define DP_RX_TID_SAVE(_nbuf, _tid)
  41. #endif
  42. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  43. static inline
  44. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  45. {
  46. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  47. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  48. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  49. return false;
  50. }
  51. return true;
  52. }
  53. #else
  54. static inline
  55. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  56. {
  57. return true;
  58. }
  59. #endif
  60. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  61. {
  62. return vdev->ap_bridge_enabled;
  63. }
  64. #ifdef DUP_RX_DESC_WAR
  65. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  66. hal_ring_handle_t hal_ring,
  67. hal_ring_desc_t ring_desc,
  68. struct dp_rx_desc *rx_desc)
  69. {
  70. void *hal_soc = soc->hal_soc;
  71. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  72. dp_rx_desc_dump(rx_desc);
  73. }
  74. #else
  75. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  76. hal_ring_handle_t hal_ring_hdl,
  77. hal_ring_desc_t ring_desc,
  78. struct dp_rx_desc *rx_desc)
  79. {
  80. hal_soc_handle_t hal_soc = soc->hal_soc;
  81. dp_rx_desc_dump(rx_desc);
  82. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  83. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  84. qdf_assert_always(0);
  85. }
  86. #endif
  87. #ifdef RX_DESC_SANITY_WAR
  88. static inline
  89. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  90. hal_ring_handle_t hal_ring_hdl,
  91. hal_ring_desc_t ring_desc,
  92. struct dp_rx_desc *rx_desc)
  93. {
  94. uint8_t return_buffer_manager;
  95. if (qdf_unlikely(!rx_desc)) {
  96. /*
  97. * This is an unlikely case where the cookie obtained
  98. * from the ring_desc is invalid and hence we are not
  99. * able to find the corresponding rx_desc
  100. */
  101. goto fail;
  102. }
  103. return_buffer_manager = hal_rx_ret_buf_manager_get(ring_desc);
  104. if (qdf_unlikely(!(return_buffer_manager == HAL_RX_BUF_RBM_SW1_BM ||
  105. return_buffer_manager == HAL_RX_BUF_RBM_SW3_BM))) {
  106. goto fail;
  107. }
  108. return QDF_STATUS_SUCCESS;
  109. fail:
  110. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  111. dp_err("Ring Desc:");
  112. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  113. ring_desc);
  114. return QDF_STATUS_E_NULL_VALUE;
  115. }
  116. #else
  117. static inline
  118. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  119. hal_ring_handle_t hal_ring_hdl,
  120. hal_ring_desc_t ring_desc,
  121. struct dp_rx_desc *rx_desc)
  122. {
  123. return QDF_STATUS_SUCCESS;
  124. }
  125. #endif
  126. /**
  127. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  128. *
  129. * @dp_soc: struct dp_soc *
  130. * @nbuf_frag_info_t: nbuf frag info
  131. * @dp_pdev: struct dp_pdev *
  132. * @rx_desc_pool: Rx desc pool
  133. *
  134. * Return: QDF_STATUS
  135. */
  136. #ifdef DP_RX_MON_MEM_FRAG
  137. static inline QDF_STATUS
  138. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  139. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  140. struct dp_pdev *dp_pdev,
  141. struct rx_desc_pool *rx_desc_pool)
  142. {
  143. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  144. (nbuf_frag_info_t->virt_addr).vaddr =
  145. qdf_frag_alloc(rx_desc_pool->buf_size);
  146. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  147. dp_err("Frag alloc failed");
  148. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  149. return QDF_STATUS_E_NOMEM;
  150. }
  151. ret = qdf_mem_map_page(dp_soc->osdev,
  152. (nbuf_frag_info_t->virt_addr).vaddr,
  153. QDF_DMA_FROM_DEVICE,
  154. rx_desc_pool->buf_size,
  155. &nbuf_frag_info_t->paddr);
  156. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  157. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  158. dp_err("Frag map failed");
  159. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  160. return QDF_STATUS_E_FAULT;
  161. }
  162. return QDF_STATUS_SUCCESS;
  163. }
  164. #else
  165. static inline QDF_STATUS
  166. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  167. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  168. struct dp_pdev *dp_pdev,
  169. struct rx_desc_pool *rx_desc_pool)
  170. {
  171. return QDF_STATUS_SUCCESS;
  172. }
  173. #endif /* DP_RX_MON_MEM_FRAG */
  174. /**
  175. * dp_pdev_nbuf_alloc_and_map() - Allocate nbuf for desc buffer and map
  176. *
  177. * @dp_soc: struct dp_soc *
  178. * @mac_id: Mac id
  179. * @num_entries_avail: num_entries_avail
  180. * @nbuf_frag_info_t: nbuf frag info
  181. * @dp_pdev: struct dp_pdev *
  182. * @rx_desc_pool: Rx desc pool
  183. *
  184. * Return: QDF_STATUS
  185. */
  186. static inline QDF_STATUS
  187. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  188. uint32_t mac_id,
  189. uint32_t num_entries_avail,
  190. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  191. struct dp_pdev *dp_pdev,
  192. struct rx_desc_pool *rx_desc_pool)
  193. {
  194. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  195. (nbuf_frag_info_t->virt_addr).nbuf =
  196. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  197. mac_id,
  198. rx_desc_pool,
  199. num_entries_avail);
  200. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  201. dp_err("nbuf alloc failed");
  202. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  203. return QDF_STATUS_E_NOMEM;
  204. }
  205. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  206. (nbuf_frag_info_t->virt_addr).nbuf,
  207. QDF_DMA_FROM_DEVICE,
  208. rx_desc_pool->buf_size);
  209. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  210. dp_rx_buffer_pool_nbuf_free(dp_soc,
  211. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  212. dp_err("nbuf map failed");
  213. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  214. return QDF_STATUS_E_FAULT;
  215. }
  216. nbuf_frag_info_t->paddr =
  217. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  218. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc,
  219. (qdf_nbuf_t)((nbuf_frag_info_t->virt_addr).nbuf),
  220. rx_desc_pool->buf_size,
  221. true);
  222. ret = check_x86_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  223. &nbuf_frag_info_t->paddr,
  224. rx_desc_pool);
  225. if (ret == QDF_STATUS_E_FAILURE) {
  226. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  227. (nbuf_frag_info_t->virt_addr).nbuf,
  228. QDF_DMA_FROM_DEVICE,
  229. rx_desc_pool->buf_size);
  230. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  231. return QDF_STATUS_E_ADDRNOTAVAIL;
  232. }
  233. return QDF_STATUS_SUCCESS;
  234. }
  235. /*
  236. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  237. * called during dp rx initialization
  238. * and at the end of dp_rx_process.
  239. *
  240. * @soc: core txrx main context
  241. * @mac_id: mac_id which is one of 3 mac_ids
  242. * @dp_rxdma_srng: dp rxdma circular ring
  243. * @rx_desc_pool: Pointer to free Rx descriptor pool
  244. * @num_req_buffers: number of buffer to be replenished
  245. * @desc_list: list of descs if called from dp_rx_process
  246. * or NULL during dp rx initialization or out of buffer
  247. * interrupt.
  248. * @tail: tail of descs list
  249. * @func_name: name of the caller function
  250. * Return: return success or failure
  251. */
  252. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  253. struct dp_srng *dp_rxdma_srng,
  254. struct rx_desc_pool *rx_desc_pool,
  255. uint32_t num_req_buffers,
  256. union dp_rx_desc_list_elem_t **desc_list,
  257. union dp_rx_desc_list_elem_t **tail,
  258. const char *func_name)
  259. {
  260. uint32_t num_alloc_desc;
  261. uint16_t num_desc_to_free = 0;
  262. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  263. uint32_t num_entries_avail;
  264. uint32_t count;
  265. int sync_hw_ptr = 1;
  266. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  267. void *rxdma_ring_entry;
  268. union dp_rx_desc_list_elem_t *next;
  269. QDF_STATUS ret;
  270. void *rxdma_srng;
  271. rxdma_srng = dp_rxdma_srng->hal_srng;
  272. if (!rxdma_srng) {
  273. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  274. "rxdma srng not initialized");
  275. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  276. return QDF_STATUS_E_FAILURE;
  277. }
  278. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  279. "requested %d buffers for replenish", num_req_buffers);
  280. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  281. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  282. rxdma_srng,
  283. sync_hw_ptr);
  284. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  285. "no of available entries in rxdma ring: %d",
  286. num_entries_avail);
  287. if (!(*desc_list) && (num_entries_avail >
  288. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  289. num_req_buffers = num_entries_avail;
  290. } else if (num_entries_avail < num_req_buffers) {
  291. num_desc_to_free = num_req_buffers - num_entries_avail;
  292. num_req_buffers = num_entries_avail;
  293. }
  294. if (qdf_unlikely(!num_req_buffers)) {
  295. num_desc_to_free = num_req_buffers;
  296. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  297. goto free_descs;
  298. }
  299. /*
  300. * if desc_list is NULL, allocate the descs from freelist
  301. */
  302. if (!(*desc_list)) {
  303. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  304. rx_desc_pool,
  305. num_req_buffers,
  306. desc_list,
  307. tail);
  308. if (!num_alloc_desc) {
  309. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  310. "no free rx_descs in freelist");
  311. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  312. num_req_buffers);
  313. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  314. return QDF_STATUS_E_NOMEM;
  315. }
  316. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  317. "%d rx desc allocated", num_alloc_desc);
  318. num_req_buffers = num_alloc_desc;
  319. }
  320. count = 0;
  321. while (count < num_req_buffers) {
  322. /* Flag is set while pdev rx_desc_pool initialization */
  323. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  324. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  325. &nbuf_frag_info,
  326. dp_pdev,
  327. rx_desc_pool);
  328. else
  329. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  330. mac_id,
  331. num_entries_avail, &nbuf_frag_info,
  332. dp_pdev, rx_desc_pool);
  333. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  334. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  335. continue;
  336. break;
  337. }
  338. count++;
  339. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  340. rxdma_srng);
  341. qdf_assert_always(rxdma_ring_entry);
  342. next = (*desc_list)->next;
  343. /* Flag is set while pdev rx_desc_pool initialization */
  344. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  345. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  346. &nbuf_frag_info);
  347. else
  348. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  349. &nbuf_frag_info);
  350. /* rx_desc.in_use should be zero at this time*/
  351. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  352. (*desc_list)->rx_desc.in_use = 1;
  353. (*desc_list)->rx_desc.in_err_state = 0;
  354. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  355. func_name, RX_DESC_REPLENISHED);
  356. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  357. nbuf_frag_info.virt_addr.nbuf,
  358. (unsigned long long)(nbuf_frag_info.paddr),
  359. (*desc_list)->rx_desc.cookie);
  360. hal_rxdma_buff_addr_info_set(rxdma_ring_entry,
  361. nbuf_frag_info.paddr,
  362. (*desc_list)->rx_desc.cookie,
  363. rx_desc_pool->owner);
  364. *desc_list = next;
  365. }
  366. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  367. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  368. count, num_desc_to_free);
  369. /* No need to count the number of bytes received during replenish.
  370. * Therefore set replenish.pkts.bytes as 0.
  371. */
  372. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  373. free_descs:
  374. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  375. /*
  376. * add any available free desc back to the free list
  377. */
  378. if (*desc_list)
  379. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  380. mac_id, rx_desc_pool);
  381. return QDF_STATUS_SUCCESS;
  382. }
  383. /*
  384. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  385. * pkts to RAW mode simulation to
  386. * decapsulate the pkt.
  387. *
  388. * @vdev: vdev on which RAW mode is enabled
  389. * @nbuf_list: list of RAW pkts to process
  390. * @peer: peer object from which the pkt is rx
  391. *
  392. * Return: void
  393. */
  394. void
  395. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  396. struct dp_peer *peer)
  397. {
  398. qdf_nbuf_t deliver_list_head = NULL;
  399. qdf_nbuf_t deliver_list_tail = NULL;
  400. qdf_nbuf_t nbuf;
  401. nbuf = nbuf_list;
  402. while (nbuf) {
  403. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  404. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  405. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  406. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  407. /*
  408. * reset the chfrag_start and chfrag_end bits in nbuf cb
  409. * as this is a non-amsdu pkt and RAW mode simulation expects
  410. * these bit s to be 0 for non-amsdu pkt.
  411. */
  412. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  413. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  414. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  415. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  416. }
  417. nbuf = next;
  418. }
  419. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  420. &deliver_list_tail, peer->mac_addr.raw);
  421. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  422. }
  423. #ifdef DP_LFR
  424. /*
  425. * In case of LFR, data of a new peer might be sent up
  426. * even before peer is added.
  427. */
  428. static inline struct dp_vdev *
  429. dp_get_vdev_from_peer(struct dp_soc *soc,
  430. uint16_t peer_id,
  431. struct dp_peer *peer,
  432. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  433. {
  434. struct dp_vdev *vdev;
  435. uint8_t vdev_id;
  436. if (unlikely(!peer)) {
  437. if (peer_id != HTT_INVALID_PEER) {
  438. vdev_id = DP_PEER_METADATA_VDEV_ID_GET(
  439. mpdu_desc_info.peer_meta_data);
  440. QDF_TRACE(QDF_MODULE_ID_DP,
  441. QDF_TRACE_LEVEL_DEBUG,
  442. FL("PeerID %d not found use vdevID %d"),
  443. peer_id, vdev_id);
  444. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  445. vdev_id);
  446. } else {
  447. QDF_TRACE(QDF_MODULE_ID_DP,
  448. QDF_TRACE_LEVEL_DEBUG,
  449. FL("Invalid PeerID %d"),
  450. peer_id);
  451. return NULL;
  452. }
  453. } else {
  454. vdev = peer->vdev;
  455. }
  456. return vdev;
  457. }
  458. #else
  459. static inline struct dp_vdev *
  460. dp_get_vdev_from_peer(struct dp_soc *soc,
  461. uint16_t peer_id,
  462. struct dp_peer *peer,
  463. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  464. {
  465. if (unlikely(!peer)) {
  466. QDF_TRACE(QDF_MODULE_ID_DP,
  467. QDF_TRACE_LEVEL_DEBUG,
  468. FL("Peer not found for peerID %d"),
  469. peer_id);
  470. return NULL;
  471. } else {
  472. return peer->vdev;
  473. }
  474. }
  475. #endif
  476. #ifndef FEATURE_WDS
  477. static void
  478. dp_rx_da_learn(struct dp_soc *soc,
  479. uint8_t *rx_tlv_hdr,
  480. struct dp_peer *ta_peer,
  481. qdf_nbuf_t nbuf)
  482. {
  483. }
  484. #endif
  485. /*
  486. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  487. *
  488. * @soc: core txrx main context
  489. * @ta_peer : source peer entry
  490. * @rx_tlv_hdr : start address of rx tlvs
  491. * @nbuf : nbuf that has to be intrabss forwarded
  492. *
  493. * Return: bool: true if it is forwarded else false
  494. */
  495. static bool
  496. dp_rx_intrabss_fwd(struct dp_soc *soc,
  497. struct dp_peer *ta_peer,
  498. uint8_t *rx_tlv_hdr,
  499. qdf_nbuf_t nbuf,
  500. struct hal_rx_msdu_metadata msdu_metadata)
  501. {
  502. uint16_t len;
  503. uint8_t is_frag;
  504. uint16_t da_peer_id = HTT_INVALID_PEER;
  505. struct dp_peer *da_peer = NULL;
  506. bool is_da_bss_peer = false;
  507. struct dp_ast_entry *ast_entry;
  508. qdf_nbuf_t nbuf_copy;
  509. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  510. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  511. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  512. tid_stats.tid_rx_stats[ring_id][tid];
  513. /* check if the destination peer is available in peer table
  514. * and also check if the source peer and destination peer
  515. * belong to the same vap and destination peer is not bss peer.
  516. */
  517. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  518. ast_entry = soc->ast_table[msdu_metadata.da_idx];
  519. if (!ast_entry)
  520. return false;
  521. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  522. ast_entry->is_active = TRUE;
  523. return false;
  524. }
  525. da_peer_id = ast_entry->peer_id;
  526. if (da_peer_id == HTT_INVALID_PEER)
  527. return false;
  528. /* TA peer cannot be same as peer(DA) on which AST is present
  529. * this indicates a change in topology and that AST entries
  530. * are yet to be updated.
  531. */
  532. if (da_peer_id == ta_peer->peer_id)
  533. return false;
  534. if (ast_entry->vdev_id != ta_peer->vdev->vdev_id)
  535. return false;
  536. da_peer = dp_peer_get_ref_by_id(soc, da_peer_id,
  537. DP_MOD_ID_RX);
  538. if (!da_peer)
  539. return false;
  540. is_da_bss_peer = da_peer->bss_peer;
  541. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  542. if (!is_da_bss_peer) {
  543. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  544. is_frag = qdf_nbuf_is_frag(nbuf);
  545. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  546. /* If the source or destination peer in the isolation
  547. * list then dont forward instead push to bridge stack.
  548. */
  549. if (dp_get_peer_isolation(ta_peer) ||
  550. dp_get_peer_isolation(da_peer))
  551. return false;
  552. /* linearize the nbuf just before we send to
  553. * dp_tx_send()
  554. */
  555. if (qdf_unlikely(is_frag)) {
  556. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  557. return false;
  558. nbuf = qdf_nbuf_unshare(nbuf);
  559. if (!nbuf) {
  560. DP_STATS_INC_PKT(ta_peer,
  561. rx.intra_bss.fail,
  562. 1,
  563. len);
  564. /* return true even though the pkt is
  565. * not forwarded. Basically skb_unshare
  566. * failed and we want to continue with
  567. * next nbuf.
  568. */
  569. tid_stats->fail_cnt[INTRABSS_DROP]++;
  570. return true;
  571. }
  572. }
  573. if (!dp_tx_send((struct cdp_soc_t *)soc,
  574. ta_peer->vdev->vdev_id, nbuf)) {
  575. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  576. len);
  577. return true;
  578. } else {
  579. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  580. len);
  581. tid_stats->fail_cnt[INTRABSS_DROP]++;
  582. return false;
  583. }
  584. }
  585. }
  586. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  587. * source, then clone the pkt and send the cloned pkt for
  588. * intra BSS forwarding and original pkt up the network stack
  589. * Note: how do we handle multicast pkts. do we forward
  590. * all multicast pkts as is or let a higher layer module
  591. * like igmpsnoop decide whether to forward or not with
  592. * Mcast enhancement.
  593. */
  594. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  595. !ta_peer->bss_peer))) {
  596. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  597. goto end;
  598. /* If the source peer in the isolation list
  599. * then dont forward instead push to bridge stack
  600. */
  601. if (dp_get_peer_isolation(ta_peer))
  602. goto end;
  603. nbuf_copy = qdf_nbuf_copy(nbuf);
  604. if (!nbuf_copy)
  605. goto end;
  606. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  607. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  608. /* Set cb->ftype to intrabss FWD */
  609. qdf_nbuf_set_tx_ftype(nbuf_copy, CB_FTYPE_INTRABSS_FWD);
  610. if (dp_tx_send((struct cdp_soc_t *)soc,
  611. ta_peer->vdev->vdev_id, nbuf_copy)) {
  612. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  613. tid_stats->fail_cnt[INTRABSS_DROP]++;
  614. qdf_nbuf_free(nbuf_copy);
  615. } else {
  616. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  617. tid_stats->intrabss_cnt++;
  618. }
  619. }
  620. end:
  621. /* return false as we have to still send the original pkt
  622. * up the stack
  623. */
  624. return false;
  625. }
  626. #ifdef MESH_MODE_SUPPORT
  627. /**
  628. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  629. *
  630. * @vdev: DP Virtual device handle
  631. * @nbuf: Buffer pointer
  632. * @rx_tlv_hdr: start of rx tlv header
  633. * @peer: pointer to peer
  634. *
  635. * This function allocated memory for mesh receive stats and fill the
  636. * required stats. Stores the memory address in skb cb.
  637. *
  638. * Return: void
  639. */
  640. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  641. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  642. {
  643. struct mesh_recv_hdr_s *rx_info = NULL;
  644. uint32_t pkt_type;
  645. uint32_t nss;
  646. uint32_t rate_mcs;
  647. uint32_t bw;
  648. uint8_t primary_chan_num;
  649. uint32_t center_chan_freq;
  650. struct dp_soc *soc;
  651. /* fill recv mesh stats */
  652. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  653. /* upper layers are resposible to free this memory */
  654. if (!rx_info) {
  655. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  656. "Memory allocation failed for mesh rx stats");
  657. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  658. return;
  659. }
  660. rx_info->rs_flags = MESH_RXHDR_VER1;
  661. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  662. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  663. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  664. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  665. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  666. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  667. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  668. if (vdev->osif_get_key)
  669. vdev->osif_get_key(vdev->osif_vdev,
  670. &rx_info->rs_decryptkey[0],
  671. &peer->mac_addr.raw[0],
  672. rx_info->rs_keyix);
  673. }
  674. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  675. soc = vdev->pdev->soc;
  676. primary_chan_num = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  677. center_chan_freq = hal_rx_msdu_start_get_freq(rx_tlv_hdr) >> 16;
  678. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  679. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  680. soc->ctrl_psoc,
  681. vdev->pdev->pdev_id,
  682. center_chan_freq);
  683. }
  684. rx_info->rs_channel = primary_chan_num;
  685. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  686. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  687. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  688. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  689. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  690. (bw << 24);
  691. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  692. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  693. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  694. rx_info->rs_flags,
  695. rx_info->rs_rssi,
  696. rx_info->rs_channel,
  697. rx_info->rs_ratephy1,
  698. rx_info->rs_keyix);
  699. }
  700. /**
  701. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  702. *
  703. * @vdev: DP Virtual device handle
  704. * @nbuf: Buffer pointer
  705. * @rx_tlv_hdr: start of rx tlv header
  706. *
  707. * This checks if the received packet is matching any filter out
  708. * catogery and and drop the packet if it matches.
  709. *
  710. * Return: status(0 indicates drop, 1 indicate to no drop)
  711. */
  712. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  713. uint8_t *rx_tlv_hdr)
  714. {
  715. union dp_align_mac_addr mac_addr;
  716. struct dp_soc *soc = vdev->pdev->soc;
  717. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  718. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  719. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  720. rx_tlv_hdr))
  721. return QDF_STATUS_SUCCESS;
  722. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  723. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  724. rx_tlv_hdr))
  725. return QDF_STATUS_SUCCESS;
  726. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  727. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  728. rx_tlv_hdr) &&
  729. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  730. rx_tlv_hdr))
  731. return QDF_STATUS_SUCCESS;
  732. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  733. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  734. rx_tlv_hdr,
  735. &mac_addr.raw[0]))
  736. return QDF_STATUS_E_FAILURE;
  737. if (!qdf_mem_cmp(&mac_addr.raw[0],
  738. &vdev->mac_addr.raw[0],
  739. QDF_MAC_ADDR_SIZE))
  740. return QDF_STATUS_SUCCESS;
  741. }
  742. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  743. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  744. rx_tlv_hdr,
  745. &mac_addr.raw[0]))
  746. return QDF_STATUS_E_FAILURE;
  747. if (!qdf_mem_cmp(&mac_addr.raw[0],
  748. &vdev->mac_addr.raw[0],
  749. QDF_MAC_ADDR_SIZE))
  750. return QDF_STATUS_SUCCESS;
  751. }
  752. }
  753. return QDF_STATUS_E_FAILURE;
  754. }
  755. #else
  756. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  757. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  758. {
  759. }
  760. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  761. uint8_t *rx_tlv_hdr)
  762. {
  763. return QDF_STATUS_E_FAILURE;
  764. }
  765. #endif
  766. #ifdef FEATURE_NAC_RSSI
  767. /**
  768. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  769. * clients
  770. * @pdev: DP pdev handle
  771. * @rx_pkt_hdr: Rx packet Header
  772. *
  773. * return: dp_vdev*
  774. */
  775. static
  776. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  777. uint8_t *rx_pkt_hdr)
  778. {
  779. struct ieee80211_frame *wh;
  780. struct dp_neighbour_peer *peer = NULL;
  781. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  782. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  783. return NULL;
  784. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  785. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  786. neighbour_peer_list_elem) {
  787. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  788. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  789. QDF_TRACE(
  790. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  791. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  792. peer->neighbour_peers_macaddr.raw[0],
  793. peer->neighbour_peers_macaddr.raw[1],
  794. peer->neighbour_peers_macaddr.raw[2],
  795. peer->neighbour_peers_macaddr.raw[3],
  796. peer->neighbour_peers_macaddr.raw[4],
  797. peer->neighbour_peers_macaddr.raw[5]);
  798. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  799. return pdev->monitor_vdev;
  800. }
  801. }
  802. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  803. return NULL;
  804. }
  805. /**
  806. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  807. * @soc: DP SOC handle
  808. * @mpdu: mpdu for which peer is invalid
  809. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  810. * pool_id has same mapping)
  811. *
  812. * return: integer type
  813. */
  814. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  815. uint8_t mac_id)
  816. {
  817. struct dp_invalid_peer_msg msg;
  818. struct dp_vdev *vdev = NULL;
  819. struct dp_pdev *pdev = NULL;
  820. struct ieee80211_frame *wh;
  821. qdf_nbuf_t curr_nbuf, next_nbuf;
  822. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  823. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  824. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  825. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  826. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  827. "Drop decapped frames");
  828. goto free;
  829. }
  830. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  831. if (!DP_FRAME_IS_DATA(wh)) {
  832. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  833. "NAWDS valid only for data frames");
  834. goto free;
  835. }
  836. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  837. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  838. "Invalid nbuf length");
  839. goto free;
  840. }
  841. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  842. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  843. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  844. "PDEV %s", !pdev ? "not found" : "down");
  845. goto free;
  846. }
  847. if (pdev->filter_neighbour_peers) {
  848. /* Next Hop scenario not yet handle */
  849. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  850. if (vdev) {
  851. dp_rx_mon_deliver(soc, pdev->pdev_id,
  852. pdev->invalid_peer_head_msdu,
  853. pdev->invalid_peer_tail_msdu);
  854. pdev->invalid_peer_head_msdu = NULL;
  855. pdev->invalid_peer_tail_msdu = NULL;
  856. return 0;
  857. }
  858. }
  859. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  860. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  861. QDF_MAC_ADDR_SIZE) == 0) {
  862. goto out;
  863. }
  864. }
  865. if (!vdev) {
  866. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  867. "VDEV not found");
  868. goto free;
  869. }
  870. out:
  871. msg.wh = wh;
  872. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  873. msg.nbuf = mpdu;
  874. msg.vdev_id = vdev->vdev_id;
  875. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  876. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  877. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  878. pdev->pdev_id, &msg);
  879. free:
  880. /* Drop and free packet */
  881. curr_nbuf = mpdu;
  882. while (curr_nbuf) {
  883. next_nbuf = qdf_nbuf_next(curr_nbuf);
  884. qdf_nbuf_free(curr_nbuf);
  885. curr_nbuf = next_nbuf;
  886. }
  887. return 0;
  888. }
  889. /**
  890. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  891. * @soc: DP SOC handle
  892. * @mpdu: mpdu for which peer is invalid
  893. * @mpdu_done: if an mpdu is completed
  894. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  895. * pool_id has same mapping)
  896. *
  897. * return: integer type
  898. */
  899. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  900. qdf_nbuf_t mpdu, bool mpdu_done,
  901. uint8_t mac_id)
  902. {
  903. /* Only trigger the process when mpdu is completed */
  904. if (mpdu_done)
  905. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  906. }
  907. #else
  908. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  909. uint8_t mac_id)
  910. {
  911. qdf_nbuf_t curr_nbuf, next_nbuf;
  912. struct dp_pdev *pdev;
  913. struct dp_vdev *vdev = NULL;
  914. struct ieee80211_frame *wh;
  915. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  916. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  917. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  918. if (!DP_FRAME_IS_DATA(wh)) {
  919. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  920. "only for data frames");
  921. goto free;
  922. }
  923. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  924. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  925. "Invalid nbuf length");
  926. goto free;
  927. }
  928. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  929. if (!pdev) {
  930. QDF_TRACE(QDF_MODULE_ID_DP,
  931. QDF_TRACE_LEVEL_ERROR,
  932. "PDEV not found");
  933. goto free;
  934. }
  935. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  936. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  937. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  938. QDF_MAC_ADDR_SIZE) == 0) {
  939. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  940. goto out;
  941. }
  942. }
  943. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  944. if (!vdev) {
  945. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  946. "VDEV not found");
  947. goto free;
  948. }
  949. out:
  950. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  951. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  952. free:
  953. /* reset the head and tail pointers */
  954. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  955. if (pdev) {
  956. pdev->invalid_peer_head_msdu = NULL;
  957. pdev->invalid_peer_tail_msdu = NULL;
  958. }
  959. /* Drop and free packet */
  960. curr_nbuf = mpdu;
  961. while (curr_nbuf) {
  962. next_nbuf = qdf_nbuf_next(curr_nbuf);
  963. qdf_nbuf_free(curr_nbuf);
  964. curr_nbuf = next_nbuf;
  965. }
  966. /* Reset the head and tail pointers */
  967. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  968. if (pdev) {
  969. pdev->invalid_peer_head_msdu = NULL;
  970. pdev->invalid_peer_tail_msdu = NULL;
  971. }
  972. return 0;
  973. }
  974. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  975. qdf_nbuf_t mpdu, bool mpdu_done,
  976. uint8_t mac_id)
  977. {
  978. /* Process the nbuf */
  979. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  980. }
  981. #endif
  982. #ifdef RECEIVE_OFFLOAD
  983. /**
  984. * dp_rx_print_offload_info() - Print offload info from RX TLV
  985. * @soc: dp soc handle
  986. * @rx_tlv: RX TLV for which offload information is to be printed
  987. *
  988. * Return: None
  989. */
  990. static void dp_rx_print_offload_info(struct dp_soc *soc, uint8_t *rx_tlv)
  991. {
  992. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  993. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  994. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  995. dp_verbose_debug("chksum 0x%x", hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  996. rx_tlv));
  997. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  998. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  999. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  1000. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  1001. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  1002. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  1003. dp_verbose_debug("---------------------------------------------------------");
  1004. }
  1005. /**
  1006. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  1007. * @soc: DP SOC handle
  1008. * @rx_tlv: RX TLV received for the msdu
  1009. * @msdu: msdu for which GRO info needs to be filled
  1010. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  1011. *
  1012. * Return: None
  1013. */
  1014. static
  1015. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1016. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1017. {
  1018. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  1019. return;
  1020. /* Filling up RX offload info only for TCP packets */
  1021. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  1022. return;
  1023. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  1024. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  1025. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  1026. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  1027. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  1028. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  1029. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  1030. rx_tlv);
  1031. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  1032. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  1033. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  1034. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  1035. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  1036. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  1037. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  1038. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  1039. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  1040. HAL_RX_TLV_GET_IPV6(rx_tlv);
  1041. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  1042. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  1043. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  1044. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  1045. dp_rx_print_offload_info(soc, rx_tlv);
  1046. }
  1047. #else
  1048. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1049. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1050. {
  1051. }
  1052. #endif /* RECEIVE_OFFLOAD */
  1053. /**
  1054. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1055. *
  1056. * @nbuf: pointer to msdu.
  1057. * @mpdu_len: mpdu length
  1058. *
  1059. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  1060. */
  1061. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  1062. {
  1063. bool last_nbuf;
  1064. if (*mpdu_len > (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  1065. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1066. last_nbuf = false;
  1067. } else {
  1068. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  1069. last_nbuf = true;
  1070. }
  1071. *mpdu_len -= (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  1072. return last_nbuf;
  1073. }
  1074. /**
  1075. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  1076. * multiple nbufs.
  1077. * @nbuf: pointer to the first msdu of an amsdu.
  1078. *
  1079. * This function implements the creation of RX frag_list for cases
  1080. * where an MSDU is spread across multiple nbufs.
  1081. *
  1082. * Return: returns the head nbuf which contains complete frag_list.
  1083. */
  1084. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf)
  1085. {
  1086. qdf_nbuf_t parent, frag_list, next = NULL;
  1087. uint16_t frag_list_len = 0;
  1088. uint16_t mpdu_len;
  1089. bool last_nbuf;
  1090. /*
  1091. * Use msdu len got from REO entry descriptor instead since
  1092. * there is case the RX PKT TLV is corrupted while msdu_len
  1093. * from REO descriptor is right for non-raw RX scatter msdu.
  1094. */
  1095. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1096. /*
  1097. * this is a case where the complete msdu fits in one single nbuf.
  1098. * in this case HW sets both start and end bit and we only need to
  1099. * reset these bits for RAW mode simulator to decap the pkt
  1100. */
  1101. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1102. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1103. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  1104. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1105. return nbuf;
  1106. }
  1107. /*
  1108. * This is a case where we have multiple msdus (A-MSDU) spread across
  1109. * multiple nbufs. here we create a fraglist out of these nbufs.
  1110. *
  1111. * the moment we encounter a nbuf with continuation bit set we
  1112. * know for sure we have an MSDU which is spread across multiple
  1113. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1114. */
  1115. parent = nbuf;
  1116. frag_list = nbuf->next;
  1117. nbuf = nbuf->next;
  1118. /*
  1119. * set the start bit in the first nbuf we encounter with continuation
  1120. * bit set. This has the proper mpdu length set as it is the first
  1121. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1122. * nbufs will form the frag_list of the parent nbuf.
  1123. */
  1124. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1125. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  1126. /*
  1127. * this is where we set the length of the fragments which are
  1128. * associated to the parent nbuf. We iterate through the frag_list
  1129. * till we hit the last_nbuf of the list.
  1130. */
  1131. do {
  1132. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  1133. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1134. frag_list_len += qdf_nbuf_len(nbuf);
  1135. if (last_nbuf) {
  1136. next = nbuf->next;
  1137. nbuf->next = NULL;
  1138. break;
  1139. }
  1140. nbuf = nbuf->next;
  1141. } while (!last_nbuf);
  1142. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1143. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1144. parent->next = next;
  1145. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  1146. return parent;
  1147. }
  1148. #ifdef QCA_PEER_EXT_STATS
  1149. /*
  1150. * dp_rx_compute_tid_delay - Computer per TID delay stats
  1151. * @peer: DP soc context
  1152. * @nbuf: NBuffer
  1153. *
  1154. * Return: Void
  1155. */
  1156. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1157. qdf_nbuf_t nbuf)
  1158. {
  1159. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1160. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1161. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1162. }
  1163. #endif /* QCA_PEER_EXT_STATS */
  1164. /**
  1165. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1166. * to pass in correct fields
  1167. *
  1168. * @vdev: pdev handle
  1169. * @tx_desc: tx descriptor
  1170. * @tid: tid value
  1171. * Return: none
  1172. */
  1173. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1174. {
  1175. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1176. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1177. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1178. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1179. uint32_t interframe_delay =
  1180. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1181. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  1182. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1183. /*
  1184. * Update interframe delay stats calculated at deliver_data_ol point.
  1185. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1186. * interframe delay will not be calculate correctly for 1st frame.
  1187. * On the other side, this will help in avoiding extra per packet check
  1188. * of vdev->prev_rx_deliver_tstamp.
  1189. */
  1190. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1191. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1192. vdev->prev_rx_deliver_tstamp = current_ts;
  1193. }
  1194. /**
  1195. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1196. * @pdev: dp pdev reference
  1197. * @buf_list: buffer list to be dropepd
  1198. *
  1199. * Return: int (number of bufs dropped)
  1200. */
  1201. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1202. qdf_nbuf_t buf_list)
  1203. {
  1204. struct cdp_tid_rx_stats *stats = NULL;
  1205. uint8_t tid = 0, ring_id = 0;
  1206. int num_dropped = 0;
  1207. qdf_nbuf_t buf, next_buf;
  1208. buf = buf_list;
  1209. while (buf) {
  1210. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1211. next_buf = qdf_nbuf_queue_next(buf);
  1212. tid = qdf_nbuf_get_tid_val(buf);
  1213. if (qdf_likely(pdev)) {
  1214. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1215. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1216. stats->delivered_to_stack--;
  1217. }
  1218. qdf_nbuf_free(buf);
  1219. buf = next_buf;
  1220. num_dropped++;
  1221. }
  1222. return num_dropped;
  1223. }
  1224. #ifdef PEER_CACHE_RX_PKTS
  1225. /**
  1226. * dp_rx_flush_rx_cached() - flush cached rx frames
  1227. * @peer: peer
  1228. * @drop: flag to drop frames or forward to net stack
  1229. *
  1230. * Return: None
  1231. */
  1232. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1233. {
  1234. struct dp_peer_cached_bufq *bufqi;
  1235. struct dp_rx_cached_buf *cache_buf = NULL;
  1236. ol_txrx_rx_fp data_rx = NULL;
  1237. int num_buff_elem;
  1238. QDF_STATUS status;
  1239. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1240. qdf_atomic_dec(&peer->flush_in_progress);
  1241. return;
  1242. }
  1243. qdf_spin_lock_bh(&peer->peer_info_lock);
  1244. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1245. data_rx = peer->vdev->osif_rx;
  1246. else
  1247. drop = true;
  1248. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1249. bufqi = &peer->bufq_info;
  1250. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1251. qdf_list_remove_front(&bufqi->cached_bufq,
  1252. (qdf_list_node_t **)&cache_buf);
  1253. while (cache_buf) {
  1254. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1255. cache_buf->buf);
  1256. bufqi->entries -= num_buff_elem;
  1257. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1258. if (drop) {
  1259. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1260. cache_buf->buf);
  1261. } else {
  1262. /* Flush the cached frames to OSIF DEV */
  1263. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1264. if (status != QDF_STATUS_SUCCESS)
  1265. bufqi->dropped = dp_rx_drop_nbuf_list(
  1266. peer->vdev->pdev,
  1267. cache_buf->buf);
  1268. }
  1269. qdf_mem_free(cache_buf);
  1270. cache_buf = NULL;
  1271. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1272. qdf_list_remove_front(&bufqi->cached_bufq,
  1273. (qdf_list_node_t **)&cache_buf);
  1274. }
  1275. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1276. qdf_atomic_dec(&peer->flush_in_progress);
  1277. }
  1278. /**
  1279. * dp_rx_enqueue_rx() - cache rx frames
  1280. * @peer: peer
  1281. * @rx_buf_list: cache buffer list
  1282. *
  1283. * Return: None
  1284. */
  1285. static QDF_STATUS
  1286. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1287. {
  1288. struct dp_rx_cached_buf *cache_buf;
  1289. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1290. int num_buff_elem;
  1291. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1292. bufqi->dropped);
  1293. if (!peer->valid) {
  1294. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1295. rx_buf_list);
  1296. return QDF_STATUS_E_INVAL;
  1297. }
  1298. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1299. if (bufqi->entries >= bufqi->thresh) {
  1300. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1301. rx_buf_list);
  1302. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1303. return QDF_STATUS_E_RESOURCES;
  1304. }
  1305. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1306. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1307. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1308. if (!cache_buf) {
  1309. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1310. "Failed to allocate buf to cache rx frames");
  1311. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1312. rx_buf_list);
  1313. return QDF_STATUS_E_NOMEM;
  1314. }
  1315. cache_buf->buf = rx_buf_list;
  1316. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1317. qdf_list_insert_back(&bufqi->cached_bufq,
  1318. &cache_buf->node);
  1319. bufqi->entries += num_buff_elem;
  1320. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1321. return QDF_STATUS_SUCCESS;
  1322. }
  1323. static inline
  1324. bool dp_rx_is_peer_cache_bufq_supported(void)
  1325. {
  1326. return true;
  1327. }
  1328. #else
  1329. static inline
  1330. bool dp_rx_is_peer_cache_bufq_supported(void)
  1331. {
  1332. return false;
  1333. }
  1334. static inline QDF_STATUS
  1335. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1336. {
  1337. return QDF_STATUS_SUCCESS;
  1338. }
  1339. #endif
  1340. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1341. /**
  1342. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1343. * using the appropriate call back functions.
  1344. * @soc: soc
  1345. * @vdev: vdev
  1346. * @peer: peer
  1347. * @nbuf_head: skb list head
  1348. * @nbuf_tail: skb list tail
  1349. *
  1350. * Return: None
  1351. */
  1352. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1353. struct dp_vdev *vdev,
  1354. struct dp_peer *peer,
  1355. qdf_nbuf_t nbuf_head)
  1356. {
  1357. /* Function pointer initialized only when FISA is enabled */
  1358. if (vdev->osif_fisa_rx)
  1359. /* on failure send it via regular path */
  1360. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1361. else
  1362. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1363. }
  1364. #else
  1365. /**
  1366. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1367. * using the appropriate call back functions.
  1368. * @soc: soc
  1369. * @vdev: vdev
  1370. * @peer: peer
  1371. * @nbuf_head: skb list head
  1372. * @nbuf_tail: skb list tail
  1373. *
  1374. * Check the return status of the call back function and drop
  1375. * the packets if the return status indicates a failure.
  1376. *
  1377. * Return: None
  1378. */
  1379. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1380. struct dp_vdev *vdev,
  1381. struct dp_peer *peer,
  1382. qdf_nbuf_t nbuf_head)
  1383. {
  1384. int num_nbuf = 0;
  1385. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1386. /* Function pointer initialized only when FISA is enabled */
  1387. if (vdev->osif_fisa_rx)
  1388. /* on failure send it via regular path */
  1389. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1390. else if (vdev->osif_rx)
  1391. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1392. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1393. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1394. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1395. if (peer)
  1396. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1397. }
  1398. }
  1399. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1400. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1401. struct dp_vdev *vdev,
  1402. struct dp_peer *peer,
  1403. qdf_nbuf_t nbuf_head,
  1404. qdf_nbuf_t nbuf_tail)
  1405. {
  1406. int num_nbuf = 0;
  1407. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1408. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1409. /*
  1410. * This is a special case where vdev is invalid,
  1411. * so we cannot know the pdev to which this packet
  1412. * belonged. Hence we update the soc rx error stats.
  1413. */
  1414. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1415. return;
  1416. }
  1417. /*
  1418. * highly unlikely to have a vdev without a registered rx
  1419. * callback function. if so let us free the nbuf_list.
  1420. */
  1421. if (qdf_unlikely(!vdev->osif_rx)) {
  1422. if (peer && dp_rx_is_peer_cache_bufq_supported()) {
  1423. dp_rx_enqueue_rx(peer, nbuf_head);
  1424. } else {
  1425. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1426. nbuf_head);
  1427. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1428. }
  1429. return;
  1430. }
  1431. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1432. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1433. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1434. &nbuf_tail, peer->mac_addr.raw);
  1435. }
  1436. dp_rx_check_delivery_to_stack(soc, vdev, peer, nbuf_head);
  1437. }
  1438. /**
  1439. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1440. * @nbuf: pointer to the first msdu of an amsdu.
  1441. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1442. *
  1443. * The ipsumed field of the skb is set based on whether HW validated the
  1444. * IP/TCP/UDP checksum.
  1445. *
  1446. * Return: void
  1447. */
  1448. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1449. qdf_nbuf_t nbuf,
  1450. uint8_t *rx_tlv_hdr)
  1451. {
  1452. qdf_nbuf_rx_cksum_t cksum = {0};
  1453. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1454. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1455. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1456. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1457. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1458. } else {
  1459. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1460. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1461. }
  1462. }
  1463. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1464. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer) \
  1465. { \
  1466. qdf_nbuf_t nbuf_local; \
  1467. struct dp_peer *peer_local; \
  1468. struct dp_vdev *vdev_local = vdev_hdl; \
  1469. do { \
  1470. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1471. break; \
  1472. nbuf_local = nbuf; \
  1473. peer_local = peer; \
  1474. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1475. break; \
  1476. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1477. break; \
  1478. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1479. (nbuf_local), \
  1480. (peer_local), 0, 1); \
  1481. } while (0); \
  1482. }
  1483. #else
  1484. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer)
  1485. #endif
  1486. /**
  1487. * dp_rx_msdu_stats_update() - update per msdu stats.
  1488. * @soc: core txrx main context
  1489. * @nbuf: pointer to the first msdu of an amsdu.
  1490. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1491. * @peer: pointer to the peer object.
  1492. * @ring_id: reo dest ring number on which pkt is reaped.
  1493. * @tid_stats: per tid rx stats.
  1494. *
  1495. * update all the per msdu stats for that nbuf.
  1496. * Return: void
  1497. */
  1498. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1499. qdf_nbuf_t nbuf,
  1500. uint8_t *rx_tlv_hdr,
  1501. struct dp_peer *peer,
  1502. uint8_t ring_id,
  1503. struct cdp_tid_rx_stats *tid_stats)
  1504. {
  1505. bool is_ampdu, is_not_amsdu;
  1506. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1507. struct dp_vdev *vdev = peer->vdev;
  1508. qdf_ether_header_t *eh;
  1509. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1510. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, peer);
  1511. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1512. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1513. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1514. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1515. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1516. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1517. tid_stats->msdu_cnt++;
  1518. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1519. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1520. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1521. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1522. tid_stats->mcast_msdu_cnt++;
  1523. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1524. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1525. tid_stats->bcast_msdu_cnt++;
  1526. }
  1527. }
  1528. /*
  1529. * currently we can return from here as we have similar stats
  1530. * updated at per ppdu level instead of msdu level
  1531. */
  1532. if (!soc->process_rx_status)
  1533. return;
  1534. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1535. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1536. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1537. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1538. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1539. tid = qdf_nbuf_get_tid_val(nbuf);
  1540. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1541. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1542. rx_tlv_hdr);
  1543. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1544. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1545. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[mcs], 1,
  1546. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1547. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1548. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1549. DP_STATS_INC(peer, rx.bw[bw], 1);
  1550. /*
  1551. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1552. * then increase index [nss - 1] in array counter.
  1553. */
  1554. if (nss > 0 && (pkt_type == DOT11_N ||
  1555. pkt_type == DOT11_AC ||
  1556. pkt_type == DOT11_AX))
  1557. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1558. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1559. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1560. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1561. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1562. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1563. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1564. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1565. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1566. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1567. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1568. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1569. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1570. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1571. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1572. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1573. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1574. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1575. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1576. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1577. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1578. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1579. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1580. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1581. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1582. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1583. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1584. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1585. if ((soc->process_rx_status) &&
  1586. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1587. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1588. if (!vdev->pdev)
  1589. return;
  1590. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1591. &peer->stats, peer->peer_id,
  1592. UPDATE_PEER_STATS,
  1593. vdev->pdev->pdev_id);
  1594. #endif
  1595. }
  1596. }
  1597. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1598. uint8_t *rx_tlv_hdr,
  1599. qdf_nbuf_t nbuf,
  1600. struct hal_rx_msdu_metadata msdu_info)
  1601. {
  1602. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1603. (msdu_info.sa_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1604. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1605. qdf_nbuf_is_da_valid(nbuf) &&
  1606. (msdu_info.da_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1607. return false;
  1608. return true;
  1609. }
  1610. #ifndef WDS_VENDOR_EXTENSION
  1611. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1612. struct dp_vdev *vdev,
  1613. struct dp_peer *peer)
  1614. {
  1615. return 1;
  1616. }
  1617. #endif
  1618. #ifdef RX_DESC_DEBUG_CHECK
  1619. /**
  1620. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1621. * corruption
  1622. *
  1623. * @ring_desc: REO ring descriptor
  1624. * @rx_desc: Rx descriptor
  1625. *
  1626. * Return: NONE
  1627. */
  1628. static inline
  1629. QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1630. struct dp_rx_desc *rx_desc)
  1631. {
  1632. struct hal_buf_info hbi;
  1633. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1634. /* Sanity check for possible buffer paddr corruption */
  1635. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  1636. return QDF_STATUS_SUCCESS;
  1637. return QDF_STATUS_E_FAILURE;
  1638. }
  1639. #else
  1640. static inline
  1641. QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1642. struct dp_rx_desc *rx_desc)
  1643. {
  1644. return QDF_STATUS_SUCCESS;
  1645. }
  1646. #endif
  1647. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1648. static inline
  1649. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1650. {
  1651. bool limit_hit = false;
  1652. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1653. limit_hit =
  1654. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1655. if (limit_hit)
  1656. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1657. return limit_hit;
  1658. }
  1659. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1660. {
  1661. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1662. }
  1663. #else
  1664. static inline
  1665. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1666. {
  1667. return false;
  1668. }
  1669. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1670. {
  1671. return false;
  1672. }
  1673. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1674. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1675. /**
  1676. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1677. * no corresbonding peer found
  1678. * @soc: core txrx main context
  1679. * @nbuf: pkt skb pointer
  1680. *
  1681. * This function will try to deliver some RX special frames to stack
  1682. * even there is no peer matched found. for instance, LFR case, some
  1683. * eapol data will be sent to host before peer_map done.
  1684. *
  1685. * Return: None
  1686. */
  1687. static
  1688. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1689. {
  1690. uint16_t peer_id;
  1691. uint8_t vdev_id;
  1692. struct dp_vdev *vdev;
  1693. uint32_t l2_hdr_offset = 0;
  1694. uint16_t msdu_len = 0;
  1695. uint32_t pkt_len = 0;
  1696. uint8_t *rx_tlv_hdr;
  1697. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  1698. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  1699. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1700. if (peer_id > soc->max_peers)
  1701. goto deliver_fail;
  1702. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1703. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1704. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  1705. goto deliver_fail;
  1706. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  1707. goto deliver_fail;
  1708. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1709. l2_hdr_offset =
  1710. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1711. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1712. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1713. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  1714. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1715. qdf_nbuf_pull_head(nbuf,
  1716. RX_PKT_TLVS_LEN +
  1717. l2_hdr_offset);
  1718. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  1719. qdf_nbuf_set_exc_frame(nbuf, 1);
  1720. if (QDF_STATUS_SUCCESS !=
  1721. vdev->osif_rx(vdev->osif_vdev, nbuf))
  1722. goto deliver_fail;
  1723. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1724. return;
  1725. }
  1726. deliver_fail:
  1727. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1728. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1729. qdf_nbuf_free(nbuf);
  1730. }
  1731. #else
  1732. static inline
  1733. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1734. {
  1735. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1736. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1737. qdf_nbuf_free(nbuf);
  1738. }
  1739. #endif
  1740. /**
  1741. * dp_rx_srng_get_num_pending() - get number of pending entries
  1742. * @hal_soc: hal soc opaque pointer
  1743. * @hal_ring: opaque pointer to the HAL Rx Ring
  1744. * @num_entries: number of entries in the hal_ring.
  1745. * @near_full: pointer to a boolean. This is set if ring is near full.
  1746. *
  1747. * The function returns the number of entries in a destination ring which are
  1748. * yet to be reaped. The function also checks if the ring is near full.
  1749. * If more than half of the ring needs to be reaped, the ring is considered
  1750. * approaching full.
  1751. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1752. * entries. It should not be called within a SRNG lock. HW pointer value is
  1753. * synced into cached_hp.
  1754. *
  1755. * Return: Number of pending entries if any
  1756. */
  1757. static
  1758. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1759. hal_ring_handle_t hal_ring_hdl,
  1760. uint32_t num_entries,
  1761. bool *near_full)
  1762. {
  1763. uint32_t num_pending = 0;
  1764. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1765. hal_ring_hdl,
  1766. true);
  1767. if (num_entries && (num_pending >= num_entries >> 1))
  1768. *near_full = true;
  1769. else
  1770. *near_full = false;
  1771. return num_pending;
  1772. }
  1773. #ifdef WLAN_SUPPORT_RX_FISA
  1774. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1775. {
  1776. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1777. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1778. }
  1779. /**
  1780. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  1781. * @nbuf: pkt skb pointer
  1782. * @l3_padding: l3 padding
  1783. *
  1784. * Return: None
  1785. */
  1786. static inline
  1787. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1788. {
  1789. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1790. }
  1791. #else
  1792. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1793. {
  1794. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1795. }
  1796. static inline
  1797. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1798. {
  1799. }
  1800. #endif
  1801. #ifdef DP_RX_DROP_RAW_FRM
  1802. /**
  1803. * dp_rx_is_raw_frame_dropped() - if raw frame nbuf, free and drop
  1804. * @nbuf: pkt skb pointer
  1805. *
  1806. * Return: true - raw frame, dropped
  1807. * false - not raw frame, do nothing
  1808. */
  1809. static inline
  1810. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1811. {
  1812. if (qdf_nbuf_is_raw_frame(nbuf)) {
  1813. qdf_nbuf_free(nbuf);
  1814. return true;
  1815. }
  1816. return false;
  1817. }
  1818. #else
  1819. static inline
  1820. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1821. {
  1822. return false;
  1823. }
  1824. #endif
  1825. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1826. /**
  1827. * dp_rx_ring_record_entry() - Record an entry into the rx ring history.
  1828. * @soc: Datapath soc structure
  1829. * @ring_num: REO ring number
  1830. * @ring_desc: REO ring descriptor
  1831. *
  1832. * Returns: None
  1833. */
  1834. static inline void
  1835. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1836. hal_ring_desc_t ring_desc)
  1837. {
  1838. struct dp_buf_info_record *record;
  1839. uint8_t rbm;
  1840. struct hal_buf_info hbi;
  1841. uint32_t idx;
  1842. if (qdf_unlikely(!&soc->rx_ring_history[ring_num]))
  1843. return;
  1844. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1845. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  1846. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  1847. DP_RX_HIST_MAX);
  1848. /* No NULL check needed for record since its an array */
  1849. record = &soc->rx_ring_history[ring_num]->entry[idx];
  1850. record->timestamp = qdf_get_log_timestamp();
  1851. record->hbi.paddr = hbi.paddr;
  1852. record->hbi.sw_cookie = hbi.sw_cookie;
  1853. record->hbi.rbm = rbm;
  1854. }
  1855. #else
  1856. static inline void
  1857. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1858. hal_ring_desc_t ring_desc)
  1859. {
  1860. }
  1861. #endif
  1862. /**
  1863. * dp_rx_process() - Brain of the Rx processing functionality
  1864. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1865. * @int_ctx: per interrupt context
  1866. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1867. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1868. * @quota: No. of units (packets) that can be serviced in one shot.
  1869. *
  1870. * This function implements the core of Rx functionality. This is
  1871. * expected to handle only non-error frames.
  1872. *
  1873. * Return: uint32_t: No. of elements processed
  1874. */
  1875. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1876. uint8_t reo_ring_num, uint32_t quota)
  1877. {
  1878. hal_ring_desc_t ring_desc;
  1879. hal_soc_handle_t hal_soc;
  1880. struct dp_rx_desc *rx_desc = NULL;
  1881. qdf_nbuf_t nbuf, next;
  1882. bool near_full;
  1883. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1884. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1885. uint32_t num_pending;
  1886. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1887. uint16_t msdu_len = 0;
  1888. uint16_t peer_id;
  1889. uint8_t vdev_id;
  1890. struct dp_peer *peer;
  1891. struct dp_vdev *vdev;
  1892. uint32_t pkt_len = 0;
  1893. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1894. struct hal_rx_msdu_desc_info msdu_desc_info;
  1895. enum hal_reo_error_status error;
  1896. uint32_t peer_mdata;
  1897. uint8_t *rx_tlv_hdr;
  1898. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1899. uint8_t mac_id = 0;
  1900. struct dp_pdev *rx_pdev;
  1901. struct dp_srng *dp_rxdma_srng;
  1902. struct rx_desc_pool *rx_desc_pool;
  1903. struct dp_soc *soc = int_ctx->soc;
  1904. uint8_t ring_id = 0;
  1905. uint8_t core_id = 0;
  1906. struct cdp_tid_rx_stats *tid_stats;
  1907. qdf_nbuf_t nbuf_head;
  1908. qdf_nbuf_t nbuf_tail;
  1909. qdf_nbuf_t deliver_list_head;
  1910. qdf_nbuf_t deliver_list_tail;
  1911. uint32_t num_rx_bufs_reaped = 0;
  1912. uint32_t intr_id;
  1913. struct hif_opaque_softc *scn;
  1914. int32_t tid = 0;
  1915. bool is_prev_msdu_last = true;
  1916. uint32_t num_entries_avail = 0;
  1917. uint32_t rx_ol_pkt_cnt = 0;
  1918. uint32_t num_entries = 0;
  1919. struct hal_rx_msdu_metadata msdu_metadata;
  1920. QDF_STATUS status;
  1921. qdf_nbuf_t ebuf_head;
  1922. qdf_nbuf_t ebuf_tail;
  1923. DP_HIST_INIT();
  1924. qdf_assert_always(soc && hal_ring_hdl);
  1925. hal_soc = soc->hal_soc;
  1926. qdf_assert_always(hal_soc);
  1927. scn = soc->hif_handle;
  1928. hif_pm_runtime_mark_dp_rx_busy(scn);
  1929. intr_id = int_ctx->dp_intr_id;
  1930. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  1931. more_data:
  1932. /* reset local variables here to be re-used in the function */
  1933. nbuf_head = NULL;
  1934. nbuf_tail = NULL;
  1935. deliver_list_head = NULL;
  1936. deliver_list_tail = NULL;
  1937. peer = NULL;
  1938. vdev = NULL;
  1939. num_rx_bufs_reaped = 0;
  1940. ebuf_head = NULL;
  1941. ebuf_tail = NULL;
  1942. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1943. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1944. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1945. qdf_mem_zero(head, sizeof(head));
  1946. qdf_mem_zero(tail, sizeof(tail));
  1947. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1948. /*
  1949. * Need API to convert from hal_ring pointer to
  1950. * Ring Type / Ring Id combo
  1951. */
  1952. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1953. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1954. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1955. goto done;
  1956. }
  1957. /*
  1958. * start reaping the buffers from reo ring and queue
  1959. * them in per vdev queue.
  1960. * Process the received pkts in a different per vdev loop.
  1961. */
  1962. while (qdf_likely(quota &&
  1963. (ring_desc = hal_srng_dst_peek(hal_soc,
  1964. hal_ring_hdl)))) {
  1965. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1966. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1967. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1968. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1969. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1970. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1971. /* Don't know how to deal with this -- assert */
  1972. qdf_assert(0);
  1973. }
  1974. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  1975. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1976. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  1977. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1978. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  1979. break;
  1980. }
  1981. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1982. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  1983. ring_desc, rx_desc);
  1984. if (QDF_IS_STATUS_ERROR(status)) {
  1985. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  1986. qdf_assert_always(rx_desc->unmapped);
  1987. dp_ipa_handle_rx_buf_smmu_mapping(
  1988. soc,
  1989. rx_desc->nbuf,
  1990. RX_DATA_BUFFER_SIZE,
  1991. false);
  1992. qdf_nbuf_unmap_nbytes_single(
  1993. soc->osdev,
  1994. rx_desc->nbuf,
  1995. QDF_DMA_FROM_DEVICE,
  1996. RX_DATA_BUFFER_SIZE);
  1997. rx_desc->unmapped = 1;
  1998. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  1999. rx_desc->pool_id);
  2000. dp_rx_add_to_free_desc_list(
  2001. &head[rx_desc->pool_id],
  2002. &tail[rx_desc->pool_id],
  2003. rx_desc);
  2004. }
  2005. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2006. continue;
  2007. }
  2008. /*
  2009. * this is a unlikely scenario where the host is reaping
  2010. * a descriptor which it already reaped just a while ago
  2011. * but is yet to replenish it back to HW.
  2012. * In this case host will dump the last 128 descriptors
  2013. * including the software descriptor rx_desc and assert.
  2014. */
  2015. if (qdf_unlikely(!rx_desc->in_use)) {
  2016. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  2017. dp_info_rl("Reaping rx_desc not in use!");
  2018. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2019. ring_desc, rx_desc);
  2020. /* ignore duplicate RX desc and continue to process */
  2021. /* Pop out the descriptor */
  2022. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2023. continue;
  2024. }
  2025. status = dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  2026. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2027. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  2028. rx_desc->in_err_state = 1;
  2029. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2030. continue;
  2031. }
  2032. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  2033. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  2034. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  2035. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2036. ring_desc, rx_desc);
  2037. }
  2038. /* Get MPDU DESC info */
  2039. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  2040. /* Get MSDU DESC info */
  2041. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  2042. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  2043. HAL_MSDU_F_MSDU_CONTINUATION)) {
  2044. /* previous msdu has end bit set, so current one is
  2045. * the new MPDU
  2046. */
  2047. if (is_prev_msdu_last) {
  2048. /* Get number of entries available in HW ring */
  2049. num_entries_avail =
  2050. hal_srng_dst_num_valid(hal_soc,
  2051. hal_ring_hdl, 1);
  2052. /* For new MPDU check if we can read complete
  2053. * MPDU by comparing the number of buffers
  2054. * available and number of buffers needed to
  2055. * reap this MPDU
  2056. */
  2057. if (((msdu_desc_info.msdu_len /
  2058. (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN) +
  2059. 1)) > num_entries_avail) {
  2060. DP_STATS_INC(
  2061. soc,
  2062. rx.msdu_scatter_wait_break,
  2063. 1);
  2064. break;
  2065. }
  2066. is_prev_msdu_last = false;
  2067. }
  2068. }
  2069. core_id = smp_processor_id();
  2070. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  2071. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  2072. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  2073. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  2074. HAL_MPDU_F_RAW_AMPDU))
  2075. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  2076. if (!is_prev_msdu_last &&
  2077. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  2078. is_prev_msdu_last = true;
  2079. /* Pop out the descriptor*/
  2080. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2081. rx_bufs_reaped[rx_desc->pool_id]++;
  2082. peer_mdata = mpdu_desc_info.peer_meta_data;
  2083. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  2084. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  2085. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  2086. DP_PEER_METADATA_VDEV_ID_GET(peer_mdata);
  2087. /*
  2088. * save msdu flags first, last and continuation msdu in
  2089. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  2090. * length to nbuf->cb. This ensures the info required for
  2091. * per pkt processing is always in the same cache line.
  2092. * This helps in improving throughput for smaller pkt
  2093. * sizes.
  2094. */
  2095. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  2096. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  2097. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  2098. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  2099. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  2100. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  2101. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  2102. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  2103. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  2104. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  2105. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  2106. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  2107. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  2108. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  2109. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  2110. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  2111. /*
  2112. * move unmap after scattered msdu waiting break logic
  2113. * in case double skb unmap happened.
  2114. */
  2115. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2116. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  2117. rx_desc_pool->buf_size,
  2118. false);
  2119. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2120. QDF_DMA_FROM_DEVICE,
  2121. rx_desc_pool->buf_size);
  2122. rx_desc->unmapped = 1;
  2123. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  2124. ebuf_tail, rx_desc);
  2125. /*
  2126. * if continuation bit is set then we have MSDU spread
  2127. * across multiple buffers, let us not decrement quota
  2128. * till we reap all buffers of that MSDU.
  2129. */
  2130. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  2131. quota -= 1;
  2132. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  2133. &tail[rx_desc->pool_id],
  2134. rx_desc);
  2135. num_rx_bufs_reaped++;
  2136. /*
  2137. * only if complete msdu is received for scatter case,
  2138. * then allow break.
  2139. */
  2140. if (is_prev_msdu_last &&
  2141. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  2142. break;
  2143. }
  2144. done:
  2145. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2146. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2147. /*
  2148. * continue with next mac_id if no pkts were reaped
  2149. * from that pool
  2150. */
  2151. if (!rx_bufs_reaped[mac_id])
  2152. continue;
  2153. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2154. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2155. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2156. rx_desc_pool, rx_bufs_reaped[mac_id],
  2157. &head[mac_id], &tail[mac_id]);
  2158. }
  2159. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  2160. /* Peer can be NULL is case of LFR */
  2161. if (qdf_likely(peer))
  2162. vdev = NULL;
  2163. /*
  2164. * BIG loop where each nbuf is dequeued from global queue,
  2165. * processed and queued back on a per vdev basis. These nbufs
  2166. * are sent to stack as and when we run out of nbufs
  2167. * or a new nbuf dequeued from global queue has a different
  2168. * vdev when compared to previous nbuf.
  2169. */
  2170. nbuf = nbuf_head;
  2171. while (nbuf) {
  2172. next = nbuf->next;
  2173. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  2174. nbuf = next;
  2175. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  2176. continue;
  2177. }
  2178. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2179. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2180. if (deliver_list_head && vdev && (vdev->vdev_id != vdev_id)) {
  2181. dp_rx_deliver_to_stack(soc, vdev, peer,
  2182. deliver_list_head,
  2183. deliver_list_tail);
  2184. deliver_list_head = NULL;
  2185. deliver_list_tail = NULL;
  2186. }
  2187. /* Get TID from struct cb->tid_val, save to tid */
  2188. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  2189. tid = qdf_nbuf_get_tid_val(nbuf);
  2190. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2191. if (qdf_unlikely(!peer)) {
  2192. peer = dp_peer_get_ref_by_id(soc, peer_id,
  2193. DP_MOD_ID_RX);
  2194. } else if (peer && peer->peer_id != peer_id) {
  2195. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2196. peer = dp_peer_get_ref_by_id(soc, peer_id,
  2197. DP_MOD_ID_RX);
  2198. }
  2199. if (peer) {
  2200. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  2201. qdf_dp_trace_set_track(nbuf, QDF_RX);
  2202. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  2203. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  2204. QDF_NBUF_RX_PKT_DATA_TRACK;
  2205. }
  2206. rx_bufs_used++;
  2207. if (qdf_likely(peer)) {
  2208. vdev = peer->vdev;
  2209. } else {
  2210. nbuf->next = NULL;
  2211. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2212. nbuf = next;
  2213. continue;
  2214. }
  2215. if (qdf_unlikely(!vdev)) {
  2216. qdf_nbuf_free(nbuf);
  2217. nbuf = next;
  2218. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  2219. continue;
  2220. }
  2221. rx_pdev = vdev->pdev;
  2222. DP_RX_TID_SAVE(nbuf, tid);
  2223. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  2224. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  2225. soc->wlan_cfg_ctx)))
  2226. qdf_nbuf_set_timestamp(nbuf);
  2227. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  2228. tid_stats =
  2229. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  2230. /*
  2231. * Check if DMA completed -- msdu_done is the last bit
  2232. * to be written
  2233. */
  2234. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  2235. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  2236. dp_err("MSDU DONE failure");
  2237. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  2238. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  2239. QDF_TRACE_LEVEL_INFO);
  2240. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  2241. qdf_nbuf_free(nbuf);
  2242. qdf_assert(0);
  2243. nbuf = next;
  2244. continue;
  2245. }
  2246. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  2247. /*
  2248. * First IF condition:
  2249. * 802.11 Fragmented pkts are reinjected to REO
  2250. * HW block as SG pkts and for these pkts we only
  2251. * need to pull the RX TLVS header length.
  2252. * Second IF condition:
  2253. * The below condition happens when an MSDU is spread
  2254. * across multiple buffers. This can happen in two cases
  2255. * 1. The nbuf size is smaller then the received msdu.
  2256. * ex: we have set the nbuf size to 2048 during
  2257. * nbuf_alloc. but we received an msdu which is
  2258. * 2304 bytes in size then this msdu is spread
  2259. * across 2 nbufs.
  2260. *
  2261. * 2. AMSDUs when RAW mode is enabled.
  2262. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  2263. * across 1st nbuf and 2nd nbuf and last MSDU is
  2264. * spread across 2nd nbuf and 3rd nbuf.
  2265. *
  2266. * for these scenarios let us create a skb frag_list and
  2267. * append these buffers till the last MSDU of the AMSDU
  2268. * Third condition:
  2269. * This is the most likely case, we receive 802.3 pkts
  2270. * decapsulated by HW, here we need to set the pkt length.
  2271. */
  2272. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  2273. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2274. bool is_mcbc, is_sa_vld, is_da_vld;
  2275. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  2276. rx_tlv_hdr);
  2277. is_sa_vld =
  2278. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  2279. rx_tlv_hdr);
  2280. is_da_vld =
  2281. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  2282. rx_tlv_hdr);
  2283. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  2284. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  2285. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  2286. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  2287. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2288. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2289. nbuf = dp_rx_sg_create(nbuf);
  2290. next = nbuf->next;
  2291. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2292. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  2293. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  2294. } else {
  2295. qdf_nbuf_free(nbuf);
  2296. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  2297. dp_info_rl("scatter msdu len %d, dropped",
  2298. msdu_len);
  2299. nbuf = next;
  2300. continue;
  2301. }
  2302. } else {
  2303. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2304. pkt_len = msdu_len +
  2305. msdu_metadata.l3_hdr_pad +
  2306. RX_PKT_TLVS_LEN;
  2307. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2308. dp_rx_skip_tlvs(nbuf, msdu_metadata.l3_hdr_pad);
  2309. }
  2310. /*
  2311. * process frame for mulitpass phrase processing
  2312. */
  2313. if (qdf_unlikely(vdev->multipass_en)) {
  2314. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  2315. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  2316. qdf_nbuf_free(nbuf);
  2317. nbuf = next;
  2318. continue;
  2319. }
  2320. }
  2321. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  2322. QDF_TRACE(QDF_MODULE_ID_DP,
  2323. QDF_TRACE_LEVEL_ERROR,
  2324. FL("Policy Check Drop pkt"));
  2325. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  2326. /* Drop & free packet */
  2327. qdf_nbuf_free(nbuf);
  2328. /* Statistics */
  2329. nbuf = next;
  2330. continue;
  2331. }
  2332. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  2333. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  2334. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  2335. rx_tlv_hdr) ==
  2336. false))) {
  2337. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  2338. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  2339. qdf_nbuf_free(nbuf);
  2340. nbuf = next;
  2341. continue;
  2342. }
  2343. if (soc->process_rx_status)
  2344. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  2345. /* Update the protocol tag in SKB based on CCE metadata */
  2346. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  2347. reo_ring_num, false, true);
  2348. /* Update the flow tag in SKB based on FSE metadata */
  2349. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  2350. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  2351. ring_id, tid_stats);
  2352. if (qdf_unlikely(vdev->mesh_vdev)) {
  2353. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  2354. == QDF_STATUS_SUCCESS) {
  2355. QDF_TRACE(QDF_MODULE_ID_DP,
  2356. QDF_TRACE_LEVEL_INFO_MED,
  2357. FL("mesh pkt filtered"));
  2358. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  2359. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  2360. 1);
  2361. qdf_nbuf_free(nbuf);
  2362. nbuf = next;
  2363. continue;
  2364. }
  2365. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  2366. }
  2367. if (qdf_likely(vdev->rx_decap_type ==
  2368. htt_cmn_pkt_type_ethernet) &&
  2369. qdf_likely(!vdev->mesh_vdev)) {
  2370. /* WDS Destination Address Learning */
  2371. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  2372. /* Due to HW issue, sometimes we see that the sa_idx
  2373. * and da_idx are invalid with sa_valid and da_valid
  2374. * bits set
  2375. *
  2376. * in this case we also see that value of
  2377. * sa_sw_peer_id is set as 0
  2378. *
  2379. * Drop the packet if sa_idx and da_idx OOB or
  2380. * sa_sw_peerid is 0
  2381. */
  2382. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf,
  2383. msdu_metadata)) {
  2384. qdf_nbuf_free(nbuf);
  2385. nbuf = next;
  2386. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  2387. continue;
  2388. }
  2389. /* WDS Source Port Learning */
  2390. if (qdf_likely(vdev->wds_enabled))
  2391. dp_rx_wds_srcport_learn(soc,
  2392. rx_tlv_hdr,
  2393. peer,
  2394. nbuf,
  2395. msdu_metadata);
  2396. /* Intrabss-fwd */
  2397. if (dp_rx_check_ap_bridge(vdev))
  2398. if (dp_rx_intrabss_fwd(soc,
  2399. peer,
  2400. rx_tlv_hdr,
  2401. nbuf,
  2402. msdu_metadata)) {
  2403. nbuf = next;
  2404. tid_stats->intrabss_cnt++;
  2405. continue; /* Get next desc */
  2406. }
  2407. }
  2408. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  2409. DP_RX_LIST_APPEND(deliver_list_head,
  2410. deliver_list_tail,
  2411. nbuf);
  2412. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  2413. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2414. if (qdf_unlikely(peer->in_twt))
  2415. DP_STATS_INC_PKT(peer, rx.to_stack_twt, 1,
  2416. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2417. tid_stats->delivered_to_stack++;
  2418. nbuf = next;
  2419. }
  2420. if (qdf_likely(deliver_list_head)) {
  2421. if (qdf_likely(peer))
  2422. dp_rx_deliver_to_stack(soc, vdev, peer,
  2423. deliver_list_head,
  2424. deliver_list_tail);
  2425. else {
  2426. nbuf = deliver_list_head;
  2427. while (nbuf) {
  2428. next = nbuf->next;
  2429. nbuf->next = NULL;
  2430. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2431. nbuf = next;
  2432. }
  2433. }
  2434. }
  2435. if (qdf_likely(peer))
  2436. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2437. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  2438. if (quota) {
  2439. num_pending =
  2440. dp_rx_srng_get_num_pending(hal_soc,
  2441. hal_ring_hdl,
  2442. num_entries,
  2443. &near_full);
  2444. if (num_pending) {
  2445. DP_STATS_INC(soc, rx.hp_oos2, 1);
  2446. if (!hif_exec_should_yield(scn, intr_id))
  2447. goto more_data;
  2448. if (qdf_unlikely(near_full)) {
  2449. DP_STATS_INC(soc, rx.near_full, 1);
  2450. goto more_data;
  2451. }
  2452. }
  2453. }
  2454. if (vdev && vdev->osif_fisa_flush)
  2455. vdev->osif_fisa_flush(soc, reo_ring_num);
  2456. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  2457. vdev->osif_gro_flush(vdev->osif_vdev,
  2458. reo_ring_num);
  2459. }
  2460. }
  2461. /* Update histogram statistics by looping through pdev's */
  2462. DP_RX_HIST_STATS_PER_PDEV();
  2463. return rx_bufs_used; /* Assume no scale factor for now */
  2464. }
  2465. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2466. {
  2467. QDF_STATUS ret;
  2468. if (vdev->osif_rx_flush) {
  2469. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2470. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2471. dp_err("Failed to flush rx pkts for vdev %d\n",
  2472. vdev->vdev_id);
  2473. return ret;
  2474. }
  2475. }
  2476. return QDF_STATUS_SUCCESS;
  2477. }
  2478. static QDF_STATUS
  2479. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2480. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2481. struct dp_pdev *dp_pdev,
  2482. struct rx_desc_pool *rx_desc_pool)
  2483. {
  2484. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2485. (nbuf_frag_info_t->virt_addr).nbuf =
  2486. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2487. RX_BUFFER_RESERVATION,
  2488. rx_desc_pool->buf_alignment, FALSE);
  2489. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2490. dp_err("nbuf alloc failed");
  2491. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2492. return ret;
  2493. }
  2494. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2495. (nbuf_frag_info_t->virt_addr).nbuf,
  2496. QDF_DMA_FROM_DEVICE,
  2497. rx_desc_pool->buf_size);
  2498. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2499. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2500. dp_err("nbuf map failed");
  2501. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2502. return ret;
  2503. }
  2504. nbuf_frag_info_t->paddr =
  2505. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2506. ret = check_x86_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2507. &nbuf_frag_info_t->paddr,
  2508. rx_desc_pool);
  2509. if (ret == QDF_STATUS_E_FAILURE) {
  2510. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  2511. (nbuf_frag_info_t->virt_addr).nbuf,
  2512. QDF_DMA_FROM_DEVICE,
  2513. rx_desc_pool->buf_size);
  2514. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2515. dp_err("nbuf check x86 failed");
  2516. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2517. return ret;
  2518. }
  2519. return QDF_STATUS_SUCCESS;
  2520. }
  2521. QDF_STATUS
  2522. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2523. struct dp_srng *dp_rxdma_srng,
  2524. struct rx_desc_pool *rx_desc_pool,
  2525. uint32_t num_req_buffers)
  2526. {
  2527. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2528. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2529. union dp_rx_desc_list_elem_t *next;
  2530. void *rxdma_ring_entry;
  2531. qdf_dma_addr_t paddr;
  2532. struct dp_rx_nbuf_frag_info *nf_info;
  2533. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2534. uint32_t buffer_index, nbuf_ptrs_per_page;
  2535. qdf_nbuf_t nbuf;
  2536. QDF_STATUS ret;
  2537. int page_idx, total_pages;
  2538. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2539. union dp_rx_desc_list_elem_t *tail = NULL;
  2540. int sync_hw_ptr = 1;
  2541. uint32_t num_entries_avail;
  2542. if (qdf_unlikely(!rxdma_srng)) {
  2543. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2544. return QDF_STATUS_E_FAILURE;
  2545. }
  2546. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2547. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2548. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2549. rxdma_srng,
  2550. sync_hw_ptr);
  2551. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2552. if (!num_entries_avail) {
  2553. dp_err("Num of available entries is zero, nothing to do");
  2554. return QDF_STATUS_E_NOMEM;
  2555. }
  2556. if (num_entries_avail < num_req_buffers)
  2557. num_req_buffers = num_entries_avail;
  2558. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2559. num_req_buffers, &desc_list, &tail);
  2560. if (!nr_descs) {
  2561. dp_err("no free rx_descs in freelist");
  2562. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2563. return QDF_STATUS_E_NOMEM;
  2564. }
  2565. dp_debug("got %u RX descs for driver attach", nr_descs);
  2566. /*
  2567. * Try to allocate pointers to the nbuf one page at a time.
  2568. * Take pointers that can fit in one page of memory and
  2569. * iterate through the total descriptors that need to be
  2570. * allocated in order of pages. Reuse the pointers that
  2571. * have been allocated to fit in one page across each
  2572. * iteration to index into the nbuf.
  2573. */
  2574. total_pages = (nr_descs * sizeof(*nf_info)) / PAGE_SIZE;
  2575. /*
  2576. * Add an extra page to store the remainder if any
  2577. */
  2578. if ((nr_descs * sizeof(*nf_info)) % PAGE_SIZE)
  2579. total_pages++;
  2580. nf_info = qdf_mem_malloc(PAGE_SIZE);
  2581. if (!nf_info) {
  2582. dp_err("failed to allocate nbuf array");
  2583. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2584. QDF_BUG(0);
  2585. return QDF_STATUS_E_NOMEM;
  2586. }
  2587. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*nf_info);
  2588. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2589. qdf_mem_zero(nf_info, PAGE_SIZE);
  2590. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2591. /*
  2592. * The last page of buffer pointers may not be required
  2593. * completely based on the number of descriptors. Below
  2594. * check will ensure we are allocating only the
  2595. * required number of descriptors.
  2596. */
  2597. if (nr_nbuf_total >= nr_descs)
  2598. break;
  2599. /* Flag is set while pdev rx_desc_pool initialization */
  2600. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2601. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2602. &nf_info[nr_nbuf], dp_pdev,
  2603. rx_desc_pool);
  2604. else
  2605. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2606. &nf_info[nr_nbuf], dp_pdev,
  2607. rx_desc_pool);
  2608. if (QDF_IS_STATUS_ERROR(ret))
  2609. break;
  2610. nr_nbuf_total++;
  2611. }
  2612. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2613. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2614. rxdma_ring_entry =
  2615. hal_srng_src_get_next(dp_soc->hal_soc,
  2616. rxdma_srng);
  2617. qdf_assert_always(rxdma_ring_entry);
  2618. next = desc_list->next;
  2619. paddr = nf_info[buffer_index].paddr;
  2620. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2621. /* Flag is set while pdev rx_desc_pool initialization */
  2622. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2623. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2624. &nf_info[buffer_index]);
  2625. else
  2626. dp_rx_desc_prep(&desc_list->rx_desc,
  2627. &nf_info[buffer_index]);
  2628. desc_list->rx_desc.in_use = 1;
  2629. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2630. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2631. __func__,
  2632. RX_DESC_REPLENISHED);
  2633. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2634. desc_list->rx_desc.cookie,
  2635. rx_desc_pool->owner);
  2636. dp_ipa_handle_rx_buf_smmu_mapping(
  2637. dp_soc, nbuf,
  2638. rx_desc_pool->buf_size,
  2639. true);
  2640. desc_list = next;
  2641. }
  2642. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2643. }
  2644. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2645. qdf_mem_free(nf_info);
  2646. if (!nr_nbuf_total) {
  2647. dp_err("No nbuf's allocated");
  2648. QDF_BUG(0);
  2649. return QDF_STATUS_E_RESOURCES;
  2650. }
  2651. /* No need to count the number of bytes received during replenish.
  2652. * Therefore set replenish.pkts.bytes as 0.
  2653. */
  2654. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2655. return QDF_STATUS_SUCCESS;
  2656. }
  2657. /**
  2658. * dp_rx_enable_mon_dest_frag() - Enable frag processing for
  2659. * monitor destination ring via frag.
  2660. *
  2661. * Enable this flag only for monitor destination buffer processing
  2662. * if DP_RX_MON_MEM_FRAG feature is enabled.
  2663. * If flag is set then frag based function will be called for alloc,
  2664. * map, prep desc and free ops for desc buffer else normal nbuf based
  2665. * function will be called.
  2666. *
  2667. * @rx_desc_pool: Rx desc pool
  2668. * @is_mon_dest_desc: Is it for monitor dest buffer
  2669. *
  2670. * Return: None
  2671. */
  2672. #ifdef DP_RX_MON_MEM_FRAG
  2673. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2674. bool is_mon_dest_desc)
  2675. {
  2676. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2677. }
  2678. #else
  2679. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2680. bool is_mon_dest_desc)
  2681. {
  2682. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2683. }
  2684. #endif
  2685. /*
  2686. * dp_rx_pdev_desc_pool_alloc() - allocate memory for software rx descriptor
  2687. * pool
  2688. *
  2689. * @pdev: core txrx pdev context
  2690. *
  2691. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2692. * QDF_STATUS_E_NOMEM
  2693. */
  2694. QDF_STATUS
  2695. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2696. {
  2697. struct dp_soc *soc = pdev->soc;
  2698. uint32_t rxdma_entries;
  2699. uint32_t rx_sw_desc_num;
  2700. struct dp_srng *dp_rxdma_srng;
  2701. struct rx_desc_pool *rx_desc_pool;
  2702. uint32_t status = QDF_STATUS_SUCCESS;
  2703. int mac_for_pdev;
  2704. mac_for_pdev = pdev->lmac_id;
  2705. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2706. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2707. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2708. return status;
  2709. }
  2710. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2711. rxdma_entries = dp_rxdma_srng->num_entries;
  2712. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2713. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2714. status = dp_rx_desc_pool_alloc(soc,
  2715. rx_sw_desc_num,
  2716. rx_desc_pool);
  2717. if (status != QDF_STATUS_SUCCESS)
  2718. return status;
  2719. return status;
  2720. }
  2721. /*
  2722. * dp_rx_pdev_desc_pool_free() - free software rx descriptor pool
  2723. *
  2724. * @pdev: core txrx pdev context
  2725. */
  2726. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2727. {
  2728. int mac_for_pdev = pdev->lmac_id;
  2729. struct dp_soc *soc = pdev->soc;
  2730. struct rx_desc_pool *rx_desc_pool;
  2731. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2732. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2733. }
  2734. /*
  2735. * dp_rx_pdev_desc_pool_init() - initialize software rx descriptors
  2736. *
  2737. * @pdev: core txrx pdev context
  2738. *
  2739. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2740. * QDF_STATUS_E_NOMEM
  2741. */
  2742. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2743. {
  2744. int mac_for_pdev = pdev->lmac_id;
  2745. struct dp_soc *soc = pdev->soc;
  2746. uint32_t rxdma_entries;
  2747. uint32_t rx_sw_desc_num;
  2748. struct dp_srng *dp_rxdma_srng;
  2749. struct rx_desc_pool *rx_desc_pool;
  2750. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2751. /**
  2752. * If NSS is enabled, rx_desc_pool is already filled.
  2753. * Hence, just disable desc_pool frag flag.
  2754. */
  2755. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2756. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2757. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2758. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2759. return QDF_STATUS_SUCCESS;
  2760. }
  2761. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2762. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2763. return QDF_STATUS_E_NOMEM;
  2764. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2765. rxdma_entries = dp_rxdma_srng->num_entries;
  2766. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2767. rx_sw_desc_num =
  2768. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2769. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2770. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2771. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2772. /* Disable monitor dest processing via frag */
  2773. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2774. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2775. rx_sw_desc_num, rx_desc_pool);
  2776. return QDF_STATUS_SUCCESS;
  2777. }
  2778. /*
  2779. * dp_rx_pdev_desc_pool_deinit() - de-initialize software rx descriptor pools
  2780. * @pdev: core txrx pdev context
  2781. *
  2782. * This function resets the freelist of rx descriptors and destroys locks
  2783. * associated with this list of descriptors.
  2784. */
  2785. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2786. {
  2787. int mac_for_pdev = pdev->lmac_id;
  2788. struct dp_soc *soc = pdev->soc;
  2789. struct rx_desc_pool *rx_desc_pool;
  2790. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2791. dp_rx_desc_pool_deinit(soc, rx_desc_pool);
  2792. }
  2793. /*
  2794. * dp_rx_pdev_buffers_alloc() - Allocate nbufs (skbs) and replenish RxDMA ring
  2795. *
  2796. * @pdev: core txrx pdev context
  2797. *
  2798. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2799. * QDF_STATUS_E_NOMEM
  2800. */
  2801. QDF_STATUS
  2802. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2803. {
  2804. int mac_for_pdev = pdev->lmac_id;
  2805. struct dp_soc *soc = pdev->soc;
  2806. struct dp_srng *dp_rxdma_srng;
  2807. struct rx_desc_pool *rx_desc_pool;
  2808. uint32_t rxdma_entries;
  2809. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2810. rxdma_entries = dp_rxdma_srng->num_entries;
  2811. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2812. /* Initialize RX buffer pool which will be
  2813. * used during low memory conditions
  2814. */
  2815. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2816. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev, dp_rxdma_srng,
  2817. rx_desc_pool, rxdma_entries - 1);
  2818. }
  2819. /*
  2820. * dp_rx_pdev_buffers_free - Free nbufs (skbs)
  2821. *
  2822. * @pdev: core txrx pdev context
  2823. */
  2824. void
  2825. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2826. {
  2827. int mac_for_pdev = pdev->lmac_id;
  2828. struct dp_soc *soc = pdev->soc;
  2829. struct rx_desc_pool *rx_desc_pool;
  2830. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2831. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2832. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2833. }
  2834. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2835. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  2836. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2837. uint8_t *rx_tlv_hdr)
  2838. {
  2839. uint32_t l2_hdr_offset = 0;
  2840. uint16_t msdu_len = 0;
  2841. uint32_t skip_len;
  2842. l2_hdr_offset =
  2843. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2844. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2845. skip_len = l2_hdr_offset;
  2846. } else {
  2847. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2848. skip_len = l2_hdr_offset + RX_PKT_TLVS_LEN;
  2849. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2850. }
  2851. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2852. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2853. qdf_nbuf_pull_head(nbuf, skip_len);
  2854. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2855. qdf_nbuf_set_exc_frame(nbuf, 1);
  2856. dp_rx_deliver_to_stack(soc, peer->vdev, peer,
  2857. nbuf, NULL);
  2858. return true;
  2859. }
  2860. return false;
  2861. }
  2862. #endif