msm_cvp_platform.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/debugfs.h>
  7. #include <linux/dma-mapping.h>
  8. #include <linux/init.h>
  9. #include <linux/ioctl.h>
  10. #include <linux/list.h>
  11. #include <linux/module.h>
  12. #include <linux/of_platform.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/slab.h>
  15. #include <linux/types.h>
  16. #include <linux/version.h>
  17. #include <linux/io.h>
  18. #include <soc/qcom/of_common.h>
  19. #include "msm_cvp_internal.h"
  20. #include "msm_cvp_debug.h"
  21. #include "cvp_hfi_api.h"
  22. #include "cvp_hfi.h"
  23. #define UBWC_CONFIG(mco, mlo, hbo, bslo, bso, rs, mc, ml, hbb, bsl, bsp) \
  24. { \
  25. .override_bit_info.max_channel_override = mco, \
  26. .override_bit_info.mal_length_override = mlo, \
  27. .override_bit_info.hb_override = hbo, \
  28. .override_bit_info.bank_swzl_level_override = bslo, \
  29. .override_bit_info.bank_spreading_override = bso, \
  30. .override_bit_info.reserved = rs, \
  31. .max_channels = mc, \
  32. .mal_length = ml, \
  33. .highest_bank_bit = hbb, \
  34. .bank_swzl_level = bsl, \
  35. .bank_spreading = bsp, \
  36. }
  37. static struct msm_cvp_common_data default_common_data[] = {
  38. {
  39. .key = "qcom,auto-pil",
  40. .value = 1,
  41. },
  42. };
  43. static struct msm_cvp_common_data sm8450_common_data[] = {
  44. {
  45. .key = "qcom,pm-qos-latency-us",
  46. .value = 50,
  47. },
  48. {
  49. .key = "qcom,sw-power-collapse",
  50. .value = 1,
  51. },
  52. {
  53. .key = "qcom,domain-attr-non-fatal-faults",
  54. .value = 1,
  55. },
  56. {
  57. .key = "qcom,max-secure-instances",
  58. .value = 2, /*
  59. * As per design driver allows 3rd
  60. * instance as well since the secure
  61. * flags were updated later for the
  62. * current instance. Hence total
  63. * secure sessions would be
  64. * max-secure-instances + 1.
  65. */
  66. },
  67. {
  68. .key = "qcom,max-ssr-allowed",
  69. .value = 1, /*
  70. * Maxinum number of SSR before BUG_ON
  71. */
  72. },
  73. {
  74. .key = "qcom,power-collapse-delay",
  75. .value = 3000,
  76. },
  77. {
  78. .key = "qcom,hw-resp-timeout",
  79. .value = 2000,
  80. },
  81. {
  82. .key = "qcom,dsp-resp-timeout",
  83. .value = 1000,
  84. },
  85. {
  86. .key = "qcom,debug-timeout",
  87. .value = 0,
  88. },
  89. {
  90. .key = "qcom,dsp-enabled",
  91. .value = 1,
  92. }
  93. };
  94. static struct msm_cvp_common_data sm8550_common_data[] = {
  95. {
  96. .key = "qcom,pm-qos-latency-us",
  97. .value = 50,
  98. },
  99. {
  100. .key = "qcom,sw-power-collapse",
  101. .value = 1,
  102. },
  103. {
  104. .key = "qcom,domain-attr-non-fatal-faults",
  105. .value = 0,
  106. },
  107. {
  108. .key = "qcom,max-secure-instances",
  109. .value = 2, /*
  110. * As per design driver allows 3rd
  111. * instance as well since the secure
  112. * flags were updated later for the
  113. * current instance. Hence total
  114. * secure sessions would be
  115. * max-secure-instances + 1.
  116. */
  117. },
  118. {
  119. .key = "qcom,max-ssr-allowed",
  120. .value = 1, /*
  121. * Maxinum number of SSR before BUG_ON
  122. */
  123. },
  124. {
  125. .key = "qcom,power-collapse-delay",
  126. .value = 3000,
  127. },
  128. {
  129. .key = "qcom,hw-resp-timeout",
  130. .value = 2000,
  131. },
  132. {
  133. .key = "qcom,dsp-resp-timeout",
  134. .value = 1000,
  135. },
  136. {
  137. .key = "qcom,debug-timeout",
  138. .value = 0,
  139. },
  140. {
  141. .key = "qcom,dsp-enabled",
  142. .value = 1,
  143. }
  144. };
  145. static struct msm_cvp_common_data sm8550_tvm_common_data[] = {
  146. {
  147. .key = "qcom,pm-qos-latency-us",
  148. .value = 50,
  149. },
  150. {
  151. .key = "qcom,sw-power-collapse",
  152. .value = 0,
  153. },
  154. {
  155. .key = "qcom,domain-attr-non-fatal-faults",
  156. .value = 0,
  157. },
  158. {
  159. .key = "qcom,max-secure-instances",
  160. .value = 2, /*
  161. * As per design driver allows 3rd
  162. * instance as well since the secure
  163. * flags were updated later for the
  164. * current instance. Hence total
  165. * secure sessions would be
  166. * max-secure-instances + 1.
  167. */
  168. },
  169. {
  170. .key = "qcom,max-ssr-allowed",
  171. .value = 1, /*
  172. * Maxinum number of SSR before BUG_ON
  173. */
  174. },
  175. {
  176. .key = "qcom,power-collapse-delay",
  177. .value = 3000,
  178. },
  179. {
  180. .key = "qcom,hw-resp-timeout",
  181. .value = 2000,
  182. },
  183. {
  184. .key = "qcom,dsp-resp-timeout",
  185. .value = 1000,
  186. },
  187. {
  188. .key = "qcom,debug-timeout",
  189. .value = 0,
  190. },
  191. {
  192. .key = "qcom,dsp-enabled",
  193. .value = 0,
  194. }
  195. };
  196. static struct msm_cvp_common_data sm8650_common_data[] = {
  197. {
  198. .key = "qcom,pm-qos-latency-us",
  199. .value = 50,
  200. },
  201. {
  202. .key = "qcom,sw-power-collapse",
  203. .value = 1,
  204. },
  205. {
  206. .key = "qcom,domain-attr-non-fatal-faults",
  207. .value = 0,
  208. },
  209. {
  210. .key = "qcom,max-secure-instances",
  211. .value = 2, /*
  212. * As per design driver allows 3rd
  213. * instance as well since the secure
  214. * flags were updated later for the
  215. * current instance. Hence total
  216. * secure sessions would be
  217. * max-secure-instances + 1.
  218. */
  219. },
  220. {
  221. .key = "qcom,max-ssr-allowed",
  222. .value = 1, /*
  223. * Maxinum number of SSR before BUG_ON
  224. */
  225. },
  226. {
  227. .key = "qcom,power-collapse-delay",
  228. .value = 3000,
  229. },
  230. {
  231. .key = "qcom,hw-resp-timeout",
  232. .value = 2000,
  233. },
  234. {
  235. .key = "qcom,dsp-resp-timeout",
  236. .value = 1000,
  237. },
  238. {
  239. .key = "qcom,debug-timeout",
  240. .value = 0,
  241. },
  242. {
  243. .key = "qcom,dsp-enabled",
  244. .value = 1,
  245. }
  246. };
  247. /* Default UBWC config for LPDDR5 */
  248. static struct msm_cvp_ubwc_config_data kona_ubwc_data[] = {
  249. UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 16, 0, 0),
  250. };
  251. static struct msm_cvp_qos_setting waipio_noc_qos = {
  252. .axi_qos = 0x99,
  253. .prioritylut_low = 0x22222222,
  254. .prioritylut_high = 0x33333333,
  255. .urgency_low = 0x1022,
  256. .dangerlut_low = 0x0,
  257. .safelut_low = 0xffff,
  258. };
  259. static struct msm_cvp_platform_data default_data = {
  260. .common_data = default_common_data,
  261. .common_data_length = ARRAY_SIZE(default_common_data),
  262. .sku_version = 0,
  263. .vpu_ver = VPU_VERSION_5,
  264. .ubwc_config = 0x0,
  265. .noc_qos = 0x0,
  266. .vm_id = 1,
  267. };
  268. static struct msm_cvp_platform_data sm8450_data = {
  269. .common_data = sm8450_common_data,
  270. .common_data_length = ARRAY_SIZE(sm8450_common_data),
  271. .sku_version = 0,
  272. .vpu_ver = VPU_VERSION_5,
  273. .ubwc_config = kona_ubwc_data,
  274. .noc_qos = &waipio_noc_qos,
  275. .vm_id = 1,
  276. };
  277. static struct msm_cvp_platform_data sm8550_data = {
  278. .common_data = sm8550_common_data,
  279. .common_data_length = ARRAY_SIZE(sm8550_common_data),
  280. .sku_version = 0,
  281. .vpu_ver = VPU_VERSION_5,
  282. .ubwc_config = kona_ubwc_data, /*Reuse Kona setting*/
  283. .noc_qos = &waipio_noc_qos, /*Reuse Waipio setting*/
  284. .vm_id = 1,
  285. };
  286. static struct msm_cvp_platform_data sm8550_tvm_data = {
  287. .common_data = sm8550_tvm_common_data,
  288. .common_data_length = ARRAY_SIZE(sm8550_tvm_common_data),
  289. .sku_version = 0,
  290. .vpu_ver = VPU_VERSION_5,
  291. .ubwc_config = kona_ubwc_data, /*Reuse Kona setting*/
  292. .noc_qos = &waipio_noc_qos, /*Reuse Waipio setting*/
  293. .vm_id = 2,
  294. };
  295. static struct msm_cvp_platform_data sm8650_data = {
  296. .common_data = sm8650_common_data,
  297. .common_data_length = ARRAY_SIZE(sm8650_common_data),
  298. .sku_version = 0,
  299. .vpu_ver = VPU_VERSION_5,
  300. .ubwc_config = kona_ubwc_data, /*Reuse Kona setting*/
  301. .noc_qos = &waipio_noc_qos, /*Reuse Waipio setting*/
  302. .vm_id = 1,
  303. };
  304. static const struct of_device_id msm_cvp_dt_match[] = {
  305. {
  306. .compatible = "qcom,waipio-cvp",
  307. .data = &sm8450_data,
  308. },
  309. {
  310. .compatible = "qcom,kalama-cvp",
  311. .data = &sm8550_data,
  312. },
  313. {
  314. .compatible = "qcom,kalama-cvp-tvm",
  315. .data = &sm8550_tvm_data,
  316. },
  317. {
  318. .compatible = "qcom,pineapple-cvp",
  319. .data = &sm8650_data,
  320. },
  321. {},
  322. };
  323. /*
  324. * WARN: name field CAN NOT hold more than 23 chars
  325. * excluding the ending '\0'
  326. *
  327. * NOTE: the def entry index for the command packet is
  328. * "the packet type - HFI_CMD_SESSION_CVP_START"
  329. */
  330. const struct msm_cvp_hfi_defs cvp_hfi_defs[MAX_PKT_IDX] = {
  331. [HFI_CMD_SESSION_CVP_DFS_CONFIG - HFI_CMD_SESSION_CVP_START] =
  332. {
  333. .size = HFI_DFS_CONFIG_CMD_SIZE,
  334. .type = HFI_CMD_SESSION_CVP_DFS_CONFIG,
  335. .is_config_pkt = true,
  336. .resp = HAL_NO_RESP,
  337. .name = "DFS",
  338. },
  339. [HFI_CMD_SESSION_CVP_DFS_FRAME - HFI_CMD_SESSION_CVP_START] =
  340. {
  341. .size = HFI_DFS_FRAME_CMD_SIZE,
  342. .type = HFI_CMD_SESSION_CVP_DFS_FRAME,
  343. .is_config_pkt = false,
  344. .resp = HAL_NO_RESP,
  345. .name = "DFS_FRAME",
  346. .force_kernel_fence = false,
  347. },
  348. [HFI_CMD_SESSION_CVP_SGM_OF_CONFIG - HFI_CMD_SESSION_CVP_START] =
  349. {
  350. .size = 0xFFFFFFFF,
  351. .type = HFI_CMD_SESSION_CVP_SGM_OF_CONFIG,
  352. .is_config_pkt = true,
  353. .resp = HAL_NO_RESP,
  354. .name = "SGM_OF",
  355. },
  356. [HFI_CMD_SESSION_CVP_SGM_OF_FRAME - HFI_CMD_SESSION_CVP_START] =
  357. {
  358. .size = 0xFFFFFFFF,
  359. .type = HFI_CMD_SESSION_CVP_SGM_OF_FRAME,
  360. .is_config_pkt = false,
  361. .resp = HAL_NO_RESP,
  362. .name = "SGM_OF_FRAME",
  363. .force_kernel_fence = false,
  364. },
  365. [HFI_CMD_SESSION_CVP_WARP_NCC_CONFIG - HFI_CMD_SESSION_CVP_START] =
  366. {
  367. .size = 0xFFFFFFFF,
  368. .type = HFI_CMD_SESSION_CVP_WARP_NCC_CONFIG,
  369. .is_config_pkt = true,
  370. .resp = HAL_NO_RESP,
  371. .name = "WARP_NCC",
  372. },
  373. [HFI_CMD_SESSION_CVP_WARP_NCC_FRAME - HFI_CMD_SESSION_CVP_START] =
  374. {
  375. .size = 0xFFFFFFFF,
  376. .type = HFI_CMD_SESSION_CVP_WARP_NCC_FRAME,
  377. .is_config_pkt = false,
  378. .resp = HAL_NO_RESP,
  379. .name = "WARP_NCC_FRAME",
  380. .force_kernel_fence = false,
  381. },
  382. [HFI_CMD_SESSION_CVP_WARP_CONFIG - HFI_CMD_SESSION_CVP_START] =
  383. {
  384. .size = 0xFFFFFFFF,
  385. .type = HFI_CMD_SESSION_CVP_WARP_CONFIG,
  386. .is_config_pkt = true,
  387. .resp = HAL_NO_RESP,
  388. .name = "WARP",
  389. },
  390. [HFI_CMD_SESSION_CVP_WARP_DS_PARAMS - HFI_CMD_SESSION_CVP_START] =
  391. {
  392. .size = 0xFFFFFFFF,
  393. .type = HFI_CMD_SESSION_CVP_WARP_DS_PARAMS,
  394. .is_config_pkt = true,
  395. .resp = HAL_NO_RESP,
  396. .name = "WARP_DS_PARAMS",
  397. },
  398. [HFI_CMD_SESSION_CVP_WARP_FRAME - HFI_CMD_SESSION_CVP_START] =
  399. {
  400. .size = 0xFFFFFFFF,
  401. .type = HFI_CMD_SESSION_CVP_WARP_FRAME,
  402. .is_config_pkt = false,
  403. .resp = HAL_NO_RESP,
  404. .name = "WARP_FRAME",
  405. .force_kernel_fence = true,
  406. },
  407. [HFI_CMD_SESSION_CVP_DMM_CONFIG - HFI_CMD_SESSION_CVP_START] =
  408. {
  409. .size = HFI_DMM_CONFIG_CMD_SIZE,
  410. .type = HFI_CMD_SESSION_CVP_DMM_CONFIG,
  411. .is_config_pkt = true,
  412. .resp = HAL_NO_RESP,
  413. .name = "DMM",
  414. },
  415. [HFI_CMD_SESSION_CVP_DMM_PARAMS - HFI_CMD_SESSION_CVP_START] =
  416. {
  417. .size = 0xFFFFFFFF,
  418. .type = HFI_CMD_SESSION_CVP_DMM_PARAMS,
  419. .is_config_pkt = true,
  420. .resp = HAL_NO_RESP,
  421. .name = "DMM_PARAMS",
  422. },
  423. [HFI_CMD_SESSION_CVP_DMM_FRAME - HFI_CMD_SESSION_CVP_START] =
  424. {
  425. .size = HFI_DMM_FRAME_CMD_SIZE,
  426. .type = HFI_CMD_SESSION_CVP_DMM_FRAME,
  427. .is_config_pkt = false,
  428. .resp = HAL_NO_RESP,
  429. .name = "DMM_FRAME",
  430. .force_kernel_fence = true,
  431. },
  432. [HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  433. {
  434. .size = HFI_PERSIST_CMD_SIZE,
  435. .type =HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS,
  436. .is_config_pkt = true,
  437. .resp = HAL_NO_RESP,
  438. .name = "SET_PERSIST",
  439. },
  440. [HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  441. {
  442. .size = 0xffffffff,
  443. .type =HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS,
  444. .is_config_pkt = false,
  445. .resp = HAL_NO_RESP,
  446. .name = "REL_PERSIST",
  447. },
  448. [HFI_CMD_SESSION_CVP_DS_CONFIG - HFI_CMD_SESSION_CVP_START] =
  449. {
  450. .size = HFI_DS_CONFIG_CMD_SIZE,
  451. .type = HFI_CMD_SESSION_CVP_DS_CONFIG,
  452. .is_config_pkt = true,
  453. .resp = HAL_NO_RESP,
  454. .name = "DS_CONFIG",
  455. },
  456. [HFI_CMD_SESSION_CVP_DS - HFI_CMD_SESSION_CVP_START] =
  457. {
  458. .size = HFI_DS_CMD_SIZE,
  459. .type =HFI_CMD_SESSION_CVP_DS,
  460. .is_config_pkt = false,
  461. .resp = HAL_NO_RESP,
  462. .name = "DS",
  463. },
  464. [HFI_CMD_SESSION_CVP_CV_TME_CONFIG - HFI_CMD_SESSION_CVP_START] =
  465. {
  466. .size = HFI_OF_CONFIG_CMD_SIZE,
  467. .type =HFI_CMD_SESSION_CVP_CV_TME_CONFIG,
  468. .is_config_pkt = true,
  469. .resp = HAL_NO_RESP,
  470. .name = "TME",
  471. },
  472. [HFI_CMD_SESSION_CVP_CV_TME_FRAME - HFI_CMD_SESSION_CVP_START] =
  473. {
  474. .size = HFI_OF_FRAME_CMD_SIZE,
  475. .type =HFI_CMD_SESSION_CVP_CV_TME_FRAME,
  476. .is_config_pkt = false,
  477. .resp = HAL_NO_RESP,
  478. .name = "TME_FRAME",
  479. .force_kernel_fence = false,
  480. },
  481. [HFI_CMD_SESSION_CVP_CV_ODT_CONFIG - HFI_CMD_SESSION_CVP_START] =
  482. {
  483. .size = HFI_ODT_CONFIG_CMD_SIZE,
  484. .type = HFI_CMD_SESSION_CVP_CV_ODT_CONFIG,
  485. .is_config_pkt = true,
  486. .resp = HAL_NO_RESP,
  487. .name = "ODT",
  488. },
  489. [HFI_CMD_SESSION_CVP_CV_ODT_FRAME - HFI_CMD_SESSION_CVP_START] =
  490. {
  491. .size = HFI_ODT_FRAME_CMD_SIZE,
  492. .type =HFI_CMD_SESSION_CVP_CV_ODT_FRAME,
  493. .is_config_pkt = false,
  494. .resp = HAL_NO_RESP,
  495. .name = "ODT_FRAME",
  496. },
  497. [HFI_CMD_SESSION_CVP_CV_OD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  498. {
  499. .size = HFI_OD_CONFIG_CMD_SIZE,
  500. .type = HFI_CMD_SESSION_CVP_CV_OD_CONFIG,
  501. .is_config_pkt = true,
  502. .resp = HAL_NO_RESP,
  503. .name = "OD",
  504. },
  505. [HFI_CMD_SESSION_CVP_CV_OD_FRAME - HFI_CMD_SESSION_CVP_START] =
  506. {
  507. .size = HFI_OD_FRAME_CMD_SIZE,
  508. .type = HFI_CMD_SESSION_CVP_CV_OD_FRAME,
  509. .is_config_pkt = false,
  510. .resp = HAL_NO_RESP,
  511. .name = "OD_FRAME",
  512. },
  513. [HFI_CMD_SESSION_CVP_NCC_CONFIG - HFI_CMD_SESSION_CVP_START] =
  514. {
  515. .size = HFI_NCC_CONFIG_CMD_SIZE,
  516. .type =HFI_CMD_SESSION_CVP_NCC_CONFIG,
  517. .is_config_pkt = true,
  518. .resp = HAL_NO_RESP,
  519. .name = "NCC",
  520. },
  521. [HFI_CMD_SESSION_CVP_NCC_FRAME - HFI_CMD_SESSION_CVP_START] =
  522. {
  523. .size = HFI_NCC_FRAME_CMD_SIZE,
  524. .type = HFI_CMD_SESSION_CVP_NCC_FRAME,
  525. .is_config_pkt = false,
  526. .resp = HAL_NO_RESP,
  527. .name = "NCC_FRAME",
  528. .force_kernel_fence = false,
  529. },
  530. [HFI_CMD_SESSION_CVP_ICA_CONFIG - HFI_CMD_SESSION_CVP_START] =
  531. {
  532. .size = HFI_ICA_CONFIG_CMD_SIZE,
  533. .type = HFI_CMD_SESSION_CVP_ICA_CONFIG,
  534. .is_config_pkt = true,
  535. .resp = HAL_NO_RESP,
  536. .name = "ICA",
  537. },
  538. [HFI_CMD_SESSION_CVP_ICA_FRAME - HFI_CMD_SESSION_CVP_START] =
  539. {
  540. .size = HFI_ICA_FRAME_CMD_SIZE,
  541. .type =HFI_CMD_SESSION_CVP_ICA_FRAME,
  542. .is_config_pkt = false,
  543. .resp = HAL_NO_RESP,
  544. .name = "ICA_FRAME",
  545. .force_kernel_fence = false,
  546. },
  547. [HFI_CMD_SESSION_CVP_HCD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  548. {
  549. .size = HFI_HCD_CONFIG_CMD_SIZE,
  550. .type = HFI_CMD_SESSION_CVP_HCD_CONFIG,
  551. .is_config_pkt = true,
  552. .resp = HAL_NO_RESP,
  553. .name = "HCD",
  554. },
  555. [HFI_CMD_SESSION_CVP_HCD_FRAME - HFI_CMD_SESSION_CVP_START] =
  556. {
  557. .size = HFI_HCD_FRAME_CMD_SIZE,
  558. .type = HFI_CMD_SESSION_CVP_HCD_FRAME,
  559. .is_config_pkt = false,
  560. .resp = HAL_NO_RESP,
  561. .name = "HCD_FRAME",
  562. .force_kernel_fence = false,
  563. },
  564. [HFI_CMD_SESSION_CVP_DC_CONFIG - HFI_CMD_SESSION_CVP_START] =
  565. {
  566. .size = HFI_DCM_CONFIG_CMD_SIZE,
  567. .type = HFI_CMD_SESSION_CVP_DC_CONFIG,
  568. .is_config_pkt = true,
  569. .resp = HAL_NO_RESP,
  570. .name = "DC",
  571. },
  572. [HFI_CMD_SESSION_CVP_DC_FRAME - HFI_CMD_SESSION_CVP_START] =
  573. {
  574. .size = HFI_DCM_FRAME_CMD_SIZE,
  575. .type = HFI_CMD_SESSION_CVP_DC_FRAME,
  576. .is_config_pkt = false,
  577. .resp = HAL_NO_RESP,
  578. .name = "DC_FRAME",
  579. .force_kernel_fence = false,
  580. },
  581. [HFI_CMD_SESSION_CVP_DCM_CONFIG - HFI_CMD_SESSION_CVP_START] =
  582. {
  583. .size = HFI_DCM_CONFIG_CMD_SIZE,
  584. .type = HFI_CMD_SESSION_CVP_DCM_CONFIG,
  585. .is_config_pkt = true,
  586. .resp = HAL_NO_RESP,
  587. .name = "DCM",
  588. },
  589. [HFI_CMD_SESSION_CVP_DCM_FRAME - HFI_CMD_SESSION_CVP_START] =
  590. {
  591. .size = HFI_DCM_FRAME_CMD_SIZE,
  592. .type = HFI_CMD_SESSION_CVP_DCM_FRAME,
  593. .is_config_pkt = false,
  594. .resp = HAL_NO_RESP,
  595. .name = "DCM_FRAME",
  596. .force_kernel_fence = false,
  597. },
  598. [HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  599. {
  600. .size = HFI_PYS_HCD_CONFIG_CMD_SIZE,
  601. .type = HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG,
  602. .is_config_pkt = true,
  603. .resp = HAL_NO_RESP,
  604. .name = "PYS_HCD",
  605. },
  606. [HFI_CMD_SESSION_CVP_PYS_HCD_FRAME - HFI_CMD_SESSION_CVP_START] =
  607. {
  608. .size = HFI_PYS_HCD_FRAME_CMD_SIZE,
  609. .type = HFI_CMD_SESSION_CVP_PYS_HCD_FRAME,
  610. .is_config_pkt = false,
  611. .resp = HAL_NO_RESP,
  612. .name = "PYS_HCD_FRAME",
  613. .force_kernel_fence = true,
  614. },
  615. [HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  616. {
  617. .size = 0xFFFFFFFF,
  618. .type = HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS,
  619. .is_config_pkt = true,
  620. .resp = HAL_NO_RESP,
  621. .name = "SET_MODEL",
  622. },
  623. [HFI_CMD_SESSION_CVP_SET_SNAPSHOT_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  624. {
  625. .size = 0xFFFFFFFF,
  626. .type = HFI_CMD_SESSION_CVP_SET_SNAPSHOT_BUFFERS,
  627. .is_config_pkt = false,
  628. .resp = HAL_NO_RESP,
  629. .name = "SET_SNAPSHOT",
  630. },
  631. [HFI_CMD_SESSION_CVP_RELEASE_SNAPSHOT_BUFFERS - HFI_CMD_SESSION_CVP_START] =
  632. {
  633. .size = 0xFFFFFFFF,
  634. .type = HFI_CMD_SESSION_CVP_RELEASE_SNAPSHOT_BUFFERS,
  635. .is_config_pkt = false,
  636. .resp = HAL_NO_RESP,
  637. .name = "REL_SNAPSHOT",
  638. },
  639. [HFI_CMD_SESSION_CVP_SET_SNAPSHOT_MODE - HFI_CMD_SESSION_CVP_START] =
  640. {
  641. .size = 0xFFFFFFFF,
  642. .type = HFI_CMD_SESSION_CVP_SET_SNAPSHOT_MODE,
  643. .is_config_pkt = true,
  644. .resp = HAL_NO_RESP,
  645. .name = "SNAPSHOT_MODE",
  646. },
  647. [HFI_CMD_SESSION_CVP_SNAPSHOT_WRITE_DONE - HFI_CMD_SESSION_CVP_START] =
  648. {
  649. .size = 0xFFFFFFFF,
  650. .type = HFI_CMD_SESSION_CVP_SNAPSHOT_WRITE_DONE,
  651. .is_config_pkt = true,
  652. .resp = HAL_NO_RESP,
  653. .name = "SNAPSHOT_DONE",
  654. },
  655. [HFI_CMD_SESSION_CVP_FD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  656. {
  657. .size = 0xFFFFFFFF,
  658. .type = HFI_CMD_SESSION_CVP_FD_CONFIG,
  659. .is_config_pkt = true,
  660. .resp = HAL_NO_RESP,
  661. .name = "FD",
  662. },
  663. [HFI_CMD_SESSION_CVP_FD_FRAME - HFI_CMD_SESSION_CVP_START] =
  664. {
  665. .size = 0xFFFFFFFF,
  666. .type = HFI_CMD_SESSION_CVP_FD_FRAME,
  667. .is_config_pkt = false,
  668. .resp = HAL_NO_RESP,
  669. .name = "FD_FRAME",
  670. },
  671. [HFI_CMD_SESSION_CVP_XRA_FRAME - HFI_CMD_SESSION_CVP_START] =
  672. {
  673. .size = 0xFFFFFFFF,
  674. .type = HFI_CMD_SESSION_CVP_XRA_FRAME,
  675. .is_config_pkt = false,
  676. .resp = HAL_NO_RESP,
  677. .name = "XRA_FRAME",
  678. },
  679. [HFI_CMD_SESSION_CVP_XRA_CONFIG - HFI_CMD_SESSION_CVP_START] =
  680. {
  681. .size = 0xFFFFFFFF,
  682. .type = HFI_CMD_SESSION_CVP_XRA_CONFIG,
  683. .is_config_pkt = true,
  684. .resp = HAL_NO_RESP,
  685. .name = "XRA_CONFIG",
  686. },
  687. [HFI_CMD_SESSION_CVP_XRA_BLOB_FRAME - HFI_CMD_SESSION_CVP_START] =
  688. {
  689. .size = 0xFFFFFFFF,
  690. .type = HFI_CMD_SESSION_CVP_XRA_BLOB_FRAME,
  691. .is_config_pkt = false,
  692. .resp = HAL_NO_RESP,
  693. .name = "XRA_BLOB_FRAME",
  694. },
  695. [HFI_CMD_SESSION_CVP_XRA_BLOB_CONFIG - HFI_CMD_SESSION_CVP_START] =
  696. {
  697. .size = 0xFFFFFFFF,
  698. .type = HFI_CMD_SESSION_CVP_XRA_BLOB_CONFIG,
  699. .is_config_pkt = true,
  700. .resp = HAL_NO_RESP,
  701. .name = "XRA_BLOB_CONFIG",
  702. },
  703. [HFI_CMD_SESSION_CVP_XRA_PATCH_FRAME - HFI_CMD_SESSION_CVP_START] =
  704. {
  705. .size = 0xFFFFFFFF,
  706. .type = HFI_CMD_SESSION_CVP_XRA_PATCH_FRAME,
  707. .is_config_pkt = false,
  708. .resp = HAL_NO_RESP,
  709. .name = "XRA_PATCH_FRAME",
  710. .force_kernel_fence = false,
  711. },
  712. [HFI_CMD_SESSION_CVP_XRA_PATCH_CONFIG - HFI_CMD_SESSION_CVP_START] =
  713. {
  714. .size = 0xFFFFFFFF,
  715. .type = HFI_CMD_SESSION_CVP_XRA_PATCH_CONFIG,
  716. .is_config_pkt = true,
  717. .resp = HAL_NO_RESP,
  718. .name = "XRA_PATCH_CONFIG",
  719. },
  720. [HFI_CMD_SESSION_CVP_XRA_MATCH_FRAME - HFI_CMD_SESSION_CVP_START] =
  721. {
  722. .size = 0xFFFFFFFF,
  723. .type = HFI_CMD_SESSION_CVP_XRA_MATCH_FRAME,
  724. .is_config_pkt = false,
  725. .resp = HAL_NO_RESP,
  726. .name = "XRA_MATCH_FRAME",
  727. .force_kernel_fence = false,
  728. },
  729. [HFI_CMD_SESSION_CVP_XRA_MATCH_CONFIG - HFI_CMD_SESSION_CVP_START] =
  730. {
  731. .size = 0xFFFFFFFF,
  732. .type = HFI_CMD_SESSION_CVP_XRA_MATCH_CONFIG,
  733. .is_config_pkt = true,
  734. .resp = HAL_NO_RESP,
  735. .name = "XRA_MATCH_CONFIG",
  736. },
  737. [HFI_CMD_SESSION_CVP_RGE_FRAME - HFI_CMD_SESSION_CVP_START] =
  738. {
  739. .size = 0xFFFFFFFF,
  740. .type = HFI_CMD_SESSION_CVP_RGE_FRAME,
  741. .is_config_pkt = false,
  742. .resp = HAL_NO_RESP,
  743. .name = "RGE_FRAME",
  744. .force_kernel_fence = true,
  745. },
  746. [HFI_CMD_SESSION_CVP_RGE_CONFIG - HFI_CMD_SESSION_CVP_START] =
  747. {
  748. .size = 0xFFFFFFFF,
  749. .type = HFI_CMD_SESSION_CVP_RGE_CONFIG,
  750. .is_config_pkt = true,
  751. .resp = HAL_NO_RESP,
  752. .name = "RGE_CONFIG",
  753. },
  754. [HFI_CMD_SESSION_EVA_ITOF_FRAME - HFI_CMD_SESSION_CVP_START] =
  755. {
  756. .size = 0xFFFFFFFF,
  757. .type = HFI_CMD_SESSION_EVA_ITOF_FRAME,
  758. .is_config_pkt = false,
  759. .resp = HAL_NO_RESP,
  760. .name = "ITOF_FRAME",
  761. .force_kernel_fence = true,
  762. },
  763. [HFI_CMD_SESSION_EVA_ITOF_CONFIG - HFI_CMD_SESSION_CVP_START] =
  764. {
  765. .size = 0xFFFFFFFF,
  766. .type = HFI_CMD_SESSION_EVA_ITOF_CONFIG,
  767. .is_config_pkt = true,
  768. .resp = HAL_NO_RESP,
  769. .name = "ITOF_CONFIG",
  770. },
  771. [HFI_CMD_SESSION_EVA_DLFD_FRAME - HFI_CMD_SESSION_CVP_START] =
  772. {
  773. .size = 0xFFFFFFFF,
  774. .type = HFI_CMD_SESSION_EVA_DLFD_FRAME,
  775. .is_config_pkt = false,
  776. .resp = HAL_NO_RESP,
  777. .name = "DLFD_FRAME",
  778. },
  779. [HFI_CMD_SESSION_EVA_DLFD_CONFIG - HFI_CMD_SESSION_CVP_START] =
  780. {
  781. .size = 0xFFFFFFFF,
  782. .type = HFI_CMD_SESSION_EVA_DLFD_CONFIG,
  783. .is_config_pkt = true,
  784. .resp = HAL_NO_RESP,
  785. .name = "DLFD_CONFIG",
  786. },
  787. [HFI_CMD_SESSION_EVA_DLFL_FRAME - HFI_CMD_SESSION_CVP_START] =
  788. {
  789. .size = 0xFFFFFFFF,
  790. .type = HFI_CMD_SESSION_EVA_DLFL_FRAME,
  791. .is_config_pkt = false,
  792. .resp = HAL_NO_RESP,
  793. .name = "DLFL_FRAME",
  794. .force_kernel_fence = false,
  795. },
  796. [HFI_CMD_SESSION_EVA_DLFL_CONFIG - HFI_CMD_SESSION_CVP_START] =
  797. {
  798. .size = 0xFFFFFFFF,
  799. .type = HFI_CMD_SESSION_EVA_DLFL_CONFIG,
  800. .is_config_pkt = true,
  801. .resp = HAL_NO_RESP,
  802. .name = "DLFL_CONFIG",
  803. },
  804. [HFI_CMD_SESSION_CVP_SYNX - HFI_CMD_SESSION_CVP_START] =
  805. {
  806. .size = 0xFFFFFFFF,
  807. .type = HFI_CMD_SESSION_CVP_SYNX,
  808. .is_config_pkt = true,
  809. .resp = HAL_NO_RESP,
  810. .name = "SYNX_TEST",
  811. },
  812. [HFI_CMD_SESSION_EVA_DME_ONLY_CONFIG - HFI_CMD_SESSION_CVP_START] =
  813. {
  814. .size = 0xFFFFFFFF,
  815. .type = HFI_CMD_SESSION_EVA_DME_ONLY_CONFIG,
  816. .is_config_pkt = true,
  817. .resp = HAL_NO_RESP,
  818. .name = "DME_CONFIG",
  819. },
  820. [HFI_CMD_SESSION_EVA_DME_ONLY_FRAME - HFI_CMD_SESSION_CVP_START] =
  821. {
  822. .size = 0xFFFFFFFF,
  823. .type = HFI_CMD_SESSION_EVA_DME_ONLY_FRAME,
  824. .is_config_pkt = false,
  825. .resp = HAL_NO_RESP,
  826. .name = "DME_FRAME",
  827. .force_kernel_fence = true,
  828. },
  829. };
  830. int get_pkt_index(struct cvp_hal_session_cmd_pkt *hdr)
  831. {
  832. if (!hdr || (hdr->packet_type < HFI_CMD_SESSION_CVP_START)
  833. || hdr->packet_type >= (HFI_CMD_SESSION_CVP_START + MAX_PKT_IDX))
  834. return -EINVAL;
  835. if (cvp_hfi_defs[hdr->packet_type - HFI_CMD_SESSION_CVP_START].size)
  836. return (hdr->packet_type - HFI_CMD_SESSION_CVP_START);
  837. return -EINVAL;
  838. }
  839. int get_pkt_fenceoverride(struct cvp_hal_session_cmd_pkt* hdr)
  840. {
  841. return cvp_hfi_defs[hdr->packet_type - HFI_CMD_SESSION_CVP_START].force_kernel_fence;
  842. }
  843. int get_pkt_index_from_type(u32 pkt_type)
  844. {
  845. if ((pkt_type < HFI_CMD_SESSION_CVP_START) ||
  846. pkt_type >= (HFI_CMD_SESSION_CVP_START + MAX_PKT_IDX))
  847. return -EINVAL;
  848. if (cvp_hfi_defs[pkt_type - HFI_CMD_SESSION_CVP_START].size)
  849. return (pkt_type - HFI_CMD_SESSION_CVP_START);
  850. return -EINVAL;
  851. }
  852. MODULE_DEVICE_TABLE(of, msm_cvp_dt_match);
  853. int cvp_of_fdt_get_ddrtype(void)
  854. {
  855. #ifdef FIXED_DDR_TYPE
  856. /* of_fdt_get_ddrtype() is usually unavailable during pre-sil */
  857. return DDR_TYPE_LPDDR5;
  858. #else
  859. return of_fdt_get_ddrtype();
  860. #endif
  861. }
  862. void *cvp_get_drv_data(struct device *dev)
  863. {
  864. struct msm_cvp_platform_data *driver_data;
  865. const struct of_device_id *match;
  866. uint32_t ddr_type = DDR_TYPE_LPDDR5;
  867. driver_data = &default_data;
  868. if (!IS_ENABLED(CONFIG_OF) || !dev->of_node)
  869. goto exit;
  870. match = of_match_node(msm_cvp_dt_match, dev->of_node);
  871. if (!match)
  872. return NULL;
  873. driver_data = (struct msm_cvp_platform_data *)match->data;
  874. if (!strcmp(match->compatible, "qcom,waipio-cvp")) {
  875. ddr_type = cvp_of_fdt_get_ddrtype();
  876. if (ddr_type == -ENOENT) {
  877. dprintk(CVP_ERR,
  878. "Failed to get ddr type, use LPDDR5\n");
  879. }
  880. if (driver_data->ubwc_config &&
  881. (ddr_type == DDR_TYPE_LPDDR4 ||
  882. ddr_type == DDR_TYPE_LPDDR4X))
  883. driver_data->ubwc_config->highest_bank_bit = 15;
  884. dprintk(CVP_CORE, "DDR Type 0x%x hbb 0x%x\n",
  885. ddr_type, driver_data->ubwc_config ?
  886. driver_data->ubwc_config->highest_bank_bit : -1);
  887. }
  888. exit:
  889. return driver_data;
  890. }