dp_be.c 109 KB

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  1. /*
  2. * Copyright (c) 2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include <wlan_utility.h>
  20. #include <dp_internal.h>
  21. #include "dp_rings.h"
  22. #include <dp_htt.h>
  23. #include "dp_be.h"
  24. #include "dp_be_tx.h"
  25. #include "dp_be_rx.h"
  26. #ifdef WIFI_MONITOR_SUPPORT
  27. #if !defined(DISABLE_MON_CONFIG) && (defined(WLAN_PKT_CAPTURE_TX_2_0) || \
  28. defined(WLAN_PKT_CAPTURE_RX_2_0))
  29. #include "dp_mon_2.0.h"
  30. #endif
  31. #include "dp_mon.h"
  32. #endif
  33. #include <hal_be_api.h>
  34. #ifdef WLAN_SUPPORT_PPEDS
  35. #include "be/dp_ppeds.h"
  36. #include <ppe_vp_public.h>
  37. #include <ppe_drv_sc.h>
  38. #endif
  39. #ifdef WLAN_SUPPORT_PPEDS
  40. static const char *ring_usage_dump[RING_USAGE_MAX] = {
  41. "100%",
  42. "Greater than 90%",
  43. "70 to 90%",
  44. "50 to 70%",
  45. "Less than 50%"
  46. };
  47. #endif
  48. /* Generic AST entry aging timer value */
  49. #define DP_AST_AGING_TIMER_DEFAULT_MS 5000
  50. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  51. #define DP_TX_VDEV_ID_CHECK_ENABLE 0
  52. static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
  53. {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
  54. {1, 4, HAL_BE_WBM_SW4_BM_ID, 0},
  55. {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
  56. #ifdef QCA_WIFI_KIWI_V2
  57. {3, 5, HAL_BE_WBM_SW5_BM_ID, 0},
  58. {4, 6, HAL_BE_WBM_SW6_BM_ID, 0}
  59. #else
  60. {3, 6, HAL_BE_WBM_SW5_BM_ID, 0},
  61. {4, 7, HAL_BE_WBM_SW6_BM_ID, 0}
  62. #endif
  63. };
  64. #else
  65. #define DP_TX_VDEV_ID_CHECK_ENABLE 1
  66. static struct wlan_cfg_tcl_wbm_ring_num_map g_tcl_wbm_map_array[MAX_TCL_DATA_RINGS] = {
  67. {.tcl_ring_num = 0, .wbm_ring_num = 0, .wbm_rbm_id = HAL_BE_WBM_SW0_BM_ID, .for_ipa = 0},
  68. {1, 1, HAL_BE_WBM_SW1_BM_ID, 0},
  69. {2, 2, HAL_BE_WBM_SW2_BM_ID, 0},
  70. {3, 3, HAL_BE_WBM_SW3_BM_ID, 0},
  71. {4, 4, HAL_BE_WBM_SW4_BM_ID, 0}
  72. };
  73. #endif
  74. #ifdef WLAN_SUPPORT_PPEDS
  75. static struct cdp_ppeds_txrx_ops dp_ops_ppeds_be = {
  76. .ppeds_entry_attach = dp_ppeds_attach_vdev_be,
  77. .ppeds_entry_detach = dp_ppeds_detach_vdev_be,
  78. .ppeds_set_int_pri2tid = dp_ppeds_set_int_pri2tid_be,
  79. .ppeds_update_int_pri2tid = dp_ppeds_update_int_pri2tid_be,
  80. .ppeds_entry_dump = dp_ppeds_dump_ppe_vp_tbl_be,
  81. .ppeds_enable_pri2tid = dp_ppeds_vdev_enable_pri2tid_be,
  82. .ppeds_vp_setup_recovery = dp_ppeds_vp_setup_on_fw_recovery,
  83. .ppeds_stats_sync = dp_ppeds_stats_sync_be,
  84. };
  85. static void dp_ppeds_rings_status(struct dp_soc *soc)
  86. {
  87. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  88. dp_print_ring_stat_from_hal(soc, &be_soc->reo2ppe_ring, REO2PPE);
  89. dp_print_ring_stat_from_hal(soc, &be_soc->ppe2tcl_ring, PPE2TCL);
  90. dp_print_ring_stat_from_hal(soc, &be_soc->ppeds_wbm_release_ring,
  91. WBM2SW_RELEASE);
  92. }
  93. #ifdef GLOBAL_ASSERT_AVOIDANCE
  94. void dp_ppeds_print_assert_war_stats(struct dp_soc_be *be_soc)
  95. {
  96. DP_PRINT_STATS("PPE-DS Tx WAR stats: [%u] [%u] [%u]",
  97. be_soc->ppeds_stats.tx.tx_comp_buf_src,
  98. be_soc->ppeds_stats.tx.tx_comp_desc_null,
  99. be_soc->ppeds_stats.tx.tx_comp_invalid_flag);
  100. }
  101. static void dp_ppeds_clear_assert_war_stats(struct dp_soc_be *be_soc)
  102. {
  103. be_soc->ppeds_stats.tx.tx_comp_buf_src = 0;
  104. be_soc->ppeds_stats.tx.tx_comp_desc_null = 0;
  105. be_soc->ppeds_stats.tx.tx_comp_invalid_flag = 0;
  106. }
  107. #else
  108. static void dp_ppeds_print_assert_war_stats(struct dp_soc_be *be_soc)
  109. {
  110. }
  111. static void dp_ppeds_clear_assert_war_stats(struct dp_soc_be *be_soc)
  112. {
  113. }
  114. #endif
  115. static void dp_ppeds_inuse_desc(struct dp_soc *soc)
  116. {
  117. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  118. DP_PRINT_STATS("PPE-DS Tx Descriptors in Use = %u num_free %u",
  119. be_soc->ppeds_tx_desc.num_allocated,
  120. be_soc->ppeds_tx_desc.num_free);
  121. DP_PRINT_STATS("PPE-DS Tx desc alloc failed %u",
  122. be_soc->ppeds_stats.tx.desc_alloc_failed);
  123. dp_ppeds_print_assert_war_stats(be_soc);
  124. }
  125. static void dp_ppeds_clear_stats(struct dp_soc *soc)
  126. {
  127. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  128. be_soc->ppeds_stats.tx.desc_alloc_failed = 0;
  129. dp_ppeds_clear_assert_war_stats(be_soc);
  130. }
  131. static void dp_ppeds_rings_stats(struct dp_soc *soc)
  132. {
  133. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  134. int i = 0;
  135. DP_PRINT_STATS("Ring utilization statistics");
  136. DP_PRINT_STATS("WBM2SW_RELEASE");
  137. for (i = 0; i < RING_USAGE_MAX; i++)
  138. DP_PRINT_STATS("\t %s utilized %d instances",
  139. ring_usage_dump[i],
  140. be_soc->ppeds_wbm_release_ring.stats.util[i]);
  141. DP_PRINT_STATS("PPE2TCL");
  142. for (i = 0; i < RING_USAGE_MAX; i++)
  143. DP_PRINT_STATS("\t %s utilized %d instances",
  144. ring_usage_dump[i],
  145. be_soc->ppe2tcl_ring.stats.util[i]);
  146. }
  147. static void dp_ppeds_clear_rings_stats(struct dp_soc *soc)
  148. {
  149. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  150. memset(&be_soc->ppeds_wbm_release_ring.stats, 0,
  151. sizeof(struct ring_util_stats));
  152. memset(&be_soc->ppe2tcl_ring.stats, 0, sizeof(struct ring_util_stats));
  153. }
  154. #endif
  155. static void dp_soc_cfg_attach_be(struct dp_soc *soc)
  156. {
  157. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  158. dp_soc_cfg_attach(soc);
  159. wlan_cfg_set_rx_rel_ring_id(soc_cfg_ctx, WBM2SW_REL_ERR_RING_NUM);
  160. soc->wlan_cfg_ctx->tcl_wbm_map_array = g_tcl_wbm_map_array;
  161. /* this is used only when dmac mode is enabled */
  162. soc->num_rx_refill_buf_rings = 1;
  163. /*
  164. * do not allocate TCL credit ring for BE as we already have
  165. * 4 TCL_DATA rings
  166. */
  167. soc->init_tcl_cmd_cred_ring = false;
  168. soc->wlan_cfg_ctx->notify_frame_support =
  169. DP_MARK_NOTIFY_FRAME_SUPPORT;
  170. }
  171. qdf_size_t dp_get_context_size_be(enum dp_context_type context_type)
  172. {
  173. switch (context_type) {
  174. case DP_CONTEXT_TYPE_SOC:
  175. return sizeof(struct dp_soc_be);
  176. case DP_CONTEXT_TYPE_PDEV:
  177. return sizeof(struct dp_pdev_be);
  178. case DP_CONTEXT_TYPE_VDEV:
  179. return sizeof(struct dp_vdev_be);
  180. case DP_CONTEXT_TYPE_PEER:
  181. return sizeof(struct dp_peer_be);
  182. default:
  183. return 0;
  184. }
  185. }
  186. #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
  187. static uint64_t dp_get_cmem_chunk(struct dp_soc *soc, uint64_t size,
  188. enum CMEM_MEM_CLIENTS client)
  189. {
  190. uint64_t cmem_chunk;
  191. dp_info("cmem base 0x%llx, total size 0x%llx avail_size 0x%llx",
  192. soc->cmem_base, soc->cmem_total_size, soc->cmem_avail_size);
  193. /* Check if requested cmem space is available */
  194. if (soc->cmem_avail_size < size) {
  195. dp_err("cmem_size 0x%llx bytes < requested size 0x%llx bytes",
  196. soc->cmem_avail_size, size);
  197. return 0;
  198. }
  199. cmem_chunk = soc->cmem_base +
  200. (soc->cmem_total_size - soc->cmem_avail_size);
  201. soc->cmem_avail_size -= size;
  202. dp_info("Reserved cmem space 0x%llx, size 0x%llx for client %d",
  203. cmem_chunk, size, client);
  204. return cmem_chunk;
  205. }
  206. #endif
  207. #ifdef WLAN_SUPPORT_RX_FISA
  208. static uint64_t dp_get_fst_cmem_base_be(struct dp_soc *soc, uint64_t size)
  209. {
  210. return dp_get_cmem_chunk(soc, size, FISA_FST);
  211. }
  212. static void dp_initialize_arch_ops_be_fisa(struct dp_arch_ops *arch_ops)
  213. {
  214. arch_ops->dp_get_fst_cmem_base = dp_get_fst_cmem_base_be;
  215. }
  216. #else
  217. static void dp_initialize_arch_ops_be_fisa(struct dp_arch_ops *arch_ops)
  218. {
  219. }
  220. #endif
  221. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  222. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  223. /**
  224. * dp_cc_wbm_sw_en_cfg() - configure HW cookie conversion enablement
  225. * per wbm2sw ring
  226. *
  227. * @cc_cfg: HAL HW cookie conversion configuration structure pointer
  228. *
  229. * Return: None
  230. */
  231. #ifdef IPA_OPT_WIFI_DP
  232. static inline
  233. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  234. {
  235. cc_cfg->wbm2sw6_cc_en = 1;
  236. cc_cfg->wbm2sw5_cc_en = 0;
  237. cc_cfg->wbm2sw4_cc_en = 1;
  238. cc_cfg->wbm2sw3_cc_en = 1;
  239. cc_cfg->wbm2sw2_cc_en = 1;
  240. /* disable wbm2sw1 hw cc as it's for FW */
  241. cc_cfg->wbm2sw1_cc_en = 0;
  242. cc_cfg->wbm2sw0_cc_en = 1;
  243. cc_cfg->wbm2fw_cc_en = 0;
  244. }
  245. #else
  246. static inline
  247. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  248. {
  249. cc_cfg->wbm2sw6_cc_en = 1;
  250. cc_cfg->wbm2sw5_cc_en = 1;
  251. cc_cfg->wbm2sw4_cc_en = 1;
  252. cc_cfg->wbm2sw3_cc_en = 1;
  253. cc_cfg->wbm2sw2_cc_en = 1;
  254. /* disable wbm2sw1 hw cc as it's for FW */
  255. cc_cfg->wbm2sw1_cc_en = 0;
  256. cc_cfg->wbm2sw0_cc_en = 1;
  257. cc_cfg->wbm2fw_cc_en = 0;
  258. }
  259. #endif
  260. #else
  261. static inline
  262. void dp_cc_wbm_sw_en_cfg(struct hal_hw_cc_config *cc_cfg)
  263. {
  264. cc_cfg->wbm2sw6_cc_en = 1;
  265. cc_cfg->wbm2sw5_cc_en = 1;
  266. cc_cfg->wbm2sw4_cc_en = 1;
  267. cc_cfg->wbm2sw3_cc_en = 1;
  268. cc_cfg->wbm2sw2_cc_en = 1;
  269. cc_cfg->wbm2sw1_cc_en = 1;
  270. cc_cfg->wbm2sw0_cc_en = 1;
  271. cc_cfg->wbm2fw_cc_en = 0;
  272. }
  273. #endif
  274. /**
  275. * dp_cc_reg_cfg_init() - initialize and configure HW cookie
  276. * conversion register
  277. *
  278. * @soc: SOC handle
  279. * @is_4k_align: page address 4k aligned
  280. *
  281. * Return: None
  282. */
  283. static void dp_cc_reg_cfg_init(struct dp_soc *soc,
  284. bool is_4k_align)
  285. {
  286. struct hal_hw_cc_config cc_cfg = { 0 };
  287. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  288. if (soc->cdp_soc.ol_ops->get_con_mode &&
  289. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_FTM_MODE)
  290. return;
  291. if (!soc->wlan_cfg_ctx->hw_cc_enabled) {
  292. dp_info("INI skip HW CC register setting");
  293. return;
  294. }
  295. cc_cfg.lut_base_addr_31_0 = be_soc->cc_cmem_base;
  296. cc_cfg.cc_global_en = true;
  297. cc_cfg.page_4k_align = is_4k_align;
  298. cc_cfg.cookie_offset_msb = DP_CC_DESC_ID_SPT_VA_OS_MSB;
  299. cc_cfg.cookie_page_msb = DP_CC_DESC_ID_PPT_PAGE_OS_MSB;
  300. /* 36th bit should be 1 then HW know this is CMEM address */
  301. cc_cfg.lut_base_addr_39_32 = 0x10;
  302. cc_cfg.error_path_cookie_conv_en = true;
  303. cc_cfg.release_path_cookie_conv_en = true;
  304. dp_cc_wbm_sw_en_cfg(&cc_cfg);
  305. hal_cookie_conversion_reg_cfg_be(soc->hal_soc, &cc_cfg);
  306. }
  307. /**
  308. * dp_hw_cc_cmem_write() - DP wrapper function for CMEM buffer writing
  309. * @hal_soc_hdl: HAL SOC handle
  310. * @offset: CMEM address
  311. * @value: value to write
  312. *
  313. * Return: None.
  314. */
  315. static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
  316. uint32_t offset,
  317. uint32_t value)
  318. {
  319. hal_cmem_write(hal_soc_hdl, offset, value);
  320. }
  321. /**
  322. * dp_hw_cc_cmem_addr_init() - Check and initialize CMEM base address for
  323. * HW cookie conversion
  324. *
  325. * @soc: SOC handle
  326. *
  327. * Return: 0 in case of success, else error value
  328. */
  329. static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
  330. {
  331. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  332. be_soc->cc_cmem_base = dp_get_cmem_chunk(soc, DP_CC_PPT_MEM_SIZE,
  333. COOKIE_CONVERSION);
  334. return QDF_STATUS_SUCCESS;
  335. }
  336. #else
  337. static inline void dp_cc_reg_cfg_init(struct dp_soc *soc,
  338. bool is_4k_align) {}
  339. static inline void dp_hw_cc_cmem_write(hal_soc_handle_t hal_soc_hdl,
  340. uint32_t offset,
  341. uint32_t value)
  342. { }
  343. static inline QDF_STATUS dp_hw_cc_cmem_addr_init(struct dp_soc *soc)
  344. {
  345. return QDF_STATUS_SUCCESS;
  346. }
  347. #endif
  348. #if defined(DP_FEATURE_HW_COOKIE_CONVERSION) || defined(WLAN_SUPPORT_RX_FISA)
  349. static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
  350. uint8_t for_feature)
  351. {
  352. QDF_STATUS status = QDF_STATUS_E_NOMEM;
  353. switch (for_feature) {
  354. case COOKIE_CONVERSION:
  355. status = dp_hw_cc_cmem_addr_init(soc);
  356. break;
  357. default:
  358. dp_err("Invalid CMEM request");
  359. }
  360. return status;
  361. }
  362. #else
  363. static QDF_STATUS dp_get_cmem_allocation(struct dp_soc *soc,
  364. uint8_t for_feature)
  365. {
  366. return QDF_STATUS_SUCCESS;
  367. }
  368. #endif
  369. QDF_STATUS
  370. dp_hw_cookie_conversion_attach(struct dp_soc_be *be_soc,
  371. struct dp_hw_cookie_conversion_t *cc_ctx,
  372. uint32_t num_descs,
  373. enum qdf_dp_desc_type desc_type,
  374. uint8_t desc_pool_id)
  375. {
  376. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  377. uint32_t num_spt_pages, i = 0;
  378. struct dp_spt_page_desc *spt_desc;
  379. struct qdf_mem_dma_page_t *dma_page;
  380. uint8_t chip_id;
  381. /* estimate how many SPT DDR pages needed */
  382. num_spt_pages = qdf_do_div(
  383. num_descs + (DP_CC_SPT_PAGE_MAX_ENTRIES - 1),
  384. DP_CC_SPT_PAGE_MAX_ENTRIES);
  385. num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
  386. num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
  387. dp_info("num_spt_pages needed %d", num_spt_pages);
  388. dp_desc_multi_pages_mem_alloc(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  389. &cc_ctx->page_pool, qdf_page_size,
  390. num_spt_pages, 0, false);
  391. if (!cc_ctx->page_pool.dma_pages) {
  392. dp_err("spt ddr pages allocation failed");
  393. return QDF_STATUS_E_RESOURCES;
  394. }
  395. cc_ctx->page_desc_base = qdf_mem_malloc(
  396. num_spt_pages * sizeof(struct dp_spt_page_desc));
  397. if (!cc_ctx->page_desc_base) {
  398. dp_err("spt page descs allocation failed");
  399. goto fail_0;
  400. }
  401. chip_id = dp_mlo_get_chip_id(soc);
  402. cc_ctx->cmem_offset = dp_desc_pool_get_cmem_base(chip_id, desc_pool_id,
  403. desc_type);
  404. /* initial page desc */
  405. spt_desc = cc_ctx->page_desc_base;
  406. dma_page = cc_ctx->page_pool.dma_pages;
  407. while (i < num_spt_pages) {
  408. /* check if page address 4K aligned */
  409. if (qdf_unlikely(dma_page[i].page_p_addr & 0xFFF)) {
  410. dp_err("non-4k aligned pages addr %pK",
  411. (void *)dma_page[i].page_p_addr);
  412. goto fail_1;
  413. }
  414. spt_desc[i].page_v_addr =
  415. dma_page[i].page_v_addr_start;
  416. spt_desc[i].page_p_addr =
  417. dma_page[i].page_p_addr;
  418. i++;
  419. }
  420. cc_ctx->total_page_num = num_spt_pages;
  421. qdf_spinlock_create(&cc_ctx->cc_lock);
  422. return QDF_STATUS_SUCCESS;
  423. fail_1:
  424. qdf_mem_free(cc_ctx->page_desc_base);
  425. cc_ctx->page_desc_base = NULL;
  426. fail_0:
  427. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  428. &cc_ctx->page_pool, 0, false);
  429. return QDF_STATUS_E_FAILURE;
  430. }
  431. QDF_STATUS
  432. dp_hw_cookie_conversion_detach(struct dp_soc_be *be_soc,
  433. struct dp_hw_cookie_conversion_t *cc_ctx)
  434. {
  435. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  436. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_CC_SPT_PAGE_TYPE,
  437. &cc_ctx->page_pool, 0, false);
  438. if (cc_ctx->page_desc_base)
  439. qdf_spinlock_destroy(&cc_ctx->cc_lock);
  440. qdf_mem_free(cc_ctx->page_desc_base);
  441. cc_ctx->page_desc_base = NULL;
  442. return QDF_STATUS_SUCCESS;
  443. }
  444. QDF_STATUS
  445. dp_hw_cookie_conversion_init(struct dp_soc_be *be_soc,
  446. struct dp_hw_cookie_conversion_t *cc_ctx)
  447. {
  448. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  449. uint32_t i = 0;
  450. struct dp_spt_page_desc *spt_desc;
  451. uint32_t ppt_index;
  452. uint32_t ppt_id_start;
  453. if (!cc_ctx->total_page_num) {
  454. dp_err("total page num is 0");
  455. return QDF_STATUS_E_INVAL;
  456. }
  457. ppt_id_start = DP_CMEM_OFFSET_TO_PPT_ID(cc_ctx->cmem_offset);
  458. spt_desc = cc_ctx->page_desc_base;
  459. while (i < cc_ctx->total_page_num) {
  460. /* write page PA to CMEM */
  461. dp_hw_cc_cmem_write(soc->hal_soc,
  462. (cc_ctx->cmem_offset + be_soc->cc_cmem_base
  463. + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
  464. (spt_desc[i].page_p_addr >>
  465. DP_CC_PPT_ENTRY_HW_APEND_BITS_4K_ALIGNED));
  466. ppt_index = ppt_id_start + i;
  467. if (ppt_index >= DP_CC_PPT_MAX_ENTRIES)
  468. qdf_assert_always(0);
  469. spt_desc[i].ppt_index = ppt_index;
  470. be_soc->page_desc_base[ppt_index].page_v_addr =
  471. spt_desc[i].page_v_addr;
  472. i++;
  473. }
  474. return QDF_STATUS_SUCCESS;
  475. }
  476. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  477. QDF_STATUS
  478. dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
  479. struct dp_hw_cookie_conversion_t *cc_ctx)
  480. {
  481. uint32_t ppt_index;
  482. struct dp_spt_page_desc *spt_desc;
  483. int i = 0;
  484. spt_desc = cc_ctx->page_desc_base;
  485. while (i < cc_ctx->total_page_num) {
  486. ppt_index = spt_desc[i].ppt_index;
  487. be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
  488. i++;
  489. }
  490. return QDF_STATUS_SUCCESS;
  491. }
  492. #else
  493. QDF_STATUS
  494. dp_hw_cookie_conversion_deinit(struct dp_soc_be *be_soc,
  495. struct dp_hw_cookie_conversion_t *cc_ctx)
  496. {
  497. struct dp_soc *soc = DP_SOC_BE_GET_SOC(be_soc);
  498. uint32_t ppt_index;
  499. struct dp_spt_page_desc *spt_desc;
  500. int i = 0;
  501. spt_desc = cc_ctx->page_desc_base;
  502. while (i < cc_ctx->total_page_num) {
  503. /* reset PA in CMEM to NULL */
  504. dp_hw_cc_cmem_write(soc->hal_soc,
  505. (cc_ctx->cmem_offset + be_soc->cc_cmem_base
  506. + (i * DP_CC_PPT_ENTRY_SIZE_4K_ALIGNED)),
  507. 0);
  508. ppt_index = spt_desc[i].ppt_index;
  509. be_soc->page_desc_base[ppt_index].page_v_addr = NULL;
  510. i++;
  511. }
  512. return QDF_STATUS_SUCCESS;
  513. }
  514. #endif
  515. #ifdef WLAN_SUPPORT_PPEDS
  516. static QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
  517. {
  518. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  519. int target_type = hal_get_target_type(soc->hal_soc);
  520. struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
  521. /*
  522. * Check if PPE DS is enabled and wlan soc supports it.
  523. */
  524. if (!wlan_cfg_get_dp_soc_ppeds_enable(soc->wlan_cfg_ctx) ||
  525. !dp_ppeds_target_supported(target_type))
  526. return QDF_STATUS_SUCCESS;
  527. if (dp_ppeds_attach_soc_be(be_soc) != QDF_STATUS_SUCCESS)
  528. return QDF_STATUS_SUCCESS;
  529. cdp_ops->ppeds_ops = &dp_ops_ppeds_be;
  530. return QDF_STATUS_SUCCESS;
  531. }
  532. static QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
  533. {
  534. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  535. struct cdp_ops *cdp_ops = soc->cdp_soc.ops;
  536. if (!be_soc->ppeds_handle)
  537. return QDF_STATUS_E_FAILURE;
  538. dp_ppeds_detach_soc_be(be_soc);
  539. cdp_ops->ppeds_ops = NULL;
  540. return QDF_STATUS_SUCCESS;
  541. }
  542. static QDF_STATUS dp_peer_ppeds_default_route_be(struct dp_soc *soc,
  543. struct dp_peer_be *be_peer,
  544. uint8_t vdev_id,
  545. uint16_t src_info)
  546. {
  547. uint16_t service_code;
  548. uint8_t priority_valid;
  549. uint8_t use_ppe_ds = PEER_ROUTING_USE_PPE;
  550. uint8_t peer_routing_enabled = PEER_ROUTING_ENABLED;
  551. QDF_STATUS status = QDF_STATUS_SUCCESS;
  552. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  553. struct dp_vdev_be *be_vdev;
  554. be_vdev = dp_get_be_vdev_from_dp_vdev(be_peer->peer.vdev);
  555. /*
  556. * Program service code bypass to avoid L2 new mac address
  557. * learning exception when fdb learning is disabled.
  558. */
  559. service_code = PPE_DRV_SC_SPF_BYPASS;
  560. priority_valid = be_peer->priority_valid;
  561. /*
  562. * if FST is enabled then let flow rule take the decision of
  563. * routing the pkt to DS or host
  564. */
  565. if (wlan_cfg_is_rx_flow_tag_enabled(cfg))
  566. use_ppe_ds = 0;
  567. if (soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing) {
  568. status =
  569. soc->cdp_soc.ol_ops->peer_set_ppeds_default_routing
  570. (soc->ctrl_psoc,
  571. be_peer->peer.mac_addr.raw,
  572. service_code, priority_valid,
  573. src_info, vdev_id, use_ppe_ds,
  574. peer_routing_enabled);
  575. if (status != QDF_STATUS_SUCCESS) {
  576. dp_err("vdev_id: %d, PPE peer routing mac:"
  577. QDF_MAC_ADDR_FMT, vdev_id,
  578. QDF_MAC_ADDR_REF(be_peer->peer.mac_addr.raw));
  579. return QDF_STATUS_E_FAILURE;
  580. }
  581. }
  582. return QDF_STATUS_SUCCESS;
  583. }
  584. #ifdef WLAN_FEATURE_11BE_MLO
  585. QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
  586. struct dp_peer *peer,
  587. struct dp_vdev_be *be_vdev,
  588. void *args)
  589. {
  590. struct dp_peer *mld_peer;
  591. struct dp_soc *mld_soc;
  592. struct dp_soc_be *be_soc;
  593. struct cdp_soc_t *cdp_soc;
  594. struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
  595. struct cdp_ds_vp_params vp_params = {0};
  596. struct dp_ppe_vp_profile *ppe_vp_profile = (struct dp_ppe_vp_profile *)args;
  597. uint16_t src_info = ppe_vp_profile->vp_num;
  598. uint8_t vdev_id = be_vdev->vdev.vdev_id;
  599. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  600. if (!be_peer) {
  601. dp_err("BE peer is null");
  602. return QDF_STATUS_E_NULL_VALUE;
  603. }
  604. if (IS_DP_LEGACY_PEER(peer)) {
  605. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  606. vdev_id, src_info);
  607. } else if (IS_MLO_DP_MLD_PEER(peer)) {
  608. int i;
  609. struct dp_peer *link_peer = NULL;
  610. struct dp_mld_link_peers link_peers_info;
  611. /* get link peers with reference */
  612. dp_get_link_peers_ref_from_mld_peer(soc, peer, &link_peers_info,
  613. DP_MOD_ID_DS);
  614. for (i = 0; i < link_peers_info.num_links; i++) {
  615. link_peer = link_peers_info.link_peers[i];
  616. be_peer = dp_get_be_peer_from_dp_peer(link_peer);
  617. if (!be_peer) {
  618. dp_err("BE peer is null");
  619. continue;
  620. }
  621. be_vdev = dp_get_be_vdev_from_dp_vdev(link_peer->vdev);
  622. if (!be_vdev) {
  623. dp_err("BE vap is null for peer id %d ",
  624. link_peer->peer_id);
  625. continue;
  626. }
  627. vdev_id = be_vdev->vdev.vdev_id;
  628. soc = link_peer->vdev->pdev->soc;
  629. qdf_status = dp_peer_ppeds_default_route_be(soc,
  630. be_peer,
  631. vdev_id,
  632. src_info);
  633. }
  634. dp_release_link_peers_ref(&link_peers_info, DP_MOD_ID_DS);
  635. } else {
  636. mld_peer = DP_GET_MLD_PEER_FROM_PEER(peer);
  637. if (!mld_peer)
  638. return qdf_status;
  639. /*
  640. * In case of MLO link peer,
  641. * Fetch the VP profile from the mld vdev.
  642. */
  643. be_vdev = dp_get_be_vdev_from_dp_vdev(mld_peer->vdev);
  644. if (!be_vdev) {
  645. dp_err("BE vap is null");
  646. return QDF_STATUS_E_NULL_VALUE;
  647. }
  648. /*
  649. * Extract the VP profile from the vap
  650. * in case of MLO peer, we have to get the profile from
  651. * the MLD vdev's osif handle and not the link peer.
  652. */
  653. mld_soc = mld_peer->vdev->pdev->soc;
  654. cdp_soc = &mld_soc->cdp_soc;
  655. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  656. dp_err("%pK: Register PPEDS profile info API before use", cdp_soc);
  657. return QDF_STATUS_E_NULL_VALUE;
  658. }
  659. qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(mld_soc->ctrl_psoc,
  660. mld_peer->vdev->vdev_id,
  661. &vp_params);
  662. if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
  663. dp_err("%pK: Failed to get ppeds profile for mld soc", mld_soc);
  664. return qdf_status;
  665. }
  666. /*
  667. * Check if PPE DS routing is enabled on
  668. * the associated vap.
  669. */
  670. if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
  671. return qdf_status;
  672. be_soc = dp_get_be_soc_from_dp_soc(mld_soc);
  673. ppe_vp_profile = &be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx];
  674. src_info = ppe_vp_profile->vp_num;
  675. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  676. vdev_id, src_info);
  677. }
  678. return qdf_status;
  679. }
  680. #else
  681. static QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc,
  682. struct dp_peer *peer,
  683. struct dp_vdev_be *be_vdev
  684. void *args)
  685. {
  686. struct dp_ppe_vp_profile *vp_profile = (struct dp_ppe_vp_profile *)args;
  687. struct dp_peer_be *be_peer = dp_get_be_peer_from_dp_peer(peer);
  688. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  689. if (!be_peer) {
  690. dp_err("BE peer is null");
  691. return QDF_STATUS_E_NULL_VALUE;
  692. }
  693. qdf_status = dp_peer_ppeds_default_route_be(soc, be_peer,
  694. be_vdev->vdev.vdev_id,
  695. vp_profile->vp_num);
  696. return qdf_status;
  697. }
  698. #endif
  699. #else
  700. static QDF_STATUS dp_ppeds_init_soc_be(struct dp_soc *soc)
  701. {
  702. return QDF_STATUS_SUCCESS;
  703. }
  704. static QDF_STATUS dp_ppeds_deinit_soc_be(struct dp_soc *soc)
  705. {
  706. return QDF_STATUS_SUCCESS;
  707. }
  708. static inline QDF_STATUS dp_soc_ppeds_attach_be(struct dp_soc *soc)
  709. {
  710. return QDF_STATUS_SUCCESS;
  711. }
  712. static inline QDF_STATUS dp_soc_ppeds_detach_be(struct dp_soc *soc)
  713. {
  714. return QDF_STATUS_SUCCESS;
  715. }
  716. QDF_STATUS dp_peer_setup_ppeds_be(struct dp_soc *soc, struct dp_peer *peer,
  717. struct dp_vdev_be *be_vdev,
  718. void *args)
  719. {
  720. return QDF_STATUS_SUCCESS;
  721. }
  722. static inline void dp_ppeds_stop_soc_be(struct dp_soc *soc)
  723. {
  724. }
  725. #endif /* WLAN_SUPPORT_PPEDS */
  726. void dp_reo_shared_qaddr_detach(struct dp_soc *soc)
  727. {
  728. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  729. REO_QUEUE_REF_ML_TABLE_SIZE,
  730. soc->reo_qref.mlo_reo_qref_table_vaddr,
  731. soc->reo_qref.mlo_reo_qref_table_paddr, 0);
  732. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  733. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  734. soc->reo_qref.non_mlo_reo_qref_table_vaddr,
  735. soc->reo_qref.non_mlo_reo_qref_table_paddr, 0);
  736. }
  737. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  738. static void dp_soc_tx_cookie_detach_be(struct dp_soc *soc)
  739. {
  740. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  741. int i = 0;
  742. struct dp_global_context *dp_global;
  743. dp_global = wlan_objmgr_get_global_ctx();
  744. dp_global->tx_cookie_ctx_alloc_cnt--;
  745. if (dp_global->tx_cookie_ctx_alloc_cnt == 0) {
  746. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  747. dp_hw_cookie_conversion_detach(be_soc,
  748. dp_global->tx_cc_ctx[i]);
  749. qdf_mem_free(dp_global->tx_cc_ctx[i]);
  750. }
  751. }
  752. dp_global->spcl_tx_cookie_ctx_alloc_cnt--;
  753. if (dp_global->spcl_tx_cookie_ctx_alloc_cnt == 0) {
  754. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  755. dp_hw_cookie_conversion_detach(
  756. be_soc,
  757. dp_global->spcl_tx_cc_ctx[i]);
  758. qdf_mem_free(dp_global->spcl_tx_cc_ctx[i]);
  759. }
  760. }
  761. }
  762. static QDF_STATUS dp_soc_tx_cookie_attach_be(struct dp_soc *soc)
  763. {
  764. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  765. struct dp_hw_cookie_conversion_t *cc_ctx;
  766. struct dp_global_context *dp_global;
  767. struct dp_hw_cookie_conversion_t *spcl_cc_ctx;
  768. uint32_t num_entries;
  769. int i = 0;
  770. QDF_STATUS qdf_status;
  771. dp_global = wlan_objmgr_get_global_ctx();
  772. if (dp_global->tx_cookie_ctx_alloc_cnt == 0) {
  773. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  774. dp_global->tx_cc_ctx[i] =
  775. qdf_mem_malloc(
  776. sizeof(struct dp_hw_cookie_conversion_t));
  777. cc_ctx = dp_global->tx_cc_ctx[i];
  778. num_entries =
  779. wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  780. qdf_status =
  781. dp_hw_cookie_conversion_attach(
  782. be_soc,
  783. cc_ctx,
  784. num_entries,
  785. QDF_DP_TX_DESC_TYPE, i);
  786. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  787. return QDF_STATUS_E_FAILURE;
  788. }
  789. }
  790. dp_global->tx_cookie_ctx_alloc_cnt++;
  791. if (dp_global->spcl_tx_cookie_ctx_alloc_cnt == 0) {
  792. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  793. dp_global->spcl_tx_cc_ctx[i] =
  794. qdf_mem_malloc(
  795. sizeof(struct dp_hw_cookie_conversion_t));
  796. spcl_cc_ctx = dp_global->spcl_tx_cc_ctx[i];
  797. num_entries =
  798. wlan_cfg_get_num_tx_spl_desc(soc->wlan_cfg_ctx);
  799. qdf_status =
  800. dp_hw_cookie_conversion_attach(
  801. be_soc,
  802. spcl_cc_ctx,
  803. num_entries,
  804. QDF_DP_TX_SPCL_DESC_TYPE, i);
  805. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  806. return QDF_STATUS_E_FAILURE;
  807. }
  808. }
  809. dp_global->spcl_tx_cookie_ctx_alloc_cnt++;
  810. return QDF_STATUS_SUCCESS;
  811. }
  812. static void dp_soc_tx_cookie_deinit_be(struct dp_soc *soc)
  813. {
  814. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  815. struct dp_global_context *dp_global;
  816. int i = 0;
  817. dp_global = wlan_objmgr_get_global_ctx();
  818. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  819. dp_hw_cookie_conversion_deinit(
  820. be_soc,
  821. dp_global->tx_cc_ctx[i]);
  822. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  823. dp_hw_cookie_conversion_deinit(be_soc,
  824. dp_global->spcl_tx_cc_ctx[i]);
  825. }
  826. static QDF_STATUS dp_soc_tx_cookie_init_be(struct dp_soc *soc)
  827. {
  828. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  829. struct dp_global_context *dp_global;
  830. struct dp_hw_cookie_conversion_t *cc_ctx;
  831. struct dp_hw_cookie_conversion_t *spcl_cc_ctx;
  832. QDF_STATUS qdf_status;
  833. int i = 0;
  834. dp_global = wlan_objmgr_get_global_ctx();
  835. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  836. cc_ctx = dp_global->tx_cc_ctx[i];
  837. qdf_status =
  838. dp_hw_cookie_conversion_init(be_soc,
  839. cc_ctx);
  840. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  841. return QDF_STATUS_E_FAILURE;
  842. }
  843. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  844. spcl_cc_ctx = dp_global->spcl_tx_cc_ctx[i];
  845. qdf_status =
  846. dp_hw_cookie_conversion_init(be_soc,
  847. spcl_cc_ctx);
  848. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  849. return QDF_STATUS_E_FAILURE;
  850. }
  851. return QDF_STATUS_SUCCESS;
  852. }
  853. #else
  854. static void dp_soc_tx_cookie_detach_be(struct dp_soc *soc)
  855. {
  856. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  857. int i = 0;
  858. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  859. dp_hw_cookie_conversion_detach(
  860. be_soc,
  861. &be_soc->tx_cc_ctx[i]);
  862. }
  863. }
  864. static QDF_STATUS dp_soc_tx_cookie_attach_be(struct dp_soc *soc)
  865. {
  866. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  867. uint32_t num_entries;
  868. int i = 0;
  869. QDF_STATUS qdf_status;
  870. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  871. num_entries = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  872. qdf_status =
  873. dp_hw_cookie_conversion_attach(
  874. be_soc,
  875. &be_soc->tx_cc_ctx[i],
  876. num_entries,
  877. QDF_DP_TX_DESC_TYPE, i);
  878. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  879. return QDF_STATUS_E_FAILURE;
  880. }
  881. return QDF_STATUS_SUCCESS;
  882. }
  883. static void dp_soc_tx_cookie_deinit_be(struct dp_soc *soc)
  884. {
  885. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  886. int i = 0;
  887. for (i = 0; i < MAX_TXDESC_POOLS; i++)
  888. dp_hw_cookie_conversion_deinit(
  889. be_soc,
  890. &be_soc->tx_cc_ctx[i]);
  891. }
  892. static QDF_STATUS dp_soc_tx_cookie_init_be(struct dp_soc *soc)
  893. {
  894. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  895. int i = 0;
  896. QDF_STATUS qdf_status;
  897. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  898. qdf_status =
  899. dp_hw_cookie_conversion_init(
  900. be_soc,
  901. &be_soc->tx_cc_ctx[i]);
  902. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  903. return QDF_STATUS_E_FAILURE;
  904. }
  905. return QDF_STATUS_SUCCESS;
  906. }
  907. #endif
  908. static QDF_STATUS dp_soc_detach_be(struct dp_soc *soc)
  909. {
  910. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  911. dp_mlo_dev_obj_t mlo_dev_obj;
  912. int i = 0;
  913. dp_soc_ppeds_detach_be(soc);
  914. dp_reo_shared_qaddr_detach(soc);
  915. mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
  916. dp_mlo_dev_ctxt_list_detach_wrapper(mlo_dev_obj);
  917. dp_soc_tx_cookie_detach_be(soc);
  918. for (i = 0; i < MAX_RXDESC_POOLS; i++)
  919. dp_hw_cookie_conversion_detach(be_soc,
  920. &be_soc->rx_cc_ctx[i]);
  921. qdf_mem_free(be_soc->page_desc_base);
  922. be_soc->page_desc_base = NULL;
  923. return QDF_STATUS_SUCCESS;
  924. }
  925. #ifdef QCA_SUPPORT_DP_GLOBAL_CTX
  926. static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
  927. {
  928. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  929. if (dp_global)
  930. dp_global->fst_ctx = fst;
  931. }
  932. static struct dp_rx_fst *dp_get_rx_fst_be(void)
  933. {
  934. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  935. if (dp_global)
  936. return dp_global->fst_ctx;
  937. return NULL;
  938. }
  939. static uint32_t dp_rx_fst_release_ref_be(void)
  940. {
  941. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  942. uint32_t rx_fst_ref_cnt;
  943. if (dp_global) {
  944. rx_fst_ref_cnt = qdf_atomic_read(&dp_global->rx_fst_ref_cnt);
  945. qdf_atomic_dec(&dp_global->rx_fst_ref_cnt);
  946. return rx_fst_ref_cnt;
  947. }
  948. return 1;
  949. }
  950. static void dp_rx_fst_get_ref_be(void)
  951. {
  952. struct dp_global_context *dp_global = wlan_objmgr_get_global_ctx();
  953. if (dp_global)
  954. qdf_atomic_inc(&dp_global->rx_fst_ref_cnt);
  955. }
  956. #else
  957. static void dp_set_rx_fst_be(struct dp_rx_fst *fst)
  958. {
  959. }
  960. static struct dp_rx_fst *dp_get_rx_fst_be(void)
  961. {
  962. return NULL;
  963. }
  964. static uint32_t dp_rx_fst_release_ref_be(void)
  965. {
  966. return 1;
  967. }
  968. static void dp_rx_fst_get_ref_be(void)
  969. {
  970. }
  971. #endif
  972. #ifdef WLAN_MLO_MULTI_CHIP
  973. #ifdef WLAN_MCAST_MLO
  974. static inline void
  975. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  976. {
  977. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  978. be_vdev->mcast_primary = false;
  979. hal_tx_mcast_mlo_reinject_routing_set(
  980. soc->hal_soc,
  981. HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
  982. if (vdev->opmode == wlan_op_mode_ap) {
  983. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  984. vdev->vdev_id,
  985. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  986. }
  987. }
  988. static inline void
  989. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  990. {
  991. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  992. be_vdev->mcast_primary = false;
  993. vdev->mlo_vdev = 0;
  994. }
  995. #else
  996. static inline void
  997. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  998. {
  999. }
  1000. static inline void
  1001. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  1002. {
  1003. }
  1004. #endif
  1005. static void dp_get_rx_hash_key_be(struct dp_soc *soc,
  1006. struct cdp_lro_hash_config *lro_hash)
  1007. {
  1008. dp_mlo_get_rx_hash_key(soc, lro_hash);
  1009. }
  1010. #ifdef WLAN_DP_MLO_DEV_CTX
  1011. static inline void
  1012. dp_attach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
  1013. struct dp_vdev *vdev,
  1014. struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
  1015. {
  1016. uint8_t pdev_id = vdev->pdev->pdev_id;
  1017. qdf_spin_lock_bh(&mlo_dev_ctxt->vdev_list_lock);
  1018. if (vdev->is_bridge_vdev) {
  1019. if (mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id]
  1020. != CDP_INVALID_VDEV_ID)
  1021. dp_alert("bridge vdevId in MLO dev ctx is not Invalid"
  1022. "chip_id: %u, pdev_id: %u,"
  1023. "existing vdev_id: %u, new vdev_id : %u",
  1024. be_soc->mlo_chip_id, pdev_id,
  1025. mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id],
  1026. vdev->vdev_id);
  1027. mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id] =
  1028. vdev->vdev_id;
  1029. mlo_dev_ctxt->is_bridge_vdev_present = 1;
  1030. } else {
  1031. if (mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id]
  1032. != CDP_INVALID_VDEV_ID)
  1033. dp_alert("vdevId in MLO dev ctx is not Invalid"
  1034. "chip_id: %u, pdev_id: %u,"
  1035. "existing vdev_id: %u, new vdev_id : %u",
  1036. be_soc->mlo_chip_id, pdev_id,
  1037. mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id],
  1038. vdev->vdev_id);
  1039. mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id] =
  1040. vdev->vdev_id;
  1041. }
  1042. mlo_dev_ctxt->vdev_count++;
  1043. qdf_spin_unlock_bh(&mlo_dev_ctxt->vdev_list_lock);
  1044. }
  1045. static inline QDF_STATUS
  1046. dp_detach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
  1047. struct dp_vdev *vdev,
  1048. struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
  1049. {
  1050. uint8_t pdev_id = vdev->pdev->pdev_id;
  1051. if (mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id] ==
  1052. CDP_INVALID_VDEV_ID) {
  1053. return QDF_STATUS_E_INVAL;
  1054. }
  1055. qdf_spin_lock_bh(&mlo_dev_ctxt->vdev_list_lock);
  1056. if (vdev->is_bridge_vdev) {
  1057. mlo_dev_ctxt->bridge_vdev[be_soc->mlo_chip_id][pdev_id] =
  1058. CDP_INVALID_VDEV_ID;
  1059. } else {
  1060. mlo_dev_ctxt->vdev_list[be_soc->mlo_chip_id][pdev_id] =
  1061. CDP_INVALID_VDEV_ID;
  1062. }
  1063. mlo_dev_ctxt->vdev_count--;
  1064. qdf_spin_unlock_bh(&mlo_dev_ctxt->vdev_list_lock);
  1065. return QDF_STATUS_SUCCESS;
  1066. }
  1067. #endif /* WLAN_DP_MLO_DEV_CTX */
  1068. #else
  1069. static inline void
  1070. dp_mlo_mcast_init(struct dp_soc *soc, struct dp_vdev *vdev)
  1071. {
  1072. }
  1073. static inline void
  1074. dp_mlo_mcast_deinit(struct dp_soc *soc, struct dp_vdev *vdev)
  1075. {
  1076. }
  1077. static void dp_get_rx_hash_key_be(struct dp_soc *soc,
  1078. struct cdp_lro_hash_config *lro_hash)
  1079. {
  1080. dp_get_rx_hash_key_bytes(lro_hash);
  1081. }
  1082. #ifdef WLAN_DP_MLO_DEV_CTX
  1083. static inline void
  1084. dp_attach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
  1085. struct dp_vdev *vdev,
  1086. struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
  1087. {
  1088. }
  1089. static inline QDF_STATUS
  1090. dp_detach_vdev_list_in_mlo_dev_ctxt(struct dp_soc_be *be_soc,
  1091. struct dp_vdev *vdev,
  1092. struct dp_mlo_dev_ctxt *mlo_dev_ctxt)
  1093. {
  1094. }
  1095. #endif /* WLAN_DP_MLO_DEV_CTX */
  1096. #endif
  1097. static QDF_STATUS dp_soc_attach_be(struct dp_soc *soc,
  1098. struct cdp_soc_attach_params *params)
  1099. {
  1100. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1101. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1102. uint32_t max_tx_rx_desc_num, num_spt_pages;
  1103. uint32_t num_entries;
  1104. int i = 0;
  1105. dp_mlo_dev_obj_t mlo_dev_obj;
  1106. mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
  1107. max_tx_rx_desc_num = WLAN_CFG_NUM_TX_DESC_MAX * MAX_TXDESC_POOLS +
  1108. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX * MAX_RXDESC_POOLS +
  1109. WLAN_CFG_NUM_PPEDS_TX_DESC_MAX * MAX_PPE_TXDESC_POOLS;
  1110. /* estimate how many SPT DDR pages needed */
  1111. num_spt_pages = max_tx_rx_desc_num / DP_CC_SPT_PAGE_MAX_ENTRIES;
  1112. num_spt_pages = num_spt_pages <= DP_CC_PPT_MAX_ENTRIES ?
  1113. num_spt_pages : DP_CC_PPT_MAX_ENTRIES;
  1114. be_soc->page_desc_base = qdf_mem_malloc(
  1115. DP_CC_PPT_MAX_ENTRIES * sizeof(struct dp_spt_page_desc));
  1116. if (!be_soc->page_desc_base) {
  1117. dp_err("spt page descs allocation failed");
  1118. return QDF_STATUS_E_NOMEM;
  1119. }
  1120. soc->wbm_sw0_bm_id = hal_tx_get_wbm_sw0_bm_id();
  1121. qdf_status = dp_get_cmem_allocation(soc, COOKIE_CONVERSION);
  1122. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1123. goto fail;
  1124. dp_soc_mlo_fill_params(soc, params);
  1125. /* Initialize common cdp mlo ops */
  1126. dp_soc_initialize_cdp_cmn_mlo_ops(soc);
  1127. /* Initialize MLO device ctxt list */
  1128. dp_mlo_dev_ctxt_list_attach_wrapper(mlo_dev_obj);
  1129. qdf_status = dp_soc_ppeds_attach_be(soc);
  1130. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1131. goto fail;
  1132. qdf_status = dp_soc_tx_cookie_attach_be(soc);
  1133. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1134. goto fail;
  1135. for (i = 0; i < MAX_RXDESC_POOLS; i++) {
  1136. num_entries =
  1137. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  1138. qdf_status =
  1139. dp_hw_cookie_conversion_attach(be_soc,
  1140. &be_soc->rx_cc_ctx[i],
  1141. num_entries,
  1142. QDF_DP_RX_DESC_BUF_TYPE,
  1143. i);
  1144. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1145. goto fail;
  1146. }
  1147. return qdf_status;
  1148. fail:
  1149. dp_soc_detach_be(soc);
  1150. return qdf_status;
  1151. }
  1152. static QDF_STATUS dp_soc_deinit_be(struct dp_soc *soc)
  1153. {
  1154. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1155. int i = 0;
  1156. qdf_atomic_set(&soc->cmn_init_done, 0);
  1157. dp_ppeds_stop_soc_be(soc);
  1158. dp_tx_deinit_bank_profiles(be_soc);
  1159. dp_soc_tx_cookie_deinit_be(soc);
  1160. for (i = 0; i < MAX_RXDESC_POOLS; i++)
  1161. dp_hw_cookie_conversion_deinit(be_soc,
  1162. &be_soc->rx_cc_ctx[i]);
  1163. dp_ppeds_deinit_soc_be(soc);
  1164. return QDF_STATUS_SUCCESS;
  1165. }
  1166. static QDF_STATUS dp_soc_deinit_be_wrapper(struct dp_soc *soc)
  1167. {
  1168. QDF_STATUS qdf_status;
  1169. qdf_status = dp_soc_deinit_be(soc);
  1170. if (QDF_IS_STATUS_ERROR(qdf_status))
  1171. return qdf_status;
  1172. dp_soc_deinit(soc);
  1173. return QDF_STATUS_SUCCESS;
  1174. }
  1175. static void *dp_soc_init_be(struct dp_soc *soc, HTC_HANDLE htc_handle,
  1176. struct hif_opaque_softc *hif_handle)
  1177. {
  1178. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1179. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1180. int i = 0;
  1181. void *ret_addr;
  1182. wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc,
  1183. WLAN_MD_DP_SOC, "dp_soc");
  1184. soc->hif_handle = hif_handle;
  1185. soc->hal_soc = hif_get_hal_handle(soc->hif_handle);
  1186. if (!soc->hal_soc)
  1187. return NULL;
  1188. dp_ppeds_init_soc_be(soc);
  1189. qdf_status = dp_soc_tx_cookie_init_be(soc);
  1190. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1191. goto fail;
  1192. for (i = 0; i < MAX_RXDESC_POOLS; i++) {
  1193. qdf_status =
  1194. dp_hw_cookie_conversion_init(be_soc,
  1195. &be_soc->rx_cc_ctx[i]);
  1196. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1197. goto fail;
  1198. }
  1199. /* route vdev_id mismatch notification via FW completion */
  1200. hal_tx_vdev_mismatch_routing_set(soc->hal_soc,
  1201. HAL_TX_VDEV_MISMATCH_FW_NOTIFY);
  1202. qdf_status = dp_tx_init_bank_profiles(be_soc);
  1203. if (!QDF_IS_STATUS_SUCCESS(qdf_status))
  1204. goto fail;
  1205. /* write WBM/REO cookie conversion CFG register */
  1206. dp_cc_reg_cfg_init(soc, true);
  1207. ret_addr = dp_soc_init(soc, htc_handle, hif_handle);
  1208. if (!ret_addr)
  1209. goto fail;
  1210. return ret_addr;
  1211. fail:
  1212. dp_soc_deinit_be(soc);
  1213. return NULL;
  1214. }
  1215. static QDF_STATUS dp_pdev_attach_be(struct dp_pdev *pdev,
  1216. struct cdp_pdev_attach_params *params)
  1217. {
  1218. dp_pdev_mlo_fill_params(pdev, params);
  1219. return QDF_STATUS_SUCCESS;
  1220. }
  1221. static QDF_STATUS dp_pdev_detach_be(struct dp_pdev *pdev)
  1222. {
  1223. dp_mlo_update_link_to_pdev_unmap(pdev->soc, pdev);
  1224. return QDF_STATUS_SUCCESS;
  1225. }
  1226. #ifdef INTRA_BSS_FWD_OFFLOAD
  1227. static
  1228. void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
  1229. {
  1230. soc->cdp_soc.ol_ops->vdev_set_intra_bss(soc->ctrl_psoc, vdev_id,
  1231. enable);
  1232. }
  1233. #else
  1234. static
  1235. void dp_vdev_set_intra_bss(struct dp_soc *soc, uint16_t vdev_id, bool enable)
  1236. {
  1237. }
  1238. #endif
  1239. static QDF_STATUS dp_vdev_attach_be(struct dp_soc *soc, struct dp_vdev *vdev)
  1240. {
  1241. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1242. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1243. struct dp_pdev *pdev = vdev->pdev;
  1244. if (vdev->opmode == wlan_op_mode_monitor)
  1245. return QDF_STATUS_SUCCESS;
  1246. be_vdev->vdev_id_check_en = DP_TX_VDEV_ID_CHECK_ENABLE;
  1247. be_vdev->bank_id = dp_tx_get_bank_profile(be_soc, be_vdev);
  1248. vdev->bank_id = be_vdev->bank_id;
  1249. if (be_vdev->bank_id == DP_BE_INVALID_BANK_ID) {
  1250. QDF_BUG(0);
  1251. return QDF_STATUS_E_FAULT;
  1252. }
  1253. if (vdev->opmode == wlan_op_mode_sta) {
  1254. if (soc->cdp_soc.ol_ops->set_mec_timer)
  1255. soc->cdp_soc.ol_ops->set_mec_timer(
  1256. soc->ctrl_psoc,
  1257. vdev->vdev_id,
  1258. DP_AST_AGING_TIMER_DEFAULT_MS);
  1259. if (pdev->isolation)
  1260. hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
  1261. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  1262. else
  1263. hal_tx_vdev_mcast_ctrl_set(soc->hal_soc, vdev->vdev_id,
  1264. HAL_TX_MCAST_CTRL_MEC_NOTIFY);
  1265. } else if (vdev->ap_bridge_enabled) {
  1266. dp_vdev_set_intra_bss(soc, vdev->vdev_id, true);
  1267. }
  1268. dp_mlo_mcast_init(soc, vdev);
  1269. return QDF_STATUS_SUCCESS;
  1270. }
  1271. static QDF_STATUS dp_vdev_detach_be(struct dp_soc *soc, struct dp_vdev *vdev)
  1272. {
  1273. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1274. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1275. if (vdev->opmode == wlan_op_mode_monitor)
  1276. return QDF_STATUS_SUCCESS;
  1277. if (vdev->opmode == wlan_op_mode_ap)
  1278. dp_mlo_mcast_deinit(soc, vdev);
  1279. dp_tx_put_bank_profile(be_soc, be_vdev);
  1280. return QDF_STATUS_SUCCESS;
  1281. }
  1282. #ifdef WLAN_SUPPORT_PPEDS
  1283. static void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
  1284. uint8_t *peer_mac)
  1285. {
  1286. struct dp_vdev_be *be_vdev;
  1287. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1288. struct dp_soc_be *be_soc;
  1289. struct cdp_ds_vp_params vp_params = {0};
  1290. struct cdp_soc_t *cdp_soc;
  1291. enum wlan_op_mode vdev_opmode;
  1292. struct dp_peer *peer;
  1293. struct dp_peer *tgt_peer = NULL;
  1294. struct dp_soc *tgt_soc = NULL;
  1295. peer = dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id, DP_MOD_ID_CDP);
  1296. if (!peer)
  1297. return;
  1298. vdev_opmode = peer->vdev->opmode;
  1299. if (vdev_opmode != wlan_op_mode_ap &&
  1300. vdev_opmode != wlan_op_mode_sta) {
  1301. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  1302. return;
  1303. }
  1304. tgt_peer = dp_get_tgt_peer_from_peer(peer);
  1305. tgt_soc = tgt_peer->vdev->pdev->soc;
  1306. be_soc = dp_get_be_soc_from_dp_soc(tgt_soc);
  1307. cdp_soc = &tgt_soc->cdp_soc;
  1308. be_vdev = dp_get_be_vdev_from_dp_vdev(tgt_peer->vdev);
  1309. if (!be_vdev) {
  1310. qdf_err("BE vap is null");
  1311. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1312. goto fail;
  1313. }
  1314. /*
  1315. * Extract the VP profile from the VAP
  1316. */
  1317. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  1318. dp_err("%pK: Register get ppeds profile info first", cdp_soc);
  1319. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1320. goto fail;
  1321. }
  1322. /*
  1323. * Check if PPE DS routing is enabled on the associated vap.
  1324. */
  1325. qdf_status =
  1326. cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(tgt_soc->ctrl_psoc,
  1327. tgt_peer->vdev->vdev_id,
  1328. &vp_params);
  1329. if (qdf_status == QDF_STATUS_E_NULL_VALUE) {
  1330. dp_err("%pK: Could not find ppeds profile info vdev", be_vdev);
  1331. qdf_status = QDF_STATUS_E_NULL_VALUE;
  1332. goto fail;
  1333. }
  1334. if (vp_params.ppe_vp_type == PPE_VP_USER_TYPE_DS) {
  1335. qdf_status = dp_peer_setup_ppeds_be(tgt_soc, tgt_peer, be_vdev,
  1336. (void *)&be_soc->ppe_vp_profile[vp_params.ppe_vp_profile_idx]);
  1337. }
  1338. fail:
  1339. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  1340. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  1341. dp_err("Unable to do ppeds peer setup");
  1342. qdf_assert_always(0);
  1343. }
  1344. }
  1345. static inline
  1346. void dp_tx_update_vp_profile(struct dp_soc_be *soc,
  1347. struct dp_vdev_be *vdev)
  1348. {
  1349. dp_tx_ppeds_vp_profile_update(soc, vdev);
  1350. }
  1351. #else
  1352. static inline
  1353. void dp_soc_txrx_peer_setup_be(struct dp_soc *soc, uint8_t vdev_id,
  1354. uint8_t *peer_mac)
  1355. {
  1356. }
  1357. static inline
  1358. void dp_tx_update_vp_profile(struct dp_soc_be *soc,
  1359. struct dp_vdev_be *vdev)
  1360. {
  1361. }
  1362. #endif
  1363. static QDF_STATUS dp_peer_setup_be(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  1364. uint8_t *peer_mac,
  1365. struct cdp_peer_setup_info *setup_info)
  1366. {
  1367. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  1368. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  1369. qdf_status = dp_peer_setup_wifi3(soc_hdl, vdev_id, peer_mac,
  1370. setup_info);
  1371. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  1372. dp_err("Unable to dp peer setup");
  1373. return qdf_status;
  1374. }
  1375. dp_soc_txrx_peer_setup_be(soc, vdev_id, peer_mac);
  1376. return QDF_STATUS_SUCCESS;
  1377. }
  1378. qdf_size_t dp_get_soc_context_size_be(void)
  1379. {
  1380. return sizeof(struct dp_soc_be);
  1381. }
  1382. #ifdef CONFIG_WORD_BASED_TLV
  1383. /**
  1384. * dp_rxdma_ring_wmask_cfg_be() - Setup RXDMA ring word mask config
  1385. * @soc: Common DP soc handle
  1386. * @htt_tlv_filter: Rx SRNG TLV and filter setting
  1387. *
  1388. * Return: none
  1389. */
  1390. static inline void
  1391. dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
  1392. struct htt_rx_ring_tlv_filter *htt_tlv_filter)
  1393. {
  1394. htt_tlv_filter->rx_msdu_end_wmask =
  1395. hal_rx_msdu_end_wmask_get(soc->hal_soc);
  1396. htt_tlv_filter->rx_mpdu_start_wmask =
  1397. hal_rx_mpdu_start_wmask_get(soc->hal_soc);
  1398. }
  1399. #else
  1400. static inline void
  1401. dp_rxdma_ring_wmask_cfg_be(struct dp_soc *soc,
  1402. struct htt_rx_ring_tlv_filter *htt_tlv_filter)
  1403. {
  1404. }
  1405. #endif
  1406. #ifdef WLAN_SUPPORT_PPEDS
  1407. static
  1408. void dp_free_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
  1409. int ring_type, int ring_num)
  1410. {
  1411. if (srng->irq >= 0) {
  1412. qdf_dev_clear_irq_status_flags(srng->irq, IRQ_DISABLE_UNLAZY);
  1413. if (ring_type == WBM2SW_RELEASE &&
  1414. ring_num == WBM2_SW_PPE_REL_RING_ID)
  1415. pld_pfrm_free_irq(soc->osdev->dev, srng->irq, soc);
  1416. else if (ring_type == REO2PPE || ring_type == PPE2TCL)
  1417. pld_pfrm_free_irq(soc->osdev->dev, srng->irq,
  1418. dp_get_ppe_ds_ctxt(soc));
  1419. }
  1420. }
  1421. static
  1422. int dp_register_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
  1423. int vector, int ring_type, int ring_num)
  1424. {
  1425. int irq = -1, ret = 0;
  1426. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1427. int pci_slot = pld_get_pci_slot(soc->osdev->dev);
  1428. srng->irq = -1;
  1429. irq = pld_get_msi_irq(soc->osdev->dev, vector);
  1430. qdf_dev_set_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
  1431. if (ring_type == WBM2SW_RELEASE &&
  1432. ring_num == WBM2_SW_PPE_REL_RING_ID) {
  1433. snprintf(be_soc->irq_name[2], DP_PPE_INTR_STRNG_LEN,
  1434. "pci%d_ppe_wbm_rel", pci_slot);
  1435. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1436. dp_ppeds_handle_tx_comp,
  1437. IRQF_SHARED | IRQF_NO_SUSPEND,
  1438. be_soc->irq_name[2], (void *)soc);
  1439. if (ret)
  1440. goto fail;
  1441. } else if (ring_type == REO2PPE && be_soc->ppeds_int_mode_enabled) {
  1442. snprintf(be_soc->irq_name[0], DP_PPE_INTR_STRNG_LEN,
  1443. "pci%d_reo2ppe", pci_slot);
  1444. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1445. dp_ppe_ds_reo2ppe_irq_handler,
  1446. IRQF_SHARED | IRQF_NO_SUSPEND,
  1447. be_soc->irq_name[0],
  1448. dp_get_ppe_ds_ctxt(soc));
  1449. if (ret)
  1450. goto fail;
  1451. } else if (ring_type == PPE2TCL && be_soc->ppeds_int_mode_enabled) {
  1452. snprintf(be_soc->irq_name[1], DP_PPE_INTR_STRNG_LEN,
  1453. "pci%d_ppe2tcl", pci_slot);
  1454. ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
  1455. dp_ppe_ds_ppe2tcl_irq_handler,
  1456. IRQF_NO_SUSPEND,
  1457. be_soc->irq_name[1],
  1458. dp_get_ppe_ds_ctxt(soc));
  1459. if (ret)
  1460. goto fail;
  1461. pld_pfrm_disable_irq_nosync(soc->osdev->dev, irq);
  1462. } else {
  1463. return 0;
  1464. }
  1465. srng->irq = irq;
  1466. dp_info("Registered irq %d for soc %pK ring type %d",
  1467. irq, soc, ring_type);
  1468. return 0;
  1469. fail:
  1470. dp_err("Unable to config irq : ring type %d irq %d vector %d",
  1471. ring_type, irq, vector);
  1472. qdf_dev_clear_irq_status_flags(irq, IRQ_DISABLE_UNLAZY);
  1473. return ret;
  1474. }
  1475. void dp_ppeds_disable_irq(struct dp_soc *soc, struct dp_srng *srng)
  1476. {
  1477. if (srng->irq >= 0)
  1478. pld_pfrm_disable_irq_nosync(soc->osdev->dev, srng->irq);
  1479. }
  1480. void dp_ppeds_enable_irq(struct dp_soc *soc, struct dp_srng *srng)
  1481. {
  1482. if (srng->irq >= 0)
  1483. pld_pfrm_enable_irq(soc->osdev->dev, srng->irq);
  1484. }
  1485. #endif
  1486. #ifdef NO_RX_PKT_HDR_TLV
  1487. /**
  1488. * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
  1489. * @soc: Common DP soc handle
  1490. *
  1491. * Return: QDF_STATUS
  1492. */
  1493. static QDF_STATUS
  1494. dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
  1495. {
  1496. int i;
  1497. int mac_id;
  1498. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  1499. struct dp_srng *rx_mac_srng;
  1500. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1501. uint16_t buf_size;
  1502. buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
  1503. /*
  1504. * In Beryllium chipset msdu_start, mpdu_end
  1505. * and rx_attn are part of msdu_end/mpdu_start
  1506. */
  1507. htt_tlv_filter.msdu_start = 0;
  1508. htt_tlv_filter.mpdu_end = 0;
  1509. htt_tlv_filter.attention = 0;
  1510. htt_tlv_filter.mpdu_start = 1;
  1511. htt_tlv_filter.msdu_end = 1;
  1512. htt_tlv_filter.packet = 1;
  1513. htt_tlv_filter.packet_header = 0;
  1514. htt_tlv_filter.ppdu_start = 0;
  1515. htt_tlv_filter.ppdu_end = 0;
  1516. htt_tlv_filter.ppdu_end_user_stats = 0;
  1517. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1518. htt_tlv_filter.ppdu_end_status_done = 0;
  1519. htt_tlv_filter.enable_fp = 1;
  1520. htt_tlv_filter.enable_md = 0;
  1521. htt_tlv_filter.enable_md = 0;
  1522. htt_tlv_filter.enable_mo = 0;
  1523. htt_tlv_filter.fp_mgmt_filter = 0;
  1524. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  1525. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  1526. FILTER_DATA_DATA);
  1527. htt_tlv_filter.fp_data_filter |=
  1528. hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
  1529. FILTER_DATA_MCAST : 0;
  1530. htt_tlv_filter.mo_mgmt_filter = 0;
  1531. htt_tlv_filter.mo_ctrl_filter = 0;
  1532. htt_tlv_filter.mo_data_filter = 0;
  1533. htt_tlv_filter.md_data_filter = 0;
  1534. htt_tlv_filter.offset_valid = true;
  1535. /* Not subscribing to mpdu_end, msdu_start and rx_attn */
  1536. htt_tlv_filter.rx_mpdu_end_offset = 0;
  1537. htt_tlv_filter.rx_msdu_start_offset = 0;
  1538. htt_tlv_filter.rx_attn_offset = 0;
  1539. /*
  1540. * For monitor mode, the packet hdr tlv is enabled later during
  1541. * filter update
  1542. */
  1543. if (soc->cdp_soc.ol_ops->get_con_mode &&
  1544. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
  1545. htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
  1546. else
  1547. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  1548. /*Not subscribing rx_pkt_header*/
  1549. htt_tlv_filter.rx_header_offset = 0;
  1550. htt_tlv_filter.rx_mpdu_start_offset =
  1551. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  1552. htt_tlv_filter.rx_msdu_end_offset =
  1553. hal_rx_msdu_end_offset_get(soc->hal_soc);
  1554. dp_rxdma_ring_wmask_cfg_be(soc, &htt_tlv_filter);
  1555. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1556. struct dp_pdev *pdev = soc->pdev_list[i];
  1557. if (!pdev)
  1558. continue;
  1559. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1560. int mac_for_pdev =
  1561. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  1562. /*
  1563. * Obtain lmac id from pdev to access the LMAC ring
  1564. * in soc context
  1565. */
  1566. int lmac_id =
  1567. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  1568. pdev->pdev_id);
  1569. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  1570. if (!rx_mac_srng->hal_srng)
  1571. continue;
  1572. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  1573. rx_mac_srng->hal_srng,
  1574. RXDMA_BUF, buf_size,
  1575. &htt_tlv_filter);
  1576. }
  1577. }
  1578. return status;
  1579. }
  1580. #else
  1581. /**
  1582. * dp_rxdma_ring_sel_cfg_be() - Setup RXDMA ring config
  1583. * @soc: Common DP soc handle
  1584. *
  1585. * Return: QDF_STATUS
  1586. */
  1587. static QDF_STATUS
  1588. dp_rxdma_ring_sel_cfg_be(struct dp_soc *soc)
  1589. {
  1590. int i;
  1591. int mac_id;
  1592. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  1593. struct dp_srng *rx_mac_srng;
  1594. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1595. uint16_t buf_size;
  1596. buf_size = wlan_cfg_rx_buffer_size(soc->wlan_cfg_ctx);
  1597. /*
  1598. * In Beryllium chipset msdu_start, mpdu_end
  1599. * and rx_attn are part of msdu_end/mpdu_start
  1600. */
  1601. htt_tlv_filter.msdu_start = 0;
  1602. htt_tlv_filter.mpdu_end = 0;
  1603. htt_tlv_filter.attention = 0;
  1604. htt_tlv_filter.mpdu_start = 1;
  1605. htt_tlv_filter.msdu_end = 1;
  1606. htt_tlv_filter.packet = 1;
  1607. htt_tlv_filter.packet_header = 1;
  1608. htt_tlv_filter.ppdu_start = 0;
  1609. htt_tlv_filter.ppdu_end = 0;
  1610. htt_tlv_filter.ppdu_end_user_stats = 0;
  1611. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  1612. htt_tlv_filter.ppdu_end_status_done = 0;
  1613. htt_tlv_filter.enable_fp = 1;
  1614. htt_tlv_filter.enable_md = 0;
  1615. htt_tlv_filter.enable_md = 0;
  1616. htt_tlv_filter.enable_mo = 0;
  1617. htt_tlv_filter.fp_mgmt_filter = 0;
  1618. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
  1619. htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
  1620. FILTER_DATA_DATA);
  1621. htt_tlv_filter.fp_data_filter |=
  1622. hal_rx_en_mcast_fp_data_filter(soc->hal_soc) ?
  1623. FILTER_DATA_MCAST : 0;
  1624. htt_tlv_filter.mo_mgmt_filter = 0;
  1625. htt_tlv_filter.mo_ctrl_filter = 0;
  1626. htt_tlv_filter.mo_data_filter = 0;
  1627. htt_tlv_filter.md_data_filter = 0;
  1628. htt_tlv_filter.offset_valid = true;
  1629. /* Not subscribing to mpdu_end, msdu_start and rx_attn */
  1630. htt_tlv_filter.rx_mpdu_end_offset = 0;
  1631. htt_tlv_filter.rx_msdu_start_offset = 0;
  1632. htt_tlv_filter.rx_attn_offset = 0;
  1633. /*
  1634. * For monitor mode, the packet hdr tlv is enabled later during
  1635. * filter update
  1636. */
  1637. if (soc->cdp_soc.ol_ops->get_con_mode &&
  1638. soc->cdp_soc.ol_ops->get_con_mode() == QDF_GLOBAL_MONITOR_MODE)
  1639. htt_tlv_filter.rx_packet_offset = soc->rx_mon_pkt_tlv_size;
  1640. else
  1641. htt_tlv_filter.rx_packet_offset = soc->rx_pkt_tlv_size;
  1642. htt_tlv_filter.rx_header_offset =
  1643. hal_rx_pkt_tlv_offset_get(soc->hal_soc);
  1644. htt_tlv_filter.rx_mpdu_start_offset =
  1645. hal_rx_mpdu_start_offset_get(soc->hal_soc);
  1646. htt_tlv_filter.rx_msdu_end_offset =
  1647. hal_rx_msdu_end_offset_get(soc->hal_soc);
  1648. dp_info("TLV subscription\n"
  1649. "msdu_start %d, mpdu_end %d, attention %d"
  1650. "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n"
  1651. "TLV offsets\n"
  1652. "msdu_start %d, mpdu_end %d, attention %d"
  1653. "mpdu_start %d, msdu_end %d, pkt_hdr %d, pkt %d\n",
  1654. htt_tlv_filter.msdu_start,
  1655. htt_tlv_filter.mpdu_end,
  1656. htt_tlv_filter.attention,
  1657. htt_tlv_filter.mpdu_start,
  1658. htt_tlv_filter.msdu_end,
  1659. htt_tlv_filter.packet_header,
  1660. htt_tlv_filter.packet,
  1661. htt_tlv_filter.rx_msdu_start_offset,
  1662. htt_tlv_filter.rx_mpdu_end_offset,
  1663. htt_tlv_filter.rx_attn_offset,
  1664. htt_tlv_filter.rx_mpdu_start_offset,
  1665. htt_tlv_filter.rx_msdu_end_offset,
  1666. htt_tlv_filter.rx_header_offset,
  1667. htt_tlv_filter.rx_packet_offset);
  1668. dp_rxdma_ring_wmask_cfg_be(soc, &htt_tlv_filter);
  1669. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1670. struct dp_pdev *pdev = soc->pdev_list[i];
  1671. if (!pdev)
  1672. continue;
  1673. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1674. int mac_for_pdev =
  1675. dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
  1676. /*
  1677. * Obtain lmac id from pdev to access the LMAC ring
  1678. * in soc context
  1679. */
  1680. int lmac_id =
  1681. dp_get_lmac_id_for_pdev_id(soc, mac_id,
  1682. pdev->pdev_id);
  1683. rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
  1684. if (!rx_mac_srng->hal_srng)
  1685. continue;
  1686. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  1687. rx_mac_srng->hal_srng,
  1688. RXDMA_BUF, buf_size,
  1689. &htt_tlv_filter);
  1690. }
  1691. }
  1692. return status;
  1693. }
  1694. #endif
  1695. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1696. /**
  1697. * dp_service_near_full_srngs_be() - Main bottom half callback for the
  1698. * near-full IRQs.
  1699. * @soc: Datapath SoC handle
  1700. * @int_ctx: Interrupt context
  1701. * @dp_budget: Budget of the work that can be done in the bottom half
  1702. *
  1703. * Return: work done in the handler
  1704. */
  1705. static uint32_t
  1706. dp_service_near_full_srngs_be(struct dp_soc *soc, struct dp_intr *int_ctx,
  1707. uint32_t dp_budget)
  1708. {
  1709. int ring = 0;
  1710. int budget = dp_budget;
  1711. uint32_t work_done = 0;
  1712. uint32_t remaining_quota = dp_budget;
  1713. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  1714. int tx_ring_near_full_mask = int_ctx->tx_ring_near_full_mask;
  1715. int rx_near_full_grp_1_mask = int_ctx->rx_near_full_grp_1_mask;
  1716. int rx_near_full_grp_2_mask = int_ctx->rx_near_full_grp_2_mask;
  1717. int rx_near_full_mask = rx_near_full_grp_1_mask |
  1718. rx_near_full_grp_2_mask;
  1719. dp_verbose_debug("rx_ring_near_full 0x%x tx_ring_near_full 0x%x",
  1720. rx_near_full_mask,
  1721. tx_ring_near_full_mask);
  1722. if (rx_near_full_mask) {
  1723. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  1724. if (!(rx_near_full_mask & (1 << ring)))
  1725. continue;
  1726. work_done = dp_rx_nf_process(int_ctx,
  1727. soc->reo_dest_ring[ring].hal_srng,
  1728. ring, remaining_quota);
  1729. if (work_done) {
  1730. intr_stats->num_rx_ring_near_full_masks[ring]++;
  1731. dp_verbose_debug("rx NF mask 0x%x ring %d, work_done %d budget %d",
  1732. rx_near_full_mask, ring,
  1733. work_done,
  1734. budget);
  1735. budget -= work_done;
  1736. if (budget <= 0)
  1737. goto budget_done;
  1738. remaining_quota = budget;
  1739. }
  1740. }
  1741. }
  1742. if (tx_ring_near_full_mask) {
  1743. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  1744. if (!(tx_ring_near_full_mask & (1 << ring)))
  1745. continue;
  1746. work_done = dp_tx_comp_nf_handler(int_ctx, soc,
  1747. soc->tx_comp_ring[ring].hal_srng,
  1748. ring, remaining_quota);
  1749. if (work_done) {
  1750. intr_stats->num_tx_comp_ring_near_full_masks[ring]++;
  1751. dp_verbose_debug("tx NF mask 0x%x ring %d, work_done %d budget %d",
  1752. tx_ring_near_full_mask, ring,
  1753. work_done, budget);
  1754. budget -= work_done;
  1755. if (budget <= 0)
  1756. break;
  1757. remaining_quota = budget;
  1758. }
  1759. }
  1760. }
  1761. intr_stats->num_near_full_masks++;
  1762. budget_done:
  1763. return dp_budget - budget;
  1764. }
  1765. /**
  1766. * dp_srng_test_and_update_nf_params_be() - Check if the srng is in near full
  1767. * state and set the reap_limit appropriately
  1768. * as per the near full state
  1769. * @soc: Datapath soc handle
  1770. * @dp_srng: Datapath handle for SRNG
  1771. * @max_reap_limit: [Output Buffer] Buffer to set the max reap limit as per
  1772. * the srng near-full state
  1773. *
  1774. * Return: 1, if the srng is in near-full state
  1775. * 0, if the srng is not in near-full state
  1776. */
  1777. static int
  1778. dp_srng_test_and_update_nf_params_be(struct dp_soc *soc,
  1779. struct dp_srng *dp_srng,
  1780. int *max_reap_limit)
  1781. {
  1782. return _dp_srng_test_and_update_nf_params(soc, dp_srng, max_reap_limit);
  1783. }
  1784. /**
  1785. * dp_init_near_full_arch_ops_be() - Initialize the arch ops handler for the
  1786. * near full IRQ handling operations.
  1787. * @arch_ops: arch ops handle
  1788. *
  1789. * Return: none
  1790. */
  1791. static inline void
  1792. dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
  1793. {
  1794. arch_ops->dp_service_near_full_srngs = dp_service_near_full_srngs_be;
  1795. arch_ops->dp_srng_test_and_update_nf_params =
  1796. dp_srng_test_and_update_nf_params_be;
  1797. }
  1798. #else
  1799. static inline void
  1800. dp_init_near_full_arch_ops_be(struct dp_arch_ops *arch_ops)
  1801. {
  1802. }
  1803. #endif
  1804. static inline
  1805. QDF_STATUS dp_srng_init_be(struct dp_soc *soc, struct dp_srng *srng,
  1806. int ring_type, int ring_num, int mac_id)
  1807. {
  1808. return dp_srng_init_idx(soc, srng, ring_type, ring_num, mac_id, 0);
  1809. }
  1810. static QDF_STATUS dp_soc_interrupt_attach_be(struct cdp_soc_t *txrx_soc)
  1811. {
  1812. return dp_soc_interrupt_attach(txrx_soc);
  1813. }
  1814. static QDF_STATUS dp_soc_attach_poll_be(struct cdp_soc_t *txrx_soc)
  1815. {
  1816. return dp_soc_attach_poll(txrx_soc);
  1817. }
  1818. static void dp_soc_interrupt_detach_be(struct cdp_soc_t *txrx_soc)
  1819. {
  1820. return dp_soc_interrupt_detach(txrx_soc);
  1821. }
  1822. static uint32_t dp_service_srngs_be(void *dp_ctx, uint32_t dp_budget, int cpu)
  1823. {
  1824. return dp_service_srngs(dp_ctx, dp_budget, cpu);
  1825. }
  1826. #ifdef WLAN_SUPPORT_PPEDS
  1827. static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
  1828. {
  1829. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1830. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1831. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1832. if (!be_soc->ppeds_handle)
  1833. return;
  1834. dp_srng_deinit(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0);
  1835. wlan_minidump_remove(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
  1836. be_soc->ppe2tcl_ring.alloc_size,
  1837. soc->ctrl_psoc,
  1838. WLAN_MD_DP_SRNG_PPE2TCL,
  1839. "ppe2tcl_ring");
  1840. dp_srng_deinit(soc, &be_soc->reo2ppe_ring, REO2PPE, 0);
  1841. wlan_minidump_remove(be_soc->reo2ppe_ring.base_vaddr_unaligned,
  1842. be_soc->reo2ppe_ring.alloc_size,
  1843. soc->ctrl_psoc,
  1844. WLAN_MD_DP_SRNG_REO2PPE,
  1845. "reo2ppe_ring");
  1846. dp_srng_deinit(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1847. WBM2_SW_PPE_REL_RING_ID);
  1848. wlan_minidump_remove(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
  1849. be_soc->ppeds_wbm_release_ring.alloc_size,
  1850. soc->ctrl_psoc,
  1851. WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
  1852. "ppeds_wbm_release_ring");
  1853. }
  1854. static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
  1855. {
  1856. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1857. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1858. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1859. dp_srng_free(soc, &be_soc->ppeds_wbm_release_ring);
  1860. dp_srng_free(soc, &be_soc->ppe2tcl_ring);
  1861. dp_srng_free(soc, &be_soc->reo2ppe_ring);
  1862. }
  1863. static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
  1864. {
  1865. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1866. uint32_t entries;
  1867. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1868. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1869. if (!be_soc->ppeds_handle)
  1870. return QDF_STATUS_SUCCESS;
  1871. entries = wlan_cfg_get_dp_soc_reo2ppe_ring_size(soc_cfg_ctx);
  1872. if (dp_srng_alloc(soc, &be_soc->reo2ppe_ring, REO2PPE,
  1873. entries, 0)) {
  1874. dp_err("%pK: dp_srng_alloc failed for reo2ppe", soc);
  1875. goto fail;
  1876. }
  1877. entries = wlan_cfg_get_dp_soc_ppe2tcl_ring_size(soc_cfg_ctx);
  1878. if (dp_srng_alloc(soc, &be_soc->ppe2tcl_ring, PPE2TCL,
  1879. entries, 0)) {
  1880. dp_err("%pK: dp_srng_alloc failed for ppe2tcl_ring", soc);
  1881. goto fail;
  1882. }
  1883. entries = wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  1884. if (dp_srng_alloc(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1885. entries, 1)) {
  1886. dp_err("%pK: dp_srng_alloc failed for ppeds_wbm_release_ring",
  1887. soc);
  1888. goto fail;
  1889. }
  1890. return QDF_STATUS_SUCCESS;
  1891. fail:
  1892. dp_soc_ppeds_srng_free(soc);
  1893. return QDF_STATUS_E_NOMEM;
  1894. }
  1895. static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
  1896. {
  1897. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1898. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1899. hal_soc_handle_t hal_soc = soc->hal_soc;
  1900. struct dp_ppe_ds_idxs idx = {0};
  1901. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1902. if (!be_soc->ppeds_handle)
  1903. return QDF_STATUS_SUCCESS;
  1904. if (dp_ppeds_register_soc_be(be_soc, &idx)) {
  1905. dp_err("%pK: ppeds registration failed", soc);
  1906. goto fail;
  1907. }
  1908. if (dp_srng_init_idx(soc, &be_soc->reo2ppe_ring, REO2PPE, 0, 0,
  1909. idx.reo2ppe_start_idx)) {
  1910. dp_err("%pK: dp_srng_init failed for reo2ppe", soc);
  1911. goto fail;
  1912. }
  1913. wlan_minidump_log(be_soc->reo2ppe_ring.base_vaddr_unaligned,
  1914. be_soc->reo2ppe_ring.alloc_size,
  1915. soc->ctrl_psoc,
  1916. WLAN_MD_DP_SRNG_REO2PPE,
  1917. "reo2ppe_ring");
  1918. hal_reo_config_reo2ppe_dest_info(hal_soc);
  1919. if (dp_srng_init_idx(soc, &be_soc->ppe2tcl_ring, PPE2TCL, 0, 0,
  1920. idx.ppe2tcl_start_idx)) {
  1921. dp_err("%pK: dp_srng_init failed for ppe2tcl_ring", soc);
  1922. goto fail;
  1923. }
  1924. wlan_minidump_log(be_soc->ppe2tcl_ring.base_vaddr_unaligned,
  1925. be_soc->ppe2tcl_ring.alloc_size,
  1926. soc->ctrl_psoc,
  1927. WLAN_MD_DP_SRNG_PPE2TCL,
  1928. "ppe2tcl_ring");
  1929. hal_tx_config_rbm_mapping_be(soc->hal_soc,
  1930. be_soc->ppe2tcl_ring.hal_srng,
  1931. WBM2_SW_PPE_REL_MAP_ID);
  1932. if (dp_srng_init(soc, &be_soc->ppeds_wbm_release_ring, WBM2SW_RELEASE,
  1933. WBM2_SW_PPE_REL_RING_ID, 0)) {
  1934. dp_err("%pK: dp_srng_init failed for ppeds_wbm_release_ring",
  1935. soc);
  1936. goto fail;
  1937. }
  1938. wlan_minidump_log(be_soc->ppeds_wbm_release_ring.base_vaddr_unaligned,
  1939. be_soc->ppeds_wbm_release_ring.alloc_size,
  1940. soc->ctrl_psoc, WLAN_MD_DP_SRNG_PPE_WBM2SW_RELEASE,
  1941. "ppeds_wbm_release_ring");
  1942. return QDF_STATUS_SUCCESS;
  1943. fail:
  1944. dp_soc_ppeds_srng_deinit(soc);
  1945. return QDF_STATUS_E_NOMEM;
  1946. }
  1947. #else
  1948. static void dp_soc_ppeds_srng_deinit(struct dp_soc *soc)
  1949. {
  1950. }
  1951. static void dp_soc_ppeds_srng_free(struct dp_soc *soc)
  1952. {
  1953. }
  1954. static QDF_STATUS dp_soc_ppeds_srng_alloc(struct dp_soc *soc)
  1955. {
  1956. return QDF_STATUS_SUCCESS;
  1957. }
  1958. static QDF_STATUS dp_soc_ppeds_srng_init(struct dp_soc *soc)
  1959. {
  1960. return QDF_STATUS_SUCCESS;
  1961. }
  1962. #endif
  1963. static void dp_soc_srng_deinit_be(struct dp_soc *soc)
  1964. {
  1965. uint32_t i;
  1966. dp_soc_ppeds_srng_deinit(soc);
  1967. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1968. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1969. dp_ssr_dump_srng_unregister("rx_refill_buf_ring", i);
  1970. dp_srng_deinit(soc, &soc->rx_refill_buf_ring[i],
  1971. RXDMA_BUF, 0);
  1972. }
  1973. }
  1974. }
  1975. static void dp_soc_srng_free_be(struct dp_soc *soc)
  1976. {
  1977. uint32_t i;
  1978. dp_soc_ppeds_srng_free(soc);
  1979. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1980. for (i = 0; i < soc->num_rx_refill_buf_rings; i++)
  1981. dp_srng_free(soc, &soc->rx_refill_buf_ring[i]);
  1982. }
  1983. }
  1984. static QDF_STATUS dp_soc_srng_alloc_be(struct dp_soc *soc)
  1985. {
  1986. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1987. uint32_t ring_size;
  1988. uint32_t i;
  1989. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1990. ring_size = wlan_cfg_get_dp_soc_rxdma_refill_ring_size(soc_cfg_ctx);
  1991. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1992. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  1993. if (dp_srng_alloc(soc, &soc->rx_refill_buf_ring[i],
  1994. RXDMA_BUF, ring_size, 0)) {
  1995. dp_err("%pK: dp_srng_alloc failed refill ring",
  1996. soc);
  1997. goto fail;
  1998. }
  1999. }
  2000. }
  2001. if (dp_soc_ppeds_srng_alloc(soc)) {
  2002. dp_err("%pK: ppe rings alloc failed",
  2003. soc);
  2004. goto fail;
  2005. }
  2006. return QDF_STATUS_SUCCESS;
  2007. fail:
  2008. dp_soc_srng_free_be(soc);
  2009. return QDF_STATUS_E_NOMEM;
  2010. }
  2011. static QDF_STATUS dp_soc_srng_init_be(struct dp_soc *soc)
  2012. {
  2013. int i = 0;
  2014. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  2015. for (i = 0; i < soc->num_rx_refill_buf_rings; i++) {
  2016. if (dp_srng_init(soc, &soc->rx_refill_buf_ring[i],
  2017. RXDMA_BUF, 0, 0)) {
  2018. dp_err("%pK: dp_srng_init failed refill ring",
  2019. soc);
  2020. goto fail;
  2021. }
  2022. dp_ssr_dump_srng_register("rx_refill_buf_ring",
  2023. &soc->rx_refill_buf_ring[i],
  2024. i);
  2025. }
  2026. }
  2027. if (dp_soc_ppeds_srng_init(soc)) {
  2028. dp_err("%pK: ppe ds rings init failed",
  2029. soc);
  2030. goto fail;
  2031. }
  2032. return QDF_STATUS_SUCCESS;
  2033. fail:
  2034. dp_soc_srng_deinit_be(soc);
  2035. return QDF_STATUS_E_NOMEM;
  2036. }
  2037. #ifdef WLAN_FEATURE_11BE_MLO
  2038. static inline unsigned
  2039. dp_mlo_peer_find_hash_index(dp_mld_peer_hash_obj_t mld_hash_obj,
  2040. union dp_align_mac_addr *mac_addr)
  2041. {
  2042. uint32_t index;
  2043. index =
  2044. mac_addr->align2.bytes_ab ^
  2045. mac_addr->align2.bytes_cd ^
  2046. mac_addr->align2.bytes_ef;
  2047. index ^= index >> mld_hash_obj->mld_peer_hash.idx_bits;
  2048. index &= mld_hash_obj->mld_peer_hash.mask;
  2049. return index;
  2050. }
  2051. QDF_STATUS
  2052. dp_mlo_peer_find_hash_attach_be(dp_mld_peer_hash_obj_t mld_hash_obj,
  2053. int hash_elems)
  2054. {
  2055. int i, log2;
  2056. if (!mld_hash_obj)
  2057. return QDF_STATUS_E_FAILURE;
  2058. hash_elems *= DP_PEER_HASH_LOAD_MULT;
  2059. hash_elems >>= DP_PEER_HASH_LOAD_SHIFT;
  2060. log2 = dp_log2_ceil(hash_elems);
  2061. hash_elems = 1 << log2;
  2062. mld_hash_obj->mld_peer_hash.mask = hash_elems - 1;
  2063. mld_hash_obj->mld_peer_hash.idx_bits = log2;
  2064. /* allocate an array of TAILQ peer object lists */
  2065. mld_hash_obj->mld_peer_hash.bins = qdf_mem_malloc(
  2066. hash_elems * sizeof(TAILQ_HEAD(anonymous_tail_q, dp_peer)));
  2067. if (!mld_hash_obj->mld_peer_hash.bins)
  2068. return QDF_STATUS_E_NOMEM;
  2069. for (i = 0; i < hash_elems; i++)
  2070. TAILQ_INIT(&mld_hash_obj->mld_peer_hash.bins[i]);
  2071. qdf_spinlock_create(&mld_hash_obj->mld_peer_hash_lock);
  2072. return QDF_STATUS_SUCCESS;
  2073. }
  2074. void
  2075. dp_mlo_peer_find_hash_detach_be(dp_mld_peer_hash_obj_t mld_hash_obj)
  2076. {
  2077. if (!mld_hash_obj)
  2078. return;
  2079. if (mld_hash_obj->mld_peer_hash.bins) {
  2080. qdf_mem_free(mld_hash_obj->mld_peer_hash.bins);
  2081. mld_hash_obj->mld_peer_hash.bins = NULL;
  2082. qdf_spinlock_destroy(&mld_hash_obj->mld_peer_hash_lock);
  2083. }
  2084. }
  2085. #ifdef WLAN_MLO_MULTI_CHIP
  2086. static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
  2087. {
  2088. /* In case of MULTI chip MLO peer hash table when MLO global object
  2089. * is created, avoid from SOC attach path
  2090. */
  2091. return QDF_STATUS_SUCCESS;
  2092. }
  2093. static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
  2094. {
  2095. }
  2096. void dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2097. {
  2098. }
  2099. void dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2100. {
  2101. }
  2102. #else
  2103. static QDF_STATUS dp_mlo_peer_find_hash_attach_wrapper(struct dp_soc *soc)
  2104. {
  2105. dp_mld_peer_hash_obj_t mld_hash_obj;
  2106. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2107. if (!mld_hash_obj)
  2108. return QDF_STATUS_E_FAILURE;
  2109. return dp_mlo_peer_find_hash_attach_be(mld_hash_obj, soc->max_peers);
  2110. }
  2111. static void dp_mlo_peer_find_hash_detach_wrapper(struct dp_soc *soc)
  2112. {
  2113. dp_mld_peer_hash_obj_t mld_hash_obj;
  2114. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2115. if (!mld_hash_obj)
  2116. return;
  2117. return dp_mlo_peer_find_hash_detach_be(mld_hash_obj);
  2118. }
  2119. void dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2120. {
  2121. dp_mlo_dev_ctxt_list_attach(mlo_dev_obj);
  2122. }
  2123. void dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2124. {
  2125. dp_mlo_dev_ctxt_list_detach(mlo_dev_obj);
  2126. }
  2127. #endif
  2128. #ifdef QCA_ENHANCED_STATS_SUPPORT
  2129. static uint8_t
  2130. dp_get_hw_link_id_be(struct dp_pdev *pdev)
  2131. {
  2132. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  2133. return be_pdev->mlo_link_id;
  2134. }
  2135. #else
  2136. static uint8_t
  2137. dp_get_hw_link_id_be(struct dp_pdev *pdev)
  2138. {
  2139. return 0;
  2140. }
  2141. #endif /* QCA_ENHANCED_STATS_SUPPORT */
  2142. static struct dp_peer *
  2143. dp_mlo_peer_find_hash_find_be(struct dp_soc *soc,
  2144. uint8_t *peer_mac_addr,
  2145. int mac_addr_is_aligned,
  2146. enum dp_mod_id mod_id,
  2147. uint8_t vdev_id)
  2148. {
  2149. union dp_align_mac_addr local_mac_addr_aligned, *mac_addr;
  2150. uint32_t index;
  2151. struct dp_peer *peer;
  2152. struct dp_vdev *vdev;
  2153. dp_mld_peer_hash_obj_t mld_hash_obj;
  2154. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2155. if (!mld_hash_obj)
  2156. return NULL;
  2157. if (!mld_hash_obj->mld_peer_hash.bins)
  2158. return NULL;
  2159. if (mac_addr_is_aligned) {
  2160. mac_addr = (union dp_align_mac_addr *)peer_mac_addr;
  2161. } else {
  2162. qdf_mem_copy(
  2163. &local_mac_addr_aligned.raw[0],
  2164. peer_mac_addr, QDF_MAC_ADDR_SIZE);
  2165. mac_addr = &local_mac_addr_aligned;
  2166. }
  2167. if (vdev_id != DP_VDEV_ALL) {
  2168. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, mod_id);
  2169. if (!vdev) {
  2170. dp_err("vdev is null");
  2171. return NULL;
  2172. }
  2173. } else {
  2174. vdev = NULL;
  2175. }
  2176. /* search mld peer table if no link peer for given mac address */
  2177. index = dp_mlo_peer_find_hash_index(mld_hash_obj, mac_addr);
  2178. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2179. TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
  2180. hash_list_elem) {
  2181. if (dp_peer_find_mac_addr_cmp(mac_addr, &peer->mac_addr) == 0) {
  2182. if ((vdev_id == DP_VDEV_ALL) || (
  2183. dp_peer_find_mac_addr_cmp(
  2184. &peer->vdev->mld_mac_addr,
  2185. &vdev->mld_mac_addr) == 0)) {
  2186. /* take peer reference before returning */
  2187. if (dp_peer_get_ref(NULL, peer, mod_id) !=
  2188. QDF_STATUS_SUCCESS)
  2189. peer = NULL;
  2190. if (vdev)
  2191. dp_vdev_unref_delete(soc, vdev, mod_id);
  2192. qdf_spin_unlock_bh(
  2193. &mld_hash_obj->mld_peer_hash_lock);
  2194. return peer;
  2195. }
  2196. }
  2197. }
  2198. if (vdev)
  2199. dp_vdev_unref_delete(soc, vdev, mod_id);
  2200. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2201. return NULL; /* failure */
  2202. }
  2203. static void
  2204. dp_mlo_peer_find_hash_remove_be(struct dp_soc *soc, struct dp_peer *peer)
  2205. {
  2206. uint32_t index;
  2207. struct dp_peer *tmppeer = NULL;
  2208. int found = 0;
  2209. dp_mld_peer_hash_obj_t mld_hash_obj;
  2210. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2211. if (!mld_hash_obj)
  2212. return;
  2213. index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
  2214. QDF_ASSERT(!TAILQ_EMPTY(&mld_hash_obj->mld_peer_hash.bins[index]));
  2215. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2216. TAILQ_FOREACH(tmppeer, &mld_hash_obj->mld_peer_hash.bins[index],
  2217. hash_list_elem) {
  2218. if (tmppeer == peer) {
  2219. found = 1;
  2220. break;
  2221. }
  2222. }
  2223. QDF_ASSERT(found);
  2224. TAILQ_REMOVE(&mld_hash_obj->mld_peer_hash.bins[index], peer,
  2225. hash_list_elem);
  2226. dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") removed. (found %u)",
  2227. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw), found);
  2228. dp_peer_unref_delete(peer, DP_MOD_ID_CONFIG);
  2229. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2230. }
  2231. static void
  2232. dp_mlo_peer_find_hash_add_be(struct dp_soc *soc, struct dp_peer *peer)
  2233. {
  2234. uint32_t index;
  2235. dp_mld_peer_hash_obj_t mld_hash_obj;
  2236. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2237. if (!mld_hash_obj)
  2238. return;
  2239. index = dp_mlo_peer_find_hash_index(mld_hash_obj, &peer->mac_addr);
  2240. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2241. if (QDF_IS_STATUS_ERROR(dp_peer_get_ref(NULL, peer,
  2242. DP_MOD_ID_CONFIG))) {
  2243. dp_err("fail to get peer ref:" QDF_MAC_ADDR_FMT,
  2244. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  2245. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2246. return;
  2247. }
  2248. TAILQ_INSERT_TAIL(&mld_hash_obj->mld_peer_hash.bins[index], peer,
  2249. hash_list_elem);
  2250. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2251. dp_info("Peer %pK (" QDF_MAC_ADDR_FMT ") added",
  2252. peer, QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  2253. }
  2254. void dp_print_mlo_ast_stats_be(struct dp_soc *soc)
  2255. {
  2256. uint32_t index;
  2257. struct dp_peer *peer;
  2258. dp_mld_peer_hash_obj_t mld_hash_obj;
  2259. mld_hash_obj = dp_mlo_get_peer_hash_obj(soc);
  2260. if (!mld_hash_obj)
  2261. return;
  2262. qdf_spin_lock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2263. for (index = 0; index < mld_hash_obj->mld_peer_hash.mask; index++) {
  2264. TAILQ_FOREACH(peer, &mld_hash_obj->mld_peer_hash.bins[index],
  2265. hash_list_elem) {
  2266. dp_print_peer_ast_entries(soc, peer, NULL);
  2267. }
  2268. }
  2269. qdf_spin_unlock_bh(&mld_hash_obj->mld_peer_hash_lock);
  2270. }
  2271. #else /* WLAN_FEATURE_11BE_MLO */
  2272. void dp_mlo_dev_ctxt_list_attach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2273. {
  2274. }
  2275. void dp_mlo_dev_ctxt_list_detach_wrapper(dp_mlo_dev_obj_t mlo_dev_obj)
  2276. {
  2277. }
  2278. #endif /* WLAN_FEATURE_11BE_MLO */
  2279. #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
  2280. static void dp_reconfig_tx_vdev_mcast_ctrl_be(struct dp_soc *soc,
  2281. struct dp_vdev *vdev)
  2282. {
  2283. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2284. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2285. hal_soc_handle_t hal_soc = soc->hal_soc;
  2286. uint8_t vdev_id = vdev->vdev_id;
  2287. if (vdev->opmode == wlan_op_mode_sta) {
  2288. if (vdev->pdev->isolation)
  2289. hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
  2290. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  2291. else
  2292. hal_tx_vdev_mcast_ctrl_set(hal_soc, vdev_id,
  2293. HAL_TX_MCAST_CTRL_MEC_NOTIFY);
  2294. } else if (vdev->opmode == wlan_op_mode_ap) {
  2295. hal_tx_mcast_mlo_reinject_routing_set(
  2296. hal_soc,
  2297. HAL_TX_MCAST_MLO_REINJECT_TQM_NOTIFY);
  2298. if (vdev->mlo_vdev) {
  2299. hal_tx_vdev_mcast_ctrl_set(
  2300. hal_soc,
  2301. vdev_id,
  2302. HAL_TX_MCAST_CTRL_NO_SPECIAL);
  2303. } else {
  2304. hal_tx_vdev_mcast_ctrl_set(hal_soc,
  2305. vdev_id,
  2306. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  2307. }
  2308. }
  2309. }
  2310. static void dp_bank_reconfig_be(struct dp_soc *soc, struct dp_vdev *vdev)
  2311. {
  2312. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2313. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2314. union hal_tx_bank_config *bank_config;
  2315. if (!be_vdev || be_vdev->bank_id == DP_BE_INVALID_BANK_ID)
  2316. return;
  2317. bank_config = &be_soc->bank_profiles[be_vdev->bank_id].bank_config;
  2318. hal_tx_populate_bank_register(be_soc->soc.hal_soc, bank_config,
  2319. be_vdev->bank_id);
  2320. }
  2321. #endif
  2322. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  2323. defined(WLAN_MCAST_MLO)
  2324. static void dp_mlo_mcast_reset_pri_mcast(struct dp_vdev_be *be_vdev,
  2325. struct dp_vdev *ptnr_vdev,
  2326. void *arg)
  2327. {
  2328. struct dp_vdev_be *be_ptnr_vdev =
  2329. dp_get_be_vdev_from_dp_vdev(ptnr_vdev);
  2330. be_ptnr_vdev->mcast_primary = false;
  2331. }
  2332. #if defined(CONFIG_MLO_SINGLE_DEV)
  2333. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2334. struct dp_vdev *vdev,
  2335. cdp_config_param_type val)
  2336. {
  2337. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2338. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
  2339. be_vdev->vdev.pdev->soc);
  2340. be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
  2341. vdev->mlo_vdev = 1;
  2342. if (be_vdev->mcast_primary) {
  2343. struct cdp_txrx_peer_params_update params = {0};
  2344. dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
  2345. dp_mlo_mcast_reset_pri_mcast,
  2346. (void *)&be_vdev->mcast_primary,
  2347. DP_MOD_ID_TX_MCAST,
  2348. DP_LINK_VDEV_ITER,
  2349. DP_VDEV_ITERATE_SKIP_SELF);
  2350. params.chip_id = be_soc->mlo_chip_id;
  2351. params.pdev_id = be_vdev->vdev.pdev->pdev_id;
  2352. params.vdev_id = vdev->vdev_id;
  2353. dp_wdi_event_handler(
  2354. WDI_EVENT_MCAST_PRIMARY_UPDATE,
  2355. be_vdev->vdev.pdev->soc,
  2356. (void *)&params, CDP_INVALID_PEER,
  2357. WDI_NO_VAL, params.pdev_id);
  2358. }
  2359. }
  2360. static void dp_get_vdev_stats_for_unmap_peer_mlo(struct dp_vdev *vdev,
  2361. struct dp_peer *peer)
  2362. {
  2363. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2364. struct cdp_vdev_stats *vdev_stats = &be_vdev->mlo_stats;
  2365. struct dp_txrx_peer *txrx_peer = dp_get_txrx_peer(peer);
  2366. struct dp_pdev *pdev = vdev->pdev;
  2367. struct dp_soc *soc = vdev->pdev->soc;
  2368. uint8_t link_id = dp_get_peer_hw_link_id(soc, pdev);
  2369. struct dp_peer_per_pkt_stats *per_pkt_stats;
  2370. if (!txrx_peer)
  2371. goto link_stats;
  2372. dp_peer_aggregate_tid_stats(peer);
  2373. if (!IS_MLO_DP_LINK_PEER(peer)) {
  2374. per_pkt_stats = &txrx_peer->stats[0].per_pkt_stats;
  2375. dp_update_vdev_basic_stats(txrx_peer, vdev_stats);
  2376. DP_UPDATE_PER_PKT_STATS(vdev_stats, per_pkt_stats);
  2377. }
  2378. if (IS_MLO_DP_LINK_PEER(peer)) {
  2379. link_id = dp_get_peer_hw_link_id(soc, pdev);
  2380. if (link_id > 0) {
  2381. per_pkt_stats =
  2382. &txrx_peer->stats[link_id].per_pkt_stats;
  2383. DP_UPDATE_PER_PKT_STATS(vdev_stats, per_pkt_stats);
  2384. }
  2385. }
  2386. link_stats:
  2387. dp_monitor_peer_get_stats(soc, peer, vdev_stats, UPDATE_VDEV_STATS_MLD);
  2388. }
  2389. static
  2390. void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
  2391. struct dp_peer *peer)
  2392. {
  2393. if (IS_DP_LEGACY_PEER(peer))
  2394. dp_get_vdev_stats_for_unmap_peer_legacy(vdev, peer);
  2395. else
  2396. dp_get_vdev_stats_for_unmap_peer_mlo(vdev, peer);
  2397. }
  2398. #else
  2399. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2400. struct dp_vdev *vdev,
  2401. cdp_config_param_type val)
  2402. {
  2403. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2404. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(
  2405. be_vdev->vdev.pdev->soc);
  2406. be_vdev->mcast_primary = val.cdp_vdev_param_mcast_vdev;
  2407. vdev->mlo_vdev = 1;
  2408. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  2409. vdev->vdev_id,
  2410. HAL_TX_MCAST_CTRL_NO_SPECIAL);
  2411. if (be_vdev->mcast_primary) {
  2412. struct cdp_txrx_peer_params_update params = {0};
  2413. dp_mlo_iter_ptnr_vdev(be_soc, be_vdev,
  2414. dp_mlo_mcast_reset_pri_mcast,
  2415. (void *)&be_vdev->mcast_primary,
  2416. DP_MOD_ID_TX_MCAST,
  2417. DP_LINK_VDEV_ITER,
  2418. DP_VDEV_ITERATE_SKIP_SELF);
  2419. params.chip_id = be_soc->mlo_chip_id;
  2420. params.pdev_id = vdev->pdev->pdev_id;
  2421. params.vdev_id = vdev->vdev_id;
  2422. dp_wdi_event_handler(
  2423. WDI_EVENT_MCAST_PRIMARY_UPDATE,
  2424. vdev->pdev->soc,
  2425. (void *)&params, CDP_INVALID_PEER,
  2426. WDI_NO_VAL, params.pdev_id);
  2427. }
  2428. }
  2429. #endif
  2430. static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
  2431. struct dp_vdev *vdev,
  2432. cdp_config_param_type val)
  2433. {
  2434. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2435. be_vdev->mcast_primary = false;
  2436. vdev->mlo_vdev = 0;
  2437. hal_tx_vdev_mcast_ctrl_set(vdev->pdev->soc->hal_soc,
  2438. vdev->vdev_id,
  2439. HAL_TX_MCAST_CTRL_FW_EXCEPTION);
  2440. }
  2441. /**
  2442. * dp_txrx_get_vdev_mcast_param_be() - Target specific ops for getting vdev
  2443. * params related to multicast
  2444. * @soc: DP soc handle
  2445. * @vdev: pointer to vdev structure
  2446. * @val: buffer address
  2447. *
  2448. * Return: QDF_STATUS
  2449. */
  2450. static
  2451. QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
  2452. struct dp_vdev *vdev,
  2453. cdp_config_param_type *val)
  2454. {
  2455. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2456. if (be_vdev->mcast_primary)
  2457. val->cdp_vdev_param_mcast_vdev = true;
  2458. else
  2459. val->cdp_vdev_param_mcast_vdev = false;
  2460. return QDF_STATUS_SUCCESS;
  2461. }
  2462. #else
  2463. static void dp_txrx_set_mlo_mcast_primary_vdev_param_be(
  2464. struct dp_vdev *vdev,
  2465. cdp_config_param_type val)
  2466. {
  2467. }
  2468. static void dp_txrx_reset_mlo_mcast_primary_vdev_param_be(
  2469. struct dp_vdev *vdev,
  2470. cdp_config_param_type val)
  2471. {
  2472. }
  2473. static
  2474. QDF_STATUS dp_txrx_get_vdev_mcast_param_be(struct dp_soc *soc,
  2475. struct dp_vdev *vdev,
  2476. cdp_config_param_type *val)
  2477. {
  2478. return QDF_STATUS_SUCCESS;
  2479. }
  2480. static
  2481. void dp_get_vdev_stats_for_unmap_peer_be(struct dp_vdev *vdev,
  2482. struct dp_peer *peer)
  2483. {
  2484. }
  2485. #endif
  2486. #ifdef DP_TX_IMPLICIT_RBM_MAPPING
  2487. static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
  2488. uint8_t tx_ring_id,
  2489. uint8_t bm_id)
  2490. {
  2491. hal_tx_config_rbm_mapping_be(soc->hal_soc,
  2492. soc->tcl_data_ring[tx_ring_id].hal_srng,
  2493. bm_id);
  2494. }
  2495. #else
  2496. static void dp_tx_implicit_rbm_set_be(struct dp_soc *soc,
  2497. uint8_t tx_ring_id,
  2498. uint8_t bm_id)
  2499. {
  2500. }
  2501. #endif
  2502. /**
  2503. * dp_txrx_set_vdev_param_be() - Target specific ops while setting vdev params
  2504. * @soc: DP soc handle
  2505. * @vdev: pointer to vdev structure
  2506. * @param: parameter type to get value
  2507. * @val: value
  2508. *
  2509. * Return: QDF_STATUS
  2510. */
  2511. static
  2512. QDF_STATUS dp_txrx_set_vdev_param_be(struct dp_soc *soc,
  2513. struct dp_vdev *vdev,
  2514. enum cdp_vdev_param_type param,
  2515. cdp_config_param_type val)
  2516. {
  2517. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2518. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2519. switch (param) {
  2520. case CDP_TX_ENCAP_TYPE:
  2521. case CDP_UPDATE_DSCP_TO_TID_MAP:
  2522. case CDP_UPDATE_TDLS_FLAGS:
  2523. dp_tx_update_bank_profile(be_soc, be_vdev);
  2524. dp_tx_update_vp_profile(be_soc, be_vdev);
  2525. break;
  2526. case CDP_ENABLE_CIPHER:
  2527. if (vdev->tx_encap_type == htt_cmn_pkt_type_raw)
  2528. dp_tx_update_bank_profile(be_soc, be_vdev);
  2529. break;
  2530. case CDP_SET_MCAST_VDEV:
  2531. dp_txrx_set_mlo_mcast_primary_vdev_param_be(vdev, val);
  2532. break;
  2533. case CDP_RESET_MLO_MCAST_VDEV:
  2534. dp_txrx_reset_mlo_mcast_primary_vdev_param_be(vdev, val);
  2535. break;
  2536. default:
  2537. dp_warn("invalid param %d", param);
  2538. break;
  2539. }
  2540. return QDF_STATUS_SUCCESS;
  2541. }
  2542. #ifdef WLAN_FEATURE_11BE_MLO
  2543. #ifdef DP_USE_REDUCED_PEER_ID_FIELD_WIDTH
  2544. static inline void
  2545. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2546. {
  2547. soc->peer_id_shift = dp_log2_ceil(soc->max_peers);
  2548. soc->peer_id_mask = (1 << soc->peer_id_shift) - 1;
  2549. /*
  2550. * Double the peers since we use ML indication bit
  2551. * alongwith peer_id to find peers.
  2552. */
  2553. soc->max_peer_id = 1 << (soc->peer_id_shift + 1);
  2554. }
  2555. #else
  2556. static inline void
  2557. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2558. {
  2559. soc->max_peer_id =
  2560. (1 << (HTT_RX_PEER_META_DATA_V1_ML_PEER_VALID_S + 1)) - 1;
  2561. }
  2562. #endif /* DP_USE_REDUCED_PEER_ID_FIELD_WIDTH */
  2563. #else
  2564. static inline void
  2565. dp_soc_max_peer_id_set(struct dp_soc *soc)
  2566. {
  2567. soc->max_peer_id = soc->max_peers;
  2568. }
  2569. #endif /* WLAN_FEATURE_11BE_MLO */
  2570. static void dp_peer_map_detach_be(struct dp_soc *soc)
  2571. {
  2572. if (soc->host_ast_db_enable)
  2573. dp_peer_ast_hash_detach(soc);
  2574. }
  2575. static QDF_STATUS dp_peer_map_attach_be(struct dp_soc *soc)
  2576. {
  2577. QDF_STATUS status;
  2578. if (soc->host_ast_db_enable) {
  2579. status = dp_peer_ast_hash_attach(soc);
  2580. if (QDF_IS_STATUS_ERROR(status))
  2581. return status;
  2582. }
  2583. dp_soc_max_peer_id_set(soc);
  2584. return QDF_STATUS_SUCCESS;
  2585. }
  2586. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_DP_MLO_DEV_CTX)
  2587. void dp_mlo_dev_ctxt_list_attach(dp_mlo_dev_obj_t mlo_dev_obj)
  2588. {
  2589. TAILQ_INIT(&mlo_dev_obj->mlo_dev_list);
  2590. qdf_spinlock_create(&mlo_dev_obj->mlo_dev_list_lock);
  2591. }
  2592. void dp_mlo_dev_ctxt_list_detach(dp_mlo_dev_obj_t mlo_dev_obj)
  2593. {
  2594. struct dp_mlo_dev_ctxt *mld_ctxt = NULL;
  2595. struct dp_mlo_dev_ctxt *tmp_mld_ctxt = NULL;
  2596. if (!TAILQ_EMPTY(&mlo_dev_obj->mlo_dev_list)) {
  2597. dp_alert("DP MLO dev list is not empty");
  2598. qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2599. TAILQ_FOREACH_SAFE(mld_ctxt, &mlo_dev_obj->mlo_dev_list,
  2600. ml_dev_list_elem, tmp_mld_ctxt) {
  2601. if (mld_ctxt) {
  2602. dp_alert("MLD MAC " QDF_MAC_ADDR_FMT " ",
  2603. QDF_MAC_ADDR_REF(
  2604. &mld_ctxt->mld_mac_addr.raw));
  2605. qdf_mem_free(mld_ctxt);
  2606. }
  2607. }
  2608. qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2609. }
  2610. qdf_spinlock_destroy(&mlo_dev_obj->mlo_dev_list_lock);
  2611. }
  2612. void dp_mlo_dev_ctxt_unref_delete(struct dp_mlo_dev_ctxt *mlo_dev_ctxt,
  2613. enum dp_mod_id mod_id)
  2614. {
  2615. QDF_ASSERT(qdf_atomic_dec_return(&mlo_dev_ctxt->mod_refs[mod_id]) >= 0);
  2616. /* Return if this is not the last reference*/
  2617. if (!qdf_atomic_dec_and_test(&mlo_dev_ctxt->ref_cnt))
  2618. return;
  2619. QDF_ASSERT(mlo_dev_ctxt->ref_delete_pending);
  2620. qdf_spinlock_destroy(&mlo_dev_ctxt->vdev_list_lock);
  2621. qdf_mem_free(mlo_dev_ctxt);
  2622. }
  2623. QDF_STATUS dp_mlo_dev_get_ref(struct dp_mlo_dev_ctxt *mlo_dev_ctxt,
  2624. enum dp_mod_id mod_id)
  2625. {
  2626. if (!qdf_atomic_inc_return(&mlo_dev_ctxt->ref_cnt))
  2627. return QDF_STATUS_E_INVAL;
  2628. qdf_atomic_inc(&mlo_dev_ctxt->mod_refs[mod_id]);
  2629. return QDF_STATUS_SUCCESS;
  2630. }
  2631. struct dp_mlo_dev_ctxt *
  2632. dp_get_mlo_dev_ctx_by_mld_mac_addr(struct dp_soc_be *be_soc,
  2633. uint8_t *mldaddr,
  2634. enum dp_mod_id mod_id)
  2635. {
  2636. struct dp_mlo_dev_ctxt *mld_cur = NULL;
  2637. struct dp_mlo_dev_ctxt *tmp_mld_cur = NULL;
  2638. dp_mlo_dev_obj_t mlo_dev_obj;
  2639. mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
  2640. if (!mlo_dev_obj) {
  2641. dp_err("DP Global MLO Context is NULL");
  2642. return NULL;
  2643. }
  2644. /*
  2645. * Iterate through ml dev list, till mldaddr matches with
  2646. * entry of list
  2647. */
  2648. qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2649. TAILQ_FOREACH_SAFE(mld_cur, &mlo_dev_obj->mlo_dev_list,
  2650. ml_dev_list_elem, tmp_mld_cur) {
  2651. if (!qdf_mem_cmp(&mld_cur->mld_mac_addr.raw, mldaddr,
  2652. QDF_MAC_ADDR_SIZE)) {
  2653. if (dp_mlo_dev_get_ref(mld_cur, mod_id)
  2654. == QDF_STATUS_SUCCESS) {
  2655. qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2656. return mld_cur;
  2657. }
  2658. }
  2659. }
  2660. qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2661. return NULL;
  2662. }
  2663. /**
  2664. * dp_mlo_dev_ctxt_create() - Allocate DP MLO dev context
  2665. * @soc_hdl: SOC handle
  2666. * @mld_mac_addr: MLD MAC address
  2667. *
  2668. * Return: QDF_STATUS
  2669. */
  2670. static inline
  2671. QDF_STATUS dp_mlo_dev_ctxt_create(struct cdp_soc_t *soc_hdl,
  2672. uint8_t *mld_mac_addr)
  2673. {
  2674. struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
  2675. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2676. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2677. dp_mlo_dev_obj_t mlo_dev_obj;
  2678. mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
  2679. if (!mlo_dev_obj) {
  2680. dp_err("DP Global MLO Context is NULL");
  2681. return QDF_STATUS_E_FAILURE;
  2682. }
  2683. /* check if MLO dev ctx already available */
  2684. mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
  2685. mld_mac_addr,
  2686. DP_MOD_ID_MLO_DEV);
  2687. if (mlo_dev_ctxt) {
  2688. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2689. /* assert if we get two create request for same MLD MAC */
  2690. qdf_assert_always(0);
  2691. }
  2692. /* Allocate MLO dev ctx */
  2693. mlo_dev_ctxt = qdf_mem_malloc(sizeof(struct dp_mlo_dev_ctxt));
  2694. if (!mlo_dev_ctxt) {
  2695. dp_err("Failed to allocate DP MLO Dev Context");
  2696. return QDF_STATUS_E_NOMEM;
  2697. }
  2698. qdf_copy_macaddr((struct qdf_mac_addr *)&mlo_dev_ctxt->mld_mac_addr.raw[0],
  2699. (struct qdf_mac_addr *)mld_mac_addr);
  2700. qdf_mem_set(mlo_dev_ctxt->vdev_list,
  2701. WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC,
  2702. CDP_INVALID_VDEV_ID);
  2703. qdf_mem_set(mlo_dev_ctxt->bridge_vdev,
  2704. WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC,
  2705. CDP_INVALID_VDEV_ID);
  2706. mlo_dev_ctxt->seq_num = 0;
  2707. /* Add mlo_dev_ctxt to the global DP MLO list */
  2708. qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2709. TAILQ_INSERT_TAIL(&mlo_dev_obj->mlo_dev_list,
  2710. mlo_dev_ctxt, ml_dev_list_elem);
  2711. qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2712. /* Ref for MLO ctxt saved in global list */
  2713. dp_mlo_dev_get_ref(mlo_dev_ctxt, DP_MOD_ID_CONFIG);
  2714. mlo_dev_ctxt->ref_delete_pending = 0;
  2715. qdf_spinlock_create(&mlo_dev_ctxt->vdev_list_lock);
  2716. return QDF_STATUS_SUCCESS;
  2717. }
  2718. /**
  2719. * dp_mlo_dev_ctxt_destroy() - Destroy DP MLO dev context
  2720. * @soc_hdl: SOC handle
  2721. * @mld_mac_addr: MLD MAC address
  2722. *
  2723. * Return: QDF_STATUS
  2724. */
  2725. static inline
  2726. QDF_STATUS dp_mlo_dev_ctxt_destroy(struct cdp_soc_t *soc_hdl,
  2727. uint8_t *mld_mac_addr)
  2728. {
  2729. struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
  2730. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2731. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2732. dp_mlo_dev_obj_t mlo_dev_obj;
  2733. mlo_dev_obj = dp_get_mlo_dev_list_obj(be_soc);
  2734. if (!mlo_dev_obj) {
  2735. dp_err("DP Global MLO Context is NULL");
  2736. return QDF_STATUS_E_INVAL;
  2737. }
  2738. /* GET mlo_dev_ctxt from the global list */
  2739. mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
  2740. mld_mac_addr,
  2741. DP_MOD_ID_MLO_DEV);
  2742. if (!mlo_dev_ctxt) {
  2743. dp_err("Failed to get DP MLO Dev Context by MLD mac addr");
  2744. return QDF_STATUS_E_INVAL;
  2745. }
  2746. if (mlo_dev_ctxt->vdev_count)
  2747. dp_alert("deleting MLO dev ctxt with non zero vdev count");
  2748. qdf_spin_lock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2749. TAILQ_REMOVE(&mlo_dev_obj->mlo_dev_list,
  2750. mlo_dev_ctxt, ml_dev_list_elem);
  2751. qdf_spin_unlock_bh(&mlo_dev_obj->mlo_dev_list_lock);
  2752. /* unref for MLO ctxt ref released from Global list */
  2753. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_CONFIG);
  2754. mlo_dev_ctxt->ref_delete_pending = 1;
  2755. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2756. return QDF_STATUS_SUCCESS;
  2757. }
  2758. /**
  2759. * dp_mlo_dev_ctxt_vdev_attach() - Attach vdev to DP MLO dev context
  2760. * @soc_hdl: SOC handle
  2761. * @vdev_id: vdev id for the vdev to be attached
  2762. * @mld_mac_addr: MLD MAC address
  2763. *
  2764. * Return: QDF_STATUS
  2765. */
  2766. static inline
  2767. QDF_STATUS dp_mlo_dev_ctxt_vdev_attach(struct cdp_soc_t *soc_hdl,
  2768. uint8_t vdev_id,
  2769. uint8_t *mld_mac_addr)
  2770. {
  2771. struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
  2772. struct dp_vdev *vdev = NULL;
  2773. struct dp_vdev_be *be_vdev = NULL;
  2774. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2775. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2776. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
  2777. if (!vdev)
  2778. return QDF_STATUS_E_FAILURE;
  2779. be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2780. /* GET mlo_dev_ctxt from the global list */
  2781. mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
  2782. mld_mac_addr,
  2783. DP_MOD_ID_MLO_DEV);
  2784. if (!mlo_dev_ctxt) {
  2785. dp_err("Failed to get MLO ctxt for " QDF_MAC_ADDR_FMT "",
  2786. QDF_MAC_ADDR_REF(mld_mac_addr));
  2787. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2788. return QDF_STATUS_E_INVAL;
  2789. }
  2790. dp_attach_vdev_list_in_mlo_dev_ctxt(be_soc, vdev, mlo_dev_ctxt);
  2791. be_vdev->mlo_dev_ctxt = mlo_dev_ctxt;
  2792. /* ref for holding MLO ctxt in be_vdev */
  2793. dp_mlo_dev_get_ref(mlo_dev_ctxt, DP_MOD_ID_CHILD);
  2794. /* unref for mlo ctxt taken at the start of this function */
  2795. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2796. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2797. return QDF_STATUS_SUCCESS;
  2798. }
  2799. /**
  2800. * dp_mlo_dev_ctxt_vdev_detach() - Detach vdev from DP MLO dev context
  2801. * @soc_hdl: SOC handle
  2802. * @vdev_id: vdev id for the vdev to be attached
  2803. * @mld_mac_addr: MLD MAC address
  2804. *
  2805. * Return: QDF_STATUS
  2806. */
  2807. static inline
  2808. QDF_STATUS dp_mlo_dev_ctxt_vdev_detach(struct cdp_soc_t *soc_hdl,
  2809. uint8_t vdev_id,
  2810. uint8_t *mld_mac_addr)
  2811. {
  2812. struct dp_vdev *vdev = NULL;
  2813. struct dp_vdev_be *be_vdev = NULL;
  2814. struct dp_mlo_dev_ctxt *mlo_dev_ctxt = NULL;
  2815. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2816. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2817. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
  2818. if (!vdev)
  2819. return QDF_STATUS_E_FAILURE;
  2820. be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  2821. /* GET mlo_dev_ctxt from the global list */
  2822. mlo_dev_ctxt = dp_get_mlo_dev_ctx_by_mld_mac_addr(be_soc,
  2823. mld_mac_addr,
  2824. DP_MOD_ID_MLO_DEV);
  2825. if (!mlo_dev_ctxt) {
  2826. dp_err("Failed to get DP MLO Dev Context by MLD mac addr");
  2827. if (!be_vdev->mlo_dev_ctxt) {
  2828. dp_err("Failed to get DP MLO Dev Context from vdev");
  2829. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2830. return QDF_STATUS_E_INVAL;
  2831. }
  2832. mlo_dev_ctxt = be_vdev->mlo_dev_ctxt;
  2833. dp_mlo_dev_get_ref(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2834. }
  2835. if (dp_detach_vdev_list_in_mlo_dev_ctxt(be_soc, vdev, mlo_dev_ctxt)
  2836. != QDF_STATUS_SUCCESS) {
  2837. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2838. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2839. return QDF_STATUS_SUCCESS;
  2840. }
  2841. be_vdev->mlo_dev_ctxt = NULL;
  2842. /* Save vdev stats in MLO dev ctx */
  2843. dp_update_mlo_mld_vdev_ctxt_stats(&mlo_dev_ctxt->stats, &vdev->stats);
  2844. /* reset vdev stats to zero */
  2845. qdf_mem_set(&vdev->stats, sizeof(struct dp_vdev_stats), 0);
  2846. /* unref for mlo ctxt removed from be_vdev*/
  2847. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_CHILD);
  2848. /* unref for mlo ctxt taken at the start of this function */
  2849. dp_mlo_dev_ctxt_unref_delete(mlo_dev_ctxt, DP_MOD_ID_MLO_DEV);
  2850. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2851. return QDF_STATUS_SUCCESS;
  2852. }
  2853. #else
  2854. void dp_mlo_dev_ctxt_list_attach(dp_mlo_dev_obj_t mlo_dev_obj)
  2855. {
  2856. }
  2857. void dp_mlo_dev_ctxt_list_detach(dp_mlo_dev_obj_t mlo_dev_obj)
  2858. {
  2859. }
  2860. static inline
  2861. QDF_STATUS dp_mlo_dev_ctxt_create(struct cdp_soc_t *soc_hdl,
  2862. uint8_t *mld_mac_addr)
  2863. {
  2864. return QDF_STATUS_SUCCESS;
  2865. }
  2866. static inline
  2867. QDF_STATUS dp_mlo_dev_ctxt_destroy(struct cdp_soc_t *soc_hdl,
  2868. uint8_t *mld_mac_addr)
  2869. {
  2870. return QDF_STATUS_SUCCESS;
  2871. }
  2872. static inline
  2873. QDF_STATUS dp_mlo_dev_ctxt_vdev_attach(struct cdp_soc_t *soc_hdl,
  2874. uint8_t vdev_id,
  2875. uint8_t *mld_mac_addr)
  2876. {
  2877. return QDF_STATUS_SUCCESS;
  2878. }
  2879. static inline
  2880. QDF_STATUS dp_mlo_dev_ctxt_vdev_detach(struct cdp_soc_t *soc_hdl,
  2881. uint8_t vdev_id,
  2882. uint8_t *mld_mac_addr)
  2883. {
  2884. return QDF_STATUS_SUCCESS;
  2885. }
  2886. #endif /* WLAN_DP_MLO_DEV_CTX */
  2887. #ifdef WLAN_FEATURE_11BE_MLO
  2888. #ifdef WLAN_MCAST_MLO
  2889. static inline void
  2890. dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
  2891. {
  2892. arch_ops->dp_tx_mcast_handler = dp_tx_mlo_mcast_handler_be;
  2893. arch_ops->dp_rx_mcast_handler = dp_rx_mlo_igmp_handler;
  2894. arch_ops->dp_tx_is_mcast_primary = dp_tx_mlo_is_mcast_primary_be;
  2895. }
  2896. #else /* WLAN_MCAST_MLO */
  2897. static inline void
  2898. dp_initialize_arch_ops_be_mcast_mlo(struct dp_arch_ops *arch_ops)
  2899. {
  2900. }
  2901. #endif /* WLAN_MCAST_MLO */
  2902. #ifdef WLAN_MLO_MULTI_CHIP
  2903. static inline void
  2904. dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
  2905. {
  2906. arch_ops->dp_partner_chips_map = dp_mlo_partner_chips_map;
  2907. arch_ops->dp_partner_chips_unmap = dp_mlo_partner_chips_unmap;
  2908. arch_ops->dp_soc_get_by_idle_bm_id = dp_soc_get_by_idle_bm_id;
  2909. arch_ops->dp_get_soc_by_chip_id = dp_get_soc_by_chip_id_be;
  2910. arch_ops->dp_mlo_print_ptnr_info = dp_mlo_debug_print_ptnr_info;
  2911. arch_ops->dp_get_interface_stats = dp_get_interface_stats_be;
  2912. arch_ops->mlo_get_chip_id = dp_mlo_get_chip_id;
  2913. arch_ops->mlo_link_peer_find_hash_find_by_chip_id =
  2914. dp_mlo_link_peer_hash_find_by_chip_id;
  2915. }
  2916. #else
  2917. static inline void
  2918. dp_initialize_arch_ops_be_mlo_multi_chip(struct dp_arch_ops *arch_ops)
  2919. {
  2920. }
  2921. #endif
  2922. static inline void
  2923. dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
  2924. {
  2925. dp_initialize_arch_ops_be_mcast_mlo(arch_ops);
  2926. dp_initialize_arch_ops_be_mlo_multi_chip(arch_ops);
  2927. arch_ops->mlo_peer_find_hash_detach =
  2928. dp_mlo_peer_find_hash_detach_wrapper;
  2929. arch_ops->mlo_peer_find_hash_attach =
  2930. dp_mlo_peer_find_hash_attach_wrapper;
  2931. arch_ops->mlo_peer_find_hash_add = dp_mlo_peer_find_hash_add_be;
  2932. arch_ops->mlo_peer_find_hash_remove = dp_mlo_peer_find_hash_remove_be;
  2933. arch_ops->mlo_peer_find_hash_find = dp_mlo_peer_find_hash_find_be;
  2934. arch_ops->get_hw_link_id = dp_get_hw_link_id_be;
  2935. }
  2936. static struct cdp_cmn_mlo_ops dp_cmn_mlo_ops = {
  2937. .mlo_dev_ctxt_create = dp_mlo_dev_ctxt_create,
  2938. .mlo_dev_ctxt_attach = dp_mlo_dev_ctxt_vdev_attach,
  2939. .mlo_dev_ctxt_detach = dp_mlo_dev_ctxt_vdev_detach,
  2940. .mlo_dev_ctxt_destroy = dp_mlo_dev_ctxt_destroy,
  2941. };
  2942. void dp_soc_initialize_cdp_cmn_mlo_ops(struct dp_soc *soc)
  2943. {
  2944. soc->cdp_soc.ops->cmn_mlo_ops = &dp_cmn_mlo_ops;
  2945. }
  2946. #else /* WLAN_FEATURE_11BE_MLO */
  2947. static inline void
  2948. dp_initialize_arch_ops_be_mlo(struct dp_arch_ops *arch_ops)
  2949. {
  2950. }
  2951. void dp_soc_initialize_cdp_cmn_mlo_ops(struct dp_soc *soc)
  2952. {
  2953. }
  2954. #endif /* WLAN_FEATURE_11BE_MLO */
  2955. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  2956. #define DP_LMAC_PEER_ID_MSB_LEGACY 2
  2957. #define DP_LMAC_PEER_ID_MSB_MLO 3
  2958. static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
  2959. struct cdp_peer_setup_info *setup_info,
  2960. enum cdp_host_reo_dest_ring *reo_dest,
  2961. bool *hash_based,
  2962. uint8_t *lmac_peer_id_msb)
  2963. {
  2964. struct dp_soc *soc = vdev->pdev->soc;
  2965. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2966. if (!be_soc->mlo_enabled)
  2967. return dp_vdev_get_default_reo_hash(vdev, reo_dest,
  2968. hash_based);
  2969. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2970. *reo_dest = vdev->pdev->reo_dest;
  2971. /* Not a ML link peer use non-mlo */
  2972. if (!setup_info) {
  2973. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
  2974. return;
  2975. }
  2976. /* For STA ML VAP we do not have num links info at this point
  2977. * use MLO case always
  2978. */
  2979. if (vdev->opmode == wlan_op_mode_sta) {
  2980. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
  2981. return;
  2982. }
  2983. /* For AP ML VAP consider the peer as ML only it associates with
  2984. * multiple links
  2985. */
  2986. if (setup_info->num_links == 1) {
  2987. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_LEGACY;
  2988. return;
  2989. }
  2990. *lmac_peer_id_msb = DP_LMAC_PEER_ID_MSB_MLO;
  2991. }
  2992. static bool dp_reo_remap_config_be(struct dp_soc *soc,
  2993. uint32_t *remap0,
  2994. uint32_t *remap1,
  2995. uint32_t *remap2)
  2996. {
  2997. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  2998. uint32_t reo_config = wlan_cfg_get_reo_rings_mapping(soc->wlan_cfg_ctx);
  2999. uint32_t reo_mlo_config =
  3000. wlan_cfg_mlo_rx_ring_map_get(soc->wlan_cfg_ctx);
  3001. if (!be_soc->mlo_enabled)
  3002. return dp_reo_remap_config(soc, remap0, remap1, remap2);
  3003. *remap0 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
  3004. *remap1 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_config);
  3005. *remap2 = hal_reo_ix_remap_value_get_be(soc->hal_soc, reo_mlo_config);
  3006. return true;
  3007. }
  3008. #else
  3009. static void dp_peer_get_reo_hash_be(struct dp_vdev *vdev,
  3010. struct cdp_peer_setup_info *setup_info,
  3011. enum cdp_host_reo_dest_ring *reo_dest,
  3012. bool *hash_based,
  3013. uint8_t *lmac_peer_id_msb)
  3014. {
  3015. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  3016. }
  3017. static bool dp_reo_remap_config_be(struct dp_soc *soc,
  3018. uint32_t *remap0,
  3019. uint32_t *remap1,
  3020. uint32_t *remap2)
  3021. {
  3022. return dp_reo_remap_config(soc, remap0, remap1, remap2);
  3023. }
  3024. #endif
  3025. #ifdef CONFIG_MLO_SINGLE_DEV
  3026. static inline
  3027. void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
  3028. {
  3029. arch_ops->dp_tx_mlo_mcast_send = dp_tx_mlo_mcast_send_be;
  3030. }
  3031. #else
  3032. static inline
  3033. void dp_initialize_arch_ops_be_single_dev(struct dp_arch_ops *arch_ops)
  3034. {
  3035. }
  3036. #endif
  3037. #ifdef IPA_OFFLOAD
  3038. static int8_t dp_ipa_get_bank_id_be(struct dp_soc *soc)
  3039. {
  3040. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  3041. return be_soc->ipa_bank_id;
  3042. }
  3043. #ifdef QCA_IPA_LL_TX_FLOW_CONTROL
  3044. static void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
  3045. {
  3046. *wdi_ver = IPA_WDI_4;
  3047. }
  3048. #else
  3049. static inline void dp_ipa_get_wdi_version_be(uint8_t *wdi_ver)
  3050. {
  3051. }
  3052. #endif
  3053. static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
  3054. {
  3055. arch_ops->ipa_get_bank_id = dp_ipa_get_bank_id_be;
  3056. arch_ops->ipa_get_wdi_ver = dp_ipa_get_wdi_version_be;
  3057. }
  3058. #else /* !IPA_OFFLOAD */
  3059. static inline void dp_initialize_arch_ops_be_ipa(struct dp_arch_ops *arch_ops)
  3060. {
  3061. }
  3062. #endif /* IPA_OFFLOAD */
  3063. void dp_initialize_arch_ops_be(struct dp_arch_ops *arch_ops)
  3064. {
  3065. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  3066. arch_ops->tx_hw_enqueue = dp_tx_hw_enqueue_be;
  3067. arch_ops->dp_rx_process = dp_rx_process_be;
  3068. arch_ops->dp_tx_send_fast = dp_tx_fast_send_be;
  3069. arch_ops->tx_comp_get_params_from_hal_desc =
  3070. dp_tx_comp_get_params_from_hal_desc_be;
  3071. arch_ops->dp_tx_process_htt_completion =
  3072. dp_tx_process_htt_completion_be;
  3073. arch_ops->dp_tx_desc_pool_alloc = dp_tx_desc_pool_alloc_be;
  3074. arch_ops->dp_tx_desc_pool_free = dp_tx_desc_pool_free_be;
  3075. arch_ops->dp_tx_desc_pool_init = dp_tx_desc_pool_init_be;
  3076. arch_ops->dp_tx_desc_pool_deinit = dp_tx_desc_pool_deinit_be;
  3077. arch_ops->dp_rx_desc_pool_init = dp_rx_desc_pool_init_be;
  3078. arch_ops->dp_rx_desc_pool_deinit = dp_rx_desc_pool_deinit_be;
  3079. arch_ops->dp_wbm_get_rx_desc_from_hal_desc =
  3080. dp_wbm_get_rx_desc_from_hal_desc_be;
  3081. arch_ops->dp_tx_compute_hw_delay = dp_tx_compute_tx_delay_be;
  3082. arch_ops->dp_rx_wbm_err_reap_desc = dp_rx_wbm_err_reap_desc_be;
  3083. arch_ops->dp_rx_null_q_desc_handle = dp_rx_null_q_desc_handle_be;
  3084. #endif
  3085. arch_ops->txrx_get_context_size = dp_get_context_size_be;
  3086. #ifdef WIFI_MONITOR_SUPPORT
  3087. arch_ops->txrx_get_mon_context_size = dp_mon_get_context_size_be;
  3088. #endif
  3089. arch_ops->dp_rx_desc_cookie_2_va =
  3090. dp_rx_desc_cookie_2_va_be;
  3091. arch_ops->dp_rx_intrabss_mcast_handler =
  3092. dp_rx_intrabss_mcast_handler_be;
  3093. arch_ops->dp_rx_word_mask_subscribe = dp_rx_word_mask_subscribe_be;
  3094. arch_ops->txrx_soc_attach = dp_soc_attach_be;
  3095. arch_ops->txrx_soc_detach = dp_soc_detach_be;
  3096. arch_ops->txrx_soc_init = dp_soc_init_be;
  3097. arch_ops->txrx_soc_deinit = dp_soc_deinit_be_wrapper;
  3098. arch_ops->txrx_soc_srng_alloc = dp_soc_srng_alloc_be;
  3099. arch_ops->txrx_soc_srng_init = dp_soc_srng_init_be;
  3100. arch_ops->txrx_soc_srng_deinit = dp_soc_srng_deinit_be;
  3101. arch_ops->txrx_soc_srng_free = dp_soc_srng_free_be;
  3102. arch_ops->txrx_pdev_attach = dp_pdev_attach_be;
  3103. arch_ops->txrx_pdev_detach = dp_pdev_detach_be;
  3104. arch_ops->txrx_vdev_attach = dp_vdev_attach_be;
  3105. arch_ops->txrx_vdev_detach = dp_vdev_detach_be;
  3106. arch_ops->txrx_peer_setup = dp_peer_setup_be;
  3107. arch_ops->txrx_peer_map_attach = dp_peer_map_attach_be;
  3108. arch_ops->txrx_peer_map_detach = dp_peer_map_detach_be;
  3109. arch_ops->dp_rxdma_ring_sel_cfg = dp_rxdma_ring_sel_cfg_be;
  3110. arch_ops->dp_rx_peer_metadata_peer_id_get =
  3111. dp_rx_peer_metadata_peer_id_get_be;
  3112. arch_ops->soc_cfg_attach = dp_soc_cfg_attach_be;
  3113. arch_ops->tx_implicit_rbm_set = dp_tx_implicit_rbm_set_be;
  3114. arch_ops->txrx_set_vdev_param = dp_txrx_set_vdev_param_be;
  3115. dp_initialize_arch_ops_be_mlo(arch_ops);
  3116. arch_ops->dp_soc_get_num_soc = dp_soc_get_num_soc_be;
  3117. arch_ops->dp_peer_rx_reorder_queue_setup =
  3118. dp_peer_rx_reorder_queue_setup_be;
  3119. arch_ops->dp_rx_peer_set_link_id = dp_rx_set_link_id_be;
  3120. arch_ops->txrx_print_peer_stats = dp_print_peer_txrx_stats_be;
  3121. #if defined(DP_UMAC_HW_HARD_RESET) && defined(DP_UMAC_HW_RESET_SUPPORT)
  3122. arch_ops->dp_bank_reconfig = dp_bank_reconfig_be;
  3123. arch_ops->dp_reconfig_tx_vdev_mcast_ctrl =
  3124. dp_reconfig_tx_vdev_mcast_ctrl_be;
  3125. arch_ops->dp_cc_reg_cfg_init = dp_cc_reg_cfg_init;
  3126. #endif
  3127. #ifdef WLAN_SUPPORT_PPEDS
  3128. arch_ops->ppeds_handle_attached = dp_ppeds_handle_attached;
  3129. arch_ops->dp_txrx_ppeds_rings_status = dp_ppeds_rings_status;
  3130. arch_ops->txrx_soc_ppeds_start = dp_ppeds_start_soc_be;
  3131. arch_ops->txrx_soc_ppeds_stop = dp_ppeds_stop_soc_be;
  3132. arch_ops->dp_register_ppeds_interrupts = dp_register_ppeds_interrupts;
  3133. arch_ops->dp_free_ppeds_interrupts = dp_free_ppeds_interrupts;
  3134. arch_ops->dp_tx_ppeds_inuse_desc = dp_ppeds_inuse_desc;
  3135. arch_ops->dp_ppeds_clear_stats = dp_ppeds_clear_stats;
  3136. arch_ops->dp_txrx_ppeds_rings_stats = dp_ppeds_rings_stats;
  3137. arch_ops->dp_txrx_ppeds_clear_rings_stats = dp_ppeds_clear_rings_stats;
  3138. arch_ops->dp_tx_ppeds_cfg_astidx_cache_mapping =
  3139. dp_tx_ppeds_cfg_astidx_cache_mapping;
  3140. #ifdef DP_UMAC_HW_RESET_SUPPORT
  3141. arch_ops->txrx_soc_ppeds_interrupt_stop = dp_ppeds_interrupt_stop_be;
  3142. arch_ops->txrx_soc_ppeds_interrupt_start = dp_ppeds_interrupt_start_be;
  3143. arch_ops->txrx_soc_ppeds_service_status_update =
  3144. dp_ppeds_service_status_update_be;
  3145. arch_ops->txrx_soc_ppeds_enabled_check = dp_ppeds_is_enabled_on_soc;
  3146. arch_ops->txrx_soc_ppeds_txdesc_pool_reset =
  3147. dp_ppeds_tx_desc_pool_reset;
  3148. #endif
  3149. #endif
  3150. dp_init_near_full_arch_ops_be(arch_ops);
  3151. arch_ops->get_reo_qdesc_addr = dp_rx_get_reo_qdesc_addr_be;
  3152. arch_ops->get_rx_hash_key = dp_get_rx_hash_key_be;
  3153. arch_ops->dp_set_rx_fst = dp_set_rx_fst_be;
  3154. arch_ops->dp_get_rx_fst = dp_get_rx_fst_be;
  3155. arch_ops->dp_rx_fst_deref = dp_rx_fst_release_ref_be;
  3156. arch_ops->dp_rx_fst_ref = dp_rx_fst_get_ref_be;
  3157. arch_ops->print_mlo_ast_stats = dp_print_mlo_ast_stats_be;
  3158. arch_ops->peer_get_reo_hash = dp_peer_get_reo_hash_be;
  3159. arch_ops->reo_remap_config = dp_reo_remap_config_be;
  3160. arch_ops->txrx_get_vdev_mcast_param = dp_txrx_get_vdev_mcast_param_be;
  3161. arch_ops->txrx_srng_init = dp_srng_init_be;
  3162. arch_ops->dp_get_vdev_stats_for_unmap_peer =
  3163. dp_get_vdev_stats_for_unmap_peer_be;
  3164. #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
  3165. arch_ops->dp_update_ring_hptp = dp_update_ring_hptp;
  3166. #endif
  3167. arch_ops->dp_flush_tx_ring = dp_flush_tcl_ring;
  3168. arch_ops->dp_soc_interrupt_attach = dp_soc_interrupt_attach_be;
  3169. arch_ops->dp_soc_attach_poll = dp_soc_attach_poll_be;
  3170. arch_ops->dp_soc_interrupt_detach = dp_soc_interrupt_detach_be;
  3171. arch_ops->dp_service_srngs = dp_service_srngs_be;
  3172. dp_initialize_arch_ops_be_ipa(arch_ops);
  3173. dp_initialize_arch_ops_be_single_dev(arch_ops);
  3174. dp_initialize_arch_ops_be_fisa(arch_ops);
  3175. }
  3176. #ifdef QCA_SUPPORT_PRIMARY_LINK_MIGRATE
  3177. static void
  3178. dp_primary_link_migration(struct dp_soc *soc, void *cb_ctxt,
  3179. union hal_reo_status *reo_status)
  3180. {
  3181. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  3182. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  3183. struct dp_soc *pr_soc = NULL;
  3184. struct dp_peer_info *pr_peer_info = (struct dp_peer_info *)cb_ctxt;
  3185. struct dp_peer *new_primary_peer = NULL;
  3186. struct dp_peer *mld_peer = NULL;
  3187. uint8_t primary_vdev_id;
  3188. struct cdp_txrx_peer_params_update params = {0};
  3189. uint8_t tid;
  3190. uint8_t is_wds = 0;
  3191. uint16_t hw_peer_id;
  3192. uint16_t ast_hash;
  3193. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, pr_peer_info->chip_id);
  3194. if (!pr_soc) {
  3195. dp_htt_err("Invalid soc");
  3196. qdf_mem_free(pr_peer_info);
  3197. return;
  3198. }
  3199. new_primary_peer = pr_soc->peer_id_to_obj_map[
  3200. pr_peer_info->primary_peer_id];
  3201. if (!new_primary_peer) {
  3202. dp_htt_err("New primary peer is NULL");
  3203. qdf_mem_free(pr_peer_info);
  3204. return;
  3205. }
  3206. mld_peer = DP_GET_MLD_PEER_FROM_PEER(new_primary_peer);
  3207. if (!mld_peer) {
  3208. dp_htt_err("MLD peer is NULL");
  3209. qdf_mem_free(pr_peer_info);
  3210. return;
  3211. }
  3212. new_primary_peer->primary_link = 1;
  3213. hw_peer_id = pr_peer_info->hw_peer_id;
  3214. ast_hash = pr_peer_info->ast_hash;
  3215. /* Add ast enteries for new primary peer */
  3216. if (pr_soc->ast_offload_support && pr_soc->host_ast_db_enable) {
  3217. dp_peer_host_add_map_ast(pr_soc, mld_peer->peer_id, mld_peer->mac_addr.raw,
  3218. hw_peer_id, new_primary_peer->vdev->vdev_id,
  3219. ast_hash, is_wds);
  3220. }
  3221. /*
  3222. * Check if reo_qref_table_en is set and if
  3223. * rx_tid qdesc for tid 0 is already setup and perform
  3224. * qref write to LUT for Tid 0 and 16.
  3225. *
  3226. */
  3227. if (hal_reo_shared_qaddr_is_enable(pr_soc->hal_soc) &&
  3228. mld_peer->rx_tid[0].hw_qdesc_vaddr_unaligned) {
  3229. for (tid = 0; tid < DP_MAX_TIDS; tid++)
  3230. hal_reo_shared_qaddr_write(pr_soc->hal_soc,
  3231. mld_peer->peer_id,
  3232. tid,
  3233. mld_peer->rx_tid[tid].hw_qdesc_paddr);
  3234. }
  3235. if (pr_soc && pr_soc->cdp_soc.ol_ops->update_primary_link)
  3236. pr_soc->cdp_soc.ol_ops->update_primary_link(pr_soc->ctrl_psoc,
  3237. new_primary_peer->mac_addr.raw);
  3238. primary_vdev_id = new_primary_peer->vdev->vdev_id;
  3239. dp_vdev_unref_delete(soc, mld_peer->vdev, DP_MOD_ID_CHILD);
  3240. mld_peer->vdev = dp_vdev_get_ref_by_id(pr_soc, primary_vdev_id,
  3241. DP_MOD_ID_CHILD);
  3242. mld_peer->txrx_peer->vdev = mld_peer->vdev;
  3243. params.vdev_id = new_primary_peer->vdev->vdev_id;
  3244. params.peer_mac = mld_peer->mac_addr.raw;
  3245. params.chip_id = pr_peer_info->chip_id;
  3246. params.pdev_id = new_primary_peer->vdev->pdev->pdev_id;
  3247. if (new_primary_peer->vdev->opmode == wlan_op_mode_sta) {
  3248. dp_wdi_event_handler(
  3249. WDI_EVENT_STA_PRIMARY_UMAC_UPDATE,
  3250. pr_soc, (void *)&params,
  3251. new_primary_peer->peer_id,
  3252. WDI_NO_VAL, params.pdev_id);
  3253. } else {
  3254. dp_wdi_event_handler(
  3255. WDI_EVENT_PEER_PRIMARY_UMAC_UPDATE,
  3256. pr_soc, (void *)&params,
  3257. new_primary_peer->peer_id,
  3258. WDI_NO_VAL, params.pdev_id);
  3259. }
  3260. qdf_mem_free(pr_peer_info);
  3261. }
  3262. #ifdef WLAN_SUPPORT_PPEDS
  3263. static QDF_STATUS dp_get_ppe_info_for_vap(struct dp_soc *pr_soc,
  3264. struct dp_peer *pr_peer,
  3265. uint16_t *src_info)
  3266. {
  3267. struct dp_soc_be *be_soc_mld = NULL;
  3268. struct cdp_ds_vp_params vp_params = {0};
  3269. struct dp_ppe_vp_profile *ppe_vp_profile;
  3270. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  3271. struct cdp_soc_t *cdp_soc = &pr_soc->cdp_soc;
  3272. /*
  3273. * Extract the VP profile from the VAP
  3274. */
  3275. if (!cdp_soc->ol_ops->get_ppeds_profile_info_for_vap) {
  3276. dp_err("%pK: Register get ppeds profile info first", cdp_soc);
  3277. return QDF_STATUS_E_NULL_VALUE;
  3278. }
  3279. /*
  3280. * Check if PPE DS routing is enabled on the associated vap.
  3281. */
  3282. qdf_status = cdp_soc->ol_ops->get_ppeds_profile_info_for_vap(
  3283. pr_soc->ctrl_psoc,
  3284. pr_peer->vdev->vdev_id,
  3285. &vp_params);
  3286. if (QDF_IS_STATUS_ERROR(qdf_status)) {
  3287. dp_err("Could not find ppeds profile info");
  3288. return QDF_STATUS_E_NULL_VALUE;
  3289. }
  3290. /* Check if PPE DS routing is enabled on
  3291. * the associated vap.
  3292. */
  3293. if (vp_params.ppe_vp_type != PPE_VP_USER_TYPE_DS)
  3294. return qdf_status;
  3295. be_soc_mld = dp_get_be_soc_from_dp_soc(pr_soc);
  3296. ppe_vp_profile = &be_soc_mld->ppe_vp_profile[
  3297. vp_params.ppe_vp_profile_idx];
  3298. *src_info = ppe_vp_profile->vp_num;
  3299. return qdf_status;
  3300. }
  3301. #else
  3302. static QDF_STATUS dp_get_ppe_info_for_vap(struct dp_soc *pr_soc,
  3303. struct dp_peer *pr_peer,
  3304. uint16_t *src_info)
  3305. {
  3306. return QDF_STATUS_E_NOSUPPORT;
  3307. }
  3308. #endif
  3309. QDF_STATUS dp_htt_reo_migration(struct dp_soc *soc, uint16_t peer_id,
  3310. uint16_t ml_peer_id, uint16_t vdev_id,
  3311. uint8_t pdev_id, uint8_t chip_id)
  3312. {
  3313. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  3314. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  3315. uint16_t mld_peer_id = dp_gen_ml_peer_id(soc, ml_peer_id);
  3316. struct dp_soc *pr_soc = NULL;
  3317. struct dp_soc *current_pr_soc = NULL;
  3318. struct hal_reo_cmd_params params;
  3319. struct dp_rx_tid *rx_tid;
  3320. struct dp_peer *pr_peer = NULL;
  3321. struct dp_peer *mld_peer = NULL;
  3322. struct dp_soc *mld_soc = NULL;
  3323. struct dp_peer *current_pr_peer = NULL;
  3324. struct dp_peer_info *peer_info;
  3325. struct dp_vdev_be *be_vdev;
  3326. uint16_t src_info = 0;
  3327. QDF_STATUS status;
  3328. struct dp_ast_entry *ast_entry;
  3329. uint16_t hw_peer_id;
  3330. uint16_t ast_hash;
  3331. int i = 0;
  3332. if (!dp_mlo) {
  3333. dp_htt_err("Invalid dp_mlo ctxt");
  3334. return QDF_STATUS_E_FAILURE;
  3335. }
  3336. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, chip_id);
  3337. if (!pr_soc) {
  3338. dp_htt_err("Invalid soc");
  3339. return QDF_STATUS_E_FAILURE;
  3340. }
  3341. pr_peer = pr_soc->peer_id_to_obj_map[peer_id];
  3342. if (!pr_peer || !(IS_MLO_DP_LINK_PEER(pr_peer))) {
  3343. dp_htt_err("Invalid peer");
  3344. return QDF_STATUS_E_FAILURE;
  3345. }
  3346. mld_peer = DP_GET_MLD_PEER_FROM_PEER(pr_peer);
  3347. if (!mld_peer || (mld_peer->peer_id != mld_peer_id)) {
  3348. dp_htt_err("Invalid mld peer");
  3349. return QDF_STATUS_E_FAILURE;
  3350. }
  3351. be_vdev = dp_get_be_vdev_from_dp_vdev(pr_peer->vdev);
  3352. if (!be_vdev) {
  3353. dp_htt_err("Invalid be vdev");
  3354. return QDF_STATUS_E_FAILURE;
  3355. }
  3356. mld_soc = mld_peer->vdev->pdev->soc;
  3357. status = dp_get_ppe_info_for_vap(pr_soc, pr_peer, &src_info);
  3358. if (status == QDF_STATUS_E_NULL_VALUE) {
  3359. dp_htt_err("Invalid ppe info for the vdev");
  3360. return QDF_STATUS_E_FAILURE;
  3361. }
  3362. current_pr_peer = dp_get_primary_link_peer_by_id(
  3363. pr_soc,
  3364. mld_peer->peer_id,
  3365. DP_MOD_ID_HTT);
  3366. /* Making existing primary peer as non primary */
  3367. if (current_pr_peer) {
  3368. current_pr_peer->primary_link = 0;
  3369. dp_peer_unref_delete(current_pr_peer, DP_MOD_ID_HTT);
  3370. }
  3371. current_pr_soc = mld_peer->vdev->pdev->soc;
  3372. dp_peer_rx_reo_shared_qaddr_delete(current_pr_soc, mld_peer);
  3373. /* delete ast entry for current primary peer */
  3374. qdf_spin_lock_bh(&current_pr_soc->ast_lock);
  3375. ast_entry = dp_peer_ast_hash_find_soc_by_type(
  3376. current_pr_soc,
  3377. mld_peer->mac_addr.raw,
  3378. CDP_TXRX_AST_TYPE_MLD);
  3379. if (!ast_entry) {
  3380. dp_htt_err("Invalid ast entry");
  3381. qdf_spin_unlock_bh(&current_pr_soc->ast_lock);
  3382. return QDF_STATUS_E_FAILURE;
  3383. }
  3384. hw_peer_id = ast_entry->ast_idx;
  3385. ast_hash = ast_entry->ast_hash_value;
  3386. dp_peer_unlink_ast_entry(current_pr_soc, ast_entry, mld_peer);
  3387. if (ast_entry->is_mapped)
  3388. current_pr_soc->ast_table[ast_entry->ast_idx] = NULL;
  3389. dp_peer_free_ast_entry(current_pr_soc, ast_entry);
  3390. mld_peer->self_ast_entry = NULL;
  3391. qdf_spin_unlock_bh(&current_pr_soc->ast_lock);
  3392. peer_info = qdf_mem_malloc(sizeof(struct dp_peer_info));
  3393. if (!peer_info) {
  3394. dp_htt_err("Malloc failed");
  3395. return QDF_STATUS_E_FAILURE;
  3396. }
  3397. peer_info->primary_peer_id = peer_id;
  3398. peer_info->chip_id = chip_id;
  3399. peer_info->hw_peer_id = hw_peer_id;
  3400. peer_info->ast_hash = ast_hash;
  3401. for (i = 0; i < DP_MAX_TIDS; i++) {
  3402. rx_tid = &mld_peer->rx_tid[i];
  3403. if (!rx_tid)
  3404. continue;
  3405. qdf_mem_zero(&params, sizeof(params));
  3406. params.std.need_status = 1;
  3407. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  3408. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  3409. status = dp_reo_send_cmd(current_pr_soc, CMD_FLUSH_QUEUE, &params,
  3410. NULL,NULL);
  3411. }
  3412. qdf_mem_zero(&params, sizeof(params));
  3413. rx_tid = &mld_peer->rx_tid[0];
  3414. params.std.need_status = 1;
  3415. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  3416. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  3417. params.u.fl_cache_params.flush_no_inval = 0;
  3418. params.u.fl_cache_params.flush_entire_cache = 1;
  3419. status = dp_reo_send_cmd(current_pr_soc, CMD_FLUSH_CACHE, &params,
  3420. dp_primary_link_migration,
  3421. (void *)peer_info);
  3422. if (status != QDF_STATUS_SUCCESS) {
  3423. dp_htt_err("Reo flush failed");
  3424. qdf_mem_free(peer_info);
  3425. dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
  3426. chip_id, peer_id, ml_peer_id,
  3427. src_info, QDF_STATUS_E_FAILURE);
  3428. }
  3429. qdf_mem_zero(&params, sizeof(params));
  3430. params.std.need_status = 0;
  3431. params.std.addr_lo = rx_tid->hw_qdesc_paddr & 0xffffffff;
  3432. params.std.addr_hi = (uint64_t)(rx_tid->hw_qdesc_paddr) >> 32;
  3433. params.u.unblk_cache_params.type = UNBLOCK_CACHE;
  3434. dp_reo_send_cmd(current_pr_soc, CMD_UNBLOCK_CACHE, &params, NULL, NULL);
  3435. dp_h2t_ptqm_migration_msg_send(pr_soc, vdev_id, pdev_id,
  3436. chip_id, peer_id, ml_peer_id,
  3437. src_info, QDF_STATUS_SUCCESS);
  3438. return QDF_STATUS_SUCCESS;
  3439. }
  3440. #endif