21ca2acab9
This change adds hwfence input and output fence profiling registers and debugfs to enable them. To enable input hw fences timestamps: echo 0x1 > /d/dri/0/debug/hw_fence_status To enable output hw fences timestamps: echo 0x2 > /d/dri/0/debug/hw_fence_status To enable both, input and output hw fences timestamps: echo 0x3 > /d/dri/0/debug/hw_fence_status. Change-Id: I269a38f3843a01ec8c0816890e50bb7d847a4ed9 Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
304 lines
8.7 KiB
C
304 lines
8.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef _SDE_HW_TOP_H
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#define _SDE_HW_TOP_H
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#include "sde_hw_catalog.h"
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#include "sde_hw_mdss.h"
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#include "sde_hw_util.h"
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#define HW_FENCE_IPCC_CLIENT_DPU 25
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#define HW_FENCE_IPCC_PROTOCOLp_CLIENTc(ba, p, c) (ba + (0x40000*p) + (0x1000*c))
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struct sde_hw_mdp;
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struct sde_hw_sid;
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/**
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* struct traffic_shaper_cfg: traffic shaper configuration
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* @en : enable/disable traffic shaper
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* @rd_client : true if read client; false if write client
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* @client_id : client identifier
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* @bpc_denom : denominator of byte per clk
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* @bpc_numer : numerator of byte per clk
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*/
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struct traffic_shaper_cfg {
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bool en;
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bool rd_client;
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u32 client_id;
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u32 bpc_denom;
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u64 bpc_numer;
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};
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/**
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* struct split_pipe_cfg - pipe configuration for dual display panels
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* @en : Enable/disable dual pipe confguration
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* @mode : Panel interface mode
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* @intf : Interface id for main control path
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* @pp_split_slave: Slave interface for ping pong split, INTF_MAX to disable
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* @pp_split_idx: Ping pong index for ping pong split
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* @split_flush_en: Allows both the paths to be flushed when master path is
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* flushed
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* @split_link_en: Check if split link is enabled
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*/
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struct split_pipe_cfg {
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bool en;
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enum sde_intf_mode mode;
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enum sde_intf intf;
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enum sde_intf pp_split_slave;
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u32 pp_split_index;
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bool split_flush_en;
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bool split_link_en;
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};
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/**
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* struct cdm_output_cfg: output configuration for cdm
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* @wb_en : enable/disable writeback output
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* @intf_en : enable/disable interface output
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*/
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struct cdm_output_cfg {
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bool wb_en;
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bool intf_en;
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};
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/**
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* struct sde_danger_safe_status: danger and safe status signals
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* @mdp: top level status
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* @sspp: source pipe status
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* @wb: writebck output status
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*/
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struct sde_danger_safe_status {
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u8 mdp;
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u8 sspp[SSPP_MAX];
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u8 wb[WB_MAX];
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};
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/**
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* struct sde_vsync_source_cfg - configure vsync source and configure the
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* watchdog timers if required.
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* @pp_count: number of ping pongs active
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* @frame_rate: Display frame rate
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* @ppnumber: ping pong index array
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* @vsync_source: vsync source selection
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*/
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struct sde_vsync_source_cfg {
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u32 pp_count;
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u32 frame_rate;
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u32 ppnumber[PINGPONG_MAX];
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u32 vsync_source;
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};
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/**
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* struct sde_hw_mdp_ops - interface to the MDP TOP Hw driver functions
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* Assumption is these functions will be called after clocks are enabled.
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* @setup_split_pipe : Programs the pipe control registers
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* @setup_pp_split : Programs the pp split control registers
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* @setup_cdm_output : programs cdm control
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* @setup_traffic_shaper : programs traffic shaper control
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*/
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struct sde_hw_mdp_ops {
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/** setup_split_pipe() : Regsiters are not double buffered, thisk
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* function should be called before timing control enable
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* @mdp : mdp top context driver
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* @cfg : upper and lower part of pipe configuration
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*/
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void (*setup_split_pipe)(struct sde_hw_mdp *mdp,
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struct split_pipe_cfg *p);
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/** setup_pp_split() : Configure pp split related registers
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* @mdp : mdp top context driver
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* @cfg : upper and lower part of pipe configuration
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*/
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void (*setup_pp_split)(struct sde_hw_mdp *mdp,
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struct split_pipe_cfg *cfg);
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/**
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* setup_cdm_output() : Setup selection control of the cdm data path
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* @mdp : mdp top context driver
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* @cfg : cdm output configuration
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*/
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void (*setup_cdm_output)(struct sde_hw_mdp *mdp,
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struct cdm_output_cfg *cfg);
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/**
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* setup_traffic_shaper() : Setup traffic shaper control
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* @mdp : mdp top context driver
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* @cfg : traffic shaper configuration
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*/
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void (*setup_traffic_shaper)(struct sde_hw_mdp *mdp,
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struct traffic_shaper_cfg *cfg);
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/**
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* setup_clk_force_ctrl - set clock force control
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* @mdp: mdp top context driver
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* @clk_ctrl: clock to be controlled
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* @enable: force on enable
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* @return: if the clock is forced-on by this function
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*/
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bool (*setup_clk_force_ctrl)(struct sde_hw_mdp *mdp,
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enum sde_clk_ctrl_type clk_ctrl, bool enable);
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/**
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* get_clk_ctrl_status - get clock control status
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* @mdp: mdp top context driver
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* @clk_ctrl: clock to be controlled
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* @status: returns true if clock is on
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* @return: 0 if success, otherwise return code
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*/
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int (*get_clk_ctrl_status)(struct sde_hw_mdp *mdp,
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enum sde_clk_ctrl_type clk_ctrl, bool *status);
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/**
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* setup_vsync_source - setup vsync source configuration details
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* @mdp: mdp top context driver
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* @cfg: vsync source selection configuration
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*/
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void (*setup_vsync_source)(struct sde_hw_mdp *mdp,
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struct sde_vsync_source_cfg *cfg);
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/**
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* reset_ubwc - reset top level UBWC configuration
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* @mdp: mdp top context driver
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* @m: pointer to mdss catalog data
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*/
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void (*reset_ubwc)(struct sde_hw_mdp *mdp, struct sde_mdss_cfg *m);
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/**
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* intf_audio_select - select the external interface for audio
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* @mdp: mdp top context driver
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*/
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void (*intf_audio_select)(struct sde_hw_mdp *mdp);
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/**
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* set_mdp_hw_events - enable qdss hardware events for mdp
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* @mdp: mdp top context driver
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* @enable: enable/disable hw events
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*/
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void (*set_mdp_hw_events)(struct sde_hw_mdp *mdp, bool enable);
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/**
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* set_cwb_ppb_cntl - select the data point for CWB
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* @mdp: mdp top context driver
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* @dual: indicates if dual pipe line needs to be programmed
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* @dspp_out : true if dspp output required. LM is default tap point
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*/
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void (*set_cwb_ppb_cntl)(struct sde_hw_mdp *mdp,
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bool dual, bool dspp_out);
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/**
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* set_hdr_plus_metadata - program the dynamic hdr metadata
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* @mdp: mdp top context driver
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* @payload: pointer to payload data
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* @len: size of the valid data within payload
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* @stream_id: stream ID for MST (0 or 1)
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*/
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void (*set_hdr_plus_metadata)(struct sde_hw_mdp *mdp,
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u8 *payload, u32 len, u32 stream_id);
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/**
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* get_autorefresh_status - get autorefresh status
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* @mdp: mdp top context driver
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* @intf_idx: intf block index for relative information
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*/
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u32 (*get_autorefresh_status)(struct sde_hw_mdp *mdp,
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u32 intf_idx);
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/**
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* setup_hw_fences - configure hw fences top registers
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* @mdp: mdp top context driver
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* @protocol_id: ipcc protocol id
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* @ipcc_base_addr: base address for ipcc reg block
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*/
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void (*setup_hw_fences)(struct sde_hw_mdp *mdp, u32 protocol_id,
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unsigned long ipcc_base_addr);
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/**
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* hw_fence_input_status - get hw_fence input fence timestamps and clear them
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* @mdp: mdp top context driver
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* @s_val: pointer to start timestamp value to populate
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* @e_val: pointer to end timestamp value to populate
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*/
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void (*hw_fence_input_status)(struct sde_hw_mdp *mdp, u64 *s_val, u64 *e_val);
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/**
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* hw_fence_input_timestamp_ctrl - enable or clear input fence timestamps
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* @mdp: mdp top context driver
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* @enable: indicates if timestamps should be enabled
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* @enable: indicates if timestamps should be cleared
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*/
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void (*hw_fence_input_timestamp_ctrl)(struct sde_hw_mdp *mdp, bool enable, bool clear);
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};
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struct sde_hw_mdp {
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struct sde_hw_blk_reg_map hw;
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/* top */
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enum sde_mdp idx;
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const struct sde_mdp_cfg *caps;
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/* ops */
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struct sde_hw_mdp_ops ops;
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};
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/**
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* struct sde_hw_sid_ops - callback functions for SID HW programming
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*/
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struct sde_hw_sid_ops {
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/**
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* set_vm_sid - programs SID HW during VM transition
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* @sid: sde_hw_sid passed from kms
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* @vm: vm id to set for SIDs
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* @m: Pointer to mdss catalog data
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*/
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void (*set_vm_sid)(struct sde_hw_sid *sid, u32 vm,
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struct sde_mdss_cfg *m);
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};
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struct sde_hw_sid {
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/* rotator base */
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struct sde_hw_blk_reg_map hw;
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/* ops */
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struct sde_hw_sid_ops ops;
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};
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/**
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* sde_hw_sid_init - initialize the sid blk reg map
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* @addr: Mapped register io address
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* @sid_len: Length of block
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* @m: Pointer to mdss catalog data
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*/
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struct sde_hw_sid *sde_hw_sid_init(void __iomem *addr,
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u32 sid_len, const struct sde_mdss_cfg *m);
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/**
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* sde_hw_set_rotator_sid - set sid values for rotator
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* sid: sde_hw_sid passed from kms
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*/
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void sde_hw_set_rotator_sid(struct sde_hw_sid *sid);
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/**
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* sde_hw_set_sspp_sid - set sid values for the pipes
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* sid: sde_hw_sid passed from kms
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* pipe: sspp id
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* vm: vm id to set for SIDs
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* @m: Pointer to mdss catalog data
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*/
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void sde_hw_set_sspp_sid(struct sde_hw_sid *sid, u32 pipe, u32 vm, struct sde_mdss_cfg *m);
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/**
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* sde_hw_mdptop_init - initializes the top driver for the passed idx
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* @idx: Interface index for which driver object is required
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* @addr: Mapped register io address of MDP
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* @m: Pointer to mdss catalog data
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*/
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struct sde_hw_mdp *sde_hw_mdptop_init(enum sde_mdp idx,
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void __iomem *addr,
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const struct sde_mdss_cfg *m);
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void sde_hw_mdp_destroy(struct sde_hw_mdp *mdp);
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#endif /*_SDE_HW_TOP_H */
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