msm_drv.c 51 KB

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  1. /*
  2. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  3. * Copyright (C) 2013 Red Hat
  4. * Author: Rob Clark <[email protected]>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published by
  8. * the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. /*
  19. * Copyright (c) 2016 Intel Corporation
  20. *
  21. * Permission to use, copy, modify, distribute, and sell this software and its
  22. * documentation for any purpose is hereby granted without fee, provided that
  23. * the above copyright notice appear in all copies and that both that copyright
  24. * notice and this permission notice appear in supporting documentation, and
  25. * that the name of the copyright holders not be used in advertising or
  26. * publicity pertaining to distribution of the software without specific,
  27. * written prior permission. The copyright holders make no representations
  28. * about the suitability of this software for any purpose. It is provided "as
  29. * is" without express or implied warranty.
  30. *
  31. * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  32. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  33. * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  34. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  35. * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  36. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  37. * OF THIS SOFTWARE.
  38. */
  39. #include <linux/of_address.h>
  40. #include <linux/kthread.h>
  41. #include <uapi/linux/sched/types.h>
  42. #include <drm/drm_of.h>
  43. #include <drm/drm_probe_helper.h>
  44. #include "msm_drv.h"
  45. #include "msm_gem.h"
  46. #include "msm_kms.h"
  47. #include "msm_mmu.h"
  48. #include "sde_wb.h"
  49. #include "sde_dbg.h"
  50. /*
  51. * MSM driver version:
  52. * - 1.0.0 - initial interface
  53. * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers
  54. * - 1.2.0 - adds explicit fence support for submit ioctl
  55. * - 1.3.0 - adds GMEM_BASE + NR_RINGS params, SUBMITQUEUE_NEW +
  56. * SUBMITQUEUE_CLOSE ioctls, and MSM_INFO_IOVA flag for
  57. * MSM_GEM_INFO ioctl.
  58. * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get
  59. * GEM object's debug name
  60. */
  61. #define MSM_VERSION_MAJOR 1
  62. #define MSM_VERSION_MINOR 4
  63. #define MSM_VERSION_PATCHLEVEL 0
  64. static void msm_fb_output_poll_changed(struct drm_device *dev)
  65. {
  66. struct msm_drm_private *priv = NULL;
  67. if (!dev) {
  68. DRM_ERROR("output_poll_changed failed, invalid input\n");
  69. return;
  70. }
  71. priv = dev->dev_private;
  72. if (priv->fbdev)
  73. drm_fb_helper_hotplug_event(priv->fbdev);
  74. }
  75. /**
  76. * msm_atomic_helper_check - validate state object
  77. * @dev: DRM device
  78. * @state: the driver state object
  79. *
  80. * This is a wrapper for the drm_atomic_helper_check to check the modeset
  81. * and state checking for planes. Additionally it checks if any secure
  82. * transition(moving CRTC and planes between secure and non-secure states and
  83. * vice versa) is allowed or not. When going to secure state, planes
  84. * with fb_mode as dir translated only can be staged on the CRTC, and only one
  85. * CRTC should be active.
  86. * Also mixing of secure and non-secure is not allowed.
  87. *
  88. * RETURNS
  89. * Zero for success or -errorno.
  90. */
  91. int msm_atomic_check(struct drm_device *dev,
  92. struct drm_atomic_state *state)
  93. {
  94. struct msm_drm_private *priv;
  95. priv = dev->dev_private;
  96. if (priv && priv->kms && priv->kms->funcs &&
  97. priv->kms->funcs->atomic_check)
  98. return priv->kms->funcs->atomic_check(priv->kms, state);
  99. return drm_atomic_helper_check(dev, state);
  100. }
  101. static const struct drm_mode_config_funcs mode_config_funcs = {
  102. .fb_create = msm_framebuffer_create,
  103. .output_poll_changed = msm_fb_output_poll_changed,
  104. .atomic_check = msm_atomic_check,
  105. .atomic_commit = msm_atomic_commit,
  106. .atomic_state_alloc = msm_atomic_state_alloc,
  107. .atomic_state_clear = msm_atomic_state_clear,
  108. .atomic_state_free = msm_atomic_state_free,
  109. };
  110. static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = {
  111. .atomic_commit_tail = msm_atomic_commit_tail,
  112. };
  113. #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
  114. static bool reglog = false;
  115. MODULE_PARM_DESC(reglog, "Enable register read/write logging");
  116. module_param(reglog, bool, 0600);
  117. #else
  118. #define reglog 0
  119. #endif
  120. #ifdef CONFIG_DRM_FBDEV_EMULATION
  121. static bool fbdev = true;
  122. MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
  123. module_param(fbdev, bool, 0600);
  124. #endif
  125. static char *vram = "16m";
  126. MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
  127. module_param(vram, charp, 0);
  128. bool dumpstate = false;
  129. MODULE_PARM_DESC(dumpstate, "Dump KMS state on errors");
  130. module_param(dumpstate, bool, 0600);
  131. static bool modeset = true;
  132. MODULE_PARM_DESC(modeset, "Use kernel modesetting [KMS] (1=on (default), 0=disable)");
  133. module_param(modeset, bool, 0600);
  134. /*
  135. * Util/helpers:
  136. */
  137. int msm_clk_bulk_get(struct device *dev, struct clk_bulk_data **bulk)
  138. {
  139. struct property *prop;
  140. const char *name;
  141. struct clk_bulk_data *local;
  142. int i = 0, ret, count;
  143. count = of_property_count_strings(dev->of_node, "clock-names");
  144. if (count < 1)
  145. return 0;
  146. local = devm_kcalloc(dev, sizeof(struct clk_bulk_data *),
  147. count, GFP_KERNEL);
  148. if (!local)
  149. return -ENOMEM;
  150. of_property_for_each_string(dev->of_node, "clock-names", prop, name) {
  151. local[i].id = devm_kstrdup(dev, name, GFP_KERNEL);
  152. if (!local[i].id) {
  153. devm_kfree(dev, local);
  154. return -ENOMEM;
  155. }
  156. i++;
  157. }
  158. ret = devm_clk_bulk_get(dev, count, local);
  159. if (ret) {
  160. for (i = 0; i < count; i++)
  161. devm_kfree(dev, (void *) local[i].id);
  162. devm_kfree(dev, local);
  163. return ret;
  164. }
  165. *bulk = local;
  166. return count;
  167. }
  168. struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count,
  169. const char *name)
  170. {
  171. int i;
  172. char n[32];
  173. snprintf(n, sizeof(n), "%s_clk", name);
  174. for (i = 0; bulk && i < count; i++) {
  175. if (!strcmp(bulk[i].id, name) || !strcmp(bulk[i].id, n))
  176. return bulk[i].clk;
  177. }
  178. return NULL;
  179. }
  180. struct clk *msm_clk_get(struct platform_device *pdev, const char *name)
  181. {
  182. struct clk *clk;
  183. char name2[32];
  184. clk = devm_clk_get(&pdev->dev, name);
  185. if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)
  186. return clk;
  187. snprintf(name2, sizeof(name2), "%s_clk", name);
  188. clk = devm_clk_get(&pdev->dev, name2);
  189. if (!IS_ERR(clk))
  190. dev_warn(&pdev->dev, "Using legacy clk name binding. Use "
  191. "\"%s\" instead of \"%s\"\n", name, name2);
  192. return clk;
  193. }
  194. void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  195. const char *dbgname)
  196. {
  197. struct resource *res;
  198. unsigned long size;
  199. void __iomem *ptr;
  200. if (name)
  201. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  202. else
  203. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  204. if (!res) {
  205. dev_dbg(&pdev->dev, "failed to get memory resource: %s\n",
  206. name);
  207. return ERR_PTR(-EINVAL);
  208. }
  209. size = resource_size(res);
  210. ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
  211. if (!ptr) {
  212. dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
  213. return ERR_PTR(-ENOMEM);
  214. }
  215. if (reglog)
  216. dev_dbg(&pdev->dev, "IO:region %s %pK %08lx\n",
  217. dbgname, ptr, size);
  218. return ptr;
  219. }
  220. unsigned long msm_iomap_size(struct platform_device *pdev, const char *name)
  221. {
  222. struct resource *res;
  223. if (name)
  224. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  225. else
  226. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  227. if (!res) {
  228. dev_dbg(&pdev->dev, "failed to get memory resource: %s\n",
  229. name);
  230. return 0;
  231. }
  232. return resource_size(res);
  233. }
  234. void msm_iounmap(struct platform_device *pdev, void __iomem *addr)
  235. {
  236. devm_iounmap(&pdev->dev, addr);
  237. }
  238. void msm_writel(u32 data, void __iomem *addr)
  239. {
  240. if (reglog)
  241. pr_debug("IO:W %pK %08x\n", addr, data);
  242. writel(data, addr);
  243. }
  244. u32 msm_readl(const void __iomem *addr)
  245. {
  246. u32 val = readl(addr);
  247. if (reglog)
  248. pr_err("IO:R %pK %08x\n", addr, val);
  249. return val;
  250. }
  251. int msm_get_src_bpc(int chroma_format,
  252. int bpc)
  253. {
  254. int src_bpp;
  255. switch (chroma_format) {
  256. case MSM_CHROMA_444:
  257. src_bpp = bpc * 3;
  258. break;
  259. case MSM_CHROMA_422:
  260. src_bpp = bpc * 2;
  261. break;
  262. case MSM_CHROMA_420:
  263. src_bpp = mult_frac(bpc, 3, 2);
  264. break;
  265. default:
  266. src_bpp = bpc * 3;
  267. break;
  268. }
  269. return src_bpp;
  270. }
  271. struct vblank_work {
  272. struct kthread_work work;
  273. int crtc_id;
  274. bool enable;
  275. struct msm_drm_private *priv;
  276. };
  277. static void vblank_ctrl_worker(struct kthread_work *work)
  278. {
  279. struct vblank_work *cur_work = container_of(work,
  280. struct vblank_work, work);
  281. struct msm_drm_private *priv = cur_work->priv;
  282. struct msm_kms *kms = priv->kms;
  283. if (cur_work->enable)
  284. kms->funcs->enable_vblank(kms, priv->crtcs[cur_work->crtc_id]);
  285. else
  286. kms->funcs->disable_vblank(kms, priv->crtcs[cur_work->crtc_id]);
  287. kfree(cur_work);
  288. }
  289. static int vblank_ctrl_queue_work(struct msm_drm_private *priv,
  290. int crtc_id, bool enable)
  291. {
  292. struct vblank_work *cur_work;
  293. struct drm_crtc *crtc;
  294. struct kthread_worker *worker;
  295. if (!priv || crtc_id >= priv->num_crtcs)
  296. return -EINVAL;
  297. cur_work = kzalloc(sizeof(*cur_work), GFP_ATOMIC);
  298. if (!cur_work)
  299. return -ENOMEM;
  300. crtc = priv->crtcs[crtc_id];
  301. kthread_init_work(&cur_work->work, vblank_ctrl_worker);
  302. cur_work->crtc_id = crtc_id;
  303. cur_work->enable = enable;
  304. cur_work->priv = priv;
  305. /* During modeset scenario, vblank request is queued to
  306. * display thread to avoid enabling irq resulting in
  307. * vblank refcount mismatch
  308. */
  309. if (crtc->state && drm_atomic_crtc_needs_modeset(crtc->state))
  310. worker = &priv->disp_thread[crtc_id].worker;
  311. else
  312. worker = &priv->event_thread[crtc_id].worker;
  313. kthread_queue_work(worker, &cur_work->work);
  314. return 0;
  315. }
  316. static int msm_drm_uninit(struct device *dev)
  317. {
  318. struct platform_device *pdev = to_platform_device(dev);
  319. struct drm_device *ddev = platform_get_drvdata(pdev);
  320. struct msm_drm_private *priv = ddev->dev_private;
  321. struct msm_kms *kms = priv->kms;
  322. int i;
  323. /* We must cancel and cleanup any pending vblank enable/disable
  324. * work before drm_irq_uninstall() to avoid work re-enabling an
  325. * irq after uninstall has disabled it.
  326. */
  327. flush_workqueue(priv->wq);
  328. destroy_workqueue(priv->wq);
  329. /* clean up display commit/event worker threads */
  330. for (i = 0; i < priv->num_crtcs; i++) {
  331. if (priv->disp_thread[i].thread) {
  332. kthread_flush_worker(&priv->disp_thread[i].worker);
  333. kthread_stop(priv->disp_thread[i].thread);
  334. priv->disp_thread[i].thread = NULL;
  335. }
  336. if (priv->event_thread[i].thread) {
  337. kthread_flush_worker(&priv->event_thread[i].worker);
  338. kthread_stop(priv->event_thread[i].thread);
  339. priv->event_thread[i].thread = NULL;
  340. }
  341. }
  342. drm_kms_helper_poll_fini(ddev);
  343. drm_mode_config_cleanup(ddev);
  344. if (priv->registered) {
  345. drm_dev_unregister(ddev);
  346. priv->registered = false;
  347. }
  348. #ifdef CONFIG_DRM_FBDEV_EMULATION
  349. if (fbdev && priv->fbdev)
  350. msm_fbdev_free(ddev);
  351. #endif
  352. drm_atomic_helper_shutdown(ddev);
  353. drm_mode_config_cleanup(ddev);
  354. pm_runtime_get_sync(dev);
  355. drm_irq_uninstall(ddev);
  356. pm_runtime_put_sync(dev);
  357. if (kms && kms->funcs)
  358. kms->funcs->destroy(kms);
  359. if (priv->vram.paddr) {
  360. unsigned long attrs = DMA_ATTR_NO_KERNEL_MAPPING;
  361. drm_mm_takedown(&priv->vram.mm);
  362. dma_free_attrs(dev, priv->vram.size, NULL,
  363. priv->vram.paddr, attrs);
  364. }
  365. component_unbind_all(dev, ddev);
  366. sde_dbg_destroy();
  367. debugfs_remove_recursive(priv->debug_root);
  368. sde_power_resource_deinit(pdev, &priv->phandle);
  369. msm_mdss_destroy(ddev);
  370. ddev->dev_private = NULL;
  371. kfree(priv);
  372. drm_dev_put(ddev);
  373. return 0;
  374. }
  375. #define KMS_MDP4 4
  376. #define KMS_MDP5 5
  377. #define KMS_SDE 3
  378. static int get_mdp_ver(struct platform_device *pdev)
  379. {
  380. #ifdef CONFIG_OF
  381. static const struct of_device_id match_types[] = { {
  382. .compatible = "qcom,mdss_mdp",
  383. .data = (void *)KMS_MDP5,
  384. },
  385. {
  386. .compatible = "qcom,sde-kms",
  387. .data = (void *)KMS_SDE,
  388. },
  389. {},
  390. };
  391. struct device *dev = &pdev->dev;
  392. const struct of_device_id *match;
  393. match = of_match_node(match_types, dev->of_node);
  394. if (match)
  395. return (int)(unsigned long)match->data;
  396. #endif
  397. return KMS_MDP4;
  398. }
  399. static int msm_init_vram(struct drm_device *dev)
  400. {
  401. struct msm_drm_private *priv = dev->dev_private;
  402. struct device_node *node;
  403. unsigned long size = 0;
  404. int ret = 0;
  405. /* In the device-tree world, we could have a 'memory-region'
  406. * phandle, which gives us a link to our "vram". Allocating
  407. * is all nicely abstracted behind the dma api, but we need
  408. * to know the entire size to allocate it all in one go. There
  409. * are two cases:
  410. * 1) device with no IOMMU, in which case we need exclusive
  411. * access to a VRAM carveout big enough for all gpu
  412. * buffers
  413. * 2) device with IOMMU, but where the bootloader puts up
  414. * a splash screen. In this case, the VRAM carveout
  415. * need only be large enough for fbdev fb. But we need
  416. * exclusive access to the buffer to avoid the kernel
  417. * using those pages for other purposes (which appears
  418. * as corruption on screen before we have a chance to
  419. * load and do initial modeset)
  420. */
  421. node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
  422. if (node) {
  423. struct resource r;
  424. ret = of_address_to_resource(node, 0, &r);
  425. of_node_put(node);
  426. if (ret)
  427. return ret;
  428. size = r.end - r.start;
  429. DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
  430. /* if we have no IOMMU, then we need to use carveout allocator.
  431. * Grab the entire CMA chunk carved out in early startup in
  432. * mach-msm:
  433. */
  434. } else if (!iommu_present(&platform_bus_type)) {
  435. DRM_INFO("using %s VRAM carveout\n", vram);
  436. size = memparse(vram, NULL);
  437. }
  438. if (size) {
  439. unsigned long attrs = 0;
  440. void *p;
  441. priv->vram.size = size;
  442. drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
  443. spin_lock_init(&priv->vram.lock);
  444. attrs |= DMA_ATTR_NO_KERNEL_MAPPING;
  445. attrs |= DMA_ATTR_WRITE_COMBINE;
  446. /* note that for no-kernel-mapping, the vaddr returned
  447. * is bogus, but non-null if allocation succeeded:
  448. */
  449. p = dma_alloc_attrs(dev->dev, size,
  450. &priv->vram.paddr, GFP_KERNEL, attrs);
  451. if (!p) {
  452. dev_err(dev->dev, "failed to allocate VRAM\n");
  453. priv->vram.paddr = 0;
  454. return -ENOMEM;
  455. }
  456. dev_info(dev->dev, "VRAM: %08x->%08x\n",
  457. (uint32_t)priv->vram.paddr,
  458. (uint32_t)(priv->vram.paddr + size));
  459. }
  460. return ret;
  461. }
  462. #ifdef CONFIG_OF
  463. static int msm_component_bind_all(struct device *dev,
  464. struct drm_device *drm_dev)
  465. {
  466. int ret;
  467. ret = component_bind_all(dev, drm_dev);
  468. if (ret)
  469. DRM_ERROR("component_bind_all failed: %d\n", ret);
  470. return ret;
  471. }
  472. #else
  473. static int msm_component_bind_all(struct device *dev,
  474. struct drm_device *drm_dev)
  475. {
  476. return 0;
  477. }
  478. #endif
  479. static int msm_drm_display_thread_create(struct sched_param param,
  480. struct msm_drm_private *priv, struct drm_device *ddev,
  481. struct device *dev)
  482. {
  483. int i, ret = 0;
  484. /**
  485. * this priority was found during empiric testing to have appropriate
  486. * realtime scheduling to process display updates and interact with
  487. * other real time and normal priority task
  488. */
  489. param.sched_priority = 16;
  490. for (i = 0; i < priv->num_crtcs; i++) {
  491. /* initialize display thread */
  492. priv->disp_thread[i].crtc_id = priv->crtcs[i]->base.id;
  493. kthread_init_worker(&priv->disp_thread[i].worker);
  494. priv->disp_thread[i].dev = ddev;
  495. priv->disp_thread[i].thread =
  496. kthread_run(kthread_worker_fn,
  497. &priv->disp_thread[i].worker,
  498. "crtc_commit:%d", priv->disp_thread[i].crtc_id);
  499. ret = sched_setscheduler(priv->disp_thread[i].thread,
  500. SCHED_FIFO, &param);
  501. if (ret)
  502. pr_warn("display thread priority update failed: %d\n",
  503. ret);
  504. if (IS_ERR(priv->disp_thread[i].thread)) {
  505. dev_err(dev, "failed to create crtc_commit kthread\n");
  506. priv->disp_thread[i].thread = NULL;
  507. }
  508. /* initialize event thread */
  509. priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id;
  510. kthread_init_worker(&priv->event_thread[i].worker);
  511. priv->event_thread[i].dev = ddev;
  512. priv->event_thread[i].thread =
  513. kthread_run(kthread_worker_fn,
  514. &priv->event_thread[i].worker,
  515. "crtc_event:%d", priv->event_thread[i].crtc_id);
  516. /**
  517. * event thread should also run at same priority as disp_thread
  518. * because it is handling frame_done events. A lower priority
  519. * event thread and higher priority disp_thread can causes
  520. * frame_pending counters beyond 2. This can lead to commit
  521. * failure at crtc commit level.
  522. */
  523. ret = sched_setscheduler(priv->event_thread[i].thread,
  524. SCHED_FIFO, &param);
  525. if (ret)
  526. pr_warn("display event thread priority update failed: %d\n",
  527. ret);
  528. if (IS_ERR(priv->event_thread[i].thread)) {
  529. dev_err(dev, "failed to create crtc_event kthread\n");
  530. priv->event_thread[i].thread = NULL;
  531. }
  532. if ((!priv->disp_thread[i].thread) ||
  533. !priv->event_thread[i].thread) {
  534. /* clean up previously created threads if any */
  535. for ( ; i >= 0; i--) {
  536. if (priv->disp_thread[i].thread) {
  537. kthread_stop(
  538. priv->disp_thread[i].thread);
  539. priv->disp_thread[i].thread = NULL;
  540. }
  541. if (priv->event_thread[i].thread) {
  542. kthread_stop(
  543. priv->event_thread[i].thread);
  544. priv->event_thread[i].thread = NULL;
  545. }
  546. }
  547. return -EINVAL;
  548. }
  549. }
  550. /**
  551. * Since pp interrupt is heavy weight, try to queue the work
  552. * into a dedicated worker thread, so that they dont interrupt
  553. * other important events.
  554. */
  555. kthread_init_worker(&priv->pp_event_worker);
  556. priv->pp_event_thread = kthread_run(kthread_worker_fn,
  557. &priv->pp_event_worker, "pp_event");
  558. ret = sched_setscheduler(priv->pp_event_thread,
  559. SCHED_FIFO, &param);
  560. if (ret)
  561. pr_warn("pp_event thread priority update failed: %d\n",
  562. ret);
  563. if (IS_ERR(priv->pp_event_thread)) {
  564. dev_err(dev, "failed to create pp_event kthread\n");
  565. ret = PTR_ERR(priv->pp_event_thread);
  566. priv->pp_event_thread = NULL;
  567. return ret;
  568. }
  569. return 0;
  570. }
  571. static struct msm_kms *_msm_drm_component_init_helper(
  572. struct msm_drm_private *priv,
  573. struct drm_device *ddev, struct device *dev,
  574. struct platform_device *pdev)
  575. {
  576. int ret;
  577. struct msm_kms *kms;
  578. switch (get_mdp_ver(pdev)) {
  579. case KMS_MDP4:
  580. kms = mdp4_kms_init(ddev);
  581. break;
  582. case KMS_MDP5:
  583. kms = mdp5_kms_init(ddev);
  584. break;
  585. case KMS_SDE:
  586. kms = sde_kms_init(ddev);
  587. break;
  588. default:
  589. kms = ERR_PTR(-ENODEV);
  590. break;
  591. }
  592. if (IS_ERR_OR_NULL(kms)) {
  593. /*
  594. * NOTE: once we have GPU support, having no kms should not
  595. * be considered fatal.. ideally we would still support gpu
  596. * and (for example) use dmabuf/prime to share buffers with
  597. * imx drm driver on iMX5
  598. */
  599. dev_err(dev, "failed to load kms\n");
  600. return kms;
  601. }
  602. priv->kms = kms;
  603. /**
  604. * Since kms->funcs->hw_init(kms) might call
  605. * drm_object_property_set_value to initialize some custom
  606. * properties we need to make sure mode_config.funcs are populated
  607. * beforehand to avoid dereferencing an unset value during the
  608. * drm_drv_uses_atomic_modeset check.
  609. */
  610. ddev->mode_config.funcs = &mode_config_funcs;
  611. ret = (kms)->funcs->hw_init(kms);
  612. if (ret) {
  613. dev_err(dev, "kms hw init failed: %d\n", ret);
  614. return ERR_PTR(ret);
  615. }
  616. return kms;
  617. }
  618. static int msm_drm_device_init(struct platform_device *pdev,
  619. struct drm_driver *drv)
  620. {
  621. struct device *dev = &pdev->dev;
  622. struct drm_device *ddev;
  623. struct msm_drm_private *priv;
  624. int i, ret;
  625. ddev = drm_dev_alloc(drv, dev);
  626. if (IS_ERR(ddev)) {
  627. dev_err(dev, "failed to allocate drm_device\n");
  628. return PTR_ERR(ddev);
  629. }
  630. drm_mode_config_init(ddev);
  631. platform_set_drvdata(pdev, ddev);
  632. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  633. if (!priv) {
  634. ret = -ENOMEM;
  635. goto priv_alloc_fail;
  636. }
  637. ddev->dev_private = priv;
  638. priv->dev = ddev;
  639. ret = sde_power_resource_init(pdev, &priv->phandle);
  640. if (ret) {
  641. pr_err("sde power resource init failed\n");
  642. goto power_init_fail;
  643. }
  644. ret = sde_dbg_init(&pdev->dev);
  645. if (ret) {
  646. dev_err(dev, "failed to init sde dbg: %d\n", ret);
  647. goto dbg_init_fail;
  648. }
  649. pm_runtime_enable(dev);
  650. ret = pm_runtime_get_sync(dev);
  651. if (ret < 0) {
  652. dev_err(dev, "resource enable failed: %d\n", ret);
  653. goto pm_runtime_error;
  654. }
  655. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++)
  656. sde_power_data_bus_set_quota(&priv->phandle, i,
  657. SDE_POWER_HANDLE_CONT_SPLASH_BUS_AB_QUOTA,
  658. SDE_POWER_HANDLE_CONT_SPLASH_BUS_IB_QUOTA);
  659. return ret;
  660. pm_runtime_error:
  661. sde_dbg_destroy();
  662. dbg_init_fail:
  663. sde_power_resource_deinit(pdev, &priv->phandle);
  664. power_init_fail:
  665. priv_alloc_fail:
  666. drm_dev_put(ddev);
  667. kfree(priv);
  668. return ret;
  669. }
  670. static int msm_drm_component_init(struct device *dev)
  671. {
  672. struct platform_device *pdev = to_platform_device(dev);
  673. struct drm_device *ddev = platform_get_drvdata(pdev);
  674. struct msm_drm_private *priv = ddev->dev_private;
  675. struct msm_kms *kms = NULL;
  676. int ret;
  677. struct sched_param param = { 0 };
  678. struct drm_crtc *crtc;
  679. ret = msm_mdss_init(ddev);
  680. if (ret)
  681. goto mdss_init_fail;
  682. priv->wq = alloc_ordered_workqueue("msm_drm", 0);
  683. init_waitqueue_head(&priv->pending_crtcs_event);
  684. INIT_LIST_HEAD(&priv->client_event_list);
  685. INIT_LIST_HEAD(&priv->inactive_list);
  686. /* Bind all our sub-components: */
  687. ret = msm_component_bind_all(dev, ddev);
  688. if (ret)
  689. goto bind_fail;
  690. ret = msm_init_vram(ddev);
  691. if (ret)
  692. goto fail;
  693. ddev->mode_config.funcs = &mode_config_funcs;
  694. ddev->mode_config.helper_private = &mode_config_helper_funcs;
  695. kms = _msm_drm_component_init_helper(priv, ddev, dev, pdev);
  696. if (IS_ERR_OR_NULL(kms)) {
  697. dev_err(dev, "msm_drm_component_init_helper failed\n");
  698. goto fail;
  699. }
  700. ret = msm_drm_display_thread_create(param, priv, ddev, dev);
  701. if (ret) {
  702. dev_err(dev, "msm_drm_display_thread_create failed\n");
  703. goto fail;
  704. }
  705. ret = drm_vblank_init(ddev, priv->num_crtcs);
  706. if (ret < 0) {
  707. dev_err(dev, "failed to initialize vblank\n");
  708. goto fail;
  709. }
  710. drm_for_each_crtc(crtc, ddev)
  711. drm_crtc_vblank_reset(crtc);
  712. if (kms) {
  713. pm_runtime_get_sync(dev);
  714. ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
  715. pm_runtime_put_sync(dev);
  716. if (ret < 0) {
  717. dev_err(dev, "failed to install IRQ handler\n");
  718. goto fail;
  719. }
  720. }
  721. ret = drm_dev_register(ddev, 0);
  722. if (ret)
  723. goto fail;
  724. priv->registered = true;
  725. drm_mode_config_reset(ddev);
  726. if (kms && kms->funcs && kms->funcs->cont_splash_config) {
  727. ret = kms->funcs->cont_splash_config(kms);
  728. if (ret) {
  729. dev_err(dev, "kms cont_splash config failed.\n");
  730. goto fail;
  731. }
  732. }
  733. #ifdef CONFIG_DRM_FBDEV_EMULATION
  734. if (fbdev)
  735. priv->fbdev = msm_fbdev_init(ddev);
  736. #endif
  737. /* create drm client only when fbdev is not supported */
  738. if (!priv->fbdev) {
  739. ret = drm_client_init(ddev, &kms->client, "kms_client", NULL);
  740. if (ret) {
  741. DRM_ERROR("failed to init kms_client: %d\n", ret);
  742. kms->client.dev = NULL;
  743. goto fail;
  744. }
  745. drm_client_register(&kms->client);
  746. }
  747. ret = sde_dbg_debugfs_register(dev);
  748. if (ret) {
  749. dev_err(dev, "failed to reg sde dbg debugfs: %d\n", ret);
  750. goto fail;
  751. }
  752. /* perform subdriver post initialization */
  753. if (kms && kms->funcs && kms->funcs->postinit) {
  754. ret = kms->funcs->postinit(kms);
  755. if (ret) {
  756. pr_err("kms post init failed: %d\n", ret);
  757. goto fail;
  758. }
  759. }
  760. drm_kms_helper_poll_init(ddev);
  761. return 0;
  762. fail:
  763. msm_drm_uninit(dev);
  764. return ret;
  765. bind_fail:
  766. msm_mdss_destroy(ddev);
  767. mdss_init_fail:
  768. sde_dbg_destroy();
  769. sde_power_resource_deinit(pdev, &priv->phandle);
  770. drm_dev_put(ddev);
  771. kfree(priv);
  772. return ret;
  773. }
  774. /*
  775. * DRM operations:
  776. */
  777. static int context_init(struct drm_device *dev, struct drm_file *file)
  778. {
  779. struct msm_file_private *ctx;
  780. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  781. if (!ctx)
  782. return -ENOMEM;
  783. mutex_init(&ctx->power_lock);
  784. file->driver_priv = ctx;
  785. if (dev && dev->dev_private) {
  786. struct msm_drm_private *priv = dev->dev_private;
  787. struct msm_kms *kms;
  788. kms = priv->kms;
  789. if (kms && kms->funcs && kms->funcs->postopen)
  790. kms->funcs->postopen(kms, file);
  791. }
  792. return 0;
  793. }
  794. static int msm_open(struct drm_device *dev, struct drm_file *file)
  795. {
  796. return context_init(dev, file);
  797. }
  798. static void context_close(struct msm_file_private *ctx)
  799. {
  800. kfree(ctx);
  801. }
  802. static void msm_postclose(struct drm_device *dev, struct drm_file *file)
  803. {
  804. struct msm_drm_private *priv = dev->dev_private;
  805. struct msm_file_private *ctx = file->driver_priv;
  806. struct msm_kms *kms = priv->kms;
  807. if (kms && kms->funcs && kms->funcs->postclose)
  808. kms->funcs->postclose(kms, file);
  809. mutex_lock(&dev->struct_mutex);
  810. if (ctx == priv->lastctx)
  811. priv->lastctx = NULL;
  812. mutex_unlock(&dev->struct_mutex);
  813. mutex_lock(&ctx->power_lock);
  814. if (ctx->enable_refcnt) {
  815. SDE_EVT32(ctx->enable_refcnt);
  816. pm_runtime_put_sync(dev->dev);
  817. }
  818. mutex_unlock(&ctx->power_lock);
  819. context_close(ctx);
  820. }
  821. static void msm_lastclose(struct drm_device *dev)
  822. {
  823. struct msm_drm_private *priv = dev->dev_private;
  824. struct msm_kms *kms = priv->kms;
  825. int i, rc;
  826. /* check for splash status before triggering cleanup
  827. * if we end up here with splash status ON i.e before first
  828. * commit then ignore the last close call
  829. */
  830. if (kms && kms->funcs && kms->funcs->check_for_splash
  831. && kms->funcs->check_for_splash(kms))
  832. return;
  833. /*
  834. * clean up vblank disable immediately as this is the last close.
  835. */
  836. for (i = 0; i < dev->num_crtcs; i++) {
  837. struct drm_vblank_crtc *vblank = &dev->vblank[i];
  838. struct timer_list *disable_timer = &vblank->disable_timer;
  839. if (del_timer_sync(disable_timer))
  840. disable_timer->function(disable_timer);
  841. }
  842. /* wait for pending vblank requests to be executed by worker thread */
  843. flush_workqueue(priv->wq);
  844. if (priv->fbdev) {
  845. rc = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
  846. if (rc)
  847. DRM_ERROR("restore FBDEV mode failed: %d\n", rc);
  848. } else if (kms && kms->client.dev) {
  849. rc = drm_client_modeset_commit_force(&kms->client);
  850. if (rc)
  851. DRM_ERROR("client modeset commit failed: %d\n", rc);
  852. }
  853. if (kms && kms->funcs && kms->funcs->lastclose)
  854. kms->funcs->lastclose(kms);
  855. }
  856. static irqreturn_t msm_irq(int irq, void *arg)
  857. {
  858. struct drm_device *dev = arg;
  859. struct msm_drm_private *priv = dev->dev_private;
  860. struct msm_kms *kms = priv->kms;
  861. BUG_ON(!kms);
  862. return kms->funcs->irq(kms);
  863. }
  864. static void msm_irq_preinstall(struct drm_device *dev)
  865. {
  866. struct msm_drm_private *priv = dev->dev_private;
  867. struct msm_kms *kms = priv->kms;
  868. BUG_ON(!kms);
  869. kms->funcs->irq_preinstall(kms);
  870. }
  871. static int msm_irq_postinstall(struct drm_device *dev)
  872. {
  873. struct msm_drm_private *priv = dev->dev_private;
  874. struct msm_kms *kms = priv->kms;
  875. BUG_ON(!kms);
  876. if (kms->funcs->irq_postinstall)
  877. return kms->funcs->irq_postinstall(kms);
  878. return 0;
  879. }
  880. static void msm_irq_uninstall(struct drm_device *dev)
  881. {
  882. struct msm_drm_private *priv = dev->dev_private;
  883. struct msm_kms *kms = priv->kms;
  884. BUG_ON(!kms);
  885. kms->funcs->irq_uninstall(kms);
  886. }
  887. static int msm_enable_vblank(struct drm_device *dev, unsigned int pipe)
  888. {
  889. struct msm_drm_private *priv = dev->dev_private;
  890. struct msm_kms *kms = priv->kms;
  891. if (!kms)
  892. return -ENXIO;
  893. DBG("dev=%pK, crtc=%u", dev, pipe);
  894. return vblank_ctrl_queue_work(priv, pipe, true);
  895. }
  896. static void msm_disable_vblank(struct drm_device *dev, unsigned int pipe)
  897. {
  898. struct msm_drm_private *priv = dev->dev_private;
  899. struct msm_kms *kms = priv->kms;
  900. if (!kms)
  901. return;
  902. DBG("dev=%pK, crtc=%u", dev, pipe);
  903. vblank_ctrl_queue_work(priv, pipe, false);
  904. }
  905. /*
  906. * DRM ioctls:
  907. */
  908. static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
  909. struct drm_file *file)
  910. {
  911. struct drm_msm_gem_new *args = data;
  912. if (args->flags & ~MSM_BO_FLAGS) {
  913. DRM_ERROR("invalid flags: %08x\n", args->flags);
  914. return -EINVAL;
  915. }
  916. return msm_gem_new_handle(dev, file, args->size,
  917. args->flags, &args->handle, NULL);
  918. }
  919. static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
  920. {
  921. return ktime_set(timeout.tv_sec, timeout.tv_nsec);
  922. }
  923. static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
  924. struct drm_file *file)
  925. {
  926. struct drm_msm_gem_cpu_prep *args = data;
  927. struct drm_gem_object *obj;
  928. ktime_t timeout = to_ktime(args->timeout);
  929. int ret;
  930. if (args->op & ~MSM_PREP_FLAGS) {
  931. DRM_ERROR("invalid op: %08x\n", args->op);
  932. return -EINVAL;
  933. }
  934. obj = drm_gem_object_lookup(file, args->handle);
  935. if (!obj)
  936. return -ENOENT;
  937. ret = msm_gem_cpu_prep(obj, args->op, &timeout);
  938. drm_gem_object_put_unlocked(obj);
  939. return ret;
  940. }
  941. static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
  942. struct drm_file *file)
  943. {
  944. struct drm_msm_gem_cpu_fini *args = data;
  945. struct drm_gem_object *obj;
  946. int ret;
  947. obj = drm_gem_object_lookup(file, args->handle);
  948. if (!obj)
  949. return -ENOENT;
  950. ret = msm_gem_cpu_fini(obj);
  951. drm_gem_object_put_unlocked(obj);
  952. return ret;
  953. }
  954. static int msm_ioctl_gem_madvise(struct drm_device *dev, void *data,
  955. struct drm_file *file)
  956. {
  957. struct drm_msm_gem_madvise *args = data;
  958. struct drm_gem_object *obj;
  959. int ret;
  960. switch (args->madv) {
  961. case MSM_MADV_DONTNEED:
  962. case MSM_MADV_WILLNEED:
  963. break;
  964. default:
  965. return -EINVAL;
  966. }
  967. ret = mutex_lock_interruptible(&dev->struct_mutex);
  968. if (ret)
  969. return ret;
  970. obj = drm_gem_object_lookup(file, args->handle);
  971. if (!obj) {
  972. ret = -ENOENT;
  973. goto unlock;
  974. }
  975. ret = msm_gem_madvise(obj, args->madv);
  976. if (ret >= 0) {
  977. args->retained = ret;
  978. ret = 0;
  979. }
  980. drm_gem_object_put(obj);
  981. unlock:
  982. mutex_unlock(&dev->struct_mutex);
  983. return ret;
  984. }
  985. static int msm_drm_object_supports_event(struct drm_device *dev,
  986. struct drm_msm_event_req *req)
  987. {
  988. int ret = -EINVAL;
  989. struct drm_mode_object *arg_obj;
  990. arg_obj = drm_mode_object_find(dev, NULL, req->object_id,
  991. req->object_type);
  992. if (!arg_obj)
  993. return -ENOENT;
  994. switch (arg_obj->type) {
  995. case DRM_MODE_OBJECT_CRTC:
  996. case DRM_MODE_OBJECT_CONNECTOR:
  997. ret = 0;
  998. break;
  999. default:
  1000. ret = -EOPNOTSUPP;
  1001. break;
  1002. }
  1003. drm_mode_object_put(arg_obj);
  1004. return ret;
  1005. }
  1006. static int msm_register_event(struct drm_device *dev,
  1007. struct drm_msm_event_req *req, struct drm_file *file, bool en)
  1008. {
  1009. int ret = -EINVAL;
  1010. struct msm_drm_private *priv = dev->dev_private;
  1011. struct msm_kms *kms = priv->kms;
  1012. struct drm_mode_object *arg_obj;
  1013. arg_obj = drm_mode_object_find(dev, file, req->object_id,
  1014. req->object_type);
  1015. if (!arg_obj)
  1016. return -ENOENT;
  1017. ret = kms->funcs->register_events(kms, arg_obj, req->event, en);
  1018. drm_mode_object_put(arg_obj);
  1019. return ret;
  1020. }
  1021. static int msm_event_client_count(struct drm_device *dev,
  1022. struct drm_msm_event_req *req_event, bool locked)
  1023. {
  1024. struct msm_drm_private *priv = dev->dev_private;
  1025. unsigned long flag = 0;
  1026. struct msm_drm_event *node;
  1027. int count = 0;
  1028. if (!locked)
  1029. spin_lock_irqsave(&dev->event_lock, flag);
  1030. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1031. if (node->event.base.type == req_event->event &&
  1032. node->event.info.object_id == req_event->object_id)
  1033. count++;
  1034. }
  1035. if (!locked)
  1036. spin_unlock_irqrestore(&dev->event_lock, flag);
  1037. return count;
  1038. }
  1039. static int msm_ioctl_register_event(struct drm_device *dev, void *data,
  1040. struct drm_file *file)
  1041. {
  1042. struct msm_drm_private *priv = dev->dev_private;
  1043. struct drm_msm_event_req *req_event = data;
  1044. struct msm_drm_event *client, *node;
  1045. unsigned long flag = 0;
  1046. bool dup_request = false;
  1047. int ret = 0, count = 0;
  1048. ret = msm_drm_object_supports_event(dev, req_event);
  1049. if (ret) {
  1050. DRM_ERROR("unsupported event %x object %x object id %d\n",
  1051. req_event->event, req_event->object_type,
  1052. req_event->object_id);
  1053. return ret;
  1054. }
  1055. spin_lock_irqsave(&dev->event_lock, flag);
  1056. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1057. if (node->base.file_priv != file)
  1058. continue;
  1059. if (node->event.base.type == req_event->event &&
  1060. node->event.info.object_id == req_event->object_id) {
  1061. DRM_DEBUG("duplicate request for event %x obj id %d\n",
  1062. node->event.base.type,
  1063. node->event.info.object_id);
  1064. dup_request = true;
  1065. break;
  1066. }
  1067. }
  1068. spin_unlock_irqrestore(&dev->event_lock, flag);
  1069. if (dup_request)
  1070. return -EALREADY;
  1071. client = kzalloc(sizeof(*client), GFP_KERNEL);
  1072. if (!client)
  1073. return -ENOMEM;
  1074. client->base.file_priv = file;
  1075. client->base.event = &client->event.base;
  1076. client->event.base.type = req_event->event;
  1077. memcpy(&client->event.info, req_event, sizeof(client->event.info));
  1078. /* Get the count of clients that have registered for event.
  1079. * Event should be enabled for first client, for subsequent enable
  1080. * calls add to client list and return.
  1081. */
  1082. count = msm_event_client_count(dev, req_event, false);
  1083. /* Add current client to list */
  1084. spin_lock_irqsave(&dev->event_lock, flag);
  1085. list_add_tail(&client->base.link, &priv->client_event_list);
  1086. spin_unlock_irqrestore(&dev->event_lock, flag);
  1087. if (count)
  1088. return 0;
  1089. ret = msm_register_event(dev, req_event, file, true);
  1090. if (ret) {
  1091. DRM_ERROR("failed to enable event %x object %x object id %d\n",
  1092. req_event->event, req_event->object_type,
  1093. req_event->object_id);
  1094. spin_lock_irqsave(&dev->event_lock, flag);
  1095. list_del(&client->base.link);
  1096. spin_unlock_irqrestore(&dev->event_lock, flag);
  1097. kfree(client);
  1098. }
  1099. return ret;
  1100. }
  1101. static int msm_ioctl_deregister_event(struct drm_device *dev, void *data,
  1102. struct drm_file *file)
  1103. {
  1104. struct msm_drm_private *priv = dev->dev_private;
  1105. struct drm_msm_event_req *req_event = data;
  1106. struct msm_drm_event *client = NULL, *node, *temp;
  1107. unsigned long flag = 0;
  1108. int count = 0;
  1109. bool found = false;
  1110. int ret = 0;
  1111. ret = msm_drm_object_supports_event(dev, req_event);
  1112. if (ret) {
  1113. DRM_ERROR("unsupported event %x object %x object id %d\n",
  1114. req_event->event, req_event->object_type,
  1115. req_event->object_id);
  1116. return ret;
  1117. }
  1118. spin_lock_irqsave(&dev->event_lock, flag);
  1119. list_for_each_entry_safe(node, temp, &priv->client_event_list,
  1120. base.link) {
  1121. if (node->event.base.type == req_event->event &&
  1122. node->event.info.object_id == req_event->object_id &&
  1123. node->base.file_priv == file) {
  1124. client = node;
  1125. list_del(&client->base.link);
  1126. found = true;
  1127. kfree(client);
  1128. break;
  1129. }
  1130. }
  1131. spin_unlock_irqrestore(&dev->event_lock, flag);
  1132. if (!found)
  1133. return -ENOENT;
  1134. count = msm_event_client_count(dev, req_event, false);
  1135. if (!count)
  1136. ret = msm_register_event(dev, req_event, file, false);
  1137. return ret;
  1138. }
  1139. void msm_mode_object_event_notify(struct drm_mode_object *obj,
  1140. struct drm_device *dev, struct drm_event *event, u8 *payload)
  1141. {
  1142. struct msm_drm_private *priv = NULL;
  1143. unsigned long flags;
  1144. struct msm_drm_event *notify, *node;
  1145. int len = 0, ret;
  1146. if (!obj || !event || !event->length || !payload) {
  1147. DRM_ERROR("err param obj %pK event %pK len %d payload %pK\n",
  1148. obj, event, ((event) ? (event->length) : -1),
  1149. payload);
  1150. return;
  1151. }
  1152. priv = (dev) ? dev->dev_private : NULL;
  1153. if (!dev || !priv) {
  1154. DRM_ERROR("invalid dev %pK priv %pK\n", dev, priv);
  1155. return;
  1156. }
  1157. spin_lock_irqsave(&dev->event_lock, flags);
  1158. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1159. if (node->event.base.type != event->type ||
  1160. obj->id != node->event.info.object_id)
  1161. continue;
  1162. len = event->length + sizeof(struct msm_drm_event);
  1163. if (node->base.file_priv->event_space < len) {
  1164. DRM_ERROR("Insufficient space %d for event %x len %d\n",
  1165. node->base.file_priv->event_space, event->type,
  1166. len);
  1167. continue;
  1168. }
  1169. notify = kzalloc(len, GFP_ATOMIC);
  1170. if (!notify)
  1171. continue;
  1172. notify->base.file_priv = node->base.file_priv;
  1173. notify->base.event = &notify->event.base;
  1174. notify->event.base.type = node->event.base.type;
  1175. notify->event.base.length = event->length +
  1176. sizeof(struct drm_msm_event_resp);
  1177. memcpy(&notify->event.info, &node->event.info,
  1178. sizeof(notify->event.info));
  1179. memcpy(notify->event.data, payload, event->length);
  1180. ret = drm_event_reserve_init_locked(dev, node->base.file_priv,
  1181. &notify->base, &notify->event.base);
  1182. if (ret) {
  1183. kfree(notify);
  1184. continue;
  1185. }
  1186. drm_send_event_locked(dev, &notify->base);
  1187. }
  1188. spin_unlock_irqrestore(&dev->event_lock, flags);
  1189. }
  1190. static int msm_release(struct inode *inode, struct file *filp)
  1191. {
  1192. struct drm_file *file_priv = filp->private_data;
  1193. struct drm_minor *minor = file_priv->minor;
  1194. struct drm_device *dev = minor->dev;
  1195. struct msm_drm_private *priv = dev->dev_private;
  1196. struct msm_drm_event *node, *temp, *tmp_node;
  1197. u32 count;
  1198. unsigned long flags;
  1199. LIST_HEAD(tmp_head);
  1200. spin_lock_irqsave(&dev->event_lock, flags);
  1201. list_for_each_entry_safe(node, temp, &priv->client_event_list,
  1202. base.link) {
  1203. if (node->base.file_priv != file_priv)
  1204. continue;
  1205. list_del(&node->base.link);
  1206. list_add_tail(&node->base.link, &tmp_head);
  1207. }
  1208. spin_unlock_irqrestore(&dev->event_lock, flags);
  1209. list_for_each_entry_safe(node, temp, &tmp_head,
  1210. base.link) {
  1211. list_del(&node->base.link);
  1212. count = msm_event_client_count(dev, &node->event.info, false);
  1213. list_for_each_entry(tmp_node, &tmp_head, base.link) {
  1214. if (tmp_node->event.base.type ==
  1215. node->event.info.event &&
  1216. tmp_node->event.info.object_id ==
  1217. node->event.info.object_id)
  1218. count++;
  1219. }
  1220. if (!count)
  1221. msm_register_event(dev, &node->event.info, file_priv,
  1222. false);
  1223. kfree(node);
  1224. }
  1225. return drm_release(inode, filp);
  1226. }
  1227. /**
  1228. * msm_ioctl_rmfb2 - remove an FB from the configuration
  1229. * @dev: drm device for the ioctl
  1230. * @data: data pointer for the ioctl
  1231. * @file_priv: drm file for the ioctl call
  1232. *
  1233. * Remove the FB specified by the user.
  1234. *
  1235. * Called by the user via ioctl.
  1236. *
  1237. * Returns:
  1238. * Zero on success, negative errno on failure.
  1239. */
  1240. int msm_ioctl_rmfb2(struct drm_device *dev, void *data,
  1241. struct drm_file *file_priv)
  1242. {
  1243. struct drm_framebuffer *fb = NULL;
  1244. struct drm_framebuffer *fbl = NULL;
  1245. uint32_t *id = data;
  1246. int found = 0;
  1247. if (!drm_core_check_feature(dev, DRIVER_MODESET))
  1248. return -EINVAL;
  1249. fb = drm_framebuffer_lookup(dev, file_priv, *id);
  1250. if (!fb)
  1251. return -ENOENT;
  1252. /* drop extra ref from traversing drm_framebuffer_lookup */
  1253. drm_framebuffer_put(fb);
  1254. mutex_lock(&file_priv->fbs_lock);
  1255. list_for_each_entry(fbl, &file_priv->fbs, filp_head)
  1256. if (fb == fbl)
  1257. found = 1;
  1258. if (!found) {
  1259. mutex_unlock(&file_priv->fbs_lock);
  1260. return -ENOENT;
  1261. }
  1262. list_del_init(&fb->filp_head);
  1263. mutex_unlock(&file_priv->fbs_lock);
  1264. drm_framebuffer_put(fb);
  1265. return 0;
  1266. }
  1267. EXPORT_SYMBOL(msm_ioctl_rmfb2);
  1268. /**
  1269. * msm_ioctl_power_ctrl - enable/disable power vote on MDSS Hw
  1270. * @dev: drm device for the ioctl
  1271. * @data: data pointer for the ioctl
  1272. * @file_priv: drm file for the ioctl call
  1273. *
  1274. */
  1275. int msm_ioctl_power_ctrl(struct drm_device *dev, void *data,
  1276. struct drm_file *file_priv)
  1277. {
  1278. struct msm_file_private *ctx = file_priv->driver_priv;
  1279. struct msm_drm_private *priv;
  1280. struct drm_msm_power_ctrl *power_ctrl = data;
  1281. bool vote_req = false;
  1282. int old_cnt;
  1283. int rc = 0;
  1284. if (unlikely(!power_ctrl)) {
  1285. DRM_ERROR("invalid ioctl data\n");
  1286. return -EINVAL;
  1287. }
  1288. priv = dev->dev_private;
  1289. mutex_lock(&ctx->power_lock);
  1290. old_cnt = ctx->enable_refcnt;
  1291. if (power_ctrl->enable) {
  1292. if (!ctx->enable_refcnt)
  1293. vote_req = true;
  1294. ctx->enable_refcnt++;
  1295. } else if (ctx->enable_refcnt) {
  1296. ctx->enable_refcnt--;
  1297. if (!ctx->enable_refcnt)
  1298. vote_req = true;
  1299. } else {
  1300. pr_err("ignoring, unbalanced disable\n");
  1301. }
  1302. if (vote_req) {
  1303. if (power_ctrl->enable)
  1304. rc = pm_runtime_get_sync(dev->dev);
  1305. else
  1306. pm_runtime_put_sync(dev->dev);
  1307. if (rc < 0)
  1308. ctx->enable_refcnt = old_cnt;
  1309. else
  1310. rc = 0;
  1311. }
  1312. pr_debug("pid %d enable %d, refcnt %d, vote_req %d\n",
  1313. current->pid, power_ctrl->enable, ctx->enable_refcnt,
  1314. vote_req);
  1315. SDE_EVT32(current->pid, power_ctrl->enable, ctx->enable_refcnt,
  1316. vote_req);
  1317. mutex_unlock(&ctx->power_lock);
  1318. return rc;
  1319. }
  1320. static const struct drm_ioctl_desc msm_ioctls[] = {
  1321. DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_AUTH|DRM_RENDER_ALLOW),
  1322. DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
  1323. DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
  1324. DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH|DRM_RENDER_ALLOW),
  1325. DRM_IOCTL_DEF_DRV(SDE_WB_CONFIG, sde_wb_config, DRM_UNLOCKED|DRM_AUTH),
  1326. DRM_IOCTL_DEF_DRV(MSM_REGISTER_EVENT, msm_ioctl_register_event,
  1327. DRM_UNLOCKED),
  1328. DRM_IOCTL_DEF_DRV(MSM_DEREGISTER_EVENT, msm_ioctl_deregister_event,
  1329. DRM_UNLOCKED),
  1330. DRM_IOCTL_DEF_DRV(MSM_RMFB2, msm_ioctl_rmfb2, DRM_UNLOCKED),
  1331. DRM_IOCTL_DEF_DRV(MSM_POWER_CTRL, msm_ioctl_power_ctrl,
  1332. DRM_RENDER_ALLOW),
  1333. };
  1334. static const struct vm_operations_struct vm_ops = {
  1335. .fault = msm_gem_fault,
  1336. .open = drm_gem_vm_open,
  1337. .close = drm_gem_vm_close,
  1338. };
  1339. static const struct file_operations fops = {
  1340. .owner = THIS_MODULE,
  1341. .open = drm_open,
  1342. .release = msm_release,
  1343. .unlocked_ioctl = drm_ioctl,
  1344. .compat_ioctl = drm_compat_ioctl,
  1345. .poll = drm_poll,
  1346. .read = drm_read,
  1347. .llseek = no_llseek,
  1348. .mmap = msm_gem_mmap,
  1349. };
  1350. static struct drm_driver msm_driver = {
  1351. .driver_features = DRIVER_GEM |
  1352. DRIVER_RENDER |
  1353. DRIVER_ATOMIC |
  1354. DRIVER_MODESET,
  1355. .open = msm_open,
  1356. .postclose = msm_postclose,
  1357. .lastclose = msm_lastclose,
  1358. .irq_handler = msm_irq,
  1359. .irq_preinstall = msm_irq_preinstall,
  1360. .irq_postinstall = msm_irq_postinstall,
  1361. .irq_uninstall = msm_irq_uninstall,
  1362. .enable_vblank = msm_enable_vblank,
  1363. .disable_vblank = msm_disable_vblank,
  1364. .gem_free_object = msm_gem_free_object,
  1365. .gem_vm_ops = &vm_ops,
  1366. .dumb_create = msm_gem_dumb_create,
  1367. .dumb_map_offset = msm_gem_dumb_map_offset,
  1368. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  1369. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  1370. .gem_prime_export = drm_gem_prime_export,
  1371. .gem_prime_import = msm_gem_prime_import,
  1372. .gem_prime_pin = msm_gem_prime_pin,
  1373. .gem_prime_unpin = msm_gem_prime_unpin,
  1374. .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
  1375. .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
  1376. .gem_prime_vmap = msm_gem_prime_vmap,
  1377. .gem_prime_vunmap = msm_gem_prime_vunmap,
  1378. .gem_prime_mmap = msm_gem_prime_mmap,
  1379. .ioctls = msm_ioctls,
  1380. .num_ioctls = ARRAY_SIZE(msm_ioctls),
  1381. .fops = &fops,
  1382. .name = "msm_drm",
  1383. .desc = "MSM Snapdragon DRM",
  1384. .date = "20130625",
  1385. .major = MSM_VERSION_MAJOR,
  1386. .minor = MSM_VERSION_MINOR,
  1387. .patchlevel = MSM_VERSION_PATCHLEVEL,
  1388. };
  1389. #ifdef CONFIG_PM_SLEEP
  1390. static int msm_pm_suspend(struct device *dev)
  1391. {
  1392. struct drm_device *ddev;
  1393. struct msm_drm_private *priv;
  1394. struct msm_kms *kms;
  1395. if (!dev)
  1396. return -EINVAL;
  1397. ddev = dev_get_drvdata(dev);
  1398. if (!ddev || !ddev->dev_private)
  1399. return -EINVAL;
  1400. priv = ddev->dev_private;
  1401. kms = priv->kms;
  1402. if (kms && kms->funcs && kms->funcs->pm_suspend)
  1403. return kms->funcs->pm_suspend(dev);
  1404. /* disable hot-plug polling */
  1405. drm_kms_helper_poll_disable(ddev);
  1406. return 0;
  1407. }
  1408. static int msm_pm_resume(struct device *dev)
  1409. {
  1410. struct drm_device *ddev;
  1411. struct msm_drm_private *priv;
  1412. struct msm_kms *kms;
  1413. if (!dev)
  1414. return -EINVAL;
  1415. ddev = dev_get_drvdata(dev);
  1416. if (!ddev || !ddev->dev_private)
  1417. return -EINVAL;
  1418. priv = ddev->dev_private;
  1419. kms = priv->kms;
  1420. if (kms && kms->funcs && kms->funcs->pm_resume)
  1421. return kms->funcs->pm_resume(dev);
  1422. /* enable hot-plug polling */
  1423. drm_kms_helper_poll_enable(ddev);
  1424. return 0;
  1425. }
  1426. #endif
  1427. #ifdef CONFIG_PM
  1428. static int msm_runtime_suspend(struct device *dev)
  1429. {
  1430. struct drm_device *ddev = dev_get_drvdata(dev);
  1431. struct msm_drm_private *priv = ddev->dev_private;
  1432. DBG("");
  1433. if (priv->mdss)
  1434. msm_mdss_disable(priv->mdss);
  1435. else
  1436. sde_power_resource_enable(&priv->phandle, false);
  1437. return 0;
  1438. }
  1439. static int msm_runtime_resume(struct device *dev)
  1440. {
  1441. struct drm_device *ddev = dev_get_drvdata(dev);
  1442. struct msm_drm_private *priv = ddev->dev_private;
  1443. int ret;
  1444. DBG("");
  1445. if (priv->mdss)
  1446. ret = msm_mdss_enable(priv->mdss);
  1447. else
  1448. ret = sde_power_resource_enable(&priv->phandle, true);
  1449. return ret;
  1450. }
  1451. #endif
  1452. static const struct dev_pm_ops msm_pm_ops = {
  1453. SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
  1454. SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL)
  1455. };
  1456. /*
  1457. * Componentized driver support:
  1458. */
  1459. /*
  1460. * NOTE: duplication of the same code as exynos or imx (or probably any other).
  1461. * so probably some room for some helpers
  1462. */
  1463. static int compare_of(struct device *dev, void *data)
  1464. {
  1465. return dev->of_node == data;
  1466. }
  1467. /*
  1468. * Identify what components need to be added by parsing what remote-endpoints
  1469. * our MDP output ports are connected to. In the case of LVDS on MDP4, there
  1470. * is no external component that we need to add since LVDS is within MDP4
  1471. * itself.
  1472. */
  1473. static int add_components_mdp(struct device *mdp_dev,
  1474. struct component_match **matchptr)
  1475. {
  1476. struct device_node *np = mdp_dev->of_node;
  1477. struct device_node *ep_node;
  1478. struct device *master_dev;
  1479. /*
  1480. * on MDP4 based platforms, the MDP platform device is the component
  1481. * master that adds other display interface components to itself.
  1482. *
  1483. * on MDP5 based platforms, the MDSS platform device is the component
  1484. * master that adds MDP5 and other display interface components to
  1485. * itself.
  1486. */
  1487. if (of_device_is_compatible(np, "qcom,mdp4"))
  1488. master_dev = mdp_dev;
  1489. else
  1490. master_dev = mdp_dev->parent;
  1491. for_each_endpoint_of_node(np, ep_node) {
  1492. struct device_node *intf;
  1493. struct of_endpoint ep;
  1494. int ret;
  1495. ret = of_graph_parse_endpoint(ep_node, &ep);
  1496. if (ret) {
  1497. dev_err(mdp_dev, "unable to parse port endpoint\n");
  1498. of_node_put(ep_node);
  1499. return ret;
  1500. }
  1501. /*
  1502. * The LCDC/LVDS port on MDP4 is a speacial case where the
  1503. * remote-endpoint isn't a component that we need to add
  1504. */
  1505. if (of_device_is_compatible(np, "qcom,mdp4") &&
  1506. ep.port == 0)
  1507. continue;
  1508. /*
  1509. * It's okay if some of the ports don't have a remote endpoint
  1510. * specified. It just means that the port isn't connected to
  1511. * any external interface.
  1512. */
  1513. intf = of_graph_get_remote_port_parent(ep_node);
  1514. if (!intf)
  1515. continue;
  1516. if (of_device_is_available(intf))
  1517. drm_of_component_match_add(master_dev, matchptr,
  1518. compare_of, intf);
  1519. of_node_put(intf);
  1520. }
  1521. return 0;
  1522. }
  1523. static int compare_name_mdp(struct device *dev, void *data)
  1524. {
  1525. return (strnstr(dev_name(dev), "mdp", strlen("mdp")) != NULL);
  1526. }
  1527. static int add_display_components(struct device *dev,
  1528. struct component_match **matchptr)
  1529. {
  1530. struct device *mdp_dev = NULL;
  1531. struct device_node *node;
  1532. int ret;
  1533. if (of_device_is_compatible(dev->of_node, "qcom,sde-kms")) {
  1534. struct device_node *np = dev->of_node;
  1535. unsigned int i;
  1536. for (i = 0; ; i++) {
  1537. node = of_parse_phandle(np, "connectors", i);
  1538. if (!node)
  1539. break;
  1540. component_match_add(dev, matchptr, compare_of, node);
  1541. }
  1542. return 0;
  1543. }
  1544. /*
  1545. * MDP5 based devices don't have a flat hierarchy. There is a top level
  1546. * parent: MDSS, and children: MDP5, DSI, HDMI, eDP etc. Populate the
  1547. * children devices, find the MDP5 node, and then add the interfaces
  1548. * to our components list.
  1549. */
  1550. if (of_device_is_compatible(dev->of_node, "qcom,mdss")) {
  1551. ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
  1552. if (ret) {
  1553. dev_err(dev, "failed to populate children devices\n");
  1554. return ret;
  1555. }
  1556. mdp_dev = device_find_child(dev, NULL, compare_name_mdp);
  1557. if (!mdp_dev) {
  1558. dev_err(dev, "failed to find MDSS MDP node\n");
  1559. of_platform_depopulate(dev);
  1560. return -ENODEV;
  1561. }
  1562. put_device(mdp_dev);
  1563. /* add the MDP component itself */
  1564. component_match_add(dev, matchptr, compare_of,
  1565. mdp_dev->of_node);
  1566. } else {
  1567. /* MDP4 */
  1568. mdp_dev = dev;
  1569. }
  1570. ret = add_components_mdp(mdp_dev, matchptr);
  1571. if (ret)
  1572. of_platform_depopulate(dev);
  1573. return ret;
  1574. }
  1575. struct msm_gem_address_space *
  1576. msm_gem_smmu_address_space_get(struct drm_device *dev,
  1577. unsigned int domain)
  1578. {
  1579. struct msm_drm_private *priv = NULL;
  1580. struct msm_kms *kms;
  1581. const struct msm_kms_funcs *funcs;
  1582. if ((!dev) || (!dev->dev_private))
  1583. return NULL;
  1584. priv = dev->dev_private;
  1585. kms = priv->kms;
  1586. if (!kms)
  1587. return NULL;
  1588. funcs = kms->funcs;
  1589. if ((!funcs) || (!funcs->get_address_space))
  1590. return NULL;
  1591. return funcs->get_address_space(priv->kms, domain);
  1592. }
  1593. int msm_get_mixer_count(struct msm_drm_private *priv,
  1594. const struct drm_display_mode *mode,
  1595. const struct msm_resource_caps_info *res, u32 *num_lm)
  1596. {
  1597. struct msm_kms *kms;
  1598. const struct msm_kms_funcs *funcs;
  1599. if (!priv) {
  1600. DRM_ERROR("invalid drm private struct\n");
  1601. return -EINVAL;
  1602. }
  1603. kms = priv->kms;
  1604. if (!kms) {
  1605. DRM_ERROR("invalid msm kms struct\n");
  1606. return -EINVAL;
  1607. }
  1608. funcs = kms->funcs;
  1609. if (!funcs || !funcs->get_mixer_count) {
  1610. DRM_ERROR("invalid function pointers\n");
  1611. return -EINVAL;
  1612. }
  1613. return funcs->get_mixer_count(priv->kms, mode, res, num_lm);
  1614. }
  1615. static int msm_drm_bind(struct device *dev)
  1616. {
  1617. return msm_drm_component_init(dev);
  1618. }
  1619. static void msm_drm_unbind(struct device *dev)
  1620. {
  1621. msm_drm_uninit(dev);
  1622. }
  1623. static const struct component_master_ops msm_drm_ops = {
  1624. .bind = msm_drm_bind,
  1625. .unbind = msm_drm_unbind,
  1626. };
  1627. static int msm_drm_component_dependency_check(struct device *dev)
  1628. {
  1629. struct device_node *node;
  1630. struct device_node *np = dev->of_node;
  1631. unsigned int i;
  1632. if (!of_device_is_compatible(dev->of_node, "qcom,sde-kms"))
  1633. return 0;
  1634. for (i = 0; ; i++) {
  1635. node = of_parse_phandle(np, "connectors", i);
  1636. if (!node)
  1637. break;
  1638. if (of_node_name_eq(node,"qcom,sde_rscc") &&
  1639. of_device_is_available(node) &&
  1640. of_node_check_flag(node, OF_POPULATED)) {
  1641. struct platform_device *pdev =
  1642. of_find_device_by_node(node);
  1643. if (!platform_get_drvdata(pdev)) {
  1644. dev_err(dev,
  1645. "qcom,sde_rscc not probed yet\n");
  1646. return -EPROBE_DEFER;
  1647. } else {
  1648. return 0;
  1649. }
  1650. }
  1651. }
  1652. return 0;
  1653. }
  1654. /*
  1655. * Platform driver:
  1656. */
  1657. static int msm_pdev_probe(struct platform_device *pdev)
  1658. {
  1659. int ret;
  1660. struct component_match *match = NULL;
  1661. ret = msm_drm_component_dependency_check(&pdev->dev);
  1662. if (ret)
  1663. return ret;
  1664. ret = msm_drm_device_init(pdev, &msm_driver);
  1665. if (ret)
  1666. return ret;
  1667. ret = add_display_components(&pdev->dev, &match);
  1668. if (ret)
  1669. return ret;
  1670. if (!match)
  1671. return -ENODEV;
  1672. pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
  1673. return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
  1674. }
  1675. static int msm_pdev_remove(struct platform_device *pdev)
  1676. {
  1677. component_master_del(&pdev->dev, &msm_drm_ops);
  1678. of_platform_depopulate(&pdev->dev);
  1679. msm_drm_unbind(&pdev->dev);
  1680. component_master_del(&pdev->dev, &msm_drm_ops);
  1681. return 0;
  1682. }
  1683. static void msm_pdev_shutdown(struct platform_device *pdev)
  1684. {
  1685. struct drm_device *ddev = platform_get_drvdata(pdev);
  1686. struct msm_drm_private *priv = NULL;
  1687. if (!ddev) {
  1688. DRM_ERROR("invalid drm device node\n");
  1689. return;
  1690. }
  1691. priv = ddev->dev_private;
  1692. if (!priv) {
  1693. DRM_ERROR("invalid msm drm private node\n");
  1694. return;
  1695. }
  1696. msm_lastclose(ddev);
  1697. /* set this after lastclose to allow kickoff from lastclose */
  1698. priv->shutdown_in_progress = true;
  1699. }
  1700. static const struct of_device_id dt_match[] = {
  1701. { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
  1702. { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
  1703. { .compatible = "qcom,sde-kms", .data = (void *)KMS_SDE },
  1704. {},
  1705. };
  1706. MODULE_DEVICE_TABLE(of, dt_match);
  1707. static struct platform_driver msm_platform_driver = {
  1708. .probe = msm_pdev_probe,
  1709. .remove = msm_pdev_remove,
  1710. .shutdown = msm_pdev_shutdown,
  1711. .driver = {
  1712. .name = "msm_drm",
  1713. .of_match_table = dt_match,
  1714. .pm = &msm_pm_ops,
  1715. .suppress_bind_attrs = true,
  1716. },
  1717. };
  1718. static int __init msm_drm_register(void)
  1719. {
  1720. if (!modeset)
  1721. return -EINVAL;
  1722. DBG("init");
  1723. sde_rsc_rpmh_register();
  1724. sde_rsc_register();
  1725. dsi_display_register();
  1726. msm_hdcp_register();
  1727. dp_display_register();
  1728. msm_smmu_driver_init();
  1729. sde_rotator_register();
  1730. sde_rotator_smmu_driver_register();
  1731. msm_dsi_register();
  1732. msm_edp_register();
  1733. msm_hdmi_register();
  1734. sde_wb_register();
  1735. return platform_driver_register(&msm_platform_driver);
  1736. }
  1737. static void __exit msm_drm_unregister(void)
  1738. {
  1739. DBG("fini");
  1740. platform_driver_unregister(&msm_platform_driver);
  1741. sde_wb_unregister();
  1742. msm_hdmi_unregister();
  1743. msm_edp_unregister();
  1744. msm_dsi_unregister();
  1745. sde_rotator_smmu_driver_unregister();
  1746. sde_rotator_unregister();
  1747. msm_smmu_driver_cleanup();
  1748. msm_hdcp_unregister();
  1749. dp_display_unregister();
  1750. dsi_display_unregister();
  1751. sde_rsc_unregister();
  1752. }
  1753. module_init(msm_drm_register);
  1754. module_exit(msm_drm_unregister);
  1755. MODULE_AUTHOR("Rob Clark <[email protected]");
  1756. MODULE_DESCRIPTION("MSM DRM Driver");
  1757. MODULE_LICENSE("GPL");