qmi.c 101 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  39. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  40. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  41. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  43. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  44. #define DMS_QMI_MAX_MSG_LEN SZ_256
  45. #define MAX_SHADOW_REG_RESERVED 2
  46. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  47. MAX_SHADOW_REG_RESERVED)
  48. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  49. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  50. #ifdef CONFIG_CNSS2_DEBUG
  51. static bool ignore_qmi_failure;
  52. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  53. void cnss_ignore_qmi_failure(bool ignore)
  54. {
  55. ignore_qmi_failure = ignore;
  56. }
  57. #else
  58. #define CNSS_QMI_ASSERT() do { } while (0)
  59. void cnss_ignore_qmi_failure(bool ignore) { }
  60. #endif
  61. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  62. {
  63. switch (mode) {
  64. case CNSS_MISSION:
  65. return "MISSION";
  66. case CNSS_FTM:
  67. return "FTM";
  68. case CNSS_EPPING:
  69. return "EPPING";
  70. case CNSS_WALTEST:
  71. return "WALTEST";
  72. case CNSS_OFF:
  73. return "OFF";
  74. case CNSS_CCPM:
  75. return "CCPM";
  76. case CNSS_QVIT:
  77. return "QVIT";
  78. case CNSS_CALIBRATION:
  79. return "CALIBRATION";
  80. default:
  81. return "UNKNOWN";
  82. }
  83. }
  84. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  85. struct qmi_elem_info *req_ei,
  86. struct qmi_elem_info *rsp_ei,
  87. int req_id, size_t req_len,
  88. unsigned long timeout)
  89. {
  90. struct qmi_txn txn;
  91. int ret;
  92. char *err_msg;
  93. struct qmi_response_type_v01 *resp = rsp;
  94. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  95. if (ret < 0) {
  96. err_msg = "Qmi fail: fail to init txn,";
  97. goto out;
  98. }
  99. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  100. req_len, req_ei, req);
  101. if (ret < 0) {
  102. qmi_txn_cancel(&txn);
  103. err_msg = "Qmi fail: fail to send req,";
  104. goto out;
  105. }
  106. ret = qmi_txn_wait(&txn, timeout);
  107. if (ret < 0) {
  108. err_msg = "Qmi fail: wait timeout,";
  109. goto out;
  110. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  111. err_msg = "Qmi fail: request rejected,";
  112. cnss_pr_err("Qmi fail: respons with error:%d\n",
  113. resp->error);
  114. ret = -resp->result;
  115. goto out;
  116. }
  117. cnss_pr_dbg("req %x success\n", req_id);
  118. return 0;
  119. out:
  120. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  121. return ret;
  122. }
  123. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  124. {
  125. struct wlfw_ind_register_req_msg_v01 *req;
  126. struct wlfw_ind_register_resp_msg_v01 *resp;
  127. struct qmi_txn txn;
  128. int ret = 0;
  129. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  130. plat_priv->driver_state);
  131. req = kzalloc(sizeof(*req), GFP_KERNEL);
  132. if (!req)
  133. return -ENOMEM;
  134. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  135. if (!resp) {
  136. kfree(req);
  137. return -ENOMEM;
  138. }
  139. req->client_id_valid = 1;
  140. req->client_id = WLFW_CLIENT_ID;
  141. req->request_mem_enable_valid = 1;
  142. req->request_mem_enable = 1;
  143. req->fw_mem_ready_enable_valid = 1;
  144. req->fw_mem_ready_enable = 1;
  145. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  146. req->fw_init_done_enable_valid = 1;
  147. req->fw_init_done_enable = 1;
  148. req->pin_connect_result_enable_valid = 1;
  149. req->pin_connect_result_enable = 1;
  150. req->cal_done_enable_valid = 1;
  151. req->cal_done_enable = 1;
  152. req->qdss_trace_req_mem_enable_valid = 1;
  153. req->qdss_trace_req_mem_enable = 1;
  154. req->qdss_trace_save_enable_valid = 1;
  155. req->qdss_trace_save_enable = 1;
  156. req->qdss_trace_free_enable_valid = 1;
  157. req->qdss_trace_free_enable = 1;
  158. req->respond_get_info_enable_valid = 1;
  159. req->respond_get_info_enable = 1;
  160. req->wfc_call_twt_config_enable_valid = 1;
  161. req->wfc_call_twt_config_enable = 1;
  162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  163. wlfw_ind_register_resp_msg_v01_ei, resp);
  164. if (ret < 0) {
  165. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  166. ret);
  167. goto out;
  168. }
  169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  170. QMI_WLFW_IND_REGISTER_REQ_V01,
  171. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  172. wlfw_ind_register_req_msg_v01_ei, req);
  173. if (ret < 0) {
  174. qmi_txn_cancel(&txn);
  175. cnss_pr_err("Failed to send indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  180. if (ret < 0) {
  181. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  182. ret);
  183. goto out;
  184. }
  185. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  186. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  187. resp->resp.result, resp->resp.error);
  188. ret = -resp->resp.result;
  189. goto out;
  190. }
  191. if (resp->fw_status_valid) {
  192. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  193. ret = -EALREADY;
  194. goto qmi_registered;
  195. }
  196. }
  197. kfree(req);
  198. kfree(resp);
  199. return 0;
  200. out:
  201. CNSS_QMI_ASSERT();
  202. qmi_registered:
  203. kfree(req);
  204. kfree(resp);
  205. return ret;
  206. }
  207. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  208. struct wlfw_host_cap_req_msg_v01 *req)
  209. {
  210. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  211. plat_priv->device_id == MANGO_DEVICE_ID ||
  212. plat_priv->device_id == PEACH_DEVICE_ID) {
  213. req->mlo_capable_valid = 1;
  214. req->mlo_capable = 1;
  215. req->mlo_chip_id_valid = 1;
  216. req->mlo_chip_id = 0;
  217. req->mlo_group_id_valid = 1;
  218. req->mlo_group_id = 0;
  219. req->max_mlo_peer_valid = 1;
  220. /* Max peer number generally won't change for the same device
  221. * but needs to be synced with host driver.
  222. */
  223. req->max_mlo_peer = 32;
  224. req->mlo_num_chips_valid = 1;
  225. req->mlo_num_chips = 1;
  226. req->mlo_chip_info_valid = 1;
  227. req->mlo_chip_info[0].chip_id = 0;
  228. req->mlo_chip_info[0].num_local_links = 2;
  229. req->mlo_chip_info[0].hw_link_id[0] = 0;
  230. req->mlo_chip_info[0].hw_link_id[1] = 1;
  231. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  232. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  233. }
  234. }
  235. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  236. {
  237. struct wlfw_host_cap_req_msg_v01 *req;
  238. struct wlfw_host_cap_resp_msg_v01 *resp;
  239. struct qmi_txn txn;
  240. int ret = 0;
  241. u64 iova_start = 0, iova_size = 0,
  242. iova_ipa_start = 0, iova_ipa_size = 0;
  243. u64 feature_list = 0;
  244. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  245. plat_priv->driver_state);
  246. req = kzalloc(sizeof(*req), GFP_KERNEL);
  247. if (!req)
  248. return -ENOMEM;
  249. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  250. if (!resp) {
  251. kfree(req);
  252. return -ENOMEM;
  253. }
  254. req->num_clients_valid = 1;
  255. req->num_clients = 1;
  256. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  257. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  258. if (req->wake_msi) {
  259. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  260. req->wake_msi_valid = 1;
  261. }
  262. req->bdf_support_valid = 1;
  263. req->bdf_support = 1;
  264. req->m3_support_valid = 1;
  265. req->m3_support = 1;
  266. req->m3_cache_support_valid = 1;
  267. req->m3_cache_support = 1;
  268. req->cal_done_valid = 1;
  269. req->cal_done = plat_priv->cal_done;
  270. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  271. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  272. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  273. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  274. &iova_ipa_size)) {
  275. req->ddr_range_valid = 1;
  276. req->ddr_range[0].start = iova_start;
  277. req->ddr_range[0].size = iova_size + iova_ipa_size;
  278. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  279. req->ddr_range[0].start, req->ddr_range[0].size);
  280. }
  281. req->host_build_type_valid = 1;
  282. req->host_build_type = cnss_get_host_build_type();
  283. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  284. ret = cnss_get_feature_list(plat_priv, &feature_list);
  285. if (!ret) {
  286. req->feature_list_valid = 1;
  287. req->feature_list = feature_list;
  288. cnss_pr_dbg("Sending feature list 0x%llx\n",
  289. req->feature_list);
  290. }
  291. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  292. wlfw_host_cap_resp_msg_v01_ei, resp);
  293. if (ret < 0) {
  294. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  295. ret);
  296. goto out;
  297. }
  298. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  299. QMI_WLFW_HOST_CAP_REQ_V01,
  300. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  301. wlfw_host_cap_req_msg_v01_ei, req);
  302. if (ret < 0) {
  303. qmi_txn_cancel(&txn);
  304. cnss_pr_err("Failed to send host capability request, err: %d\n",
  305. ret);
  306. goto out;
  307. }
  308. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  309. if (ret < 0) {
  310. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  311. ret);
  312. goto out;
  313. }
  314. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  315. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  316. resp->resp.result, resp->resp.error);
  317. ret = -resp->resp.result;
  318. goto out;
  319. }
  320. kfree(req);
  321. kfree(resp);
  322. return 0;
  323. out:
  324. CNSS_QMI_ASSERT();
  325. kfree(req);
  326. kfree(resp);
  327. return ret;
  328. }
  329. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  330. {
  331. struct wlfw_respond_mem_req_msg_v01 *req;
  332. struct wlfw_respond_mem_resp_msg_v01 *resp;
  333. struct qmi_txn txn;
  334. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  335. int ret = 0, i;
  336. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  337. plat_priv->driver_state);
  338. req = kzalloc(sizeof(*req), GFP_KERNEL);
  339. if (!req)
  340. return -ENOMEM;
  341. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  342. if (!resp) {
  343. kfree(req);
  344. return -ENOMEM;
  345. }
  346. if (plat_priv->fw_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  347. cnss_pr_err("Invalid seg len %u\n", plat_priv->fw_mem_seg_len);
  348. ret = -EINVAL;
  349. goto out;
  350. }
  351. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  352. for (i = 0; i < req->mem_seg_len; i++) {
  353. if (!fw_mem[i].pa || !fw_mem[i].size) {
  354. if (fw_mem[i].type == 0) {
  355. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  356. i);
  357. ret = -EINVAL;
  358. goto out;
  359. }
  360. cnss_pr_err("Memory for FW is not available for type: %u\n",
  361. fw_mem[i].type);
  362. ret = -ENOMEM;
  363. goto out;
  364. }
  365. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  366. fw_mem[i].va, &fw_mem[i].pa,
  367. fw_mem[i].size, fw_mem[i].type);
  368. req->mem_seg[i].addr = fw_mem[i].pa;
  369. req->mem_seg[i].size = fw_mem[i].size;
  370. req->mem_seg[i].type = fw_mem[i].type;
  371. }
  372. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  373. wlfw_respond_mem_resp_msg_v01_ei, resp);
  374. if (ret < 0) {
  375. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  376. ret);
  377. goto out;
  378. }
  379. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  380. QMI_WLFW_RESPOND_MEM_REQ_V01,
  381. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  382. wlfw_respond_mem_req_msg_v01_ei, req);
  383. if (ret < 0) {
  384. qmi_txn_cancel(&txn);
  385. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  386. ret);
  387. goto out;
  388. }
  389. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  390. if (ret < 0) {
  391. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  392. ret);
  393. goto out;
  394. }
  395. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  396. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  397. resp->resp.result, resp->resp.error);
  398. ret = -resp->resp.result;
  399. goto out;
  400. }
  401. kfree(req);
  402. kfree(resp);
  403. return 0;
  404. out:
  405. CNSS_QMI_ASSERT();
  406. kfree(req);
  407. kfree(resp);
  408. return ret;
  409. }
  410. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  411. {
  412. struct wlfw_cap_req_msg_v01 *req;
  413. struct wlfw_cap_resp_msg_v01 *resp;
  414. struct qmi_txn txn;
  415. char *fw_build_timestamp;
  416. int ret = 0, i;
  417. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  418. plat_priv->driver_state);
  419. req = kzalloc(sizeof(*req), GFP_KERNEL);
  420. if (!req)
  421. return -ENOMEM;
  422. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  423. if (!resp) {
  424. kfree(req);
  425. return -ENOMEM;
  426. }
  427. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  428. wlfw_cap_resp_msg_v01_ei, resp);
  429. if (ret < 0) {
  430. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  431. ret);
  432. goto out;
  433. }
  434. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  435. QMI_WLFW_CAP_REQ_V01,
  436. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  437. wlfw_cap_req_msg_v01_ei, req);
  438. if (ret < 0) {
  439. qmi_txn_cancel(&txn);
  440. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  441. ret);
  442. goto out;
  443. }
  444. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  445. if (ret < 0) {
  446. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  447. ret);
  448. goto out;
  449. }
  450. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  451. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  452. resp->resp.result, resp->resp.error);
  453. ret = -resp->resp.result;
  454. goto out;
  455. }
  456. if (resp->chip_info_valid) {
  457. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  458. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  459. }
  460. if (resp->board_info_valid)
  461. plat_priv->board_info.board_id = resp->board_info.board_id;
  462. else
  463. plat_priv->board_info.board_id = 0xFF;
  464. if (resp->soc_info_valid)
  465. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  466. if (resp->fw_version_info_valid) {
  467. plat_priv->fw_version_info.fw_version =
  468. resp->fw_version_info.fw_version;
  469. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  470. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  471. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  472. resp->fw_version_info.fw_build_timestamp,
  473. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  474. }
  475. if (resp->fw_build_id_valid) {
  476. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  477. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  478. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  479. }
  480. /* FW will send aop retention volatage for qca6490 */
  481. if (resp->voltage_mv_valid) {
  482. plat_priv->cpr_info.voltage = resp->voltage_mv;
  483. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  484. plat_priv->cpr_info.voltage);
  485. cnss_update_cpr_info(plat_priv);
  486. }
  487. if (resp->time_freq_hz_valid) {
  488. plat_priv->device_freq_hz = resp->time_freq_hz;
  489. cnss_pr_dbg("Device frequency is %d HZ\n",
  490. plat_priv->device_freq_hz);
  491. }
  492. if (resp->otp_version_valid)
  493. plat_priv->otp_version = resp->otp_version;
  494. if (resp->dev_mem_info_valid) {
  495. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  496. plat_priv->dev_mem_info[i].start =
  497. resp->dev_mem_info[i].start;
  498. plat_priv->dev_mem_info[i].size =
  499. resp->dev_mem_info[i].size;
  500. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  501. i, plat_priv->dev_mem_info[i].start,
  502. plat_priv->dev_mem_info[i].size);
  503. }
  504. }
  505. if (resp->fw_caps_valid) {
  506. plat_priv->fw_pcie_gen_switch =
  507. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  508. plat_priv->fw_caps = resp->fw_caps;
  509. }
  510. if (resp->hang_data_length_valid &&
  511. resp->hang_data_length &&
  512. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  513. plat_priv->hang_event_data_len = resp->hang_data_length;
  514. else
  515. plat_priv->hang_event_data_len = 0;
  516. if (resp->hang_data_addr_offset_valid)
  517. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  518. else
  519. plat_priv->hang_data_addr_offset = 0;
  520. if (resp->hwid_bitmap_valid)
  521. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  522. if (resp->ol_cpr_cfg_valid)
  523. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  524. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  525. plat_priv->chip_info.chip_id,
  526. plat_priv->chip_info.chip_family,
  527. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  528. plat_priv->otp_version);
  529. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  530. plat_priv->fw_version_info.fw_version,
  531. plat_priv->fw_version_info.fw_build_timestamp,
  532. plat_priv->fw_build_id,
  533. plat_priv->hwid_bitmap);
  534. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  535. plat_priv->hang_event_data_len,
  536. plat_priv->hang_data_addr_offset);
  537. kfree(req);
  538. kfree(resp);
  539. return 0;
  540. out:
  541. CNSS_QMI_ASSERT();
  542. kfree(req);
  543. kfree(resp);
  544. return ret;
  545. }
  546. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  547. u32 bdf_type, char *filename,
  548. u32 filename_len)
  549. {
  550. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  551. int ret = 0;
  552. switch (bdf_type) {
  553. case CNSS_BDF_ELF:
  554. /* Board ID will be equal or less than 0xFF in GF mask case */
  555. if (plat_priv->board_info.board_id == 0xFF) {
  556. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  557. snprintf(filename_tmp, filename_len,
  558. ELF_BDF_FILE_NAME_GF);
  559. else
  560. snprintf(filename_tmp, filename_len,
  561. ELF_BDF_FILE_NAME);
  562. } else if (plat_priv->board_info.board_id < 0xFF) {
  563. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  564. snprintf(filename_tmp, filename_len,
  565. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  566. plat_priv->board_info.board_id);
  567. else
  568. snprintf(filename_tmp, filename_len,
  569. ELF_BDF_FILE_NAME_PREFIX "%02x",
  570. plat_priv->board_info.board_id);
  571. } else {
  572. snprintf(filename_tmp, filename_len,
  573. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  574. plat_priv->board_info.board_id >> 8 & 0xFF,
  575. plat_priv->board_info.board_id & 0xFF);
  576. }
  577. break;
  578. case CNSS_BDF_BIN:
  579. if (plat_priv->board_info.board_id == 0xFF) {
  580. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  581. snprintf(filename_tmp, filename_len,
  582. BIN_BDF_FILE_NAME_GF);
  583. else
  584. snprintf(filename_tmp, filename_len,
  585. BIN_BDF_FILE_NAME);
  586. } else if (plat_priv->board_info.board_id < 0xFF) {
  587. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  588. snprintf(filename_tmp, filename_len,
  589. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  590. plat_priv->board_info.board_id);
  591. else
  592. snprintf(filename_tmp, filename_len,
  593. BIN_BDF_FILE_NAME_PREFIX "%02x",
  594. plat_priv->board_info.board_id);
  595. } else {
  596. snprintf(filename_tmp, filename_len,
  597. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  598. plat_priv->board_info.board_id >> 8 & 0xFF,
  599. plat_priv->board_info.board_id & 0xFF);
  600. }
  601. break;
  602. case CNSS_BDF_REGDB:
  603. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  604. break;
  605. case CNSS_BDF_HDS:
  606. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  607. break;
  608. default:
  609. cnss_pr_err("Invalid BDF type: %d\n",
  610. plat_priv->ctrl_params.bdf_type);
  611. ret = -EINVAL;
  612. break;
  613. }
  614. if (!ret)
  615. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  616. return ret;
  617. }
  618. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  619. enum wlfw_ini_file_type_v01 file_type)
  620. {
  621. struct wlfw_ini_file_download_req_msg_v01 *req;
  622. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  623. struct qmi_txn txn;
  624. int ret = 0;
  625. const struct firmware *fw;
  626. char filename[INI_FILE_NAME_LEN] = {0};
  627. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  628. const u8 *temp;
  629. unsigned int remaining;
  630. bool backup_supported = false;
  631. req = kzalloc(sizeof(*req), GFP_KERNEL);
  632. if (!req)
  633. return -ENOMEM;
  634. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  635. if (!resp) {
  636. kfree(req);
  637. return -ENOMEM;
  638. }
  639. switch (file_type) {
  640. case WLFW_CONN_ROAM_INI_V01:
  641. snprintf(tmp_filename, sizeof(tmp_filename),
  642. CONN_ROAM_FILE_NAME);
  643. backup_supported = true;
  644. break;
  645. default:
  646. cnss_pr_err("Invalid file type: %u\n", file_type);
  647. ret = -EINVAL;
  648. goto err_req_fw;
  649. }
  650. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  651. /* Fetch the file */
  652. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  653. if (ret) {
  654. if (!backup_supported)
  655. goto err_req_fw;
  656. snprintf(filename, sizeof(filename),
  657. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  658. ret = firmware_request_nowarn(&fw, filename,
  659. &plat_priv->plat_dev->dev);
  660. if (ret)
  661. goto err_req_fw;
  662. }
  663. temp = fw->data;
  664. remaining = fw->size;
  665. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  666. remaining);
  667. while (remaining) {
  668. req->file_type_valid = 1;
  669. req->file_type = file_type;
  670. req->total_size_valid = 1;
  671. req->total_size = remaining;
  672. req->seg_id_valid = 1;
  673. req->data_valid = 1;
  674. req->end_valid = 1;
  675. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  676. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  677. } else {
  678. req->data_len = remaining;
  679. req->end = 1;
  680. }
  681. memcpy(req->data, temp, req->data_len);
  682. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  683. wlfw_ini_file_download_resp_msg_v01_ei,
  684. resp);
  685. if (ret < 0) {
  686. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  687. ret);
  688. goto err;
  689. }
  690. ret = qmi_send_request
  691. (&plat_priv->qmi_wlfw, NULL, &txn,
  692. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  693. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  694. wlfw_ini_file_download_req_msg_v01_ei, req);
  695. if (ret < 0) {
  696. qmi_txn_cancel(&txn);
  697. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  698. ret);
  699. goto err;
  700. }
  701. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  702. if (ret < 0) {
  703. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  704. ret);
  705. goto err;
  706. }
  707. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  708. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  709. resp->resp.result, resp->resp.error);
  710. ret = -resp->resp.result;
  711. goto err;
  712. }
  713. remaining -= req->data_len;
  714. temp += req->data_len;
  715. req->seg_id++;
  716. }
  717. release_firmware(fw);
  718. kfree(req);
  719. kfree(resp);
  720. return 0;
  721. err:
  722. release_firmware(fw);
  723. err_req_fw:
  724. kfree(req);
  725. kfree(resp);
  726. return ret;
  727. }
  728. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  729. u32 bdf_type)
  730. {
  731. struct wlfw_bdf_download_req_msg_v01 *req;
  732. struct wlfw_bdf_download_resp_msg_v01 *resp;
  733. struct qmi_txn txn;
  734. char filename[MAX_FIRMWARE_NAME_LEN];
  735. const struct firmware *fw_entry = NULL;
  736. const u8 *temp;
  737. unsigned int remaining;
  738. int ret = 0;
  739. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  740. plat_priv->driver_state, bdf_type);
  741. req = kzalloc(sizeof(*req), GFP_KERNEL);
  742. if (!req)
  743. return -ENOMEM;
  744. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  745. if (!resp) {
  746. kfree(req);
  747. return -ENOMEM;
  748. }
  749. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  750. filename, sizeof(filename));
  751. if (ret)
  752. goto err_req_fw;
  753. if (bdf_type == CNSS_BDF_REGDB)
  754. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  755. filename);
  756. else
  757. ret = firmware_request_nowarn(&fw_entry, filename,
  758. &plat_priv->plat_dev->dev);
  759. if (ret) {
  760. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  761. goto err_req_fw;
  762. }
  763. temp = fw_entry->data;
  764. remaining = fw_entry->size;
  765. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  766. while (remaining) {
  767. req->valid = 1;
  768. req->file_id_valid = 1;
  769. req->file_id = plat_priv->board_info.board_id;
  770. req->total_size_valid = 1;
  771. req->total_size = remaining;
  772. req->seg_id_valid = 1;
  773. req->data_valid = 1;
  774. req->end_valid = 1;
  775. req->bdf_type_valid = 1;
  776. req->bdf_type = bdf_type;
  777. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  778. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  779. } else {
  780. req->data_len = remaining;
  781. req->end = 1;
  782. }
  783. memcpy(req->data, temp, req->data_len);
  784. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  785. wlfw_bdf_download_resp_msg_v01_ei, resp);
  786. if (ret < 0) {
  787. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  788. ret);
  789. goto err_send;
  790. }
  791. ret = qmi_send_request
  792. (&plat_priv->qmi_wlfw, NULL, &txn,
  793. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  794. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  795. wlfw_bdf_download_req_msg_v01_ei, req);
  796. if (ret < 0) {
  797. qmi_txn_cancel(&txn);
  798. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  799. ret);
  800. goto err_send;
  801. }
  802. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  803. if (ret < 0) {
  804. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  805. ret);
  806. goto err_send;
  807. }
  808. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  809. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  810. resp->resp.result, resp->resp.error);
  811. ret = -resp->resp.result;
  812. goto err_send;
  813. }
  814. remaining -= req->data_len;
  815. temp += req->data_len;
  816. req->seg_id++;
  817. }
  818. release_firmware(fw_entry);
  819. if (resp->host_bdf_data_valid) {
  820. /* QCA6490 enable S3E regulator for IPA configuration only */
  821. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  822. cnss_enable_int_pow_amp_vreg(plat_priv);
  823. plat_priv->cbc_file_download =
  824. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  825. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  826. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  827. plat_priv->cbc_file_download);
  828. }
  829. kfree(req);
  830. kfree(resp);
  831. return 0;
  832. err_send:
  833. release_firmware(fw_entry);
  834. err_req_fw:
  835. if (!(bdf_type == CNSS_BDF_REGDB ||
  836. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  837. ret == -EAGAIN))
  838. CNSS_QMI_ASSERT();
  839. kfree(req);
  840. kfree(resp);
  841. return ret;
  842. }
  843. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  844. {
  845. struct wlfw_m3_info_req_msg_v01 *req;
  846. struct wlfw_m3_info_resp_msg_v01 *resp;
  847. struct qmi_txn txn;
  848. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  849. int ret = 0;
  850. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  851. plat_priv->driver_state);
  852. req = kzalloc(sizeof(*req), GFP_KERNEL);
  853. if (!req)
  854. return -ENOMEM;
  855. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  856. if (!resp) {
  857. kfree(req);
  858. return -ENOMEM;
  859. }
  860. if (!m3_mem->pa || !m3_mem->size) {
  861. cnss_pr_err("Memory for M3 is not available\n");
  862. ret = -ENOMEM;
  863. goto out;
  864. }
  865. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  866. m3_mem->va, &m3_mem->pa, m3_mem->size);
  867. req->addr = plat_priv->m3_mem.pa;
  868. req->size = plat_priv->m3_mem.size;
  869. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  870. wlfw_m3_info_resp_msg_v01_ei, resp);
  871. if (ret < 0) {
  872. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  873. ret);
  874. goto out;
  875. }
  876. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  877. QMI_WLFW_M3_INFO_REQ_V01,
  878. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  879. wlfw_m3_info_req_msg_v01_ei, req);
  880. if (ret < 0) {
  881. qmi_txn_cancel(&txn);
  882. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  883. ret);
  884. goto out;
  885. }
  886. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  887. if (ret < 0) {
  888. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  889. ret);
  890. goto out;
  891. }
  892. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  893. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  894. resp->resp.result, resp->resp.error);
  895. ret = -resp->resp.result;
  896. goto out;
  897. }
  898. kfree(req);
  899. kfree(resp);
  900. return 0;
  901. out:
  902. CNSS_QMI_ASSERT();
  903. kfree(req);
  904. kfree(resp);
  905. return ret;
  906. }
  907. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  908. u8 *mac, u32 mac_len)
  909. {
  910. struct wlfw_mac_addr_req_msg_v01 req;
  911. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  912. struct qmi_txn txn;
  913. int ret;
  914. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  915. return -EINVAL;
  916. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  917. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  918. if (ret < 0) {
  919. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  920. ret);
  921. ret = -EIO;
  922. goto out;
  923. }
  924. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  925. mac, plat_priv->driver_state);
  926. memcpy(req.mac_addr, mac, mac_len);
  927. req.mac_addr_valid = 1;
  928. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  929. QMI_WLFW_MAC_ADDR_REQ_V01,
  930. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  931. wlfw_mac_addr_req_msg_v01_ei, &req);
  932. if (ret < 0) {
  933. qmi_txn_cancel(&txn);
  934. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  935. ret = -EIO;
  936. goto out;
  937. }
  938. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  939. if (ret < 0) {
  940. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  941. ret);
  942. ret = -EIO;
  943. goto out;
  944. }
  945. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  946. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  947. resp.resp.result);
  948. ret = -resp.resp.result;
  949. }
  950. out:
  951. return ret;
  952. }
  953. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  954. u32 total_size)
  955. {
  956. int ret = 0;
  957. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  958. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  959. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  960. unsigned int remaining;
  961. struct qmi_txn txn;
  962. cnss_pr_dbg("%s\n", __func__);
  963. req = kzalloc(sizeof(*req), GFP_KERNEL);
  964. if (!req)
  965. return -ENOMEM;
  966. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  967. if (!resp) {
  968. kfree(req);
  969. return -ENOMEM;
  970. }
  971. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  972. if (!p_qdss_trace_data) {
  973. ret = ENOMEM;
  974. goto end;
  975. }
  976. remaining = total_size;
  977. p_qdss_trace_data_temp = p_qdss_trace_data;
  978. while (remaining && resp->end == 0) {
  979. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  980. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  981. if (ret < 0) {
  982. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  983. ret);
  984. goto fail;
  985. }
  986. ret = qmi_send_request
  987. (&plat_priv->qmi_wlfw, NULL, &txn,
  988. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  989. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  990. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  991. if (ret < 0) {
  992. qmi_txn_cancel(&txn);
  993. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  994. ret);
  995. goto fail;
  996. }
  997. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  998. if (ret < 0) {
  999. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  1000. ret);
  1001. goto fail;
  1002. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1003. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1004. resp->resp.result, resp->resp.error);
  1005. ret = -resp->resp.result;
  1006. goto fail;
  1007. } else {
  1008. ret = 0;
  1009. }
  1010. cnss_pr_dbg("%s: response total size %d data len %d",
  1011. __func__, resp->total_size, resp->data_len);
  1012. if ((resp->total_size_valid == 1 &&
  1013. resp->total_size == total_size) &&
  1014. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1015. (resp->data_valid == 1 &&
  1016. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01) &&
  1017. resp->data_len <= remaining) {
  1018. memcpy(p_qdss_trace_data_temp,
  1019. resp->data, resp->data_len);
  1020. } else {
  1021. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1022. __func__,
  1023. total_size, req->seg_id,
  1024. resp->total_size_valid,
  1025. resp->total_size,
  1026. resp->seg_id_valid,
  1027. resp->seg_id,
  1028. resp->data_valid,
  1029. resp->data_len);
  1030. ret = -1;
  1031. goto fail;
  1032. }
  1033. remaining -= resp->data_len;
  1034. p_qdss_trace_data_temp += resp->data_len;
  1035. req->seg_id++;
  1036. }
  1037. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1038. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1039. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1040. total_size);
  1041. if (ret < 0) {
  1042. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1043. ret);
  1044. ret = -1;
  1045. goto fail;
  1046. }
  1047. } else {
  1048. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1049. __func__,
  1050. remaining, resp->end_valid, resp->end);
  1051. ret = -1;
  1052. goto fail;
  1053. }
  1054. fail:
  1055. kfree(p_qdss_trace_data);
  1056. end:
  1057. kfree(req);
  1058. kfree(resp);
  1059. return ret;
  1060. }
  1061. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1062. char *filename, u32 filename_len)
  1063. {
  1064. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1065. char *debug_str = QDSS_DEBUG_FILE_STR;
  1066. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1067. plat_priv->device_id == MANGO_DEVICE_ID ||
  1068. plat_priv->device_id == PEACH_DEVICE_ID)
  1069. debug_str = "";
  1070. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1071. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1072. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1073. else
  1074. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1075. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1076. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1077. }
  1078. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1079. {
  1080. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1081. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1082. struct qmi_txn txn;
  1083. const struct firmware *fw_entry = NULL;
  1084. const u8 *temp;
  1085. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1086. unsigned int remaining;
  1087. int ret = 0;
  1088. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1089. plat_priv->driver_state);
  1090. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1091. if (!req)
  1092. return -ENOMEM;
  1093. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1094. if (!resp) {
  1095. kfree(req);
  1096. return -ENOMEM;
  1097. }
  1098. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1099. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1100. qdss_cfg_filename);
  1101. if (ret) {
  1102. cnss_pr_dbg("Unable to load %s\n",
  1103. qdss_cfg_filename);
  1104. goto err_req_fw;
  1105. }
  1106. temp = fw_entry->data;
  1107. remaining = fw_entry->size;
  1108. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1109. qdss_cfg_filename, remaining);
  1110. while (remaining) {
  1111. req->total_size_valid = 1;
  1112. req->total_size = remaining;
  1113. req->seg_id_valid = 1;
  1114. req->data_valid = 1;
  1115. req->end_valid = 1;
  1116. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1117. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1118. } else {
  1119. req->data_len = remaining;
  1120. req->end = 1;
  1121. }
  1122. memcpy(req->data, temp, req->data_len);
  1123. ret = qmi_txn_init
  1124. (&plat_priv->qmi_wlfw, &txn,
  1125. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1126. resp);
  1127. if (ret < 0) {
  1128. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1129. ret);
  1130. goto err_send;
  1131. }
  1132. ret = qmi_send_request
  1133. (&plat_priv->qmi_wlfw, NULL, &txn,
  1134. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1135. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1136. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1137. if (ret < 0) {
  1138. qmi_txn_cancel(&txn);
  1139. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1140. ret);
  1141. goto err_send;
  1142. }
  1143. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1144. if (ret < 0) {
  1145. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1146. ret);
  1147. goto err_send;
  1148. }
  1149. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1150. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1151. resp->resp.result, resp->resp.error);
  1152. ret = -resp->resp.result;
  1153. goto err_send;
  1154. }
  1155. remaining -= req->data_len;
  1156. temp += req->data_len;
  1157. req->seg_id++;
  1158. }
  1159. release_firmware(fw_entry);
  1160. kfree(req);
  1161. kfree(resp);
  1162. return 0;
  1163. err_send:
  1164. release_firmware(fw_entry);
  1165. err_req_fw:
  1166. kfree(req);
  1167. kfree(resp);
  1168. return ret;
  1169. }
  1170. static int wlfw_send_qdss_trace_mode_req
  1171. (struct cnss_plat_data *plat_priv,
  1172. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1173. unsigned long long option)
  1174. {
  1175. int rc = 0;
  1176. int tmp = 0;
  1177. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1178. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1179. struct qmi_txn txn;
  1180. if (!plat_priv)
  1181. return -ENODEV;
  1182. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1183. if (!req)
  1184. return -ENOMEM;
  1185. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1186. if (!resp) {
  1187. kfree(req);
  1188. return -ENOMEM;
  1189. }
  1190. req->mode_valid = 1;
  1191. req->mode = mode;
  1192. req->option_valid = 1;
  1193. req->option = option;
  1194. tmp = plat_priv->hw_trc_override;
  1195. req->hw_trc_disable_override_valid = 1;
  1196. req->hw_trc_disable_override =
  1197. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1198. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1199. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1200. __func__, mode, option, req->hw_trc_disable_override);
  1201. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1202. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1203. if (rc < 0) {
  1204. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1205. rc);
  1206. goto out;
  1207. }
  1208. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1209. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1210. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1211. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1212. if (rc < 0) {
  1213. qmi_txn_cancel(&txn);
  1214. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1215. goto out;
  1216. }
  1217. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1218. if (rc < 0) {
  1219. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1220. rc);
  1221. goto out;
  1222. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1223. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1224. resp->resp.result, resp->resp.error);
  1225. rc = -resp->resp.result;
  1226. goto out;
  1227. }
  1228. kfree(resp);
  1229. kfree(req);
  1230. return rc;
  1231. out:
  1232. kfree(resp);
  1233. kfree(req);
  1234. CNSS_QMI_ASSERT();
  1235. return rc;
  1236. }
  1237. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1238. {
  1239. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1240. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1241. }
  1242. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1243. {
  1244. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1245. option);
  1246. }
  1247. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1248. enum cnss_driver_mode mode)
  1249. {
  1250. struct wlfw_wlan_mode_req_msg_v01 *req;
  1251. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1252. struct qmi_txn txn;
  1253. int ret = 0;
  1254. if (!plat_priv)
  1255. return -ENODEV;
  1256. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1257. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1258. if (mode == CNSS_OFF &&
  1259. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1260. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1261. return 0;
  1262. }
  1263. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1264. if (!req)
  1265. return -ENOMEM;
  1266. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1267. if (!resp) {
  1268. kfree(req);
  1269. return -ENOMEM;
  1270. }
  1271. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1272. req->hw_debug_valid = 1;
  1273. req->hw_debug = 0;
  1274. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1275. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1276. if (ret < 0) {
  1277. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1278. cnss_qmi_mode_to_str(mode), mode, ret);
  1279. goto out;
  1280. }
  1281. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1282. QMI_WLFW_WLAN_MODE_REQ_V01,
  1283. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1284. wlfw_wlan_mode_req_msg_v01_ei, req);
  1285. if (ret < 0) {
  1286. qmi_txn_cancel(&txn);
  1287. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1288. cnss_qmi_mode_to_str(mode), mode, ret);
  1289. goto out;
  1290. }
  1291. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1292. if (ret < 0) {
  1293. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1294. cnss_qmi_mode_to_str(mode), mode, ret);
  1295. goto out;
  1296. }
  1297. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1298. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1299. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1300. resp->resp.error);
  1301. ret = -resp->resp.result;
  1302. goto out;
  1303. }
  1304. kfree(req);
  1305. kfree(resp);
  1306. return 0;
  1307. out:
  1308. if (mode == CNSS_OFF) {
  1309. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1310. ret = 0;
  1311. } else {
  1312. CNSS_QMI_ASSERT();
  1313. }
  1314. kfree(req);
  1315. kfree(resp);
  1316. return ret;
  1317. }
  1318. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1319. struct cnss_wlan_enable_cfg *config,
  1320. const char *host_version)
  1321. {
  1322. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1323. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1324. struct qmi_txn txn;
  1325. u32 i;
  1326. int ret = 0;
  1327. if (!plat_priv)
  1328. return -ENODEV;
  1329. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1330. plat_priv->driver_state);
  1331. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1332. if (!req)
  1333. return -ENOMEM;
  1334. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1335. if (!resp) {
  1336. kfree(req);
  1337. return -ENOMEM;
  1338. }
  1339. req->host_version_valid = 1;
  1340. strlcpy(req->host_version, host_version,
  1341. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1342. req->tgt_cfg_valid = 1;
  1343. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1344. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1345. else
  1346. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1347. for (i = 0; i < req->tgt_cfg_len; i++) {
  1348. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1349. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1350. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1351. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1352. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1353. }
  1354. req->svc_cfg_valid = 1;
  1355. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1356. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1357. else
  1358. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1359. for (i = 0; i < req->svc_cfg_len; i++) {
  1360. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1361. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1362. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1363. }
  1364. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1365. plat_priv->device_id != MANGO_DEVICE_ID &&
  1366. plat_priv->device_id != PEACH_DEVICE_ID) {
  1367. req->shadow_reg_v2_valid = 1;
  1368. if (config->num_shadow_reg_v2_cfg >
  1369. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1370. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1371. else
  1372. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1373. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1374. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1375. * req->shadow_reg_v2_len);
  1376. } else {
  1377. req->shadow_reg_v3_valid = 1;
  1378. if (config->num_shadow_reg_v3_cfg >
  1379. MAX_NUM_SHADOW_REG_V3)
  1380. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1381. else
  1382. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1383. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1384. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1385. plat_priv->num_shadow_regs_v3);
  1386. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1387. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1388. * req->shadow_reg_v3_len);
  1389. }
  1390. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1391. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1392. if (ret < 0) {
  1393. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1394. ret);
  1395. goto out;
  1396. }
  1397. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1398. QMI_WLFW_WLAN_CFG_REQ_V01,
  1399. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1400. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1401. if (ret < 0) {
  1402. qmi_txn_cancel(&txn);
  1403. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1404. ret);
  1405. goto out;
  1406. }
  1407. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1408. if (ret < 0) {
  1409. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1410. ret);
  1411. goto out;
  1412. }
  1413. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1414. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1415. resp->resp.result, resp->resp.error);
  1416. ret = -resp->resp.result;
  1417. goto out;
  1418. }
  1419. kfree(req);
  1420. kfree(resp);
  1421. return 0;
  1422. out:
  1423. CNSS_QMI_ASSERT();
  1424. kfree(req);
  1425. kfree(resp);
  1426. return ret;
  1427. }
  1428. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1429. u32 offset, u32 mem_type,
  1430. u32 data_len, u8 *data)
  1431. {
  1432. struct wlfw_athdiag_read_req_msg_v01 *req;
  1433. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1434. struct qmi_txn txn;
  1435. int ret = 0;
  1436. if (!plat_priv)
  1437. return -ENODEV;
  1438. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1439. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1440. data, data_len);
  1441. return -EINVAL;
  1442. }
  1443. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1444. plat_priv->driver_state, offset, mem_type, data_len);
  1445. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1446. if (!req)
  1447. return -ENOMEM;
  1448. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1449. if (!resp) {
  1450. kfree(req);
  1451. return -ENOMEM;
  1452. }
  1453. req->offset = offset;
  1454. req->mem_type = mem_type;
  1455. req->data_len = data_len;
  1456. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1457. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1458. if (ret < 0) {
  1459. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1460. ret);
  1461. goto out;
  1462. }
  1463. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1464. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1465. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1466. wlfw_athdiag_read_req_msg_v01_ei, req);
  1467. if (ret < 0) {
  1468. qmi_txn_cancel(&txn);
  1469. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1470. ret);
  1471. goto out;
  1472. }
  1473. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1474. if (ret < 0) {
  1475. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1476. ret);
  1477. goto out;
  1478. }
  1479. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1480. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1481. resp->resp.result, resp->resp.error);
  1482. ret = -resp->resp.result;
  1483. goto out;
  1484. }
  1485. if (!resp->data_valid || resp->data_len != data_len) {
  1486. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1487. resp->data_valid, resp->data_len);
  1488. ret = -EINVAL;
  1489. goto out;
  1490. }
  1491. memcpy(data, resp->data, resp->data_len);
  1492. kfree(req);
  1493. kfree(resp);
  1494. return 0;
  1495. out:
  1496. kfree(req);
  1497. kfree(resp);
  1498. return ret;
  1499. }
  1500. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1501. u32 offset, u32 mem_type,
  1502. u32 data_len, u8 *data)
  1503. {
  1504. struct wlfw_athdiag_write_req_msg_v01 *req;
  1505. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1506. struct qmi_txn txn;
  1507. int ret = 0;
  1508. if (!plat_priv)
  1509. return -ENODEV;
  1510. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1511. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1512. data, data_len);
  1513. return -EINVAL;
  1514. }
  1515. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1516. plat_priv->driver_state, offset, mem_type, data_len, data);
  1517. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1518. if (!req)
  1519. return -ENOMEM;
  1520. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1521. if (!resp) {
  1522. kfree(req);
  1523. return -ENOMEM;
  1524. }
  1525. req->offset = offset;
  1526. req->mem_type = mem_type;
  1527. req->data_len = data_len;
  1528. memcpy(req->data, data, data_len);
  1529. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1530. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1531. if (ret < 0) {
  1532. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1533. ret);
  1534. goto out;
  1535. }
  1536. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1537. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1538. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1539. wlfw_athdiag_write_req_msg_v01_ei, req);
  1540. if (ret < 0) {
  1541. qmi_txn_cancel(&txn);
  1542. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1543. ret);
  1544. goto out;
  1545. }
  1546. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1547. if (ret < 0) {
  1548. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1549. ret);
  1550. goto out;
  1551. }
  1552. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1553. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1554. resp->resp.result, resp->resp.error);
  1555. ret = -resp->resp.result;
  1556. goto out;
  1557. }
  1558. kfree(req);
  1559. kfree(resp);
  1560. return 0;
  1561. out:
  1562. kfree(req);
  1563. kfree(resp);
  1564. return ret;
  1565. }
  1566. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1567. u8 fw_log_mode)
  1568. {
  1569. struct wlfw_ini_req_msg_v01 *req;
  1570. struct wlfw_ini_resp_msg_v01 *resp;
  1571. struct qmi_txn txn;
  1572. int ret = 0;
  1573. if (!plat_priv)
  1574. return -ENODEV;
  1575. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1576. plat_priv->driver_state, fw_log_mode);
  1577. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1578. if (!req)
  1579. return -ENOMEM;
  1580. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1581. if (!resp) {
  1582. kfree(req);
  1583. return -ENOMEM;
  1584. }
  1585. req->enablefwlog_valid = 1;
  1586. req->enablefwlog = fw_log_mode;
  1587. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1588. wlfw_ini_resp_msg_v01_ei, resp);
  1589. if (ret < 0) {
  1590. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1591. fw_log_mode, ret);
  1592. goto out;
  1593. }
  1594. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1595. QMI_WLFW_INI_REQ_V01,
  1596. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1597. wlfw_ini_req_msg_v01_ei, req);
  1598. if (ret < 0) {
  1599. qmi_txn_cancel(&txn);
  1600. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1601. fw_log_mode, ret);
  1602. goto out;
  1603. }
  1604. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1605. if (ret < 0) {
  1606. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1607. fw_log_mode, ret);
  1608. goto out;
  1609. }
  1610. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1611. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1612. fw_log_mode, resp->resp.result, resp->resp.error);
  1613. ret = -resp->resp.result;
  1614. goto out;
  1615. }
  1616. kfree(req);
  1617. kfree(resp);
  1618. return 0;
  1619. out:
  1620. kfree(req);
  1621. kfree(resp);
  1622. return ret;
  1623. }
  1624. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1625. {
  1626. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1627. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1628. struct qmi_txn txn;
  1629. int ret = 0;
  1630. if (!plat_priv)
  1631. return -ENODEV;
  1632. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1633. !plat_priv->fw_pcie_gen_switch) {
  1634. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1635. return 0;
  1636. }
  1637. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1638. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1639. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1640. plat_priv->pcie_gen_speed;
  1641. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1642. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1643. if (ret < 0) {
  1644. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1645. ret);
  1646. goto out;
  1647. }
  1648. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1649. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1650. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1651. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1652. if (ret < 0) {
  1653. qmi_txn_cancel(&txn);
  1654. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1655. goto out;
  1656. }
  1657. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1658. if (ret < 0) {
  1659. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1660. ret);
  1661. goto out;
  1662. }
  1663. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1664. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1665. plat_priv->pcie_gen_speed, resp.resp.result,
  1666. resp.resp.error);
  1667. ret = -resp.resp.result;
  1668. }
  1669. out:
  1670. /* Reset PCIE Gen speed after one time use */
  1671. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1672. return ret;
  1673. }
  1674. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1675. {
  1676. struct wlfw_antenna_switch_req_msg_v01 *req;
  1677. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1678. struct qmi_txn txn;
  1679. int ret = 0;
  1680. if (!plat_priv)
  1681. return -ENODEV;
  1682. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1683. plat_priv->driver_state);
  1684. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1685. if (!req)
  1686. return -ENOMEM;
  1687. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1688. if (!resp) {
  1689. kfree(req);
  1690. return -ENOMEM;
  1691. }
  1692. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1693. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1694. if (ret < 0) {
  1695. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1696. ret);
  1697. goto out;
  1698. }
  1699. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1700. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1701. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1702. wlfw_antenna_switch_req_msg_v01_ei, req);
  1703. if (ret < 0) {
  1704. qmi_txn_cancel(&txn);
  1705. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1706. ret);
  1707. goto out;
  1708. }
  1709. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1710. if (ret < 0) {
  1711. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1712. ret);
  1713. goto out;
  1714. }
  1715. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1716. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1717. resp->resp.result, resp->resp.error);
  1718. ret = -resp->resp.result;
  1719. goto out;
  1720. }
  1721. if (resp->antenna_valid)
  1722. plat_priv->antenna = resp->antenna;
  1723. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1724. resp->antenna_valid, resp->antenna);
  1725. kfree(req);
  1726. kfree(resp);
  1727. return 0;
  1728. out:
  1729. kfree(req);
  1730. kfree(resp);
  1731. return ret;
  1732. }
  1733. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1734. {
  1735. struct wlfw_antenna_grant_req_msg_v01 *req;
  1736. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1737. struct qmi_txn txn;
  1738. int ret = 0;
  1739. if (!plat_priv)
  1740. return -ENODEV;
  1741. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1742. plat_priv->driver_state, plat_priv->grant);
  1743. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1744. if (!req)
  1745. return -ENOMEM;
  1746. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1747. if (!resp) {
  1748. kfree(req);
  1749. return -ENOMEM;
  1750. }
  1751. req->grant_valid = 1;
  1752. req->grant = plat_priv->grant;
  1753. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1754. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1755. if (ret < 0) {
  1756. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1757. ret);
  1758. goto out;
  1759. }
  1760. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1761. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1762. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1763. wlfw_antenna_grant_req_msg_v01_ei, req);
  1764. if (ret < 0) {
  1765. qmi_txn_cancel(&txn);
  1766. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1767. ret);
  1768. goto out;
  1769. }
  1770. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1771. if (ret < 0) {
  1772. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1773. ret);
  1774. goto out;
  1775. }
  1776. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1777. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1778. resp->resp.result, resp->resp.error);
  1779. ret = -resp->resp.result;
  1780. goto out;
  1781. }
  1782. kfree(req);
  1783. kfree(resp);
  1784. return 0;
  1785. out:
  1786. kfree(req);
  1787. kfree(resp);
  1788. return ret;
  1789. }
  1790. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1791. {
  1792. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1793. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1794. struct qmi_txn txn;
  1795. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1796. int ret = 0;
  1797. int i;
  1798. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1799. plat_priv->driver_state);
  1800. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1801. if (!req)
  1802. return -ENOMEM;
  1803. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1804. if (!resp) {
  1805. kfree(req);
  1806. return -ENOMEM;
  1807. }
  1808. if (plat_priv->qdss_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  1809. cnss_pr_err("Invalid seg len %u\n", plat_priv->qdss_mem_seg_len);
  1810. ret = -EINVAL;
  1811. goto out;
  1812. }
  1813. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1814. for (i = 0; i < req->mem_seg_len; i++) {
  1815. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1816. qdss_mem[i].va, &qdss_mem[i].pa,
  1817. qdss_mem[i].size, qdss_mem[i].type);
  1818. req->mem_seg[i].addr = qdss_mem[i].pa;
  1819. req->mem_seg[i].size = qdss_mem[i].size;
  1820. req->mem_seg[i].type = qdss_mem[i].type;
  1821. }
  1822. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1823. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1824. if (ret < 0) {
  1825. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1826. ret);
  1827. goto out;
  1828. }
  1829. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1830. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1831. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1832. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1833. if (ret < 0) {
  1834. qmi_txn_cancel(&txn);
  1835. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1836. ret);
  1837. goto out;
  1838. }
  1839. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1840. if (ret < 0) {
  1841. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1842. ret);
  1843. goto out;
  1844. }
  1845. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1846. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1847. resp->resp.result, resp->resp.error);
  1848. ret = -resp->resp.result;
  1849. goto out;
  1850. }
  1851. kfree(req);
  1852. kfree(resp);
  1853. return 0;
  1854. out:
  1855. kfree(req);
  1856. kfree(resp);
  1857. return ret;
  1858. }
  1859. int cnss_wlfw_send_host_wfc_call_status(struct cnss_plat_data *plat_priv,
  1860. struct cnss_wfc_cfg cfg)
  1861. {
  1862. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1863. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1864. struct qmi_txn txn;
  1865. int ret = 0;
  1866. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1867. cnss_pr_err("Drop host WFC indication as FW not initialized\n");
  1868. return -EINVAL;
  1869. }
  1870. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1871. if (!req)
  1872. return -ENOMEM;
  1873. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1874. if (!resp) {
  1875. kfree(req);
  1876. return -ENOMEM;
  1877. }
  1878. req->wfc_call_active_valid = 1;
  1879. req->wfc_call_active = cfg.mode;
  1880. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1881. plat_priv->driver_state);
  1882. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1883. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1884. if (ret < 0) {
  1885. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1886. ret);
  1887. goto out;
  1888. }
  1889. cnss_pr_dbg("Send WFC Mode: %d\n", cfg.mode);
  1890. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1891. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1892. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1893. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1894. if (ret < 0) {
  1895. qmi_txn_cancel(&txn);
  1896. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1897. ret);
  1898. goto out;
  1899. }
  1900. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1901. if (ret < 0) {
  1902. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1903. ret);
  1904. goto out;
  1905. }
  1906. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1907. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1908. resp->resp.result, resp->resp.error);
  1909. ret = -EINVAL;
  1910. goto out;
  1911. }
  1912. ret = 0;
  1913. out:
  1914. kfree(req);
  1915. kfree(resp);
  1916. return ret;
  1917. }
  1918. static int cnss_wlfw_wfc_call_status_send_sync
  1919. (struct cnss_plat_data *plat_priv,
  1920. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1921. {
  1922. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1923. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1924. struct qmi_txn txn;
  1925. int ret = 0;
  1926. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1927. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1928. return -EINVAL;
  1929. }
  1930. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1931. if (!req)
  1932. return -ENOMEM;
  1933. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1934. if (!resp) {
  1935. kfree(req);
  1936. return -ENOMEM;
  1937. }
  1938. /**
  1939. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1940. * But in r2 update QMI structure is expanded and as an effect qmi
  1941. * decoded structures have padding. Thus we cannot use buffer design.
  1942. * For backward compatibility for r1 design copy only wfc_call_active
  1943. * value in hex buffer.
  1944. */
  1945. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1946. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1947. /* wfc_call_active is mandatory in IMS indication */
  1948. req->wfc_call_active_valid = 1;
  1949. req->wfc_call_active = ind_msg->wfc_call_active;
  1950. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1951. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1952. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1953. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1954. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1955. req->twt_ims_start = ind_msg->twt_ims_start;
  1956. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1957. req->twt_ims_int = ind_msg->twt_ims_int;
  1958. req->media_quality_valid = ind_msg->media_quality_valid;
  1959. req->media_quality =
  1960. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1961. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1962. plat_priv->driver_state);
  1963. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1964. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1965. if (ret < 0) {
  1966. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1967. ret);
  1968. goto out;
  1969. }
  1970. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1971. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1972. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1973. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1974. if (ret < 0) {
  1975. qmi_txn_cancel(&txn);
  1976. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1977. ret);
  1978. goto out;
  1979. }
  1980. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1981. if (ret < 0) {
  1982. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1983. ret);
  1984. goto out;
  1985. }
  1986. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1987. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1988. resp->resp.result, resp->resp.error);
  1989. ret = -resp->resp.result;
  1990. goto out;
  1991. }
  1992. ret = 0;
  1993. out:
  1994. kfree(req);
  1995. kfree(resp);
  1996. return ret;
  1997. }
  1998. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1999. {
  2000. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  2001. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  2002. struct qmi_txn txn;
  2003. int ret = 0;
  2004. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  2005. plat_priv->dynamic_feature,
  2006. plat_priv->driver_state);
  2007. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2008. if (!req)
  2009. return -ENOMEM;
  2010. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2011. if (!resp) {
  2012. kfree(req);
  2013. return -ENOMEM;
  2014. }
  2015. req->mask_valid = 1;
  2016. req->mask = plat_priv->dynamic_feature;
  2017. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2018. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  2019. if (ret < 0) {
  2020. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  2021. ret);
  2022. goto out;
  2023. }
  2024. ret = qmi_send_request
  2025. (&plat_priv->qmi_wlfw, NULL, &txn,
  2026. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  2027. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  2028. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  2029. if (ret < 0) {
  2030. qmi_txn_cancel(&txn);
  2031. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  2032. ret);
  2033. goto out;
  2034. }
  2035. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2036. if (ret < 0) {
  2037. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  2038. ret);
  2039. goto out;
  2040. }
  2041. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2042. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  2043. resp->resp.result, resp->resp.error);
  2044. ret = -resp->resp.result;
  2045. goto out;
  2046. }
  2047. out:
  2048. kfree(req);
  2049. kfree(resp);
  2050. return ret;
  2051. }
  2052. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  2053. void *cmd, int cmd_len)
  2054. {
  2055. struct wlfw_get_info_req_msg_v01 *req;
  2056. struct wlfw_get_info_resp_msg_v01 *resp;
  2057. struct qmi_txn txn;
  2058. int ret = 0;
  2059. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  2060. type, cmd_len, plat_priv->driver_state);
  2061. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  2062. return -EINVAL;
  2063. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2064. if (!req)
  2065. return -ENOMEM;
  2066. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2067. if (!resp) {
  2068. kfree(req);
  2069. return -ENOMEM;
  2070. }
  2071. req->type = type;
  2072. req->data_len = cmd_len;
  2073. memcpy(req->data, cmd, req->data_len);
  2074. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2075. wlfw_get_info_resp_msg_v01_ei, resp);
  2076. if (ret < 0) {
  2077. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2078. ret);
  2079. goto out;
  2080. }
  2081. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2082. QMI_WLFW_GET_INFO_REQ_V01,
  2083. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2084. wlfw_get_info_req_msg_v01_ei, req);
  2085. if (ret < 0) {
  2086. qmi_txn_cancel(&txn);
  2087. cnss_pr_err("Failed to send get info request, err: %d\n",
  2088. ret);
  2089. goto out;
  2090. }
  2091. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2092. if (ret < 0) {
  2093. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2094. ret);
  2095. goto out;
  2096. }
  2097. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2098. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2099. resp->resp.result, resp->resp.error);
  2100. ret = -resp->resp.result;
  2101. goto out;
  2102. }
  2103. kfree(req);
  2104. kfree(resp);
  2105. return 0;
  2106. out:
  2107. kfree(req);
  2108. kfree(resp);
  2109. return ret;
  2110. }
  2111. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2112. {
  2113. return QMI_WLFW_TIMEOUT_MS;
  2114. }
  2115. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2116. struct sockaddr_qrtr *sq,
  2117. struct qmi_txn *txn, const void *data)
  2118. {
  2119. struct cnss_plat_data *plat_priv =
  2120. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2121. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2122. int i;
  2123. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2124. if (!txn) {
  2125. cnss_pr_err("Spurious indication\n");
  2126. return;
  2127. }
  2128. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2129. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2130. return;
  2131. }
  2132. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2133. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2134. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2135. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2136. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2137. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2138. if (!plat_priv->fw_mem[i].va &&
  2139. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2140. plat_priv->fw_mem[i].attrs |=
  2141. DMA_ATTR_FORCE_CONTIGUOUS;
  2142. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2143. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2144. }
  2145. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2146. 0, NULL);
  2147. }
  2148. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2149. struct sockaddr_qrtr *sq,
  2150. struct qmi_txn *txn, const void *data)
  2151. {
  2152. struct cnss_plat_data *plat_priv =
  2153. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2154. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2155. if (!txn) {
  2156. cnss_pr_err("Spurious indication\n");
  2157. return;
  2158. }
  2159. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2160. 0, NULL);
  2161. }
  2162. /**
  2163. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2164. *
  2165. * This event is not required for HST/ HSP as FW calibration done is
  2166. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2167. */
  2168. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2169. struct sockaddr_qrtr *sq,
  2170. struct qmi_txn *txn, const void *data)
  2171. {
  2172. struct cnss_plat_data *plat_priv =
  2173. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2174. struct cnss_cal_info *cal_info;
  2175. if (!txn) {
  2176. cnss_pr_err("Spurious indication\n");
  2177. return;
  2178. }
  2179. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2180. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2181. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2182. return;
  2183. }
  2184. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2185. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2186. if (!cal_info)
  2187. return;
  2188. cal_info->cal_status = CNSS_CAL_DONE;
  2189. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2190. 0, cal_info);
  2191. }
  2192. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2193. struct sockaddr_qrtr *sq,
  2194. struct qmi_txn *txn, const void *data)
  2195. {
  2196. struct cnss_plat_data *plat_priv =
  2197. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2198. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2199. if (!txn) {
  2200. cnss_pr_err("Spurious indication\n");
  2201. return;
  2202. }
  2203. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2204. }
  2205. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2206. struct sockaddr_qrtr *sq,
  2207. struct qmi_txn *txn, const void *data)
  2208. {
  2209. struct cnss_plat_data *plat_priv =
  2210. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2211. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2212. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2213. if (!txn) {
  2214. cnss_pr_err("Spurious indication\n");
  2215. return;
  2216. }
  2217. if (ind_msg->pwr_pin_result_valid)
  2218. plat_priv->pin_result.fw_pwr_pin_result =
  2219. ind_msg->pwr_pin_result;
  2220. if (ind_msg->phy_io_pin_result_valid)
  2221. plat_priv->pin_result.fw_phy_io_pin_result =
  2222. ind_msg->phy_io_pin_result;
  2223. if (ind_msg->rf_pin_result_valid)
  2224. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2225. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2226. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2227. ind_msg->rf_pin_result);
  2228. }
  2229. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2230. u32 cal_file_download_size)
  2231. {
  2232. struct wlfw_cal_report_req_msg_v01 req = {0};
  2233. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2234. struct qmi_txn txn;
  2235. int ret = 0;
  2236. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2237. cal_file_download_size, plat_priv->driver_state);
  2238. req.cal_file_download_size_valid = 1;
  2239. req.cal_file_download_size = cal_file_download_size;
  2240. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2241. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2242. if (ret < 0) {
  2243. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2244. ret);
  2245. goto out;
  2246. }
  2247. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2248. QMI_WLFW_CAL_REPORT_REQ_V01,
  2249. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2250. wlfw_cal_report_req_msg_v01_ei, &req);
  2251. if (ret < 0) {
  2252. qmi_txn_cancel(&txn);
  2253. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2254. ret);
  2255. goto out;
  2256. }
  2257. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2258. if (ret < 0) {
  2259. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2260. ret);
  2261. goto out;
  2262. }
  2263. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2264. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2265. resp.resp.result, resp.resp.error);
  2266. ret = -resp.resp.result;
  2267. goto out;
  2268. }
  2269. out:
  2270. return ret;
  2271. }
  2272. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2273. struct sockaddr_qrtr *sq,
  2274. struct qmi_txn *txn, const void *data)
  2275. {
  2276. struct cnss_plat_data *plat_priv =
  2277. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2278. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2279. struct cnss_cal_info *cal_info;
  2280. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2281. ind->cal_file_upload_size);
  2282. cnss_pr_info("Calibration took %d ms\n",
  2283. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2284. if (!txn) {
  2285. cnss_pr_err("Spurious indication\n");
  2286. return;
  2287. }
  2288. if (ind->cal_file_upload_size_valid)
  2289. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2290. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2291. if (!cal_info)
  2292. return;
  2293. cal_info->cal_status = CNSS_CAL_DONE;
  2294. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2295. 0, cal_info);
  2296. }
  2297. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2298. struct sockaddr_qrtr *sq,
  2299. struct qmi_txn *txn,
  2300. const void *data)
  2301. {
  2302. struct cnss_plat_data *plat_priv =
  2303. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2304. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2305. int i;
  2306. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2307. if (!txn) {
  2308. cnss_pr_err("Spurious indication\n");
  2309. return;
  2310. }
  2311. if (plat_priv->qdss_mem_seg_len) {
  2312. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2313. plat_priv->qdss_mem_seg_len);
  2314. return;
  2315. }
  2316. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2317. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2318. return;
  2319. }
  2320. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2321. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2322. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2323. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2324. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2325. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2326. }
  2327. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2328. 0, NULL);
  2329. }
  2330. /**
  2331. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2332. *
  2333. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2334. * fw memory segment for dumping to file system. Only one type of mem can be
  2335. * saved per indication and is provided in mem seg index 0.
  2336. *
  2337. * Return: None
  2338. */
  2339. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2340. struct sockaddr_qrtr *sq,
  2341. struct qmi_txn *txn,
  2342. const void *data)
  2343. {
  2344. struct cnss_plat_data *plat_priv =
  2345. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2346. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2347. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2348. int i = 0;
  2349. if (!txn || !data) {
  2350. cnss_pr_err("Spurious indication\n");
  2351. return;
  2352. }
  2353. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2354. ind_msg->source, ind_msg->mem_seg_valid,
  2355. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2356. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2357. if (!event_data)
  2358. return;
  2359. event_data->mem_type = ind_msg->mem_seg[0].type;
  2360. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2361. event_data->total_size = ind_msg->total_size;
  2362. if (ind_msg->mem_seg_valid) {
  2363. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2364. cnss_pr_err("Invalid seg len indication\n");
  2365. goto free_event_data;
  2366. }
  2367. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2368. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2369. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2370. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2371. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2372. goto free_event_data;
  2373. }
  2374. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2375. i, ind_msg->mem_seg[i].addr,
  2376. ind_msg->mem_seg[i].size);
  2377. }
  2378. }
  2379. if (ind_msg->file_name_valid)
  2380. strlcpy(event_data->file_name, ind_msg->file_name,
  2381. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2382. if (ind_msg->source == 1) {
  2383. if (!ind_msg->file_name_valid)
  2384. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2385. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2386. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2387. 0, event_data);
  2388. } else {
  2389. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2390. if (!ind_msg->file_name_valid)
  2391. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2392. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2393. } else {
  2394. if (!ind_msg->file_name_valid)
  2395. strlcpy(event_data->file_name, "fw_mem_dump",
  2396. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2397. }
  2398. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2399. 0, event_data);
  2400. }
  2401. return;
  2402. free_event_data:
  2403. kfree(event_data);
  2404. }
  2405. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2406. struct sockaddr_qrtr *sq,
  2407. struct qmi_txn *txn,
  2408. const void *data)
  2409. {
  2410. struct cnss_plat_data *plat_priv =
  2411. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2412. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2413. 0, NULL);
  2414. }
  2415. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2416. struct sockaddr_qrtr *sq,
  2417. struct qmi_txn *txn,
  2418. const void *data)
  2419. {
  2420. struct cnss_plat_data *plat_priv =
  2421. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2422. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2423. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2424. if (!txn) {
  2425. cnss_pr_err("Spurious indication\n");
  2426. return;
  2427. }
  2428. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2429. ind_msg->data_len, ind_msg->type,
  2430. ind_msg->is_last, ind_msg->seq_no);
  2431. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2432. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2433. (void *)ind_msg->data,
  2434. ind_msg->data_len);
  2435. }
  2436. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2437. (struct cnss_plat_data *plat_priv,
  2438. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2439. {
  2440. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2441. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2442. struct qmi_txn txn;
  2443. int ret = 0;
  2444. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2445. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2446. return -EINVAL;
  2447. }
  2448. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2449. if (!req)
  2450. return -ENOMEM;
  2451. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2452. if (!resp) {
  2453. kfree(req);
  2454. return -ENOMEM;
  2455. }
  2456. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2457. req->twt_sta_start = ind_msg->twt_sta_start;
  2458. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2459. req->twt_sta_int = ind_msg->twt_sta_int;
  2460. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2461. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2462. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2463. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2464. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2465. req->twt_sta_dl = req->twt_sta_dl;
  2466. req->twt_sta_config_changed_valid =
  2467. ind_msg->twt_sta_config_changed_valid;
  2468. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2469. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2470. plat_priv->driver_state);
  2471. ret =
  2472. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2473. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2474. resp);
  2475. if (ret < 0) {
  2476. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2477. ret);
  2478. goto out;
  2479. }
  2480. ret =
  2481. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2482. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2483. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2484. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2485. if (ret < 0) {
  2486. qmi_txn_cancel(&txn);
  2487. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2488. goto out;
  2489. }
  2490. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2491. if (ret < 0) {
  2492. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2493. goto out;
  2494. }
  2495. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2496. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2497. resp->resp.result, resp->resp.error);
  2498. ret = -resp->resp.result;
  2499. goto out;
  2500. }
  2501. ret = 0;
  2502. out:
  2503. kfree(req);
  2504. kfree(resp);
  2505. return ret;
  2506. }
  2507. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2508. void *data)
  2509. {
  2510. int ret;
  2511. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2512. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2513. kfree(data);
  2514. return ret;
  2515. }
  2516. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2517. struct sockaddr_qrtr *sq,
  2518. struct qmi_txn *txn,
  2519. const void *data)
  2520. {
  2521. struct cnss_plat_data *plat_priv =
  2522. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2523. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2524. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2525. if (!txn) {
  2526. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2527. return;
  2528. }
  2529. if (!ind_msg) {
  2530. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2531. return;
  2532. }
  2533. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2534. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2535. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2536. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2537. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2538. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2539. ind_msg->twt_sta_config_changed_valid,
  2540. ind_msg->twt_sta_config_changed);
  2541. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2542. if (!event_data)
  2543. return;
  2544. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2545. event_data);
  2546. }
  2547. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2548. {
  2549. .type = QMI_INDICATION,
  2550. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2551. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2552. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2553. .fn = cnss_wlfw_request_mem_ind_cb
  2554. },
  2555. {
  2556. .type = QMI_INDICATION,
  2557. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2558. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2559. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2560. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2561. },
  2562. {
  2563. .type = QMI_INDICATION,
  2564. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2565. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2566. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2567. .fn = cnss_wlfw_fw_ready_ind_cb
  2568. },
  2569. {
  2570. .type = QMI_INDICATION,
  2571. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2572. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2573. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2574. .fn = cnss_wlfw_fw_init_done_ind_cb
  2575. },
  2576. {
  2577. .type = QMI_INDICATION,
  2578. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2579. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2580. .decoded_size =
  2581. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2582. .fn = cnss_wlfw_pin_result_ind_cb
  2583. },
  2584. {
  2585. .type = QMI_INDICATION,
  2586. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2587. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2588. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2589. .fn = cnss_wlfw_cal_done_ind_cb
  2590. },
  2591. {
  2592. .type = QMI_INDICATION,
  2593. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2594. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2595. .decoded_size =
  2596. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2597. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2598. },
  2599. {
  2600. .type = QMI_INDICATION,
  2601. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2602. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2603. .decoded_size =
  2604. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2605. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2606. },
  2607. {
  2608. .type = QMI_INDICATION,
  2609. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2610. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2611. .decoded_size =
  2612. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2613. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2614. },
  2615. {
  2616. .type = QMI_INDICATION,
  2617. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2618. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2619. .decoded_size =
  2620. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2621. .fn = cnss_wlfw_respond_get_info_ind_cb
  2622. },
  2623. {
  2624. .type = QMI_INDICATION,
  2625. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2626. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2627. .decoded_size =
  2628. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2629. .fn = cnss_wlfw_process_twt_cfg_ind
  2630. },
  2631. {}
  2632. };
  2633. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2634. void *data)
  2635. {
  2636. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2637. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2638. struct sockaddr_qrtr sq = { 0 };
  2639. int ret = 0;
  2640. if (!event_data)
  2641. return -EINVAL;
  2642. sq.sq_family = AF_QIPCRTR;
  2643. sq.sq_node = event_data->node;
  2644. sq.sq_port = event_data->port;
  2645. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2646. sizeof(sq), 0);
  2647. if (ret < 0) {
  2648. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2649. goto out;
  2650. }
  2651. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2652. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2653. plat_priv->driver_state);
  2654. kfree(data);
  2655. return 0;
  2656. out:
  2657. CNSS_QMI_ASSERT();
  2658. kfree(data);
  2659. return ret;
  2660. }
  2661. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2662. {
  2663. int ret = 0;
  2664. if (!plat_priv)
  2665. return -ENODEV;
  2666. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2667. cnss_pr_err("Unexpected WLFW server arrive\n");
  2668. CNSS_ASSERT(0);
  2669. return -EINVAL;
  2670. }
  2671. cnss_ignore_qmi_failure(false);
  2672. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2673. if (ret < 0)
  2674. goto out;
  2675. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2676. if (ret < 0) {
  2677. if (ret == -EALREADY)
  2678. ret = 0;
  2679. goto out;
  2680. }
  2681. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2682. if (ret < 0)
  2683. goto out;
  2684. return 0;
  2685. out:
  2686. return ret;
  2687. }
  2688. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2689. {
  2690. int ret;
  2691. if (!plat_priv)
  2692. return -ENODEV;
  2693. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2694. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2695. plat_priv->driver_state);
  2696. cnss_qmi_deinit(plat_priv);
  2697. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2698. ret = cnss_qmi_init(plat_priv);
  2699. if (ret < 0) {
  2700. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2701. CNSS_ASSERT(0);
  2702. }
  2703. return 0;
  2704. }
  2705. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2706. struct qmi_service *service)
  2707. {
  2708. struct cnss_plat_data *plat_priv =
  2709. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2710. struct cnss_qmi_event_server_arrive_data *event_data;
  2711. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2712. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2713. plat_priv->driver_state);
  2714. return 0;
  2715. }
  2716. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2717. service->node, service->port);
  2718. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2719. if (!event_data)
  2720. return -ENOMEM;
  2721. event_data->node = service->node;
  2722. event_data->port = service->port;
  2723. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2724. 0, event_data);
  2725. return 0;
  2726. }
  2727. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2728. struct qmi_service *service)
  2729. {
  2730. struct cnss_plat_data *plat_priv =
  2731. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2732. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2733. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2734. plat_priv->driver_state);
  2735. return;
  2736. }
  2737. cnss_pr_dbg("WLFW server exiting\n");
  2738. if (plat_priv) {
  2739. cnss_ignore_qmi_failure(true);
  2740. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2741. }
  2742. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2743. 0, NULL);
  2744. }
  2745. static struct qmi_ops qmi_wlfw_ops = {
  2746. .new_server = wlfw_new_server,
  2747. .del_server = wlfw_del_server,
  2748. };
  2749. static int cnss_qmi_add_lookup(struct cnss_plat_data *plat_priv)
  2750. {
  2751. unsigned int id = WLFW_SERVICE_INS_ID_V01;
  2752. /* In order to support dual wlan card attach case,
  2753. * need separate qmi service instance id for each dev
  2754. */
  2755. if (cnss_is_dual_wlan_enabled() && plat_priv->qrtr_node_id != 0 &&
  2756. plat_priv->wlfw_service_instance_id != 0)
  2757. id = plat_priv->wlfw_service_instance_id;
  2758. return qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2759. WLFW_SERVICE_VERS_V01, id);
  2760. }
  2761. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2762. {
  2763. int ret = 0;
  2764. cnss_get_qrtr_info(plat_priv);
  2765. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2766. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2767. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2768. if (ret < 0) {
  2769. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2770. ret);
  2771. goto out;
  2772. }
  2773. ret = cnss_qmi_add_lookup(plat_priv);
  2774. if (ret < 0)
  2775. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2776. out:
  2777. return ret;
  2778. }
  2779. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2780. {
  2781. qmi_handle_release(&plat_priv->qmi_wlfw);
  2782. }
  2783. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2784. {
  2785. struct dms_get_mac_address_req_msg_v01 req;
  2786. struct dms_get_mac_address_resp_msg_v01 resp;
  2787. struct qmi_txn txn;
  2788. int ret = 0;
  2789. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2790. cnss_pr_err("DMS QMI connection not established\n");
  2791. return -EINVAL;
  2792. }
  2793. cnss_pr_dbg("Requesting DMS MAC address");
  2794. memset(&resp, 0, sizeof(resp));
  2795. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2796. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2797. if (ret < 0) {
  2798. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2799. ret);
  2800. goto out;
  2801. }
  2802. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2803. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2804. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2805. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2806. dms_get_mac_address_req_msg_v01_ei, &req);
  2807. if (ret < 0) {
  2808. qmi_txn_cancel(&txn);
  2809. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2810. ret);
  2811. goto out;
  2812. }
  2813. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2814. if (ret < 0) {
  2815. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2816. ret);
  2817. goto out;
  2818. }
  2819. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2820. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2821. resp.resp.result, resp.resp.error);
  2822. ret = -resp.resp.result;
  2823. goto out;
  2824. }
  2825. if (!resp.mac_address_valid ||
  2826. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2827. cnss_pr_err("Invalid MAC address received from DMS\n");
  2828. plat_priv->dms.mac_valid = false;
  2829. goto out;
  2830. }
  2831. plat_priv->dms.mac_valid = true;
  2832. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2833. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2834. out:
  2835. return ret;
  2836. }
  2837. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2838. unsigned int node, unsigned int port)
  2839. {
  2840. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2841. struct sockaddr_qrtr sq = {0};
  2842. int ret = 0;
  2843. sq.sq_family = AF_QIPCRTR;
  2844. sq.sq_node = node;
  2845. sq.sq_port = port;
  2846. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2847. sizeof(sq), 0);
  2848. if (ret < 0) {
  2849. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2850. node, port);
  2851. goto out;
  2852. }
  2853. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2854. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2855. plat_priv->driver_state);
  2856. out:
  2857. return ret;
  2858. }
  2859. static int dms_new_server(struct qmi_handle *qmi_dms,
  2860. struct qmi_service *service)
  2861. {
  2862. struct cnss_plat_data *plat_priv =
  2863. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2864. if (!service)
  2865. return -EINVAL;
  2866. return cnss_dms_connect_to_server(plat_priv, service->node,
  2867. service->port);
  2868. }
  2869. static void cnss_dms_server_exit_work(struct work_struct *work)
  2870. {
  2871. int ret;
  2872. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  2873. cnss_dms_deinit(plat_priv);
  2874. cnss_pr_info("QMI DMS Server Exit");
  2875. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2876. ret = cnss_dms_init(plat_priv);
  2877. if (ret < 0)
  2878. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  2879. }
  2880. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  2881. static void dms_del_server(struct qmi_handle *qmi_dms,
  2882. struct qmi_service *service)
  2883. {
  2884. struct cnss_plat_data *plat_priv =
  2885. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2886. if (!plat_priv)
  2887. return;
  2888. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  2889. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  2890. plat_priv->driver_state);
  2891. return;
  2892. }
  2893. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2894. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2895. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2896. plat_priv->driver_state);
  2897. schedule_work(&cnss_dms_del_work);
  2898. }
  2899. void cnss_cancel_dms_work(void)
  2900. {
  2901. cancel_work_sync(&cnss_dms_del_work);
  2902. }
  2903. static struct qmi_ops qmi_dms_ops = {
  2904. .new_server = dms_new_server,
  2905. .del_server = dms_del_server,
  2906. };
  2907. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2908. {
  2909. int ret = 0;
  2910. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2911. &qmi_dms_ops, NULL);
  2912. if (ret < 0) {
  2913. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2914. goto out;
  2915. }
  2916. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2917. DMS_SERVICE_VERS_V01, 0);
  2918. if (ret < 0)
  2919. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2920. out:
  2921. return ret;
  2922. }
  2923. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2924. {
  2925. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2926. qmi_handle_release(&plat_priv->qmi_dms);
  2927. }
  2928. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2929. {
  2930. int ret;
  2931. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2932. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2933. struct qmi_txn txn;
  2934. if (!plat_priv)
  2935. return -ENODEV;
  2936. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2937. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2938. if (!req)
  2939. return -ENOMEM;
  2940. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2941. if (!resp) {
  2942. kfree(req);
  2943. return -ENOMEM;
  2944. }
  2945. req->antenna = plat_priv->antenna;
  2946. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2947. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2948. if (ret < 0) {
  2949. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2950. ret);
  2951. goto out;
  2952. }
  2953. ret = qmi_send_request
  2954. (&plat_priv->coex_qmi, NULL, &txn,
  2955. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2956. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2957. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2958. if (ret < 0) {
  2959. qmi_txn_cancel(&txn);
  2960. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2961. ret);
  2962. goto out;
  2963. }
  2964. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2965. if (ret < 0) {
  2966. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2967. ret);
  2968. goto out;
  2969. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2970. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2971. resp->resp.result, resp->resp.error);
  2972. ret = -resp->resp.result;
  2973. goto out;
  2974. }
  2975. if (resp->grant_valid)
  2976. plat_priv->grant = resp->grant;
  2977. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2978. kfree(resp);
  2979. kfree(req);
  2980. return 0;
  2981. out:
  2982. kfree(resp);
  2983. kfree(req);
  2984. return ret;
  2985. }
  2986. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2987. {
  2988. int ret;
  2989. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2990. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2991. struct qmi_txn txn;
  2992. if (!plat_priv)
  2993. return -ENODEV;
  2994. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2995. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2996. if (!req)
  2997. return -ENOMEM;
  2998. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2999. if (!resp) {
  3000. kfree(req);
  3001. return -ENOMEM;
  3002. }
  3003. req->antenna = plat_priv->antenna;
  3004. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3005. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  3006. if (ret < 0) {
  3007. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  3008. ret);
  3009. goto out;
  3010. }
  3011. ret = qmi_send_request
  3012. (&plat_priv->coex_qmi, NULL, &txn,
  3013. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  3014. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  3015. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  3016. if (ret < 0) {
  3017. qmi_txn_cancel(&txn);
  3018. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  3019. ret);
  3020. goto out;
  3021. }
  3022. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3023. if (ret < 0) {
  3024. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  3025. ret);
  3026. goto out;
  3027. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3028. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  3029. resp->resp.result, resp->resp.error);
  3030. ret = -resp->resp.result;
  3031. goto out;
  3032. }
  3033. kfree(resp);
  3034. kfree(req);
  3035. return 0;
  3036. out:
  3037. kfree(resp);
  3038. kfree(req);
  3039. return ret;
  3040. }
  3041. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  3042. {
  3043. int ret;
  3044. struct wlfw_subsys_restart_level_req_msg_v01 req;
  3045. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  3046. u8 pcss_enabled;
  3047. if (!plat_priv)
  3048. return -ENODEV;
  3049. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3050. cnss_pr_dbg("Can't send pcss cmd before fw ready\n");
  3051. return 0;
  3052. }
  3053. pcss_enabled = plat_priv->recovery_pcss_enabled;
  3054. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  3055. req.restart_level_type_valid = 1;
  3056. req.restart_level_type = pcss_enabled;
  3057. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  3058. wlfw_subsys_restart_level_req_msg_v01_ei,
  3059. wlfw_subsys_restart_level_resp_msg_v01_ei,
  3060. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  3061. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  3062. QMI_WLFW_TIMEOUT_JF);
  3063. if (ret < 0)
  3064. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  3065. return ret;
  3066. }
  3067. static int coex_new_server(struct qmi_handle *qmi,
  3068. struct qmi_service *service)
  3069. {
  3070. struct cnss_plat_data *plat_priv =
  3071. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3072. struct sockaddr_qrtr sq = { 0 };
  3073. int ret = 0;
  3074. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  3075. service->node, service->port);
  3076. sq.sq_family = AF_QIPCRTR;
  3077. sq.sq_node = service->node;
  3078. sq.sq_port = service->port;
  3079. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3080. if (ret < 0) {
  3081. cnss_pr_err("Fail to connect to remote service port\n");
  3082. return ret;
  3083. }
  3084. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3085. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  3086. plat_priv->driver_state);
  3087. return 0;
  3088. }
  3089. static void coex_del_server(struct qmi_handle *qmi,
  3090. struct qmi_service *service)
  3091. {
  3092. struct cnss_plat_data *plat_priv =
  3093. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3094. cnss_pr_dbg("COEX server exit\n");
  3095. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3096. }
  3097. static struct qmi_ops coex_qmi_ops = {
  3098. .new_server = coex_new_server,
  3099. .del_server = coex_del_server,
  3100. };
  3101. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3102. { int ret;
  3103. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3104. COEX_SERVICE_MAX_MSG_LEN,
  3105. &coex_qmi_ops, NULL);
  3106. if (ret < 0)
  3107. return ret;
  3108. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3109. COEX_SERVICE_VERS_V01, 0);
  3110. return ret;
  3111. }
  3112. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3113. {
  3114. qmi_handle_release(&plat_priv->coex_qmi);
  3115. }
  3116. /* IMS Service */
  3117. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3118. {
  3119. int ret;
  3120. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3121. struct qmi_txn *txn;
  3122. if (!plat_priv)
  3123. return -ENODEV;
  3124. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3125. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3126. if (!req)
  3127. return -ENOMEM;
  3128. req->wfc_call_status_valid = 1;
  3129. req->wfc_call_status = 1;
  3130. txn = &plat_priv->txn;
  3131. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3132. if (ret < 0) {
  3133. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3134. ret);
  3135. goto out;
  3136. }
  3137. ret = qmi_send_request
  3138. (&plat_priv->ims_qmi, NULL, txn,
  3139. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3140. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3141. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3142. if (ret < 0) {
  3143. qmi_txn_cancel(txn);
  3144. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3145. ret);
  3146. goto out;
  3147. }
  3148. kfree(req);
  3149. return 0;
  3150. out:
  3151. kfree(req);
  3152. return ret;
  3153. }
  3154. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3155. struct sockaddr_qrtr *sq,
  3156. struct qmi_txn *txn,
  3157. const void *data)
  3158. {
  3159. const
  3160. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3161. data;
  3162. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3163. if (!txn) {
  3164. cnss_pr_err("spurious response\n");
  3165. return;
  3166. }
  3167. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3168. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3169. resp->resp.result, resp->resp.error);
  3170. txn->result = -resp->resp.result;
  3171. }
  3172. }
  3173. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3174. void *data)
  3175. {
  3176. int ret;
  3177. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3178. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3179. kfree(data);
  3180. return ret;
  3181. }
  3182. static void
  3183. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3184. struct sockaddr_qrtr *sq,
  3185. struct qmi_txn *txn, const void *data)
  3186. {
  3187. struct cnss_plat_data *plat_priv =
  3188. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3189. const
  3190. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3191. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3192. if (!txn) {
  3193. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3194. return;
  3195. }
  3196. if (!ind_msg) {
  3197. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3198. return;
  3199. }
  3200. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3201. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3202. ind_msg->all_wfc_calls_held,
  3203. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3204. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3205. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3206. ind_msg->media_quality_valid, ind_msg->media_quality);
  3207. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3208. if (!event_data)
  3209. return;
  3210. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3211. 0, event_data);
  3212. }
  3213. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3214. {
  3215. .type = QMI_RESPONSE,
  3216. .msg_id =
  3217. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3218. .ei =
  3219. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3220. .decoded_size = sizeof(struct
  3221. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3222. .fn = ims_subscribe_for_indication_resp_cb
  3223. },
  3224. {
  3225. .type = QMI_INDICATION,
  3226. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3227. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3228. .decoded_size =
  3229. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3230. .fn = cnss_ims_process_wfc_call_ind_cb
  3231. },
  3232. {}
  3233. };
  3234. static int ims_new_server(struct qmi_handle *qmi,
  3235. struct qmi_service *service)
  3236. {
  3237. struct cnss_plat_data *plat_priv =
  3238. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3239. struct sockaddr_qrtr sq = { 0 };
  3240. int ret = 0;
  3241. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3242. service->node, service->port);
  3243. sq.sq_family = AF_QIPCRTR;
  3244. sq.sq_node = service->node;
  3245. sq.sq_port = service->port;
  3246. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3247. if (ret < 0) {
  3248. cnss_pr_err("Fail to connect to remote service port\n");
  3249. return ret;
  3250. }
  3251. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3252. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3253. plat_priv->driver_state);
  3254. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3255. return ret;
  3256. }
  3257. static void ims_del_server(struct qmi_handle *qmi,
  3258. struct qmi_service *service)
  3259. {
  3260. struct cnss_plat_data *plat_priv =
  3261. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3262. cnss_pr_dbg("IMS server exit\n");
  3263. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3264. }
  3265. static struct qmi_ops ims_qmi_ops = {
  3266. .new_server = ims_new_server,
  3267. .del_server = ims_del_server,
  3268. };
  3269. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3270. { int ret;
  3271. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3272. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3273. &ims_qmi_ops, qmi_ims_msg_handlers);
  3274. if (ret < 0)
  3275. return ret;
  3276. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3277. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3278. return ret;
  3279. }
  3280. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3281. {
  3282. qmi_handle_release(&plat_priv->ims_qmi);
  3283. }