main.c 122 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/version.h>
  20. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  21. #include <linux/panic_notifier.h>
  22. #endif
  23. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  24. #include <soc/qcom/minidump.h>
  25. #endif
  26. #include "cnss_plat_ipc_qmi.h"
  27. #include "cnss_utils.h"
  28. #include "main.h"
  29. #include "bus.h"
  30. #include "debug.h"
  31. #include "genl.h"
  32. #include "reg.h"
  33. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  34. #include "smcinvoke.h"
  35. #include "smcinvoke_object.h"
  36. #include "IClientEnv.h"
  37. #define HW_STATE_UID 0x108
  38. #define HW_OP_GET_STATE 1
  39. #define HW_WIFI_UID 0x508
  40. #define FEATURE_NOT_SUPPORTED 12
  41. #define PERIPHERAL_NOT_FOUND 10
  42. #endif
  43. #define CNSS_DUMP_FORMAT_VER 0x11
  44. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  45. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  46. #define CNSS_DUMP_NAME "CNSS_WLAN"
  47. #define CNSS_DUMP_DESC_SIZE 0x1000
  48. #define CNSS_DUMP_SEG_VER 0x1
  49. #define FILE_SYSTEM_READY 1
  50. #define FW_READY_TIMEOUT 20000
  51. #define FW_ASSERT_TIMEOUT 5000
  52. #define CNSS_EVENT_PENDING 2989
  53. #define POWER_RESET_MIN_DELAY_MS 100
  54. #define CNSS_QUIRKS_DEFAULT 0
  55. #ifdef CONFIG_CNSS_EMULATION
  56. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  57. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  58. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  59. #else
  60. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  61. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  62. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  63. #endif
  64. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  65. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  66. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  67. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  69. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  70. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  71. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  72. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  73. enum cnss_cal_db_op {
  74. CNSS_CAL_DB_UPLOAD,
  75. CNSS_CAL_DB_DOWNLOAD,
  76. CNSS_CAL_DB_INVALID_OP,
  77. };
  78. enum cnss_recovery_type {
  79. CNSS_WLAN_RECOVERY = 0x1,
  80. CNSS_PCSS_RECOVERY = 0x2,
  81. };
  82. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  83. #define CNSS_MAX_DEV_NUM 2
  84. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  85. static int plat_env_count;
  86. #else
  87. static struct cnss_plat_data *plat_env;
  88. #endif
  89. static bool cnss_allow_driver_loading;
  90. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  91. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  92. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  93. };
  94. static struct cnss_fw_files FW_FILES_DEFAULT = {
  95. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  96. "utfbd.bin", "epping.bin", "evicted.bin"
  97. };
  98. struct cnss_driver_event {
  99. struct list_head list;
  100. enum cnss_driver_event_type type;
  101. bool sync;
  102. struct completion complete;
  103. int ret;
  104. void *data;
  105. };
  106. bool cnss_check_driver_loading_allowed(void)
  107. {
  108. return cnss_allow_driver_loading;
  109. }
  110. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  111. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  112. struct cnss_plat_data *plat_priv)
  113. {
  114. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  115. if (plat_priv) {
  116. plat_priv->plat_idx = plat_env_count;
  117. plat_env[plat_priv->plat_idx] = plat_priv;
  118. plat_env_count++;
  119. }
  120. }
  121. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  122. *plat_dev)
  123. {
  124. int i;
  125. if (!plat_dev)
  126. return NULL;
  127. for (i = 0; i < plat_env_count; i++) {
  128. if (plat_env[i]->plat_dev == plat_dev)
  129. return plat_env[i];
  130. }
  131. return NULL;
  132. }
  133. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  134. {
  135. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  136. plat_env[plat_priv->plat_idx] = NULL;
  137. plat_env_count--;
  138. }
  139. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  140. {
  141. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  142. "wlan_%d", plat_priv->plat_idx);
  143. return 0;
  144. }
  145. static int cnss_plat_env_available(void)
  146. {
  147. int ret = 0;
  148. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  149. cnss_pr_err("ERROR: No space to store plat_priv\n");
  150. ret = -ENOMEM;
  151. }
  152. return ret;
  153. }
  154. int cnss_get_plat_env_count(void)
  155. {
  156. return plat_env_count;
  157. }
  158. struct cnss_plat_data *cnss_get_plat_env(int index)
  159. {
  160. return plat_env[index];
  161. }
  162. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  163. {
  164. int i;
  165. for (i = 0; i < plat_env_count; i++) {
  166. if (plat_env[i]->rc_num == rc_num)
  167. return plat_env[i];
  168. }
  169. return NULL;
  170. }
  171. static inline int
  172. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  173. {
  174. return of_property_read_u32(plat_priv->dev_node,
  175. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  176. }
  177. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  178. {
  179. int ret = 0;
  180. ret = cnss_get_qrtr_node_id(plat_priv);
  181. if (ret) {
  182. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  183. plat_priv->qrtr_node_id = 0;
  184. plat_priv->wlfw_service_instance_id = 0;
  185. } else {
  186. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  187. QRTR_NODE_FW_ID_BASE;
  188. cnss_pr_dbg("service_instance_id=0x%x\n",
  189. plat_priv->wlfw_service_instance_id);
  190. }
  191. }
  192. static inline int
  193. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  194. {
  195. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  196. "qcom,pld_bus_ops_name",
  197. &plat_priv->pld_bus_ops_name);
  198. }
  199. #else
  200. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  201. struct cnss_plat_data *plat_priv)
  202. {
  203. plat_env = plat_priv;
  204. }
  205. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  206. {
  207. return plat_env;
  208. }
  209. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  210. {
  211. plat_env = NULL;
  212. }
  213. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  214. {
  215. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  216. "wlan");
  217. return 0;
  218. }
  219. static int cnss_plat_env_available(void)
  220. {
  221. return 0;
  222. }
  223. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  224. {
  225. return cnss_bus_dev_to_plat_priv(NULL);
  226. }
  227. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  228. {
  229. }
  230. static int
  231. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  232. {
  233. return 0;
  234. }
  235. #endif
  236. static inline int
  237. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  238. {
  239. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  240. "qcom,wlan-rc-num", &plat_priv->rc_num);
  241. }
  242. bool cnss_is_dual_wlan_enabled(void)
  243. {
  244. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  245. }
  246. /**
  247. * cnss_get_mem_seg_count - Get segment count of memory
  248. * @type: memory type
  249. * @seg: segment count
  250. *
  251. * Return: 0 on success, negative value on failure
  252. */
  253. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  254. {
  255. struct cnss_plat_data *plat_priv;
  256. plat_priv = cnss_get_plat_priv(NULL);
  257. if (!plat_priv)
  258. return -ENODEV;
  259. switch (type) {
  260. case CNSS_REMOTE_MEM_TYPE_FW:
  261. *seg = plat_priv->fw_mem_seg_len;
  262. break;
  263. case CNSS_REMOTE_MEM_TYPE_QDSS:
  264. *seg = plat_priv->qdss_mem_seg_len;
  265. break;
  266. default:
  267. return -EINVAL;
  268. }
  269. return 0;
  270. }
  271. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  272. /**
  273. * cnss_get_wifi_kobject -return wifi kobject
  274. * Return: Null, to maintain driver comnpatibilty
  275. */
  276. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  277. {
  278. struct cnss_plat_data *plat_priv;
  279. plat_priv = cnss_get_plat_priv(NULL);
  280. if (!plat_priv)
  281. return NULL;
  282. return plat_priv->wifi_kobj;
  283. }
  284. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  285. /**
  286. * cnss_get_mem_segment_info - Get memory info of different type
  287. * @type: memory type
  288. * @segment: array to save the segment info
  289. * @seg: segment count
  290. *
  291. * Return: 0 on success, negative value on failure
  292. */
  293. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  294. struct cnss_mem_segment segment[],
  295. u32 segment_count)
  296. {
  297. struct cnss_plat_data *plat_priv;
  298. u32 i;
  299. plat_priv = cnss_get_plat_priv(NULL);
  300. if (!plat_priv)
  301. return -ENODEV;
  302. switch (type) {
  303. case CNSS_REMOTE_MEM_TYPE_FW:
  304. if (segment_count > plat_priv->fw_mem_seg_len)
  305. segment_count = plat_priv->fw_mem_seg_len;
  306. for (i = 0; i < segment_count; i++) {
  307. segment[i].size = plat_priv->fw_mem[i].size;
  308. segment[i].va = plat_priv->fw_mem[i].va;
  309. segment[i].pa = plat_priv->fw_mem[i].pa;
  310. }
  311. break;
  312. case CNSS_REMOTE_MEM_TYPE_QDSS:
  313. if (segment_count > plat_priv->qdss_mem_seg_len)
  314. segment_count = plat_priv->qdss_mem_seg_len;
  315. for (i = 0; i < segment_count; i++) {
  316. segment[i].size = plat_priv->qdss_mem[i].size;
  317. segment[i].va = plat_priv->qdss_mem[i].va;
  318. segment[i].pa = plat_priv->qdss_mem[i].pa;
  319. }
  320. break;
  321. default:
  322. return -EINVAL;
  323. }
  324. return 0;
  325. }
  326. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  327. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  328. {
  329. struct device_node *audio_ion_node;
  330. struct platform_device *audio_ion_pdev;
  331. audio_ion_node = of_find_compatible_node(NULL, NULL,
  332. "qcom,msm-audio-ion");
  333. if (!audio_ion_node) {
  334. cnss_pr_err("Unable to get Audio ion node");
  335. return -EINVAL;
  336. }
  337. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  338. of_node_put(audio_ion_node);
  339. if (!audio_ion_pdev) {
  340. cnss_pr_err("Unable to get Audio ion platform device");
  341. return -EINVAL;
  342. }
  343. plat_priv->audio_iommu_domain =
  344. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  345. put_device(&audio_ion_pdev->dev);
  346. if (!plat_priv->audio_iommu_domain) {
  347. cnss_pr_err("Unable to get Audio ion iommu domain");
  348. return -EINVAL;
  349. }
  350. return 0;
  351. }
  352. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  353. enum cnss_feature_v01 feature)
  354. {
  355. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  356. return -EINVAL;
  357. plat_priv->feature_list |= 1 << feature;
  358. return 0;
  359. }
  360. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  361. enum cnss_feature_v01 feature)
  362. {
  363. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  364. return -EINVAL;
  365. plat_priv->feature_list &= ~(1 << feature);
  366. return 0;
  367. }
  368. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  369. u64 *feature_list)
  370. {
  371. if (unlikely(!plat_priv))
  372. return -EINVAL;
  373. *feature_list = plat_priv->feature_list;
  374. return 0;
  375. }
  376. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  377. {
  378. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  379. return;
  380. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  381. plat_priv->driver_state,
  382. atomic_read(&plat_priv->pm_count));
  383. pm_stay_awake(&plat_priv->plat_dev->dev);
  384. }
  385. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  386. {
  387. int r = atomic_dec_return(&plat_priv->pm_count);
  388. WARN_ON(r < 0);
  389. if (r != 0)
  390. return;
  391. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  392. plat_priv->driver_state,
  393. atomic_read(&plat_priv->pm_count));
  394. pm_relax(&plat_priv->plat_dev->dev);
  395. }
  396. int cnss_get_fw_files_for_target(struct device *dev,
  397. struct cnss_fw_files *pfw_files,
  398. u32 target_type, u32 target_version)
  399. {
  400. if (!pfw_files)
  401. return -ENODEV;
  402. switch (target_version) {
  403. case QCA6174_REV3_VERSION:
  404. case QCA6174_REV3_2_VERSION:
  405. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  406. break;
  407. default:
  408. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  409. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  410. target_type, target_version);
  411. break;
  412. }
  413. return 0;
  414. }
  415. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  416. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  417. {
  418. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  419. if (!plat_priv)
  420. return -ENODEV;
  421. if (!cap)
  422. return -EINVAL;
  423. *cap = plat_priv->cap;
  424. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  425. return 0;
  426. }
  427. EXPORT_SYMBOL(cnss_get_platform_cap);
  428. /**
  429. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  430. * @dev: Device
  431. * @fw_cap: FW Capability which needs to be checked
  432. *
  433. * Return: TRUE if supported, FALSE on failure or if not supported
  434. */
  435. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  436. {
  437. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  438. bool is_supported = false;
  439. if (!plat_priv)
  440. return is_supported;
  441. if (!plat_priv->fw_caps)
  442. return is_supported;
  443. switch (fw_cap) {
  444. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  445. is_supported = !!(plat_priv->fw_caps &
  446. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  447. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  448. is_supported = false;
  449. break;
  450. default:
  451. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  452. }
  453. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  454. is_supported ? "supported" : "not supported");
  455. return is_supported;
  456. }
  457. EXPORT_SYMBOL(cnss_get_fw_cap);
  458. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  459. {
  460. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  461. if (!plat_priv)
  462. return;
  463. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  464. }
  465. EXPORT_SYMBOL(cnss_request_pm_qos);
  466. void cnss_remove_pm_qos(struct device *dev)
  467. {
  468. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  469. if (!plat_priv)
  470. return;
  471. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  472. }
  473. EXPORT_SYMBOL(cnss_remove_pm_qos);
  474. int cnss_wlan_enable(struct device *dev,
  475. struct cnss_wlan_enable_cfg *config,
  476. enum cnss_driver_mode mode,
  477. const char *host_version)
  478. {
  479. int ret = 0;
  480. struct cnss_plat_data *plat_priv;
  481. if (!dev) {
  482. cnss_pr_err("Invalid dev pointer\n");
  483. return -EINVAL;
  484. }
  485. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  486. if (!plat_priv)
  487. return -ENODEV;
  488. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  489. return 0;
  490. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  491. return 0;
  492. if (!config || !host_version) {
  493. cnss_pr_err("Invalid config or host_version pointer\n");
  494. return -EINVAL;
  495. }
  496. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  497. mode, config, host_version);
  498. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  499. goto skip_cfg;
  500. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  501. if (ret)
  502. goto out;
  503. skip_cfg:
  504. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  505. out:
  506. return ret;
  507. }
  508. EXPORT_SYMBOL(cnss_wlan_enable);
  509. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  510. {
  511. int ret = 0;
  512. struct cnss_plat_data *plat_priv;
  513. if (!dev) {
  514. cnss_pr_err("Invalid dev pointer\n");
  515. return -EINVAL;
  516. }
  517. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  518. if (!plat_priv)
  519. return -ENODEV;
  520. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  521. return 0;
  522. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  523. return 0;
  524. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  525. cnss_bus_free_qdss_mem(plat_priv);
  526. return ret;
  527. }
  528. EXPORT_SYMBOL(cnss_wlan_disable);
  529. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  530. dma_addr_t iova, size_t size)
  531. {
  532. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  533. uint32_t page_offset;
  534. if (!plat_priv)
  535. return -ENODEV;
  536. if (!plat_priv->audio_iommu_domain)
  537. return -EINVAL;
  538. page_offset = iova & (PAGE_SIZE - 1);
  539. if (page_offset + size > PAGE_SIZE)
  540. size += PAGE_SIZE;
  541. iova -= page_offset;
  542. paddr -= page_offset;
  543. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  544. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  545. IOMMU_CACHE);
  546. }
  547. EXPORT_SYMBOL(cnss_audio_smmu_map);
  548. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  549. {
  550. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  551. uint32_t page_offset;
  552. if (!plat_priv)
  553. return;
  554. if (!plat_priv->audio_iommu_domain)
  555. return;
  556. page_offset = iova & (PAGE_SIZE - 1);
  557. if (page_offset + size > PAGE_SIZE)
  558. size += PAGE_SIZE;
  559. iova -= page_offset;
  560. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  561. roundup(size, PAGE_SIZE));
  562. }
  563. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  564. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  565. u32 data_len, u8 *output)
  566. {
  567. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  568. int ret = 0;
  569. if (!plat_priv) {
  570. cnss_pr_err("plat_priv is NULL!\n");
  571. return -EINVAL;
  572. }
  573. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  574. return 0;
  575. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  576. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  577. plat_priv->driver_state);
  578. ret = -EINVAL;
  579. goto out;
  580. }
  581. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  582. data_len, output);
  583. out:
  584. return ret;
  585. }
  586. EXPORT_SYMBOL(cnss_athdiag_read);
  587. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  588. u32 data_len, u8 *input)
  589. {
  590. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  591. int ret = 0;
  592. if (!plat_priv) {
  593. cnss_pr_err("plat_priv is NULL!\n");
  594. return -EINVAL;
  595. }
  596. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  597. return 0;
  598. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  599. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  600. plat_priv->driver_state);
  601. ret = -EINVAL;
  602. goto out;
  603. }
  604. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  605. data_len, input);
  606. out:
  607. return ret;
  608. }
  609. EXPORT_SYMBOL(cnss_athdiag_write);
  610. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  611. {
  612. struct cnss_plat_data *plat_priv;
  613. if (!dev) {
  614. cnss_pr_err("Invalid dev pointer\n");
  615. return -EINVAL;
  616. }
  617. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  618. if (!plat_priv)
  619. return -ENODEV;
  620. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  621. return 0;
  622. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  623. }
  624. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  625. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  626. {
  627. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  628. if (!plat_priv)
  629. return -EINVAL;
  630. if (!plat_priv->fw_pcie_gen_switch) {
  631. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  632. return -EOPNOTSUPP;
  633. }
  634. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  635. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  636. return -EINVAL;
  637. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  638. plat_priv->pcie_gen_speed = pcie_gen_speed;
  639. return 0;
  640. }
  641. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  642. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  643. {
  644. int ret = 0;
  645. if (!plat_priv)
  646. return -ENODEV;
  647. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  648. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  649. if (ret)
  650. goto out;
  651. if (plat_priv->hds_enabled)
  652. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  653. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  654. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  655. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  656. plat_priv->ctrl_params.bdf_type);
  657. if (ret)
  658. goto out;
  659. ret = cnss_bus_load_m3(plat_priv);
  660. if (ret)
  661. goto out;
  662. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  663. if (ret)
  664. goto out;
  665. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  666. return 0;
  667. out:
  668. return ret;
  669. }
  670. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  671. {
  672. int ret = 0;
  673. if (!plat_priv->antenna) {
  674. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  675. if (ret)
  676. goto out;
  677. }
  678. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  679. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  680. if (ret)
  681. goto out;
  682. }
  683. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  684. if (ret)
  685. goto out;
  686. return 0;
  687. out:
  688. return ret;
  689. }
  690. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  691. {
  692. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  693. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  694. }
  695. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  696. {
  697. u32 i;
  698. int ret = 0;
  699. struct cnss_plat_ipc_daemon_config *cfg;
  700. ret = cnss_qmi_get_dms_mac(plat_priv);
  701. if (ret == 0 && plat_priv->dms.mac_valid)
  702. goto qmi_send;
  703. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  704. * Thus assert on failure to get MAC from DMS even after retries
  705. */
  706. if (plat_priv->use_nv_mac) {
  707. /* Check if Daemon says platform support DMS MAC provisioning */
  708. cfg = cnss_plat_ipc_qmi_daemon_config();
  709. if (cfg) {
  710. if (!cfg->dms_mac_addr_supported) {
  711. cnss_pr_err("DMS MAC address not supported\n");
  712. CNSS_ASSERT(0);
  713. return -EINVAL;
  714. }
  715. }
  716. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  717. if (plat_priv->dms.mac_valid)
  718. break;
  719. ret = cnss_qmi_get_dms_mac(plat_priv);
  720. if (ret == 0)
  721. break;
  722. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  723. }
  724. if (!plat_priv->dms.mac_valid) {
  725. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  726. CNSS_ASSERT(0);
  727. return -EINVAL;
  728. }
  729. }
  730. qmi_send:
  731. if (plat_priv->dms.mac_valid)
  732. ret =
  733. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  734. ARRAY_SIZE(plat_priv->dms.mac));
  735. return ret;
  736. }
  737. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  738. enum cnss_cal_db_op op, u32 *size)
  739. {
  740. int ret = 0;
  741. u32 timeout = cnss_get_timeout(plat_priv,
  742. CNSS_TIMEOUT_DAEMON_CONNECTION);
  743. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  744. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  745. if (op >= CNSS_CAL_DB_INVALID_OP)
  746. return -EINVAL;
  747. if (!plat_priv->cbc_file_download) {
  748. cnss_pr_info("CAL DB file not required as per BDF\n");
  749. return 0;
  750. }
  751. if (*size == 0) {
  752. cnss_pr_err("Invalid cal file size\n");
  753. return -EINVAL;
  754. }
  755. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  756. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  757. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  758. msecs_to_jiffies(timeout));
  759. if (!ret) {
  760. cnss_pr_err("Daemon not yet connected\n");
  761. CNSS_ASSERT(0);
  762. return ret;
  763. }
  764. }
  765. if (!plat_priv->cal_mem->va) {
  766. cnss_pr_err("CAL DB Memory not setup for FW\n");
  767. return -EINVAL;
  768. }
  769. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  770. if (op == CNSS_CAL_DB_DOWNLOAD) {
  771. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  772. ret = cnss_plat_ipc_qmi_file_download(client_id,
  773. CNSS_CAL_DB_FILE_NAME,
  774. plat_priv->cal_mem->va,
  775. size);
  776. } else {
  777. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  778. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  779. CNSS_CAL_DB_FILE_NAME,
  780. plat_priv->cal_mem->va,
  781. *size);
  782. }
  783. if (ret)
  784. cnss_pr_err("Cal DB file %s %s failure\n",
  785. CNSS_CAL_DB_FILE_NAME,
  786. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  787. else
  788. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  789. CNSS_CAL_DB_FILE_NAME,
  790. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  791. *size);
  792. return ret;
  793. }
  794. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  795. {
  796. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  797. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  798. return -EINVAL;
  799. }
  800. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  801. &plat_priv->cal_file_size);
  802. }
  803. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  804. u32 *cal_file_size)
  805. {
  806. /* To download pass the total size of cal DB mem allocated.
  807. * After cal file is download to mem, its size is updated in
  808. * return pointer
  809. */
  810. *cal_file_size = plat_priv->cal_mem->size;
  811. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  812. cal_file_size);
  813. }
  814. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  815. {
  816. int ret = 0;
  817. u32 cal_file_size = 0;
  818. if (!plat_priv)
  819. return -ENODEV;
  820. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  821. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  822. return -EINVAL;
  823. }
  824. cnss_pr_dbg("Processing FW Init Done..\n");
  825. del_timer(&plat_priv->fw_boot_timer);
  826. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  827. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  828. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  829. cnss_send_subsys_restart_level_msg(plat_priv);
  830. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  831. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  832. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  833. }
  834. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  835. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  836. CNSS_WALTEST);
  837. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  838. cnss_request_antenna_sharing(plat_priv);
  839. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  840. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  841. plat_priv->cal_time = jiffies;
  842. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  843. CNSS_CALIBRATION);
  844. } else {
  845. ret = cnss_setup_dms_mac(plat_priv);
  846. ret = cnss_bus_call_driver_probe(plat_priv);
  847. }
  848. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  849. goto out;
  850. else if (ret)
  851. goto shutdown;
  852. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  853. return 0;
  854. shutdown:
  855. cnss_bus_dev_shutdown(plat_priv);
  856. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  857. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  858. out:
  859. return ret;
  860. }
  861. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  862. {
  863. switch (type) {
  864. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  865. return "SERVER_ARRIVE";
  866. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  867. return "SERVER_EXIT";
  868. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  869. return "REQUEST_MEM";
  870. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  871. return "FW_MEM_READY";
  872. case CNSS_DRIVER_EVENT_FW_READY:
  873. return "FW_READY";
  874. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  875. return "COLD_BOOT_CAL_START";
  876. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  877. return "COLD_BOOT_CAL_DONE";
  878. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  879. return "REGISTER_DRIVER";
  880. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  881. return "UNREGISTER_DRIVER";
  882. case CNSS_DRIVER_EVENT_RECOVERY:
  883. return "RECOVERY";
  884. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  885. return "FORCE_FW_ASSERT";
  886. case CNSS_DRIVER_EVENT_POWER_UP:
  887. return "POWER_UP";
  888. case CNSS_DRIVER_EVENT_POWER_DOWN:
  889. return "POWER_DOWN";
  890. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  891. return "IDLE_RESTART";
  892. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  893. return "IDLE_SHUTDOWN";
  894. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  895. return "IMS_WFC_CALL_IND";
  896. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  897. return "WLFW_TWC_CFG_IND";
  898. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  899. return "QDSS_TRACE_REQ_MEM";
  900. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  901. return "FW_MEM_FILE_SAVE";
  902. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  903. return "QDSS_TRACE_FREE";
  904. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  905. return "QDSS_TRACE_REQ_DATA";
  906. case CNSS_DRIVER_EVENT_MAX:
  907. return "EVENT_MAX";
  908. }
  909. return "UNKNOWN";
  910. };
  911. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  912. enum cnss_driver_event_type type,
  913. u32 flags, void *data)
  914. {
  915. struct cnss_driver_event *event;
  916. unsigned long irq_flags;
  917. int gfp = GFP_KERNEL;
  918. int ret = 0;
  919. if (!plat_priv)
  920. return -ENODEV;
  921. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  922. cnss_driver_event_to_str(type), type,
  923. flags ? "-sync" : "", plat_priv->driver_state, flags);
  924. if (type >= CNSS_DRIVER_EVENT_MAX) {
  925. cnss_pr_err("Invalid Event type: %d, can't post", type);
  926. return -EINVAL;
  927. }
  928. if (in_interrupt() || irqs_disabled())
  929. gfp = GFP_ATOMIC;
  930. event = kzalloc(sizeof(*event), gfp);
  931. if (!event)
  932. return -ENOMEM;
  933. cnss_pm_stay_awake(plat_priv);
  934. event->type = type;
  935. event->data = data;
  936. init_completion(&event->complete);
  937. event->ret = CNSS_EVENT_PENDING;
  938. event->sync = !!(flags & CNSS_EVENT_SYNC);
  939. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  940. list_add_tail(&event->list, &plat_priv->event_list);
  941. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  942. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  943. if (!(flags & CNSS_EVENT_SYNC))
  944. goto out;
  945. if (flags & CNSS_EVENT_UNKILLABLE)
  946. wait_for_completion(&event->complete);
  947. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  948. ret = wait_for_completion_killable(&event->complete);
  949. else
  950. ret = wait_for_completion_interruptible(&event->complete);
  951. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  952. cnss_driver_event_to_str(type), type,
  953. plat_priv->driver_state, ret, event->ret);
  954. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  955. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  956. event->sync = false;
  957. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  958. ret = -EINTR;
  959. goto out;
  960. }
  961. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  962. ret = event->ret;
  963. kfree(event);
  964. out:
  965. cnss_pm_relax(plat_priv);
  966. return ret;
  967. }
  968. /**
  969. * cnss_get_timeout - Get timeout for corresponding type.
  970. * @plat_priv: Pointer to platform driver context.
  971. * @cnss_timeout_type: Timeout type.
  972. *
  973. * Return: Timeout in milliseconds.
  974. */
  975. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  976. enum cnss_timeout_type timeout_type)
  977. {
  978. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  979. switch (timeout_type) {
  980. case CNSS_TIMEOUT_QMI:
  981. return qmi_timeout;
  982. case CNSS_TIMEOUT_POWER_UP:
  983. return (qmi_timeout << 2);
  984. case CNSS_TIMEOUT_IDLE_RESTART:
  985. /* In idle restart power up sequence, we have fw_boot_timer to
  986. * handle FW initialization failure.
  987. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  988. * account for FW dump collection and FW re-initialization on
  989. * retry.
  990. */
  991. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  992. case CNSS_TIMEOUT_CALIBRATION:
  993. /* Similar to mission mode, in CBC if FW init fails
  994. * fw recovery is tried. Thus return 2x the CBC timeout.
  995. */
  996. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  997. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  998. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  999. case CNSS_TIMEOUT_RDDM:
  1000. return CNSS_RDDM_TIMEOUT_MS;
  1001. case CNSS_TIMEOUT_RECOVERY:
  1002. return RECOVERY_TIMEOUT;
  1003. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1004. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1005. default:
  1006. return qmi_timeout;
  1007. }
  1008. }
  1009. unsigned int cnss_get_boot_timeout(struct device *dev)
  1010. {
  1011. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1012. if (!plat_priv) {
  1013. cnss_pr_err("plat_priv is NULL\n");
  1014. return 0;
  1015. }
  1016. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1017. }
  1018. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1019. int cnss_power_up(struct device *dev)
  1020. {
  1021. int ret = 0;
  1022. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1023. unsigned int timeout;
  1024. if (!plat_priv) {
  1025. cnss_pr_err("plat_priv is NULL\n");
  1026. return -ENODEV;
  1027. }
  1028. cnss_pr_dbg("Powering up device\n");
  1029. ret = cnss_driver_event_post(plat_priv,
  1030. CNSS_DRIVER_EVENT_POWER_UP,
  1031. CNSS_EVENT_SYNC, NULL);
  1032. if (ret)
  1033. goto out;
  1034. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1035. goto out;
  1036. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1037. reinit_completion(&plat_priv->power_up_complete);
  1038. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1039. msecs_to_jiffies(timeout));
  1040. if (!ret) {
  1041. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1042. timeout);
  1043. ret = -EAGAIN;
  1044. goto out;
  1045. }
  1046. return 0;
  1047. out:
  1048. return ret;
  1049. }
  1050. EXPORT_SYMBOL(cnss_power_up);
  1051. int cnss_power_down(struct device *dev)
  1052. {
  1053. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1054. if (!plat_priv) {
  1055. cnss_pr_err("plat_priv is NULL\n");
  1056. return -ENODEV;
  1057. }
  1058. cnss_pr_dbg("Powering down device\n");
  1059. return cnss_driver_event_post(plat_priv,
  1060. CNSS_DRIVER_EVENT_POWER_DOWN,
  1061. CNSS_EVENT_SYNC, NULL);
  1062. }
  1063. EXPORT_SYMBOL(cnss_power_down);
  1064. int cnss_idle_restart(struct device *dev)
  1065. {
  1066. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1067. unsigned int timeout;
  1068. int ret = 0;
  1069. if (!plat_priv) {
  1070. cnss_pr_err("plat_priv is NULL\n");
  1071. return -ENODEV;
  1072. }
  1073. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1074. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1075. return -EBUSY;
  1076. }
  1077. cnss_pr_dbg("Doing idle restart\n");
  1078. reinit_completion(&plat_priv->power_up_complete);
  1079. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1080. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1081. ret = -EINVAL;
  1082. goto out;
  1083. }
  1084. ret = cnss_driver_event_post(plat_priv,
  1085. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1086. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1087. if (ret)
  1088. goto out;
  1089. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1090. ret = cnss_bus_call_driver_probe(plat_priv);
  1091. goto out;
  1092. }
  1093. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1094. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1095. msecs_to_jiffies(timeout));
  1096. if (plat_priv->power_up_error) {
  1097. ret = plat_priv->power_up_error;
  1098. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1099. cnss_pr_dbg("Power up error:%d, exiting\n",
  1100. plat_priv->power_up_error);
  1101. goto out;
  1102. }
  1103. if (!ret) {
  1104. /* This exception occurs after attempting retry of FW recovery.
  1105. * Thus we can safely power off the device.
  1106. */
  1107. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1108. timeout);
  1109. ret = -ETIMEDOUT;
  1110. cnss_power_down(dev);
  1111. CNSS_ASSERT(0);
  1112. goto out;
  1113. }
  1114. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1115. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1116. del_timer(&plat_priv->fw_boot_timer);
  1117. ret = -EINVAL;
  1118. goto out;
  1119. }
  1120. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1121. * non-DRV is supported only once after device reboots and before wifi
  1122. * is turned on. We do not allow switching back to DRV.
  1123. * To bring device back into DRV, user needs to reboot device.
  1124. */
  1125. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1126. cnss_pr_dbg("DRV is disabled\n");
  1127. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1128. }
  1129. mutex_unlock(&plat_priv->driver_ops_lock);
  1130. return 0;
  1131. out:
  1132. mutex_unlock(&plat_priv->driver_ops_lock);
  1133. return ret;
  1134. }
  1135. EXPORT_SYMBOL(cnss_idle_restart);
  1136. int cnss_idle_shutdown(struct device *dev)
  1137. {
  1138. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1139. unsigned int timeout;
  1140. int ret;
  1141. if (!plat_priv) {
  1142. cnss_pr_err("plat_priv is NULL\n");
  1143. return -ENODEV;
  1144. }
  1145. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1146. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1147. return -EAGAIN;
  1148. }
  1149. cnss_pr_dbg("Doing idle shutdown\n");
  1150. if (!test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) &&
  1151. !test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1152. goto skip_wait;
  1153. reinit_completion(&plat_priv->recovery_complete);
  1154. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY);
  1155. ret = wait_for_completion_timeout(&plat_priv->recovery_complete,
  1156. msecs_to_jiffies(timeout));
  1157. if (!ret) {
  1158. cnss_pr_err("Timeout (%ums) waiting for recovery to complete\n",
  1159. timeout);
  1160. CNSS_ASSERT(0);
  1161. }
  1162. skip_wait:
  1163. return cnss_driver_event_post(plat_priv,
  1164. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1165. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1166. }
  1167. EXPORT_SYMBOL(cnss_idle_shutdown);
  1168. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1169. {
  1170. int ret = 0;
  1171. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1172. if (ret < 0) {
  1173. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1174. goto out;
  1175. }
  1176. ret = cnss_get_clk(plat_priv);
  1177. if (ret) {
  1178. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1179. goto put_vreg;
  1180. }
  1181. ret = cnss_get_pinctrl(plat_priv);
  1182. if (ret) {
  1183. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1184. goto put_clk;
  1185. }
  1186. return 0;
  1187. put_clk:
  1188. cnss_put_clk(plat_priv);
  1189. put_vreg:
  1190. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1191. out:
  1192. return ret;
  1193. }
  1194. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1195. {
  1196. cnss_put_clk(plat_priv);
  1197. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1198. }
  1199. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1200. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1201. unsigned long code,
  1202. void *ss_handle)
  1203. {
  1204. struct cnss_plat_data *plat_priv =
  1205. container_of(nb, struct cnss_plat_data, modem_nb);
  1206. struct cnss_esoc_info *esoc_info;
  1207. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1208. if (!plat_priv)
  1209. return NOTIFY_DONE;
  1210. esoc_info = &plat_priv->esoc_info;
  1211. if (code == SUBSYS_AFTER_POWERUP)
  1212. esoc_info->modem_current_status = 1;
  1213. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1214. esoc_info->modem_current_status = 0;
  1215. else
  1216. return NOTIFY_DONE;
  1217. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1218. esoc_info->modem_current_status))
  1219. return NOTIFY_DONE;
  1220. return NOTIFY_OK;
  1221. }
  1222. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1223. {
  1224. int ret = 0;
  1225. struct device *dev;
  1226. struct cnss_esoc_info *esoc_info;
  1227. struct esoc_desc *esoc_desc;
  1228. const char *client_desc;
  1229. dev = &plat_priv->plat_dev->dev;
  1230. esoc_info = &plat_priv->esoc_info;
  1231. esoc_info->notify_modem_status =
  1232. of_property_read_bool(dev->of_node,
  1233. "qcom,notify-modem-status");
  1234. if (!esoc_info->notify_modem_status)
  1235. goto out;
  1236. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1237. &client_desc);
  1238. if (ret) {
  1239. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1240. } else {
  1241. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1242. if (IS_ERR_OR_NULL(esoc_desc)) {
  1243. ret = PTR_RET(esoc_desc);
  1244. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1245. ret);
  1246. goto out;
  1247. }
  1248. esoc_info->esoc_desc = esoc_desc;
  1249. }
  1250. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1251. esoc_info->modem_current_status = 0;
  1252. esoc_info->modem_notify_handler =
  1253. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1254. esoc_info->esoc_desc->name :
  1255. "modem", &plat_priv->modem_nb);
  1256. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1257. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1258. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1259. ret);
  1260. goto unreg_esoc;
  1261. }
  1262. return 0;
  1263. unreg_esoc:
  1264. if (esoc_info->esoc_desc)
  1265. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1266. out:
  1267. return ret;
  1268. }
  1269. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1270. {
  1271. struct device *dev;
  1272. struct cnss_esoc_info *esoc_info;
  1273. dev = &plat_priv->plat_dev->dev;
  1274. esoc_info = &plat_priv->esoc_info;
  1275. if (esoc_info->notify_modem_status)
  1276. subsys_notif_unregister_notifier
  1277. (esoc_info->modem_notify_handler,
  1278. &plat_priv->modem_nb);
  1279. if (esoc_info->esoc_desc)
  1280. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1281. }
  1282. #else
  1283. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1284. {
  1285. return 0;
  1286. }
  1287. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1288. #endif
  1289. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1290. {
  1291. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1292. int ret = 0;
  1293. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1294. return 0;
  1295. enable_irq(sol_gpio->dev_sol_irq);
  1296. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1297. if (ret)
  1298. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1299. ret);
  1300. return ret;
  1301. }
  1302. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1303. {
  1304. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1305. int ret = 0;
  1306. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1307. return 0;
  1308. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1309. if (ret)
  1310. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1311. ret);
  1312. disable_irq(sol_gpio->dev_sol_irq);
  1313. return ret;
  1314. }
  1315. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1316. {
  1317. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1318. if (sol_gpio->dev_sol_gpio < 0)
  1319. return -EINVAL;
  1320. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1321. }
  1322. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1323. {
  1324. struct cnss_plat_data *plat_priv = data;
  1325. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1326. sol_gpio->dev_sol_counter++;
  1327. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1328. irq, sol_gpio->dev_sol_counter);
  1329. /* Make sure abort current suspend */
  1330. cnss_pm_stay_awake(plat_priv);
  1331. cnss_pm_relax(plat_priv);
  1332. pm_system_wakeup();
  1333. cnss_bus_handle_dev_sol_irq(plat_priv);
  1334. return IRQ_HANDLED;
  1335. }
  1336. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1337. {
  1338. struct device *dev = &plat_priv->plat_dev->dev;
  1339. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1340. int ret = 0;
  1341. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1342. "wlan-dev-sol-gpio", 0);
  1343. if (sol_gpio->dev_sol_gpio < 0)
  1344. goto out;
  1345. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1346. sol_gpio->dev_sol_gpio);
  1347. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1348. if (ret) {
  1349. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1350. ret);
  1351. goto out;
  1352. }
  1353. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1354. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1355. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1356. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1357. if (ret) {
  1358. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1359. goto free_gpio;
  1360. }
  1361. return 0;
  1362. free_gpio:
  1363. gpio_free(sol_gpio->dev_sol_gpio);
  1364. out:
  1365. return ret;
  1366. }
  1367. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1368. {
  1369. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1370. if (sol_gpio->dev_sol_gpio < 0)
  1371. return;
  1372. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1373. gpio_free(sol_gpio->dev_sol_gpio);
  1374. }
  1375. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1376. {
  1377. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1378. if (sol_gpio->host_sol_gpio < 0)
  1379. return -EINVAL;
  1380. if (value)
  1381. cnss_pr_dbg("Assert host SOL GPIO\n");
  1382. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1383. return 0;
  1384. }
  1385. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1386. {
  1387. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1388. if (sol_gpio->host_sol_gpio < 0)
  1389. return -EINVAL;
  1390. return gpio_get_value(sol_gpio->host_sol_gpio);
  1391. }
  1392. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1393. {
  1394. struct device *dev = &plat_priv->plat_dev->dev;
  1395. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1396. int ret = 0;
  1397. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1398. "wlan-host-sol-gpio", 0);
  1399. if (sol_gpio->host_sol_gpio < 0)
  1400. goto out;
  1401. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1402. sol_gpio->host_sol_gpio);
  1403. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1404. if (ret) {
  1405. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1406. ret);
  1407. goto out;
  1408. }
  1409. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1410. return 0;
  1411. out:
  1412. return ret;
  1413. }
  1414. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1415. {
  1416. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1417. if (sol_gpio->host_sol_gpio < 0)
  1418. return;
  1419. gpio_free(sol_gpio->host_sol_gpio);
  1420. }
  1421. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1422. {
  1423. int ret;
  1424. ret = cnss_init_dev_sol_gpio(plat_priv);
  1425. if (ret)
  1426. goto out;
  1427. ret = cnss_init_host_sol_gpio(plat_priv);
  1428. if (ret)
  1429. goto deinit_dev_sol;
  1430. return 0;
  1431. deinit_dev_sol:
  1432. cnss_deinit_dev_sol_gpio(plat_priv);
  1433. out:
  1434. return ret;
  1435. }
  1436. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1437. {
  1438. cnss_deinit_host_sol_gpio(plat_priv);
  1439. cnss_deinit_dev_sol_gpio(plat_priv);
  1440. }
  1441. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1442. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1443. {
  1444. struct cnss_plat_data *plat_priv;
  1445. int ret = 0;
  1446. if (!subsys_desc->dev) {
  1447. cnss_pr_err("dev from subsys_desc is NULL\n");
  1448. return -ENODEV;
  1449. }
  1450. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1451. if (!plat_priv) {
  1452. cnss_pr_err("plat_priv is NULL\n");
  1453. return -ENODEV;
  1454. }
  1455. if (!plat_priv->driver_state) {
  1456. cnss_pr_dbg("subsys powerup is ignored\n");
  1457. return 0;
  1458. }
  1459. ret = cnss_bus_dev_powerup(plat_priv);
  1460. if (ret)
  1461. __pm_relax(plat_priv->recovery_ws);
  1462. return ret;
  1463. }
  1464. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1465. bool force_stop)
  1466. {
  1467. struct cnss_plat_data *plat_priv;
  1468. if (!subsys_desc->dev) {
  1469. cnss_pr_err("dev from subsys_desc is NULL\n");
  1470. return -ENODEV;
  1471. }
  1472. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1473. if (!plat_priv) {
  1474. cnss_pr_err("plat_priv is NULL\n");
  1475. return -ENODEV;
  1476. }
  1477. if (!plat_priv->driver_state) {
  1478. cnss_pr_dbg("subsys shutdown is ignored\n");
  1479. return 0;
  1480. }
  1481. return cnss_bus_dev_shutdown(plat_priv);
  1482. }
  1483. void cnss_device_crashed(struct device *dev)
  1484. {
  1485. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1486. struct cnss_subsys_info *subsys_info;
  1487. if (!plat_priv)
  1488. return;
  1489. subsys_info = &plat_priv->subsys_info;
  1490. if (subsys_info->subsys_device) {
  1491. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1492. subsys_set_crash_status(subsys_info->subsys_device, true);
  1493. subsystem_restart_dev(subsys_info->subsys_device);
  1494. }
  1495. }
  1496. EXPORT_SYMBOL(cnss_device_crashed);
  1497. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1498. {
  1499. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1500. if (!plat_priv) {
  1501. cnss_pr_err("plat_priv is NULL\n");
  1502. return;
  1503. }
  1504. cnss_bus_dev_crash_shutdown(plat_priv);
  1505. }
  1506. static int cnss_subsys_ramdump(int enable,
  1507. const struct subsys_desc *subsys_desc)
  1508. {
  1509. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1510. if (!plat_priv) {
  1511. cnss_pr_err("plat_priv is NULL\n");
  1512. return -ENODEV;
  1513. }
  1514. if (!enable)
  1515. return 0;
  1516. return cnss_bus_dev_ramdump(plat_priv);
  1517. }
  1518. static void cnss_recovery_work_handler(struct work_struct *work)
  1519. {
  1520. }
  1521. #else
  1522. static void cnss_recovery_work_handler(struct work_struct *work)
  1523. {
  1524. int ret;
  1525. struct cnss_plat_data *plat_priv =
  1526. container_of(work, struct cnss_plat_data, recovery_work);
  1527. if (!plat_priv->recovery_enabled)
  1528. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1529. cnss_bus_dev_shutdown(plat_priv);
  1530. cnss_bus_dev_ramdump(plat_priv);
  1531. msleep(POWER_RESET_MIN_DELAY_MS);
  1532. ret = cnss_bus_dev_powerup(plat_priv);
  1533. if (ret)
  1534. __pm_relax(plat_priv->recovery_ws);
  1535. return;
  1536. }
  1537. void cnss_device_crashed(struct device *dev)
  1538. {
  1539. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1540. if (!plat_priv)
  1541. return;
  1542. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1543. schedule_work(&plat_priv->recovery_work);
  1544. }
  1545. EXPORT_SYMBOL(cnss_device_crashed);
  1546. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1547. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1548. {
  1549. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1550. struct cnss_ramdump_info *ramdump_info;
  1551. if (!plat_priv)
  1552. return NULL;
  1553. ramdump_info = &plat_priv->ramdump_info;
  1554. *size = ramdump_info->ramdump_size;
  1555. return ramdump_info->ramdump_va;
  1556. }
  1557. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1558. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1559. {
  1560. switch (reason) {
  1561. case CNSS_REASON_DEFAULT:
  1562. return "DEFAULT";
  1563. case CNSS_REASON_LINK_DOWN:
  1564. return "LINK_DOWN";
  1565. case CNSS_REASON_RDDM:
  1566. return "RDDM";
  1567. case CNSS_REASON_TIMEOUT:
  1568. return "TIMEOUT";
  1569. }
  1570. return "UNKNOWN";
  1571. };
  1572. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1573. enum cnss_recovery_reason reason)
  1574. {
  1575. plat_priv->recovery_count++;
  1576. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1577. goto self_recovery;
  1578. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1579. cnss_pr_dbg("Skip device recovery\n");
  1580. return 0;
  1581. }
  1582. /* FW recovery sequence has multiple steps and firmware load requires
  1583. * linux PM in awake state. Thus hold the cnss wake source until
  1584. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1585. * time taken in this process.
  1586. */
  1587. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1588. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1589. true);
  1590. switch (reason) {
  1591. case CNSS_REASON_LINK_DOWN:
  1592. if (!cnss_bus_check_link_status(plat_priv)) {
  1593. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1594. return 0;
  1595. }
  1596. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1597. &plat_priv->ctrl_params.quirks))
  1598. goto self_recovery;
  1599. if (!cnss_bus_recover_link_down(plat_priv)) {
  1600. /* clear recovery bit here to avoid skipping
  1601. * the recovery work for RDDM later
  1602. */
  1603. clear_bit(CNSS_DRIVER_RECOVERY,
  1604. &plat_priv->driver_state);
  1605. return 0;
  1606. }
  1607. break;
  1608. case CNSS_REASON_RDDM:
  1609. cnss_bus_collect_dump_info(plat_priv, false);
  1610. break;
  1611. case CNSS_REASON_DEFAULT:
  1612. case CNSS_REASON_TIMEOUT:
  1613. break;
  1614. default:
  1615. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1616. cnss_recovery_reason_to_str(reason), reason);
  1617. break;
  1618. }
  1619. cnss_bus_device_crashed(plat_priv);
  1620. return 0;
  1621. self_recovery:
  1622. cnss_pr_dbg("Going for self recovery\n");
  1623. cnss_bus_dev_shutdown(plat_priv);
  1624. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1625. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1626. &plat_priv->ctrl_params.quirks);
  1627. cnss_bus_dev_powerup(plat_priv);
  1628. return 0;
  1629. }
  1630. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1631. void *data)
  1632. {
  1633. struct cnss_recovery_data *recovery_data = data;
  1634. int ret = 0;
  1635. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1636. cnss_recovery_reason_to_str(recovery_data->reason),
  1637. recovery_data->reason);
  1638. if (!plat_priv->driver_state) {
  1639. cnss_pr_err("Improper driver state, ignore recovery\n");
  1640. ret = -EINVAL;
  1641. goto out;
  1642. }
  1643. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1644. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1645. ret = -EINVAL;
  1646. goto out;
  1647. }
  1648. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1649. cnss_pr_err("Recovery is already in progress\n");
  1650. CNSS_ASSERT(0);
  1651. ret = -EINVAL;
  1652. goto out;
  1653. }
  1654. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1655. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1656. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1657. ret = -EINVAL;
  1658. goto out;
  1659. }
  1660. switch (plat_priv->device_id) {
  1661. case QCA6174_DEVICE_ID:
  1662. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1663. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1664. &plat_priv->driver_state)) {
  1665. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1666. ret = -EINVAL;
  1667. goto out;
  1668. }
  1669. break;
  1670. default:
  1671. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1672. set_bit(CNSS_FW_BOOT_RECOVERY,
  1673. &plat_priv->driver_state);
  1674. }
  1675. break;
  1676. }
  1677. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1678. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1679. out:
  1680. kfree(data);
  1681. return ret;
  1682. }
  1683. int cnss_self_recovery(struct device *dev,
  1684. enum cnss_recovery_reason reason)
  1685. {
  1686. cnss_schedule_recovery(dev, reason);
  1687. return 0;
  1688. }
  1689. EXPORT_SYMBOL(cnss_self_recovery);
  1690. void cnss_schedule_recovery(struct device *dev,
  1691. enum cnss_recovery_reason reason)
  1692. {
  1693. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1694. struct cnss_recovery_data *data;
  1695. int gfp = GFP_KERNEL;
  1696. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1697. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1698. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1699. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1700. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1701. return;
  1702. }
  1703. if (in_interrupt() || irqs_disabled())
  1704. gfp = GFP_ATOMIC;
  1705. data = kzalloc(sizeof(*data), gfp);
  1706. if (!data)
  1707. return;
  1708. data->reason = reason;
  1709. cnss_driver_event_post(plat_priv,
  1710. CNSS_DRIVER_EVENT_RECOVERY,
  1711. 0, data);
  1712. }
  1713. EXPORT_SYMBOL(cnss_schedule_recovery);
  1714. int cnss_force_fw_assert(struct device *dev)
  1715. {
  1716. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1717. if (!plat_priv) {
  1718. cnss_pr_err("plat_priv is NULL\n");
  1719. return -ENODEV;
  1720. }
  1721. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1722. cnss_pr_info("Forced FW assert is not supported\n");
  1723. return -EOPNOTSUPP;
  1724. }
  1725. if (cnss_bus_is_device_down(plat_priv)) {
  1726. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1727. return 0;
  1728. }
  1729. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1730. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1731. return 0;
  1732. }
  1733. if (in_interrupt() || irqs_disabled())
  1734. cnss_driver_event_post(plat_priv,
  1735. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1736. 0, NULL);
  1737. else
  1738. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1739. return 0;
  1740. }
  1741. EXPORT_SYMBOL(cnss_force_fw_assert);
  1742. int cnss_force_collect_rddm(struct device *dev)
  1743. {
  1744. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1745. unsigned int timeout;
  1746. int ret = 0;
  1747. if (!plat_priv) {
  1748. cnss_pr_err("plat_priv is NULL\n");
  1749. return -ENODEV;
  1750. }
  1751. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1752. cnss_pr_info("Force collect rddm is not supported\n");
  1753. return -EOPNOTSUPP;
  1754. }
  1755. if (cnss_bus_is_device_down(plat_priv)) {
  1756. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1757. goto wait_rddm;
  1758. }
  1759. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1760. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1761. goto wait_rddm;
  1762. }
  1763. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1764. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1765. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1766. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1767. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1768. return 0;
  1769. }
  1770. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1771. if (ret)
  1772. return ret;
  1773. wait_rddm:
  1774. reinit_completion(&plat_priv->rddm_complete);
  1775. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1776. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1777. msecs_to_jiffies(timeout));
  1778. if (!ret) {
  1779. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1780. timeout);
  1781. ret = -ETIMEDOUT;
  1782. } else if (ret > 0) {
  1783. ret = 0;
  1784. }
  1785. return ret;
  1786. }
  1787. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1788. int cnss_qmi_send_get(struct device *dev)
  1789. {
  1790. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1791. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1792. return 0;
  1793. return cnss_bus_qmi_send_get(plat_priv);
  1794. }
  1795. EXPORT_SYMBOL(cnss_qmi_send_get);
  1796. int cnss_qmi_send_put(struct device *dev)
  1797. {
  1798. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1799. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1800. return 0;
  1801. return cnss_bus_qmi_send_put(plat_priv);
  1802. }
  1803. EXPORT_SYMBOL(cnss_qmi_send_put);
  1804. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1805. int cmd_len, void *cb_ctx,
  1806. int (*cb)(void *ctx, void *event, int event_len))
  1807. {
  1808. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1809. int ret;
  1810. if (!plat_priv)
  1811. return -ENODEV;
  1812. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1813. return -EINVAL;
  1814. plat_priv->get_info_cb = cb;
  1815. plat_priv->get_info_cb_ctx = cb_ctx;
  1816. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1817. if (ret) {
  1818. plat_priv->get_info_cb = NULL;
  1819. plat_priv->get_info_cb_ctx = NULL;
  1820. }
  1821. return ret;
  1822. }
  1823. EXPORT_SYMBOL(cnss_qmi_send);
  1824. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1825. {
  1826. int ret = 0;
  1827. u32 retry = 0, timeout;
  1828. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1829. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1830. goto out;
  1831. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1832. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1833. goto out;
  1834. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1835. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1836. goto out;
  1837. }
  1838. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1839. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1840. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1841. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1842. CNSS_ASSERT(0);
  1843. return -EINVAL;
  1844. }
  1845. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1846. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1847. break;
  1848. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1849. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1850. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1851. CNSS_ASSERT(0);
  1852. ret = -EINVAL;
  1853. goto mark_cal_fail;
  1854. }
  1855. }
  1856. switch (plat_priv->device_id) {
  1857. case QCA6290_DEVICE_ID:
  1858. case QCA6390_DEVICE_ID:
  1859. case QCA6490_DEVICE_ID:
  1860. case KIWI_DEVICE_ID:
  1861. case MANGO_DEVICE_ID:
  1862. case PEACH_DEVICE_ID:
  1863. break;
  1864. default:
  1865. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1866. plat_priv->device_id);
  1867. ret = -EINVAL;
  1868. goto mark_cal_fail;
  1869. }
  1870. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1871. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1872. timeout = cnss_get_timeout(plat_priv,
  1873. CNSS_TIMEOUT_CALIBRATION);
  1874. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1875. timeout / 1000);
  1876. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1877. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1878. msecs_to_jiffies(timeout));
  1879. }
  1880. reinit_completion(&plat_priv->cal_complete);
  1881. ret = cnss_bus_dev_powerup(plat_priv);
  1882. mark_cal_fail:
  1883. if (ret) {
  1884. complete(&plat_priv->cal_complete);
  1885. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1886. /* Set CBC done in driver state to mark attempt and note error
  1887. * since calibration cannot be retried at boot.
  1888. */
  1889. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1890. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1891. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1892. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1893. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1894. goto out;
  1895. cnss_pr_info("Schedule WLAN driver load\n");
  1896. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1897. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1898. 0);
  1899. }
  1900. }
  1901. out:
  1902. return ret;
  1903. }
  1904. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1905. void *data)
  1906. {
  1907. struct cnss_cal_info *cal_info = data;
  1908. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1909. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1910. goto out;
  1911. switch (cal_info->cal_status) {
  1912. case CNSS_CAL_DONE:
  1913. cnss_pr_dbg("Calibration completed successfully\n");
  1914. plat_priv->cal_done = true;
  1915. break;
  1916. case CNSS_CAL_TIMEOUT:
  1917. case CNSS_CAL_FAILURE:
  1918. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1919. cal_info->cal_status);
  1920. break;
  1921. default:
  1922. cnss_pr_err("Unknown calibration status: %u\n",
  1923. cal_info->cal_status);
  1924. break;
  1925. }
  1926. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1927. cnss_bus_free_qdss_mem(plat_priv);
  1928. cnss_release_antenna_sharing(plat_priv);
  1929. cnss_bus_dev_shutdown(plat_priv);
  1930. msleep(POWER_RESET_MIN_DELAY_MS);
  1931. complete(&plat_priv->cal_complete);
  1932. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1933. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1934. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1935. cnss_cal_mem_upload_to_file(plat_priv);
  1936. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1937. goto out;
  1938. cnss_pr_dbg("Schedule WLAN driver load\n");
  1939. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1940. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1941. 0);
  1942. }
  1943. out:
  1944. kfree(data);
  1945. return 0;
  1946. }
  1947. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1948. {
  1949. int ret;
  1950. ret = cnss_bus_dev_powerup(plat_priv);
  1951. if (ret)
  1952. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1953. return ret;
  1954. }
  1955. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1956. {
  1957. cnss_bus_dev_shutdown(plat_priv);
  1958. return 0;
  1959. }
  1960. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1961. {
  1962. int ret = 0;
  1963. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1964. if (ret < 0)
  1965. return ret;
  1966. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1967. }
  1968. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1969. u32 mem_seg_len, u64 pa, u32 size)
  1970. {
  1971. int i = 0;
  1972. u64 offset = 0;
  1973. void *va = NULL;
  1974. u64 local_pa;
  1975. u32 local_size;
  1976. for (i = 0; i < mem_seg_len; i++) {
  1977. local_pa = (u64)fw_mem[i].pa;
  1978. local_size = (u32)fw_mem[i].size;
  1979. if (pa == local_pa && size <= local_size) {
  1980. va = fw_mem[i].va;
  1981. break;
  1982. }
  1983. if (pa > local_pa &&
  1984. pa < local_pa + local_size &&
  1985. pa + size <= local_pa + local_size) {
  1986. offset = pa - local_pa;
  1987. va = fw_mem[i].va + offset;
  1988. break;
  1989. }
  1990. }
  1991. return va;
  1992. }
  1993. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1994. void *data)
  1995. {
  1996. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  1997. struct cnss_fw_mem *fw_mem_seg;
  1998. int ret = 0L;
  1999. void *va = NULL;
  2000. u32 i, fw_mem_seg_len;
  2001. switch (event_data->mem_type) {
  2002. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2003. if (!plat_priv->fw_mem_seg_len)
  2004. goto invalid_mem_save;
  2005. fw_mem_seg = plat_priv->fw_mem;
  2006. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2007. break;
  2008. case QMI_WLFW_MEM_QDSS_V01:
  2009. if (!plat_priv->qdss_mem_seg_len)
  2010. goto invalid_mem_save;
  2011. fw_mem_seg = plat_priv->qdss_mem;
  2012. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2013. break;
  2014. default:
  2015. goto invalid_mem_save;
  2016. }
  2017. for (i = 0; i < event_data->mem_seg_len; i++) {
  2018. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2019. event_data->mem_seg[i].addr,
  2020. event_data->mem_seg[i].size);
  2021. if (!va) {
  2022. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2023. &event_data->mem_seg[i].addr,
  2024. event_data->mem_type);
  2025. ret = -EINVAL;
  2026. break;
  2027. }
  2028. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2029. event_data->file_name,
  2030. event_data->mem_seg[i].size);
  2031. if (ret < 0) {
  2032. cnss_pr_err("Fail to save fw mem data: %d\n",
  2033. ret);
  2034. break;
  2035. }
  2036. }
  2037. kfree(data);
  2038. return ret;
  2039. invalid_mem_save:
  2040. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2041. event_data->mem_type);
  2042. kfree(data);
  2043. return -EINVAL;
  2044. }
  2045. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2046. {
  2047. cnss_bus_free_qdss_mem(plat_priv);
  2048. return 0;
  2049. }
  2050. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2051. void *data)
  2052. {
  2053. int ret = 0;
  2054. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2055. if (!plat_priv)
  2056. return -ENODEV;
  2057. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2058. event_data->total_size);
  2059. kfree(data);
  2060. return ret;
  2061. }
  2062. static void cnss_driver_event_work(struct work_struct *work)
  2063. {
  2064. struct cnss_plat_data *plat_priv =
  2065. container_of(work, struct cnss_plat_data, event_work);
  2066. struct cnss_driver_event *event;
  2067. unsigned long flags;
  2068. int ret = 0;
  2069. if (!plat_priv) {
  2070. cnss_pr_err("plat_priv is NULL!\n");
  2071. return;
  2072. }
  2073. cnss_pm_stay_awake(plat_priv);
  2074. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2075. while (!list_empty(&plat_priv->event_list)) {
  2076. event = list_first_entry(&plat_priv->event_list,
  2077. struct cnss_driver_event, list);
  2078. list_del(&event->list);
  2079. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2080. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2081. cnss_driver_event_to_str(event->type),
  2082. event->sync ? "-sync" : "", event->type,
  2083. plat_priv->driver_state);
  2084. switch (event->type) {
  2085. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2086. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2087. break;
  2088. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2089. ret = cnss_wlfw_server_exit(plat_priv);
  2090. break;
  2091. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2092. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2093. if (ret)
  2094. break;
  2095. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2096. break;
  2097. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2098. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2099. break;
  2100. case CNSS_DRIVER_EVENT_FW_READY:
  2101. ret = cnss_fw_ready_hdlr(plat_priv);
  2102. break;
  2103. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2104. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2105. break;
  2106. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2107. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2108. event->data);
  2109. break;
  2110. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2111. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2112. event->data);
  2113. break;
  2114. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2115. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2116. break;
  2117. case CNSS_DRIVER_EVENT_RECOVERY:
  2118. ret = cnss_driver_recovery_hdlr(plat_priv,
  2119. event->data);
  2120. break;
  2121. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2122. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2123. break;
  2124. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2125. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2126. &plat_priv->driver_state);
  2127. fallthrough;
  2128. case CNSS_DRIVER_EVENT_POWER_UP:
  2129. ret = cnss_power_up_hdlr(plat_priv);
  2130. break;
  2131. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2132. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2133. &plat_priv->driver_state);
  2134. fallthrough;
  2135. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2136. ret = cnss_power_down_hdlr(plat_priv);
  2137. break;
  2138. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2139. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2140. event->data);
  2141. break;
  2142. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2143. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2144. event->data);
  2145. break;
  2146. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2147. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2148. break;
  2149. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2150. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2151. event->data);
  2152. break;
  2153. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2154. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2155. break;
  2156. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2157. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2158. event->data);
  2159. break;
  2160. default:
  2161. cnss_pr_err("Invalid driver event type: %d",
  2162. event->type);
  2163. kfree(event);
  2164. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2165. continue;
  2166. }
  2167. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2168. if (event->sync) {
  2169. event->ret = ret;
  2170. complete(&event->complete);
  2171. continue;
  2172. }
  2173. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2174. kfree(event);
  2175. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2176. }
  2177. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2178. cnss_pm_relax(plat_priv);
  2179. }
  2180. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2181. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2182. {
  2183. int ret = 0;
  2184. struct cnss_subsys_info *subsys_info;
  2185. subsys_info = &plat_priv->subsys_info;
  2186. subsys_info->subsys_desc.name = plat_priv->device_name;
  2187. subsys_info->subsys_desc.owner = THIS_MODULE;
  2188. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2189. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2190. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2191. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2192. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2193. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2194. if (IS_ERR(subsys_info->subsys_device)) {
  2195. ret = PTR_ERR(subsys_info->subsys_device);
  2196. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2197. goto out;
  2198. }
  2199. subsys_info->subsys_handle =
  2200. subsystem_get(subsys_info->subsys_desc.name);
  2201. if (!subsys_info->subsys_handle) {
  2202. cnss_pr_err("Failed to get subsys_handle!\n");
  2203. ret = -EINVAL;
  2204. goto unregister_subsys;
  2205. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2206. ret = PTR_ERR(subsys_info->subsys_handle);
  2207. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2208. goto unregister_subsys;
  2209. }
  2210. return 0;
  2211. unregister_subsys:
  2212. subsys_unregister(subsys_info->subsys_device);
  2213. out:
  2214. return ret;
  2215. }
  2216. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2217. {
  2218. struct cnss_subsys_info *subsys_info;
  2219. subsys_info = &plat_priv->subsys_info;
  2220. subsystem_put(subsys_info->subsys_handle);
  2221. subsys_unregister(subsys_info->subsys_device);
  2222. }
  2223. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2224. {
  2225. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2226. return create_ramdump_device(subsys_info->subsys_desc.name,
  2227. subsys_info->subsys_desc.dev);
  2228. }
  2229. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2230. void *ramdump_dev)
  2231. {
  2232. destroy_ramdump_device(ramdump_dev);
  2233. }
  2234. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2235. {
  2236. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2237. struct ramdump_segment segment;
  2238. memset(&segment, 0, sizeof(segment));
  2239. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2240. segment.size = ramdump_info->ramdump_size;
  2241. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2242. }
  2243. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2244. {
  2245. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2246. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2247. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2248. struct ramdump_segment *ramdump_segs, *s;
  2249. struct cnss_dump_meta_info meta_info = {0};
  2250. int i, ret = 0;
  2251. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2252. sizeof(*ramdump_segs),
  2253. GFP_KERNEL);
  2254. if (!ramdump_segs)
  2255. return -ENOMEM;
  2256. s = ramdump_segs + 1;
  2257. for (i = 0; i < dump_data->nentries; i++) {
  2258. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2259. cnss_pr_err("Unsupported dump type: %d",
  2260. dump_seg->type);
  2261. continue;
  2262. }
  2263. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2264. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2265. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2266. }
  2267. meta_info.entry[dump_seg->type].entry_num++;
  2268. s->address = dump_seg->address;
  2269. s->v_address = (void __iomem *)dump_seg->v_address;
  2270. s->size = dump_seg->size;
  2271. s++;
  2272. dump_seg++;
  2273. }
  2274. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2275. meta_info.version = CNSS_RAMDUMP_VERSION;
  2276. meta_info.chipset = plat_priv->device_id;
  2277. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2278. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2279. ramdump_segs->size = sizeof(meta_info);
  2280. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2281. dump_data->nentries + 1);
  2282. kfree(ramdump_segs);
  2283. return ret;
  2284. }
  2285. #else
  2286. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2287. void *data)
  2288. {
  2289. struct cnss_plat_data *plat_priv =
  2290. container_of(nb, struct cnss_plat_data, panic_nb);
  2291. cnss_bus_dev_crash_shutdown(plat_priv);
  2292. return NOTIFY_DONE;
  2293. }
  2294. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2295. {
  2296. int ret;
  2297. if (!plat_priv)
  2298. return -ENODEV;
  2299. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2300. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2301. &plat_priv->panic_nb);
  2302. if (ret) {
  2303. cnss_pr_err("Failed to register panic handler\n");
  2304. return -EINVAL;
  2305. }
  2306. return 0;
  2307. }
  2308. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2309. {
  2310. int ret;
  2311. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2312. &plat_priv->panic_nb);
  2313. if (ret)
  2314. cnss_pr_err("Failed to unregister panic handler\n");
  2315. }
  2316. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2317. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2318. {
  2319. return &plat_priv->plat_dev->dev;
  2320. }
  2321. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2322. void *ramdump_dev)
  2323. {
  2324. }
  2325. #endif
  2326. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2327. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2328. {
  2329. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2330. struct qcom_dump_segment segment;
  2331. struct list_head head;
  2332. INIT_LIST_HEAD(&head);
  2333. memset(&segment, 0, sizeof(segment));
  2334. segment.va = ramdump_info->ramdump_va;
  2335. segment.size = ramdump_info->ramdump_size;
  2336. list_add(&segment.node, &head);
  2337. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2338. }
  2339. #else
  2340. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2341. {
  2342. return 0;
  2343. }
  2344. /* Using completion event inside dynamically allocated ramdump_desc
  2345. * may result a race between freeing the event after setting it to
  2346. * complete inside dev coredump free callback and the thread that is
  2347. * waiting for completion.
  2348. */
  2349. DECLARE_COMPLETION(dump_done);
  2350. #define TIMEOUT_SAVE_DUMP_MS 30000
  2351. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2352. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2353. { \
  2354. if (class == ELFCLASS32) \
  2355. return sizeof(struct elf32_##__xhdr); \
  2356. else \
  2357. return sizeof(struct elf64_##__xhdr); \
  2358. }
  2359. SIZEOF_ELF_STRUCT(phdr)
  2360. SIZEOF_ELF_STRUCT(hdr)
  2361. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2362. do { \
  2363. if (class == ELFCLASS32) \
  2364. ((struct elf32_##__xhdr *)arg)->member = value; \
  2365. else \
  2366. ((struct elf64_##__xhdr *)arg)->member = value; \
  2367. } while (0)
  2368. #define set_ehdr_property(arg, class, member, value) \
  2369. set_xhdr_property(hdr, arg, class, member, value)
  2370. #define set_phdr_property(arg, class, member, value) \
  2371. set_xhdr_property(phdr, arg, class, member, value)
  2372. /* These replace qcom_ramdump driver APIs called from common API
  2373. * cnss_do_elf_dump() by the ones defined here.
  2374. */
  2375. #define qcom_dump_segment cnss_qcom_dump_segment
  2376. #define qcom_elf_dump cnss_qcom_elf_dump
  2377. #define dump_enabled cnss_dump_enabled
  2378. struct cnss_qcom_dump_segment {
  2379. struct list_head node;
  2380. dma_addr_t da;
  2381. void *va;
  2382. size_t size;
  2383. };
  2384. struct cnss_qcom_ramdump_desc {
  2385. void *data;
  2386. struct completion dump_done;
  2387. };
  2388. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2389. void *data, size_t datalen)
  2390. {
  2391. struct cnss_qcom_ramdump_desc *desc = data;
  2392. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2393. datalen);
  2394. }
  2395. static void cnss_qcom_devcd_freev(void *data)
  2396. {
  2397. struct cnss_qcom_ramdump_desc *desc = data;
  2398. cnss_pr_dbg("Free dump data for dev coredump\n");
  2399. complete(&dump_done);
  2400. vfree(desc->data);
  2401. kfree(desc);
  2402. }
  2403. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2404. gfp_t gfp)
  2405. {
  2406. struct cnss_qcom_ramdump_desc *desc;
  2407. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2408. int ret;
  2409. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2410. if (!desc)
  2411. return -ENOMEM;
  2412. desc->data = data;
  2413. reinit_completion(&dump_done);
  2414. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2415. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2416. ret = wait_for_completion_timeout(&dump_done,
  2417. msecs_to_jiffies(timeout));
  2418. if (!ret)
  2419. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2420. timeout);
  2421. return ret ? 0 : -ETIMEDOUT;
  2422. }
  2423. /* Since the elf32 and elf64 identification is identical apart from
  2424. * the class, use elf32 by default.
  2425. */
  2426. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2427. {
  2428. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2429. ehdr->e_ident[EI_CLASS] = class;
  2430. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2431. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2432. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2433. }
  2434. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2435. unsigned char class)
  2436. {
  2437. struct cnss_qcom_dump_segment *segment;
  2438. void *phdr, *ehdr;
  2439. size_t data_size, offset;
  2440. int phnum = 0;
  2441. void *data;
  2442. void __iomem *ptr;
  2443. if (!segs || list_empty(segs))
  2444. return -EINVAL;
  2445. data_size = sizeof_elf_hdr(class);
  2446. list_for_each_entry(segment, segs, node) {
  2447. data_size += sizeof_elf_phdr(class) + segment->size;
  2448. phnum++;
  2449. }
  2450. data = vmalloc(data_size);
  2451. if (!data)
  2452. return -ENOMEM;
  2453. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2454. ehdr = data;
  2455. memset(ehdr, 0, sizeof_elf_hdr(class));
  2456. init_elf_identification(ehdr, class);
  2457. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2458. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2459. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2460. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2461. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2462. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2463. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2464. phdr = data + sizeof_elf_hdr(class);
  2465. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2466. list_for_each_entry(segment, segs, node) {
  2467. memset(phdr, 0, sizeof_elf_phdr(class));
  2468. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2469. set_phdr_property(phdr, class, p_offset, offset);
  2470. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2471. set_phdr_property(phdr, class, p_paddr, segment->da);
  2472. set_phdr_property(phdr, class, p_filesz, segment->size);
  2473. set_phdr_property(phdr, class, p_memsz, segment->size);
  2474. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2475. set_phdr_property(phdr, class, p_align, 0);
  2476. if (segment->va) {
  2477. memcpy(data + offset, segment->va, segment->size);
  2478. } else {
  2479. ptr = devm_ioremap(dev, segment->da, segment->size);
  2480. if (!ptr) {
  2481. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2482. &segment->da, segment->size);
  2483. memset(data + offset, 0xff, segment->size);
  2484. } else {
  2485. memcpy_fromio(data + offset, ptr,
  2486. segment->size);
  2487. }
  2488. }
  2489. offset += segment->size;
  2490. phdr += sizeof_elf_phdr(class);
  2491. }
  2492. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2493. }
  2494. /* Saving dump to file system is always needed in this case. */
  2495. static bool cnss_dump_enabled(void)
  2496. {
  2497. return true;
  2498. }
  2499. #endif /* CONFIG_QCOM_RAMDUMP */
  2500. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2501. {
  2502. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2503. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2504. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2505. struct qcom_dump_segment *seg;
  2506. struct cnss_dump_meta_info meta_info = {0};
  2507. struct list_head head;
  2508. int i, ret = 0;
  2509. if (!dump_enabled()) {
  2510. cnss_pr_info("Dump collection is not enabled\n");
  2511. return ret;
  2512. }
  2513. INIT_LIST_HEAD(&head);
  2514. for (i = 0; i < dump_data->nentries; i++) {
  2515. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2516. cnss_pr_err("Unsupported dump type: %d",
  2517. dump_seg->type);
  2518. continue;
  2519. }
  2520. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2521. if (!seg)
  2522. continue;
  2523. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2524. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2525. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2526. }
  2527. meta_info.entry[dump_seg->type].entry_num++;
  2528. seg->da = dump_seg->address;
  2529. seg->va = dump_seg->v_address;
  2530. seg->size = dump_seg->size;
  2531. list_add_tail(&seg->node, &head);
  2532. dump_seg++;
  2533. }
  2534. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2535. if (!seg)
  2536. goto do_elf_dump;
  2537. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2538. meta_info.version = CNSS_RAMDUMP_VERSION;
  2539. meta_info.chipset = plat_priv->device_id;
  2540. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2541. seg->va = &meta_info;
  2542. seg->size = sizeof(meta_info);
  2543. list_add(&seg->node, &head);
  2544. do_elf_dump:
  2545. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2546. while (!list_empty(&head)) {
  2547. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2548. list_del(&seg->node);
  2549. kfree(seg);
  2550. }
  2551. return ret;
  2552. }
  2553. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2554. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2555. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2556. size_t num_entries_loaded)
  2557. {
  2558. struct qcom_dump_segment *seg;
  2559. struct cnss_host_dump_meta_info meta_info = {0};
  2560. struct list_head head;
  2561. int dev_ret = 0;
  2562. struct device *new_device;
  2563. static const char * const wlan_str[] = {
  2564. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2565. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2566. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2567. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2568. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2569. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2570. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2571. [CNSS_HOST_WMI_HANG_DATA] = "wmi_hang_data",
  2572. [CNSS_HOST_CE_HANG_EVT] = "ce_hang_evt",
  2573. [CNSS_HOST_PEER_MAC_ADDR_HANG_DATA] = "peer_mac_addr_hang_data",
  2574. [CNSS_HOST_CP_VDEV_INFO] = "cp_vdev_info",
  2575. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2576. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2577. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2578. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2579. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2580. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2581. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2582. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx"
  2583. };
  2584. int i, j;
  2585. int ret = 0;
  2586. if (!dump_enabled()) {
  2587. cnss_pr_info("Dump collection is not enabled\n");
  2588. return ret;
  2589. }
  2590. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2591. if (!new_device) {
  2592. cnss_pr_err("Failed to alloc device mem\n");
  2593. return -ENOMEM;
  2594. }
  2595. device_initialize(new_device);
  2596. dev_set_name(new_device, "wlan_driver");
  2597. dev_ret = device_add(new_device);
  2598. if (dev_ret) {
  2599. cnss_pr_err("Failed to add new device\n");
  2600. goto put_device;
  2601. }
  2602. INIT_LIST_HEAD(&head);
  2603. for (i = 0; i < num_entries_loaded; i++) {
  2604. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2605. if (!seg) {
  2606. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2607. continue;
  2608. }
  2609. seg->va = ssr_entry[i].buffer_pointer;
  2610. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2611. seg->size = ssr_entry[i].buffer_size;
  2612. for (j = 0; j < ARRAY_SIZE(wlan_str); j++) {
  2613. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2614. strlen(wlan_str[j])) == 0) {
  2615. meta_info.entry[i].type = j;
  2616. }
  2617. }
  2618. meta_info.entry[i].entry_start = i + 1;
  2619. meta_info.entry[i].entry_num++;
  2620. list_add_tail(&seg->node, &head);
  2621. }
  2622. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2623. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2624. meta_info.version = CNSS_RAMDUMP_VERSION;
  2625. meta_info.chipset = plat_priv->device_id;
  2626. meta_info.total_entries = num_entries_loaded;
  2627. seg->va = &meta_info;
  2628. seg->da = (dma_addr_t)&meta_info;
  2629. seg->size = sizeof(meta_info);
  2630. list_add(&seg->node, &head);
  2631. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2632. while (!list_empty(&head)) {
  2633. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2634. list_del(&seg->node);
  2635. kfree(seg);
  2636. }
  2637. device_del(new_device);
  2638. put_device:
  2639. put_device(new_device);
  2640. kfree(new_device);
  2641. return ret;
  2642. }
  2643. #endif
  2644. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2645. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2646. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2647. {
  2648. struct cnss_ramdump_info *ramdump_info;
  2649. struct msm_dump_entry dump_entry;
  2650. ramdump_info = &plat_priv->ramdump_info;
  2651. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2652. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2653. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2654. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2655. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2656. sizeof(ramdump_info->dump_data.name));
  2657. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2658. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2659. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2660. &dump_entry);
  2661. }
  2662. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2663. {
  2664. int ret = 0;
  2665. struct device *dev;
  2666. struct cnss_ramdump_info *ramdump_info;
  2667. u32 ramdump_size = 0;
  2668. dev = &plat_priv->plat_dev->dev;
  2669. ramdump_info = &plat_priv->ramdump_info;
  2670. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2671. /* dt type: legacy or converged */
  2672. ret = of_property_read_u32(dev->of_node,
  2673. "qcom,wlan-ramdump-dynamic",
  2674. &ramdump_size);
  2675. } else {
  2676. ret = of_property_read_u32(plat_priv->dev_node,
  2677. "qcom,wlan-ramdump-dynamic",
  2678. &ramdump_size);
  2679. }
  2680. if (ret == 0) {
  2681. ramdump_info->ramdump_va =
  2682. dma_alloc_coherent(dev, ramdump_size,
  2683. &ramdump_info->ramdump_pa,
  2684. GFP_KERNEL);
  2685. if (ramdump_info->ramdump_va)
  2686. ramdump_info->ramdump_size = ramdump_size;
  2687. }
  2688. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2689. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2690. if (ramdump_info->ramdump_size == 0) {
  2691. cnss_pr_info("Ramdump will not be collected");
  2692. goto out;
  2693. }
  2694. ret = cnss_init_dump_entry(plat_priv);
  2695. if (ret) {
  2696. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2697. goto free_ramdump;
  2698. }
  2699. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2700. if (!ramdump_info->ramdump_dev) {
  2701. cnss_pr_err("Failed to create ramdump device!");
  2702. ret = -ENOMEM;
  2703. goto free_ramdump;
  2704. }
  2705. return 0;
  2706. free_ramdump:
  2707. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2708. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2709. out:
  2710. return ret;
  2711. }
  2712. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2713. {
  2714. struct device *dev;
  2715. struct cnss_ramdump_info *ramdump_info;
  2716. dev = &plat_priv->plat_dev->dev;
  2717. ramdump_info = &plat_priv->ramdump_info;
  2718. if (ramdump_info->ramdump_dev)
  2719. cnss_destroy_ramdump_device(plat_priv,
  2720. ramdump_info->ramdump_dev);
  2721. if (ramdump_info->ramdump_va)
  2722. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2723. ramdump_info->ramdump_va,
  2724. ramdump_info->ramdump_pa);
  2725. }
  2726. /**
  2727. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2728. * @ret: Error returned by msm_dump_data_register_nominidump
  2729. *
  2730. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2731. * ignore failure.
  2732. *
  2733. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2734. */
  2735. static int cnss_ignore_dump_data_reg_fail(int ret)
  2736. {
  2737. return ret;
  2738. }
  2739. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2740. {
  2741. int ret = 0;
  2742. struct cnss_ramdump_info_v2 *info_v2;
  2743. struct cnss_dump_data *dump_data;
  2744. struct msm_dump_entry dump_entry;
  2745. struct device *dev = &plat_priv->plat_dev->dev;
  2746. u32 ramdump_size = 0;
  2747. info_v2 = &plat_priv->ramdump_info_v2;
  2748. dump_data = &info_v2->dump_data;
  2749. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2750. /* dt type: legacy or converged */
  2751. ret = of_property_read_u32(dev->of_node,
  2752. "qcom,wlan-ramdump-dynamic",
  2753. &ramdump_size);
  2754. } else {
  2755. ret = of_property_read_u32(plat_priv->dev_node,
  2756. "qcom,wlan-ramdump-dynamic",
  2757. &ramdump_size);
  2758. }
  2759. if (ret == 0)
  2760. info_v2->ramdump_size = ramdump_size;
  2761. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2762. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2763. if (!info_v2->dump_data_vaddr)
  2764. return -ENOMEM;
  2765. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2766. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2767. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2768. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2769. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2770. sizeof(dump_data->name));
  2771. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2772. dump_entry.addr = virt_to_phys(dump_data);
  2773. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2774. &dump_entry);
  2775. if (ret) {
  2776. ret = cnss_ignore_dump_data_reg_fail(ret);
  2777. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2778. ret ? "Error" : "Ignoring", ret);
  2779. goto free_ramdump;
  2780. }
  2781. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2782. if (!info_v2->ramdump_dev) {
  2783. cnss_pr_err("Failed to create ramdump device!\n");
  2784. ret = -ENOMEM;
  2785. goto free_ramdump;
  2786. }
  2787. return 0;
  2788. free_ramdump:
  2789. kfree(info_v2->dump_data_vaddr);
  2790. info_v2->dump_data_vaddr = NULL;
  2791. return ret;
  2792. }
  2793. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2794. {
  2795. struct cnss_ramdump_info_v2 *info_v2;
  2796. info_v2 = &plat_priv->ramdump_info_v2;
  2797. if (info_v2->ramdump_dev)
  2798. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2799. kfree(info_v2->dump_data_vaddr);
  2800. info_v2->dump_data_vaddr = NULL;
  2801. info_v2->dump_data_valid = false;
  2802. }
  2803. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2804. {
  2805. int ret = 0;
  2806. switch (plat_priv->device_id) {
  2807. case QCA6174_DEVICE_ID:
  2808. ret = cnss_register_ramdump_v1(plat_priv);
  2809. break;
  2810. case QCA6290_DEVICE_ID:
  2811. case QCA6390_DEVICE_ID:
  2812. case QCA6490_DEVICE_ID:
  2813. case KIWI_DEVICE_ID:
  2814. case MANGO_DEVICE_ID:
  2815. case PEACH_DEVICE_ID:
  2816. ret = cnss_register_ramdump_v2(plat_priv);
  2817. break;
  2818. default:
  2819. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2820. ret = -ENODEV;
  2821. break;
  2822. }
  2823. return ret;
  2824. }
  2825. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2826. {
  2827. switch (plat_priv->device_id) {
  2828. case QCA6174_DEVICE_ID:
  2829. cnss_unregister_ramdump_v1(plat_priv);
  2830. break;
  2831. case QCA6290_DEVICE_ID:
  2832. case QCA6390_DEVICE_ID:
  2833. case QCA6490_DEVICE_ID:
  2834. case KIWI_DEVICE_ID:
  2835. case MANGO_DEVICE_ID:
  2836. case PEACH_DEVICE_ID:
  2837. cnss_unregister_ramdump_v2(plat_priv);
  2838. break;
  2839. default:
  2840. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2841. break;
  2842. }
  2843. }
  2844. #else
  2845. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2846. {
  2847. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2848. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2849. struct device *dev = &plat_priv->plat_dev->dev;
  2850. u32 ramdump_size = 0;
  2851. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2852. &ramdump_size) == 0)
  2853. info_v2->ramdump_size = ramdump_size;
  2854. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2855. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2856. if (!info_v2->dump_data_vaddr)
  2857. return -ENOMEM;
  2858. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2859. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2860. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2861. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2862. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2863. sizeof(dump_data->name));
  2864. info_v2->ramdump_dev = dev;
  2865. return 0;
  2866. }
  2867. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2868. {
  2869. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2870. info_v2->ramdump_dev = NULL;
  2871. kfree(info_v2->dump_data_vaddr);
  2872. info_v2->dump_data_vaddr = NULL;
  2873. info_v2->dump_data_valid = false;
  2874. }
  2875. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2876. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2877. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2878. phys_addr_t *pa, unsigned long attrs)
  2879. {
  2880. struct sg_table sgt;
  2881. int ret;
  2882. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2883. if (ret) {
  2884. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2885. va, &dma, size, attrs);
  2886. return -EINVAL;
  2887. }
  2888. *pa = page_to_phys(sg_page(sgt.sgl));
  2889. sg_free_table(&sgt);
  2890. return 0;
  2891. }
  2892. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2893. enum cnss_fw_dump_type type, int seg_no,
  2894. void *va, phys_addr_t pa, size_t size)
  2895. {
  2896. struct md_region md_entry;
  2897. int ret;
  2898. switch (type) {
  2899. case CNSS_FW_IMAGE:
  2900. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2901. seg_no);
  2902. break;
  2903. case CNSS_FW_RDDM:
  2904. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2905. seg_no);
  2906. break;
  2907. case CNSS_FW_REMOTE_HEAP:
  2908. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2909. seg_no);
  2910. break;
  2911. default:
  2912. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2913. return -EINVAL;
  2914. }
  2915. md_entry.phys_addr = pa;
  2916. md_entry.virt_addr = (uintptr_t)va;
  2917. md_entry.size = size;
  2918. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2919. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2920. md_entry.name, va, &pa, size);
  2921. ret = msm_minidump_add_region(&md_entry);
  2922. if (ret < 0)
  2923. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2924. return ret;
  2925. }
  2926. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2927. enum cnss_fw_dump_type type, int seg_no,
  2928. void *va, phys_addr_t pa, size_t size)
  2929. {
  2930. struct md_region md_entry;
  2931. int ret;
  2932. switch (type) {
  2933. case CNSS_FW_IMAGE:
  2934. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2935. seg_no);
  2936. break;
  2937. case CNSS_FW_RDDM:
  2938. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2939. seg_no);
  2940. break;
  2941. case CNSS_FW_REMOTE_HEAP:
  2942. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2943. seg_no);
  2944. break;
  2945. default:
  2946. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2947. return -EINVAL;
  2948. }
  2949. md_entry.phys_addr = pa;
  2950. md_entry.virt_addr = (uintptr_t)va;
  2951. md_entry.size = size;
  2952. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2953. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2954. md_entry.name, va, &pa, size);
  2955. ret = msm_minidump_remove_region(&md_entry);
  2956. if (ret)
  2957. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2958. ret);
  2959. return ret;
  2960. }
  2961. #else
  2962. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2963. phys_addr_t *pa, unsigned long attrs)
  2964. {
  2965. return 0;
  2966. }
  2967. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2968. enum cnss_fw_dump_type type, int seg_no,
  2969. void *va, phys_addr_t pa, size_t size)
  2970. {
  2971. return 0;
  2972. }
  2973. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2974. enum cnss_fw_dump_type type, int seg_no,
  2975. void *va, phys_addr_t pa, size_t size)
  2976. {
  2977. return 0;
  2978. }
  2979. #endif /* CONFIG_QCOM_MINIDUMP */
  2980. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  2981. const struct firmware **fw_entry,
  2982. const char *filename)
  2983. {
  2984. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  2985. return request_firmware_direct(fw_entry, filename,
  2986. &plat_priv->plat_dev->dev);
  2987. else
  2988. return firmware_request_nowarn(fw_entry, filename,
  2989. &plat_priv->plat_dev->dev);
  2990. }
  2991. #if IS_ENABLED(CONFIG_INTERCONNECT)
  2992. /**
  2993. * cnss_register_bus_scale() - Setup interconnect voting data
  2994. * @plat_priv: Platform data structure
  2995. *
  2996. * For different interconnect path configured in device tree setup voting data
  2997. * for list of bandwidth requirements.
  2998. *
  2999. * Result: 0 for success. -EINVAL if not configured
  3000. */
  3001. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3002. {
  3003. int ret = -EINVAL;
  3004. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3005. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3006. struct device *dev = &plat_priv->plat_dev->dev;
  3007. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3008. ret = of_property_read_u32(dev->of_node,
  3009. "qcom,icc-path-count",
  3010. &plat_priv->icc.path_count);
  3011. if (ret) {
  3012. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3013. return 0;
  3014. }
  3015. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3016. "qcom,bus-bw-cfg-count",
  3017. &plat_priv->icc.bus_bw_cfg_count);
  3018. if (ret) {
  3019. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3020. goto cleanup;
  3021. }
  3022. cfg_arr_size = plat_priv->icc.path_count *
  3023. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3024. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3025. if (!cfg_arr) {
  3026. cnss_pr_err("Failed to alloc cfg table mem\n");
  3027. ret = -ENOMEM;
  3028. goto cleanup;
  3029. }
  3030. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3031. "qcom,bus-bw-cfg", cfg_arr,
  3032. cfg_arr_size);
  3033. if (ret) {
  3034. cnss_pr_err("Invalid Bus BW Config Table\n");
  3035. goto cleanup;
  3036. }
  3037. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3038. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3039. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3040. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3041. GFP_KERNEL);
  3042. if (!bus_bw_info) {
  3043. ret = -ENOMEM;
  3044. goto out;
  3045. }
  3046. ret = of_property_read_string_index(dev->of_node,
  3047. "interconnect-names", idx,
  3048. &bus_bw_info->icc_name);
  3049. if (ret)
  3050. goto out;
  3051. bus_bw_info->icc_path =
  3052. of_icc_get(&plat_priv->plat_dev->dev,
  3053. bus_bw_info->icc_name);
  3054. if (IS_ERR(bus_bw_info->icc_path)) {
  3055. ret = PTR_ERR(bus_bw_info->icc_path);
  3056. if (ret != -EPROBE_DEFER) {
  3057. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3058. bus_bw_info->icc_name, ret);
  3059. goto out;
  3060. }
  3061. }
  3062. bus_bw_info->cfg_table =
  3063. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3064. sizeof(*bus_bw_info->cfg_table),
  3065. GFP_KERNEL);
  3066. if (!bus_bw_info->cfg_table) {
  3067. ret = -ENOMEM;
  3068. goto out;
  3069. }
  3070. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3071. bus_bw_info->icc_name);
  3072. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3073. CNSS_ICC_VOTE_MAX);
  3074. i < plat_priv->icc.bus_bw_cfg_count;
  3075. i++, j += 2) {
  3076. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3077. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3078. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3079. i, bus_bw_info->cfg_table[i].avg_bw,
  3080. bus_bw_info->cfg_table[i].peak_bw);
  3081. }
  3082. list_add_tail(&bus_bw_info->list,
  3083. &plat_priv->icc.list_head);
  3084. }
  3085. kfree(cfg_arr);
  3086. return 0;
  3087. out:
  3088. list_for_each_entry_safe(bus_bw_info, tmp,
  3089. &plat_priv->icc.list_head, list) {
  3090. list_del(&bus_bw_info->list);
  3091. }
  3092. cleanup:
  3093. kfree(cfg_arr);
  3094. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3095. return ret;
  3096. }
  3097. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3098. {
  3099. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3100. list_for_each_entry_safe(bus_bw_info, tmp,
  3101. &plat_priv->icc.list_head, list) {
  3102. list_del(&bus_bw_info->list);
  3103. if (bus_bw_info->icc_path)
  3104. icc_put(bus_bw_info->icc_path);
  3105. }
  3106. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3107. }
  3108. #else
  3109. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3110. {
  3111. return 0;
  3112. }
  3113. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3114. #endif /* CONFIG_INTERCONNECT */
  3115. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3116. {
  3117. struct cnss_plat_data *plat_priv = cb_ctx;
  3118. if (!plat_priv) {
  3119. cnss_pr_err("%s: Invalid context\n", __func__);
  3120. return;
  3121. }
  3122. if (status) {
  3123. cnss_pr_info("CNSS Daemon connected\n");
  3124. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3125. complete(&plat_priv->daemon_connected);
  3126. } else {
  3127. cnss_pr_info("CNSS Daemon disconnected\n");
  3128. reinit_completion(&plat_priv->daemon_connected);
  3129. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3130. }
  3131. }
  3132. static ssize_t enable_hds_store(struct device *dev,
  3133. struct device_attribute *attr,
  3134. const char *buf, size_t count)
  3135. {
  3136. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3137. unsigned int enable_hds = 0;
  3138. if (!plat_priv)
  3139. return -ENODEV;
  3140. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3141. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3142. return -EINVAL;
  3143. }
  3144. if (enable_hds)
  3145. plat_priv->hds_enabled = true;
  3146. else
  3147. plat_priv->hds_enabled = false;
  3148. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3149. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3150. return count;
  3151. }
  3152. static ssize_t recovery_show(struct device *dev,
  3153. struct device_attribute *attr,
  3154. char *buf)
  3155. {
  3156. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3157. u32 buf_size = PAGE_SIZE;
  3158. u32 curr_len = 0;
  3159. u32 buf_written = 0;
  3160. if (!plat_priv)
  3161. return -ENODEV;
  3162. buf_written = scnprintf(buf, buf_size,
  3163. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3164. "BIT0 -- wlan fw recovery\n"
  3165. "BIT1 -- wlan pcss recovery\n"
  3166. "---------------------------------\n");
  3167. curr_len += buf_written;
  3168. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3169. "WLAN recovery %s[%d]\n",
  3170. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3171. plat_priv->recovery_enabled);
  3172. curr_len += buf_written;
  3173. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3174. "WLAN PCSS recovery %s[%d]\n",
  3175. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3176. plat_priv->recovery_pcss_enabled);
  3177. curr_len += buf_written;
  3178. /*
  3179. * Now size of curr_len is not over page size for sure,
  3180. * later if new item or none-fixed size item added, need
  3181. * add check to make sure curr_len is not over page size.
  3182. */
  3183. return curr_len;
  3184. }
  3185. static ssize_t time_sync_period_show(struct device *dev,
  3186. struct device_attribute *attr,
  3187. char *buf)
  3188. {
  3189. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3190. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3191. plat_priv->ctrl_params.time_sync_period);
  3192. }
  3193. static ssize_t time_sync_period_store(struct device *dev,
  3194. struct device_attribute *attr,
  3195. const char *buf, size_t count)
  3196. {
  3197. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3198. unsigned int time_sync_period = 0;
  3199. if (!plat_priv)
  3200. return -ENODEV;
  3201. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3202. cnss_pr_err("Invalid time sync sysfs command\n");
  3203. return -EINVAL;
  3204. }
  3205. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  3206. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3207. return count;
  3208. }
  3209. static ssize_t recovery_store(struct device *dev,
  3210. struct device_attribute *attr,
  3211. const char *buf, size_t count)
  3212. {
  3213. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3214. unsigned int recovery = 0;
  3215. if (!plat_priv)
  3216. return -ENODEV;
  3217. if (sscanf(buf, "%du", &recovery) != 1) {
  3218. cnss_pr_err("Invalid recovery sysfs command\n");
  3219. return -EINVAL;
  3220. }
  3221. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3222. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3223. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3224. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3225. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3226. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3227. cnss_send_subsys_restart_level_msg(plat_priv);
  3228. return count;
  3229. }
  3230. static ssize_t shutdown_store(struct device *dev,
  3231. struct device_attribute *attr,
  3232. const char *buf, size_t count)
  3233. {
  3234. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3235. if (plat_priv) {
  3236. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3237. del_timer(&plat_priv->fw_boot_timer);
  3238. complete_all(&plat_priv->power_up_complete);
  3239. complete_all(&plat_priv->cal_complete);
  3240. }
  3241. cnss_pr_dbg("Received shutdown notification\n");
  3242. return count;
  3243. }
  3244. static ssize_t fs_ready_store(struct device *dev,
  3245. struct device_attribute *attr,
  3246. const char *buf, size_t count)
  3247. {
  3248. int fs_ready = 0;
  3249. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3250. if (sscanf(buf, "%du", &fs_ready) != 1)
  3251. return -EINVAL;
  3252. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3253. fs_ready, count);
  3254. if (!plat_priv) {
  3255. cnss_pr_err("plat_priv is NULL\n");
  3256. return count;
  3257. }
  3258. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3259. cnss_pr_dbg("QMI is bypassed\n");
  3260. return count;
  3261. }
  3262. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3263. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3264. cnss_driver_event_post(plat_priv,
  3265. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3266. 0, NULL);
  3267. }
  3268. return count;
  3269. }
  3270. static ssize_t qdss_trace_start_store(struct device *dev,
  3271. struct device_attribute *attr,
  3272. const char *buf, size_t count)
  3273. {
  3274. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3275. wlfw_qdss_trace_start(plat_priv);
  3276. cnss_pr_dbg("Received QDSS start command\n");
  3277. return count;
  3278. }
  3279. static ssize_t qdss_trace_stop_store(struct device *dev,
  3280. struct device_attribute *attr,
  3281. const char *buf, size_t count)
  3282. {
  3283. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3284. u32 option = 0;
  3285. if (sscanf(buf, "%du", &option) != 1)
  3286. return -EINVAL;
  3287. wlfw_qdss_trace_stop(plat_priv, option);
  3288. cnss_pr_dbg("Received QDSS stop command\n");
  3289. return count;
  3290. }
  3291. static ssize_t qdss_conf_download_store(struct device *dev,
  3292. struct device_attribute *attr,
  3293. const char *buf, size_t count)
  3294. {
  3295. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3296. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3297. cnss_pr_dbg("Received QDSS download config command\n");
  3298. return count;
  3299. }
  3300. static ssize_t hw_trace_override_store(struct device *dev,
  3301. struct device_attribute *attr,
  3302. const char *buf, size_t count)
  3303. {
  3304. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3305. int tmp = 0;
  3306. if (sscanf(buf, "%du", &tmp) != 1)
  3307. return -EINVAL;
  3308. plat_priv->hw_trc_override = tmp;
  3309. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3310. return count;
  3311. }
  3312. static ssize_t charger_mode_store(struct device *dev,
  3313. struct device_attribute *attr,
  3314. const char *buf, size_t count)
  3315. {
  3316. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3317. int tmp = 0;
  3318. if (sscanf(buf, "%du", &tmp) != 1)
  3319. return -EINVAL;
  3320. plat_priv->charger_mode = tmp;
  3321. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3322. return count;
  3323. }
  3324. static DEVICE_ATTR_WO(fs_ready);
  3325. static DEVICE_ATTR_WO(shutdown);
  3326. static DEVICE_ATTR_RW(recovery);
  3327. static DEVICE_ATTR_WO(enable_hds);
  3328. static DEVICE_ATTR_WO(qdss_trace_start);
  3329. static DEVICE_ATTR_WO(qdss_trace_stop);
  3330. static DEVICE_ATTR_WO(qdss_conf_download);
  3331. static DEVICE_ATTR_WO(hw_trace_override);
  3332. static DEVICE_ATTR_WO(charger_mode);
  3333. static DEVICE_ATTR_RW(time_sync_period);
  3334. static struct attribute *cnss_attrs[] = {
  3335. &dev_attr_fs_ready.attr,
  3336. &dev_attr_shutdown.attr,
  3337. &dev_attr_recovery.attr,
  3338. &dev_attr_enable_hds.attr,
  3339. &dev_attr_qdss_trace_start.attr,
  3340. &dev_attr_qdss_trace_stop.attr,
  3341. &dev_attr_qdss_conf_download.attr,
  3342. &dev_attr_hw_trace_override.attr,
  3343. &dev_attr_charger_mode.attr,
  3344. &dev_attr_time_sync_period.attr,
  3345. NULL,
  3346. };
  3347. static struct attribute_group cnss_attr_group = {
  3348. .attrs = cnss_attrs,
  3349. };
  3350. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3351. {
  3352. struct device *dev = &plat_priv->plat_dev->dev;
  3353. int ret;
  3354. char cnss_name[CNSS_FS_NAME_SIZE];
  3355. char shutdown_name[32];
  3356. if (cnss_is_dual_wlan_enabled()) {
  3357. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3358. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3359. snprintf(shutdown_name, sizeof(shutdown_name),
  3360. "shutdown_wlan_%d", plat_priv->plat_idx);
  3361. } else {
  3362. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3363. snprintf(shutdown_name, sizeof(shutdown_name),
  3364. "shutdown_wlan");
  3365. }
  3366. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3367. if (ret) {
  3368. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3369. ret);
  3370. goto out;
  3371. }
  3372. /* This is only for backward compatibility. */
  3373. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3374. if (ret) {
  3375. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3376. ret);
  3377. goto rm_cnss_link;
  3378. }
  3379. return 0;
  3380. rm_cnss_link:
  3381. sysfs_remove_link(kernel_kobj, cnss_name);
  3382. out:
  3383. return ret;
  3384. }
  3385. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3386. {
  3387. char cnss_name[CNSS_FS_NAME_SIZE];
  3388. char shutdown_name[32];
  3389. if (cnss_is_dual_wlan_enabled()) {
  3390. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3391. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3392. snprintf(shutdown_name, sizeof(shutdown_name),
  3393. "shutdown_wlan_%d", plat_priv->plat_idx);
  3394. } else {
  3395. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3396. snprintf(shutdown_name, sizeof(shutdown_name),
  3397. "shutdown_wlan");
  3398. }
  3399. sysfs_remove_link(kernel_kobj, shutdown_name);
  3400. sysfs_remove_link(kernel_kobj, cnss_name);
  3401. }
  3402. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3403. {
  3404. int ret = 0;
  3405. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3406. &cnss_attr_group);
  3407. if (ret) {
  3408. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3409. ret);
  3410. goto out;
  3411. }
  3412. cnss_create_sysfs_link(plat_priv);
  3413. return 0;
  3414. out:
  3415. return ret;
  3416. }
  3417. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3418. {
  3419. cnss_remove_sysfs_link(plat_priv);
  3420. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3421. }
  3422. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3423. {
  3424. spin_lock_init(&plat_priv->event_lock);
  3425. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3426. WQ_UNBOUND, 1);
  3427. if (!plat_priv->event_wq) {
  3428. cnss_pr_err("Failed to create event workqueue!\n");
  3429. return -EFAULT;
  3430. }
  3431. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3432. INIT_LIST_HEAD(&plat_priv->event_list);
  3433. return 0;
  3434. }
  3435. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3436. {
  3437. destroy_workqueue(plat_priv->event_wq);
  3438. }
  3439. static int cnss_reboot_notifier(struct notifier_block *nb,
  3440. unsigned long action,
  3441. void *data)
  3442. {
  3443. struct cnss_plat_data *plat_priv =
  3444. container_of(nb, struct cnss_plat_data, reboot_nb);
  3445. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3446. del_timer(&plat_priv->fw_boot_timer);
  3447. complete_all(&plat_priv->power_up_complete);
  3448. complete_all(&plat_priv->cal_complete);
  3449. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3450. return NOTIFY_DONE;
  3451. }
  3452. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3453. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3454. {
  3455. struct Object client_env;
  3456. struct Object app_object;
  3457. u32 wifi_uid = HW_WIFI_UID;
  3458. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3459. int ret;
  3460. u8 state = 0;
  3461. /* Once this flag is set, secure peripheral feature
  3462. * will not be supported till next reboot
  3463. */
  3464. if (plat_priv->sec_peri_feature_disable)
  3465. return 0;
  3466. /* get rootObj */
  3467. ret = get_client_env_object(&client_env);
  3468. if (ret) {
  3469. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3470. goto end;
  3471. }
  3472. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3473. if (ret) {
  3474. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3475. if (ret == FEATURE_NOT_SUPPORTED) {
  3476. ret = 0; /* Do not Assert */
  3477. plat_priv->sec_peri_feature_disable = true;
  3478. cnss_pr_dbg("Secure HW feature not supported\n");
  3479. }
  3480. goto exit_release_clientenv;
  3481. }
  3482. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3483. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3484. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3485. ObjectCounts_pack(1, 1, 0, 0));
  3486. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3487. if (ret) {
  3488. if (ret == PERIPHERAL_NOT_FOUND) {
  3489. ret = 0; /* Do not Assert */
  3490. plat_priv->sec_peri_feature_disable = true;
  3491. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3492. }
  3493. goto exit_release_app_obj;
  3494. }
  3495. if (state == 1)
  3496. set_bit(CNSS_WLAN_HW_DISABLED,
  3497. &plat_priv->driver_state);
  3498. else
  3499. clear_bit(CNSS_WLAN_HW_DISABLED,
  3500. &plat_priv->driver_state);
  3501. exit_release_app_obj:
  3502. Object_release(app_object);
  3503. exit_release_clientenv:
  3504. Object_release(client_env);
  3505. end:
  3506. if (ret) {
  3507. cnss_pr_err("Unable to get HW disable status\n");
  3508. CNSS_ASSERT(0);
  3509. }
  3510. return ret;
  3511. }
  3512. #else
  3513. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3514. {
  3515. return 0;
  3516. }
  3517. #endif
  3518. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3519. {
  3520. int ret;
  3521. ret = cnss_init_sol_gpio(plat_priv);
  3522. if (ret)
  3523. return ret;
  3524. timer_setup(&plat_priv->fw_boot_timer,
  3525. cnss_bus_fw_boot_timeout_hdlr, 0);
  3526. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3527. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3528. if (ret)
  3529. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3530. ret);
  3531. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3532. if (ret)
  3533. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3534. ret);
  3535. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3536. init_completion(&plat_priv->power_up_complete);
  3537. init_completion(&plat_priv->cal_complete);
  3538. init_completion(&plat_priv->rddm_complete);
  3539. init_completion(&plat_priv->recovery_complete);
  3540. init_completion(&plat_priv->daemon_connected);
  3541. mutex_init(&plat_priv->dev_lock);
  3542. mutex_init(&plat_priv->driver_ops_lock);
  3543. plat_priv->recovery_ws =
  3544. wakeup_source_register(&plat_priv->plat_dev->dev,
  3545. "CNSS_FW_RECOVERY");
  3546. if (!plat_priv->recovery_ws)
  3547. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3548. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3549. cnss_daemon_connection_update_cb,
  3550. plat_priv);
  3551. if (ret)
  3552. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3553. ret);
  3554. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3555. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3556. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3557. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3558. "qcom,rc-ep-short-channel"))
  3559. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3560. return 0;
  3561. }
  3562. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3563. {
  3564. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3565. plat_priv);
  3566. complete_all(&plat_priv->recovery_complete);
  3567. complete_all(&plat_priv->rddm_complete);
  3568. complete_all(&plat_priv->cal_complete);
  3569. complete_all(&plat_priv->power_up_complete);
  3570. complete_all(&plat_priv->daemon_connected);
  3571. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3572. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3573. del_timer(&plat_priv->fw_boot_timer);
  3574. wakeup_source_unregister(plat_priv->recovery_ws);
  3575. cnss_deinit_sol_gpio(plat_priv);
  3576. kfree(plat_priv->sram_dump);
  3577. }
  3578. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3579. {
  3580. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3581. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3582. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3583. "qcom,wlan-cbc-enabled");
  3584. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3585. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3586. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3587. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3588. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3589. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3590. * enabled by default
  3591. */
  3592. plat_priv->adsp_pc_enabled = true;
  3593. }
  3594. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3595. {
  3596. struct device *dev = &plat_priv->plat_dev->dev;
  3597. plat_priv->use_pm_domain =
  3598. of_property_read_bool(dev->of_node, "use-pm-domain");
  3599. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3600. }
  3601. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3602. {
  3603. struct device *dev = &plat_priv->plat_dev->dev;
  3604. plat_priv->set_wlaon_pwr_ctrl =
  3605. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3606. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3607. plat_priv->set_wlaon_pwr_ctrl);
  3608. }
  3609. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3610. {
  3611. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3612. "qcom,converged-dt") ||
  3613. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3614. "qcom,same-dt-multi-dev") ||
  3615. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3616. "qcom,multi-wlan-exchg"));
  3617. }
  3618. static const struct platform_device_id cnss_platform_id_table[] = {
  3619. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3620. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3621. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3622. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3623. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3624. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3625. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3626. { .name = "qcaconv", .driver_data = 0, },
  3627. { },
  3628. };
  3629. static const struct of_device_id cnss_of_match_table[] = {
  3630. {
  3631. .compatible = "qcom,cnss",
  3632. .data = (void *)&cnss_platform_id_table[0]},
  3633. {
  3634. .compatible = "qcom,cnss-qca6290",
  3635. .data = (void *)&cnss_platform_id_table[1]},
  3636. {
  3637. .compatible = "qcom,cnss-qca6390",
  3638. .data = (void *)&cnss_platform_id_table[2]},
  3639. {
  3640. .compatible = "qcom,cnss-qca6490",
  3641. .data = (void *)&cnss_platform_id_table[3]},
  3642. {
  3643. .compatible = "qcom,cnss-kiwi",
  3644. .data = (void *)&cnss_platform_id_table[4]},
  3645. {
  3646. .compatible = "qcom,cnss-mango",
  3647. .data = (void *)&cnss_platform_id_table[5]},
  3648. {
  3649. .compatible = "qcom,cnss-peach",
  3650. .data = (void *)&cnss_platform_id_table[6]},
  3651. {
  3652. .compatible = "qcom,cnss-qca-converged",
  3653. .data = (void *)&cnss_platform_id_table[7]},
  3654. { },
  3655. };
  3656. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3657. static inline bool
  3658. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3659. {
  3660. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3661. "use-nv-mac");
  3662. }
  3663. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3664. {
  3665. struct device_node *child;
  3666. u32 id, i;
  3667. int id_n, device_identifier_gpio, ret;
  3668. u8 gpio_value;
  3669. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3670. return 0;
  3671. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3672. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3673. if (ret) {
  3674. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3675. return ret;
  3676. }
  3677. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3678. gpio_value = gpio_get_value(device_identifier_gpio);
  3679. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3680. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3681. child) {
  3682. if (strcmp(child->name, "chip_cfg"))
  3683. continue;
  3684. id_n = of_property_count_u32_elems(child, "supported-ids");
  3685. if (id_n <= 0) {
  3686. cnss_pr_err("Device id is NOT set\n");
  3687. return -EINVAL;
  3688. }
  3689. for (i = 0; i < id_n; i++) {
  3690. ret = of_property_read_u32_index(child,
  3691. "supported-ids",
  3692. i, &id);
  3693. if (ret) {
  3694. cnss_pr_err("Failed to read supported ids\n");
  3695. return -EINVAL;
  3696. }
  3697. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3698. plat_priv->plat_dev->dev.of_node = child;
  3699. plat_priv->device_id = QCA6490_DEVICE_ID;
  3700. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3701. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3702. child->name, i, id);
  3703. return 0;
  3704. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3705. plat_priv->plat_dev->dev.of_node = child;
  3706. plat_priv->device_id = KIWI_DEVICE_ID;
  3707. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3708. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3709. child->name, i, id);
  3710. return 0;
  3711. }
  3712. }
  3713. }
  3714. return -EINVAL;
  3715. }
  3716. static inline u32
  3717. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3718. {
  3719. bool is_converged_dt = of_property_read_bool(
  3720. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3721. bool is_multi_wlan_xchg;
  3722. if (is_converged_dt)
  3723. return CNSS_DTT_CONVERGED;
  3724. is_multi_wlan_xchg = of_property_read_bool(
  3725. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3726. if (is_multi_wlan_xchg)
  3727. return CNSS_DTT_MULTIEXCHG;
  3728. return CNSS_DTT_LEGACY;
  3729. }
  3730. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3731. {
  3732. int ret = 0;
  3733. int retry = 0;
  3734. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3735. return 0;
  3736. retry:
  3737. ret = cnss_power_on_device(plat_priv, true);
  3738. if (ret)
  3739. goto end;
  3740. ret = cnss_bus_init(plat_priv);
  3741. if (ret) {
  3742. if ((ret != -EPROBE_DEFER) &&
  3743. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3744. cnss_power_off_device(plat_priv);
  3745. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3746. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3747. goto retry;
  3748. }
  3749. goto power_off;
  3750. }
  3751. return 0;
  3752. power_off:
  3753. cnss_power_off_device(plat_priv);
  3754. end:
  3755. return ret;
  3756. }
  3757. int cnss_wlan_hw_enable(void)
  3758. {
  3759. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3760. int ret = 0;
  3761. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3762. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3763. goto register_driver;
  3764. ret = cnss_wlan_device_init(plat_priv);
  3765. if (ret) {
  3766. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3767. CNSS_ASSERT(0);
  3768. return ret;
  3769. }
  3770. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3771. cnss_driver_event_post(plat_priv,
  3772. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3773. 0, NULL);
  3774. register_driver:
  3775. if (plat_priv->driver_ops)
  3776. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3777. return ret;
  3778. }
  3779. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3780. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  3781. {
  3782. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3783. int ret = 0;
  3784. if (!plat_priv)
  3785. return -ENODEV;
  3786. /* If IMS server is connected, return success without QMI send */
  3787. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  3788. cnss_pr_dbg("Ignore host request as IMS server is connected");
  3789. return ret;
  3790. }
  3791. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  3792. return ret;
  3793. }
  3794. EXPORT_SYMBOL(cnss_set_wfc_mode);
  3795. static int cnss_probe(struct platform_device *plat_dev)
  3796. {
  3797. int ret = 0;
  3798. struct cnss_plat_data *plat_priv;
  3799. const struct of_device_id *of_id;
  3800. const struct platform_device_id *device_id;
  3801. if (cnss_get_plat_priv(plat_dev)) {
  3802. cnss_pr_err("Driver is already initialized!\n");
  3803. ret = -EEXIST;
  3804. goto out;
  3805. }
  3806. ret = cnss_plat_env_available();
  3807. if (ret)
  3808. goto out;
  3809. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  3810. if (!of_id || !of_id->data) {
  3811. cnss_pr_err("Failed to find of match device!\n");
  3812. ret = -ENODEV;
  3813. goto out;
  3814. }
  3815. device_id = of_id->data;
  3816. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  3817. GFP_KERNEL);
  3818. if (!plat_priv) {
  3819. ret = -ENOMEM;
  3820. goto out;
  3821. }
  3822. plat_priv->plat_dev = plat_dev;
  3823. plat_priv->dev_node = NULL;
  3824. plat_priv->device_id = device_id->driver_data;
  3825. plat_priv->dt_type = cnss_dt_type(plat_priv);
  3826. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  3827. plat_priv->dt_type);
  3828. plat_priv->use_fw_path_with_prefix =
  3829. cnss_use_fw_path_with_prefix(plat_priv);
  3830. ret = cnss_get_dev_cfg_node(plat_priv);
  3831. if (ret) {
  3832. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  3833. goto reset_plat_dev;
  3834. }
  3835. ret = cnss_get_pld_bus_ops_name(plat_priv);
  3836. if (ret)
  3837. cnss_pr_err("Failed to find bus ops name, err = %d\n",
  3838. ret);
  3839. ret = cnss_get_rc_num(plat_priv);
  3840. if (ret)
  3841. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  3842. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  3843. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  3844. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  3845. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  3846. cnss_set_plat_priv(plat_dev, plat_priv);
  3847. cnss_set_device_name(plat_priv);
  3848. platform_set_drvdata(plat_dev, plat_priv);
  3849. INIT_LIST_HEAD(&plat_priv->vreg_list);
  3850. INIT_LIST_HEAD(&plat_priv->clk_list);
  3851. cnss_get_pm_domain_info(plat_priv);
  3852. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  3853. cnss_power_misc_params_init(plat_priv);
  3854. cnss_get_tcs_info(plat_priv);
  3855. cnss_get_cpr_info(plat_priv);
  3856. cnss_aop_mbox_init(plat_priv);
  3857. cnss_init_control_params(plat_priv);
  3858. ret = cnss_get_resources(plat_priv);
  3859. if (ret)
  3860. goto reset_ctx;
  3861. ret = cnss_register_esoc(plat_priv);
  3862. if (ret)
  3863. goto free_res;
  3864. ret = cnss_register_bus_scale(plat_priv);
  3865. if (ret)
  3866. goto unreg_esoc;
  3867. ret = cnss_create_sysfs(plat_priv);
  3868. if (ret)
  3869. goto unreg_bus_scale;
  3870. ret = cnss_event_work_init(plat_priv);
  3871. if (ret)
  3872. goto remove_sysfs;
  3873. ret = cnss_dms_init(plat_priv);
  3874. if (ret)
  3875. goto deinit_event_work;
  3876. ret = cnss_debugfs_create(plat_priv);
  3877. if (ret)
  3878. goto deinit_dms;
  3879. ret = cnss_misc_init(plat_priv);
  3880. if (ret)
  3881. goto destroy_debugfs;
  3882. ret = cnss_wlan_hw_disable_check(plat_priv);
  3883. if (ret)
  3884. goto deinit_misc;
  3885. /* Make sure all platform related init are done before
  3886. * device power on and bus init.
  3887. */
  3888. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  3889. ret = cnss_wlan_device_init(plat_priv);
  3890. if (ret)
  3891. goto deinit_misc;
  3892. } else {
  3893. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  3894. }
  3895. cnss_register_coex_service(plat_priv);
  3896. cnss_register_ims_service(plat_priv);
  3897. cnss_pr_info("Platform driver probed successfully.\n");
  3898. return 0;
  3899. deinit_misc:
  3900. cnss_misc_deinit(plat_priv);
  3901. destroy_debugfs:
  3902. cnss_debugfs_destroy(plat_priv);
  3903. deinit_dms:
  3904. cnss_dms_deinit(plat_priv);
  3905. deinit_event_work:
  3906. cnss_event_work_deinit(plat_priv);
  3907. remove_sysfs:
  3908. cnss_remove_sysfs(plat_priv);
  3909. unreg_bus_scale:
  3910. cnss_unregister_bus_scale(plat_priv);
  3911. unreg_esoc:
  3912. cnss_unregister_esoc(plat_priv);
  3913. free_res:
  3914. cnss_put_resources(plat_priv);
  3915. reset_ctx:
  3916. platform_set_drvdata(plat_dev, NULL);
  3917. reset_plat_dev:
  3918. cnss_clear_plat_priv(plat_priv);
  3919. out:
  3920. return ret;
  3921. }
  3922. static int cnss_remove(struct platform_device *plat_dev)
  3923. {
  3924. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  3925. plat_priv->audio_iommu_domain = NULL;
  3926. cnss_genl_exit();
  3927. cnss_unregister_ims_service(plat_priv);
  3928. cnss_unregister_coex_service(plat_priv);
  3929. cnss_bus_deinit(plat_priv);
  3930. cnss_misc_deinit(plat_priv);
  3931. cnss_debugfs_destroy(plat_priv);
  3932. cnss_dms_deinit(plat_priv);
  3933. cnss_qmi_deinit(plat_priv);
  3934. cnss_event_work_deinit(plat_priv);
  3935. cnss_cancel_dms_work();
  3936. cnss_remove_sysfs(plat_priv);
  3937. cnss_unregister_bus_scale(plat_priv);
  3938. cnss_unregister_esoc(plat_priv);
  3939. cnss_put_resources(plat_priv);
  3940. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  3941. mbox_free_channel(plat_priv->mbox_chan);
  3942. platform_set_drvdata(plat_dev, NULL);
  3943. cnss_clear_plat_priv(plat_priv);
  3944. return 0;
  3945. }
  3946. static struct platform_driver cnss_platform_driver = {
  3947. .probe = cnss_probe,
  3948. .remove = cnss_remove,
  3949. .driver = {
  3950. .name = "cnss2",
  3951. .of_match_table = cnss_of_match_table,
  3952. #ifdef CONFIG_CNSS_ASYNC
  3953. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3954. #endif
  3955. },
  3956. };
  3957. static bool cnss_check_compatible_node(void)
  3958. {
  3959. struct device_node *dn = NULL;
  3960. for_each_matching_node(dn, cnss_of_match_table) {
  3961. if (of_device_is_available(dn)) {
  3962. cnss_allow_driver_loading = true;
  3963. return true;
  3964. }
  3965. }
  3966. return false;
  3967. }
  3968. /**
  3969. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  3970. *
  3971. * Valid device tree node means a node with "compatible" property from the
  3972. * device match table and "status" property is not disabled.
  3973. *
  3974. * Return: true if valid device tree node found, false if not found
  3975. */
  3976. static bool cnss_is_valid_dt_node_found(void)
  3977. {
  3978. struct device_node *dn = NULL;
  3979. for_each_matching_node(dn, cnss_of_match_table) {
  3980. if (of_device_is_available(dn))
  3981. break;
  3982. }
  3983. if (dn)
  3984. return true;
  3985. return false;
  3986. }
  3987. static int __init cnss_initialize(void)
  3988. {
  3989. int ret = 0;
  3990. if (!cnss_is_valid_dt_node_found())
  3991. return -ENODEV;
  3992. if (!cnss_check_compatible_node())
  3993. return ret;
  3994. cnss_debug_init();
  3995. ret = platform_driver_register(&cnss_platform_driver);
  3996. if (ret)
  3997. cnss_debug_deinit();
  3998. ret = cnss_genl_init();
  3999. if (ret < 0)
  4000. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4001. return ret;
  4002. }
  4003. static void __exit cnss_exit(void)
  4004. {
  4005. cnss_genl_exit();
  4006. platform_driver_unregister(&cnss_platform_driver);
  4007. cnss_debug_deinit();
  4008. }
  4009. module_init(cnss_initialize);
  4010. module_exit(cnss_exit);
  4011. MODULE_LICENSE("GPL v2");
  4012. MODULE_DESCRIPTION("CNSS2 Platform Driver");